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-rw-r--r--drivers/mmc/host/sdhci-of-core.c253
-rw-r--r--drivers/mmc/host/sdhci-of-esdhc.c36
-rw-r--r--drivers/mmc/host/sdhci-of-hlwd.c20
-rw-r--r--drivers/mmc/host/sdhci-of.h15
-rw-r--r--drivers/mmc/host/sdhci-pltfm.h4
5 files changed, 37 insertions, 291 deletions
diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
deleted file mode 100644
index 60e4186a4345..000000000000
--- a/drivers/mmc/host/sdhci-of-core.c
+++ /dev/null
@@ -1,253 +0,0 @@
1/*
2 * OpenFirmware bindings for Secure Digital Host Controller Interface.
3 *
4 * Copyright (c) 2007 Freescale Semiconductor, Inc.
5 * Copyright (c) 2009 MontaVista Software, Inc.
6 *
7 * Authors: Xiaobo Xie <X.Xie@freescale.com>
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or (at
13 * your option) any later version.
14 */
15
16#include <linux/err.h>
17#include <linux/module.h>
18#include <linux/init.h>
19#include <linux/io.h>
20#include <linux/interrupt.h>
21#include <linux/delay.h>
22#include <linux/of.h>
23#include <linux/of_platform.h>
24#include <linux/of_address.h>
25#include <linux/of_irq.h>
26#include <linux/mmc/host.h>
27#ifdef CONFIG_PPC
28#include <asm/machdep.h>
29#endif
30#include "sdhci-of.h"
31#include "sdhci.h"
32
33#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
34
35/*
36 * These accessors are designed for big endian hosts doing I/O to
37 * little endian controllers incorporating a 32-bit hardware byte swapper.
38 */
39
40u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
41{
42 return in_be32(host->ioaddr + reg);
43}
44
45u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
46{
47 return in_be16(host->ioaddr + (reg ^ 0x2));
48}
49
50u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
51{
52 return in_8(host->ioaddr + (reg ^ 0x3));
53}
54
55void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
56{
57 out_be32(host->ioaddr + reg, val);
58}
59
60void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
61{
62 struct sdhci_of_host *of_host = sdhci_priv(host);
63 int base = reg & ~0x3;
64 int shift = (reg & 0x2) * 8;
65
66 switch (reg) {
67 case SDHCI_TRANSFER_MODE:
68 /*
69 * Postpone this write, we must do it together with a
70 * command write that is down below.
71 */
72 of_host->xfer_mode_shadow = val;
73 return;
74 case SDHCI_COMMAND:
75 sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow,
76 SDHCI_TRANSFER_MODE);
77 return;
78 }
79 clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift);
80}
81
82void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
83{
84 int base = reg & ~0x3;
85 int shift = (reg & 0x3) * 8;
86
87 clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift);
88}
89#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
90
91#ifdef CONFIG_PM
92
93static int sdhci_of_suspend(struct platform_device *ofdev, pm_message_t state)
94{
95 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
96
97 return mmc_suspend_host(host->mmc);
98}
99
100static int sdhci_of_resume(struct platform_device *ofdev)
101{
102 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
103
104 return mmc_resume_host(host->mmc);
105}
106
107#else
108
109#define sdhci_of_suspend NULL
110#define sdhci_of_resume NULL
111
112#endif
113
114static bool __devinit sdhci_of_wp_inverted(struct device_node *np)
115{
116 if (of_get_property(np, "sdhci,wp-inverted", NULL))
117 return true;
118
119 /* Old device trees don't have the wp-inverted property. */
120#ifdef CONFIG_PPC
121 return machine_is(mpc837x_rdb) || machine_is(mpc837x_mds);
122#else
123 return false;
124#endif
125}
126
127static const struct of_device_id sdhci_of_match[];
128static int __devinit sdhci_of_probe(struct platform_device *ofdev)
129{
130 const struct of_device_id *match;
131 struct device_node *np = ofdev->dev.of_node;
132 struct sdhci_of_data *sdhci_of_data;
133 struct sdhci_host *host;
134 struct sdhci_of_host *of_host;
135 const __be32 *clk;
136 int size;
137 int ret;
138
139 match = of_match_device(sdhci_of_match, &ofdev->dev);
140 if (!match)
141 return -EINVAL;
142 sdhci_of_data = match->data;
143
144 if (!of_device_is_available(np))
145 return -ENODEV;
146
147 host = sdhci_alloc_host(&ofdev->dev, sizeof(*of_host));
148 if (IS_ERR(host))
149 return -ENOMEM;
150
151 of_host = sdhci_priv(host);
152 dev_set_drvdata(&ofdev->dev, host);
153
154 host->ioaddr = of_iomap(np, 0);
155 if (!host->ioaddr) {
156 ret = -ENOMEM;
157 goto err_addr_map;
158 }
159
160 host->irq = irq_of_parse_and_map(np, 0);
161 if (!host->irq) {
162 ret = -EINVAL;
163 goto err_no_irq;
164 }
165
166 host->hw_name = dev_name(&ofdev->dev);
167 if (sdhci_of_data) {
168 host->quirks = sdhci_of_data->quirks;
169 host->ops = &sdhci_of_data->ops;
170 }
171
172 if (of_get_property(np, "sdhci,auto-cmd12", NULL))
173 host->quirks |= SDHCI_QUIRK_MULTIBLOCK_READ_ACMD12;
174
175
176 if (of_get_property(np, "sdhci,1-bit-only", NULL))
177 host->quirks |= SDHCI_QUIRK_FORCE_1_BIT_DATA;
178
179 if (sdhci_of_wp_inverted(np))
180 host->quirks |= SDHCI_QUIRK_INVERTED_WRITE_PROTECT;
181
182 clk = of_get_property(np, "clock-frequency", &size);
183 if (clk && size == sizeof(*clk) && *clk)
184 of_host->clock = be32_to_cpup(clk);
185
186 ret = sdhci_add_host(host);
187 if (ret)
188 goto err_add_host;
189
190 return 0;
191
192err_add_host:
193 irq_dispose_mapping(host->irq);
194err_no_irq:
195 iounmap(host->ioaddr);
196err_addr_map:
197 sdhci_free_host(host);
198 return ret;
199}
200
201static int __devexit sdhci_of_remove(struct platform_device *ofdev)
202{
203 struct sdhci_host *host = dev_get_drvdata(&ofdev->dev);
204
205 sdhci_remove_host(host, 0);
206 sdhci_free_host(host);
207 irq_dispose_mapping(host->irq);
208 iounmap(host->ioaddr);
209 return 0;
210}
211
212static const struct of_device_id sdhci_of_match[] = {
213#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
214 { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, },
215 { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, },
216 { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, },
217#endif
218#ifdef CONFIG_MMC_SDHCI_OF_HLWD
219 { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, },
220#endif
221 { .compatible = "generic-sdhci", },
222 {},
223};
224MODULE_DEVICE_TABLE(of, sdhci_of_match);
225
226static struct platform_driver sdhci_of_driver = {
227 .driver = {
228 .name = "sdhci-of",
229 .owner = THIS_MODULE,
230 .of_match_table = sdhci_of_match,
231 },
232 .probe = sdhci_of_probe,
233 .remove = __devexit_p(sdhci_of_remove),
234 .suspend = sdhci_of_suspend,
235 .resume = sdhci_of_resume,
236};
237
238static int __init sdhci_of_init(void)
239{
240 return platform_driver_register(&sdhci_of_driver);
241}
242module_init(sdhci_of_init);
243
244static void __exit sdhci_of_exit(void)
245{
246 platform_driver_unregister(&sdhci_of_driver);
247}
248module_exit(sdhci_of_exit);
249
250MODULE_DESCRIPTION("Secure Digital Host Controller Interface OF driver");
251MODULE_AUTHOR("Xiaobo Xie <X.Xie@freescale.com>, "
252 "Anton Vorontsov <avorontsov@ru.mvista.com>");
253MODULE_LICENSE("GPL");
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c
index ba40d6d035c7..492bcd72180a 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -60,32 +60,34 @@ static int esdhc_of_enable_dma(struct sdhci_host *host)
60 60
61static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host) 61static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
62{ 62{
63 struct sdhci_of_host *of_host = sdhci_priv(host); 63 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
64 64
65 return of_host->clock; 65 return pltfm_host->clock;
66} 66}
67 67
68static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host) 68static unsigned int esdhc_of_get_min_clock(struct sdhci_host *host)
69{ 69{
70 struct sdhci_of_host *of_host = sdhci_priv(host); 70 struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
71 71
72 return of_host->clock / 256 / 16; 72 return pltfm_host->clock / 256 / 16;
73} 73}
74 74
75struct sdhci_of_data sdhci_esdhc = { 75static struct sdhci_ops sdhci_esdhc_ops = {
76 .read_l = sdhci_be32bs_readl,
77 .read_w = esdhc_readw,
78 .read_b = sdhci_be32bs_readb,
79 .write_l = sdhci_be32bs_writel,
80 .write_w = esdhc_writew,
81 .write_b = esdhc_writeb,
82 .set_clock = esdhc_set_clock,
83 .enable_dma = esdhc_of_enable_dma,
84 .get_max_clock = esdhc_of_get_max_clock,
85 .get_min_clock = esdhc_of_get_min_clock,
86};
87
88struct sdhci_pltfm_data sdhci_esdhc_pdata = {
76 /* card detection could be handled via GPIO */ 89 /* card detection could be handled via GPIO */
77 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION 90 .quirks = ESDHC_DEFAULT_QUIRKS | SDHCI_QUIRK_BROKEN_CARD_DETECTION
78 | SDHCI_QUIRK_NO_CARD_NO_RESET, 91 | SDHCI_QUIRK_NO_CARD_NO_RESET,
79 .ops = { 92 .ops = &sdhci_esdhc_ops,
80 .read_l = sdhci_be32bs_readl,
81 .read_w = esdhc_readw,
82 .read_b = sdhci_be32bs_readb,
83 .write_l = sdhci_be32bs_writel,
84 .write_w = esdhc_writew,
85 .write_b = esdhc_writeb,
86 .set_clock = esdhc_set_clock,
87 .enable_dma = esdhc_of_enable_dma,
88 .get_max_clock = esdhc_of_get_max_clock,
89 .get_min_clock = esdhc_of_get_min_clock,
90 },
91}; 93};
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c
index 68ddb7546ae2..380e896864b5 100644
--- a/drivers/mmc/host/sdhci-of-hlwd.c
+++ b/drivers/mmc/host/sdhci-of-hlwd.c
@@ -51,15 +51,17 @@ static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg)
51 udelay(SDHCI_HLWD_WRITE_DELAY); 51 udelay(SDHCI_HLWD_WRITE_DELAY);
52} 52}
53 53
54struct sdhci_of_data sdhci_hlwd = { 54static struct sdhci_ops sdhci_hlwd_ops = {
55 .read_l = sdhci_be32bs_readl,
56 .read_w = sdhci_be32bs_readw,
57 .read_b = sdhci_be32bs_readb,
58 .write_l = sdhci_hlwd_writel,
59 .write_w = sdhci_hlwd_writew,
60 .write_b = sdhci_hlwd_writeb,
61};
62
63struct sdhci_pltfm_data sdhci_hlwd_pdata = {
55 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | 64 .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR |
56 SDHCI_QUIRK_32BIT_DMA_SIZE, 65 SDHCI_QUIRK_32BIT_DMA_SIZE,
57 .ops = { 66 .ops = &sdhci_hlwd_ops,
58 .read_l = sdhci_be32bs_readl,
59 .read_w = sdhci_be32bs_readw,
60 .read_b = sdhci_be32bs_readb,
61 .write_l = sdhci_hlwd_writel,
62 .write_w = sdhci_hlwd_writew,
63 .write_b = sdhci_hlwd_writeb,
64 },
65}; 67};
diff --git a/drivers/mmc/host/sdhci-of.h b/drivers/mmc/host/sdhci-of.h
index ad09ad9915d8..5bdb5e7cce61 100644
--- a/drivers/mmc/host/sdhci-of.h
+++ b/drivers/mmc/host/sdhci-of.h
@@ -18,16 +18,7 @@
18 18
19#include <linux/types.h> 19#include <linux/types.h>
20#include "sdhci.h" 20#include "sdhci.h"
21 21#include "sdhci-pltfm.h"
22struct sdhci_of_data {
23 unsigned int quirks;
24 struct sdhci_ops ops;
25};
26
27struct sdhci_of_host {
28 unsigned int clock;
29 u16 xfer_mode_shadow;
30};
31 22
32extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg); 23extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg);
33extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg); 24extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg);
@@ -36,7 +27,7 @@ extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg);
36extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg); 27extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg);
37extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg); 28extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg);
38 29
39extern struct sdhci_of_data sdhci_esdhc; 30extern struct sdhci_pltfm_data sdhci_esdhc_pdata;
40extern struct sdhci_of_data sdhci_hlwd; 31extern struct sdhci_pltfm_data sdhci_hlwd_pdata;
41 32
42#endif /* __SDHCI_OF_H */ 33#endif /* __SDHCI_OF_H */
diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h
index ff4b7eb326fb..3cac4506f8f9 100644
--- a/drivers/mmc/host/sdhci-pltfm.h
+++ b/drivers/mmc/host/sdhci-pltfm.h
@@ -19,6 +19,10 @@
19struct sdhci_pltfm_host { 19struct sdhci_pltfm_host {
20 struct clk *clk; 20 struct clk *clk;
21 void *priv; /* to handle quirks across io-accessor calls */ 21 void *priv; /* to handle quirks across io-accessor calls */
22
23 /* migrate from sdhci_of_host */
24 unsigned int clock;
25 u16 xfer_mode_shadow;
22}; 26};
23 27
24extern struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev, 28extern struct sdhci_host *sdhci_pltfm_init(struct platform_device *pdev,