aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts17
-rw-r--r--arch/arm/boot/dts/r8a7740.dtsi220
-rw-r--r--arch/arm/mach-shmobile/board-armadillo800eva-reference.c3
-rw-r--r--arch/arm/mach-shmobile/r8a7740.h1
-rw-r--r--arch/arm/mach-shmobile/setup-r8a7740.c18
-rw-r--r--include/dt-bindings/clock/r8a7740-clock.h77
6 files changed, 317 insertions, 19 deletions
diff --git a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
index ee9e7d5c97a9..5e646e60f1b3 100644
--- a/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
+++ b/arch/arm/boot/dts/r8a7740-armadillo800eva-reference.dts
@@ -178,6 +178,23 @@
178 }; 178 };
179}; 179};
180 180
181&extal1_clk {
182 clock-frequency = <25000000>;
183};
184&extal2_clk {
185 clock-frequency = <48000000>;
186};
187&fsibck_clk {
188 clock-frequency = <12288000>;
189};
190&cpg_clocks {
191 renesas,mode = <0x05>; /* MD_CK0 | MD_CK2 */
192};
193
194&cmt1 {
195 status = "ok";
196};
197
181&i2c0 { 198&i2c0 {
182 status = "okay"; 199 status = "okay";
183 touchscreen@55 { 200 touchscreen@55 {
diff --git a/arch/arm/boot/dts/r8a7740.dtsi b/arch/arm/boot/dts/r8a7740.dtsi
index bda18fb3d9e5..1067a96c8425 100644
--- a/arch/arm/boot/dts/r8a7740.dtsi
+++ b/arch/arm/boot/dts/r8a7740.dtsi
@@ -10,6 +10,7 @@
10 10
11/include/ "skeleton.dtsi" 11/include/ "skeleton.dtsi"
12 12
13#include <dt-bindings/clock/r8a7740-clock.h>
13#include <dt-bindings/interrupt-controller/irq.h> 14#include <dt-bindings/interrupt-controller/irq.h>
14 15
15/ { 16/ {
@@ -40,6 +41,18 @@
40 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>; 41 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
41 }; 42 };
42 43
44 cmt1: timer@e6138000 {
45 compatible = "renesas,cmt-48";
46 reg = <0xe6138000 0x170>;
47 interrupts = <0 58 IRQ_TYPE_LEVEL_HIGH>;
48 clocks = <&mstp3_clks R8A7740_CLK_CMT1>;
49 clock-names = "fck";
50
51 renesas,channels-mask = <0x3f>;
52
53 status = "disabled";
54 };
55
43 /* irqpin0: IRQ0 - IRQ7 */ 56 /* irqpin0: IRQ0 - IRQ7 */
44 irqpin0: irqpin@e6900000 { 57 irqpin0: irqpin@e6900000 {
45 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin"; 58 compatible = "renesas,intc-irqpin-r8a7740", "renesas,intc-irqpin";
@@ -125,7 +138,7 @@
125 reg = <0xe9a00000 0x800>, 138 reg = <0xe9a00000 0x800>,
126 <0xe9a01800 0x800>; 139 <0xe9a01800 0x800>;
127 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>; 140 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
128 /* clocks = <&mstp3_clks R8A7740_CLK_GETHER>; */ 141 clocks = <&mstp3_clks R8A7740_CLK_GETHER>;
129 phy-mode = "mii"; 142 phy-mode = "mii";
130 #address-cells = <1>; 143 #address-cells = <1>;
131 #size-cells = <0>; 144 #size-cells = <0>;
@@ -141,6 +154,7 @@
141 0 202 IRQ_TYPE_LEVEL_HIGH 154 0 202 IRQ_TYPE_LEVEL_HIGH
142 0 203 IRQ_TYPE_LEVEL_HIGH 155 0 203 IRQ_TYPE_LEVEL_HIGH
143 0 204 IRQ_TYPE_LEVEL_HIGH>; 156 0 204 IRQ_TYPE_LEVEL_HIGH>;
157 clocks = <&mstp1_clks R8A7740_CLK_IIC0>;
144 status = "disabled"; 158 status = "disabled";
145 }; 159 };
146 160
@@ -153,6 +167,7 @@
153 0 71 IRQ_TYPE_LEVEL_HIGH 167 0 71 IRQ_TYPE_LEVEL_HIGH
154 0 72 IRQ_TYPE_LEVEL_HIGH 168 0 72 IRQ_TYPE_LEVEL_HIGH
155 0 73 IRQ_TYPE_LEVEL_HIGH>; 169 0 73 IRQ_TYPE_LEVEL_HIGH>;
170 clocks = <&mstp3_clks R8A7740_CLK_IIC1>;
156 status = "disabled"; 171 status = "disabled";
157 }; 172 };
158 173
@@ -160,6 +175,8 @@
160 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 175 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
161 reg = <0xe6c40000 0x100>; 176 reg = <0xe6c40000 0x100>;
162 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>; 177 interrupts = <0 100 IRQ_TYPE_LEVEL_HIGH>;
178 clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;
179 clock-names = "sci_ick";
163 status = "disabled"; 180 status = "disabled";
164 }; 181 };
165 182
@@ -167,6 +184,8 @@
167 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 184 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
168 reg = <0xe6c50000 0x100>; 185 reg = <0xe6c50000 0x100>;
169 interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>; 186 interrupts = <0 101 IRQ_TYPE_LEVEL_HIGH>;
187 clocks = <&mstp2_clks R8A7740_CLK_SCIFA1>;
188 clock-names = "sci_ick";
170 status = "disabled"; 189 status = "disabled";
171 }; 190 };
172 191
@@ -174,6 +193,8 @@
174 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 193 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
175 reg = <0xe6c60000 0x100>; 194 reg = <0xe6c60000 0x100>;
176 interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>; 195 interrupts = <0 102 IRQ_TYPE_LEVEL_HIGH>;
196 clocks = <&mstp2_clks R8A7740_CLK_SCIFA0>;
197 clock-names = "sci_ick";
177 status = "disabled"; 198 status = "disabled";
178 }; 199 };
179 200
@@ -181,6 +202,8 @@
181 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 202 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
182 reg = <0xe6c70000 0x100>; 203 reg = <0xe6c70000 0x100>;
183 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>; 204 interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>;
205 clocks = <&mstp2_clks R8A7740_CLK_SCIFA3>;
206 clock-names = "sci_ick";
184 status = "disabled"; 207 status = "disabled";
185 }; 208 };
186 209
@@ -188,6 +211,8 @@
188 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 211 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
189 reg = <0xe6c80000 0x100>; 212 reg = <0xe6c80000 0x100>;
190 interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>; 213 interrupts = <0 104 IRQ_TYPE_LEVEL_HIGH>;
214 clocks = <&mstp2_clks R8A7740_CLK_SCIFA4>;
215 clock-names = "sci_ick";
191 status = "disabled"; 216 status = "disabled";
192 }; 217 };
193 218
@@ -195,6 +220,8 @@
195 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 220 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
196 reg = <0xe6cb0000 0x100>; 221 reg = <0xe6cb0000 0x100>;
197 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>; 222 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>;
223 clocks = <&mstp2_clks R8A7740_CLK_SCIFA5>;
224 clock-names = "sci_ick";
198 status = "disabled"; 225 status = "disabled";
199 }; 226 };
200 227
@@ -202,6 +229,8 @@
202 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 229 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
203 reg = <0xe6cc0000 0x100>; 230 reg = <0xe6cc0000 0x100>;
204 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>; 231 interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
232 clocks = <&mstp2_clks R8A7740_CLK_SCIFA6>;
233 clock-names = "sci_ick";
205 status = "disabled"; 234 status = "disabled";
206 }; 235 };
207 236
@@ -209,6 +238,8 @@
209 compatible = "renesas,scifa-r8a7740", "renesas,scifa"; 238 compatible = "renesas,scifa-r8a7740", "renesas,scifa";
210 reg = <0xe6cd0000 0x100>; 239 reg = <0xe6cd0000 0x100>;
211 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>; 240 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&mstp2_clks R8A7740_CLK_SCIFA7>;
242 clock-names = "sci_ick";
212 status = "disabled"; 243 status = "disabled";
213 }; 244 };
214 245
@@ -216,6 +247,8 @@
216 compatible = "renesas,scifb-r8a7740", "renesas,scifb"; 247 compatible = "renesas,scifb-r8a7740", "renesas,scifb";
217 reg = <0xe6c30000 0x100>; 248 reg = <0xe6c30000 0x100>;
218 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>; 249 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
250 clocks = <&mstp2_clks R8A7740_CLK_SCIFB>;
251 clock-names = "sci_ick";
219 status = "disabled"; 252 status = "disabled";
220 }; 253 };
221 254
@@ -239,6 +272,7 @@
239 tpu: pwm@e6600000 { 272 tpu: pwm@e6600000 {
240 compatible = "renesas,tpu-r8a7740", "renesas,tpu"; 273 compatible = "renesas,tpu-r8a7740", "renesas,tpu";
241 reg = <0xe6600000 0x100>; 274 reg = <0xe6600000 0x100>;
275 clocks = <&mstp3_clks R8A7740_CLK_TPU0>;
242 status = "disabled"; 276 status = "disabled";
243 #pwm-cells = <3>; 277 #pwm-cells = <3>;
244 }; 278 };
@@ -248,6 +282,7 @@
248 reg = <0xe6bd0000 0x100>; 282 reg = <0xe6bd0000 0x100>;
249 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH 283 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH
250 0 57 IRQ_TYPE_LEVEL_HIGH>; 284 0 57 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&mstp3_clks R8A7740_CLK_MMC>;
251 status = "disabled"; 286 status = "disabled";
252 }; 287 };
253 288
@@ -257,6 +292,7 @@
257 interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH 292 interrupts = <0 117 IRQ_TYPE_LEVEL_HIGH
258 0 118 IRQ_TYPE_LEVEL_HIGH 293 0 118 IRQ_TYPE_LEVEL_HIGH
259 0 119 IRQ_TYPE_LEVEL_HIGH>; 294 0 119 IRQ_TYPE_LEVEL_HIGH>;
295 clocks = <&mstp3_clks R8A7740_CLK_SDHI0>;
260 cap-sd-highspeed; 296 cap-sd-highspeed;
261 cap-sdio-irq; 297 cap-sdio-irq;
262 status = "disabled"; 298 status = "disabled";
@@ -268,6 +304,7 @@
268 interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH 304 interrupts = <0 121 IRQ_TYPE_LEVEL_HIGH
269 0 122 IRQ_TYPE_LEVEL_HIGH 305 0 122 IRQ_TYPE_LEVEL_HIGH
270 0 123 IRQ_TYPE_LEVEL_HIGH>; 306 0 123 IRQ_TYPE_LEVEL_HIGH>;
307 clocks = <&mstp3_clks R8A7740_CLK_SDHI1>;
271 cap-sd-highspeed; 308 cap-sd-highspeed;
272 cap-sdio-irq; 309 cap-sdio-irq;
273 status = "disabled"; 310 status = "disabled";
@@ -279,6 +316,7 @@
279 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH 316 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH
280 0 126 IRQ_TYPE_LEVEL_HIGH 317 0 126 IRQ_TYPE_LEVEL_HIGH
281 0 127 IRQ_TYPE_LEVEL_HIGH>; 318 0 127 IRQ_TYPE_LEVEL_HIGH>;
319 clocks = <&mstp4_clks R8A7740_CLK_SDHI2>;
282 cap-sd-highspeed; 320 cap-sd-highspeed;
283 cap-sdio-irq; 321 cap-sdio-irq;
284 status = "disabled"; 322 status = "disabled";
@@ -289,6 +327,186 @@
289 compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2"; 327 compatible = "renesas,fsi2-r8a7740", "renesas,sh_fsi2";
290 reg = <0xfe1f0000 0x400>; 328 reg = <0xfe1f0000 0x400>;
291 interrupts = <0 9 0x4>; 329 interrupts = <0 9 0x4>;
330 clocks = <&mstp3_clks R8A7740_CLK_FSI>;
292 status = "disabled"; 331 status = "disabled";
293 }; 332 };
333
334 clocks {
335 #address-cells = <1>;
336 #size-cells = <1>;
337 ranges;
338
339 /* External root clock */
340 extalr_clk: extalr_clk {
341 compatible = "fixed-clock";
342 #clock-cells = <0>;
343 clock-frequency = <32768>;
344 clock-output-names = "extalr";
345 };
346 extal1_clk: extal1_clk {
347 compatible = "fixed-clock";
348 #clock-cells = <0>;
349 clock-frequency = <0>;
350 clock-output-names = "extal1";
351 };
352 extal2_clk: extal2_clk {
353 compatible = "fixed-clock";
354 #clock-cells = <0>;
355 clock-frequency = <0>;
356 clock-output-names = "extal2";
357 };
358 dv_clk: dv_clk {
359 compatible = "fixed-clock";
360 #clock-cells = <0>;
361 clock-frequency = <27000000>;
362 clock-output-names = "dv";
363 };
364 fsiack_clk: fsiack_clk {
365 compatible = "fixed-clock";
366 #clock-cells = <0>;
367 clock-frequency = <0>;
368 clock-output-names = "fsiack";
369 };
370 fsibck_clk: fsibck_clk {
371 compatible = "fixed-clock";
372 #clock-cells = <0>;
373 clock-frequency = <0>;
374 clock-output-names = "fsibck";
375 };
376
377 /* Special CPG clocks */
378 cpg_clocks: cpg_clocks@e6150000 {
379 compatible = "renesas,r8a7740-cpg-clocks";
380 reg = <0xe6150000 0x10000>;
381 clocks = <&extal1_clk>, <&extalr_clk>;
382 #clock-cells = <1>;
383 clock-output-names = "system", "pllc0", "pllc1",
384 "pllc2", "r",
385 "usb24s",
386 "i", "zg", "b", "m1", "hp",
387 "hpp", "usbp", "s", "zb", "m3",
388 "cp";
389 };
390
391 /* Variable factor clocks (DIV6) */
392 sub_clk: sub_clk@e6150080 {
393 compatible = "renesas,r8a7740-div6-clock", "renesas,cpg-div6-clock";
394 reg = <0xe6150080 4>;
395 clocks = <&pllc1_div2_clk>;
396 #clock-cells = <0>;
397 clock-output-names = "sub";
398 };
399
400 /* Fixed factor clocks */
401 pllc1_div2_clk: pllc1_div2_clk {
402 compatible = "fixed-factor-clock";
403 clocks = <&cpg_clocks R8A7740_CLK_PLLC1>;
404 #clock-cells = <0>;
405 clock-div = <2>;
406 clock-mult = <1>;
407 clock-output-names = "pllc1_div2";
408 };
409 extal1_div2_clk: extal1_div2_clk {
410 compatible = "fixed-factor-clock";
411 clocks = <&extal1_clk>;
412 #clock-cells = <0>;
413 clock-div = <2>;
414 clock-mult = <1>;
415 clock-output-names = "extal1_div2";
416 };
417
418 /* Gate clocks */
419 subck_clks: subck_clks@e6150080 {
420 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
421 reg = <0xe6150080 4>;
422 clocks = <&sub_clk>, <&sub_clk>;
423 #clock-cells = <1>;
424 renesas,clock-indices = <
425 R8A7740_CLK_SUBCK R8A7740_CLK_SUBCK2
426 >;
427 clock-output-names =
428 "subck", "subck2";
429 };
430 mstp1_clks: mstp1_clks@e6150134 {
431 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
432 reg = <0xe6150134 4>, <0xe6150038 4>;
433 clocks = <&cpg_clocks R8A7740_CLK_S>,
434 <&cpg_clocks R8A7740_CLK_S>, <&sub_clk>,
435 <&cpg_clocks R8A7740_CLK_B>,
436 <&sub_clk>, <&sub_clk>,
437 <&cpg_clocks R8A7740_CLK_B>;
438 #clock-cells = <1>;
439 renesas,clock-indices = <
440 R8A7740_CLK_CEU21 R8A7740_CLK_CEU20 R8A7740_CLK_TMU0
441 R8A7740_CLK_LCDC1 R8A7740_CLK_IIC0 R8A7740_CLK_TMU1
442 R8A7740_CLK_LCDC0
443 >;
444 clock-output-names =
445 "ceu21", "ceu20", "tmu0", "lcdc1", "iic0",
446 "tmu1", "lcdc0";
447 };
448 mstp2_clks: mstp2_clks@e6150138 {
449 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
450 reg = <0xe6150138 4>, <0xe6150040 4>;
451 clocks = <&sub_clk>, <&sub_clk>,
452 <&cpg_clocks R8A7740_CLK_HP>,
453 <&cpg_clocks R8A7740_CLK_HP>,
454 <&cpg_clocks R8A7740_CLK_HP>,
455 <&cpg_clocks R8A7740_CLK_HP>,
456 <&sub_clk>, <&sub_clk>, <&sub_clk>,
457 <&sub_clk>, <&sub_clk>, <&sub_clk>,
458 <&sub_clk>;
459 #clock-cells = <1>;
460 renesas,clock-indices = <
461 R8A7740_CLK_SCIFA6 R8A7740_CLK_SCIFA7
462 R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2
463 R8A7740_CLK_DMAC3 R8A7740_CLK_USBDMAC
464 R8A7740_CLK_SCIFA5 R8A7740_CLK_SCIFB
465 R8A7740_CLK_SCIFA0 R8A7740_CLK_SCIFA1
466 R8A7740_CLK_SCIFA2 R8A7740_CLK_SCIFA3
467 R8A7740_CLK_SCIFA4
468 >;
469 clock-output-names =
470 "scifa6", "scifa7", "dmac1", "dmac2", "dmac3",
471 "usbdmac", "scifa5", "scifb", "scifa0", "scifa1",
472 "scifa2", "scifa3", "scifa4";
473 };
474 mstp3_clks: mstp3_clks@e615013c {
475 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
476 reg = <0xe615013c 4>, <0xe6150048 4>;
477 clocks = <&cpg_clocks R8A7740_CLK_R>,
478 <&cpg_clocks R8A7740_CLK_HP>,
479 <&sub_clk>,
480 <&cpg_clocks R8A7740_CLK_HP>,
481 <&cpg_clocks R8A7740_CLK_HP>,
482 <&cpg_clocks R8A7740_CLK_HP>,
483 <&cpg_clocks R8A7740_CLK_HP>,
484 <&cpg_clocks R8A7740_CLK_HP>,
485 <&cpg_clocks R8A7740_CLK_HP>;
486 #clock-cells = <1>;
487 renesas,clock-indices = <
488 R8A7740_CLK_CMT1 R8A7740_CLK_FSI R8A7740_CLK_IIC1
489 R8A7740_CLK_USBF R8A7740_CLK_SDHI0 R8A7740_CLK_SDHI1
490 R8A7740_CLK_MMC R8A7740_CLK_GETHER R8A7740_CLK_TPU0
491 >;
492 clock-output-names =
493 "cmt1", "fsi", "iic1", "usbf", "sdhi0", "sdhi1",
494 "mmc", "gether", "tpu0";
495 };
496 mstp4_clks: mstp4_clks@e6150140 {
497 compatible = "renesas,r8a7740-mstp-clocks", "renesas,cpg-mstp-clocks";
498 reg = <0xe6150140 4>, <0xe615004c 4>;
499 clocks = <&cpg_clocks R8A7740_CLK_HP>,
500 <&cpg_clocks R8A7740_CLK_HP>,
501 <&cpg_clocks R8A7740_CLK_HP>,
502 <&cpg_clocks R8A7740_CLK_HP>;
503 #clock-cells = <1>;
504 renesas,clock-indices = <
505 R8A7740_CLK_USBH R8A7740_CLK_SDHI2
506 R8A7740_CLK_USBFUNC R8A7740_CLK_USBPHY
507 >;
508 clock-output-names =
509 "usbhost", "sdhi2", "usbfunc", "usphy";
510 };
511 };
294}; 512};
diff --git a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
index 84bc6cb6d5aa..f06e1f336dfb 100644
--- a/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
+++ b/arch/arm/mach-shmobile/board-armadillo800eva-reference.c
@@ -24,6 +24,7 @@
24#include <linux/kernel.h> 24#include <linux/kernel.h>
25#include <linux/gpio.h> 25#include <linux/gpio.h>
26#include <linux/io.h> 26#include <linux/io.h>
27#include <linux/of_platform.h>
27 28
28#include <asm/mach/arch.h> 29#include <asm/mach/arch.h>
29#include <asm/hardware/cache-l2x0.h> 30#include <asm/hardware/cache-l2x0.h>
@@ -170,7 +171,7 @@ static void __init eva_init(void)
170 l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff); 171 l2x0_init(IOMEM(0xf0002000), 0x00400000, 0xc20f0fff);
171#endif 172#endif
172 173
173 r8a7740_add_standard_devices_dt(); 174 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
174 175
175 r8a7740_pm_init(); 176 r8a7740_pm_init();
176} 177}
diff --git a/arch/arm/mach-shmobile/r8a7740.h b/arch/arm/mach-shmobile/r8a7740.h
index 1d1a5fd78b6b..3352fb8650ba 100644
--- a/arch/arm/mach-shmobile/r8a7740.h
+++ b/arch/arm/mach-shmobile/r8a7740.h
@@ -49,7 +49,6 @@ extern void r8a7740_init_irq_of(void);
49extern void r8a7740_map_io(void); 49extern void r8a7740_map_io(void);
50extern void r8a7740_add_early_devices(void); 50extern void r8a7740_add_early_devices(void);
51extern void r8a7740_add_standard_devices(void); 51extern void r8a7740_add_standard_devices(void);
52extern void r8a7740_add_standard_devices_dt(void);
53extern void r8a7740_clock_init(u8 md_ck); 52extern void r8a7740_clock_init(u8 md_ck);
54extern void r8a7740_pinmux_init(void); 53extern void r8a7740_pinmux_init(void);
55extern void r8a7740_pm_init(void); 54extern void r8a7740_pm_init(void);
diff --git a/arch/arm/mach-shmobile/setup-r8a7740.c b/arch/arm/mach-shmobile/setup-r8a7740.c
index 3d5eacaba3e6..8fe270d874c2 100644
--- a/arch/arm/mach-shmobile/setup-r8a7740.c
+++ b/arch/arm/mach-shmobile/setup-r8a7740.c
@@ -311,10 +311,6 @@ static struct platform_device ipmmu_device = {
311 .num_resources = ARRAY_SIZE(ipmmu_resources), 311 .num_resources = ARRAY_SIZE(ipmmu_resources),
312}; 312};
313 313
314static struct platform_device *r8a7740_devices_dt[] __initdata = {
315 &cmt1_device,
316};
317
318static struct platform_device *r8a7740_early_devices[] __initdata = { 314static struct platform_device *r8a7740_early_devices[] __initdata = {
319 &scif0_device, 315 &scif0_device,
320 &scif1_device, 316 &scif1_device,
@@ -331,6 +327,7 @@ static struct platform_device *r8a7740_early_devices[] __initdata = {
331 &irqpin3_device, 327 &irqpin3_device,
332 &tmu0_device, 328 &tmu0_device,
333 &ipmmu_device, 329 &ipmmu_device,
330 &cmt1_device,
334}; 331};
335 332
336/* DMA */ 333/* DMA */
@@ -756,8 +753,6 @@ void __init r8a7740_add_standard_devices(void)
756 /* add devices */ 753 /* add devices */
757 platform_add_devices(r8a7740_early_devices, 754 platform_add_devices(r8a7740_early_devices,
758 ARRAY_SIZE(r8a7740_early_devices)); 755 ARRAY_SIZE(r8a7740_early_devices));
759 platform_add_devices(r8a7740_devices_dt,
760 ARRAY_SIZE(r8a7740_devices_dt));
761 platform_add_devices(r8a7740_late_devices, 756 platform_add_devices(r8a7740_late_devices,
762 ARRAY_SIZE(r8a7740_late_devices)); 757 ARRAY_SIZE(r8a7740_late_devices));
763 758
@@ -779,8 +774,6 @@ void __init r8a7740_add_early_devices(void)
779{ 774{
780 early_platform_add_devices(r8a7740_early_devices, 775 early_platform_add_devices(r8a7740_early_devices,
781 ARRAY_SIZE(r8a7740_early_devices)); 776 ARRAY_SIZE(r8a7740_early_devices));
782 early_platform_add_devices(r8a7740_devices_dt,
783 ARRAY_SIZE(r8a7740_devices_dt));
784 777
785 /* setup early console here as well */ 778 /* setup early console here as well */
786 shmobile_setup_console(); 779 shmobile_setup_console();
@@ -788,13 +781,6 @@ void __init r8a7740_add_early_devices(void)
788 781
789#ifdef CONFIG_USE_OF 782#ifdef CONFIG_USE_OF
790 783
791void __init r8a7740_add_standard_devices_dt(void)
792{
793 platform_add_devices(r8a7740_devices_dt,
794 ARRAY_SIZE(r8a7740_devices_dt));
795 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
796}
797
798void __init r8a7740_init_irq_of(void) 784void __init r8a7740_init_irq_of(void)
799{ 785{
800 void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10); 786 void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);
@@ -828,7 +814,7 @@ void __init r8a7740_init_irq_of(void)
828static void __init r8a7740_generic_init(void) 814static void __init r8a7740_generic_init(void)
829{ 815{
830 r8a7740_clock_init(0); 816 r8a7740_clock_init(0);
831 r8a7740_add_standard_devices_dt(); 817 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
832} 818}
833 819
834static const char *r8a7740_boards_compat_dt[] __initdata = { 820static const char *r8a7740_boards_compat_dt[] __initdata = {
diff --git a/include/dt-bindings/clock/r8a7740-clock.h b/include/dt-bindings/clock/r8a7740-clock.h
new file mode 100644
index 000000000000..f6b4b0fe7a43
--- /dev/null
+++ b/include/dt-bindings/clock/r8a7740-clock.h
@@ -0,0 +1,77 @@
1/*
2 * Copyright 2014 Ulrich Hecht
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 */
9
10#ifndef __DT_BINDINGS_CLOCK_R8A7740_H__
11#define __DT_BINDINGS_CLOCK_R8A7740_H__
12
13/* CPG */
14#define R8A7740_CLK_SYSTEM 0
15#define R8A7740_CLK_PLLC0 1
16#define R8A7740_CLK_PLLC1 2
17#define R8A7740_CLK_PLLC2 3
18#define R8A7740_CLK_R 4
19#define R8A7740_CLK_USB24S 5
20#define R8A7740_CLK_I 6
21#define R8A7740_CLK_ZG 7
22#define R8A7740_CLK_B 8
23#define R8A7740_CLK_M1 9
24#define R8A7740_CLK_HP 10
25#define R8A7740_CLK_HPP 11
26#define R8A7740_CLK_USBP 12
27#define R8A7740_CLK_S 13
28#define R8A7740_CLK_ZB 14
29#define R8A7740_CLK_M3 15
30#define R8A7740_CLK_CP 16
31
32/* MSTP1 */
33#define R8A7740_CLK_CEU21 28
34#define R8A7740_CLK_CEU20 27
35#define R8A7740_CLK_TMU0 25
36#define R8A7740_CLK_LCDC1 17
37#define R8A7740_CLK_IIC0 16
38#define R8A7740_CLK_TMU1 11
39#define R8A7740_CLK_LCDC0 0
40
41/* MSTP2 */
42#define R8A7740_CLK_SCIFA6 30
43#define R8A7740_CLK_SCIFA7 22
44#define R8A7740_CLK_DMAC1 18
45#define R8A7740_CLK_DMAC2 17
46#define R8A7740_CLK_DMAC3 16
47#define R8A7740_CLK_USBDMAC 14
48#define R8A7740_CLK_SCIFA5 7
49#define R8A7740_CLK_SCIFB 6
50#define R8A7740_CLK_SCIFA0 4
51#define R8A7740_CLK_SCIFA1 3
52#define R8A7740_CLK_SCIFA2 2
53#define R8A7740_CLK_SCIFA3 1
54#define R8A7740_CLK_SCIFA4 0
55
56/* MSTP3 */
57#define R8A7740_CLK_CMT1 29
58#define R8A7740_CLK_FSI 28
59#define R8A7740_CLK_IIC1 23
60#define R8A7740_CLK_USBF 20
61#define R8A7740_CLK_SDHI0 14
62#define R8A7740_CLK_SDHI1 13
63#define R8A7740_CLK_MMC 12
64#define R8A7740_CLK_GETHER 9
65#define R8A7740_CLK_TPU0 4
66
67/* MSTP4 */
68#define R8A7740_CLK_USBH 16
69#define R8A7740_CLK_SDHI2 15
70#define R8A7740_CLK_USBFUNC 7
71#define R8A7740_CLK_USBPHY 6
72
73/* SUBCK* */
74#define R8A7740_CLK_SUBCK 9
75#define R8A7740_CLK_SUBCK2 10
76
77#endif /* __DT_BINDINGS_CLOCK_R8A7740_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-21 17:48:35 -0500