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-rw-r--r--arch/arm/mach-omap2/prm2xxx.c14
-rw-r--r--arch/arm/mach-omap2/prm2xxx.h2
-rw-r--r--arch/arm/mach-omap2/prm3xxx.c15
-rw-r--r--arch/arm/mach-omap2/prm3xxx.h2
4 files changed, 33 insertions, 0 deletions
diff --git a/arch/arm/mach-omap2/prm2xxx.c b/arch/arm/mach-omap2/prm2xxx.c
index e2860f9c111d..1f777bf2bc8f 100644
--- a/arch/arm/mach-omap2/prm2xxx.c
+++ b/arch/arm/mach-omap2/prm2xxx.c
@@ -69,6 +69,20 @@ static u32 omap2xxx_prm_read_reset_sources(void)
69 return r; 69 return r;
70} 70}
71 71
72/**
73 * omap2xxx_prm_dpll_reset - use DPLL reset to reboot the OMAP SoC
74 *
75 * Set the DPLL reset bit, which should reboot the SoC. This is the
76 * recommended way to restart the SoC. No return value.
77 */
78void omap2xxx_prm_dpll_reset(void)
79{
80 omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, WKUP_MOD,
81 OMAP2_RM_RSTCTRL);
82 /* OCP barrier */
83 omap2_prm_read_mod_reg(WKUP_MOD, OMAP2_RM_RSTCTRL);
84}
85
72int omap2xxx_clkdm_sleep(struct clockdomain *clkdm) 86int omap2xxx_clkdm_sleep(struct clockdomain *clkdm)
73{ 87{
74 omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK, 88 omap2_prm_set_mod_reg_bits(OMAP24XX_FORCESTATE_MASK,
diff --git a/arch/arm/mach-omap2/prm2xxx.h b/arch/arm/mach-omap2/prm2xxx.h
index 1d97112524f1..fe8a14f190ab 100644
--- a/arch/arm/mach-omap2/prm2xxx.h
+++ b/arch/arm/mach-omap2/prm2xxx.h
@@ -124,6 +124,8 @@
124extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm); 124extern int omap2xxx_clkdm_sleep(struct clockdomain *clkdm);
125extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm); 125extern int omap2xxx_clkdm_wakeup(struct clockdomain *clkdm);
126 126
127extern void omap2xxx_prm_dpll_reset(void);
128
127extern int __init prm2xxx_init(void); 129extern int __init prm2xxx_init(void);
128extern int __exit prm2xxx_exit(void); 130extern int __exit prm2xxx_exit(void);
129 131
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index 1fea656b2ca8..5435673ac9ce 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -123,6 +123,21 @@ u32 omap3_prm_vcvp_rmw(u32 mask, u32 bits, u8 offset)
123} 123}
124 124
125/** 125/**
126 * omap3xxx_prm_dpll3_reset - use DPLL3 reset to reboot the OMAP SoC
127 *
128 * Set the DPLL3 reset bit, which should reboot the SoC. This is the
129 * recommended way to restart the SoC, considering Errata i520. No
130 * return value.
131 */
132void omap3xxx_prm_dpll3_reset(void)
133{
134 omap2_prm_set_mod_reg_bits(OMAP_RST_DPLL3_MASK, OMAP3430_GR_MOD,
135 OMAP2_RM_RSTCTRL);
136 /* OCP barrier */
137 omap2_prm_read_mod_reg(OMAP3430_GR_MOD, OMAP2_RM_RSTCTRL);
138}
139
140/**
126 * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events 141 * omap3xxx_prm_read_pending_irqs - read pending PRM MPU IRQs into @events
127 * @events: ptr to a u32, preallocated by caller 142 * @events: ptr to a u32, preallocated by caller
128 * 143 *
diff --git a/arch/arm/mach-omap2/prm3xxx.h b/arch/arm/mach-omap2/prm3xxx.h
index a3c28a875410..10cd41a8129e 100644
--- a/arch/arm/mach-omap2/prm3xxx.h
+++ b/arch/arm/mach-omap2/prm3xxx.h
@@ -152,6 +152,8 @@ extern void omap3xxx_prm_ocp_barrier(void);
152extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask); 152extern void omap3xxx_prm_save_and_clear_irqen(u32 *saved_mask);
153extern void omap3xxx_prm_restore_irqen(u32 *saved_mask); 153extern void omap3xxx_prm_restore_irqen(u32 *saved_mask);
154 154
155extern void omap3xxx_prm_dpll3_reset(void);
156
155extern u32 omap3xxx_prm_get_reset_sources(void); 157extern u32 omap3xxx_prm_get_reset_sources(void);
156 158
157#endif /* __ASSEMBLER */ 159#endif /* __ASSEMBLER */