diff options
-rw-r--r-- | drivers/char/agp/intel-gtt.c | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/drivers/char/agp/intel-gtt.c b/drivers/char/agp/intel-gtt.c index 6b6760ea2435..fd3e94f8ab51 100644 --- a/drivers/char/agp/intel-gtt.c +++ b/drivers/char/agp/intel-gtt.c | |||
@@ -95,7 +95,7 @@ static struct _intel_private { | |||
95 | u8 __iomem *registers; | 95 | u8 __iomem *registers; |
96 | phys_addr_t gtt_bus_addr; | 96 | phys_addr_t gtt_bus_addr; |
97 | phys_addr_t gma_bus_addr; | 97 | phys_addr_t gma_bus_addr; |
98 | phys_addr_t pte_bus_addr; | 98 | u32 PGETBL_save; |
99 | u32 __iomem *gtt; /* I915G */ | 99 | u32 __iomem *gtt; /* I915G */ |
100 | int num_dcache_entries; | 100 | int num_dcache_entries; |
101 | union { | 101 | union { |
@@ -755,6 +755,11 @@ static int intel_gtt_init(void) | |||
755 | intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries(); | 755 | intel_private.base.gtt_mappable_entries = intel_gtt_mappable_entries(); |
756 | intel_private.base.gtt_total_entries = intel_gtt_total_entries(); | 756 | intel_private.base.gtt_total_entries = intel_gtt_total_entries(); |
757 | 757 | ||
758 | /* save the PGETBL reg for resume */ | ||
759 | intel_private.PGETBL_save = | ||
760 | readl(intel_private.registers+I810_PGETBL_CTL) | ||
761 | & ~I810_PGETBL_ENABLED; | ||
762 | |||
758 | dev_info(&intel_private.bridge_dev->dev, | 763 | dev_info(&intel_private.bridge_dev->dev, |
759 | "detected gtt size: %dK total, %dK mappable\n", | 764 | "detected gtt size: %dK total, %dK mappable\n", |
760 | intel_private.base.gtt_total_entries * 4, | 765 | intel_private.base.gtt_total_entries * 4, |
@@ -891,7 +896,7 @@ static void intel_enable_gtt(void) | |||
891 | gmch_ctrl |= I830_GMCH_ENABLED; | 896 | gmch_ctrl |= I830_GMCH_ENABLED; |
892 | pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl); | 897 | pci_write_config_word(intel_private.bridge_dev, I830_GMCH_CTRL, gmch_ctrl); |
893 | 898 | ||
894 | writel(intel_private.pte_bus_addr|I810_PGETBL_ENABLED, | 899 | writel(intel_private.PGETBL_save|I810_PGETBL_ENABLED, |
895 | intel_private.registers+I810_PGETBL_CTL); | 900 | intel_private.registers+I810_PGETBL_CTL); |
896 | readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ | 901 | readl(intel_private.registers+I810_PGETBL_CTL); /* PCI Posting. */ |
897 | } | 902 | } |
@@ -908,8 +913,6 @@ static int i830_setup(void) | |||
908 | return -ENOMEM; | 913 | return -ENOMEM; |
909 | 914 | ||
910 | intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; | 915 | intel_private.gtt_bus_addr = reg_addr + I810_PTE_BASE; |
911 | intel_private.pte_bus_addr = | ||
912 | readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; | ||
913 | 916 | ||
914 | intel_i830_setup_flush(); | 917 | intel_i830_setup_flush(); |
915 | 918 | ||
@@ -1265,9 +1268,6 @@ static int i9xx_setup(void) | |||
1265 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; | 1268 | intel_private.gtt_bus_addr = reg_addr + gtt_offset; |
1266 | } | 1269 | } |
1267 | 1270 | ||
1268 | intel_private.pte_bus_addr = | ||
1269 | readl(intel_private.registers+I810_PGETBL_CTL) & 0xfffff000; | ||
1270 | |||
1271 | intel_i9xx_setup_flush(); | 1271 | intel_i9xx_setup_flush(); |
1272 | 1272 | ||
1273 | return 0; | 1273 | return 0; |