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-rw-r--r--Documentation/devicetree/bindings/timer/efm32,timer.txt23
-rw-r--r--arch/Kconfig12
-rw-r--r--arch/arm/Kconfig1
-rw-r--r--arch/arm/boot/dts/zynq-7000.dtsi8
-rw-r--r--arch/arm/include/asm/arch_timer.h36
-rw-r--r--arch/arm/include/uapi/asm/hwcap.h1
-rw-r--r--arch/arm/kernel/arch_timer.c14
-rw-r--r--arch/arm/kernel/setup.c1
-rw-r--r--arch/arm/mach-msm/timer.c1
-rw-r--r--arch/arm/mach-zynq/Kconfig1
-rw-r--r--arch/arm64/Kconfig1
-rw-r--r--arch/arm64/include/asm/arch_timer.h42
-rw-r--r--arch/arm64/include/asm/hwcap.h11
-rw-r--r--arch/arm64/include/uapi/asm/hwcap.h1
-rw-r--r--arch/arm64/kernel/setup.c11
-rw-r--r--arch/arm64/kernel/time.c10
-rw-r--r--arch/x86/kernel/rtc.c8
-rw-r--r--drivers/clocksource/Kconfig24
-rw-r--r--drivers/clocksource/Makefile1
-rw-r--r--drivers/clocksource/arm_arch_timer.c55
-rw-r--r--drivers/clocksource/arm_global_timer.c3
-rw-r--r--drivers/clocksource/bcm2835_timer.c4
-rw-r--r--drivers/clocksource/clksrc-dbx500-prcmu.c5
-rw-r--r--drivers/clocksource/clksrc-of.c1
-rw-r--r--drivers/clocksource/dw_apb_timer_of.c16
-rw-r--r--drivers/clocksource/em_sti.c4
-rw-r--r--drivers/clocksource/mxs_timer.c4
-rw-r--r--drivers/clocksource/nomadik-mtu.c4
-rw-r--r--drivers/clocksource/samsung_pwm_timer.c4
-rw-r--r--drivers/clocksource/sun4i_timer.c12
-rw-r--r--drivers/clocksource/tcb_clksrc.c61
-rw-r--r--drivers/clocksource/tegra20_timer.c8
-rw-r--r--drivers/clocksource/time-armada-370-xp.c4
-rw-r--r--drivers/clocksource/time-efm32.c275
-rw-r--r--drivers/clocksource/timer-prima2.c6
-rw-r--r--drivers/clocksource/vf_pit_timer.c4
-rw-r--r--drivers/clocksource/vt8500_timer.c2
-rw-r--r--drivers/rtc/interface.c13
-rw-r--r--drivers/rtc/rtc-pl031.c3
-rw-r--r--include/clocksource/arm_arch_timer.h10
-rw-r--r--include/linux/clockchips.h1
-rw-r--r--include/linux/clocksource.h2
-rw-r--r--include/linux/sched_clock.h4
-rw-r--r--init/Kconfig3
-rw-r--r--kernel/time/Kconfig2
-rw-r--r--kernel/time/alarmtimer.c4
-rw-r--r--kernel/time/clockevents.c2
-rw-r--r--kernel/time/clocksource.c52
-rw-r--r--kernel/time/ntp.c3
-rw-r--r--kernel/time/sched_clock.c114
-rw-r--r--kernel/time/tick-broadcast.c1
-rw-r--r--kernel/time/tick-internal.h2
-rw-r--r--kernel/time/timekeeping.c3
-rw-r--r--kernel/time/timer_stats.c8
54 files changed, 717 insertions, 189 deletions
diff --git a/Documentation/devicetree/bindings/timer/efm32,timer.txt b/Documentation/devicetree/bindings/timer/efm32,timer.txt
new file mode 100644
index 000000000000..97a568f696c9
--- /dev/null
+++ b/Documentation/devicetree/bindings/timer/efm32,timer.txt
@@ -0,0 +1,23 @@
1* EFM32 timer hardware
2
3The efm32 Giant Gecko SoCs come with four 16 bit timers. Two counters can be
4connected to form a 32 bit counter. Each timer has three Compare/Capture
5channels and can be used as PWM or Quadrature Decoder. Available clock sources
6are the cpu's HFPERCLK (with a 10-bit prescaler) or an external pin.
7
8Required properties:
9- compatible : Should be efm32,timer
10- reg : Address and length of the register set
11- clocks : Should contain a reference to the HFPERCLK
12
13Optional properties:
14- interrupts : Reference to the timer interrupt
15
16Example:
17
18timer@40010c00 {
19 compatible = "efm32,timer";
20 reg = <0x40010c00 0x400>;
21 interrupts = <14>;
22 clocks = <&cmu clk_HFPERCLKTIMER3>;
23};
diff --git a/arch/Kconfig b/arch/Kconfig
index ad95133f8fae..ded747c7b74c 100644
--- a/arch/Kconfig
+++ b/arch/Kconfig
@@ -353,6 +353,18 @@ config HAVE_CONTEXT_TRACKING
353config HAVE_VIRT_CPU_ACCOUNTING 353config HAVE_VIRT_CPU_ACCOUNTING
354 bool 354 bool
355 355
356config HAVE_VIRT_CPU_ACCOUNTING_GEN
357 bool
358 default y if 64BIT
359 help
360 With VIRT_CPU_ACCOUNTING_GEN, cputime_t becomes 64-bit.
361 Before enabling this option, arch code must be audited
362 to ensure there are no races in concurrent read/write of
363 cputime_t. For example, reading/writing 64-bit cputime_t on
364 some 32-bit arches may require multiple accesses, so proper
365 locking is needed to protect against concurrent accesses.
366
367
356config HAVE_IRQ_TIME_ACCOUNTING 368config HAVE_IRQ_TIME_ACCOUNTING
357 bool 369 bool
358 help 370 help
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 04163fece49f..aa8300333bc5 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -54,6 +54,7 @@ config ARM
54 select HAVE_REGS_AND_STACK_ACCESS_API 54 select HAVE_REGS_AND_STACK_ACCESS_API
55 select HAVE_SYSCALL_TRACEPOINTS 55 select HAVE_SYSCALL_TRACEPOINTS
56 select HAVE_UID16 56 select HAVE_UID16
57 select HAVE_VIRT_CPU_ACCOUNTING_GEN
57 select IRQ_FORCED_THREADING 58 select IRQ_FORCED_THREADING
58 select KTIME_SCALAR 59 select KTIME_SCALAR
59 select MODULES_USE_ELF_REL 60 select MODULES_USE_ELF_REL
diff --git a/arch/arm/boot/dts/zynq-7000.dtsi b/arch/arm/boot/dts/zynq-7000.dtsi
index e32b92b949d2..e7f73b2e4550 100644
--- a/arch/arm/boot/dts/zynq-7000.dtsi
+++ b/arch/arm/boot/dts/zynq-7000.dtsi
@@ -92,6 +92,14 @@
92 }; 92 };
93 }; 93 };
94 94
95 global_timer: timer@f8f00200 {
96 compatible = "arm,cortex-a9-global-timer";
97 reg = <0xf8f00200 0x20>;
98 interrupts = <1 11 0x301>;
99 interrupt-parent = <&intc>;
100 clocks = <&clkc 4>;
101 };
102
95 ttc0: ttc0@f8001000 { 103 ttc0: ttc0@f8001000 {
96 interrupt-parent = <&intc>; 104 interrupt-parent = <&intc>;
97 interrupts = < 0 10 4 0 11 4 0 12 4 >; 105 interrupts = < 0 10 4 0 11 4 0 12 4 >;
diff --git a/arch/arm/include/asm/arch_timer.h b/arch/arm/include/asm/arch_timer.h
index 5665134bfa3e..0704e0cf5571 100644
--- a/arch/arm/include/asm/arch_timer.h
+++ b/arch/arm/include/asm/arch_timer.h
@@ -87,17 +87,43 @@ static inline u64 arch_counter_get_cntvct(void)
87 return cval; 87 return cval;
88} 88}
89 89
90static inline void arch_counter_set_user_access(void) 90static inline u32 arch_timer_get_cntkctl(void)
91{ 91{
92 u32 cntkctl; 92 u32 cntkctl;
93
94 asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl)); 93 asm volatile("mrc p15, 0, %0, c14, c1, 0" : "=r" (cntkctl));
94 return cntkctl;
95}
95 96
96 /* disable user access to everything */ 97static inline void arch_timer_set_cntkctl(u32 cntkctl)
97 cntkctl &= ~((3 << 8) | (7 << 0)); 98{
98
99 asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl)); 99 asm volatile("mcr p15, 0, %0, c14, c1, 0" : : "r" (cntkctl));
100} 100}
101
102static inline void arch_counter_set_user_access(void)
103{
104 u32 cntkctl = arch_timer_get_cntkctl();
105
106 /* Disable user access to both physical/virtual counters/timers */
107 /* Also disable virtual event stream */
108 cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
109 | ARCH_TIMER_USR_VT_ACCESS_EN
110 | ARCH_TIMER_VIRT_EVT_EN
111 | ARCH_TIMER_USR_VCT_ACCESS_EN
112 | ARCH_TIMER_USR_PCT_ACCESS_EN);
113 arch_timer_set_cntkctl(cntkctl);
114}
115
116static inline void arch_timer_evtstrm_enable(int divider)
117{
118 u32 cntkctl = arch_timer_get_cntkctl();
119 cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;
120 /* Set the divider and enable virtual event stream */
121 cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)
122 | ARCH_TIMER_VIRT_EVT_EN;
123 arch_timer_set_cntkctl(cntkctl);
124 elf_hwcap |= HWCAP_EVTSTRM;
125}
126
101#endif 127#endif
102 128
103#endif 129#endif
diff --git a/arch/arm/include/uapi/asm/hwcap.h b/arch/arm/include/uapi/asm/hwcap.h
index 6d34d080372a..7dcc10d67253 100644
--- a/arch/arm/include/uapi/asm/hwcap.h
+++ b/arch/arm/include/uapi/asm/hwcap.h
@@ -26,5 +26,6 @@
26#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */ 26#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
27#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT) 27#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
28#define HWCAP_LPAE (1 << 20) 28#define HWCAP_LPAE (1 << 20)
29#define HWCAP_EVTSTRM (1 << 21)
29 30
30#endif /* _UAPI__ASMARM_HWCAP_H */ 31#endif /* _UAPI__ASMARM_HWCAP_H */
diff --git a/arch/arm/kernel/arch_timer.c b/arch/arm/kernel/arch_timer.c
index 221f07b11ccb..1791f12c180b 100644
--- a/arch/arm/kernel/arch_timer.c
+++ b/arch/arm/kernel/arch_timer.c
@@ -11,7 +11,6 @@
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/errno.h> 13#include <linux/errno.h>
14#include <linux/sched_clock.h>
15 14
16#include <asm/delay.h> 15#include <asm/delay.h>
17 16
@@ -22,13 +21,6 @@ static unsigned long arch_timer_read_counter_long(void)
22 return arch_timer_read_counter(); 21 return arch_timer_read_counter();
23} 22}
24 23
25static u32 sched_clock_mult __read_mostly;
26
27static unsigned long long notrace arch_timer_sched_clock(void)
28{
29 return arch_timer_read_counter() * sched_clock_mult;
30}
31
32static struct delay_timer arch_delay_timer; 24static struct delay_timer arch_delay_timer;
33 25
34static void __init arch_timer_delay_timer_register(void) 26static void __init arch_timer_delay_timer_register(void)
@@ -48,11 +40,5 @@ int __init arch_timer_arch_init(void)
48 40
49 arch_timer_delay_timer_register(); 41 arch_timer_delay_timer_register();
50 42
51 /* Cache the sched_clock multiplier to save a divide in the hot path. */
52 sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
53 sched_clock_func = arch_timer_sched_clock;
54 pr_info("sched_clock: ARM arch timer >56 bits at %ukHz, resolution %uns\n",
55 arch_timer_rate / 1000, sched_clock_mult);
56
57 return 0; 43 return 0;
58} 44}
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index 0e1e2b3afa45..5d65438685d8 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -975,6 +975,7 @@ static const char *hwcap_str[] = {
975 "idivt", 975 "idivt",
976 "vfpd32", 976 "vfpd32",
977 "lpae", 977 "lpae",
978 "evtstrm",
978 NULL 979 NULL
979}; 980};
980 981
diff --git a/arch/arm/mach-msm/timer.c b/arch/arm/mach-msm/timer.c
index 696fb73296d0..1e9c3383daba 100644
--- a/arch/arm/mach-msm/timer.c
+++ b/arch/arm/mach-msm/timer.c
@@ -274,7 +274,6 @@ static void __init msm_dt_timer_init(struct device_node *np)
274 pr_err("Unknown frequency\n"); 274 pr_err("Unknown frequency\n");
275 return; 275 return;
276 } 276 }
277 of_node_put(np);
278 277
279 event_base = base + 0x4; 278 event_base = base + 0x4;
280 sts_base = base + 0x88; 279 sts_base = base + 0x88;
diff --git a/arch/arm/mach-zynq/Kconfig b/arch/arm/mach-zynq/Kconfig
index 04f8a4a6e755..6b04260aa142 100644
--- a/arch/arm/mach-zynq/Kconfig
+++ b/arch/arm/mach-zynq/Kconfig
@@ -13,5 +13,6 @@ config ARCH_ZYNQ
13 select HAVE_SMP 13 select HAVE_SMP
14 select SPARSE_IRQ 14 select SPARSE_IRQ
15 select CADENCE_TTC_TIMER 15 select CADENCE_TTC_TIMER
16 select ARM_GLOBAL_TIMER
16 help 17 help
17 Support for Xilinx Zynq ARM Cortex A9 Platform 18 Support for Xilinx Zynq ARM Cortex A9 Platform
diff --git a/arch/arm64/Kconfig b/arch/arm64/Kconfig
index ce6ae9497492..bb0bf1bfc05d 100644
--- a/arch/arm64/Kconfig
+++ b/arch/arm64/Kconfig
@@ -15,6 +15,7 @@ config ARM64
15 select GENERIC_IOMAP 15 select GENERIC_IOMAP
16 select GENERIC_IRQ_PROBE 16 select GENERIC_IRQ_PROBE
17 select GENERIC_IRQ_SHOW 17 select GENERIC_IRQ_SHOW
18 select GENERIC_SCHED_CLOCK
18 select GENERIC_SMP_IDLE_THREAD 19 select GENERIC_SMP_IDLE_THREAD
19 select GENERIC_TIME_VSYSCALL 20 select GENERIC_TIME_VSYSCALL
20 select HARDIRQS_SW_RESEND 21 select HARDIRQS_SW_RESEND
diff --git a/arch/arm64/include/asm/arch_timer.h b/arch/arm64/include/asm/arch_timer.h
index c9f1d2816c2b..9400596a0f39 100644
--- a/arch/arm64/include/asm/arch_timer.h
+++ b/arch/arm64/include/asm/arch_timer.h
@@ -92,19 +92,49 @@ static inline u32 arch_timer_get_cntfrq(void)
92 return val; 92 return val;
93} 93}
94 94
95static inline void arch_counter_set_user_access(void) 95static inline u32 arch_timer_get_cntkctl(void)
96{ 96{
97 u32 cntkctl; 97 u32 cntkctl;
98
99 /* Disable user access to the timers and the physical counter. */
100 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl)); 98 asm volatile("mrs %0, cntkctl_el1" : "=r" (cntkctl));
101 cntkctl &= ~((3 << 8) | (1 << 0)); 99 return cntkctl;
100}
102 101
103 /* Enable user access to the virtual counter and frequency. */ 102static inline void arch_timer_set_cntkctl(u32 cntkctl)
104 cntkctl |= (1 << 1); 103{
105 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl)); 104 asm volatile("msr cntkctl_el1, %0" : : "r" (cntkctl));
106} 105}
107 106
107static inline void arch_counter_set_user_access(void)
108{
109 u32 cntkctl = arch_timer_get_cntkctl();
110
111 /* Disable user access to the timers and the physical counter */
112 /* Also disable virtual event stream */
113 cntkctl &= ~(ARCH_TIMER_USR_PT_ACCESS_EN
114 | ARCH_TIMER_USR_VT_ACCESS_EN
115 | ARCH_TIMER_VIRT_EVT_EN
116 | ARCH_TIMER_USR_PCT_ACCESS_EN);
117
118 /* Enable user access to the virtual counter */
119 cntkctl |= ARCH_TIMER_USR_VCT_ACCESS_EN;
120
121 arch_timer_set_cntkctl(cntkctl);
122}
123
124static inline void arch_timer_evtstrm_enable(int divider)
125{
126 u32 cntkctl = arch_timer_get_cntkctl();
127 cntkctl &= ~ARCH_TIMER_EVT_TRIGGER_MASK;
128 /* Set the divider and enable virtual event stream */
129 cntkctl |= (divider << ARCH_TIMER_EVT_TRIGGER_SHIFT)
130 | ARCH_TIMER_VIRT_EVT_EN;
131 arch_timer_set_cntkctl(cntkctl);
132 elf_hwcap |= HWCAP_EVTSTRM;
133#ifdef CONFIG_COMPAT
134 compat_elf_hwcap |= COMPAT_HWCAP_EVTSTRM;
135#endif
136}
137
108static inline u64 arch_counter_get_cntvct(void) 138static inline u64 arch_counter_get_cntvct(void)
109{ 139{
110 u64 cval; 140 u64 cval;
diff --git a/arch/arm64/include/asm/hwcap.h b/arch/arm64/include/asm/hwcap.h
index e2950b098e76..6cddbb0c9f54 100644
--- a/arch/arm64/include/asm/hwcap.h
+++ b/arch/arm64/include/asm/hwcap.h
@@ -30,6 +30,7 @@
30#define COMPAT_HWCAP_IDIVA (1 << 17) 30#define COMPAT_HWCAP_IDIVA (1 << 17)
31#define COMPAT_HWCAP_IDIVT (1 << 18) 31#define COMPAT_HWCAP_IDIVT (1 << 18)
32#define COMPAT_HWCAP_IDIV (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT) 32#define COMPAT_HWCAP_IDIV (COMPAT_HWCAP_IDIVA|COMPAT_HWCAP_IDIVT)
33#define COMPAT_HWCAP_EVTSTRM (1 << 21)
33 34
34#ifndef __ASSEMBLY__ 35#ifndef __ASSEMBLY__
35/* 36/*
@@ -37,11 +38,11 @@
37 * instruction set this cpu supports. 38 * instruction set this cpu supports.
38 */ 39 */
39#define ELF_HWCAP (elf_hwcap) 40#define ELF_HWCAP (elf_hwcap)
40#define COMPAT_ELF_HWCAP (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\ 41
41 COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\ 42#ifdef CONFIG_COMPAT
42 COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\ 43#define COMPAT_ELF_HWCAP (compat_elf_hwcap)
43 COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\ 44extern unsigned int compat_elf_hwcap;
44 COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV) 45#endif
45 46
46extern unsigned long elf_hwcap; 47extern unsigned long elf_hwcap;
47#endif 48#endif
diff --git a/arch/arm64/include/uapi/asm/hwcap.h b/arch/arm64/include/uapi/asm/hwcap.h
index eea497578b87..9b12476e9c85 100644
--- a/arch/arm64/include/uapi/asm/hwcap.h
+++ b/arch/arm64/include/uapi/asm/hwcap.h
@@ -21,6 +21,7 @@
21 */ 21 */
22#define HWCAP_FP (1 << 0) 22#define HWCAP_FP (1 << 0)
23#define HWCAP_ASIMD (1 << 1) 23#define HWCAP_ASIMD (1 << 1)
24#define HWCAP_EVTSTRM (1 << 2)
24 25
25 26
26#endif /* _UAPI__ASM_HWCAP_H */ 27#endif /* _UAPI__ASM_HWCAP_H */
diff --git a/arch/arm64/kernel/setup.c b/arch/arm64/kernel/setup.c
index 9cf30f49610d..47905598d790 100644
--- a/arch/arm64/kernel/setup.c
+++ b/arch/arm64/kernel/setup.c
@@ -61,6 +61,16 @@ EXPORT_SYMBOL(processor_id);
61unsigned long elf_hwcap __read_mostly; 61unsigned long elf_hwcap __read_mostly;
62EXPORT_SYMBOL_GPL(elf_hwcap); 62EXPORT_SYMBOL_GPL(elf_hwcap);
63 63
64#ifdef CONFIG_COMPAT
65#define COMPAT_ELF_HWCAP_DEFAULT \
66 (COMPAT_HWCAP_HALF|COMPAT_HWCAP_THUMB|\
67 COMPAT_HWCAP_FAST_MULT|COMPAT_HWCAP_EDSP|\
68 COMPAT_HWCAP_TLS|COMPAT_HWCAP_VFP|\
69 COMPAT_HWCAP_VFPv3|COMPAT_HWCAP_VFPv4|\
70 COMPAT_HWCAP_NEON|COMPAT_HWCAP_IDIV)
71unsigned int compat_elf_hwcap __read_mostly = COMPAT_ELF_HWCAP_DEFAULT;
72#endif
73
64static const char *cpu_name; 74static const char *cpu_name;
65static const char *machine_name; 75static const char *machine_name;
66phys_addr_t __fdt_pointer __initdata; 76phys_addr_t __fdt_pointer __initdata;
@@ -311,6 +321,7 @@ subsys_initcall(topology_init);
311static const char *hwcap_str[] = { 321static const char *hwcap_str[] = {
312 "fp", 322 "fp",
313 "asimd", 323 "asimd",
324 "evtstrm",
314 NULL 325 NULL
315}; 326};
316 327
diff --git a/arch/arm64/kernel/time.c b/arch/arm64/kernel/time.c
index 03dc3718eb13..29c39d5d77e3 100644
--- a/arch/arm64/kernel/time.c
+++ b/arch/arm64/kernel/time.c
@@ -61,13 +61,6 @@ unsigned long profile_pc(struct pt_regs *regs)
61EXPORT_SYMBOL(profile_pc); 61EXPORT_SYMBOL(profile_pc);
62#endif 62#endif
63 63
64static u64 sched_clock_mult __read_mostly;
65
66unsigned long long notrace sched_clock(void)
67{
68 return arch_timer_read_counter() * sched_clock_mult;
69}
70
71void __init time_init(void) 64void __init time_init(void)
72{ 65{
73 u32 arch_timer_rate; 66 u32 arch_timer_rate;
@@ -78,9 +71,6 @@ void __init time_init(void)
78 if (!arch_timer_rate) 71 if (!arch_timer_rate)
79 panic("Unable to initialise architected timer.\n"); 72 panic("Unable to initialise architected timer.\n");
80 73
81 /* Cache the sched_clock multiplier to save a divide in the hot path. */
82 sched_clock_mult = NSEC_PER_SEC / arch_timer_rate;
83
84 /* Calibrate the delay loop directly */ 74 /* Calibrate the delay loop directly */
85 lpj_fine = arch_timer_rate / HZ; 75 lpj_fine = arch_timer_rate / HZ;
86} 76}
diff --git a/arch/x86/kernel/rtc.c b/arch/x86/kernel/rtc.c
index 0aa29394ed6f..5b9dd445eb89 100644
--- a/arch/x86/kernel/rtc.c
+++ b/arch/x86/kernel/rtc.c
@@ -192,6 +192,14 @@ static __init int add_rtc_cmos(void)
192 if (mrst_identify_cpu()) 192 if (mrst_identify_cpu())
193 return -ENODEV; 193 return -ENODEV;
194 194
195#ifdef CONFIG_ACPI
196 if (acpi_gbl_FADT.boot_flags & ACPI_FADT_NO_CMOS_RTC) {
197 /* This warning can likely go away again in a year or two. */
198 pr_info("ACPI: not registering RTC platform device\n");
199 return -ENODEV;
200 }
201#endif
202
195 platform_device_register(&rtc_device); 203 platform_device_register(&rtc_device);
196 dev_info(&rtc_device.dev, 204 dev_info(&rtc_device.dev,
197 "registered platform RTC device (no PNP device found)\n"); 205 "registered platform RTC device (no PNP device found)\n");
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 971d796e071d..bdb953e15d2a 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -34,6 +34,7 @@ config ORION_TIMER
34 bool 34 bool
35 35
36config SUN4I_TIMER 36config SUN4I_TIMER
37 select CLKSRC_MMIO
37 bool 38 bool
38 39
39config VT8500_TIMER 40config VT8500_TIMER
@@ -71,10 +72,33 @@ config CLKSRC_DBX500_PRCMU_SCHED_CLOCK
71 help 72 help
72 Use the always on PRCMU Timer as sched_clock 73 Use the always on PRCMU Timer as sched_clock
73 74
75config CLKSRC_EFM32
76 bool "Clocksource for Energy Micro's EFM32 SoCs" if !ARCH_EFM32
77 depends on OF && ARM && (ARCH_EFM32 || COMPILE_TEST)
78 default ARCH_EFM32
79 help
80 Support to use the timers of EFM32 SoCs as clock source and clock
81 event device.
82
74config ARM_ARCH_TIMER 83config ARM_ARCH_TIMER
75 bool 84 bool
76 select CLKSRC_OF if OF 85 select CLKSRC_OF if OF
77 86
87config ARM_ARCH_TIMER_EVTSTREAM
88 bool "Support for ARM architected timer event stream generation"
89 default y if ARM_ARCH_TIMER
90 help
91 This option enables support for event stream generation based on
92 the ARM architected timer. It is used for waking up CPUs executing
93 the wfe instruction at a frequency represented as a power-of-2
94 divisor of the clock rate.
95 The main use of the event stream is wfe-based timeouts of userspace
96 locking implementations. It might also be useful for imposing timeout
97 on wfe to safeguard against any programming errors in case an expected
98 event is not generated.
99 This must be disabled for hardware validation purposes to detect any
100 hardware anomalies of missing events.
101
78config ARM_GLOBAL_TIMER 102config ARM_GLOBAL_TIMER
79 bool 103 bool
80 select CLKSRC_OF if OF 104 select CLKSRC_OF if OF
diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile
index 704d6d342adc..33621efb9148 100644
--- a/drivers/clocksource/Makefile
+++ b/drivers/clocksource/Makefile
@@ -27,6 +27,7 @@ obj-$(CONFIG_VT8500_TIMER) += vt8500_timer.o
27obj-$(CONFIG_ARCH_NSPIRE) += zevio-timer.o 27obj-$(CONFIG_ARCH_NSPIRE) += zevio-timer.o
28obj-$(CONFIG_ARCH_BCM) += bcm_kona_timer.o 28obj-$(CONFIG_ARCH_BCM) += bcm_kona_timer.o
29obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o 29obj-$(CONFIG_CADENCE_TTC_TIMER) += cadence_ttc_timer.o
30obj-$(CONFIG_CLKSRC_EFM32) += time-efm32.o
30obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o 31obj-$(CONFIG_CLKSRC_EXYNOS_MCT) += exynos_mct.o
31obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o 32obj-$(CONFIG_CLKSRC_SAMSUNG_PWM) += samsung_pwm_timer.o
32obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o 33obj-$(CONFIG_VF_PIT_TIMER) += vf_pit_timer.o
diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c
index fbd9ccd5e114..95fb944e15ee 100644
--- a/drivers/clocksource/arm_arch_timer.c
+++ b/drivers/clocksource/arm_arch_timer.c
@@ -13,12 +13,14 @@
13#include <linux/device.h> 13#include <linux/device.h>
14#include <linux/smp.h> 14#include <linux/smp.h>
15#include <linux/cpu.h> 15#include <linux/cpu.h>
16#include <linux/cpu_pm.h>
16#include <linux/clockchips.h> 17#include <linux/clockchips.h>
17#include <linux/interrupt.h> 18#include <linux/interrupt.h>
18#include <linux/of_irq.h> 19#include <linux/of_irq.h>
19#include <linux/of_address.h> 20#include <linux/of_address.h>
20#include <linux/io.h> 21#include <linux/io.h>
21#include <linux/slab.h> 22#include <linux/slab.h>
23#include <linux/sched_clock.h>
22 24
23#include <asm/arch_timer.h> 25#include <asm/arch_timer.h>
24#include <asm/virt.h> 26#include <asm/virt.h>
@@ -294,6 +296,19 @@ static void __arch_timer_setup(unsigned type,
294 clockevents_config_and_register(clk, arch_timer_rate, 0xf, 0x7fffffff); 296 clockevents_config_and_register(clk, arch_timer_rate, 0xf, 0x7fffffff);
295} 297}
296 298
299static void arch_timer_configure_evtstream(void)
300{
301 int evt_stream_div, pos;
302
303 /* Find the closest power of two to the divisor */
304 evt_stream_div = arch_timer_rate / ARCH_TIMER_EVT_STREAM_FREQ;
305 pos = fls(evt_stream_div);
306 if (pos > 1 && !(evt_stream_div & (1 << (pos - 2))))
307 pos--;
308 /* enable event stream */
309 arch_timer_evtstrm_enable(min(pos, 15));
310}
311
297static int arch_timer_setup(struct clock_event_device *clk) 312static int arch_timer_setup(struct clock_event_device *clk)
298{ 313{
299 __arch_timer_setup(ARCH_CP15_TIMER, clk); 314 __arch_timer_setup(ARCH_CP15_TIMER, clk);
@@ -307,6 +322,8 @@ static int arch_timer_setup(struct clock_event_device *clk)
307 } 322 }
308 323
309 arch_counter_set_user_access(); 324 arch_counter_set_user_access();
325 if (IS_ENABLED(CONFIG_ARM_ARCH_TIMER_EVTSTREAM))
326 arch_timer_configure_evtstream();
310 327
311 return 0; 328 return 0;
312} 329}
@@ -389,7 +406,7 @@ static struct clocksource clocksource_counter = {
389 .rating = 400, 406 .rating = 400,
390 .read = arch_counter_read, 407 .read = arch_counter_read,
391 .mask = CLOCKSOURCE_MASK(56), 408 .mask = CLOCKSOURCE_MASK(56),
392 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 409 .flags = CLOCK_SOURCE_IS_CONTINUOUS | CLOCK_SOURCE_SUSPEND_NONSTOP,
393}; 410};
394 411
395static struct cyclecounter cyclecounter = { 412static struct cyclecounter cyclecounter = {
@@ -419,6 +436,9 @@ static void __init arch_counter_register(unsigned type)
419 cyclecounter.mult = clocksource_counter.mult; 436 cyclecounter.mult = clocksource_counter.mult;
420 cyclecounter.shift = clocksource_counter.shift; 437 cyclecounter.shift = clocksource_counter.shift;
421 timecounter_init(&timecounter, &cyclecounter, start_count); 438 timecounter_init(&timecounter, &cyclecounter, start_count);
439
440 /* 56 bits minimum, so we assume worst case rollover */
441 sched_clock_register(arch_timer_read_counter, 56, arch_timer_rate);
422} 442}
423 443
424static void arch_timer_stop(struct clock_event_device *clk) 444static void arch_timer_stop(struct clock_event_device *clk)
@@ -460,6 +480,33 @@ static struct notifier_block arch_timer_cpu_nb = {
460 .notifier_call = arch_timer_cpu_notify, 480 .notifier_call = arch_timer_cpu_notify,
461}; 481};
462 482
483#ifdef CONFIG_CPU_PM
484static unsigned int saved_cntkctl;
485static int arch_timer_cpu_pm_notify(struct notifier_block *self,
486 unsigned long action, void *hcpu)
487{
488 if (action == CPU_PM_ENTER)
489 saved_cntkctl = arch_timer_get_cntkctl();
490 else if (action == CPU_PM_ENTER_FAILED || action == CPU_PM_EXIT)
491 arch_timer_set_cntkctl(saved_cntkctl);
492 return NOTIFY_OK;
493}
494
495static struct notifier_block arch_timer_cpu_pm_notifier = {
496 .notifier_call = arch_timer_cpu_pm_notify,
497};
498
499static int __init arch_timer_cpu_pm_init(void)
500{
501 return cpu_pm_register_notifier(&arch_timer_cpu_pm_notifier);
502}
503#else
504static int __init arch_timer_cpu_pm_init(void)
505{
506 return 0;
507}
508#endif
509
463static int __init arch_timer_register(void) 510static int __init arch_timer_register(void)
464{ 511{
465 int err; 512 int err;
@@ -499,11 +546,17 @@ static int __init arch_timer_register(void)
499 if (err) 546 if (err)
500 goto out_free_irq; 547 goto out_free_irq;
501 548
549 err = arch_timer_cpu_pm_init();
550 if (err)
551 goto out_unreg_notify;
552
502 /* Immediately configure the timer on the boot CPU */ 553 /* Immediately configure the timer on the boot CPU */
503 arch_timer_setup(this_cpu_ptr(arch_timer_evt)); 554 arch_timer_setup(this_cpu_ptr(arch_timer_evt));
504 555
505 return 0; 556 return 0;
506 557
558out_unreg_notify:
559 unregister_cpu_notifier(&arch_timer_cpu_nb);
507out_free_irq: 560out_free_irq:
508 if (arch_timer_use_virtual) 561 if (arch_timer_use_virtual)
509 free_percpu_irq(arch_timer_ppi[VIRT_PPI], arch_timer_evt); 562 free_percpu_irq(arch_timer_ppi[VIRT_PPI], arch_timer_evt);
diff --git a/drivers/clocksource/arm_global_timer.c b/drivers/clocksource/arm_global_timer.c
index b66c1f36066c..c639b1a9e996 100644
--- a/drivers/clocksource/arm_global_timer.c
+++ b/drivers/clocksource/arm_global_timer.c
@@ -169,7 +169,8 @@ static int gt_clockevents_init(struct clock_event_device *clk)
169 int cpu = smp_processor_id(); 169 int cpu = smp_processor_id();
170 170
171 clk->name = "arm_global_timer"; 171 clk->name = "arm_global_timer";
172 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT; 172 clk->features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |
173 CLOCK_EVT_FEAT_PERCPU;
173 clk->set_mode = gt_clockevent_set_mode; 174 clk->set_mode = gt_clockevent_set_mode;
174 clk->set_next_event = gt_clockevent_set_next_event; 175 clk->set_next_event = gt_clockevent_set_next_event;
175 clk->cpumask = cpumask_of(cpu); 176 clk->cpumask = cpumask_of(cpu);
diff --git a/drivers/clocksource/bcm2835_timer.c b/drivers/clocksource/bcm2835_timer.c
index 07ea7ce900dc..26ed331b1aad 100644
--- a/drivers/clocksource/bcm2835_timer.c
+++ b/drivers/clocksource/bcm2835_timer.c
@@ -49,7 +49,7 @@ struct bcm2835_timer {
49 49
50static void __iomem *system_clock __read_mostly; 50static void __iomem *system_clock __read_mostly;
51 51
52static u32 notrace bcm2835_sched_read(void) 52static u64 notrace bcm2835_sched_read(void)
53{ 53{
54 return readl_relaxed(system_clock); 54 return readl_relaxed(system_clock);
55} 55}
@@ -110,7 +110,7 @@ static void __init bcm2835_timer_init(struct device_node *node)
110 panic("Can't read clock-frequency"); 110 panic("Can't read clock-frequency");
111 111
112 system_clock = base + REG_COUNTER_LO; 112 system_clock = base + REG_COUNTER_LO;
113 setup_sched_clock(bcm2835_sched_read, 32, freq); 113 sched_clock_register(bcm2835_sched_read, 32, freq);
114 114
115 clocksource_mmio_init(base + REG_COUNTER_LO, node->name, 115 clocksource_mmio_init(base + REG_COUNTER_LO, node->name,
116 freq, 300, 32, clocksource_mmio_readl_up); 116 freq, 300, 32, clocksource_mmio_readl_up);
diff --git a/drivers/clocksource/clksrc-dbx500-prcmu.c b/drivers/clocksource/clksrc-dbx500-prcmu.c
index a9fd4ad25674..b375106844d8 100644
--- a/drivers/clocksource/clksrc-dbx500-prcmu.c
+++ b/drivers/clocksource/clksrc-dbx500-prcmu.c
@@ -53,7 +53,7 @@ static struct clocksource clocksource_dbx500_prcmu = {
53 53
54#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 54#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
55 55
56static u32 notrace dbx500_prcmu_sched_clock_read(void) 56static u64 notrace dbx500_prcmu_sched_clock_read(void)
57{ 57{
58 if (unlikely(!clksrc_dbx500_timer_base)) 58 if (unlikely(!clksrc_dbx500_timer_base))
59 return 0; 59 return 0;
@@ -81,8 +81,7 @@ void __init clksrc_dbx500_prcmu_init(void __iomem *base)
81 clksrc_dbx500_timer_base + PRCMU_TIMER_REF); 81 clksrc_dbx500_timer_base + PRCMU_TIMER_REF);
82 } 82 }
83#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK 83#ifdef CONFIG_CLKSRC_DBX500_PRCMU_SCHED_CLOCK
84 setup_sched_clock(dbx500_prcmu_sched_clock_read, 84 sched_clock_register(dbx500_prcmu_sched_clock_read, 32, RATE_32K);
85 32, RATE_32K);
86#endif 85#endif
87 clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K); 86 clocksource_register_hz(&clocksource_dbx500_prcmu, RATE_32K);
88} 87}
diff --git a/drivers/clocksource/clksrc-of.c b/drivers/clocksource/clksrc-of.c
index b9ddd9e3a2f5..35639cf4e5a2 100644
--- a/drivers/clocksource/clksrc-of.c
+++ b/drivers/clocksource/clksrc-of.c
@@ -35,5 +35,6 @@ void __init clocksource_of_init(void)
35 35
36 init_func = match->data; 36 init_func = match->data;
37 init_func(np); 37 init_func(np);
38 of_node_put(np);
38 } 39 }
39} 40}
diff --git a/drivers/clocksource/dw_apb_timer_of.c b/drivers/clocksource/dw_apb_timer_of.c
index 4cbae4f762b1..45ba8aecc729 100644
--- a/drivers/clocksource/dw_apb_timer_of.c
+++ b/drivers/clocksource/dw_apb_timer_of.c
@@ -23,7 +23,7 @@
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/sched_clock.h> 24#include <linux/sched_clock.h>
25 25
26static void timer_get_base_and_rate(struct device_node *np, 26static void __init timer_get_base_and_rate(struct device_node *np,
27 void __iomem **base, u32 *rate) 27 void __iomem **base, u32 *rate)
28{ 28{
29 struct clk *timer_clk; 29 struct clk *timer_clk;
@@ -55,11 +55,11 @@ static void timer_get_base_and_rate(struct device_node *np,
55 55
56try_clock_freq: 56try_clock_freq:
57 if (of_property_read_u32(np, "clock-freq", rate) && 57 if (of_property_read_u32(np, "clock-freq", rate) &&
58 of_property_read_u32(np, "clock-frequency", rate)) 58 of_property_read_u32(np, "clock-frequency", rate))
59 panic("No clock nor clock-frequency property for %s", np->name); 59 panic("No clock nor clock-frequency property for %s", np->name);
60} 60}
61 61
62static void add_clockevent(struct device_node *event_timer) 62static void __init add_clockevent(struct device_node *event_timer)
63{ 63{
64 void __iomem *iobase; 64 void __iomem *iobase;
65 struct dw_apb_clock_event_device *ced; 65 struct dw_apb_clock_event_device *ced;
@@ -82,7 +82,7 @@ static void add_clockevent(struct device_node *event_timer)
82static void __iomem *sched_io_base; 82static void __iomem *sched_io_base;
83static u32 sched_rate; 83static u32 sched_rate;
84 84
85static void add_clocksource(struct device_node *source_timer) 85static void __init add_clocksource(struct device_node *source_timer)
86{ 86{
87 void __iomem *iobase; 87 void __iomem *iobase;
88 struct dw_apb_clocksource *cs; 88 struct dw_apb_clocksource *cs;
@@ -106,7 +106,7 @@ static void add_clocksource(struct device_node *source_timer)
106 sched_rate = rate; 106 sched_rate = rate;
107} 107}
108 108
109static u32 read_sched_clock(void) 109static u64 read_sched_clock(void)
110{ 110{
111 return __raw_readl(sched_io_base); 111 return __raw_readl(sched_io_base);
112} 112}
@@ -117,7 +117,7 @@ static const struct of_device_id sptimer_ids[] __initconst = {
117 { /* Sentinel */ }, 117 { /* Sentinel */ },
118}; 118};
119 119
120static void init_sched_clock(void) 120static void __init init_sched_clock(void)
121{ 121{
122 struct device_node *sched_timer; 122 struct device_node *sched_timer;
123 123
@@ -128,7 +128,7 @@ static void init_sched_clock(void)
128 of_node_put(sched_timer); 128 of_node_put(sched_timer);
129 } 129 }
130 130
131 setup_sched_clock(read_sched_clock, 32, sched_rate); 131 sched_clock_register(read_sched_clock, 32, sched_rate);
132} 132}
133 133
134static int num_called; 134static int num_called;
@@ -138,12 +138,10 @@ static void __init dw_apb_timer_init(struct device_node *timer)
138 case 0: 138 case 0:
139 pr_debug("%s: found clockevent timer\n", __func__); 139 pr_debug("%s: found clockevent timer\n", __func__);
140 add_clockevent(timer); 140 add_clockevent(timer);
141 of_node_put(timer);
142 break; 141 break;
143 case 1: 142 case 1:
144 pr_debug("%s: found clocksource timer\n", __func__); 143 pr_debug("%s: found clocksource timer\n", __func__);
145 add_clocksource(timer); 144 add_clocksource(timer);
146 of_node_put(timer);
147 init_sched_clock(); 145 init_sched_clock();
148 break; 146 break;
149 default: 147 default:
diff --git a/drivers/clocksource/em_sti.c b/drivers/clocksource/em_sti.c
index 3a5909c12d42..9d170834fcf3 100644
--- a/drivers/clocksource/em_sti.c
+++ b/drivers/clocksource/em_sti.c
@@ -78,7 +78,7 @@ static int em_sti_enable(struct em_sti_priv *p)
78 int ret; 78 int ret;
79 79
80 /* enable clock */ 80 /* enable clock */
81 ret = clk_enable(p->clk); 81 ret = clk_prepare_enable(p->clk);
82 if (ret) { 82 if (ret) {
83 dev_err(&p->pdev->dev, "cannot enable clock\n"); 83 dev_err(&p->pdev->dev, "cannot enable clock\n");
84 return ret; 84 return ret;
@@ -107,7 +107,7 @@ static void em_sti_disable(struct em_sti_priv *p)
107 em_sti_write(p, STI_INTENCLR, 3); 107 em_sti_write(p, STI_INTENCLR, 3);
108 108
109 /* stop clock */ 109 /* stop clock */
110 clk_disable(p->clk); 110 clk_disable_unprepare(p->clk);
111} 111}
112 112
113static cycle_t em_sti_count(struct em_sti_priv *p) 113static cycle_t em_sti_count(struct em_sti_priv *p)
diff --git a/drivers/clocksource/mxs_timer.c b/drivers/clocksource/mxs_timer.c
index 0f5e65f74dc3..445b68a01dc5 100644
--- a/drivers/clocksource/mxs_timer.c
+++ b/drivers/clocksource/mxs_timer.c
@@ -222,7 +222,7 @@ static struct clocksource clocksource_mxs = {
222 .flags = CLOCK_SOURCE_IS_CONTINUOUS, 222 .flags = CLOCK_SOURCE_IS_CONTINUOUS,
223}; 223};
224 224
225static u32 notrace mxs_read_sched_clock_v2(void) 225static u64 notrace mxs_read_sched_clock_v2(void)
226{ 226{
227 return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1)); 227 return ~readl_relaxed(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1));
228} 228}
@@ -236,7 +236,7 @@ static int __init mxs_clocksource_init(struct clk *timer_clk)
236 else { 236 else {
237 clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1), 237 clocksource_mmio_init(mxs_timrot_base + HW_TIMROT_RUNNING_COUNTn(1),
238 "mxs_timer", c, 200, 32, clocksource_mmio_readl_down); 238 "mxs_timer", c, 200, 32, clocksource_mmio_readl_down);
239 setup_sched_clock(mxs_read_sched_clock_v2, 32, c); 239 sched_clock_register(mxs_read_sched_clock_v2, 32, c);
240 } 240 }
241 241
242 return 0; 242 return 0;
diff --git a/drivers/clocksource/nomadik-mtu.c b/drivers/clocksource/nomadik-mtu.c
index 1b74bea12385..ed7b73b508e0 100644
--- a/drivers/clocksource/nomadik-mtu.c
+++ b/drivers/clocksource/nomadik-mtu.c
@@ -76,7 +76,7 @@ static struct delay_timer mtu_delay_timer;
76 * local implementation which uses the clocksource to get some 76 * local implementation which uses the clocksource to get some
77 * better resolution when scheduling the kernel. 77 * better resolution when scheduling the kernel.
78 */ 78 */
79static u32 notrace nomadik_read_sched_clock(void) 79static u64 notrace nomadik_read_sched_clock(void)
80{ 80{
81 if (unlikely(!mtu_base)) 81 if (unlikely(!mtu_base))
82 return 0; 82 return 0;
@@ -231,7 +231,7 @@ static void __init __nmdk_timer_init(void __iomem *base, int irq,
231 "mtu_0"); 231 "mtu_0");
232 232
233#ifdef CONFIG_CLKSRC_NOMADIK_MTU_SCHED_CLOCK 233#ifdef CONFIG_CLKSRC_NOMADIK_MTU_SCHED_CLOCK
234 setup_sched_clock(nomadik_read_sched_clock, 32, rate); 234 sched_clock_register(nomadik_read_sched_clock, 32, rate);
235#endif 235#endif
236 236
237 /* Timer 1 is used for events, register irq and clockevents */ 237 /* Timer 1 is used for events, register irq and clockevents */
diff --git a/drivers/clocksource/samsung_pwm_timer.c b/drivers/clocksource/samsung_pwm_timer.c
index ab29476ee5f9..85082e8d3052 100644
--- a/drivers/clocksource/samsung_pwm_timer.c
+++ b/drivers/clocksource/samsung_pwm_timer.c
@@ -331,7 +331,7 @@ static struct clocksource samsung_clocksource = {
331 * this wraps around for now, since it is just a relative time 331 * this wraps around for now, since it is just a relative time
332 * stamp. (Inspired by U300 implementation.) 332 * stamp. (Inspired by U300 implementation.)
333 */ 333 */
334static u32 notrace samsung_read_sched_clock(void) 334static u64 notrace samsung_read_sched_clock(void)
335{ 335{
336 return samsung_clocksource_read(NULL); 336 return samsung_clocksource_read(NULL);
337} 337}
@@ -357,7 +357,7 @@ static void __init samsung_clocksource_init(void)
357 else 357 else
358 pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14; 358 pwm.source_reg = pwm.base + pwm.source_id * 0x0c + 0x14;
359 359
360 setup_sched_clock(samsung_read_sched_clock, 360 sched_clock_register(samsung_read_sched_clock,
361 pwm.variant.bits, clock_rate); 361 pwm.variant.bits, clock_rate);
362 362
363 samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits); 363 samsung_clocksource.mask = CLOCKSOURCE_MASK(pwm.variant.bits);
diff --git a/drivers/clocksource/sun4i_timer.c b/drivers/clocksource/sun4i_timer.c
index 8ead0258740a..2fb4695a28d8 100644
--- a/drivers/clocksource/sun4i_timer.c
+++ b/drivers/clocksource/sun4i_timer.c
@@ -37,6 +37,8 @@
37#define TIMER_INTVAL_REG(val) (0x10 * (val) + 0x14) 37#define TIMER_INTVAL_REG(val) (0x10 * (val) + 0x14)
38#define TIMER_CNTVAL_REG(val) (0x10 * (val) + 0x18) 38#define TIMER_CNTVAL_REG(val) (0x10 * (val) + 0x18)
39 39
40#define TIMER_SYNC_TICKS 3
41
40static void __iomem *timer_base; 42static void __iomem *timer_base;
41static u32 ticks_per_jiffy; 43static u32 ticks_per_jiffy;
42 44
@@ -50,7 +52,7 @@ static void sun4i_clkevt_sync(void)
50{ 52{
51 u32 old = readl(timer_base + TIMER_CNTVAL_REG(1)); 53 u32 old = readl(timer_base + TIMER_CNTVAL_REG(1));
52 54
53 while ((old - readl(timer_base + TIMER_CNTVAL_REG(1))) < 3) 55 while ((old - readl(timer_base + TIMER_CNTVAL_REG(1))) < TIMER_SYNC_TICKS)
54 cpu_relax(); 56 cpu_relax();
55} 57}
56 58
@@ -104,7 +106,7 @@ static int sun4i_clkevt_next_event(unsigned long evt,
104 struct clock_event_device *unused) 106 struct clock_event_device *unused)
105{ 107{
106 sun4i_clkevt_time_stop(0); 108 sun4i_clkevt_time_stop(0);
107 sun4i_clkevt_time_setup(0, evt); 109 sun4i_clkevt_time_setup(0, evt - TIMER_SYNC_TICKS);
108 sun4i_clkevt_time_start(0, false); 110 sun4i_clkevt_time_start(0, false);
109 111
110 return 0; 112 return 0;
@@ -131,7 +133,7 @@ static irqreturn_t sun4i_timer_interrupt(int irq, void *dev_id)
131 133
132static struct irqaction sun4i_timer_irq = { 134static struct irqaction sun4i_timer_irq = {
133 .name = "sun4i_timer0", 135 .name = "sun4i_timer0",
134 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL, 136 .flags = IRQF_TIMER | IRQF_IRQPOLL,
135 .handler = sun4i_timer_interrupt, 137 .handler = sun4i_timer_interrupt,
136 .dev_id = &sun4i_clockevent, 138 .dev_id = &sun4i_clockevent,
137}; 139};
@@ -187,8 +189,8 @@ static void __init sun4i_timer_init(struct device_node *node)
187 189
188 sun4i_clockevent.cpumask = cpumask_of(0); 190 sun4i_clockevent.cpumask = cpumask_of(0);
189 191
190 clockevents_config_and_register(&sun4i_clockevent, rate, 0x1, 192 clockevents_config_and_register(&sun4i_clockevent, rate,
191 0xffffffff); 193 TIMER_SYNC_TICKS, 0xffffffff);
192} 194}
193CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-timer", 195CLOCKSOURCE_OF_DECLARE(sun4i, "allwinner,sun4i-timer",
194 sun4i_timer_init); 196 sun4i_timer_init);
diff --git a/drivers/clocksource/tcb_clksrc.c b/drivers/clocksource/tcb_clksrc.c
index 8a6187225dd0..00fdd1170284 100644
--- a/drivers/clocksource/tcb_clksrc.c
+++ b/drivers/clocksource/tcb_clksrc.c
@@ -100,7 +100,7 @@ static void tc_mode(enum clock_event_mode m, struct clock_event_device *d)
100 || tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) { 100 || tcd->clkevt.mode == CLOCK_EVT_MODE_ONESHOT) {
101 __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR)); 101 __raw_writel(0xff, regs + ATMEL_TC_REG(2, IDR));
102 __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR)); 102 __raw_writel(ATMEL_TC_CLKDIS, regs + ATMEL_TC_REG(2, CCR));
103 clk_disable(tcd->clk); 103 clk_disable_unprepare(tcd->clk);
104 } 104 }
105 105
106 switch (m) { 106 switch (m) {
@@ -109,7 +109,7 @@ static void tc_mode(enum clock_event_mode m, struct clock_event_device *d)
109 * of oneshot, we get lower overhead and improved accuracy. 109 * of oneshot, we get lower overhead and improved accuracy.
110 */ 110 */
111 case CLOCK_EVT_MODE_PERIODIC: 111 case CLOCK_EVT_MODE_PERIODIC:
112 clk_enable(tcd->clk); 112 clk_prepare_enable(tcd->clk);
113 113
114 /* slow clock, count up to RC, then irq and restart */ 114 /* slow clock, count up to RC, then irq and restart */
115 __raw_writel(timer_clock 115 __raw_writel(timer_clock
@@ -126,7 +126,7 @@ static void tc_mode(enum clock_event_mode m, struct clock_event_device *d)
126 break; 126 break;
127 127
128 case CLOCK_EVT_MODE_ONESHOT: 128 case CLOCK_EVT_MODE_ONESHOT:
129 clk_enable(tcd->clk); 129 clk_prepare_enable(tcd->clk);
130 130
131 /* slow clock, count up to RC, then irq and stop */ 131 /* slow clock, count up to RC, then irq and stop */
132 __raw_writel(timer_clock | ATMEL_TC_CPCSTOP 132 __raw_writel(timer_clock | ATMEL_TC_CPCSTOP
@@ -180,15 +180,22 @@ static irqreturn_t ch2_irq(int irq, void *handle)
180 180
181static struct irqaction tc_irqaction = { 181static struct irqaction tc_irqaction = {
182 .name = "tc_clkevt", 182 .name = "tc_clkevt",
183 .flags = IRQF_TIMER | IRQF_DISABLED, 183 .flags = IRQF_TIMER,
184 .handler = ch2_irq, 184 .handler = ch2_irq,
185}; 185};
186 186
187static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) 187static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
188{ 188{
189 int ret;
189 struct clk *t2_clk = tc->clk[2]; 190 struct clk *t2_clk = tc->clk[2];
190 int irq = tc->irq[2]; 191 int irq = tc->irq[2];
191 192
193 /* try to enable t2 clk to avoid future errors in mode change */
194 ret = clk_prepare_enable(t2_clk);
195 if (ret)
196 return ret;
197 clk_disable_unprepare(t2_clk);
198
192 clkevt.regs = tc->regs; 199 clkevt.regs = tc->regs;
193 clkevt.clk = t2_clk; 200 clkevt.clk = t2_clk;
194 tc_irqaction.dev_id = &clkevt; 201 tc_irqaction.dev_id = &clkevt;
@@ -197,16 +204,21 @@ static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
197 204
198 clkevt.clkevt.cpumask = cpumask_of(0); 205 clkevt.clkevt.cpumask = cpumask_of(0);
199 206
207 ret = setup_irq(irq, &tc_irqaction);
208 if (ret)
209 return ret;
210
200 clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff); 211 clockevents_config_and_register(&clkevt.clkevt, 32768, 1, 0xffff);
201 212
202 setup_irq(irq, &tc_irqaction); 213 return ret;
203} 214}
204 215
205#else /* !CONFIG_GENERIC_CLOCKEVENTS */ 216#else /* !CONFIG_GENERIC_CLOCKEVENTS */
206 217
207static void __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx) 218static int __init setup_clkevents(struct atmel_tc *tc, int clk32k_divisor_idx)
208{ 219{
209 /* NOTHING */ 220 /* NOTHING */
221 return 0;
210} 222}
211 223
212#endif 224#endif
@@ -265,6 +277,7 @@ static int __init tcb_clksrc_init(void)
265 int best_divisor_idx = -1; 277 int best_divisor_idx = -1;
266 int clk32k_divisor_idx = -1; 278 int clk32k_divisor_idx = -1;
267 int i; 279 int i;
280 int ret;
268 281
269 tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name); 282 tc = atmel_tc_alloc(CONFIG_ATMEL_TCB_CLKSRC_BLOCK, clksrc.name);
270 if (!tc) { 283 if (!tc) {
@@ -275,7 +288,11 @@ static int __init tcb_clksrc_init(void)
275 pdev = tc->pdev; 288 pdev = tc->pdev;
276 289
277 t0_clk = tc->clk[0]; 290 t0_clk = tc->clk[0];
278 clk_enable(t0_clk); 291 ret = clk_prepare_enable(t0_clk);
292 if (ret) {
293 pr_debug("can't enable T0 clk\n");
294 goto err_free_tc;
295 }
279 296
280 /* How fast will we be counting? Pick something over 5 MHz. */ 297 /* How fast will we be counting? Pick something over 5 MHz. */
281 rate = (u32) clk_get_rate(t0_clk); 298 rate = (u32) clk_get_rate(t0_clk);
@@ -313,17 +330,39 @@ static int __init tcb_clksrc_init(void)
313 /* tclib will give us three clocks no matter what the 330 /* tclib will give us three clocks no matter what the
314 * underlying platform supports. 331 * underlying platform supports.
315 */ 332 */
316 clk_enable(tc->clk[1]); 333 ret = clk_prepare_enable(tc->clk[1]);
334 if (ret) {
335 pr_debug("can't enable T1 clk\n");
336 goto err_disable_t0;
337 }
317 /* setup both channel 0 & 1 */ 338 /* setup both channel 0 & 1 */
318 tcb_setup_dual_chan(tc, best_divisor_idx); 339 tcb_setup_dual_chan(tc, best_divisor_idx);
319 } 340 }
320 341
321 /* and away we go! */ 342 /* and away we go! */
322 clocksource_register_hz(&clksrc, divided_rate); 343 ret = clocksource_register_hz(&clksrc, divided_rate);
344 if (ret)
345 goto err_disable_t1;
323 346
324 /* channel 2: periodic and oneshot timer support */ 347 /* channel 2: periodic and oneshot timer support */
325 setup_clkevents(tc, clk32k_divisor_idx); 348 ret = setup_clkevents(tc, clk32k_divisor_idx);
349 if (ret)
350 goto err_unregister_clksrc;
326 351
327 return 0; 352 return 0;
353
354err_unregister_clksrc:
355 clocksource_unregister(&clksrc);
356
357err_disable_t1:
358 if (!tc->tcb_config || tc->tcb_config->counter_width != 32)
359 clk_disable_unprepare(tc->clk[1]);
360
361err_disable_t0:
362 clk_disable_unprepare(t0_clk);
363
364err_free_tc:
365 atmel_tc_free(tc);
366 return ret;
328} 367}
329arch_initcall(tcb_clksrc_init); 368arch_initcall(tcb_clksrc_init);
diff --git a/drivers/clocksource/tegra20_timer.c b/drivers/clocksource/tegra20_timer.c
index 93961703b887..642849256d82 100644
--- a/drivers/clocksource/tegra20_timer.c
+++ b/drivers/clocksource/tegra20_timer.c
@@ -98,7 +98,7 @@ static struct clock_event_device tegra_clockevent = {
98 .set_mode = tegra_timer_set_mode, 98 .set_mode = tegra_timer_set_mode,
99}; 99};
100 100
101static u32 notrace tegra_read_sched_clock(void) 101static u64 notrace tegra_read_sched_clock(void)
102{ 102{
103 return timer_readl(TIMERUS_CNTR_1US); 103 return timer_readl(TIMERUS_CNTR_1US);
104} 104}
@@ -181,8 +181,6 @@ static void __init tegra20_init_timer(struct device_node *np)
181 rate = clk_get_rate(clk); 181 rate = clk_get_rate(clk);
182 } 182 }
183 183
184 of_node_put(np);
185
186 switch (rate) { 184 switch (rate) {
187 case 12000000: 185 case 12000000:
188 timer_writel(0x000b, TIMERUS_USEC_CFG); 186 timer_writel(0x000b, TIMERUS_USEC_CFG);
@@ -200,7 +198,7 @@ static void __init tegra20_init_timer(struct device_node *np)
200 WARN(1, "Unknown clock rate"); 198 WARN(1, "Unknown clock rate");
201 } 199 }
202 200
203 setup_sched_clock(tegra_read_sched_clock, 32, 1000000); 201 sched_clock_register(tegra_read_sched_clock, 32, 1000000);
204 202
205 if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US, 203 if (clocksource_mmio_init(timer_reg_base + TIMERUS_CNTR_1US,
206 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) { 204 "timer_us", 1000000, 300, 32, clocksource_mmio_readl_up)) {
@@ -241,8 +239,6 @@ static void __init tegra20_init_rtc(struct device_node *np)
241 else 239 else
242 clk_prepare_enable(clk); 240 clk_prepare_enable(clk);
243 241
244 of_node_put(np);
245
246 register_persistent_clock(NULL, tegra_read_persistent_clock); 242 register_persistent_clock(NULL, tegra_read_persistent_clock);
247} 243}
248CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc); 244CLOCKSOURCE_OF_DECLARE(tegra20_rtc, "nvidia,tegra20-rtc", tegra20_init_rtc);
diff --git a/drivers/clocksource/time-armada-370-xp.c b/drivers/clocksource/time-armada-370-xp.c
index 0198504ef6b0..d8e47e502785 100644
--- a/drivers/clocksource/time-armada-370-xp.c
+++ b/drivers/clocksource/time-armada-370-xp.c
@@ -96,7 +96,7 @@ static void local_timer_ctrl_clrset(u32 clr, u32 set)
96 local_base + TIMER_CTRL_OFF); 96 local_base + TIMER_CTRL_OFF);
97} 97}
98 98
99static u32 notrace armada_370_xp_read_sched_clock(void) 99static u64 notrace armada_370_xp_read_sched_clock(void)
100{ 100{
101 return ~readl(timer_base + TIMER0_VAL_OFF); 101 return ~readl(timer_base + TIMER0_VAL_OFF);
102} 102}
@@ -258,7 +258,7 @@ static void __init armada_370_xp_timer_common_init(struct device_node *np)
258 /* 258 /*
259 * Set scale and timer for sched_clock. 259 * Set scale and timer for sched_clock.
260 */ 260 */
261 setup_sched_clock(armada_370_xp_read_sched_clock, 32, timer_clk); 261 sched_clock_register(armada_370_xp_read_sched_clock, 32, timer_clk);
262 262
263 /* 263 /*
264 * Setup free-running clocksource timer (interrupts 264 * Setup free-running clocksource timer (interrupts
diff --git a/drivers/clocksource/time-efm32.c b/drivers/clocksource/time-efm32.c
new file mode 100644
index 000000000000..1a6205b7bed3
--- /dev/null
+++ b/drivers/clocksource/time-efm32.c
@@ -0,0 +1,275 @@
1/*
2 * Copyright (C) 2013 Pengutronix
3 * Uwe Kleine-Koenig <u.kleine-koenig@pengutronix.de>
4 *
5 * This program is free software; you can redistribute it and/or modify it under
6 * the terms of the GNU General Public License version 2 as published by the
7 * Free Software Foundation.
8 */
9
10#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
11
12#include <linux/kernel.h>
13#include <linux/clocksource.h>
14#include <linux/clockchips.h>
15#include <linux/irq.h>
16#include <linux/interrupt.h>
17#include <linux/of.h>
18#include <linux/of_address.h>
19#include <linux/of_irq.h>
20#include <linux/clk.h>
21
22#define TIMERn_CTRL 0x00
23#define TIMERn_CTRL_PRESC(val) (((val) & 0xf) << 24)
24#define TIMERn_CTRL_PRESC_1024 TIMERn_CTRL_PRESC(10)
25#define TIMERn_CTRL_CLKSEL(val) (((val) & 0x3) << 16)
26#define TIMERn_CTRL_CLKSEL_PRESCHFPERCLK TIMERn_CTRL_CLKSEL(0)
27#define TIMERn_CTRL_OSMEN 0x00000010
28#define TIMERn_CTRL_MODE(val) (((val) & 0x3) << 0)
29#define TIMERn_CTRL_MODE_UP TIMERn_CTRL_MODE(0)
30#define TIMERn_CTRL_MODE_DOWN TIMERn_CTRL_MODE(1)
31
32#define TIMERn_CMD 0x04
33#define TIMERn_CMD_START 0x00000001
34#define TIMERn_CMD_STOP 0x00000002
35
36#define TIMERn_IEN 0x0c
37#define TIMERn_IF 0x10
38#define TIMERn_IFS 0x14
39#define TIMERn_IFC 0x18
40#define TIMERn_IRQ_UF 0x00000002
41
42#define TIMERn_TOP 0x1c
43#define TIMERn_CNT 0x24
44
45struct efm32_clock_event_ddata {
46 struct clock_event_device evtdev;
47 void __iomem *base;
48 unsigned periodic_top;
49};
50
51static void efm32_clock_event_set_mode(enum clock_event_mode mode,
52 struct clock_event_device *evtdev)
53{
54 struct efm32_clock_event_ddata *ddata =
55 container_of(evtdev, struct efm32_clock_event_ddata, evtdev);
56
57 switch (mode) {
58 case CLOCK_EVT_MODE_PERIODIC:
59 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
60 writel_relaxed(ddata->periodic_top, ddata->base + TIMERn_TOP);
61 writel_relaxed(TIMERn_CTRL_PRESC_1024 |
62 TIMERn_CTRL_CLKSEL_PRESCHFPERCLK |
63 TIMERn_CTRL_MODE_DOWN,
64 ddata->base + TIMERn_CTRL);
65 writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD);
66 break;
67
68 case CLOCK_EVT_MODE_ONESHOT:
69 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
70 writel_relaxed(TIMERn_CTRL_PRESC_1024 |
71 TIMERn_CTRL_CLKSEL_PRESCHFPERCLK |
72 TIMERn_CTRL_OSMEN |
73 TIMERn_CTRL_MODE_DOWN,
74 ddata->base + TIMERn_CTRL);
75 break;
76
77 case CLOCK_EVT_MODE_UNUSED:
78 case CLOCK_EVT_MODE_SHUTDOWN:
79 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
80 break;
81
82 case CLOCK_EVT_MODE_RESUME:
83 break;
84 }
85}
86
87static int efm32_clock_event_set_next_event(unsigned long evt,
88 struct clock_event_device *evtdev)
89{
90 struct efm32_clock_event_ddata *ddata =
91 container_of(evtdev, struct efm32_clock_event_ddata, evtdev);
92
93 writel_relaxed(TIMERn_CMD_STOP, ddata->base + TIMERn_CMD);
94 writel_relaxed(evt, ddata->base + TIMERn_CNT);
95 writel_relaxed(TIMERn_CMD_START, ddata->base + TIMERn_CMD);
96
97 return 0;
98}
99
100static irqreturn_t efm32_clock_event_handler(int irq, void *dev_id)
101{
102 struct efm32_clock_event_ddata *ddata = dev_id;
103
104 writel_relaxed(TIMERn_IRQ_UF, ddata->base + TIMERn_IFC);
105
106 ddata->evtdev.event_handler(&ddata->evtdev);
107
108 return IRQ_HANDLED;
109}
110
111static struct efm32_clock_event_ddata clock_event_ddata = {
112 .evtdev = {
113 .name = "efm32 clockevent",
114 .features = CLOCK_EVT_FEAT_ONESHOT | CLOCK_EVT_MODE_PERIODIC,
115 .set_mode = efm32_clock_event_set_mode,
116 .set_next_event = efm32_clock_event_set_next_event,
117 .rating = 200,
118 },
119};
120
121static struct irqaction efm32_clock_event_irq = {
122 .name = "efm32 clockevent",
123 .flags = IRQF_TIMER,
124 .handler = efm32_clock_event_handler,
125 .dev_id = &clock_event_ddata,
126};
127
128static int __init efm32_clocksource_init(struct device_node *np)
129{
130 struct clk *clk;
131 void __iomem *base;
132 unsigned long rate;
133 int ret;
134
135 clk = of_clk_get(np, 0);
136 if (IS_ERR(clk)) {
137 ret = PTR_ERR(clk);
138 pr_err("failed to get clock for clocksource (%d)\n", ret);
139 goto err_clk_get;
140 }
141
142 ret = clk_prepare_enable(clk);
143 if (ret) {
144 pr_err("failed to enable timer clock for clocksource (%d)\n",
145 ret);
146 goto err_clk_enable;
147 }
148 rate = clk_get_rate(clk);
149
150 base = of_iomap(np, 0);
151 if (!base) {
152 ret = -EADDRNOTAVAIL;
153 pr_err("failed to map registers for clocksource\n");
154 goto err_iomap;
155 }
156
157 writel_relaxed(TIMERn_CTRL_PRESC_1024 |
158 TIMERn_CTRL_CLKSEL_PRESCHFPERCLK |
159 TIMERn_CTRL_MODE_UP, base + TIMERn_CTRL);
160 writel_relaxed(TIMERn_CMD_START, base + TIMERn_CMD);
161
162 ret = clocksource_mmio_init(base + TIMERn_CNT, "efm32 timer",
163 DIV_ROUND_CLOSEST(rate, 1024), 200, 16,
164 clocksource_mmio_readl_up);
165 if (ret) {
166 pr_err("failed to init clocksource (%d)\n", ret);
167 goto err_clocksource_init;
168 }
169
170 return 0;
171
172err_clocksource_init:
173
174 iounmap(base);
175err_iomap:
176
177 clk_disable_unprepare(clk);
178err_clk_enable:
179
180 clk_put(clk);
181err_clk_get:
182
183 return ret;
184}
185
186static int __init efm32_clockevent_init(struct device_node *np)
187{
188 struct clk *clk;
189 void __iomem *base;
190 unsigned long rate;
191 int irq;
192 int ret;
193
194 clk = of_clk_get(np, 0);
195 if (IS_ERR(clk)) {
196 ret = PTR_ERR(clk);
197 pr_err("failed to get clock for clockevent (%d)\n", ret);
198 goto err_clk_get;
199 }
200
201 ret = clk_prepare_enable(clk);
202 if (ret) {
203 pr_err("failed to enable timer clock for clockevent (%d)\n",
204 ret);
205 goto err_clk_enable;
206 }
207 rate = clk_get_rate(clk);
208
209 base = of_iomap(np, 0);
210 if (!base) {
211 ret = -EADDRNOTAVAIL;
212 pr_err("failed to map registers for clockevent\n");
213 goto err_iomap;
214 }
215
216 irq = irq_of_parse_and_map(np, 0);
217 if (!irq) {
218 ret = -ENOENT;
219 pr_err("failed to get irq for clockevent\n");
220 goto err_get_irq;
221 }
222
223 writel_relaxed(TIMERn_IRQ_UF, base + TIMERn_IEN);
224
225 clock_event_ddata.base = base;
226 clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ);
227
228 setup_irq(irq, &efm32_clock_event_irq);
229
230 clockevents_config_and_register(&clock_event_ddata.evtdev,
231 DIV_ROUND_CLOSEST(rate, 1024),
232 0xf, 0xffff);
233
234 return 0;
235
236err_get_irq:
237
238 iounmap(base);
239err_iomap:
240
241 clk_disable_unprepare(clk);
242err_clk_enable:
243
244 clk_put(clk);
245err_clk_get:
246
247 return ret;
248}
249
250/*
251 * This function asserts that we have exactly one clocksource and one
252 * clock_event_device in the end.
253 */
254static void __init efm32_timer_init(struct device_node *np)
255{
256 static int has_clocksource, has_clockevent;
257 int ret;
258
259 if (!has_clocksource) {
260 ret = efm32_clocksource_init(np);
261 if (!ret) {
262 has_clocksource = 1;
263 return;
264 }
265 }
266
267 if (!has_clockevent) {
268 ret = efm32_clockevent_init(np);
269 if (!ret) {
270 has_clockevent = 1;
271 return;
272 }
273 }
274}
275CLOCKSOURCE_OF_DECLARE(efm32, "efm32,timer", efm32_timer_init);
diff --git a/drivers/clocksource/timer-prima2.c b/drivers/clocksource/timer-prima2.c
index ef3cfb269d8b..8a492d34ff9f 100644
--- a/drivers/clocksource/timer-prima2.c
+++ b/drivers/clocksource/timer-prima2.c
@@ -165,9 +165,9 @@ static struct irqaction sirfsoc_timer_irq = {
165}; 165};
166 166
167/* Overwrite weak default sched_clock with more precise one */ 167/* Overwrite weak default sched_clock with more precise one */
168static u32 notrace sirfsoc_read_sched_clock(void) 168static u64 notrace sirfsoc_read_sched_clock(void)
169{ 169{
170 return (u32)(sirfsoc_timer_read(NULL) & 0xffffffff); 170 return sirfsoc_timer_read(NULL);
171} 171}
172 172
173static void __init sirfsoc_clockevent_init(void) 173static void __init sirfsoc_clockevent_init(void)
@@ -206,7 +206,7 @@ static void __init sirfsoc_prima2_timer_init(struct device_node *np)
206 206
207 BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE)); 207 BUG_ON(clocksource_register_hz(&sirfsoc_clocksource, CLOCK_TICK_RATE));
208 208
209 setup_sched_clock(sirfsoc_read_sched_clock, 32, CLOCK_TICK_RATE); 209 sched_clock_register(sirfsoc_read_sched_clock, 64, CLOCK_TICK_RATE);
210 210
211 BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq)); 211 BUG_ON(setup_irq(sirfsoc_timer_irq.irq, &sirfsoc_timer_irq));
212 212
diff --git a/drivers/clocksource/vf_pit_timer.c b/drivers/clocksource/vf_pit_timer.c
index 587e0202a70b..02821b06a39e 100644
--- a/drivers/clocksource/vf_pit_timer.c
+++ b/drivers/clocksource/vf_pit_timer.c
@@ -52,7 +52,7 @@ static inline void pit_irq_acknowledge(void)
52 __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG); 52 __raw_writel(PITTFLG_TIF, clkevt_base + PITTFLG);
53} 53}
54 54
55static unsigned int pit_read_sched_clock(void) 55static u64 pit_read_sched_clock(void)
56{ 56{
57 return __raw_readl(clksrc_base + PITCVAL); 57 return __raw_readl(clksrc_base + PITCVAL);
58} 58}
@@ -64,7 +64,7 @@ static int __init pit_clocksource_init(unsigned long rate)
64 __raw_writel(~0UL, clksrc_base + PITLDVAL); 64 __raw_writel(~0UL, clksrc_base + PITLDVAL);
65 __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL); 65 __raw_writel(PITTCTRL_TEN, clksrc_base + PITTCTRL);
66 66
67 setup_sched_clock(pit_read_sched_clock, 32, rate); 67 sched_clock_register(pit_read_sched_clock, 32, rate);
68 return clocksource_mmio_init(clksrc_base + PITCVAL, "vf-pit", rate, 68 return clocksource_mmio_init(clksrc_base + PITCVAL, "vf-pit", rate,
69 300, 32, clocksource_mmio_readl_down); 69 300, 32, clocksource_mmio_readl_down);
70} 70}
diff --git a/drivers/clocksource/vt8500_timer.c b/drivers/clocksource/vt8500_timer.c
index 64f553f04fa4..ad3c0e83a779 100644
--- a/drivers/clocksource/vt8500_timer.c
+++ b/drivers/clocksource/vt8500_timer.c
@@ -137,14 +137,12 @@ static void __init vt8500_timer_init(struct device_node *np)
137 if (!regbase) { 137 if (!regbase) {
138 pr_err("%s: Missing iobase description in Device Tree\n", 138 pr_err("%s: Missing iobase description in Device Tree\n",
139 __func__); 139 __func__);
140 of_node_put(np);
141 return; 140 return;
142 } 141 }
143 timer_irq = irq_of_parse_and_map(np, 0); 142 timer_irq = irq_of_parse_and_map(np, 0);
144 if (!timer_irq) { 143 if (!timer_irq) {
145 pr_err("%s: Missing irq description in Device Tree\n", 144 pr_err("%s: Missing irq description in Device Tree\n",
146 __func__); 145 __func__);
147 of_node_put(np);
148 return; 146 return;
149 } 147 }
150 148
diff --git a/drivers/rtc/interface.c b/drivers/rtc/interface.c
index 72c5cdbe0791..544be722937c 100644
--- a/drivers/rtc/interface.c
+++ b/drivers/rtc/interface.c
@@ -72,6 +72,7 @@ int rtc_set_time(struct rtc_device *rtc, struct rtc_time *tm)
72 } else 72 } else
73 err = -EINVAL; 73 err = -EINVAL;
74 74
75 pm_stay_awake(rtc->dev.parent);
75 mutex_unlock(&rtc->ops_lock); 76 mutex_unlock(&rtc->ops_lock);
76 /* A timer might have just expired */ 77 /* A timer might have just expired */
77 schedule_work(&rtc->irqwork); 78 schedule_work(&rtc->irqwork);
@@ -113,6 +114,7 @@ int rtc_set_mmss(struct rtc_device *rtc, unsigned long secs)
113 err = -EINVAL; 114 err = -EINVAL;
114 } 115 }
115 116
117 pm_stay_awake(rtc->dev.parent);
116 mutex_unlock(&rtc->ops_lock); 118 mutex_unlock(&rtc->ops_lock);
117 /* A timer might have just expired */ 119 /* A timer might have just expired */
118 schedule_work(&rtc->irqwork); 120 schedule_work(&rtc->irqwork);
@@ -771,9 +773,10 @@ static int rtc_timer_enqueue(struct rtc_device *rtc, struct rtc_timer *timer)
771 alarm.time = rtc_ktime_to_tm(timer->node.expires); 773 alarm.time = rtc_ktime_to_tm(timer->node.expires);
772 alarm.enabled = 1; 774 alarm.enabled = 1;
773 err = __rtc_set_alarm(rtc, &alarm); 775 err = __rtc_set_alarm(rtc, &alarm);
774 if (err == -ETIME) 776 if (err == -ETIME) {
777 pm_stay_awake(rtc->dev.parent);
775 schedule_work(&rtc->irqwork); 778 schedule_work(&rtc->irqwork);
776 else if (err) { 779 } else if (err) {
777 timerqueue_del(&rtc->timerqueue, &timer->node); 780 timerqueue_del(&rtc->timerqueue, &timer->node);
778 timer->enabled = 0; 781 timer->enabled = 0;
779 return err; 782 return err;
@@ -818,8 +821,10 @@ static void rtc_timer_remove(struct rtc_device *rtc, struct rtc_timer *timer)
818 alarm.time = rtc_ktime_to_tm(next->expires); 821 alarm.time = rtc_ktime_to_tm(next->expires);
819 alarm.enabled = 1; 822 alarm.enabled = 1;
820 err = __rtc_set_alarm(rtc, &alarm); 823 err = __rtc_set_alarm(rtc, &alarm);
821 if (err == -ETIME) 824 if (err == -ETIME) {
825 pm_stay_awake(rtc->dev.parent);
822 schedule_work(&rtc->irqwork); 826 schedule_work(&rtc->irqwork);
827 }
823 } 828 }
824} 829}
825 830
@@ -845,7 +850,6 @@ void rtc_timer_do_work(struct work_struct *work)
845 850
846 mutex_lock(&rtc->ops_lock); 851 mutex_lock(&rtc->ops_lock);
847again: 852again:
848 pm_relax(rtc->dev.parent);
849 __rtc_read_time(rtc, &tm); 853 __rtc_read_time(rtc, &tm);
850 now = rtc_tm_to_ktime(tm); 854 now = rtc_tm_to_ktime(tm);
851 while ((next = timerqueue_getnext(&rtc->timerqueue))) { 855 while ((next = timerqueue_getnext(&rtc->timerqueue))) {
@@ -880,6 +884,7 @@ again:
880 } else 884 } else
881 rtc_alarm_disable(rtc); 885 rtc_alarm_disable(rtc);
882 886
887 pm_relax(rtc->dev.parent);
883 mutex_unlock(&rtc->ops_lock); 888 mutex_unlock(&rtc->ops_lock);
884} 889}
885 890
diff --git a/drivers/rtc/rtc-pl031.c b/drivers/rtc/rtc-pl031.c
index 0f0609b1aa2c..e3b25712b659 100644
--- a/drivers/rtc/rtc-pl031.c
+++ b/drivers/rtc/rtc-pl031.c
@@ -371,6 +371,7 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
371 } 371 }
372 } 372 }
373 373
374 device_init_wakeup(&adev->dev, 1);
374 ldata->rtc = rtc_device_register("pl031", &adev->dev, ops, 375 ldata->rtc = rtc_device_register("pl031", &adev->dev, ops,
375 THIS_MODULE); 376 THIS_MODULE);
376 if (IS_ERR(ldata->rtc)) { 377 if (IS_ERR(ldata->rtc)) {
@@ -384,8 +385,6 @@ static int pl031_probe(struct amba_device *adev, const struct amba_id *id)
384 goto out_no_irq; 385 goto out_no_irq;
385 } 386 }
386 387
387 device_init_wakeup(&adev->dev, 1);
388
389 return 0; 388 return 0;
390 389
391out_no_irq: 390out_no_irq:
diff --git a/include/clocksource/arm_arch_timer.h b/include/clocksource/arm_arch_timer.h
index 93b7f96f9c59..6d26b40cbf5d 100644
--- a/include/clocksource/arm_arch_timer.h
+++ b/include/clocksource/arm_arch_timer.h
@@ -33,6 +33,16 @@ enum arch_timer_reg {
33#define ARCH_TIMER_MEM_PHYS_ACCESS 2 33#define ARCH_TIMER_MEM_PHYS_ACCESS 2
34#define ARCH_TIMER_MEM_VIRT_ACCESS 3 34#define ARCH_TIMER_MEM_VIRT_ACCESS 3
35 35
36#define ARCH_TIMER_USR_PCT_ACCESS_EN (1 << 0) /* physical counter */
37#define ARCH_TIMER_USR_VCT_ACCESS_EN (1 << 1) /* virtual counter */
38#define ARCH_TIMER_VIRT_EVT_EN (1 << 2)
39#define ARCH_TIMER_EVT_TRIGGER_SHIFT (4)
40#define ARCH_TIMER_EVT_TRIGGER_MASK (0xF << ARCH_TIMER_EVT_TRIGGER_SHIFT)
41#define ARCH_TIMER_USR_VT_ACCESS_EN (1 << 8) /* virtual timer registers */
42#define ARCH_TIMER_USR_PT_ACCESS_EN (1 << 9) /* physical timer registers */
43
44#define ARCH_TIMER_EVT_STREAM_FREQ 10000 /* 100us */
45
36#ifdef CONFIG_ARM_ARCH_TIMER 46#ifdef CONFIG_ARM_ARCH_TIMER
37 47
38extern u32 arch_timer_get_rate(void); 48extern u32 arch_timer_get_rate(void);
diff --git a/include/linux/clockchips.h b/include/linux/clockchips.h
index 0857922e8ad0..493aa021c7a9 100644
--- a/include/linux/clockchips.h
+++ b/include/linux/clockchips.h
@@ -60,6 +60,7 @@ enum clock_event_mode {
60 * Core shall set the interrupt affinity dynamically in broadcast mode 60 * Core shall set the interrupt affinity dynamically in broadcast mode
61 */ 61 */
62#define CLOCK_EVT_FEAT_DYNIRQ 0x000020 62#define CLOCK_EVT_FEAT_DYNIRQ 0x000020
63#define CLOCK_EVT_FEAT_PERCPU 0x000040
63 64
64/** 65/**
65 * struct clock_event_device - clock event device descriptor 66 * struct clock_event_device - clock event device descriptor
diff --git a/include/linux/clocksource.h b/include/linux/clocksource.h
index dbbf8aa7731b..67301a405712 100644
--- a/include/linux/clocksource.h
+++ b/include/linux/clocksource.h
@@ -292,6 +292,8 @@ extern void clocksource_resume(void);
292extern struct clocksource * __init __weak clocksource_default_clock(void); 292extern struct clocksource * __init __weak clocksource_default_clock(void);
293extern void clocksource_mark_unstable(struct clocksource *cs); 293extern void clocksource_mark_unstable(struct clocksource *cs);
294 294
295extern u64
296clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask);
295extern void 297extern void
296clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec); 298clocks_calc_mult_shift(u32 *mult, u32 *shift, u32 from, u32 to, u32 minsec);
297 299
diff --git a/include/linux/sched_clock.h b/include/linux/sched_clock.h
index fa7922c80a41..cddf0c2940b6 100644
--- a/include/linux/sched_clock.h
+++ b/include/linux/sched_clock.h
@@ -15,7 +15,7 @@ static inline void sched_clock_postinit(void) { }
15#endif 15#endif
16 16
17extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate); 17extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
18 18extern void sched_clock_register(u64 (*read)(void), int bits,
19extern unsigned long long (*sched_clock_func)(void); 19 unsigned long rate);
20 20
21#endif 21#endif
diff --git a/init/Kconfig b/init/Kconfig
index d9887456007a..bc8911fab28e 100644
--- a/init/Kconfig
+++ b/init/Kconfig
@@ -354,7 +354,8 @@ config VIRT_CPU_ACCOUNTING_NATIVE
354 354
355config VIRT_CPU_ACCOUNTING_GEN 355config VIRT_CPU_ACCOUNTING_GEN
356 bool "Full dynticks CPU time accounting" 356 bool "Full dynticks CPU time accounting"
357 depends on HAVE_CONTEXT_TRACKING && 64BIT 357 depends on HAVE_CONTEXT_TRACKING
358 depends on HAVE_VIRT_CPU_ACCOUNTING_GEN
358 select VIRT_CPU_ACCOUNTING 359 select VIRT_CPU_ACCOUNTING
359 select CONTEXT_TRACKING 360 select CONTEXT_TRACKING
360 help 361 help
diff --git a/kernel/time/Kconfig b/kernel/time/Kconfig
index 2b62fe86f9ec..3ce6e8c5f3fc 100644
--- a/kernel/time/Kconfig
+++ b/kernel/time/Kconfig
@@ -100,7 +100,7 @@ config NO_HZ_FULL
100 # RCU_USER_QS dependency 100 # RCU_USER_QS dependency
101 depends on HAVE_CONTEXT_TRACKING 101 depends on HAVE_CONTEXT_TRACKING
102 # VIRT_CPU_ACCOUNTING_GEN dependency 102 # VIRT_CPU_ACCOUNTING_GEN dependency
103 depends on 64BIT 103 depends on HAVE_VIRT_CPU_ACCOUNTING_GEN
104 select NO_HZ_COMMON 104 select NO_HZ_COMMON
105 select RCU_USER_QS 105 select RCU_USER_QS
106 select RCU_NOCB_CPU 106 select RCU_NOCB_CPU
diff --git a/kernel/time/alarmtimer.c b/kernel/time/alarmtimer.c
index eec50fcef9e4..88c9c65a430d 100644
--- a/kernel/time/alarmtimer.c
+++ b/kernel/time/alarmtimer.c
@@ -490,7 +490,7 @@ static int alarm_clock_getres(const clockid_t which_clock, struct timespec *tp)
490 clockid_t baseid = alarm_bases[clock2alarm(which_clock)].base_clockid; 490 clockid_t baseid = alarm_bases[clock2alarm(which_clock)].base_clockid;
491 491
492 if (!alarmtimer_get_rtcdev()) 492 if (!alarmtimer_get_rtcdev())
493 return -ENOTSUPP; 493 return -EINVAL;
494 494
495 return hrtimer_get_res(baseid, tp); 495 return hrtimer_get_res(baseid, tp);
496} 496}
@@ -507,7 +507,7 @@ static int alarm_clock_get(clockid_t which_clock, struct timespec *tp)
507 struct alarm_base *base = &alarm_bases[clock2alarm(which_clock)]; 507 struct alarm_base *base = &alarm_bases[clock2alarm(which_clock)];
508 508
509 if (!alarmtimer_get_rtcdev()) 509 if (!alarmtimer_get_rtcdev())
510 return -ENOTSUPP; 510 return -EINVAL;
511 511
512 *tp = ktime_to_timespec(base->gettime()); 512 *tp = ktime_to_timespec(base->gettime());
513 return 0; 513 return 0;
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c
index 662c5798a685..086ad6043bcb 100644
--- a/kernel/time/clockevents.c
+++ b/kernel/time/clockevents.c
@@ -619,7 +619,7 @@ static ssize_t sysfs_unbind_tick_dev(struct device *dev,
619 const char *buf, size_t count) 619 const char *buf, size_t count)
620{ 620{
621 char name[CS_NAME_LEN]; 621 char name[CS_NAME_LEN];
622 size_t ret = sysfs_get_uname(buf, name, count); 622 ssize_t ret = sysfs_get_uname(buf, name, count);
623 struct clock_event_device *ce; 623 struct clock_event_device *ce;
624 624
625 if (ret < 0) 625 if (ret < 0)
diff --git a/kernel/time/clocksource.c b/kernel/time/clocksource.c
index 50a8736757f3..ba3e502c955a 100644
--- a/kernel/time/clocksource.c
+++ b/kernel/time/clocksource.c
@@ -479,6 +479,7 @@ static inline void clocksource_dequeue_watchdog(struct clocksource *cs) { }
479static inline void clocksource_resume_watchdog(void) { } 479static inline void clocksource_resume_watchdog(void) { }
480static inline int __clocksource_watchdog_kthread(void) { return 0; } 480static inline int __clocksource_watchdog_kthread(void) { return 0; }
481static bool clocksource_is_watchdog(struct clocksource *cs) { return false; } 481static bool clocksource_is_watchdog(struct clocksource *cs) { return false; }
482void clocksource_mark_unstable(struct clocksource *cs) { }
482 483
483#endif /* CONFIG_CLOCKSOURCE_WATCHDOG */ 484#endif /* CONFIG_CLOCKSOURCE_WATCHDOG */
484 485
@@ -537,40 +538,55 @@ static u32 clocksource_max_adjustment(struct clocksource *cs)
537} 538}
538 539
539/** 540/**
540 * clocksource_max_deferment - Returns max time the clocksource can be deferred 541 * clocks_calc_max_nsecs - Returns maximum nanoseconds that can be converted
541 * @cs: Pointer to clocksource 542 * @mult: cycle to nanosecond multiplier
542 * 543 * @shift: cycle to nanosecond divisor (power of two)
544 * @maxadj: maximum adjustment value to mult (~11%)
545 * @mask: bitmask for two's complement subtraction of non 64 bit counters
543 */ 546 */
544static u64 clocksource_max_deferment(struct clocksource *cs) 547u64 clocks_calc_max_nsecs(u32 mult, u32 shift, u32 maxadj, u64 mask)
545{ 548{
546 u64 max_nsecs, max_cycles; 549 u64 max_nsecs, max_cycles;
547 550
548 /* 551 /*
549 * Calculate the maximum number of cycles that we can pass to the 552 * Calculate the maximum number of cycles that we can pass to the
550 * cyc2ns function without overflowing a 64-bit signed result. The 553 * cyc2ns function without overflowing a 64-bit signed result. The
551 * maximum number of cycles is equal to ULLONG_MAX/(cs->mult+cs->maxadj) 554 * maximum number of cycles is equal to ULLONG_MAX/(mult+maxadj)
552 * which is equivalent to the below. 555 * which is equivalent to the below.
553 * max_cycles < (2^63)/(cs->mult + cs->maxadj) 556 * max_cycles < (2^63)/(mult + maxadj)
554 * max_cycles < 2^(log2((2^63)/(cs->mult + cs->maxadj))) 557 * max_cycles < 2^(log2((2^63)/(mult + maxadj)))
555 * max_cycles < 2^(log2(2^63) - log2(cs->mult + cs->maxadj)) 558 * max_cycles < 2^(log2(2^63) - log2(mult + maxadj))
556 * max_cycles < 2^(63 - log2(cs->mult + cs->maxadj)) 559 * max_cycles < 2^(63 - log2(mult + maxadj))
557 * max_cycles < 1 << (63 - log2(cs->mult + cs->maxadj)) 560 * max_cycles < 1 << (63 - log2(mult + maxadj))
558 * Please note that we add 1 to the result of the log2 to account for 561 * Please note that we add 1 to the result of the log2 to account for
559 * any rounding errors, ensure the above inequality is satisfied and 562 * any rounding errors, ensure the above inequality is satisfied and
560 * no overflow will occur. 563 * no overflow will occur.
561 */ 564 */
562 max_cycles = 1ULL << (63 - (ilog2(cs->mult + cs->maxadj) + 1)); 565 max_cycles = 1ULL << (63 - (ilog2(mult + maxadj) + 1));
563 566
564 /* 567 /*
565 * The actual maximum number of cycles we can defer the clocksource is 568 * The actual maximum number of cycles we can defer the clocksource is
566 * determined by the minimum of max_cycles and cs->mask. 569 * determined by the minimum of max_cycles and mask.
567 * Note: Here we subtract the maxadj to make sure we don't sleep for 570 * Note: Here we subtract the maxadj to make sure we don't sleep for
568 * too long if there's a large negative adjustment. 571 * too long if there's a large negative adjustment.
569 */ 572 */
570 max_cycles = min_t(u64, max_cycles, (u64) cs->mask); 573 max_cycles = min(max_cycles, mask);
571 max_nsecs = clocksource_cyc2ns(max_cycles, cs->mult - cs->maxadj, 574 max_nsecs = clocksource_cyc2ns(max_cycles, mult - maxadj, shift);
572 cs->shift); 575
576 return max_nsecs;
577}
578
579/**
580 * clocksource_max_deferment - Returns max time the clocksource can be deferred
581 * @cs: Pointer to clocksource
582 *
583 */
584static u64 clocksource_max_deferment(struct clocksource *cs)
585{
586 u64 max_nsecs;
573 587
588 max_nsecs = clocks_calc_max_nsecs(cs->mult, cs->shift, cs->maxadj,
589 cs->mask);
574 /* 590 /*
575 * To ensure that the clocksource does not wrap whilst we are idle, 591 * To ensure that the clocksource does not wrap whilst we are idle,
576 * limit the time the clocksource can be deferred by 12.5%. Please 592 * limit the time the clocksource can be deferred by 12.5%. Please
@@ -893,7 +909,7 @@ sysfs_show_current_clocksources(struct device *dev,
893 return count; 909 return count;
894} 910}
895 911
896size_t sysfs_get_uname(const char *buf, char *dst, size_t cnt) 912ssize_t sysfs_get_uname(const char *buf, char *dst, size_t cnt)
897{ 913{
898 size_t ret = cnt; 914 size_t ret = cnt;
899 915
@@ -924,7 +940,7 @@ static ssize_t sysfs_override_clocksource(struct device *dev,
924 struct device_attribute *attr, 940 struct device_attribute *attr,
925 const char *buf, size_t count) 941 const char *buf, size_t count)
926{ 942{
927 size_t ret; 943 ssize_t ret;
928 944
929 mutex_lock(&clocksource_mutex); 945 mutex_lock(&clocksource_mutex);
930 946
@@ -952,7 +968,7 @@ static ssize_t sysfs_unbind_clocksource(struct device *dev,
952{ 968{
953 struct clocksource *cs; 969 struct clocksource *cs;
954 char name[CS_NAME_LEN]; 970 char name[CS_NAME_LEN];
955 size_t ret; 971 ssize_t ret;
956 972
957 ret = sysfs_get_uname(buf, name, count); 973 ret = sysfs_get_uname(buf, name, count);
958 if (ret < 0) 974 if (ret < 0)
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c
index bb2215174f05..af8d1d4f3d55 100644
--- a/kernel/time/ntp.c
+++ b/kernel/time/ntp.c
@@ -475,6 +475,7 @@ static void sync_cmos_clock(struct work_struct *work)
475 * called as close as possible to 500 ms before the new second starts. 475 * called as close as possible to 500 ms before the new second starts.
476 * This code is run on a timer. If the clock is set, that timer 476 * This code is run on a timer. If the clock is set, that timer
477 * may not expire at the correct time. Thus, we adjust... 477 * may not expire at the correct time. Thus, we adjust...
478 * We want the clock to be within a couple of ticks from the target.
478 */ 479 */
479 if (!ntp_synced()) { 480 if (!ntp_synced()) {
480 /* 481 /*
@@ -485,7 +486,7 @@ static void sync_cmos_clock(struct work_struct *work)
485 } 486 }
486 487
487 getnstimeofday(&now); 488 getnstimeofday(&now);
488 if (abs(now.tv_nsec - (NSEC_PER_SEC / 2)) <= tick_nsec / 2) { 489 if (abs(now.tv_nsec - (NSEC_PER_SEC / 2)) <= tick_nsec * 5) {
489 struct timespec adjust = now; 490 struct timespec adjust = now;
490 491
491 fail = -ENODEV; 492 fail = -ENODEV;
diff --git a/kernel/time/sched_clock.c b/kernel/time/sched_clock.c
index 0b479a6a22bb..68b799375981 100644
--- a/kernel/time/sched_clock.c
+++ b/kernel/time/sched_clock.c
@@ -8,25 +8,28 @@
8#include <linux/clocksource.h> 8#include <linux/clocksource.h>
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/jiffies.h> 10#include <linux/jiffies.h>
11#include <linux/ktime.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
12#include <linux/moduleparam.h> 13#include <linux/moduleparam.h>
13#include <linux/sched.h> 14#include <linux/sched.h>
14#include <linux/syscore_ops.h> 15#include <linux/syscore_ops.h>
15#include <linux/timer.h> 16#include <linux/hrtimer.h>
16#include <linux/sched_clock.h> 17#include <linux/sched_clock.h>
18#include <linux/seqlock.h>
19#include <linux/bitops.h>
17 20
18struct clock_data { 21struct clock_data {
22 ktime_t wrap_kt;
19 u64 epoch_ns; 23 u64 epoch_ns;
20 u32 epoch_cyc; 24 u64 epoch_cyc;
21 u32 epoch_cyc_copy; 25 seqcount_t seq;
22 unsigned long rate; 26 unsigned long rate;
23 u32 mult; 27 u32 mult;
24 u32 shift; 28 u32 shift;
25 bool suspended; 29 bool suspended;
26}; 30};
27 31
28static void sched_clock_poll(unsigned long wrap_ticks); 32static struct hrtimer sched_clock_timer;
29static DEFINE_TIMER(sched_clock_timer, sched_clock_poll, 0, 0);
30static int irqtime = -1; 33static int irqtime = -1;
31 34
32core_param(irqtime, irqtime, int, 0400); 35core_param(irqtime, irqtime, int, 0400);
@@ -35,42 +38,46 @@ static struct clock_data cd = {
35 .mult = NSEC_PER_SEC / HZ, 38 .mult = NSEC_PER_SEC / HZ,
36}; 39};
37 40
38static u32 __read_mostly sched_clock_mask = 0xffffffff; 41static u64 __read_mostly sched_clock_mask;
39 42
40static u32 notrace jiffy_sched_clock_read(void) 43static u64 notrace jiffy_sched_clock_read(void)
41{ 44{
42 return (u32)(jiffies - INITIAL_JIFFIES); 45 /*
46 * We don't need to use get_jiffies_64 on 32-bit arches here
47 * because we register with BITS_PER_LONG
48 */
49 return (u64)(jiffies - INITIAL_JIFFIES);
43} 50}
44 51
45static u32 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read; 52static u32 __read_mostly (*read_sched_clock_32)(void);
53
54static u64 notrace read_sched_clock_32_wrapper(void)
55{
56 return read_sched_clock_32();
57}
58
59static u64 __read_mostly (*read_sched_clock)(void) = jiffy_sched_clock_read;
46 60
47static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift) 61static inline u64 notrace cyc_to_ns(u64 cyc, u32 mult, u32 shift)
48{ 62{
49 return (cyc * mult) >> shift; 63 return (cyc * mult) >> shift;
50} 64}
51 65
52static unsigned long long notrace sched_clock_32(void) 66unsigned long long notrace sched_clock(void)
53{ 67{
54 u64 epoch_ns; 68 u64 epoch_ns;
55 u32 epoch_cyc; 69 u64 epoch_cyc;
56 u32 cyc; 70 u64 cyc;
71 unsigned long seq;
57 72
58 if (cd.suspended) 73 if (cd.suspended)
59 return cd.epoch_ns; 74 return cd.epoch_ns;
60 75
61 /*
62 * Load the epoch_cyc and epoch_ns atomically. We do this by
63 * ensuring that we always write epoch_cyc, epoch_ns and
64 * epoch_cyc_copy in strict order, and read them in strict order.
65 * If epoch_cyc and epoch_cyc_copy are not equal, then we're in
66 * the middle of an update, and we should repeat the load.
67 */
68 do { 76 do {
77 seq = read_seqcount_begin(&cd.seq);
69 epoch_cyc = cd.epoch_cyc; 78 epoch_cyc = cd.epoch_cyc;
70 smp_rmb();
71 epoch_ns = cd.epoch_ns; 79 epoch_ns = cd.epoch_ns;
72 smp_rmb(); 80 } while (read_seqcount_retry(&cd.seq, seq));
73 } while (epoch_cyc != cd.epoch_cyc_copy);
74 81
75 cyc = read_sched_clock(); 82 cyc = read_sched_clock();
76 cyc = (cyc - epoch_cyc) & sched_clock_mask; 83 cyc = (cyc - epoch_cyc) & sched_clock_mask;
@@ -83,49 +90,46 @@ static unsigned long long notrace sched_clock_32(void)
83static void notrace update_sched_clock(void) 90static void notrace update_sched_clock(void)
84{ 91{
85 unsigned long flags; 92 unsigned long flags;
86 u32 cyc; 93 u64 cyc;
87 u64 ns; 94 u64 ns;
88 95
89 cyc = read_sched_clock(); 96 cyc = read_sched_clock();
90 ns = cd.epoch_ns + 97 ns = cd.epoch_ns +
91 cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask, 98 cyc_to_ns((cyc - cd.epoch_cyc) & sched_clock_mask,
92 cd.mult, cd.shift); 99 cd.mult, cd.shift);
93 /* 100
94 * Write epoch_cyc and epoch_ns in a way that the update is
95 * detectable in cyc_to_fixed_sched_clock().
96 */
97 raw_local_irq_save(flags); 101 raw_local_irq_save(flags);
98 cd.epoch_cyc_copy = cyc; 102 write_seqcount_begin(&cd.seq);
99 smp_wmb();
100 cd.epoch_ns = ns; 103 cd.epoch_ns = ns;
101 smp_wmb();
102 cd.epoch_cyc = cyc; 104 cd.epoch_cyc = cyc;
105 write_seqcount_end(&cd.seq);
103 raw_local_irq_restore(flags); 106 raw_local_irq_restore(flags);
104} 107}
105 108
106static void sched_clock_poll(unsigned long wrap_ticks) 109static enum hrtimer_restart sched_clock_poll(struct hrtimer *hrt)
107{ 110{
108 mod_timer(&sched_clock_timer, round_jiffies(jiffies + wrap_ticks));
109 update_sched_clock(); 111 update_sched_clock();
112 hrtimer_forward_now(hrt, cd.wrap_kt);
113 return HRTIMER_RESTART;
110} 114}
111 115
112void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate) 116void __init sched_clock_register(u64 (*read)(void), int bits,
117 unsigned long rate)
113{ 118{
114 unsigned long r, w; 119 unsigned long r;
115 u64 res, wrap; 120 u64 res, wrap;
116 char r_unit; 121 char r_unit;
117 122
118 if (cd.rate > rate) 123 if (cd.rate > rate)
119 return; 124 return;
120 125
121 BUG_ON(bits > 32);
122 WARN_ON(!irqs_disabled()); 126 WARN_ON(!irqs_disabled());
123 read_sched_clock = read; 127 read_sched_clock = read;
124 sched_clock_mask = (1ULL << bits) - 1; 128 sched_clock_mask = CLOCKSOURCE_MASK(bits);
125 cd.rate = rate; 129 cd.rate = rate;
126 130
127 /* calculate the mult/shift to convert counter ticks to ns. */ 131 /* calculate the mult/shift to convert counter ticks to ns. */
128 clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 0); 132 clocks_calc_mult_shift(&cd.mult, &cd.shift, rate, NSEC_PER_SEC, 3600);
129 133
130 r = rate; 134 r = rate;
131 if (r >= 4000000) { 135 if (r >= 4000000) {
@@ -138,20 +142,14 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
138 r_unit = ' '; 142 r_unit = ' ';
139 143
140 /* calculate how many ns until we wrap */ 144 /* calculate how many ns until we wrap */
141 wrap = cyc_to_ns((1ULL << bits) - 1, cd.mult, cd.shift); 145 wrap = clocks_calc_max_nsecs(cd.mult, cd.shift, 0, sched_clock_mask);
142 do_div(wrap, NSEC_PER_MSEC); 146 cd.wrap_kt = ns_to_ktime(wrap - (wrap >> 3));
143 w = wrap;
144 147
145 /* calculate the ns resolution of this counter */ 148 /* calculate the ns resolution of this counter */
146 res = cyc_to_ns(1ULL, cd.mult, cd.shift); 149 res = cyc_to_ns(1ULL, cd.mult, cd.shift);
147 pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lums\n", 150 pr_info("sched_clock: %u bits at %lu%cHz, resolution %lluns, wraps every %lluns\n",
148 bits, r, r_unit, res, w); 151 bits, r, r_unit, res, wrap);
149 152
150 /*
151 * Start the timer to keep sched_clock() properly updated and
152 * sets the initial epoch.
153 */
154 sched_clock_timer.data = msecs_to_jiffies(w - (w / 10));
155 update_sched_clock(); 153 update_sched_clock();
156 154
157 /* 155 /*
@@ -166,11 +164,10 @@ void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
166 pr_debug("Registered %pF as sched_clock source\n", read); 164 pr_debug("Registered %pF as sched_clock source\n", read);
167} 165}
168 166
169unsigned long long __read_mostly (*sched_clock_func)(void) = sched_clock_32; 167void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
170
171unsigned long long notrace sched_clock(void)
172{ 168{
173 return sched_clock_func(); 169 read_sched_clock_32 = read;
170 sched_clock_register(read_sched_clock_32_wrapper, bits, rate);
174} 171}
175 172
176void __init sched_clock_postinit(void) 173void __init sched_clock_postinit(void)
@@ -180,14 +177,22 @@ void __init sched_clock_postinit(void)
180 * make it the final one one. 177 * make it the final one one.
181 */ 178 */
182 if (read_sched_clock == jiffy_sched_clock_read) 179 if (read_sched_clock == jiffy_sched_clock_read)
183 setup_sched_clock(jiffy_sched_clock_read, 32, HZ); 180 sched_clock_register(jiffy_sched_clock_read, BITS_PER_LONG, HZ);
184 181
185 sched_clock_poll(sched_clock_timer.data); 182 update_sched_clock();
183
184 /*
185 * Start the timer to keep sched_clock() properly updated and
186 * sets the initial epoch.
187 */
188 hrtimer_init(&sched_clock_timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
189 sched_clock_timer.function = sched_clock_poll;
190 hrtimer_start(&sched_clock_timer, cd.wrap_kt, HRTIMER_MODE_REL);
186} 191}
187 192
188static int sched_clock_suspend(void) 193static int sched_clock_suspend(void)
189{ 194{
190 sched_clock_poll(sched_clock_timer.data); 195 sched_clock_poll(&sched_clock_timer);
191 cd.suspended = true; 196 cd.suspended = true;
192 return 0; 197 return 0;
193} 198}
@@ -195,7 +200,6 @@ static int sched_clock_suspend(void)
195static void sched_clock_resume(void) 200static void sched_clock_resume(void)
196{ 201{
197 cd.epoch_cyc = read_sched_clock(); 202 cd.epoch_cyc = read_sched_clock();
198 cd.epoch_cyc_copy = cd.epoch_cyc;
199 cd.suspended = false; 203 cd.suspended = false;
200} 204}
201 205
diff --git a/kernel/time/tick-broadcast.c b/kernel/time/tick-broadcast.c
index 218bcb565fed..9532690daaa9 100644
--- a/kernel/time/tick-broadcast.c
+++ b/kernel/time/tick-broadcast.c
@@ -70,6 +70,7 @@ static bool tick_check_broadcast_device(struct clock_event_device *curdev,
70 struct clock_event_device *newdev) 70 struct clock_event_device *newdev)
71{ 71{
72 if ((newdev->features & CLOCK_EVT_FEAT_DUMMY) || 72 if ((newdev->features & CLOCK_EVT_FEAT_DUMMY) ||
73 (newdev->features & CLOCK_EVT_FEAT_PERCPU) ||
73 (newdev->features & CLOCK_EVT_FEAT_C3STOP)) 74 (newdev->features & CLOCK_EVT_FEAT_C3STOP))
74 return false; 75 return false;
75 76
diff --git a/kernel/time/tick-internal.h b/kernel/time/tick-internal.h
index bc906cad709b..18e71f7fbc2a 100644
--- a/kernel/time/tick-internal.h
+++ b/kernel/time/tick-internal.h
@@ -31,7 +31,7 @@ extern void tick_install_replacement(struct clock_event_device *dev);
31 31
32extern void clockevents_shutdown(struct clock_event_device *dev); 32extern void clockevents_shutdown(struct clock_event_device *dev);
33 33
34extern size_t sysfs_get_uname(const char *buf, char *dst, size_t cnt); 34extern ssize_t sysfs_get_uname(const char *buf, char *dst, size_t cnt);
35 35
36/* 36/*
37 * NO_HZ / high resolution timer shared code 37 * NO_HZ / high resolution timer shared code
diff --git a/kernel/time/timekeeping.c b/kernel/time/timekeeping.c
index 947ba25a95a0..3abf53418b67 100644
--- a/kernel/time/timekeeping.c
+++ b/kernel/time/timekeeping.c
@@ -1613,9 +1613,10 @@ void get_xtime_and_monotonic_and_sleep_offset(struct timespec *xtim,
1613 * ktime_get_update_offsets - hrtimer helper 1613 * ktime_get_update_offsets - hrtimer helper
1614 * @offs_real: pointer to storage for monotonic -> realtime offset 1614 * @offs_real: pointer to storage for monotonic -> realtime offset
1615 * @offs_boot: pointer to storage for monotonic -> boottime offset 1615 * @offs_boot: pointer to storage for monotonic -> boottime offset
1616 * @offs_tai: pointer to storage for monotonic -> clock tai offset
1616 * 1617 *
1617 * Returns current monotonic time and updates the offsets 1618 * Returns current monotonic time and updates the offsets
1618 * Called from hrtimer_interupt() or retrigger_next_event() 1619 * Called from hrtimer_interrupt() or retrigger_next_event()
1619 */ 1620 */
1620ktime_t ktime_get_update_offsets(ktime_t *offs_real, ktime_t *offs_boot, 1621ktime_t ktime_get_update_offsets(ktime_t *offs_real, ktime_t *offs_boot,
1621 ktime_t *offs_tai) 1622 ktime_t *offs_tai)
diff --git a/kernel/time/timer_stats.c b/kernel/time/timer_stats.c
index 0b537f27b559..1fb08f21302e 100644
--- a/kernel/time/timer_stats.c
+++ b/kernel/time/timer_stats.c
@@ -298,15 +298,15 @@ static int tstats_show(struct seq_file *m, void *v)
298 period = ktime_to_timespec(time); 298 period = ktime_to_timespec(time);
299 ms = period.tv_nsec / 1000000; 299 ms = period.tv_nsec / 1000000;
300 300
301 seq_puts(m, "Timer Stats Version: v0.2\n"); 301 seq_puts(m, "Timer Stats Version: v0.3\n");
302 seq_printf(m, "Sample period: %ld.%03ld s\n", period.tv_sec, ms); 302 seq_printf(m, "Sample period: %ld.%03ld s\n", period.tv_sec, ms);
303 if (atomic_read(&overflow_count)) 303 if (atomic_read(&overflow_count))
304 seq_printf(m, "Overflow: %d entries\n", 304 seq_printf(m, "Overflow: %d entries\n", atomic_read(&overflow_count));
305 atomic_read(&overflow_count)); 305 seq_printf(m, "Collection: %s\n", timer_stats_active ? "active" : "inactive");
306 306
307 for (i = 0; i < nr_entries; i++) { 307 for (i = 0; i < nr_entries; i++) {
308 entry = entries + i; 308 entry = entries + i;
309 if (entry->timer_flag & TIMER_STATS_FLAG_DEFERRABLE) { 309 if (entry->timer_flag & TIMER_STATS_FLAG_DEFERRABLE) {
310 seq_printf(m, "%4luD, %5d %-16s ", 310 seq_printf(m, "%4luD, %5d %-16s ",
311 entry->count, entry->pid, entry->comm); 311 entry->count, entry->pid, entry->comm);
312 } else { 312 } else {
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-14 12:53:20 -0500