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-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7790.c32
1 files changed, 16 insertions, 16 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
index 1375709422c7..5a45ab0877e5 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7790.c
@@ -3278,28 +3278,28 @@ static const unsigned int vin0_data_b_mux[] = {
3278 VI0_DATA3_VI0_B3_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK, 3278 VI0_DATA3_VI0_B3_MARK, VI0_DATA4_VI0_B4_MARK, VI0_DATA5_VI0_B5_MARK,
3279 VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK, 3279 VI0_DATA6_VI0_B6_MARK, VI0_DATA7_VI0_B7_MARK,
3280}; 3280};
3281static const unsigned int vin0_hsync_signal_pins[] = { 3281static const unsigned int vin0_hsync_pins[] = {
3282 RCAR_GP_PIN(0, 12), 3282 RCAR_GP_PIN(0, 12),
3283}; 3283};
3284static const unsigned int vin0_hsync_signal_mux[] = { 3284static const unsigned int vin0_hsync_mux[] = {
3285 VI0_HSYNC_N_MARK, 3285 VI0_HSYNC_N_MARK,
3286}; 3286};
3287static const unsigned int vin0_vsync_signal_pins[] = { 3287static const unsigned int vin0_vsync_pins[] = {
3288 RCAR_GP_PIN(0, 13), 3288 RCAR_GP_PIN(0, 13),
3289}; 3289};
3290static const unsigned int vin0_vsync_signal_mux[] = { 3290static const unsigned int vin0_vsync_mux[] = {
3291 VI0_VSYNC_N_MARK, 3291 VI0_VSYNC_N_MARK,
3292}; 3292};
3293static const unsigned int vin0_field_signal_pins[] = { 3293static const unsigned int vin0_field_pins[] = {
3294 RCAR_GP_PIN(0, 15), 3294 RCAR_GP_PIN(0, 15),
3295}; 3295};
3296static const unsigned int vin0_field_signal_mux[] = { 3296static const unsigned int vin0_field_mux[] = {
3297 VI0_FIELD_MARK, 3297 VI0_FIELD_MARK,
3298}; 3298};
3299static const unsigned int vin0_data_enable_pins[] = { 3299static const unsigned int vin0_clkenb_pins[] = {
3300 RCAR_GP_PIN(0, 14), 3300 RCAR_GP_PIN(0, 14),
3301}; 3301};
3302static const unsigned int vin0_data_enable_mux[] = { 3302static const unsigned int vin0_clkenb_mux[] = {
3303 VI0_CLKENB_MARK, 3303 VI0_CLKENB_MARK,
3304}; 3304};
3305static const unsigned int vin0_clk_pins[] = { 3305static const unsigned int vin0_clk_pins[] = {
@@ -3535,10 +3535,10 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
3535 SH_PFC_PIN_GROUP(vin0_data_g), 3535 SH_PFC_PIN_GROUP(vin0_data_g),
3536 SH_PFC_PIN_GROUP(vin0_data_r), 3536 SH_PFC_PIN_GROUP(vin0_data_r),
3537 SH_PFC_PIN_GROUP(vin0_data_b), 3537 SH_PFC_PIN_GROUP(vin0_data_b),
3538 SH_PFC_PIN_GROUP(vin0_hsync_signal), 3538 SH_PFC_PIN_GROUP(vin0_hsync),
3539 SH_PFC_PIN_GROUP(vin0_vsync_signal), 3539 SH_PFC_PIN_GROUP(vin0_vsync),
3540 SH_PFC_PIN_GROUP(vin0_field_signal), 3540 SH_PFC_PIN_GROUP(vin0_field),
3541 SH_PFC_PIN_GROUP(vin0_data_enable), 3541 SH_PFC_PIN_GROUP(vin0_clkenb),
3542 SH_PFC_PIN_GROUP(vin0_clk), 3542 SH_PFC_PIN_GROUP(vin0_clk),
3543 SH_PFC_PIN_GROUP(vin1_data), 3543 SH_PFC_PIN_GROUP(vin1_data),
3544 SH_PFC_PIN_GROUP(vin1_clk), 3544 SH_PFC_PIN_GROUP(vin1_clk),
@@ -3861,10 +3861,10 @@ static const char * const vin0_groups[] = {
3861 "vin0_data_g", 3861 "vin0_data_g",
3862 "vin0_data_r", 3862 "vin0_data_r",
3863 "vin0_data_b", 3863 "vin0_data_b",
3864 "vin0_hsync_signal", 3864 "vin0_hsync",
3865 "vin0_vsync_signal", 3865 "vin0_vsync",
3866 "vin0_field_signal", 3866 "vin0_field",
3867 "vin0_data_enable", 3867 "vin0_clkenb",
3868 "vin0_clk", 3868 "vin0_clk",
3869}; 3869};
3870 3870