diff options
-rw-r--r-- | arch/powerpc/include/asm/ppc-opcode.h | 4 | ||||
-rw-r--r-- | arch/powerpc/kernel/traps.c | 10 |
2 files changed, 12 insertions, 2 deletions
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h index 0c34e4803499..eccfc161e58e 100644 --- a/arch/powerpc/include/asm/ppc-opcode.h +++ b/arch/powerpc/include/asm/ppc-opcode.h | |||
@@ -115,6 +115,10 @@ | |||
115 | #define PPC_INST_MFSPR_DSCR_MASK 0xfc1fffff | 115 | #define PPC_INST_MFSPR_DSCR_MASK 0xfc1fffff |
116 | #define PPC_INST_MTSPR_DSCR 0x7c1103a6 | 116 | #define PPC_INST_MTSPR_DSCR 0x7c1103a6 |
117 | #define PPC_INST_MTSPR_DSCR_MASK 0xfc1fffff | 117 | #define PPC_INST_MTSPR_DSCR_MASK 0xfc1fffff |
118 | #define PPC_INST_MFSPR_DSCR_USER 0x7c0302a6 | ||
119 | #define PPC_INST_MFSPR_DSCR_USER_MASK 0xfc1fffff | ||
120 | #define PPC_INST_MTSPR_DSCR_USER 0x7c0303a6 | ||
121 | #define PPC_INST_MTSPR_DSCR_USER_MASK 0xfc1fffff | ||
118 | #define PPC_INST_SLBFEE 0x7c0007a7 | 122 | #define PPC_INST_SLBFEE 0x7c0007a7 |
119 | 123 | ||
120 | #define PPC_INST_STRING 0x7c00042a | 124 | #define PPC_INST_STRING 0x7c00042a |
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 37cc40ef5043..83efa2f7d926 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -970,7 +970,10 @@ static int emulate_instruction(struct pt_regs *regs) | |||
970 | 970 | ||
971 | #ifdef CONFIG_PPC64 | 971 | #ifdef CONFIG_PPC64 |
972 | /* Emulate the mfspr rD, DSCR. */ | 972 | /* Emulate the mfspr rD, DSCR. */ |
973 | if (((instword & PPC_INST_MFSPR_DSCR_MASK) == PPC_INST_MFSPR_DSCR) && | 973 | if ((((instword & PPC_INST_MFSPR_DSCR_USER_MASK) == |
974 | PPC_INST_MFSPR_DSCR_USER) || | ||
975 | ((instword & PPC_INST_MFSPR_DSCR_MASK) == | ||
976 | PPC_INST_MFSPR_DSCR)) && | ||
974 | cpu_has_feature(CPU_FTR_DSCR)) { | 977 | cpu_has_feature(CPU_FTR_DSCR)) { |
975 | PPC_WARN_EMULATED(mfdscr, regs); | 978 | PPC_WARN_EMULATED(mfdscr, regs); |
976 | rd = (instword >> 21) & 0x1f; | 979 | rd = (instword >> 21) & 0x1f; |
@@ -978,7 +981,10 @@ static int emulate_instruction(struct pt_regs *regs) | |||
978 | return 0; | 981 | return 0; |
979 | } | 982 | } |
980 | /* Emulate the mtspr DSCR, rD. */ | 983 | /* Emulate the mtspr DSCR, rD. */ |
981 | if (((instword & PPC_INST_MTSPR_DSCR_MASK) == PPC_INST_MTSPR_DSCR) && | 984 | if ((((instword & PPC_INST_MTSPR_DSCR_USER_MASK) == |
985 | PPC_INST_MTSPR_DSCR_USER) || | ||
986 | ((instword & PPC_INST_MTSPR_DSCR_MASK) == | ||
987 | PPC_INST_MTSPR_DSCR)) && | ||
982 | cpu_has_feature(CPU_FTR_DSCR)) { | 988 | cpu_has_feature(CPU_FTR_DSCR)) { |
983 | PPC_WARN_EMULATED(mtdscr, regs); | 989 | PPC_WARN_EMULATED(mtdscr, regs); |
984 | rd = (instword >> 21) & 0x1f; | 990 | rd = (instword >> 21) & 0x1f; |