diff options
-rw-r--r-- | arch/sh/include/asm/hwblk.h | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/Makefile | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/Makefile | 2 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/clock-sh7722.c | 77 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | 106 | ||||
-rw-r--r-- | arch/sh/kernel/cpu/shmobile/Makefile | 2 | ||||
-rw-r--r-- | drivers/sh/Makefile | 1 |
7 files changed, 45 insertions, 147 deletions
diff --git a/arch/sh/include/asm/hwblk.h b/arch/sh/include/asm/hwblk.h index 567c9aa1ced9..d6b7deaaeca3 100644 --- a/arch/sh/include/asm/hwblk.h +++ b/arch/sh/include/asm/hwblk.h | |||
@@ -44,7 +44,7 @@ struct hwblk_info { | |||
44 | int nr_hwblks; | 44 | int nr_hwblks; |
45 | }; | 45 | }; |
46 | 46 | ||
47 | #if !defined(CONFIG_CPU_SUBTYPE_SH7724) | 47 | #if !defined(CONFIG_CPU_SUBTYPE_SH7724) && !defined(CONFIG_CPU_SUBTYPE_SH7722) |
48 | /* Should be defined by processor-specific code */ | 48 | /* Should be defined by processor-specific code */ |
49 | int arch_hwblk_init(void); | 49 | int arch_hwblk_init(void); |
50 | int arch_hwblk_sleep_mode(void); | 50 | int arch_hwblk_sleep_mode(void); |
diff --git a/arch/sh/kernel/cpu/Makefile b/arch/sh/kernel/cpu/Makefile index b937f1a17a4b..b1f515cb4c79 100644 --- a/arch/sh/kernel/cpu/Makefile +++ b/arch/sh/kernel/cpu/Makefile | |||
@@ -19,6 +19,6 @@ obj-$(CONFIG_SH_ADC) += adc.o | |||
19 | obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o | 19 | obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o |
20 | 20 | ||
21 | obj-y += irq/ init.o clock.o fpu.o proc.o | 21 | obj-y += irq/ init.o clock.o fpu.o proc.o |
22 | ifneq ($(CONFIG_CPU_SUBTYPE_SH7724),y) | 22 | ifneq ($(CONFIG_CPU_SUBTYPE_SH7724)$(CONFIG_CPU_SUBTYPE_SH7722),y) |
23 | obj-y += hwblk.o | 23 | obj-y += hwblk.o |
24 | endif | 24 | endif |
diff --git a/arch/sh/kernel/cpu/sh4a/Makefile b/arch/sh/kernel/cpu/sh4a/Makefile index cb932872abad..9f28773d678d 100644 --- a/arch/sh/kernel/cpu/sh4a/Makefile +++ b/arch/sh/kernel/cpu/sh4a/Makefile | |||
@@ -27,7 +27,7 @@ clock-$(CONFIG_CPU_SUBTYPE_SH7780) := clock-sh7780.o | |||
27 | clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o | 27 | clock-$(CONFIG_CPU_SUBTYPE_SH7785) := clock-sh7785.o |
28 | clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o | 28 | clock-$(CONFIG_CPU_SUBTYPE_SH7786) := clock-sh7786.o |
29 | clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o | 29 | clock-$(CONFIG_CPU_SUBTYPE_SH7343) := clock-sh7343.o |
30 | clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o hwblk-sh7722.o | 30 | clock-$(CONFIG_CPU_SUBTYPE_SH7722) := clock-sh7722.o |
31 | clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o | 31 | clock-$(CONFIG_CPU_SUBTYPE_SH7723) := clock-sh7723.o hwblk-sh7723.o |
32 | clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o | 32 | clock-$(CONFIG_CPU_SUBTYPE_SH7724) := clock-sh7724.o |
33 | clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o | 33 | clock-$(CONFIG_CPU_SUBTYPE_SH7366) := clock-sh7366.o |
diff --git a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c index c9a48088ad47..212c72ef959c 100644 --- a/arch/sh/kernel/cpu/sh4a/clock-sh7722.c +++ b/arch/sh/kernel/cpu/sh4a/clock-sh7722.c | |||
@@ -22,8 +22,8 @@ | |||
22 | #include <linux/kernel.h> | 22 | #include <linux/kernel.h> |
23 | #include <linux/io.h> | 23 | #include <linux/io.h> |
24 | #include <linux/clkdev.h> | 24 | #include <linux/clkdev.h> |
25 | #include <linux/sh_clk.h> | ||
25 | #include <asm/clock.h> | 26 | #include <asm/clock.h> |
26 | #include <asm/hwblk.h> | ||
27 | #include <cpu/sh7722.h> | 27 | #include <cpu/sh7722.h> |
28 | 28 | ||
29 | /* SH7722 registers */ | 29 | /* SH7722 registers */ |
@@ -33,6 +33,9 @@ | |||
33 | #define SCLKBCR 0xa415000c | 33 | #define SCLKBCR 0xa415000c |
34 | #define IRDACLKCR 0xa4150018 | 34 | #define IRDACLKCR 0xa4150018 |
35 | #define PLLCR 0xa4150024 | 35 | #define PLLCR 0xa4150024 |
36 | #define MSTPCR0 0xa4150030 | ||
37 | #define MSTPCR1 0xa4150034 | ||
38 | #define MSTPCR2 0xa4150038 | ||
36 | #define DLLFRQ 0xa4150050 | 39 | #define DLLFRQ 0xa4150050 |
37 | 40 | ||
38 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ | 41 | /* Fixed 32 KHz root clock for RTC and Power Management purposes */ |
@@ -148,31 +151,31 @@ struct clk div6_clks[DIV6_NR] = { | |||
148 | }; | 151 | }; |
149 | 152 | ||
150 | static struct clk mstp_clks[HWBLK_NR] = { | 153 | static struct clk mstp_clks[HWBLK_NR] = { |
151 | SH_HWBLK_CLK(HWBLK_URAM, &div4_clks[DIV4_U], CLK_ENABLE_ON_INIT), | 154 | [HWBLK_URAM] = SH_CLK_MSTP32(&div4_clks[DIV4_U], MSTPCR0, 28, CLK_ENABLE_ON_INIT), |
152 | SH_HWBLK_CLK(HWBLK_XYMEM, &div4_clks[DIV4_B], CLK_ENABLE_ON_INIT), | 155 | [HWBLK_XYMEM] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR0, 26, CLK_ENABLE_ON_INIT), |
153 | SH_HWBLK_CLK(HWBLK_TMU, &div4_clks[DIV4_P], 0), | 156 | [HWBLK_TMU] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 15, 0), |
154 | SH_HWBLK_CLK(HWBLK_CMT, &r_clk, 0), | 157 | [HWBLK_CMT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 14, 0), |
155 | SH_HWBLK_CLK(HWBLK_RWDT, &r_clk, 0), | 158 | [HWBLK_RWDT] = SH_CLK_MSTP32(&r_clk, MSTPCR0, 13, 0), |
156 | SH_HWBLK_CLK(HWBLK_FLCTL, &div4_clks[DIV4_P], 0), | 159 | [HWBLK_FLCTL] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 10, 0), |
157 | SH_HWBLK_CLK(HWBLK_SCIF0, &div4_clks[DIV4_P], 0), | 160 | [HWBLK_SCIF0] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 7, 0), |
158 | SH_HWBLK_CLK(HWBLK_SCIF1, &div4_clks[DIV4_P], 0), | 161 | [HWBLK_SCIF1] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 6, 0), |
159 | SH_HWBLK_CLK(HWBLK_SCIF2, &div4_clks[DIV4_P], 0), | 162 | [HWBLK_SCIF2] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR0, 5, 0), |
160 | 163 | ||
161 | SH_HWBLK_CLK(HWBLK_IIC, &div4_clks[DIV4_P], 0), | 164 | [HWBLK_IIC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR1, 9, 0), |
162 | SH_HWBLK_CLK(HWBLK_RTC, &r_clk, 0), | 165 | [HWBLK_RTC] = SH_CLK_MSTP32(&r_clk, MSTPCR1, 8, 0), |
163 | 166 | ||
164 | SH_HWBLK_CLK(HWBLK_SDHI, &div4_clks[DIV4_P], 0), | 167 | [HWBLK_SDHI] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 18, 0), |
165 | SH_HWBLK_CLK(HWBLK_KEYSC, &r_clk, 0), | 168 | [HWBLK_KEYSC] = SH_CLK_MSTP32(&r_clk, MSTPCR2, 14, 0), |
166 | SH_HWBLK_CLK(HWBLK_USBF, &div4_clks[DIV4_P], 0), | 169 | [HWBLK_USBF] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 11, 0), |
167 | SH_HWBLK_CLK(HWBLK_2DG, &div4_clks[DIV4_B], 0), | 170 | [HWBLK_2DG] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 9, 0), |
168 | SH_HWBLK_CLK(HWBLK_SIU, &div4_clks[DIV4_B], 0), | 171 | [HWBLK_SIU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 8, 0), |
169 | SH_HWBLK_CLK(HWBLK_VOU, &div4_clks[DIV4_B], 0), | 172 | [HWBLK_JPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 6, 0), |
170 | SH_HWBLK_CLK(HWBLK_JPU, &div4_clks[DIV4_B], 0), | 173 | [HWBLK_VOU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 5, 0), |
171 | SH_HWBLK_CLK(HWBLK_BEU, &div4_clks[DIV4_B], 0), | 174 | [HWBLK_BEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 4, 0), |
172 | SH_HWBLK_CLK(HWBLK_CEU, &div4_clks[DIV4_B], 0), | 175 | [HWBLK_CEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 3, 0), |
173 | SH_HWBLK_CLK(HWBLK_VEU, &div4_clks[DIV4_B], 0), | 176 | [HWBLK_VEU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 2, 0), |
174 | SH_HWBLK_CLK(HWBLK_VPU, &div4_clks[DIV4_B], 0), | 177 | [HWBLK_VPU] = SH_CLK_MSTP32(&div4_clks[DIV4_B], MSTPCR2, 1, 0), |
175 | SH_HWBLK_CLK(HWBLK_LCDC, &div4_clks[DIV4_P], 0), | 178 | [HWBLK_LCDC] = SH_CLK_MSTP32(&div4_clks[DIV4_P], MSTPCR2, 0, 0), |
176 | }; | 179 | }; |
177 | 180 | ||
178 | static struct clk_lookup lookups[] = { | 181 | static struct clk_lookup lookups[] = { |
@@ -205,27 +208,27 @@ static struct clk_lookup lookups[] = { | |||
205 | CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]), | 208 | CLKDEV_ICK_ID("tmu_fck", "sh_tmu.2", &mstp_clks[HWBLK_TMU]), |
206 | 209 | ||
207 | CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]), | 210 | CLKDEV_CON_ID("cmt_fck", &mstp_clks[HWBLK_CMT]), |
208 | CLKDEV_CON_ID("rwdt0", &mstp_clks[HWBLK_RWDT]), | 211 | CLKDEV_DEV_ID("sh-wdt.0", &mstp_clks[HWBLK_RWDT]), |
209 | CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]), | 212 | CLKDEV_CON_ID("flctl0", &mstp_clks[HWBLK_FLCTL]), |
210 | 213 | ||
211 | CLKDEV_ICK_ID("sci_fck", "sh-sci.0", &mstp_clks[HWBLK_SCIF0]), | 214 | CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[HWBLK_SCIF0]), |
212 | CLKDEV_ICK_ID("sci_fck", "sh-sci.1", &mstp_clks[HWBLK_SCIF1]), | 215 | CLKDEV_DEV_ID("sh-sci.1", &mstp_clks[HWBLK_SCIF1]), |
213 | CLKDEV_ICK_ID("sci_fck", "sh-sci.2", &mstp_clks[HWBLK_SCIF2]), | 216 | CLKDEV_DEV_ID("sh-sci.2", &mstp_clks[HWBLK_SCIF2]), |
214 | 217 | ||
215 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]), | 218 | CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[HWBLK_IIC]), |
216 | CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), | 219 | CLKDEV_CON_ID("rtc0", &mstp_clks[HWBLK_RTC]), |
217 | CLKDEV_CON_ID("sdhi0", &mstp_clks[HWBLK_SDHI]), | 220 | CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[HWBLK_SDHI]), |
218 | CLKDEV_CON_ID("keysc0", &mstp_clks[HWBLK_KEYSC]), | 221 | CLKDEV_DEV_ID("sh_keysc.0", &mstp_clks[HWBLK_KEYSC]), |
219 | CLKDEV_CON_ID("usbf0", &mstp_clks[HWBLK_USBF]), | 222 | CLKDEV_CON_ID("usbf0", &mstp_clks[HWBLK_USBF]), |
220 | CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]), | 223 | CLKDEV_CON_ID("2dg0", &mstp_clks[HWBLK_2DG]), |
221 | CLKDEV_CON_ID("siu0", &mstp_clks[HWBLK_SIU]), | 224 | CLKDEV_DEV_ID("siu-pcm-audio", &mstp_clks[HWBLK_SIU]), |
222 | CLKDEV_CON_ID("vou0", &mstp_clks[HWBLK_VOU]), | 225 | CLKDEV_DEV_ID("sh-vou.0", &mstp_clks[HWBLK_VOU]), |
223 | CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]), | 226 | CLKDEV_CON_ID("jpu0", &mstp_clks[HWBLK_JPU]), |
224 | CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]), | 227 | CLKDEV_CON_ID("beu0", &mstp_clks[HWBLK_BEU]), |
225 | CLKDEV_CON_ID("ceu0", &mstp_clks[HWBLK_CEU]), | 228 | CLKDEV_DEV_ID("sh_mobile_ceu.0", &mstp_clks[HWBLK_CEU]), |
226 | CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU]), | 229 | CLKDEV_CON_ID("veu0", &mstp_clks[HWBLK_VEU]), |
227 | CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]), | 230 | CLKDEV_CON_ID("vpu0", &mstp_clks[HWBLK_VPU]), |
228 | CLKDEV_CON_ID("lcdc0", &mstp_clks[HWBLK_LCDC]), | 231 | CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[HWBLK_LCDC]), |
229 | }; | 232 | }; |
230 | 233 | ||
231 | int __init arch_clk_init(void) | 234 | int __init arch_clk_init(void) |
@@ -258,7 +261,7 @@ int __init arch_clk_init(void) | |||
258 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); | 261 | ret = sh_clk_div6_register(div6_clks, DIV6_NR); |
259 | 262 | ||
260 | if (!ret) | 263 | if (!ret) |
261 | ret = sh_hwblk_clk_register(mstp_clks, HWBLK_NR); | 264 | ret = sh_clk_mstp32_register(mstp_clks, HWBLK_NR); |
262 | 265 | ||
263 | return ret; | 266 | return ret; |
264 | } | 267 | } |
diff --git a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c b/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c deleted file mode 100644 index a288b5d92341..000000000000 --- a/arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c +++ /dev/null | |||
@@ -1,106 +0,0 @@ | |||
1 | /* | ||
2 | * arch/sh/kernel/cpu/sh4a/hwblk-sh7722.c | ||
3 | * | ||
4 | * SH7722 hardware block support | ||
5 | * | ||
6 | * Copyright (C) 2009 Magnus Damm | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/io.h> | ||
24 | #include <asm/suspend.h> | ||
25 | #include <asm/hwblk.h> | ||
26 | #include <cpu/sh7722.h> | ||
27 | |||
28 | /* SH7722 registers */ | ||
29 | #define MSTPCR0 0xa4150030 | ||
30 | #define MSTPCR1 0xa4150034 | ||
31 | #define MSTPCR2 0xa4150038 | ||
32 | |||
33 | /* SH7722 Power Domains */ | ||
34 | enum { CORE_AREA, SUB_AREA, CORE_AREA_BM }; | ||
35 | static struct hwblk_area sh7722_hwblk_area[] = { | ||
36 | [CORE_AREA] = HWBLK_AREA(0, 0), | ||
37 | [CORE_AREA_BM] = HWBLK_AREA(HWBLK_AREA_FLAG_PARENT, CORE_AREA), | ||
38 | [SUB_AREA] = HWBLK_AREA(0, 0), | ||
39 | }; | ||
40 | |||
41 | /* Table mapping HWBLK to Module Stop Bit and Power Domain */ | ||
42 | static struct hwblk sh7722_hwblk[HWBLK_NR] = { | ||
43 | [HWBLK_TLB] = HWBLK(MSTPCR0, 31, CORE_AREA), | ||
44 | [HWBLK_IC] = HWBLK(MSTPCR0, 30, CORE_AREA), | ||
45 | [HWBLK_OC] = HWBLK(MSTPCR0, 29, CORE_AREA), | ||
46 | [HWBLK_URAM] = HWBLK(MSTPCR0, 28, CORE_AREA), | ||
47 | [HWBLK_XYMEM] = HWBLK(MSTPCR0, 26, CORE_AREA), | ||
48 | [HWBLK_INTC] = HWBLK(MSTPCR0, 22, CORE_AREA), | ||
49 | [HWBLK_DMAC] = HWBLK(MSTPCR0, 21, CORE_AREA_BM), | ||
50 | [HWBLK_SHYWAY] = HWBLK(MSTPCR0, 20, CORE_AREA), | ||
51 | [HWBLK_HUDI] = HWBLK(MSTPCR0, 19, CORE_AREA), | ||
52 | [HWBLK_UBC] = HWBLK(MSTPCR0, 17, CORE_AREA), | ||
53 | [HWBLK_TMU] = HWBLK(MSTPCR0, 15, CORE_AREA), | ||
54 | [HWBLK_CMT] = HWBLK(MSTPCR0, 14, SUB_AREA), | ||
55 | [HWBLK_RWDT] = HWBLK(MSTPCR0, 13, SUB_AREA), | ||
56 | [HWBLK_FLCTL] = HWBLK(MSTPCR0, 10, CORE_AREA), | ||
57 | [HWBLK_SCIF0] = HWBLK(MSTPCR0, 7, CORE_AREA), | ||
58 | [HWBLK_SCIF1] = HWBLK(MSTPCR0, 6, CORE_AREA), | ||
59 | [HWBLK_SCIF2] = HWBLK(MSTPCR0, 5, CORE_AREA), | ||
60 | [HWBLK_SIO] = HWBLK(MSTPCR0, 3, CORE_AREA), | ||
61 | [HWBLK_SIOF0] = HWBLK(MSTPCR0, 2, CORE_AREA), | ||
62 | [HWBLK_SIOF1] = HWBLK(MSTPCR0, 1, CORE_AREA), | ||
63 | |||
64 | [HWBLK_IIC] = HWBLK(MSTPCR1, 9, CORE_AREA), | ||
65 | [HWBLK_RTC] = HWBLK(MSTPCR1, 8, SUB_AREA), | ||
66 | |||
67 | [HWBLK_TPU] = HWBLK(MSTPCR2, 25, CORE_AREA), | ||
68 | [HWBLK_IRDA] = HWBLK(MSTPCR2, 24, CORE_AREA), | ||
69 | [HWBLK_SDHI] = HWBLK(MSTPCR2, 18, CORE_AREA), | ||
70 | [HWBLK_SIM] = HWBLK(MSTPCR2, 16, CORE_AREA), | ||
71 | [HWBLK_KEYSC] = HWBLK(MSTPCR2, 14, SUB_AREA), | ||
72 | [HWBLK_TSIF] = HWBLK(MSTPCR2, 13, SUB_AREA), | ||
73 | [HWBLK_USBF] = HWBLK(MSTPCR2, 11, CORE_AREA), | ||
74 | [HWBLK_2DG] = HWBLK(MSTPCR2, 9, CORE_AREA_BM), | ||
75 | [HWBLK_SIU] = HWBLK(MSTPCR2, 8, CORE_AREA), | ||
76 | [HWBLK_JPU] = HWBLK(MSTPCR2, 6, CORE_AREA_BM), | ||
77 | [HWBLK_VOU] = HWBLK(MSTPCR2, 5, CORE_AREA_BM), | ||
78 | [HWBLK_BEU] = HWBLK(MSTPCR2, 4, CORE_AREA_BM), | ||
79 | [HWBLK_CEU] = HWBLK(MSTPCR2, 3, CORE_AREA_BM), | ||
80 | [HWBLK_VEU] = HWBLK(MSTPCR2, 2, CORE_AREA_BM), | ||
81 | [HWBLK_VPU] = HWBLK(MSTPCR2, 1, CORE_AREA_BM), | ||
82 | [HWBLK_LCDC] = HWBLK(MSTPCR2, 0, CORE_AREA_BM), | ||
83 | }; | ||
84 | |||
85 | static struct hwblk_info sh7722_hwblk_info = { | ||
86 | .areas = sh7722_hwblk_area, | ||
87 | .nr_areas = ARRAY_SIZE(sh7722_hwblk_area), | ||
88 | .hwblks = sh7722_hwblk, | ||
89 | .nr_hwblks = ARRAY_SIZE(sh7722_hwblk), | ||
90 | }; | ||
91 | |||
92 | int arch_hwblk_sleep_mode(void) | ||
93 | { | ||
94 | if (!sh7722_hwblk_area[CORE_AREA].cnt[HWBLK_CNT_USAGE]) | ||
95 | return SUSP_SH_STANDBY | SUSP_SH_SF; | ||
96 | |||
97 | if (!sh7722_hwblk_area[CORE_AREA_BM].cnt[HWBLK_CNT_USAGE]) | ||
98 | return SUSP_SH_SLEEP | SUSP_SH_SF; | ||
99 | |||
100 | return SUSP_SH_SLEEP; | ||
101 | } | ||
102 | |||
103 | int __init arch_hwblk_init(void) | ||
104 | { | ||
105 | return hwblk_register(&sh7722_hwblk_info); | ||
106 | } | ||
diff --git a/arch/sh/kernel/cpu/shmobile/Makefile b/arch/sh/kernel/cpu/shmobile/Makefile index 2f32a0352aa1..e83c9d55ccd9 100644 --- a/arch/sh/kernel/cpu/shmobile/Makefile +++ b/arch/sh/kernel/cpu/shmobile/Makefile | |||
@@ -5,6 +5,6 @@ | |||
5 | # Power Management & Sleep mode | 5 | # Power Management & Sleep mode |
6 | obj-$(CONFIG_PM) += pm.o sleep.o | 6 | obj-$(CONFIG_PM) += pm.o sleep.o |
7 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 7 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
8 | ifneq ($(CONFIG_CPU_SUBTYPE_SH7724),y) | 8 | ifneq ($(CONFIG_CPU_SUBTYPE_SH7724)$(CONFIG_CPU_SUBTYPE_SH7722),y) |
9 | obj-$(CONFIG_PM_RUNTIME) += pm_runtime.o | 9 | obj-$(CONFIG_PM_RUNTIME) += pm_runtime.o |
10 | endif | 10 | endif |
diff --git a/drivers/sh/Makefile b/drivers/sh/Makefile index 30c25940cfc6..ffca2b4441ad 100644 --- a/drivers/sh/Makefile +++ b/drivers/sh/Makefile | |||
@@ -16,3 +16,4 @@ obj-$(CONFIG_GENERIC_GPIO) += pfc.o | |||
16 | # | 16 | # |
17 | obj-$(CONFIG_SUPERH)$(CONFIG_ARCH_SHMOBILE) += pm_runtime.o | 17 | obj-$(CONFIG_SUPERH)$(CONFIG_ARCH_SHMOBILE) += pm_runtime.o |
18 | obj-$(CONFIG_CPU_SUBTYPE_SH7724) += pm_runtime.o | 18 | obj-$(CONFIG_CPU_SUBTYPE_SH7724) += pm_runtime.o |
19 | obj-$(CONFIG_CPU_SUBTYPE_SH7722) += pm_runtime.o | ||