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-rw-r--r--drivers/clk/mxs/clk-imx28.c6
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/mxs/clk-imx28.c b/drivers/clk/mxs/clk-imx28.c
index 365053f052cd..98624eec5dd4 100644
--- a/drivers/clk/mxs/clk-imx28.c
+++ b/drivers/clk/mxs/clk-imx28.c
@@ -112,11 +112,11 @@ static void __init clk_misc_init(void)
112 112
113 /* 113 /*
114 * 480 MHz seems too high to be ssp clock source directly, 114 * 480 MHz seems too high to be ssp clock source directly,
115 * so set frac0 to get a 288 MHz ref_io0. 115 * so set frac0 to get a 288 MHz ref_io0 and ref_io1.
116 */ 116 */
117 val = readl_relaxed(FRAC0); 117 val = readl_relaxed(FRAC0);
118 val &= ~(0x3f << BP_FRAC0_IO0FRAC); 118 val &= ~((0x3f << BP_FRAC0_IO0FRAC) | (0x3f << BP_FRAC0_IO1FRAC));
119 val |= 30 << BP_FRAC0_IO0FRAC; 119 val |= (30 << BP_FRAC0_IO0FRAC) | (30 << BP_FRAC0_IO1FRAC);
120 writel_relaxed(val, FRAC0); 120 writel_relaxed(val, FRAC0);
121} 121}
122 122