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-rw-r--r--arch/blackfin/mach-bf518/include/mach/defBF512.h19
-rw-r--r--arch/blackfin/mach-bf527/include/mach/defBF522.h19
-rw-r--r--arch/blackfin/mach-bf537/include/mach/defBF534.h18
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF544.h18
-rw-r--r--arch/blackfin/mach-bf548/include/mach/defBF547.h19
5 files changed, 0 insertions, 93 deletions
diff --git a/arch/blackfin/mach-bf518/include/mach/defBF512.h b/arch/blackfin/mach-bf518/include/mach/defBF512.h
index 27285823fb25..cb1172f50757 100644
--- a/arch/blackfin/mach-bf518/include/mach/defBF512.h
+++ b/arch/blackfin/mach-bf518/include/mach/defBF512.h
@@ -1201,25 +1201,6 @@
1201#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */ 1201#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */
1202#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */ 1202#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */
1203 1203
1204
1205/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/
1206/* HDMAx_CTL Masks */
1207#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */
1208#define REP 0x0002 /* HDMA Request Polarity */
1209#define UTE 0x0004 /* Urgency Threshold Enable */
1210#define OIE 0x0010 /* Overflow Interrupt Enable */
1211#define BDIE 0x0020 /* Block Done Interrupt Enable */
1212#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */
1213#define DRQ 0x0300 /* HDMA Request Type */
1214#define DRQ_NONE 0x0000 /* No Request */
1215#define DRQ_SINGLE 0x0100 /* Channels Request Single */
1216#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */
1217#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */
1218#define RBC 0x1000 /* Reload BCNT With IBCNT */
1219#define PS 0x2000 /* HDMA Pin Status */
1220#define OI 0x4000 /* Overflow Interrupt Generated */
1221#define BDI 0x8000 /* Block Done Interrupt Generated */
1222
1223/* entry addresses of the user-callable Boot ROM functions */ 1204/* entry addresses of the user-callable Boot ROM functions */
1224 1205
1225#define _BOOTROM_RESET 0xEF000000 1206#define _BOOTROM_RESET 0xEF000000
diff --git a/arch/blackfin/mach-bf527/include/mach/defBF522.h b/arch/blackfin/mach-bf527/include/mach/defBF522.h
index 89f5420ee6cd..84ef11e52644 100644
--- a/arch/blackfin/mach-bf527/include/mach/defBF522.h
+++ b/arch/blackfin/mach-bf527/include/mach/defBF522.h
@@ -1204,25 +1204,6 @@
1204#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */ 1204#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */
1205#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */ 1205#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */
1206 1206
1207
1208/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/
1209/* HDMAx_CTL Masks */
1210#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */
1211#define REP 0x0002 /* HDMA Request Polarity */
1212#define UTE 0x0004 /* Urgency Threshold Enable */
1213#define OIE 0x0010 /* Overflow Interrupt Enable */
1214#define BDIE 0x0020 /* Block Done Interrupt Enable */
1215#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */
1216#define DRQ 0x0300 /* HDMA Request Type */
1217#define DRQ_NONE 0x0000 /* No Request */
1218#define DRQ_SINGLE 0x0100 /* Channels Request Single */
1219#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */
1220#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */
1221#define RBC 0x1000 /* Reload BCNT With IBCNT */
1222#define PS 0x2000 /* HDMA Pin Status */
1223#define OI 0x4000 /* Overflow Interrupt Generated */
1224#define BDI 0x8000 /* Block Done Interrupt Generated */
1225
1226/* entry addresses of the user-callable Boot ROM functions */ 1207/* entry addresses of the user-callable Boot ROM functions */
1227 1208
1228#define _BOOTROM_RESET 0xEF000000 1209#define _BOOTROM_RESET 0xEF000000
diff --git a/arch/blackfin/mach-bf537/include/mach/defBF534.h b/arch/blackfin/mach-bf537/include/mach/defBF534.h
index 725bb35f3aaa..4a031dde173f 100644
--- a/arch/blackfin/mach-bf537/include/mach/defBF534.h
+++ b/arch/blackfin/mach-bf537/include/mach/defBF534.h
@@ -1520,24 +1520,6 @@
1520#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */ 1520#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */
1521#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */ 1521#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */
1522 1522
1523/* ****************** HANDSHAKE DMA (HDMA) MASKS *********************/
1524/* HDMAx_CTL Masks */
1525#define HMDMAEN 0x0001 /* Enable Handshake DMA 0/1 */
1526#define REP 0x0002 /* HDMA Request Polarity */
1527#define UTE 0x0004 /* Urgency Threshold Enable */
1528#define OIE 0x0010 /* Overflow Interrupt Enable */
1529#define BDIE 0x0020 /* Block Done Interrupt Enable */
1530#define MBDI 0x0040 /* Mask Block Done IRQ If Pending ECNT */
1531#define DRQ 0x0300 /* HDMA Request Type */
1532#define DRQ_NONE 0x0000 /* No Request */
1533#define DRQ_SINGLE 0x0100 /* Channels Request Single */
1534#define DRQ_MULTI 0x0200 /* Channels Request Multi (Default) */
1535#define DRQ_URGENT 0x0300 /* Channels Request Multi Urgent */
1536#define RBC 0x1000 /* Reload BCNT With IBCNT */
1537#define PS 0x2000 /* HDMA Pin Status */
1538#define OI 0x4000 /* Overflow Interrupt Generated */
1539#define BDI 0x8000 /* Block Done Interrupt Generated */
1540
1541/* entry addresses of the user-callable Boot ROM functions */ 1523/* entry addresses of the user-callable Boot ROM functions */
1542 1524
1543#define _BOOTROM_RESET 0xEF000000 1525#define _BOOTROM_RESET 0xEF000000
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF544.h b/arch/blackfin/mach-bf548/include/mach/defBF544.h
index 642468c1bcb1..bcccab36629c 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF544.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF544.h
@@ -657,22 +657,4 @@
657 657
658/* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */ 658/* Bit masks for EPPI0 are obtained from common base header for EPPIx (EPPI1 and EPPI2) */
659 659
660/* Bit masks for HMDMAx_CONTROL */
661
662#define HMDMAEN 0x1 /* Handshake MDMA Enable */
663#define REP 0x2 /* Handshake MDMA Request Polarity */
664#define UTE 0x8 /* Urgency Threshold Enable */
665#define OIE 0x10 /* Overflow Interrupt Enable */
666#define BDIE 0x20 /* Block Done Interrupt Enable */
667#define MBDI 0x40 /* Mask Block Done Interrupt */
668#define DRQ 0x300 /* Handshake MDMA Request Type */
669#define RBC 0x1000 /* Force Reload of BCOUNT */
670#define PS 0x2000 /* Pin Status */
671#define OI 0x4000 /* Overflow Interrupt Generated */
672#define BDI 0x8000 /* Block Done Interrupt Generated */
673
674/* ******************************************* */
675/* MULTI BIT MACRO ENUMERATIONS */
676/* ******************************************* */
677
678#endif /* _DEF_BF544_H */ 660#endif /* _DEF_BF544_H */
diff --git a/arch/blackfin/mach-bf548/include/mach/defBF547.h b/arch/blackfin/mach-bf548/include/mach/defBF547.h
index 2f3337cd311e..1cbba115f96f 100644
--- a/arch/blackfin/mach-bf548/include/mach/defBF547.h
+++ b/arch/blackfin/mach-bf548/include/mach/defBF547.h
@@ -1063,23 +1063,4 @@
1063 1063
1064#define DMA_COUNT_LOW 0xffff /* Lower 16-bits of byte count of DMA transfer for DMA master channel */ 1064#define DMA_COUNT_LOW 0xffff /* Lower 16-bits of byte count of DMA transfer for DMA master channel */
1065 1065
1066/* Bit masks for HMDMAx_CONTROL */
1067
1068#define HMDMAEN 0x1 /* Handshake MDMA Enable */
1069#define REP 0x2 /* Handshake MDMA Request Polarity */
1070#define UTE 0x8 /* Urgency Threshold Enable */
1071#define OIE 0x10 /* Overflow Interrupt Enable */
1072#define BDIE 0x20 /* Block Done Interrupt Enable */
1073#define MBDI 0x40 /* Mask Block Done Interrupt */
1074#define DRQ 0x300 /* Handshake MDMA Request Type */
1075#define RBC 0x1000 /* Force Reload of BCOUNT */
1076#define PS 0x2000 /* Pin Status */
1077#define OI 0x4000 /* Overflow Interrupt Generated */
1078#define BDI 0x8000 /* Block Done Interrupt Generated */
1079
1080/* ******************************************* */
1081/* MULTI BIT MACRO ENUMERATIONS */
1082/* ******************************************* */
1083
1084
1085#endif /* _DEF_BF547_H */ 1066#endif /* _DEF_BF547_H */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-13 04:16:03 -0500