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-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt8
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts17
-rw-r--r--arch/arm/boot/dts/imx51.dtsi20
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts18
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts17
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts18
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts19
-rw-r--r--arch/arm/boot/dts/imx53.dtsi34
-rw-r--r--arch/arm/boot/dts/imx6q-arm2.dts (renamed from arch/arm/boot/dts/imx6q-sabreauto.dts)12
-rw-r--r--arch/arm/boot/dts/imx6q-sabrelite.dts49
-rw-r--r--arch/arm/boot/dts/imx6q.dtsi34
-rw-r--r--arch/arm/mach-imx/Makefile.boot3
-rw-r--r--arch/arm/mach-imx/mach-imx6q.c24
13 files changed, 174 insertions, 99 deletions
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index c9848ad0e2e3..54bdddadf1cf 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -21,6 +21,10 @@ i.MX53 Smart Mobile Reference Design Board
21Required root node properties: 21Required root node properties:
22 - compatible = "fsl,imx53-smd", "fsl,imx53"; 22 - compatible = "fsl,imx53-smd", "fsl,imx53";
23 23
24i.MX6 Quad SABRE Automotive Board 24i.MX6 Quad Armadillo2 Board
25Required root node properties: 25Required root node properties:
26 - compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; 26 - compatible = "fsl,imx6q-arm2", "fsl,imx6q";
27
28i.MX6 Quad SABRE Lite Board
29Required root node properties:
30 - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
index f8766af11215..564cb8c19f15 100644
--- a/arch/arm/boot/dts/imx51-babbage.dts
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -35,20 +35,19 @@
35 }; 35 };
36 36
37 esdhc@70008000 { /* ESDHC2 */ 37 esdhc@70008000 { /* ESDHC2 */
38 cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */ 38 cd-gpios = <&gpio1 6 0>;
39 wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */ 39 wp-gpios = <&gpio1 5 0>;
40 status = "okay"; 40 status = "okay";
41 }; 41 };
42 42
43 uart2: uart@7000c000 { /* UART3 */ 43 uart3: uart@7000c000 {
44 fsl,uart-has-rtscts; 44 fsl,uart-has-rtscts;
45 status = "okay"; 45 status = "okay";
46 }; 46 };
47 47
48 ecspi@70010000 { /* ECSPI1 */ 48 ecspi@70010000 { /* ECSPI1 */
49 fsl,spi-num-chipselects = <2>; 49 fsl,spi-num-chipselects = <2>;
50 cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */ 50 cs-gpios = <&gpio4 24 0>, <&gpio4 25 0>;
51 <&gpio3 25 0>; /* GPIO4_25 */
52 status = "okay"; 51 status = "okay";
53 52
54 pmic: mc13892@0 { 53 pmic: mc13892@0 {
@@ -57,7 +56,7 @@
57 compatible = "fsl,mc13892"; 56 compatible = "fsl,mc13892";
58 spi-max-frequency = <6000000>; 57 spi-max-frequency = <6000000>;
59 reg = <0>; 58 reg = <0>;
60 mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */ 59 mc13xxx-irq-gpios = <&gpio1 8 0>;
61 fsl,mc13xxx-uses-regulator; 60 fsl,mc13xxx-uses-regulator;
62 }; 61 };
63 62
@@ -91,12 +90,12 @@
91 reg = <0x73fa8000 0x4000>; 90 reg = <0x73fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@73fbc000 { 93 uart1: uart@73fbc000 {
95 fsl,uart-has-rtscts; 94 fsl,uart-has-rtscts;
96 status = "okay"; 95 status = "okay";
97 }; 96 };
98 97
99 uart1: uart@73fc0000 { 98 uart2: uart@73fc0000 {
100 status = "okay"; 99 status = "okay";
101 }; 100 };
102 }; 101 };
@@ -127,7 +126,7 @@
127 126
128 power { 127 power {
129 label = "Power Button"; 128 label = "Power Button";
130 gpios = <&gpio1 21 0>; 129 gpios = <&gpio2 21 0>;
131 linux,code = <116>; /* KEY_POWER */ 130 linux,code = <116>; /* KEY_POWER */
132 gpio-key,wakeup; 131 gpio-key,wakeup;
133 }; 132 };
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
index 327ab8e3a4c8..6663986fe1c8 100644
--- a/arch/arm/boot/dts/imx51.dtsi
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -14,9 +14,9 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 }; 20 };
21 21
22 tzic: tz-interrupt-controller@e0000000 { 22 tzic: tz-interrupt-controller@e0000000 {
@@ -86,7 +86,7 @@
86 status = "disabled"; 86 status = "disabled";
87 }; 87 };
88 88
89 uart2: uart@7000c000 { /* UART3 */ 89 uart3: uart@7000c000 {
90 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 90 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
91 reg = <0x7000c000 0x4000>; 91 reg = <0x7000c000 0x4000>;
92 interrupts = <33>; 92 interrupts = <33>;
@@ -117,7 +117,7 @@
117 }; 117 };
118 }; 118 };
119 119
120 gpio0: gpio@73f84000 { /* GPIO1 */ 120 gpio1: gpio@73f84000 {
121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
122 reg = <0x73f84000 0x4000>; 122 reg = <0x73f84000 0x4000>;
123 interrupts = <50 51>; 123 interrupts = <50 51>;
@@ -127,7 +127,7 @@
127 #interrupt-cells = <1>; 127 #interrupt-cells = <1>;
128 }; 128 };
129 129
130 gpio1: gpio@73f88000 { /* GPIO2 */ 130 gpio2: gpio@73f88000 {
131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
132 reg = <0x73f88000 0x4000>; 132 reg = <0x73f88000 0x4000>;
133 interrupts = <52 53>; 133 interrupts = <52 53>;
@@ -137,7 +137,7 @@
137 #interrupt-cells = <1>; 137 #interrupt-cells = <1>;
138 }; 138 };
139 139
140 gpio2: gpio@73f8c000 { /* GPIO3 */ 140 gpio3: gpio@73f8c000 {
141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
142 reg = <0x73f8c000 0x4000>; 142 reg = <0x73f8c000 0x4000>;
143 interrupts = <54 55>; 143 interrupts = <54 55>;
@@ -147,7 +147,7 @@
147 #interrupt-cells = <1>; 147 #interrupt-cells = <1>;
148 }; 148 };
149 149
150 gpio3: gpio@73f90000 { /* GPIO4 */ 150 gpio4: gpio@73f90000 {
151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio"; 151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
152 reg = <0x73f90000 0x4000>; 152 reg = <0x73f90000 0x4000>;
153 interrupts = <56 57>; 153 interrupts = <56 57>;
@@ -171,14 +171,14 @@
171 status = "disabled"; 171 status = "disabled";
172 }; 172 };
173 173
174 uart0: uart@73fbc000 { 174 uart1: uart@73fbc000 {
175 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 175 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
176 reg = <0x73fbc000 0x4000>; 176 reg = <0x73fbc000 0x4000>;
177 interrupts = <31>; 177 interrupts = <31>;
178 status = "disabled"; 178 status = "disabled";
179 }; 179 };
180 180
181 uart1: uart@73fc0000 { 181 uart2: uart@73fc0000 {
182 compatible = "fsl,imx51-uart", "fsl,imx21-uart"; 182 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
183 reg = <0x73fc0000 0x4000>; 183 reg = <0x73fc0000 0x4000>;
184 interrupts = <32>; 184 interrupts = <32>;
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
index 2ab7f80a0a35..2dccce46ed81 100644
--- a/arch/arm/boot/dts/imx53-ard.dts
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */ 32 cd-gpios = <&gpio1 1 0>;
33 wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */ 33 wp-gpios = <&gpio1 9 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 }; 36 };
@@ -44,7 +44,7 @@
44 reg = <0x53fa8000 0x4000>; 44 reg = <0x53fa8000 0x4000>;
45 }; 45 };
46 46
47 uart0: uart@53fbc000 { /* UART1 */ 47 uart1: uart@53fbc000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -67,7 +67,7 @@
67 compatible = "smsc,lan9220", "smsc,lan9115"; 67 compatible = "smsc,lan9220", "smsc,lan9115";
68 reg = <0xf4000000 0x2000000>; 68 reg = <0xf4000000 0x2000000>;
69 phy-mode = "mii"; 69 phy-mode = "mii";
70 interrupt-parent = <&gpio1>; 70 interrupt-parent = <&gpio2>;
71 interrupts = <31>; 71 interrupts = <31>;
72 reg-io-width = <4>; 72 reg-io-width = <4>;
73 smsc,irq-push-pull; 73 smsc,irq-push-pull;
@@ -79,34 +79,34 @@
79 79
80 home { 80 home {
81 label = "Home"; 81 label = "Home";
82 gpios = <&gpio4 10 0>; /* GPIO5_10 */ 82 gpios = <&gpio5 10 0>;
83 linux,code = <102>; /* KEY_HOME */ 83 linux,code = <102>; /* KEY_HOME */
84 gpio-key,wakeup; 84 gpio-key,wakeup;
85 }; 85 };
86 86
87 back { 87 back {
88 label = "Back"; 88 label = "Back";
89 gpios = <&gpio4 11 0>; /* GPIO5_11 */ 89 gpios = <&gpio5 11 0>;
90 linux,code = <158>; /* KEY_BACK */ 90 linux,code = <158>; /* KEY_BACK */
91 gpio-key,wakeup; 91 gpio-key,wakeup;
92 }; 92 };
93 93
94 program { 94 program {
95 label = "Program"; 95 label = "Program";
96 gpios = <&gpio4 12 0>; /* GPIO5_12 */ 96 gpios = <&gpio5 12 0>;
97 linux,code = <362>; /* KEY_PROGRAM */ 97 linux,code = <362>; /* KEY_PROGRAM */
98 gpio-key,wakeup; 98 gpio-key,wakeup;
99 }; 99 };
100 100
101 volume-up { 101 volume-up {
102 label = "Volume Up"; 102 label = "Volume Up";
103 gpios = <&gpio4 13 0>; /* GPIO5_13 */ 103 gpios = <&gpio5 13 0>;
104 linux,code = <115>; /* KEY_VOLUMEUP */ 104 linux,code = <115>; /* KEY_VOLUMEUP */
105 }; 105 };
106 106
107 volume-down { 107 volume-down {
108 label = "Volume Down"; 108 label = "Volume Down";
109 gpios = <&gpio3 0 0>; /* GPIO4_0 */ 109 gpios = <&gpio4 0 0>;
110 linux,code = <114>; /* KEY_VOLUMEDOWN */ 110 linux,code = <114>; /* KEY_VOLUMEDOWN */
111 }; 111 };
112 }; 112 };
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
index 3f3a88185ff8..5bac4aa4800b 100644
--- a/arch/arm/boot/dts/imx53-evk.dts
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -29,15 +29,14 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */ 33 wp-gpios = <&gpio3 14 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
37 ecspi@50010000 { /* ECSPI1 */ 37 ecspi@50010000 { /* ECSPI1 */
38 fsl,spi-num-chipselects = <2>; 38 fsl,spi-num-chipselects = <2>;
39 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 39 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
40 <&gpio2 19 0>; /* GPIO3_19 */
41 status = "okay"; 40 status = "okay";
42 41
43 flash: at45db321d@1 { 42 flash: at45db321d@1 {
@@ -61,8 +60,8 @@
61 }; 60 };
62 61
63 esdhc@50020000 { /* ESDHC3 */ 62 esdhc@50020000 { /* ESDHC3 */
64 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 63 cd-gpios = <&gpio3 11 0>;
65 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 64 wp-gpios = <&gpio3 12 0>;
66 status = "okay"; 65 status = "okay";
67 }; 66 };
68 }; 67 };
@@ -76,7 +75,7 @@
76 reg = <0x53fa8000 0x4000>; 75 reg = <0x53fa8000 0x4000>;
77 }; 76 };
78 77
79 uart0: uart@53fbc000 { /* UART1 */ 78 uart1: uart@53fbc000 {
80 status = "okay"; 79 status = "okay";
81 }; 80 };
82 }; 81 };
@@ -102,7 +101,7 @@
102 101
103 fec@63fec000 { 102 fec@63fec000 {
104 phy-mode = "rmii"; 103 phy-mode = "rmii";
105 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 104 phy-reset-gpios = <&gpio7 6 0>;
106 status = "okay"; 105 status = "okay";
107 }; 106 };
108 }; 107 };
@@ -113,7 +112,7 @@
113 112
114 green { 113 green {
115 label = "Heartbeat"; 114 label = "Heartbeat";
116 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 115 gpios = <&gpio7 7 0>;
117 linux,default-trigger = "heartbeat"; 116 linux,default-trigger = "heartbeat";
118 }; 117 };
119 }; 118 };
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
index ae6de6d0c3f1..5c57c8672c36 100644
--- a/arch/arm/boot/dts/imx53-qsb.dts
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -29,13 +29,13 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 status = "okay"; 33 status = "okay";
34 }; 34 };
35 35
36 esdhc@50020000 { /* ESDHC3 */ 36 esdhc@50020000 { /* ESDHC3 */
37 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */ 37 cd-gpios = <&gpio3 11 0>;
38 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */ 38 wp-gpios = <&gpio3 12 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 }; 41 };
@@ -49,7 +49,7 @@
49 reg = <0x53fa8000 0x4000>; 49 reg = <0x53fa8000 0x4000>;
50 }; 50 };
51 51
52 uart0: uart@53fbc000 { /* UART1 */ 52 uart1: uart@53fbc000 {
53 status = "okay"; 53 status = "okay";
54 }; 54 };
55 }; 55 };
@@ -84,7 +84,7 @@
84 84
85 fec@63fec000 { 85 fec@63fec000 {
86 phy-mode = "rmii"; 86 phy-mode = "rmii";
87 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 87 phy-reset-gpios = <&gpio7 6 0>;
88 status = "okay"; 88 status = "okay";
89 }; 89 };
90 }; 90 };
@@ -95,20 +95,20 @@
95 95
96 power { 96 power {
97 label = "Power Button"; 97 label = "Power Button";
98 gpios = <&gpio0 8 0>; /* GPIO1_8 */ 98 gpios = <&gpio1 8 0>;
99 linux,code = <116>; /* KEY_POWER */ 99 linux,code = <116>; /* KEY_POWER */
100 gpio-key,wakeup; 100 gpio-key,wakeup;
101 }; 101 };
102 102
103 volume-up { 103 volume-up {
104 label = "Volume Up"; 104 label = "Volume Up";
105 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 105 gpios = <&gpio2 14 0>;
106 linux,code = <115>; /* KEY_VOLUMEUP */ 106 linux,code = <115>; /* KEY_VOLUMEUP */
107 }; 107 };
108 108
109 volume-down { 109 volume-down {
110 label = "Volume Down"; 110 label = "Volume Down";
111 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 111 gpios = <&gpio2 15 0>;
112 linux,code = <114>; /* KEY_VOLUMEDOWN */ 112 linux,code = <114>; /* KEY_VOLUMEDOWN */
113 }; 113 };
114 }; 114 };
@@ -118,7 +118,7 @@
118 118
119 user { 119 user {
120 label = "Heartbeat"; 120 label = "Heartbeat";
121 gpios = <&gpio6 7 0>; /* GPIO7_7 */ 121 gpios = <&gpio7 7 0>;
122 linux,default-trigger = "heartbeat"; 122 linux,default-trigger = "heartbeat";
123 }; 123 };
124 }; 124 };
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
index b1c062eea715..c7ee86c2dfb5 100644
--- a/arch/arm/boot/dts/imx53-smd.dts
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -29,8 +29,8 @@
29 aips@50000000 { /* AIPS1 */ 29 aips@50000000 { /* AIPS1 */
30 spba@50000000 { 30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */ 31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */ 32 cd-gpios = <&gpio3 13 0>;
33 wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */ 33 wp-gpios = <&gpio4 11 0>;
34 status = "okay"; 34 status = "okay";
35 }; 35 };
36 36
@@ -39,15 +39,14 @@
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
42 uart2: uart@5000c000 { /* UART3 */ 42 uart3: uart@5000c000 {
43 fsl,uart-has-rtscts; 43 fsl,uart-has-rtscts;
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 ecspi@50010000 { /* ECSPI1 */ 47 ecspi@50010000 { /* ECSPI1 */
48 fsl,spi-num-chipselects = <2>; 48 fsl,spi-num-chipselects = <2>;
49 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */ 49 cs-gpios = <&gpio2 30 0>, <&gpio3 19 0>;
50 <&gpio2 19 0>; /* GPIO3_19 */
51 status = "okay"; 50 status = "okay";
52 51
53 zigbee: mc1323@0 { 52 zigbee: mc1323@0 {
@@ -91,11 +90,11 @@
91 reg = <0x53fa8000 0x4000>; 90 reg = <0x53fa8000 0x4000>;
92 }; 91 };
93 92
94 uart0: uart@53fbc000 { /* UART1 */ 93 uart1: uart@53fbc000 {
95 status = "okay"; 94 status = "okay";
96 }; 95 };
97 96
98 uart1: uart@53fc0000 { /* UART2 */ 97 uart2: uart@53fc0000 {
99 status = "okay"; 98 status = "okay";
100 }; 99 };
101 }; 100 };
@@ -145,7 +144,7 @@
145 144
146 fec@63fec000 { 145 fec@63fec000 {
147 phy-mode = "rmii"; 146 phy-mode = "rmii";
148 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */ 147 phy-reset-gpios = <&gpio7 6 0>;
149 status = "okay"; 148 status = "okay";
150 }; 149 };
151 }; 150 };
@@ -156,13 +155,13 @@
156 155
157 volume-up { 156 volume-up {
158 label = "Volume Up"; 157 label = "Volume Up";
159 gpios = <&gpio1 14 0>; /* GPIO2_14 */ 158 gpios = <&gpio2 14 0>;
160 linux,code = <115>; /* KEY_VOLUMEUP */ 159 linux,code = <115>; /* KEY_VOLUMEUP */
161 }; 160 };
162 161
163 volume-down { 162 volume-down {
164 label = "Volume Down"; 163 label = "Volume Down";
165 gpios = <&gpio1 15 0>; /* GPIO2_15 */ 164 gpios = <&gpio2 15 0>;
166 linux,code = <114>; /* KEY_VOLUMEDOWN */ 165 linux,code = <114>; /* KEY_VOLUMEDOWN */
167 }; 166 };
168 }; 167 };
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
index 099cd84ee372..5dd91b942c91 100644
--- a/arch/arm/boot/dts/imx53.dtsi
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 tzic: tz-interrupt-controller@0fffc000 { 24 tzic: tz-interrupt-controller@0fffc000 {
@@ -88,7 +88,7 @@
88 status = "disabled"; 88 status = "disabled";
89 }; 89 };
90 90
91 uart2: uart@5000c000 { /* UART3 */ 91 uart3: uart@5000c000 {
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>; 93 reg = <0x5000c000 0x4000>;
94 interrupts = <33>; 94 interrupts = <33>;
@@ -119,7 +119,7 @@
119 }; 119 };
120 }; 120 };
121 121
122 gpio0: gpio@53f84000 { /* GPIO1 */ 122 gpio1: gpio@53f84000 {
123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
124 reg = <0x53f84000 0x4000>; 124 reg = <0x53f84000 0x4000>;
125 interrupts = <50 51>; 125 interrupts = <50 51>;
@@ -129,7 +129,7 @@
129 #interrupt-cells = <1>; 129 #interrupt-cells = <1>;
130 }; 130 };
131 131
132 gpio1: gpio@53f88000 { /* GPIO2 */ 132 gpio2: gpio@53f88000 {
133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
134 reg = <0x53f88000 0x4000>; 134 reg = <0x53f88000 0x4000>;
135 interrupts = <52 53>; 135 interrupts = <52 53>;
@@ -139,7 +139,7 @@
139 #interrupt-cells = <1>; 139 #interrupt-cells = <1>;
140 }; 140 };
141 141
142 gpio2: gpio@53f8c000 { /* GPIO3 */ 142 gpio3: gpio@53f8c000 {
143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
144 reg = <0x53f8c000 0x4000>; 144 reg = <0x53f8c000 0x4000>;
145 interrupts = <54 55>; 145 interrupts = <54 55>;
@@ -149,7 +149,7 @@
149 #interrupt-cells = <1>; 149 #interrupt-cells = <1>;
150 }; 150 };
151 151
152 gpio3: gpio@53f90000 { /* GPIO4 */ 152 gpio4: gpio@53f90000 {
153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
154 reg = <0x53f90000 0x4000>; 154 reg = <0x53f90000 0x4000>;
155 interrupts = <56 57>; 155 interrupts = <56 57>;
@@ -173,21 +173,21 @@
173 status = "disabled"; 173 status = "disabled";
174 }; 174 };
175 175
176 uart0: uart@53fbc000 { /* UART1 */ 176 uart1: uart@53fbc000 {
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>; 178 reg = <0x53fbc000 0x4000>;
179 interrupts = <31>; 179 interrupts = <31>;
180 status = "disabled"; 180 status = "disabled";
181 }; 181 };
182 182
183 uart1: uart@53fc0000 { /* UART2 */ 183 uart2: uart@53fc0000 {
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>; 185 reg = <0x53fc0000 0x4000>;
186 interrupts = <32>; 186 interrupts = <32>;
187 status = "disabled"; 187 status = "disabled";
188 }; 188 };
189 189
190 gpio4: gpio@53fdc000 { /* GPIO5 */ 190 gpio5: gpio@53fdc000 {
191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
192 reg = <0x53fdc000 0x4000>; 192 reg = <0x53fdc000 0x4000>;
193 interrupts = <103 104>; 193 interrupts = <103 104>;
@@ -197,7 +197,7 @@
197 #interrupt-cells = <1>; 197 #interrupt-cells = <1>;
198 }; 198 };
199 199
200 gpio5: gpio@53fe0000 { /* GPIO6 */ 200 gpio6: gpio@53fe0000 {
201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
202 reg = <0x53fe0000 0x4000>; 202 reg = <0x53fe0000 0x4000>;
203 interrupts = <105 106>; 203 interrupts = <105 106>;
@@ -207,7 +207,7 @@
207 #interrupt-cells = <1>; 207 #interrupt-cells = <1>;
208 }; 208 };
209 209
210 gpio6: gpio@53fe4000 { /* GPIO7 */ 210 gpio7: gpio@53fe4000 {
211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio"; 211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
212 reg = <0x53fe4000 0x4000>; 212 reg = <0x53fe4000 0x4000>;
213 interrupts = <107 108>; 213 interrupts = <107 108>;
@@ -226,7 +226,7 @@
226 status = "disabled"; 226 status = "disabled";
227 }; 227 };
228 228
229 uart3: uart@53ff0000 { /* UART4 */ 229 uart4: uart@53ff0000 {
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>; 231 reg = <0x53ff0000 0x4000>;
232 interrupts = <13>; 232 interrupts = <13>;
@@ -241,7 +241,7 @@
241 reg = <0x60000000 0x10000000>; 241 reg = <0x60000000 0x10000000>;
242 ranges; 242 ranges;
243 243
244 uart4: uart@63f90000 { /* UART5 */ 244 uart5: uart@63f90000 {
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart"; 245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>; 246 reg = <0x63f90000 0x4000>;
247 interrupts = <86>; 247 interrupts = <86>;
diff --git a/arch/arm/boot/dts/imx6q-sabreauto.dts b/arch/arm/boot/dts/imx6q-arm2.dts
index 072974e443f2..c3977e0478b9 100644
--- a/arch/arm/boot/dts/imx6q-sabreauto.dts
+++ b/arch/arm/boot/dts/imx6q-arm2.dts
@@ -14,8 +14,8 @@
14/include/ "imx6q.dtsi" 14/include/ "imx6q.dtsi"
15 15
16/ { 16/ {
17 model = "Freescale i.MX6 Quad SABRE Automotive Board"; 17 model = "Freescale i.MX6 Quad Armadillo2 Board";
18 compatible = "fsl,imx6q-sabreauto", "fsl,imx6q"; 18 compatible = "fsl,imx6q-arm2", "fsl,imx6q";
19 19
20 chosen { 20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait"; 21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk3p3 rootwait";
@@ -34,8 +34,8 @@
34 }; 34 };
35 35
36 usdhc@02198000 { /* uSDHC3 */ 36 usdhc@02198000 { /* uSDHC3 */
37 cd-gpios = <&gpio5 11 0>; /* GPIO6_11 */ 37 cd-gpios = <&gpio6 11 0>;
38 wp-gpios = <&gpio5 14 0>; /* GPIO6_14 */ 38 wp-gpios = <&gpio6 14 0>;
39 status = "okay"; 39 status = "okay";
40 }; 40 };
41 41
@@ -44,7 +44,7 @@
44 status = "okay"; 44 status = "okay";
45 }; 45 };
46 46
47 uart3: uart@021f0000 { /* UART4 */ 47 uart4: uart@021f0000 {
48 status = "okay"; 48 status = "okay";
49 }; 49 };
50 }; 50 };
@@ -55,7 +55,7 @@
55 55
56 debug-led { 56 debug-led {
57 label = "Heartbeat"; 57 label = "Heartbeat";
58 gpios = <&gpio2 25 0>; /* GPIO3_25 */ 58 gpios = <&gpio3 25 0>;
59 linux,default-trigger = "heartbeat"; 59 linux,default-trigger = "heartbeat";
60 }; 60 };
61 }; 61 };
diff --git a/arch/arm/boot/dts/imx6q-sabrelite.dts b/arch/arm/boot/dts/imx6q-sabrelite.dts
new file mode 100644
index 000000000000..08d920de7286
--- /dev/null
+++ b/arch/arm/boot/dts/imx6q-sabrelite.dts
@@ -0,0 +1,49 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx6q.dtsi"
15
16/ {
17 model = "Freescale i.MX6 Quad SABRE Lite Board";
18 compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
19
20 memory {
21 reg = <0x10000000 0x40000000>;
22 };
23
24 soc {
25 aips-bus@02100000 { /* AIPS2 */
26 enet@02188000 {
27 phy-mode = "rgmii";
28 phy-reset-gpios = <&gpio3 23 0>;
29 status = "okay";
30 };
31
32 usdhc@02198000 { /* uSDHC3 */
33 cd-gpios = <&gpio7 0 0>;
34 wp-gpios = <&gpio7 1 0>;
35 status = "okay";
36 };
37
38 usdhc@0219c000 { /* uSDHC4 */
39 cd-gpios = <&gpio2 6 0>;
40 wp-gpios = <&gpio2 7 0>;
41 status = "okay";
42 };
43
44 uart2: uart@021e8000 {
45 status = "okay";
46 };
47 };
48 };
49};
diff --git a/arch/arm/boot/dts/imx6q.dtsi b/arch/arm/boot/dts/imx6q.dtsi
index 7dda599558cc..263e8f3664b5 100644
--- a/arch/arm/boot/dts/imx6q.dtsi
+++ b/arch/arm/boot/dts/imx6q.dtsi
@@ -14,11 +14,11 @@
14 14
15/ { 15/ {
16 aliases { 16 aliases {
17 serial0 = &uart0; 17 serial0 = &uart1;
18 serial1 = &uart1; 18 serial1 = &uart2;
19 serial2 = &uart2; 19 serial2 = &uart3;
20 serial3 = &uart3; 20 serial3 = &uart4;
21 serial4 = &uart4; 21 serial4 = &uart5;
22 }; 22 };
23 23
24 cpus { 24 cpus {
@@ -165,7 +165,7 @@
165 status = "disabled"; 165 status = "disabled";
166 }; 166 };
167 167
168 uart0: uart@02020000 { /* UART1 */ 168 uart1: uart@02020000 {
169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 169 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
170 reg = <0x02020000 0x4000>; 170 reg = <0x02020000 0x4000>;
171 interrupts = <0 26 0x04>; 171 interrupts = <0 26 0x04>;
@@ -247,7 +247,7 @@
247 interrupts = <0 55 0x04>; 247 interrupts = <0 55 0x04>;
248 }; 248 };
249 249
250 gpio0: gpio@0209c000 { /* GPIO1 */ 250 gpio1: gpio@0209c000 {
251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 251 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
252 reg = <0x0209c000 0x4000>; 252 reg = <0x0209c000 0x4000>;
253 interrupts = <0 66 0x04 0 67 0x04>; 253 interrupts = <0 66 0x04 0 67 0x04>;
@@ -257,7 +257,7 @@
257 #interrupt-cells = <1>; 257 #interrupt-cells = <1>;
258 }; 258 };
259 259
260 gpio1: gpio@020a0000 { /* GPIO2 */ 260 gpio2: gpio@020a0000 {
261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 261 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
262 reg = <0x020a0000 0x4000>; 262 reg = <0x020a0000 0x4000>;
263 interrupts = <0 68 0x04 0 69 0x04>; 263 interrupts = <0 68 0x04 0 69 0x04>;
@@ -267,7 +267,7 @@
267 #interrupt-cells = <1>; 267 #interrupt-cells = <1>;
268 }; 268 };
269 269
270 gpio2: gpio@020a4000 { /* GPIO3 */ 270 gpio3: gpio@020a4000 {
271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 271 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
272 reg = <0x020a4000 0x4000>; 272 reg = <0x020a4000 0x4000>;
273 interrupts = <0 70 0x04 0 71 0x04>; 273 interrupts = <0 70 0x04 0 71 0x04>;
@@ -277,7 +277,7 @@
277 #interrupt-cells = <1>; 277 #interrupt-cells = <1>;
278 }; 278 };
279 279
280 gpio3: gpio@020a8000 { /* GPIO4 */ 280 gpio4: gpio@020a8000 {
281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 281 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
282 reg = <0x020a8000 0x4000>; 282 reg = <0x020a8000 0x4000>;
283 interrupts = <0 72 0x04 0 73 0x04>; 283 interrupts = <0 72 0x04 0 73 0x04>;
@@ -287,7 +287,7 @@
287 #interrupt-cells = <1>; 287 #interrupt-cells = <1>;
288 }; 288 };
289 289
290 gpio4: gpio@020ac000 { /* GPIO5 */ 290 gpio5: gpio@020ac000 {
291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 291 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
292 reg = <0x020ac000 0x4000>; 292 reg = <0x020ac000 0x4000>;
293 interrupts = <0 74 0x04 0 75 0x04>; 293 interrupts = <0 74 0x04 0 75 0x04>;
@@ -297,7 +297,7 @@
297 #interrupt-cells = <1>; 297 #interrupt-cells = <1>;
298 }; 298 };
299 299
300 gpio5: gpio@020b0000 { /* GPIO6 */ 300 gpio6: gpio@020b0000 {
301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 301 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
302 reg = <0x020b0000 0x4000>; 302 reg = <0x020b0000 0x4000>;
303 interrupts = <0 76 0x04 0 77 0x04>; 303 interrupts = <0 76 0x04 0 77 0x04>;
@@ -307,7 +307,7 @@
307 #interrupt-cells = <1>; 307 #interrupt-cells = <1>;
308 }; 308 };
309 309
310 gpio6: gpio@020b4000 { /* GPIO7 */ 310 gpio7: gpio@020b4000 {
311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio"; 311 compatible = "fsl,imx6q-gpio", "fsl,imx31-gpio";
312 reg = <0x020b4000 0x4000>; 312 reg = <0x020b4000 0x4000>;
313 interrupts = <0 78 0x04 0 79 0x04>; 313 interrupts = <0 78 0x04 0 79 0x04>;
@@ -543,28 +543,28 @@
543 interrupts = <0 18 0x04>; 543 interrupts = <0 18 0x04>;
544 }; 544 };
545 545
546 uart1: uart@021e8000 { /* UART2 */ 546 uart2: uart@021e8000 {
547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 547 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
548 reg = <0x021e8000 0x4000>; 548 reg = <0x021e8000 0x4000>;
549 interrupts = <0 27 0x04>; 549 interrupts = <0 27 0x04>;
550 status = "disabled"; 550 status = "disabled";
551 }; 551 };
552 552
553 uart2: uart@021ec000 { /* UART3 */ 553 uart3: uart@021ec000 {
554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 554 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
555 reg = <0x021ec000 0x4000>; 555 reg = <0x021ec000 0x4000>;
556 interrupts = <0 28 0x04>; 556 interrupts = <0 28 0x04>;
557 status = "disabled"; 557 status = "disabled";
558 }; 558 };
559 559
560 uart3: uart@021f0000 { /* UART4 */ 560 uart4: uart@021f0000 {
561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 561 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
562 reg = <0x021f0000 0x4000>; 562 reg = <0x021f0000 0x4000>;
563 interrupts = <0 29 0x04>; 563 interrupts = <0 29 0x04>;
564 status = "disabled"; 564 status = "disabled";
565 }; 565 };
566 566
567 uart4: uart@021f4000 { /* UART5 */ 567 uart5: uart@021f4000 {
568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart"; 568 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
569 reg = <0x021f4000 0x4000>; 569 reg = <0x021f4000 0x4000>;
570 interrupts = <0 30 0x04>; 570 interrupts = <0 30 0x04>;
diff --git a/arch/arm/mach-imx/Makefile.boot b/arch/arm/mach-imx/Makefile.boot
index cfede5768aa0..5f4d06af4912 100644
--- a/arch/arm/mach-imx/Makefile.boot
+++ b/arch/arm/mach-imx/Makefile.boot
@@ -25,3 +25,6 @@ initrd_phys-$(CONFIG_SOC_IMX35) := 0x80800000
25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000 25zreladdr-$(CONFIG_SOC_IMX6Q) += 0x10008000
26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100 26params_phys-$(CONFIG_SOC_IMX6Q) := 0x10000100
27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000 27initrd_phys-$(CONFIG_SOC_IMX6Q) := 0x10800000
28
29dtb-$(CONFIG_SOC_IMX6Q) += imx6q-arm2.dtb \
30 imx6q-sabrelite.dtb
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 8deb012189b5..bee633496f7b 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -16,6 +16,8 @@
16#include <linux/of.h> 16#include <linux/of.h>
17#include <linux/of_irq.h> 17#include <linux/of_irq.h>
18#include <linux/of_platform.h> 18#include <linux/of_platform.h>
19#include <linux/phy.h>
20#include <linux/micrel_phy.h>
19#include <asm/hardware/cache-l2x0.h> 21#include <asm/hardware/cache-l2x0.h>
20#include <asm/hardware/gic.h> 22#include <asm/hardware/gic.h>
21#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
@@ -23,8 +25,27 @@
23#include <mach/common.h> 25#include <mach/common.h>
24#include <mach/hardware.h> 26#include <mach/hardware.h>
25 27
28/* For imx6q sabrelite board: set KSZ9021RN RGMII pad skew */
29static int ksz9021rn_phy_fixup(struct phy_device *phydev)
30{
31 /* min rx data delay */
32 phy_write(phydev, 0x0b, 0x8105);
33 phy_write(phydev, 0x0c, 0x0000);
34
35 /* max rx/tx clock delay, min rx/tx control delay */
36 phy_write(phydev, 0x0b, 0x8104);
37 phy_write(phydev, 0x0c, 0xf0f0);
38 phy_write(phydev, 0x0b, 0x104);
39
40 return 0;
41}
42
26static void __init imx6q_init_machine(void) 43static void __init imx6q_init_machine(void)
27{ 44{
45 if (of_machine_is_compatible("fsl,imx6q-sabrelite"))
46 phy_register_fixup_for_uid(PHY_ID_KSZ9021, MICREL_PHY_ID_MASK,
47 ksz9021rn_phy_fixup);
48
28 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 49 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
29 50
30 imx6q_pm_init(); 51 imx6q_pm_init();
@@ -72,7 +93,8 @@ static struct sys_timer imx6q_timer = {
72}; 93};
73 94
74static const char *imx6q_dt_compat[] __initdata = { 95static const char *imx6q_dt_compat[] __initdata = {
75 "fsl,imx6q-sabreauto", 96 "fsl,imx6q-arm2",
97 "fsl,imx6q-sabrelite",
76 NULL, 98 NULL,
77}; 99};
78 100
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-24 12:49:56 -0500