diff options
-rw-r--r-- | sound/soc/omap/omap-mcbsp.c | 95 |
1 files changed, 77 insertions, 18 deletions
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index d32eb4703cfe..e97e6b28b8a7 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c | |||
@@ -84,11 +84,22 @@ static const unsigned long omap1_mcbsp_port[][2] = { | |||
84 | static const int omap1_dma_reqs[][2] = {}; | 84 | static const int omap1_dma_reqs[][2] = {}; |
85 | static const unsigned long omap1_mcbsp_port[][2] = {}; | 85 | static const unsigned long omap1_mcbsp_port[][2] = {}; |
86 | #endif | 86 | #endif |
87 | #if defined(CONFIG_ARCH_OMAP2420) | 87 | |
88 | static const int omap2420_dma_reqs[][2] = { | 88 | #if defined(CONFIG_ARCH_OMAP24XX) || defined(CONFIG_ARCH_OMAP34XX) |
89 | static const int omap24xx_dma_reqs[][2] = { | ||
89 | { OMAP24XX_DMA_MCBSP1_TX, OMAP24XX_DMA_MCBSP1_RX }, | 90 | { OMAP24XX_DMA_MCBSP1_TX, OMAP24XX_DMA_MCBSP1_RX }, |
90 | { OMAP24XX_DMA_MCBSP2_TX, OMAP24XX_DMA_MCBSP2_RX }, | 91 | { OMAP24XX_DMA_MCBSP2_TX, OMAP24XX_DMA_MCBSP2_RX }, |
92 | #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP34XX) | ||
93 | { OMAP24XX_DMA_MCBSP3_TX, OMAP24XX_DMA_MCBSP3_RX }, | ||
94 | { OMAP24XX_DMA_MCBSP4_TX, OMAP24XX_DMA_MCBSP4_RX }, | ||
95 | { OMAP24XX_DMA_MCBSP5_TX, OMAP24XX_DMA_MCBSP5_RX }, | ||
96 | #endif | ||
91 | }; | 97 | }; |
98 | #else | ||
99 | static const int omap24xx_dma_reqs[][2] = {}; | ||
100 | #endif | ||
101 | |||
102 | #if defined(CONFIG_ARCH_OMAP2420) | ||
92 | static const unsigned long omap2420_mcbsp_port[][2] = { | 103 | static const unsigned long omap2420_mcbsp_port[][2] = { |
93 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, | 104 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR1, |
94 | OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, | 105 | OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR1 }, |
@@ -96,10 +107,43 @@ static const unsigned long omap2420_mcbsp_port[][2] = { | |||
96 | OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, | 107 | OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR1 }, |
97 | }; | 108 | }; |
98 | #else | 109 | #else |
99 | static const int omap2420_dma_reqs[][2] = {}; | ||
100 | static const unsigned long omap2420_mcbsp_port[][2] = {}; | 110 | static const unsigned long omap2420_mcbsp_port[][2] = {}; |
101 | #endif | 111 | #endif |
102 | 112 | ||
113 | #if defined(CONFIG_ARCH_OMAP2430) | ||
114 | static const unsigned long omap2430_mcbsp_port[][2] = { | ||
115 | { OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, | ||
116 | OMAP24XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, | ||
117 | { OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, | ||
118 | OMAP24XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, | ||
119 | { OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, | ||
120 | OMAP2430_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, | ||
121 | { OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, | ||
122 | OMAP2430_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, | ||
123 | { OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, | ||
124 | OMAP2430_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, | ||
125 | }; | ||
126 | #else | ||
127 | static const unsigned long omap2430_mcbsp_port[][2] = {}; | ||
128 | #endif | ||
129 | |||
130 | #if defined(CONFIG_ARCH_OMAP34XX) | ||
131 | static const unsigned long omap34xx_mcbsp_port[][2] = { | ||
132 | { OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DXR, | ||
133 | OMAP34XX_MCBSP1_BASE + OMAP_MCBSP_REG_DRR }, | ||
134 | { OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DXR, | ||
135 | OMAP34XX_MCBSP2_BASE + OMAP_MCBSP_REG_DRR }, | ||
136 | { OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DXR, | ||
137 | OMAP34XX_MCBSP3_BASE + OMAP_MCBSP_REG_DRR }, | ||
138 | { OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DXR, | ||
139 | OMAP34XX_MCBSP4_BASE + OMAP_MCBSP_REG_DRR }, | ||
140 | { OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DXR, | ||
141 | OMAP34XX_MCBSP5_BASE + OMAP_MCBSP_REG_DRR }, | ||
142 | }; | ||
143 | #else | ||
144 | static const unsigned long omap34xx_mcbsp_port[][2] = {}; | ||
145 | #endif | ||
146 | |||
103 | static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream) | 147 | static int omap_mcbsp_dai_startup(struct snd_pcm_substream *substream) |
104 | { | 148 | { |
105 | struct snd_soc_pcm_runtime *rtd = substream->private_data; | 149 | struct snd_soc_pcm_runtime *rtd = substream->private_data; |
@@ -167,12 +211,15 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, | |||
167 | dma = omap1_dma_reqs[bus_id][substream->stream]; | 211 | dma = omap1_dma_reqs[bus_id][substream->stream]; |
168 | port = omap1_mcbsp_port[bus_id][substream->stream]; | 212 | port = omap1_mcbsp_port[bus_id][substream->stream]; |
169 | } else if (cpu_is_omap2420()) { | 213 | } else if (cpu_is_omap2420()) { |
170 | dma = omap2420_dma_reqs[bus_id][substream->stream]; | 214 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; |
171 | port = omap2420_mcbsp_port[bus_id][substream->stream]; | 215 | port = omap2420_mcbsp_port[bus_id][substream->stream]; |
216 | } else if (cpu_is_omap2430()) { | ||
217 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; | ||
218 | port = omap2430_mcbsp_port[bus_id][substream->stream]; | ||
219 | } else if (cpu_is_omap343x()) { | ||
220 | dma = omap24xx_dma_reqs[bus_id][substream->stream]; | ||
221 | port = omap34xx_mcbsp_port[bus_id][substream->stream]; | ||
172 | } else { | 222 | } else { |
173 | /* | ||
174 | * TODO: Add support for 2430 and 3430 | ||
175 | */ | ||
176 | return -ENODEV; | 223 | return -ENODEV; |
177 | } | 224 | } |
178 | omap_mcbsp_dai_dma_params[id][substream->stream].dma_req = dma; | 225 | omap_mcbsp_dai_dma_params[id][substream->stream].dma_req = dma; |
@@ -315,7 +362,7 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data, | |||
315 | int clk_id) | 362 | int clk_id) |
316 | { | 363 | { |
317 | int sel_bit; | 364 | int sel_bit; |
318 | u16 reg; | 365 | u16 reg, reg_devconf1 = OMAP243X_CONTROL_DEVCONF1; |
319 | 366 | ||
320 | if (cpu_class_is_omap1()) { | 367 | if (cpu_class_is_omap1()) { |
321 | /* OMAP1's can use only external source clock */ | 368 | /* OMAP1's can use only external source clock */ |
@@ -325,6 +372,12 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data, | |||
325 | return 0; | 372 | return 0; |
326 | } | 373 | } |
327 | 374 | ||
375 | if (cpu_is_omap2420() && mcbsp_data->bus_id > 1) | ||
376 | return -EINVAL; | ||
377 | |||
378 | if (cpu_is_omap343x()) | ||
379 | reg_devconf1 = OMAP343X_CONTROL_DEVCONF1; | ||
380 | |||
328 | switch (mcbsp_data->bus_id) { | 381 | switch (mcbsp_data->bus_id) { |
329 | case 0: | 382 | case 0: |
330 | reg = OMAP2_CONTROL_DEVCONF0; | 383 | reg = OMAP2_CONTROL_DEVCONF0; |
@@ -334,20 +387,26 @@ static int omap_mcbsp_dai_set_clks_src(struct omap_mcbsp_data *mcbsp_data, | |||
334 | reg = OMAP2_CONTROL_DEVCONF0; | 387 | reg = OMAP2_CONTROL_DEVCONF0; |
335 | sel_bit = 6; | 388 | sel_bit = 6; |
336 | break; | 389 | break; |
337 | /* TODO: Support for ports 3 - 5 in OMAP2430 and OMAP34xx */ | 390 | case 2: |
391 | reg = reg_devconf1; | ||
392 | sel_bit = 0; | ||
393 | break; | ||
394 | case 3: | ||
395 | reg = reg_devconf1; | ||
396 | sel_bit = 2; | ||
397 | break; | ||
398 | case 4: | ||
399 | reg = reg_devconf1; | ||
400 | sel_bit = 4; | ||
401 | break; | ||
338 | default: | 402 | default: |
339 | return -EINVAL; | 403 | return -EINVAL; |
340 | } | 404 | } |
341 | 405 | ||
342 | if (cpu_class_is_omap2()) { | 406 | if (clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK) |
343 | if (clk_id == OMAP_MCBSP_SYSCLK_CLKS_FCLK) { | 407 | omap_ctrl_writel(omap_ctrl_readl(reg) & ~(1 << sel_bit), reg); |
344 | omap_ctrl_writel(omap_ctrl_readl(reg) & | 408 | else |
345 | ~(1 << sel_bit), reg); | 409 | omap_ctrl_writel(omap_ctrl_readl(reg) | (1 << sel_bit), reg); |
346 | } else { | ||
347 | omap_ctrl_writel(omap_ctrl_readl(reg) | | ||
348 | (1 << sel_bit), reg); | ||
349 | } | ||
350 | } | ||
351 | 410 | ||
352 | return 0; | 411 | return 0; |
353 | } | 412 | } |