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-rw-r--r-- | arch/powerpc/boot/dts/b4860emu.dts | 218 |
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diff --git a/arch/powerpc/boot/dts/b4860emu.dts b/arch/powerpc/boot/dts/b4860emu.dts new file mode 100644 index 000000000000..7290021f2dfc --- /dev/null +++ b/arch/powerpc/boot/dts/b4860emu.dts | |||
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1 | /* | ||
2 | * B4860 emulator Device Tree Source | ||
3 | * | ||
4 | * Copyright 2013 Freescale Semiconductor Inc. | ||
5 | * | ||
6 | * Redistribution and use in source and binary forms, with or without | ||
7 | * modification, are permitted provided that the following conditions are met: | ||
8 | * * Redistributions of source code must retain the above copyright | ||
9 | * notice, this list of conditions and the following disclaimer. | ||
10 | * * Redistributions in binary form must reproduce the above copyright | ||
11 | * notice, this list of conditions and the following disclaimer in the | ||
12 | * documentation and/or other materials provided with the distribution. | ||
13 | * * Neither the name of Freescale Semiconductor nor the | ||
14 | * names of its contributors may be used to endorse or promote products | ||
15 | * derived from this software without specific prior written permission. | ||
16 | * | ||
17 | * | ||
18 | * ALTERNATIVELY, this software may be distributed under the terms of the | ||
19 | * GNU General Public License ("GPL") as published by the Free Software | ||
20 | * Foundation, either version 2 of that License or (at your option) any | ||
21 | * later version. | ||
22 | * | ||
23 | * This software is provided by Freescale Semiconductor "as is" and any | ||
24 | * express or implied warranties, including, but not limited to, the implied | ||
25 | * warranties of merchantability and fitness for a particular purpose are | ||
26 | * disclaimed. In no event shall Freescale Semiconductor be liable for any | ||
27 | * direct, indirect, incidental, special, exemplary, or consequential damages | ||
28 | * (including, but not limited to, procurement of substitute goods or services; | ||
29 | * loss of use, data, or profits; or business interruption) however caused and | ||
30 | * on any theory of liability, whether in contract, strict liability, or tort | ||
31 | * (including negligence or otherwise) arising in any way out of the use of | ||
32 | * this software, even if advised of the possibility of such damage. | ||
33 | */ | ||
34 | |||
35 | /dts-v1/; | ||
36 | |||
37 | /include/ "fsl/e6500_power_isa.dtsi" | ||
38 | |||
39 | / { | ||
40 | compatible = "fsl,B4860"; | ||
41 | #address-cells = <2>; | ||
42 | #size-cells = <2>; | ||
43 | interrupt-parent = <&mpic>; | ||
44 | |||
45 | aliases { | ||
46 | ccsr = &soc; | ||
47 | |||
48 | serial0 = &serial0; | ||
49 | serial1 = &serial1; | ||
50 | serial2 = &serial2; | ||
51 | serial3 = &serial3; | ||
52 | dma0 = &dma0; | ||
53 | dma1 = &dma1; | ||
54 | }; | ||
55 | |||
56 | cpus { | ||
57 | #address-cells = <1>; | ||
58 | #size-cells = <0>; | ||
59 | |||
60 | cpu0: PowerPC,e6500@0 { | ||
61 | device_type = "cpu"; | ||
62 | reg = <0 1>; | ||
63 | next-level-cache = <&L2>; | ||
64 | }; | ||
65 | cpu1: PowerPC,e6500@2 { | ||
66 | device_type = "cpu"; | ||
67 | reg = <2 3>; | ||
68 | next-level-cache = <&L2>; | ||
69 | }; | ||
70 | cpu2: PowerPC,e6500@4 { | ||
71 | device_type = "cpu"; | ||
72 | reg = <4 5>; | ||
73 | next-level-cache = <&L2>; | ||
74 | }; | ||
75 | cpu3: PowerPC,e6500@6 { | ||
76 | device_type = "cpu"; | ||
77 | reg = <6 7>; | ||
78 | next-level-cache = <&L2>; | ||
79 | }; | ||
80 | }; | ||
81 | }; | ||
82 | |||
83 | / { | ||
84 | model = "fsl,B4860QDS"; | ||
85 | compatible = "fsl,B4860EMU", "fsl,B4860QDS"; | ||
86 | #address-cells = <2>; | ||
87 | #size-cells = <2>; | ||
88 | interrupt-parent = <&mpic>; | ||
89 | |||
90 | ifc: localbus@ffe124000 { | ||
91 | reg = <0xf 0xfe124000 0 0x2000>; | ||
92 | ranges = <0 0 0xf 0xe8000000 0x08000000 | ||
93 | 2 0 0xf 0xff800000 0x00010000 | ||
94 | 3 0 0xf 0xffdf0000 0x00008000>; | ||
95 | |||
96 | nor@0,0 { | ||
97 | #address-cells = <1>; | ||
98 | #size-cells = <1>; | ||
99 | compatible = "cfi-flash"; | ||
100 | reg = <0x0 0x0 0x8000000>; | ||
101 | bank-width = <2>; | ||
102 | device-width = <1>; | ||
103 | }; | ||
104 | }; | ||
105 | |||
106 | memory { | ||
107 | device_type = "memory"; | ||
108 | }; | ||
109 | |||
110 | soc: soc@ffe000000 { | ||
111 | ranges = <0x00000000 0xf 0xfe000000 0x1000000>; | ||
112 | reg = <0xf 0xfe000000 0 0x00001000>; | ||
113 | }; | ||
114 | }; | ||
115 | |||
116 | &ifc { | ||
117 | #address-cells = <2>; | ||
118 | #size-cells = <1>; | ||
119 | compatible = "fsl,ifc", "simple-bus"; | ||
120 | interrupts = <25 2 0 0>; | ||
121 | }; | ||
122 | |||
123 | &soc { | ||
124 | #address-cells = <1>; | ||
125 | #size-cells = <1>; | ||
126 | device_type = "soc"; | ||
127 | compatible = "simple-bus"; | ||
128 | |||
129 | soc-sram-error { | ||
130 | compatible = "fsl,soc-sram-error"; | ||
131 | interrupts = <16 2 1 2>; | ||
132 | }; | ||
133 | |||
134 | corenet-law@0 { | ||
135 | compatible = "fsl,corenet-law"; | ||
136 | reg = <0x0 0x1000>; | ||
137 | fsl,num-laws = <32>; | ||
138 | }; | ||
139 | |||
140 | ddr1: memory-controller@8000 { | ||
141 | compatible = "fsl,qoriq-memory-controller-v4.5", "fsl,qoriq-memory-controller"; | ||
142 | reg = <0x8000 0x1000>; | ||
143 | interrupts = <16 2 1 8>; | ||
144 | }; | ||
145 | |||
146 | ddr2: memory-controller@9000 { | ||
147 | compatible = "fsl,qoriq-memory-controller-v4.5","fsl,qoriq-memory-controller"; | ||
148 | reg = <0x9000 0x1000>; | ||
149 | interrupts = <16 2 1 9>; | ||
150 | }; | ||
151 | |||
152 | cpc: l3-cache-controller@10000 { | ||
153 | compatible = "fsl,b4-l3-cache-controller", "cache"; | ||
154 | reg = <0x10000 0x1000 | ||
155 | 0x11000 0x1000>; | ||
156 | interrupts = <16 2 1 4>; | ||
157 | }; | ||
158 | |||
159 | corenet-cf@18000 { | ||
160 | compatible = "fsl,b4-corenet-cf"; | ||
161 | reg = <0x18000 0x1000>; | ||
162 | interrupts = <16 2 1 0>; | ||
163 | fsl,ccf-num-csdids = <32>; | ||
164 | fsl,ccf-num-snoopids = <32>; | ||
165 | }; | ||
166 | |||
167 | iommu@20000 { | ||
168 | compatible = "fsl,pamu-v1.0", "fsl,pamu"; | ||
169 | reg = <0x20000 0x4000>; | ||
170 | #address-cells = <1>; | ||
171 | #size-cells = <1>; | ||
172 | interrupts = < | ||
173 | 24 2 0 0 | ||
174 | 16 2 1 1>; | ||
175 | pamu0: pamu@0 { | ||
176 | reg = <0 0x1000>; | ||
177 | fsl,primary-cache-geometry = <8 1>; | ||
178 | fsl,secondary-cache-geometry = <32 2>; | ||
179 | }; | ||
180 | }; | ||
181 | |||
182 | /include/ "fsl/qoriq-mpic.dtsi" | ||
183 | |||
184 | guts: global-utilities@e0000 { | ||
185 | compatible = "fsl,b4-device-config"; | ||
186 | reg = <0xe0000 0xe00>; | ||
187 | fsl,has-rstcr; | ||
188 | fsl,liodn-bits = <12>; | ||
189 | }; | ||
190 | |||
191 | clockgen: global-utilities@e1000 { | ||
192 | compatible = "fsl,b4-clockgen", "fsl,qoriq-clockgen-2.0"; | ||
193 | reg = <0xe1000 0x1000>; | ||
194 | }; | ||
195 | |||
196 | /include/ "fsl/qoriq-dma-0.dtsi" | ||
197 | dma@100300 { | ||
198 | fsl,iommu-parent = <&pamu0>; | ||
199 | fsl,liodn-reg = <&guts 0x580>; /* DMA1LIODNR */ | ||
200 | }; | ||
201 | |||
202 | /include/ "fsl/qoriq-dma-1.dtsi" | ||
203 | dma@101300 { | ||
204 | fsl,iommu-parent = <&pamu0>; | ||
205 | fsl,liodn-reg = <&guts 0x584>; /* DMA2LIODNR */ | ||
206 | }; | ||
207 | |||
208 | /include/ "fsl/qoriq-i2c-0.dtsi" | ||
209 | /include/ "fsl/qoriq-i2c-1.dtsi" | ||
210 | /include/ "fsl/qoriq-duart-0.dtsi" | ||
211 | /include/ "fsl/qoriq-duart-1.dtsi" | ||
212 | |||
213 | L2: l2-cache-controller@c20000 { | ||
214 | compatible = "fsl,b4-l2-cache-controller"; | ||
215 | reg = <0xc20000 0x1000>; | ||
216 | next-level-cache = <&cpc>; | ||
217 | }; | ||
218 | }; | ||