diff options
304 files changed, 6997 insertions, 4046 deletions
diff --git a/.gitignore b/.gitignore index cecb3b040cc1..b93fb7eff942 100644 --- a/.gitignore +++ b/.gitignore | |||
@@ -27,6 +27,7 @@ | |||
27 | *.gz | 27 | *.gz |
28 | *.lzma | 28 | *.lzma |
29 | *.patch | 29 | *.patch |
30 | *.gcno | ||
30 | 31 | ||
31 | # | 32 | # |
32 | # Top-level generic files | 33 | # Top-level generic files |
diff --git a/Documentation/dvb/get_dvb_firmware b/Documentation/dvb/get_dvb_firmware index a52adfc9a57f..3d1b0ab70c8e 100644 --- a/Documentation/dvb/get_dvb_firmware +++ b/Documentation/dvb/get_dvb_firmware | |||
@@ -25,7 +25,7 @@ use IO::Handle; | |||
25 | "tda10046lifeview", "av7110", "dec2000t", "dec2540t", | 25 | "tda10046lifeview", "av7110", "dec2000t", "dec2540t", |
26 | "dec3000s", "vp7041", "dibusb", "nxt2002", "nxt2004", | 26 | "dec3000s", "vp7041", "dibusb", "nxt2002", "nxt2004", |
27 | "or51211", "or51132_qam", "or51132_vsb", "bluebird", | 27 | "or51211", "or51132_qam", "or51132_vsb", "bluebird", |
28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2" ); | 28 | "opera1", "cx231xx", "cx18", "cx23885", "pvrusb2", "mpc718" ); |
29 | 29 | ||
30 | # Check args | 30 | # Check args |
31 | syntax() if (scalar(@ARGV) != 1); | 31 | syntax() if (scalar(@ARGV) != 1); |
@@ -381,6 +381,57 @@ sub cx18 { | |||
381 | $allfiles; | 381 | $allfiles; |
382 | } | 382 | } |
383 | 383 | ||
384 | sub mpc718 { | ||
385 | my $archive = 'Yuan MPC718 TV Tuner Card 2.13.10.1016.zip'; | ||
386 | my $url = "ftp://ftp.work.acer-euro.com/desktop/aspire_idea510/vista/Drivers/$archive"; | ||
387 | my $fwfile = "dvb-cx18-mpc718-mt352.fw"; | ||
388 | my $tmpdir = tempdir(DIR => "/tmp", CLEANUP => 1); | ||
389 | |||
390 | checkstandard(); | ||
391 | wgetfile($archive, $url); | ||
392 | unzip($archive, $tmpdir); | ||
393 | |||
394 | my $sourcefile = "$tmpdir/Yuan MPC718 TV Tuner Card 2.13.10.1016/mpc718_32bit/yuanrap.sys"; | ||
395 | my $found = 0; | ||
396 | |||
397 | open IN, '<', $sourcefile or die "Couldn't open $sourcefile to extract $fwfile data\n"; | ||
398 | binmode IN; | ||
399 | open OUT, '>', $fwfile; | ||
400 | binmode OUT; | ||
401 | { | ||
402 | # Block scope because we change the line terminator variable $/ | ||
403 | my $prevlen = 0; | ||
404 | my $currlen; | ||
405 | |||
406 | # Buried in the data segment are 3 runs of almost identical | ||
407 | # register-value pairs that end in 0x5d 0x01 which is a "TUNER GO" | ||
408 | # command for the MT352. | ||
409 | # Pull out the middle run (because it's easy) of register-value | ||
410 | # pairs to make the "firmware" file. | ||
411 | |||
412 | local $/ = "\x5d\x01"; # MT352 "TUNER GO" | ||
413 | |||
414 | while (<IN>) { | ||
415 | $currlen = length($_); | ||
416 | if ($prevlen == $currlen && $currlen <= 64) { | ||
417 | chop; chop; # Get rid of "TUNER GO" | ||
418 | s/^\0\0//; # get rid of leading 00 00 if it's there | ||
419 | printf OUT "$_"; | ||
420 | $found = 1; | ||
421 | last; | ||
422 | } | ||
423 | $prevlen = $currlen; | ||
424 | } | ||
425 | } | ||
426 | close OUT; | ||
427 | close IN; | ||
428 | if (!$found) { | ||
429 | unlink $fwfile; | ||
430 | die "Couldn't find valid register-value sequence in $sourcefile for $fwfile\n"; | ||
431 | } | ||
432 | $fwfile; | ||
433 | } | ||
434 | |||
384 | sub cx23885 { | 435 | sub cx23885 { |
385 | my $url = "http://linuxtv.org/downloads/firmware/"; | 436 | my $url = "http://linuxtv.org/downloads/firmware/"; |
386 | 437 | ||
diff --git a/Documentation/video4linux/CARDLIST.em28xx b/Documentation/video4linux/CARDLIST.em28xx index 873630e7e53e..014d255231fc 100644 --- a/Documentation/video4linux/CARDLIST.em28xx +++ b/Documentation/video4linux/CARDLIST.em28xx | |||
@@ -66,3 +66,4 @@ | |||
66 | 68 -> Terratec AV350 (em2860) [0ccd:0084] | 66 | 68 -> Terratec AV350 (em2860) [0ccd:0084] |
67 | 69 -> KWorld ATSC 315U HDTV TV Box (em2882) [eb1a:a313] | 67 | 69 -> KWorld ATSC 315U HDTV TV Box (em2882) [eb1a:a313] |
68 | 70 -> Evga inDtube (em2882) | 68 | 70 -> Evga inDtube (em2882) |
69 | 71 -> Silvercrest Webcam 1.3mpix (em2820/em2840) | ||
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 2 | 1 | VERSION = 2 |
2 | PATCHLEVEL = 6 | 2 | PATCHLEVEL = 6 |
3 | SUBLEVEL = 31 | 3 | SUBLEVEL = 31 |
4 | EXTRAVERSION = -rc1 | 4 | EXTRAVERSION = -rc2 |
5 | NAME = Man-Eating Seals of Antiquity | 5 | NAME = Man-Eating Seals of Antiquity |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
@@ -140,15 +140,13 @@ _all: modules | |||
140 | endif | 140 | endif |
141 | 141 | ||
142 | srctree := $(if $(KBUILD_SRC),$(KBUILD_SRC),$(CURDIR)) | 142 | srctree := $(if $(KBUILD_SRC),$(KBUILD_SRC),$(CURDIR)) |
143 | TOPDIR := $(srctree) | ||
144 | # FIXME - TOPDIR is obsolete, use srctree/objtree | ||
145 | objtree := $(CURDIR) | 143 | objtree := $(CURDIR) |
146 | src := $(srctree) | 144 | src := $(srctree) |
147 | obj := $(objtree) | 145 | obj := $(objtree) |
148 | 146 | ||
149 | VPATH := $(srctree)$(if $(KBUILD_EXTMOD),:$(KBUILD_EXTMOD)) | 147 | VPATH := $(srctree)$(if $(KBUILD_EXTMOD),:$(KBUILD_EXTMOD)) |
150 | 148 | ||
151 | export srctree objtree VPATH TOPDIR | 149 | export srctree objtree VPATH |
152 | 150 | ||
153 | 151 | ||
154 | # SUBARCH tells the usermode build what the underlying arch is. That is set | 152 | # SUBARCH tells the usermode build what the underlying arch is. That is set |
@@ -344,7 +342,8 @@ KBUILD_CPPFLAGS := -D__KERNEL__ | |||
344 | 342 | ||
345 | KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ | 343 | KBUILD_CFLAGS := -Wall -Wundef -Wstrict-prototypes -Wno-trigraphs \ |
346 | -fno-strict-aliasing -fno-common \ | 344 | -fno-strict-aliasing -fno-common \ |
347 | -Werror-implicit-function-declaration | 345 | -Werror-implicit-function-declaration \ |
346 | -Wno-format-security | ||
348 | KBUILD_AFLAGS := -D__ASSEMBLY__ | 347 | KBUILD_AFLAGS := -D__ASSEMBLY__ |
349 | 348 | ||
350 | # Read KERNELRELEASE from include/config/kernel.release (if it exists) | 349 | # Read KERNELRELEASE from include/config/kernel.release (if it exists) |
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c index 729298f4b234..7de76dd352fe 100644 --- a/arch/ia64/pci/pci.c +++ b/arch/ia64/pci/pci.c | |||
@@ -537,7 +537,7 @@ pcibios_align_resource (void *data, struct resource *res, | |||
537 | /* | 537 | /* |
538 | * PCI BIOS setup, always defaults to SAL interface | 538 | * PCI BIOS setup, always defaults to SAL interface |
539 | */ | 539 | */ |
540 | char * __devinit | 540 | char * __init |
541 | pcibios_setup (char *str) | 541 | pcibios_setup (char *str) |
542 | { | 542 | { |
543 | return str; | 543 | return str; |
diff --git a/arch/microblaze/Kconfig b/arch/microblaze/Kconfig index b50b845fdd50..2db722d80d4d 100644 --- a/arch/microblaze/Kconfig +++ b/arch/microblaze/Kconfig | |||
@@ -53,6 +53,9 @@ config GENERIC_HARDIRQS_NO__DO_IRQ | |||
53 | config GENERIC_GPIO | 53 | config GENERIC_GPIO |
54 | def_bool y | 54 | def_bool y |
55 | 55 | ||
56 | config GENERIC_CSUM | ||
57 | def_bool y | ||
58 | |||
56 | config PCI | 59 | config PCI |
57 | def_bool n | 60 | def_bool n |
58 | 61 | ||
diff --git a/arch/microblaze/include/asm/atomic.h b/arch/microblaze/include/asm/atomic.h index 0de612ad7cb2..6d2e1d418be7 100644 --- a/arch/microblaze/include/asm/atomic.h +++ b/arch/microblaze/include/asm/atomic.h | |||
@@ -1,95 +1,7 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_ATOMIC_H | 1 | #ifndef _ASM_MICROBLAZE_ATOMIC_H |
10 | #define _ASM_MICROBLAZE_ATOMIC_H | 2 | #define _ASM_MICROBLAZE_ATOMIC_H |
11 | 3 | ||
12 | #include <linux/types.h> | 4 | #include <asm-generic/atomic.h> |
13 | #include <linux/compiler.h> /* likely */ | ||
14 | #include <asm/system.h> /* local_irq_XXX and friends */ | ||
15 | |||
16 | #define ATOMIC_INIT(i) { (i) } | ||
17 | #define atomic_read(v) ((v)->counter) | ||
18 | #define atomic_set(v, i) (((v)->counter) = (i)) | ||
19 | |||
20 | #define atomic_inc(v) (atomic_add_return(1, (v))) | ||
21 | #define atomic_dec(v) (atomic_sub_return(1, (v))) | ||
22 | |||
23 | #define atomic_add(i, v) (atomic_add_return(i, (v))) | ||
24 | #define atomic_sub(i, v) (atomic_sub_return(i, (v))) | ||
25 | |||
26 | #define atomic_inc_return(v) (atomic_add_return(1, (v))) | ||
27 | #define atomic_dec_return(v) (atomic_sub_return(1, (v))) | ||
28 | |||
29 | #define atomic_inc_and_test(v) (atomic_add_return(1, (v)) == 0) | ||
30 | #define atomic_dec_and_test(v) (atomic_sub_return(1, (v)) == 0) | ||
31 | |||
32 | #define atomic_inc_not_zero(v) (atomic_add_unless((v), 1, 0)) | ||
33 | |||
34 | #define atomic_sub_and_test(i, v) (atomic_sub_return((i), (v)) == 0) | ||
35 | |||
36 | static inline int atomic_cmpxchg(atomic_t *v, int old, int new) | ||
37 | { | ||
38 | int ret; | ||
39 | unsigned long flags; | ||
40 | |||
41 | local_irq_save(flags); | ||
42 | ret = v->counter; | ||
43 | if (likely(ret == old)) | ||
44 | v->counter = new; | ||
45 | local_irq_restore(flags); | ||
46 | |||
47 | return ret; | ||
48 | } | ||
49 | |||
50 | static inline int atomic_add_unless(atomic_t *v, int a, int u) | ||
51 | { | ||
52 | int c, old; | ||
53 | |||
54 | c = atomic_read(v); | ||
55 | while (c != u && (old = atomic_cmpxchg((v), c, c + a)) != c) | ||
56 | c = old; | ||
57 | return c != u; | ||
58 | } | ||
59 | |||
60 | static inline void atomic_clear_mask(unsigned long mask, unsigned long *addr) | ||
61 | { | ||
62 | unsigned long flags; | ||
63 | |||
64 | local_irq_save(flags); | ||
65 | *addr &= ~mask; | ||
66 | local_irq_restore(flags); | ||
67 | } | ||
68 | |||
69 | /** | ||
70 | * atomic_add_return - add and return | ||
71 | * @i: integer value to add | ||
72 | * @v: pointer of type atomic_t | ||
73 | * | ||
74 | * Atomically adds @i to @v and returns @i + @v | ||
75 | */ | ||
76 | static inline int atomic_add_return(int i, atomic_t *v) | ||
77 | { | ||
78 | unsigned long flags; | ||
79 | int val; | ||
80 | |||
81 | local_irq_save(flags); | ||
82 | val = v->counter; | ||
83 | v->counter = val += i; | ||
84 | local_irq_restore(flags); | ||
85 | |||
86 | return val; | ||
87 | } | ||
88 | |||
89 | static inline int atomic_sub_return(int i, atomic_t *v) | ||
90 | { | ||
91 | return atomic_add_return(-i, v); | ||
92 | } | ||
93 | 5 | ||
94 | /* | 6 | /* |
95 | * Atomically test *v and decrement if it is greater than 0. | 7 | * Atomically test *v and decrement if it is greater than 0. |
@@ -109,15 +21,4 @@ static inline int atomic_dec_if_positive(atomic_t *v) | |||
109 | return res; | 21 | return res; |
110 | } | 22 | } |
111 | 23 | ||
112 | #define atomic_add_negative(a, v) (atomic_add_return((a), (v)) < 0) | ||
113 | #define atomic_xchg(v, new) (xchg(&((v)->counter), new)) | ||
114 | |||
115 | /* Atomic operations are already serializing */ | ||
116 | #define smp_mb__before_atomic_dec() barrier() | ||
117 | #define smp_mb__after_atomic_dec() barrier() | ||
118 | #define smp_mb__before_atomic_inc() barrier() | ||
119 | #define smp_mb__after_atomic_inc() barrier() | ||
120 | |||
121 | #include <asm-generic/atomic-long.h> | ||
122 | |||
123 | #endif /* _ASM_MICROBLAZE_ATOMIC_H */ | 24 | #endif /* _ASM_MICROBLAZE_ATOMIC_H */ |
diff --git a/arch/microblaze/include/asm/bitops.h b/arch/microblaze/include/asm/bitops.h index d6df1fd4e1e8..a72468f15c8b 100644 --- a/arch/microblaze/include/asm/bitops.h +++ b/arch/microblaze/include/asm/bitops.h | |||
@@ -1,27 +1 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_BITOPS_H | ||
10 | #define _ASM_MICROBLAZE_BITOPS_H | ||
11 | |||
12 | /* | ||
13 | * Copyright 1992, Linus Torvalds. | ||
14 | */ | ||
15 | |||
16 | #include <asm/byteorder.h> /* swab32 */ | ||
17 | #include <asm/system.h> /* save_flags */ | ||
18 | |||
19 | /* | ||
20 | * clear_bit() doesn't provide any barrier for the compiler. | ||
21 | */ | ||
22 | #define smp_mb__before_clear_bit() barrier() | ||
23 | #define smp_mb__after_clear_bit() barrier() | ||
24 | #include <asm-generic/bitops.h> | #include <asm-generic/bitops.h> | |
25 | #include <asm-generic/bitops/__fls.h> | ||
26 | |||
27 | #endif /* _ASM_MICROBLAZE_BITOPS_H */ | ||
diff --git a/arch/microblaze/include/asm/bug.h b/arch/microblaze/include/asm/bug.h index 8eb2cdde11d7..b12fd89e42e9 100644 --- a/arch/microblaze/include/asm/bug.h +++ b/arch/microblaze/include/asm/bug.h | |||
@@ -1,15 +1 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_BUG_H | ||
10 | #define _ASM_MICROBLAZE_BUG_H | ||
11 | |||
12 | #include <linux/kernel.h> | ||
13 | #include <asm-generic/bug.h> | #include <asm-generic/bug.h> | |
14 | |||
15 | #endif /* _ASM_MICROBLAZE_BUG_H */ | ||
diff --git a/arch/microblaze/include/asm/bugs.h b/arch/microblaze/include/asm/bugs.h index f2c6593653fb..61791e1ad9f5 100644 --- a/arch/microblaze/include/asm/bugs.h +++ b/arch/microblaze/include/asm/bugs.h | |||
@@ -1,17 +1 @@ | |||
1 | /* | #include <asm-generic/bugs.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_BUGS_H | ||
10 | #define _ASM_MICROBLAZE_BUGS_H | ||
11 | |||
12 | static inline void check_bugs(void) | ||
13 | { | ||
14 | /* nothing to do */ | ||
15 | } | ||
16 | |||
17 | #endif /* _ASM_MICROBLAZE_BUGS_H */ | ||
diff --git a/arch/microblaze/include/asm/checksum.h b/arch/microblaze/include/asm/checksum.h index 97ea46b5cf80..128bf03b54b7 100644 --- a/arch/microblaze/include/asm/checksum.h +++ b/arch/microblaze/include/asm/checksum.h | |||
@@ -10,12 +10,11 @@ | |||
10 | #ifndef _ASM_MICROBLAZE_CHECKSUM_H | 10 | #ifndef _ASM_MICROBLAZE_CHECKSUM_H |
11 | #define _ASM_MICROBLAZE_CHECKSUM_H | 11 | #define _ASM_MICROBLAZE_CHECKSUM_H |
12 | 12 | ||
13 | #include <linux/in6.h> | ||
14 | |||
15 | /* | 13 | /* |
16 | * computes the checksum of the TCP/UDP pseudo-header | 14 | * computes the checksum of the TCP/UDP pseudo-header |
17 | * returns a 16-bit checksum, already complemented | 15 | * returns a 16-bit checksum, already complemented |
18 | */ | 16 | */ |
17 | #define csum_tcpudp_nofold csum_tcpudp_nofold | ||
19 | static inline __wsum | 18 | static inline __wsum |
20 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, | 19 | csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, |
21 | unsigned short proto, __wsum sum) | 20 | unsigned short proto, __wsum sum) |
@@ -30,71 +29,6 @@ csum_tcpudp_nofold(__be32 saddr, __be32 daddr, unsigned short len, | |||
30 | return sum; | 29 | return sum; |
31 | } | 30 | } |
32 | 31 | ||
33 | /* | 32 | #include <asm-generic/checksum.h> |
34 | * computes the checksum of a memory block at buff, length len, | ||
35 | * and adds in "sum" (32-bit) | ||
36 | * | ||
37 | * returns a 32-bit number suitable for feeding into itself | ||
38 | * or csum_tcpudp_magic | ||
39 | * | ||
40 | * this function must be called with even lengths, except | ||
41 | * for the last fragment, which may be odd | ||
42 | * | ||
43 | * it's best to have buff aligned on a 32-bit boundary | ||
44 | */ | ||
45 | extern __wsum csum_partial(const void *buff, int len, __wsum sum); | ||
46 | |||
47 | /* | ||
48 | * the same as csum_partial, but copies from src while it | ||
49 | * checksums | ||
50 | * | ||
51 | * here even more important to align src and dst on a 32-bit (or even | ||
52 | * better 64-bit) boundary | ||
53 | */ | ||
54 | extern __wsum csum_partial_copy(const void *src, void *dst, int len, | ||
55 | __wsum sum); | ||
56 | |||
57 | /* | ||
58 | * the same as csum_partial_copy, but copies from user space. | ||
59 | * | ||
60 | * here even more important to align src and dst on a 32-bit (or even | ||
61 | * better 64-bit) boundary | ||
62 | */ | ||
63 | extern __wsum csum_partial_copy_from_user(const void __user *src, void *dst, | ||
64 | int len, __wsum sum, int *csum_err); | ||
65 | |||
66 | #define csum_partial_copy_nocheck(src, dst, len, sum) \ | ||
67 | csum_partial_copy((src), (dst), (len), (sum)) | ||
68 | |||
69 | /* | ||
70 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
71 | * which always checksum on 4 octet boundaries. | ||
72 | * | ||
73 | */ | ||
74 | extern __sum16 ip_fast_csum(const void *iph, unsigned int ihl); | ||
75 | |||
76 | /* | ||
77 | * Fold a partial checksum | ||
78 | */ | ||
79 | static inline __sum16 csum_fold(__wsum csum) | ||
80 | { | ||
81 | u32 sum = (__force u32)csum; | ||
82 | sum = (sum & 0xffff) + (sum >> 16); | ||
83 | sum = (sum & 0xffff) + (sum >> 16); | ||
84 | return (__force __sum16)~sum; | ||
85 | } | ||
86 | |||
87 | static inline __sum16 | ||
88 | csum_tcpudp_magic(__be32 saddr, __be32 daddr, unsigned short len, | ||
89 | unsigned short proto, __wsum sum) | ||
90 | { | ||
91 | return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum)); | ||
92 | } | ||
93 | |||
94 | /* | ||
95 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
96 | * in icmp.c | ||
97 | */ | ||
98 | extern __sum16 ip_compute_csum(const void *buff, int len); | ||
99 | 33 | ||
100 | #endif /* _ASM_MICROBLAZE_CHECKSUM_H */ | 34 | #endif /* _ASM_MICROBLAZE_CHECKSUM_H */ |
diff --git a/arch/microblaze/include/asm/fb.h b/arch/microblaze/include/asm/fb.h new file mode 100644 index 000000000000..3a4988e8df45 --- /dev/null +++ b/arch/microblaze/include/asm/fb.h | |||
@@ -0,0 +1 @@ | |||
#include <asm-generic/fb.h> | |||
diff --git a/arch/microblaze/include/asm/hardirq.h b/arch/microblaze/include/asm/hardirq.h index 0f2d6b013e11..41e1e1aa36ac 100644 --- a/arch/microblaze/include/asm/hardirq.h +++ b/arch/microblaze/include/asm/hardirq.h | |||
@@ -9,21 +9,11 @@ | |||
9 | #ifndef _ASM_MICROBLAZE_HARDIRQ_H | 9 | #ifndef _ASM_MICROBLAZE_HARDIRQ_H |
10 | #define _ASM_MICROBLAZE_HARDIRQ_H | 10 | #define _ASM_MICROBLAZE_HARDIRQ_H |
11 | 11 | ||
12 | #include <linux/cache.h> | ||
13 | #include <linux/irq.h> | ||
14 | #include <asm/irq.h> | ||
15 | #include <asm/current.h> | ||
16 | #include <linux/ptrace.h> | ||
17 | |||
18 | /* should be defined in each interrupt controller driver */ | 12 | /* should be defined in each interrupt controller driver */ |
19 | extern unsigned int get_irq(struct pt_regs *regs); | 13 | extern unsigned int get_irq(struct pt_regs *regs); |
20 | 14 | ||
21 | typedef struct { | 15 | #define ack_bad_irq ack_bad_irq |
22 | unsigned int __softirq_pending; | ||
23 | } ____cacheline_aligned irq_cpustat_t; | ||
24 | |||
25 | void ack_bad_irq(unsigned int irq); | 16 | void ack_bad_irq(unsigned int irq); |
26 | 17 | #include <asm-generic/hardirq.h> | |
27 | #include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */ | ||
28 | 18 | ||
29 | #endif /* _ASM_MICROBLAZE_HARDIRQ_H */ | 19 | #endif /* _ASM_MICROBLAZE_HARDIRQ_H */ |
diff --git a/arch/microblaze/include/asm/ioctls.h b/arch/microblaze/include/asm/ioctls.h index 03582b249204..ec34c760665e 100644 --- a/arch/microblaze/include/asm/ioctls.h +++ b/arch/microblaze/include/asm/ioctls.h | |||
@@ -1,91 +1 @@ | |||
1 | /* | #include <asm-generic/ioctls.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_IOCTLS_H | ||
10 | #define _ASM_MICROBLAZE_IOCTLS_H | ||
11 | |||
12 | #include <linux/ioctl.h> | ||
13 | |||
14 | /* 0x54 is just a magic number to make these relatively unique ('T') */ | ||
15 | |||
16 | #define TCGETS 0x5401 | ||
17 | #define TCSETS 0x5402 | ||
18 | #define TCSETSW 0x5403 | ||
19 | #define TCSETSF 0x5404 | ||
20 | #define TCGETA 0x5405 | ||
21 | #define TCSETA 0x5406 | ||
22 | #define TCSETAW 0x5407 | ||
23 | #define TCSETAF 0x5408 | ||
24 | #define TCSBRK 0x5409 | ||
25 | #define TCXONC 0x540A | ||
26 | #define TCFLSH 0x540B | ||
27 | #define TIOCEXCL 0x540C | ||
28 | #define TIOCNXCL 0x540D | ||
29 | #define TIOCSCTTY 0x540E | ||
30 | #define TIOCGPGRP 0x540F | ||
31 | #define TIOCSPGRP 0x5410 | ||
32 | #define TIOCOUTQ 0x5411 | ||
33 | #define TIOCSTI 0x5412 | ||
34 | #define TIOCGWINSZ 0x5413 | ||
35 | #define TIOCSWINSZ 0x5414 | ||
36 | #define TIOCMGET 0x5415 | ||
37 | #define TIOCMBIS 0x5416 | ||
38 | #define TIOCMBIC 0x5417 | ||
39 | #define TIOCMSET 0x5418 | ||
40 | #define TIOCGSOFTCAR 0x5419 | ||
41 | #define TIOCSSOFTCAR 0x541A | ||
42 | #define FIONREAD 0x541B | ||
43 | #define TIOCINQ FIONREAD | ||
44 | #define TIOCLINUX 0x541C | ||
45 | #define TIOCCONS 0x541D | ||
46 | #define TIOCGSERIAL 0x541E | ||
47 | #define TIOCSSERIAL 0x541F | ||
48 | #define TIOCPKT 0x5420 | ||
49 | #define FIONBIO 0x5421 | ||
50 | #define TIOCNOTTY 0x5422 | ||
51 | #define TIOCSETD 0x5423 | ||
52 | #define TIOCGETD 0x5424 | ||
53 | #define TCSBRKP 0x5425 /* Needed for POSIX tcsendbreak() */ | ||
54 | #define TIOCTTYGSTRUCT 0x5426 /* For debugging only */ | ||
55 | #define TIOCSBRK 0x5427 /* BSD compatibility */ | ||
56 | #define TIOCCBRK 0x5428 /* BSD compatibility */ | ||
57 | #define TIOCGSID 0x5429 /* Return the session ID of FD */ | ||
58 | /* Get Pty Number (of pty-mux device) */ | ||
59 | #define TIOCGPTN _IOR('T', 0x30, unsigned int) | ||
60 | #define TIOCSPTLCK _IOW('T', 0x31, int) /* Lock/unlock Pty */ | ||
61 | |||
62 | #define FIONCLEX 0x5450 /* these numbers need to be adjusted. */ | ||
63 | #define FIOCLEX 0x5451 | ||
64 | #define FIOASYNC 0x5452 | ||
65 | #define TIOCSERCONFIG 0x5453 | ||
66 | #define TIOCSERGWILD 0x5454 | ||
67 | #define TIOCSERSWILD 0x5455 | ||
68 | #define TIOCGLCKTRMIOS 0x5456 | ||
69 | #define TIOCSLCKTRMIOS 0x5457 | ||
70 | #define TIOCSERGSTRUCT 0x5458 /* For debugging only */ | ||
71 | #define TIOCSERGETLSR 0x5459 /* Get line status register */ | ||
72 | #define TIOCSERGETMULTI 0x545A /* Get multiport config */ | ||
73 | #define TIOCSERSETMULTI 0x545B /* Set multiport config */ | ||
74 | |||
75 | #define TIOCMIWAIT 0x545C /* wait for a change on serial input line(s) */ | ||
76 | #define TIOCGICOUNT 0x545D /* read serial port inline interrupt counts */ | ||
77 | |||
78 | #define FIOQSIZE 0x545E | ||
79 | |||
80 | /* Used for packet mode */ | ||
81 | #define TIOCPKT_DATA 0 | ||
82 | #define TIOCPKT_FLUSHREAD 1 | ||
83 | #define TIOCPKT_FLUSHWRITE 2 | ||
84 | #define TIOCPKT_STOP 4 | ||
85 | #define TIOCPKT_START 8 | ||
86 | #define TIOCPKT_NOSTOP 16 | ||
87 | #define TIOCPKT_DOSTOP 32 | ||
88 | |||
89 | #define TIOCSER_TEMT 0x01 /* Transmitter physically empty */ | ||
90 | |||
91 | #endif /* _ASM_MICROBLAZE_IOCTLS_H */ | ||
diff --git a/arch/microblaze/include/asm/ipcbuf.h b/arch/microblaze/include/asm/ipcbuf.h index b056fa420654..84c7e51cb6d0 100644 --- a/arch/microblaze/include/asm/ipcbuf.h +++ b/arch/microblaze/include/asm/ipcbuf.h | |||
@@ -1,36 +1 @@ | |||
1 | /* | #include <asm-generic/ipcbuf.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_IPCBUF_H | ||
10 | #define _ASM_MICROBLAZE_IPCBUF_H | ||
11 | |||
12 | /* | ||
13 | * The user_ipc_perm structure for microblaze architecture. | ||
14 | * Note extra padding because this structure is passed back and forth | ||
15 | * between kernel and user space. | ||
16 | * | ||
17 | * Pad space is left for: | ||
18 | * - 32-bit mode_t and seq | ||
19 | * - 2 miscellaneous 32-bit values | ||
20 | */ | ||
21 | |||
22 | struct ipc64_perm { | ||
23 | __kernel_key_t key; | ||
24 | __kernel_uid32_t uid; | ||
25 | __kernel_gid32_t gid; | ||
26 | __kernel_uid32_t cuid; | ||
27 | __kernel_gid32_t cgid; | ||
28 | __kernel_mode_t mode; | ||
29 | unsigned short __pad1; | ||
30 | unsigned short seq; | ||
31 | unsigned short __pad2; | ||
32 | unsigned long __unused1; | ||
33 | unsigned long __unused2; | ||
34 | }; | ||
35 | |||
36 | #endif /* _ASM_MICROBLAZE_IPCBUF_H */ | ||
diff --git a/arch/microblaze/include/asm/irq.h b/arch/microblaze/include/asm/irq.h index db515deaa720..90f050535ebe 100644 --- a/arch/microblaze/include/asm/irq.h +++ b/arch/microblaze/include/asm/irq.h | |||
@@ -10,6 +10,7 @@ | |||
10 | #define _ASM_MICROBLAZE_IRQ_H | 10 | #define _ASM_MICROBLAZE_IRQ_H |
11 | 11 | ||
12 | #define NR_IRQS 32 | 12 | #define NR_IRQS 32 |
13 | #include <asm-generic/irq.h> | ||
13 | 14 | ||
14 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
15 | 16 | ||
@@ -17,11 +18,6 @@ extern unsigned int nr_irq; | |||
17 | 18 | ||
18 | #define NO_IRQ (-1) | 19 | #define NO_IRQ (-1) |
19 | 20 | ||
20 | static inline int irq_canonicalize(int irq) | ||
21 | { | ||
22 | return irq; | ||
23 | } | ||
24 | |||
25 | struct pt_regs; | 21 | struct pt_regs; |
26 | extern void do_IRQ(struct pt_regs *regs); | 22 | extern void do_IRQ(struct pt_regs *regs); |
27 | 23 | ||
diff --git a/arch/microblaze/include/asm/mman.h b/arch/microblaze/include/asm/mman.h index 4914b1329445..8eebf89f5ab1 100644 --- a/arch/microblaze/include/asm/mman.h +++ b/arch/microblaze/include/asm/mman.h | |||
@@ -1,25 +1 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_MMAN_H | ||
10 | #define _ASM_MICROBLAZE_MMAN_H | ||
11 | |||
12 | #include <asm-generic/mman.h> | #include <asm-generic/mman.h> | |
13 | |||
14 | #define MAP_GROWSDOWN 0x0100 /* stack-like segment */ | ||
15 | #define MAP_DENYWRITE 0x0800 /* ETXTBSY */ | ||
16 | #define MAP_EXECUTABLE 0x1000 /* mark it as an executable */ | ||
17 | #define MAP_LOCKED 0x2000 /* pages are locked */ | ||
18 | #define MAP_NORESERVE 0x4000 /* don't check for reservations */ | ||
19 | #define MAP_POPULATE 0x8000 /* populate (prefault) pagetables */ | ||
20 | #define MAP_NONBLOCK 0x10000 /* do not block on IO */ | ||
21 | |||
22 | #define MCL_CURRENT 1 /* lock all current mappings */ | ||
23 | #define MCL_FUTURE 2 /* lock all future mappings */ | ||
24 | |||
25 | #endif /* _ASM_MICROBLAZE_MMAN_H */ | ||
diff --git a/arch/microblaze/include/asm/mmu.h b/arch/microblaze/include/asm/mmu.h index 66cad6a99d77..8d6a654ceffb 100644 --- a/arch/microblaze/include/asm/mmu.h +++ b/arch/microblaze/include/asm/mmu.h | |||
@@ -12,12 +12,7 @@ | |||
12 | #define _ASM_MICROBLAZE_MMU_H | 12 | #define _ASM_MICROBLAZE_MMU_H |
13 | 13 | ||
14 | # ifndef CONFIG_MMU | 14 | # ifndef CONFIG_MMU |
15 | # ifndef __ASSEMBLY__ | 15 | # include <asm-generic/mmu.h> |
16 | typedef struct { | ||
17 | struct vm_list_struct *vmlist; | ||
18 | unsigned long end_brk; | ||
19 | } mm_context_t; | ||
20 | # endif /* __ASSEMBLY__ */ | ||
21 | # else /* CONFIG_MMU */ | 16 | # else /* CONFIG_MMU */ |
22 | # ifdef __KERNEL__ | 17 | # ifdef __KERNEL__ |
23 | # ifndef __ASSEMBLY__ | 18 | # ifndef __ASSEMBLY__ |
diff --git a/arch/microblaze/include/asm/mmu_context.h b/arch/microblaze/include/asm/mmu_context.h index 385fed16bbfb..24eab1674d3e 100644 --- a/arch/microblaze/include/asm/mmu_context.h +++ b/arch/microblaze/include/asm/mmu_context.h | |||
@@ -1,5 +1,5 @@ | |||
1 | #ifdef CONFIG_MMU | 1 | #ifdef CONFIG_MMU |
2 | # include "mmu_context_mm.h" | 2 | # include "mmu_context_mm.h" |
3 | #else | 3 | #else |
4 | # include "mmu_context_no.h" | 4 | # include <asm-generic/mmu_context.h> |
5 | #endif | 5 | #endif |
diff --git a/arch/microblaze/include/asm/mmu_context_no.h b/arch/microblaze/include/asm/mmu_context_no.h deleted file mode 100644 index ba5567190154..000000000000 --- a/arch/microblaze/include/asm/mmu_context_no.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008-2009 Michal Simek <monstr@monstr.eu> | ||
3 | * Copyright (C) 2008-2009 PetaLogix | ||
4 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | #ifndef _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
12 | #define _ASM_MICROBLAZE_MMU_CONTEXT_H | ||
13 | |||
14 | # define init_new_context(tsk, mm) ({ 0; }) | ||
15 | |||
16 | # define enter_lazy_tlb(mm, tsk) do {} while (0) | ||
17 | # define change_mm_context(old, ctx, _pml4) do {} while (0) | ||
18 | # define destroy_context(mm) do {} while (0) | ||
19 | # define deactivate_mm(tsk, mm) do {} while (0) | ||
20 | # define switch_mm(prev, next, tsk) do {} while (0) | ||
21 | # define activate_mm(prev, next) do {} while (0) | ||
22 | |||
23 | #endif /* _ASM_MICROBLAZE_MMU_CONTEXT_H */ | ||
diff --git a/arch/microblaze/include/asm/module.h b/arch/microblaze/include/asm/module.h index 914565a90315..7be1347fce42 100644 --- a/arch/microblaze/include/asm/module.h +++ b/arch/microblaze/include/asm/module.h | |||
@@ -9,6 +9,8 @@ | |||
9 | #ifndef _ASM_MICROBLAZE_MODULE_H | 9 | #ifndef _ASM_MICROBLAZE_MODULE_H |
10 | #define _ASM_MICROBLAZE_MODULE_H | 10 | #define _ASM_MICROBLAZE_MODULE_H |
11 | 11 | ||
12 | #include <asm-generic/module.h> | ||
13 | |||
12 | /* Microblaze Relocations */ | 14 | /* Microblaze Relocations */ |
13 | #define R_MICROBLAZE_NONE 0 | 15 | #define R_MICROBLAZE_NONE 0 |
14 | #define R_MICROBLAZE_32 1 | 16 | #define R_MICROBLAZE_32 1 |
@@ -24,14 +26,6 @@ | |||
24 | /* Keep this the last entry. */ | 26 | /* Keep this the last entry. */ |
25 | #define R_MICROBLAZE_NUM 11 | 27 | #define R_MICROBLAZE_NUM 11 |
26 | 28 | ||
27 | struct mod_arch_specific { | ||
28 | int foo; | ||
29 | }; | ||
30 | |||
31 | #define Elf_Shdr Elf32_Shdr | ||
32 | #define Elf_Sym Elf32_Sym | ||
33 | #define Elf_Ehdr Elf32_Ehdr | ||
34 | |||
35 | typedef struct { volatile int counter; } module_t; | 29 | typedef struct { volatile int counter; } module_t; |
36 | 30 | ||
37 | #endif /* _ASM_MICROBLAZE_MODULE_H */ | 31 | #endif /* _ASM_MICROBLAZE_MODULE_H */ |
diff --git a/arch/microblaze/include/asm/msgbuf.h b/arch/microblaze/include/asm/msgbuf.h index 09dd97097211..809134c644a6 100644 --- a/arch/microblaze/include/asm/msgbuf.h +++ b/arch/microblaze/include/asm/msgbuf.h | |||
@@ -1,31 +1 @@ | |||
1 | #ifndef _ASM_MICROBLAZE_MSGBUF_H | #include <asm-generic/msgbuf.h> | |
2 | #define _ASM_MICROBLAZE_MSGBUF_H | ||
3 | |||
4 | /* | ||
5 | * The msqid64_ds structure for microblaze architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct msqid64_ds { | ||
15 | struct ipc64_perm msg_perm; | ||
16 | __kernel_time_t msg_stime; /* last msgsnd time */ | ||
17 | unsigned long __unused1; | ||
18 | __kernel_time_t msg_rtime; /* last msgrcv time */ | ||
19 | unsigned long __unused2; | ||
20 | __kernel_time_t msg_ctime; /* last change time */ | ||
21 | unsigned long __unused3; | ||
22 | unsigned long msg_cbytes; /* current number of bytes on queue */ | ||
23 | unsigned long msg_qnum; /* number of messages in queue */ | ||
24 | unsigned long msg_qbytes; /* max number of bytes on queue */ | ||
25 | __kernel_pid_t msg_lspid; /* pid of last msgsnd */ | ||
26 | __kernel_pid_t msg_lrpid; /* last receive pid */ | ||
27 | unsigned long __unused4; | ||
28 | unsigned long __unused5; | ||
29 | }; | ||
30 | |||
31 | #endif /* _ASM_MICROBLAZE_MSGBUF_H */ | ||
diff --git a/arch/microblaze/include/asm/param.h b/arch/microblaze/include/asm/param.h index 8c538a49616d..965d45427975 100644 --- a/arch/microblaze/include/asm/param.h +++ b/arch/microblaze/include/asm/param.h | |||
@@ -1,30 +1 @@ | |||
1 | /* | #include <asm-generic/param.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_PARAM_H | ||
10 | #define _ASM_MICROBLAZE_PARAM_H | ||
11 | |||
12 | #ifdef __KERNEL__ | ||
13 | #define HZ CONFIG_HZ /* internal kernel timer frequency */ | ||
14 | #define USER_HZ 100 /* for user interfaces in "ticks" */ | ||
15 | #define CLOCKS_PER_SEC (USER_HZ) /* frequency at which times() counts */ | ||
16 | #endif /* __KERNEL__ */ | ||
17 | |||
18 | #ifndef HZ | ||
19 | #define HZ 100 | ||
20 | #endif | ||
21 | |||
22 | #define EXEC_PAGESIZE 4096 | ||
23 | |||
24 | #ifndef NOGROUP | ||
25 | #define NOGROUP (-1) | ||
26 | #endif | ||
27 | |||
28 | #define MAXHOSTNAMELEN 64 /* max length of hostname */ | ||
29 | |||
30 | #endif /* _ASM_MICROBLAZE_PARAM_H */ | ||
diff --git a/arch/microblaze/include/asm/parport.h b/arch/microblaze/include/asm/parport.h new file mode 100644 index 000000000000..cf252af64590 --- /dev/null +++ b/arch/microblaze/include/asm/parport.h | |||
@@ -0,0 +1 @@ | |||
#include <asm-generic/parport.h> | |||
diff --git a/arch/microblaze/include/asm/pci.h b/arch/microblaze/include/asm/pci.h index ca03794cf3f0..9f0df5faf2c8 100644 --- a/arch/microblaze/include/asm/pci.h +++ b/arch/microblaze/include/asm/pci.h | |||
@@ -1 +1 @@ | |||
#include <linux/io.h> | #include <asm-generic/pci.h> | ||
diff --git a/arch/microblaze/include/asm/posix_types.h b/arch/microblaze/include/asm/posix_types.h index 8c758b231f37..0e15039673e3 100644 --- a/arch/microblaze/include/asm/posix_types.h +++ b/arch/microblaze/include/asm/posix_types.h | |||
@@ -1,73 +1,9 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_POSIX_TYPES_H | 1 | #ifndef _ASM_MICROBLAZE_POSIX_TYPES_H |
10 | #define _ASM_MICROBLAZE_POSIX_TYPES_H | 2 | #define _ASM_MICROBLAZE_POSIX_TYPES_H |
11 | 3 | ||
12 | /* | ||
13 | * This file is generally used by user-level software, so you need to | ||
14 | * be a little careful about namespace pollution etc. Also, we cannot | ||
15 | * assume GCC is being used. | ||
16 | */ | ||
17 | |||
18 | typedef unsigned long __kernel_ino_t; | ||
19 | typedef unsigned short __kernel_mode_t; | 4 | typedef unsigned short __kernel_mode_t; |
20 | typedef unsigned int __kernel_nlink_t; | 5 | #define __kernel_mode_t __kernel_mode_t |
21 | typedef long __kernel_off_t; | ||
22 | typedef int __kernel_pid_t; | ||
23 | typedef unsigned int __kernel_ipc_pid_t; | ||
24 | typedef unsigned int __kernel_uid_t; | ||
25 | typedef unsigned int __kernel_gid_t; | ||
26 | typedef unsigned long __kernel_size_t; | ||
27 | typedef long __kernel_ssize_t; | ||
28 | typedef int __kernel_ptrdiff_t; | ||
29 | typedef long __kernel_time_t; | ||
30 | typedef long __kernel_suseconds_t; | ||
31 | typedef long __kernel_clock_t; | ||
32 | typedef int __kernel_timer_t; | ||
33 | typedef int __kernel_clockid_t; | ||
34 | typedef int __kernel_daddr_t; | ||
35 | typedef char *__kernel_caddr_t; | ||
36 | typedef unsigned short __kernel_uid16_t; | ||
37 | typedef unsigned short __kernel_gid16_t; | ||
38 | typedef unsigned int __kernel_uid32_t; | ||
39 | typedef unsigned int __kernel_gid32_t; | ||
40 | |||
41 | typedef unsigned int __kernel_old_uid_t; | ||
42 | typedef unsigned int __kernel_old_gid_t; | ||
43 | typedef unsigned int __kernel_old_dev_t; | ||
44 | |||
45 | #ifdef __GNUC__ | ||
46 | typedef long long __kernel_loff_t; | ||
47 | #endif | ||
48 | |||
49 | typedef struct { | ||
50 | #if defined(__KERNEL__) || defined(__USE_ALL) | ||
51 | int val[2]; | ||
52 | #else /* !defined(__KERNEL__) && !defined(__USE_ALL) */ | ||
53 | int __val[2]; | ||
54 | #endif /* !defined(__KERNEL__) && !defined(__USE_ALL) */ | ||
55 | } __kernel_fsid_t; | ||
56 | |||
57 | #if defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) | ||
58 | |||
59 | #undef __FD_SET | ||
60 | #define __FD_SET(d, set) ((set)->fds_bits[__FDELT(d)] |= __FDMASK(d)) | ||
61 | |||
62 | #undef __FD_CLR | ||
63 | #define __FD_CLR(d, set) ((set)->fds_bits[__FDELT(d)] &= ~__FDMASK(d)) | ||
64 | |||
65 | #undef __FD_ISSET | ||
66 | #define __FD_ISSET(d, set) (!!((set)->fds_bits[__FDELT(d)] & __FDMASK(d))) | ||
67 | |||
68 | #undef __FD_ZERO | ||
69 | #define __FD_ZERO(fdsetp) (memset(fdsetp, 0, sizeof(*(fd_set *)fdsetp))) | ||
70 | 6 | ||
71 | #endif /* defined(__KERNEL__) || !defined(__GLIBC__) || (__GLIBC__ < 2) */ | 7 | #include <asm-generic/posix_types.h> |
72 | 8 | ||
73 | #endif /* _ASM_MICROBLAZE_POSIX_TYPES_H */ | 9 | #endif /* _ASM_MICROBLAZE_POSIX_TYPES_H */ |
diff --git a/arch/microblaze/include/asm/scatterlist.h b/arch/microblaze/include/asm/scatterlist.h index 08ff1d049b42..35d786fe93ae 100644 --- a/arch/microblaze/include/asm/scatterlist.h +++ b/arch/microblaze/include/asm/scatterlist.h | |||
@@ -1,28 +1 @@ | |||
1 | /* | #include <asm-generic/scatterlist.h> | |
2 | * Copyright (C) 2008 Michal Simek <monstr@monstr.eu> | ||
3 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_MICROBLAZE_SCATTERLIST_H | ||
11 | #define _ASM_MICROBLAZE_SCATTERLIST_H | ||
12 | |||
13 | struct scatterlist { | ||
14 | #ifdef CONFIG_DEBUG_SG | ||
15 | unsigned long sg_magic; | ||
16 | #endif | ||
17 | unsigned long page_link; | ||
18 | dma_addr_t dma_address; | ||
19 | unsigned int offset; | ||
20 | unsigned int length; | ||
21 | }; | ||
22 | |||
23 | #define sg_dma_address(sg) ((sg)->dma_address) | ||
24 | #define sg_dma_len(sg) ((sg)->length) | ||
25 | |||
26 | #define ISA_DMA_THRESHOLD (~0UL) | ||
27 | |||
28 | #endif /* _ASM_MICROBLAZE_SCATTERLIST_H */ | ||
diff --git a/arch/microblaze/include/asm/sembuf.h b/arch/microblaze/include/asm/sembuf.h index b804ed71a57e..7673b83cfef7 100644 --- a/arch/microblaze/include/asm/sembuf.h +++ b/arch/microblaze/include/asm/sembuf.h | |||
@@ -1,34 +1 @@ | |||
1 | /* | #include <asm-generic/sembuf.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_SEMBUF_H | ||
10 | #define _ASM_MICROBLAZE_SEMBUF_H | ||
11 | |||
12 | /* | ||
13 | * The semid64_ds structure for microblaze architecture. | ||
14 | * Note extra padding because this structure is passed back and forth | ||
15 | * between kernel and user space. | ||
16 | * | ||
17 | * Pad space is left for: | ||
18 | * - 64-bit time_t to solve y2038 problem | ||
19 | * - 2 miscellaneous 32-bit values | ||
20 | */ | ||
21 | |||
22 | struct semid64_ds { | ||
23 | struct ipc64_perm sem_perm; /* permissions .. see ipc.h */ | ||
24 | __kernel_time_t sem_otime; /* last semop time */ | ||
25 | unsigned long __unused1; | ||
26 | __kernel_time_t sem_ctime; /* last change time */ | ||
27 | unsigned long __unused2; | ||
28 | unsigned long sem_nsems; /* no. of semaphores in array */ | ||
29 | unsigned long __unused3; | ||
30 | unsigned long __unused4; | ||
31 | }; | ||
32 | |||
33 | |||
34 | #endif /* _ASM_MICROBLAZE_SEMBUF_H */ | ||
diff --git a/arch/microblaze/include/asm/serial.h b/arch/microblaze/include/asm/serial.h index 39bfc8ce6af5..a0cb0caff152 100644 --- a/arch/microblaze/include/asm/serial.h +++ b/arch/microblaze/include/asm/serial.h | |||
@@ -1,14 +1 @@ | |||
1 | /* | #include <asm-generic/serial.h> | |
2 | * Copyright (C) 2009 Michal Simek <monstr@monstr.eu> | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_SERIAL_H | ||
10 | #define _ASM_MICROBLAZE_SERIAL_H | ||
11 | |||
12 | # define BASE_BAUD (1843200 / 16) | ||
13 | |||
14 | #endif /* _ASM_MICROBLAZE_SERIAL_H */ | ||
diff --git a/arch/microblaze/include/asm/shmbuf.h b/arch/microblaze/include/asm/shmbuf.h index f829c5843618..83c05fc2de38 100644 --- a/arch/microblaze/include/asm/shmbuf.h +++ b/arch/microblaze/include/asm/shmbuf.h | |||
@@ -1,42 +1 @@ | |||
1 | #ifndef _ASM_MICROBLAZE_SHMBUF_H | #include <asm-generic/shmbuf.h> | |
2 | #define _ASM_MICROBLAZE_SHMBUF_H | ||
3 | |||
4 | /* | ||
5 | * The shmid64_ds structure for microblaze architecture. | ||
6 | * Note extra padding because this structure is passed back and forth | ||
7 | * between kernel and user space. | ||
8 | * | ||
9 | * Pad space is left for: | ||
10 | * - 64-bit time_t to solve y2038 problem | ||
11 | * - 2 miscellaneous 32-bit values | ||
12 | */ | ||
13 | |||
14 | struct shmid64_ds { | ||
15 | struct ipc64_perm shm_perm; /* operation perms */ | ||
16 | size_t shm_segsz; /* size of segment (bytes) */ | ||
17 | __kernel_time_t shm_atime; /* last attach time */ | ||
18 | unsigned long __unused1; | ||
19 | __kernel_time_t shm_dtime; /* last detach time */ | ||
20 | unsigned long __unused2; | ||
21 | __kernel_time_t shm_ctime; /* last change time */ | ||
22 | unsigned long __unused3; | ||
23 | __kernel_pid_t shm_cpid; /* pid of creator */ | ||
24 | __kernel_pid_t shm_lpid; /* pid of last operator */ | ||
25 | unsigned long shm_nattch; /* no. of current attaches */ | ||
26 | unsigned long __unused4; | ||
27 | unsigned long __unused5; | ||
28 | }; | ||
29 | |||
30 | struct shminfo64 { | ||
31 | unsigned long shmmax; | ||
32 | unsigned long shmmin; | ||
33 | unsigned long shmmni; | ||
34 | unsigned long shmseg; | ||
35 | unsigned long shmall; | ||
36 | unsigned long __unused1; | ||
37 | unsigned long __unused2; | ||
38 | unsigned long __unused3; | ||
39 | unsigned long __unused4; | ||
40 | }; | ||
41 | |||
42 | #endif /* _ASM_MICROBLAZE_SHMBUF_H */ | ||
diff --git a/arch/microblaze/include/asm/shmparam.h b/arch/microblaze/include/asm/shmparam.h index 9f5fc2b3b6a3..93f30deb95d0 100644 --- a/arch/microblaze/include/asm/shmparam.h +++ b/arch/microblaze/include/asm/shmparam.h | |||
@@ -1,6 +1 @@ | |||
1 | #ifndef _ASM_MICROBLAZE_SHMPARAM_H | #include <asm-generic/shmparam.h> | |
2 | #define _ASM_MICROBLAZE_SHMPARAM_H | ||
3 | |||
4 | #define SHMLBA PAGE_SIZE /* attach addr a multiple of this */ | ||
5 | |||
6 | #endif /* _ASM_MICROBLAZE_SHMPARAM_H */ | ||
diff --git a/arch/microblaze/include/asm/siginfo.h b/arch/microblaze/include/asm/siginfo.h index f162911a8f50..0815d29d82e5 100644 --- a/arch/microblaze/include/asm/siginfo.h +++ b/arch/microblaze/include/asm/siginfo.h | |||
@@ -1,15 +1 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_SIGINFO_H | ||
10 | #define _ASM_MICROBLAZE_SIGINFO_H | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | #include <asm-generic/siginfo.h> | #include <asm-generic/siginfo.h> | |
14 | |||
15 | #endif /* _ASM_MICROBLAZE_SIGINFO_H */ | ||
diff --git a/arch/microblaze/include/asm/signal.h b/arch/microblaze/include/asm/signal.h index 46bc2267d949..7b1573ce19de 100644 --- a/arch/microblaze/include/asm/signal.h +++ b/arch/microblaze/include/asm/signal.h | |||
@@ -1,165 +1 @@ | |||
1 | /* | #include <asm-generic/signal.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * Yasushi SHOJI <yashi@atmark-techno.com> | ||
4 | * Tetsuya OHKAWA <tetsuya@atmark-techno.com> | ||
5 | * | ||
6 | * This file is subject to the terms and conditions of the GNU General Public | ||
7 | * License. See the file "COPYING" in the main directory of this archive | ||
8 | * for more details. | ||
9 | */ | ||
10 | |||
11 | #ifndef _ASM_MICROBLAZE_SIGNAL_H | ||
12 | #define _ASM_MICROBLAZE_SIGNAL_H | ||
13 | |||
14 | #define SIGHUP 1 | ||
15 | #define SIGINT 2 | ||
16 | #define SIGQUIT 3 | ||
17 | #define SIGILL 4 | ||
18 | #define SIGTRAP 5 | ||
19 | #define SIGABRT 6 | ||
20 | #define SIGIOT 6 | ||
21 | #define SIGBUS 7 | ||
22 | #define SIGFPE 8 | ||
23 | #define SIGKILL 9 | ||
24 | #define SIGUSR1 10 | ||
25 | #define SIGSEGV 11 | ||
26 | #define SIGUSR2 12 | ||
27 | #define SIGPIPE 13 | ||
28 | #define SIGALRM 14 | ||
29 | #define SIGTERM 15 | ||
30 | #define SIGSTKFLT 16 | ||
31 | #define SIGCHLD 17 | ||
32 | #define SIGCONT 18 | ||
33 | #define SIGSTOP 19 | ||
34 | #define SIGTSTP 20 | ||
35 | #define SIGTTIN 21 | ||
36 | #define SIGTTOU 22 | ||
37 | #define SIGURG 23 | ||
38 | #define SIGXCPU 24 | ||
39 | #define SIGXFSZ 25 | ||
40 | #define SIGVTALRM 26 | ||
41 | #define SIGPROF 27 | ||
42 | #define SIGWINCH 28 | ||
43 | #define SIGIO 29 | ||
44 | #define SIGPOLL SIGIO | ||
45 | /* | ||
46 | #define SIGLOST 29 | ||
47 | */ | ||
48 | #define SIGPWR 30 | ||
49 | #define SIGSYS 31 | ||
50 | #define SIGUNUSED 31 | ||
51 | |||
52 | /* These should not be considered constants from userland. */ | ||
53 | #define SIGRTMIN 32 | ||
54 | #define SIGRTMAX _NSIG | ||
55 | |||
56 | /* | ||
57 | * SA_FLAGS values: | ||
58 | * | ||
59 | * SA_ONSTACK indicates that a registered stack_t will be used. | ||
60 | * SA_RESTART flag to get restarting signals (which were the default long ago) | ||
61 | * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. | ||
62 | * SA_RESETHAND clears the handler when the signal is delivered. | ||
63 | * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. | ||
64 | * SA_NODEFER prevents the current signal from being masked in the handler. | ||
65 | * | ||
66 | * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single | ||
67 | * Unix names RESETHAND and NODEFER respectively. | ||
68 | */ | ||
69 | #define SA_NOCLDSTOP 0x00000001 | ||
70 | #define SA_NOCLDWAIT 0x00000002 | ||
71 | #define SA_SIGINFO 0x00000004 | ||
72 | #define SA_ONSTACK 0x08000000 | ||
73 | #define SA_RESTART 0x10000000 | ||
74 | #define SA_NODEFER 0x40000000 | ||
75 | #define SA_RESETHAND 0x80000000 | ||
76 | |||
77 | #define SA_NOMASK SA_NODEFER | ||
78 | #define SA_ONESHOT SA_RESETHAND | ||
79 | |||
80 | #define SA_RESTORER 0x04000000 | ||
81 | |||
82 | /* | ||
83 | * sigaltstack controls | ||
84 | */ | ||
85 | #define SS_ONSTACK 1 | ||
86 | #define SS_DISABLE 2 | ||
87 | |||
88 | #define MINSIGSTKSZ 2048 | ||
89 | #define SIGSTKSZ 8192 | ||
90 | |||
91 | # ifndef __ASSEMBLY__ | ||
92 | # include <linux/types.h> | ||
93 | # include <asm-generic/signal-defs.h> | ||
94 | |||
95 | /* Avoid too many header ordering problems. */ | ||
96 | struct siginfo; | ||
97 | |||
98 | # ifdef __KERNEL__ | ||
99 | /* | ||
100 | * Most things should be clean enough to redefine this at will, if care | ||
101 | * is taken to make libc match. | ||
102 | */ | ||
103 | # define _NSIG 64 | ||
104 | # define _NSIG_BPW 32 | ||
105 | # define _NSIG_WORDS (_NSIG / _NSIG_BPW) | ||
106 | |||
107 | typedef unsigned long old_sigset_t; /* at least 32 bits */ | ||
108 | |||
109 | typedef struct { | ||
110 | unsigned long sig[_NSIG_WORDS]; | ||
111 | } sigset_t; | ||
112 | |||
113 | struct old_sigaction { | ||
114 | __sighandler_t sa_handler; | ||
115 | old_sigset_t sa_mask; | ||
116 | unsigned long sa_flags; | ||
117 | void (*sa_restorer)(void); | ||
118 | }; | ||
119 | |||
120 | struct sigaction { | ||
121 | __sighandler_t sa_handler; | ||
122 | unsigned long sa_flags; | ||
123 | void (*sa_restorer)(void); | ||
124 | sigset_t sa_mask; /* mask last for extensibility */ | ||
125 | }; | ||
126 | |||
127 | struct k_sigaction { | ||
128 | struct sigaction sa; | ||
129 | }; | ||
130 | |||
131 | # include <asm/sigcontext.h> | ||
132 | # undef __HAVE_ARCH_SIG_BITOPS | ||
133 | |||
134 | # define ptrace_signal_deliver(regs, cookie) do { } while (0) | ||
135 | |||
136 | # else /* !__KERNEL__ */ | ||
137 | |||
138 | /* Here we must cater to libcs that poke about in kernel headers. */ | ||
139 | |||
140 | # define NSIG 32 | ||
141 | typedef unsigned long sigset_t; | ||
142 | |||
143 | struct sigaction { | ||
144 | union { | ||
145 | __sighandler_t _sa_handler; | ||
146 | void (*_sa_sigaction)(int, struct siginfo *, void *); | ||
147 | } _u; | ||
148 | sigset_t sa_mask; | ||
149 | unsigned long sa_flags; | ||
150 | void (*sa_restorer)(void); | ||
151 | }; | ||
152 | |||
153 | # define sa_handler _u._sa_handler | ||
154 | # define sa_sigaction _u._sa_sigaction | ||
155 | |||
156 | # endif /* __KERNEL__ */ | ||
157 | |||
158 | typedef struct sigaltstack { | ||
159 | void *ss_sp; | ||
160 | int ss_flags; | ||
161 | size_t ss_size; | ||
162 | } stack_t; | ||
163 | |||
164 | # endif /* __ASSEMBLY__ */ | ||
165 | #endif /* _ASM_MICROBLAZE_SIGNAL_H */ | ||
diff --git a/arch/microblaze/include/asm/socket.h b/arch/microblaze/include/asm/socket.h index 825936860314..6b71384b9d8b 100644 --- a/arch/microblaze/include/asm/socket.h +++ b/arch/microblaze/include/asm/socket.h | |||
@@ -1,69 +1 @@ | |||
1 | /* | #include <asm-generic/socket.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_SOCKET_H | ||
10 | #define _ASM_MICROBLAZE_SOCKET_H | ||
11 | |||
12 | #include <asm/sockios.h> | ||
13 | |||
14 | /* For setsockoptions(2) */ | ||
15 | #define SOL_SOCKET 1 | ||
16 | |||
17 | #define SO_DEBUG 1 | ||
18 | #define SO_REUSEADDR 2 | ||
19 | #define SO_TYPE 3 | ||
20 | #define SO_ERROR 4 | ||
21 | #define SO_DONTROUTE 5 | ||
22 | #define SO_BROADCAST 6 | ||
23 | #define SO_SNDBUF 7 | ||
24 | #define SO_RCVBUF 8 | ||
25 | #define SO_SNDBUFFORCE 32 | ||
26 | #define SO_RCVBUFFORCE 33 | ||
27 | #define SO_KEEPALIVE 9 | ||
28 | #define SO_OOBINLINE 10 | ||
29 | #define SO_NO_CHECK 11 | ||
30 | #define SO_PRIORITY 12 | ||
31 | #define SO_LINGER 13 | ||
32 | #define SO_BSDCOMPAT 14 | ||
33 | /* To add :#define SO_REUSEPORT 15 */ | ||
34 | #define SO_PASSCRED 16 | ||
35 | #define SO_PEERCRED 17 | ||
36 | #define SO_RCVLOWAT 18 | ||
37 | #define SO_SNDLOWAT 19 | ||
38 | #define SO_RCVTIMEO 20 | ||
39 | #define SO_SNDTIMEO 21 | ||
40 | |||
41 | /* Security levels - as per NRL IPv6 - don't actually do anything */ | ||
42 | #define SO_SECURITY_AUTHENTICATION 22 | ||
43 | #define SO_SECURITY_ENCRYPTION_TRANSPORT 23 | ||
44 | #define SO_SECURITY_ENCRYPTION_NETWORK 24 | ||
45 | |||
46 | #define SO_BINDTODEVICE 25 | ||
47 | |||
48 | /* Socket filtering */ | ||
49 | #define SO_ATTACH_FILTER 26 | ||
50 | #define SO_DETACH_FILTER 27 | ||
51 | |||
52 | #define SO_PEERNAME 28 | ||
53 | #define SO_TIMESTAMP 29 | ||
54 | #define SCM_TIMESTAMP SO_TIMESTAMP | ||
55 | |||
56 | #define SO_ACCEPTCONN 30 | ||
57 | |||
58 | #define SO_PEERSEC 31 | ||
59 | #define SO_PASSSEC 34 | ||
60 | |||
61 | #define SO_TIMESTAMPNS 35 | ||
62 | #define SCM_TIMESTAMPNS SO_TIMESTAMPNS | ||
63 | |||
64 | #define SO_MARK 36 | ||
65 | |||
66 | #define SO_TIMESTAMPING 37 | ||
67 | #define SCM_TIMESTAMPING SO_TIMESTAMPING | ||
68 | |||
69 | #endif /* _ASM_MICROBLAZE_SOCKET_H */ | ||
diff --git a/arch/microblaze/include/asm/sockios.h b/arch/microblaze/include/asm/sockios.h index 9fff57a701e1..def6d4746ee7 100644 --- a/arch/microblaze/include/asm/sockios.h +++ b/arch/microblaze/include/asm/sockios.h | |||
@@ -1,23 +1 @@ | |||
1 | /* | #include <asm-generic/sockios.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_SOCKIOS_H | ||
10 | #define _ASM_MICROBLAZE_SOCKIOS_H | ||
11 | |||
12 | #include <linux/ioctl.h> | ||
13 | |||
14 | /* Socket-level I/O control calls. */ | ||
15 | #define FIOSETOWN 0x8901 | ||
16 | #define SIOCSPGRP 0x8902 | ||
17 | #define FIOGETOWN 0x8903 | ||
18 | #define SIOCGPGRP 0x8904 | ||
19 | #define SIOCATMARK 0x8905 | ||
20 | #define SIOCGSTAMP 0x8906 /* Get stamp (timeval) */ | ||
21 | #define SIOCGSTAMPNS 0x8907 /* Get stamp (timespec) */ | ||
22 | |||
23 | #endif /* _ASM_MICROBLAZE_SOCKIOS_H */ | ||
diff --git a/arch/microblaze/include/asm/stat.h b/arch/microblaze/include/asm/stat.h index a15f77520bfd..3dc90fa92c70 100644 --- a/arch/microblaze/include/asm/stat.h +++ b/arch/microblaze/include/asm/stat.h | |||
@@ -1,68 +1 @@ | |||
1 | /* | #include <asm-generic/stat.h> | |
2 | * Microblaze stat structure | ||
3 | * | ||
4 | * Copyright (C) 2001,02,03 NEC Electronics Corporation | ||
5 | * Copyright (C) 2001,02,03 Miles Bader <miles@gnu.org> | ||
6 | * | ||
7 | * This file is subject to the terms and conditions of the GNU General | ||
8 | * Public License. See the file COPYING in the main directory of this | ||
9 | * archive for more details. | ||
10 | * | ||
11 | * Written by Miles Bader <miles@gnu.org> | ||
12 | */ | ||
13 | |||
14 | #ifndef _ASM_MICROBLAZE_STAT_H | ||
15 | #define _ASM_MICROBLAZE_STAT_H | ||
16 | |||
17 | #include <linux/posix_types.h> | ||
18 | |||
19 | #define STAT_HAVE_NSEC 1 | ||
20 | |||
21 | struct stat { | ||
22 | unsigned long st_dev; | ||
23 | unsigned long st_ino; | ||
24 | unsigned int st_mode; | ||
25 | unsigned int st_nlink; | ||
26 | unsigned int st_uid; | ||
27 | unsigned int st_gid; | ||
28 | unsigned long st_rdev; | ||
29 | unsigned long __pad1; | ||
30 | long st_size; | ||
31 | int st_blksize; | ||
32 | int __pad2; | ||
33 | long st_blocks; | ||
34 | int st_atime; | ||
35 | unsigned int st_atime_nsec; | ||
36 | int st_mtime; | ||
37 | unsigned int st_mtime_nsec; | ||
38 | int st_ctime; | ||
39 | unsigned int st_ctime_nsec; | ||
40 | unsigned long __unused4; | ||
41 | unsigned long __unused5; | ||
42 | }; | ||
43 | |||
44 | struct stat64 { | ||
45 | unsigned long long st_dev; /* Device. */ | ||
46 | unsigned long long st_ino; /* File serial number. */ | ||
47 | unsigned int st_mode; /* File mode. */ | ||
48 | unsigned int st_nlink; /* Link count. */ | ||
49 | unsigned int st_uid; /* User ID of the file's owner. */ | ||
50 | unsigned int st_gid; /* Group ID of the file's group. */ | ||
51 | unsigned long long st_rdev; /* Device number, if device. */ | ||
52 | unsigned long long __pad1; | ||
53 | long long st_size; /* Size of file, in bytes. */ | ||
54 | int st_blksize; /* Optimal block size for I/O. */ | ||
55 | int __pad2; | ||
56 | long long st_blocks; /* Number 512-byte blocks allocated. */ | ||
57 | int st_atime; /* Time of last access. */ | ||
58 | unsigned int st_atime_nsec; | ||
59 | int st_mtime; /* Time of last modification. */ | ||
60 | unsigned int st_mtime_nsec; | ||
61 | int st_ctime; /* Time of last status change. */ | ||
62 | unsigned int st_ctime_nsec; | ||
63 | unsigned int __unused4; | ||
64 | unsigned int __unused5; | ||
65 | }; | ||
66 | |||
67 | #endif /* _ASM_MICROBLAZE_STAT_H */ | ||
68 | |||
diff --git a/arch/microblaze/include/asm/swab.h b/arch/microblaze/include/asm/swab.h index b375d7b65ad7..7847e563ab66 100644 --- a/arch/microblaze/include/asm/swab.h +++ b/arch/microblaze/include/asm/swab.h | |||
@@ -1,8 +1 @@ | |||
1 | #ifndef _ASM_MICROBLAZE_SWAB_H | #include <asm-generic/swab.h> | |
2 | #define _ASM_MICROBLAZE_SWAB_H | ||
3 | |||
4 | #if defined(__GNUC__) && !defined(__STRICT_ANSI__) || defined(__KERNEL__) | ||
5 | #define __SWAB_64_THRU_32__ | ||
6 | #endif | ||
7 | |||
8 | #endif /* _ASM_MICROBLAZE_SWAB_H */ | ||
diff --git a/arch/microblaze/include/asm/syscalls.h b/arch/microblaze/include/asm/syscalls.h index ddea9eb31f8d..720761cc741f 100644 --- a/arch/microblaze/include/asm/syscalls.h +++ b/arch/microblaze/include/asm/syscalls.h | |||
@@ -1,48 +1,8 @@ | |||
1 | #ifndef __ASM_MICROBLAZE_SYSCALLS_H | 1 | #ifndef __ASM_MICROBLAZE_SYSCALLS_H |
2 | #define __ASM_MICROBLAZE_SYSCALLS_H | ||
3 | #ifdef __KERNEL__ | ||
4 | 2 | ||
5 | #include <linux/compiler.h> | 3 | asmlinkage long sys_clone(int flags, unsigned long stack, struct pt_regs *regs); |
6 | #include <linux/linkage.h> | 4 | #define sys_clone sys_clone |
7 | #include <linux/types.h> | ||
8 | #include <linux/signal.h> | ||
9 | 5 | ||
10 | /* FIXME will be removed */ | 6 | #include <asm-generic/syscalls.h> |
11 | asmlinkage int sys_ipc(uint call, int first, int second, | ||
12 | int third, void *ptr, long fifth); | ||
13 | 7 | ||
14 | struct pt_regs; | ||
15 | asmlinkage int sys_vfork(struct pt_regs *regs); | ||
16 | asmlinkage int sys_clone(int flags, unsigned long stack, struct pt_regs *regs); | ||
17 | asmlinkage int sys_execve(char __user *filenamei, char __user *__user *argv, | ||
18 | char __user *__user *envp, struct pt_regs *regs); | ||
19 | |||
20 | asmlinkage unsigned long sys_mmap2(unsigned long addr, size_t len, | ||
21 | unsigned long prot, unsigned long flags, | ||
22 | unsigned long fd, unsigned long pgoff); | ||
23 | |||
24 | asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len, | ||
25 | unsigned long prot, unsigned long flags, | ||
26 | unsigned long fd, off_t offset); | ||
27 | |||
28 | /* from signal.c */ | ||
29 | asmlinkage int sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs); | ||
30 | |||
31 | asmlinkage int sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, | ||
32 | struct pt_regs *regs); | ||
33 | |||
34 | asmlinkage int sys_sigaction(int sig, const struct old_sigaction *act, | ||
35 | struct old_sigaction *oact); | ||
36 | |||
37 | asmlinkage long sys_rt_sigaction(int sig, const struct sigaction __user *act, | ||
38 | struct sigaction __user *oact, size_t sigsetsize); | ||
39 | |||
40 | asmlinkage int sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, | ||
41 | struct pt_regs *regs); | ||
42 | |||
43 | asmlinkage int sys_sigreturn(struct pt_regs *regs); | ||
44 | |||
45 | asmlinkage int sys_rt_sigreturn(struct pt_regs *regs); | ||
46 | |||
47 | #endif /* __KERNEL__ */ | ||
48 | #endif /* __ASM_MICROBLAZE_SYSCALLS_H */ | 8 | #endif /* __ASM_MICROBLAZE_SYSCALLS_H */ |
diff --git a/arch/microblaze/include/asm/system.h b/arch/microblaze/include/asm/system.h index c4e308850b5d..b1ed61590660 100644 --- a/arch/microblaze/include/asm/system.h +++ b/arch/microblaze/include/asm/system.h | |||
@@ -13,6 +13,9 @@ | |||
13 | #include <asm/setup.h> | 13 | #include <asm/setup.h> |
14 | #include <asm/irqflags.h> | 14 | #include <asm/irqflags.h> |
15 | 15 | ||
16 | #include <asm-generic/cmpxchg.h> | ||
17 | #include <asm-generic/cmpxchg-local.h> | ||
18 | |||
16 | struct task_struct; | 19 | struct task_struct; |
17 | struct thread_info; | 20 | struct thread_info; |
18 | 21 | ||
diff --git a/arch/microblaze/include/asm/termbits.h b/arch/microblaze/include/asm/termbits.h index a1b64bc4724a..3935b106de79 100644 --- a/arch/microblaze/include/asm/termbits.h +++ b/arch/microblaze/include/asm/termbits.h | |||
@@ -1,203 +1 @@ | |||
1 | /* | #include <asm-generic/termbits.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_TERMBITS_H | ||
10 | #define _ASM_MICROBLAZE_TERMBITS_H | ||
11 | |||
12 | #include <linux/posix_types.h> | ||
13 | |||
14 | typedef unsigned char cc_t; | ||
15 | typedef unsigned int speed_t; | ||
16 | typedef unsigned int tcflag_t; | ||
17 | |||
18 | #define NCCS 19 | ||
19 | struct termios { | ||
20 | tcflag_t c_iflag; /* input mode flags */ | ||
21 | tcflag_t c_oflag; /* output mode flags */ | ||
22 | tcflag_t c_cflag; /* control mode flags */ | ||
23 | tcflag_t c_lflag; /* local mode flags */ | ||
24 | cc_t c_line; /* line discipline */ | ||
25 | cc_t c_cc[NCCS]; /* control characters */ | ||
26 | }; | ||
27 | |||
28 | struct ktermios { | ||
29 | tcflag_t c_iflag; /* input mode flags */ | ||
30 | tcflag_t c_oflag; /* output mode flags */ | ||
31 | tcflag_t c_cflag; /* control mode flags */ | ||
32 | tcflag_t c_lflag; /* local mode flags */ | ||
33 | cc_t c_line; /* line discipline */ | ||
34 | cc_t c_cc[NCCS]; /* control characters */ | ||
35 | speed_t c_ispeed; /* input speed */ | ||
36 | speed_t c_ospeed; /* output speed */ | ||
37 | }; | ||
38 | |||
39 | /* c_cc characters */ | ||
40 | |||
41 | #define VINTR 0 | ||
42 | #define VQUIT 1 | ||
43 | #define VERASE 2 | ||
44 | #define VKILL 3 | ||
45 | #define VEOF 4 | ||
46 | #define VTIME 5 | ||
47 | #define VMIN 6 | ||
48 | #define VSWTC 7 | ||
49 | #define VSTART 8 | ||
50 | #define VSTOP 9 | ||
51 | #define VSUSP 10 | ||
52 | #define VEOL 11 | ||
53 | #define VREPRINT 12 | ||
54 | #define VDISCARD 13 | ||
55 | #define VWERASE 14 | ||
56 | #define VLNEXT 15 | ||
57 | #define VEOL2 16 | ||
58 | |||
59 | /* c_iflag bits */ | ||
60 | |||
61 | #define IGNBRK 0000001 | ||
62 | #define BRKINT 0000002 | ||
63 | #define IGNPAR 0000004 | ||
64 | #define PARMRK 0000010 | ||
65 | #define INPCK 0000020 | ||
66 | #define ISTRIP 0000040 | ||
67 | #define INLCR 0000100 | ||
68 | #define IGNCR 0000200 | ||
69 | #define ICRNL 0000400 | ||
70 | #define IUCLC 0001000 | ||
71 | #define IXON 0002000 | ||
72 | #define IXANY 0004000 | ||
73 | #define IXOFF 0010000 | ||
74 | #define IMAXBEL 0020000 | ||
75 | #define IUTF8 0040000 | ||
76 | |||
77 | /* c_oflag bits */ | ||
78 | |||
79 | #define OPOST 0000001 | ||
80 | #define OLCUC 0000002 | ||
81 | #define ONLCR 0000004 | ||
82 | #define OCRNL 0000010 | ||
83 | #define ONOCR 0000020 | ||
84 | #define ONLRET 0000040 | ||
85 | #define OFILL 0000100 | ||
86 | #define OFDEL 0000200 | ||
87 | #define NLDLY 0000400 | ||
88 | #define NL0 0000000 | ||
89 | #define NL1 0000400 | ||
90 | #define CRDLY 0003000 | ||
91 | #define CR0 0000000 | ||
92 | #define CR1 0001000 | ||
93 | #define CR2 0002000 | ||
94 | #define CR3 0003000 | ||
95 | #define TABDLY 0014000 | ||
96 | #define TAB0 0000000 | ||
97 | #define TAB1 0004000 | ||
98 | #define TAB2 0010000 | ||
99 | #define TAB3 0014000 | ||
100 | #define XTABS 0014000 | ||
101 | #define BSDLY 0020000 | ||
102 | #define BS0 0000000 | ||
103 | #define BS1 0020000 | ||
104 | #define VTDLY 0040000 | ||
105 | #define VT0 0000000 | ||
106 | #define VT1 0040000 | ||
107 | #define FFDLY 0100000 | ||
108 | #define FF0 0000000 | ||
109 | #define FF1 0100000 | ||
110 | |||
111 | /* c_cflag bit meaning */ | ||
112 | |||
113 | #define CBAUD 0010017 | ||
114 | #define B0 0000000 /* hang up */ | ||
115 | #define B50 0000001 | ||
116 | #define B75 0000002 | ||
117 | #define B110 0000003 | ||
118 | #define B134 0000004 | ||
119 | #define B150 0000005 | ||
120 | #define B200 0000006 | ||
121 | #define B300 0000007 | ||
122 | #define B600 0000010 | ||
123 | #define B1200 0000011 | ||
124 | #define B1800 0000012 | ||
125 | #define B2400 0000013 | ||
126 | #define B4800 0000014 | ||
127 | #define B9600 0000015 | ||
128 | #define B19200 0000016 | ||
129 | #define B38400 0000017 | ||
130 | #define EXTA B19200 | ||
131 | #define EXTB B38400 | ||
132 | #define CSIZE 0000060 | ||
133 | #define CS5 0000000 | ||
134 | #define CS6 0000020 | ||
135 | #define CS7 0000040 | ||
136 | #define CS8 0000060 | ||
137 | #define CSTOPB 0000100 | ||
138 | #define CREAD 0000200 | ||
139 | #define PARENB 0000400 | ||
140 | #define PARODD 0001000 | ||
141 | #define HUPCL 0002000 | ||
142 | #define CLOCAL 0004000 | ||
143 | #define CBAUDEX 0010000 | ||
144 | #define B57600 0010001 | ||
145 | #define B115200 0010002 | ||
146 | #define B230400 0010003 | ||
147 | #define B460800 0010004 | ||
148 | #define B500000 0010005 | ||
149 | #define B576000 0010006 | ||
150 | #define B921600 0010007 | ||
151 | #define BOTHER 0010000 | ||
152 | #define B1000000 0010010 | ||
153 | #define B1152000 0010011 | ||
154 | #define B1500000 0010012 | ||
155 | #define B2000000 0010013 | ||
156 | #define B2500000 0010014 | ||
157 | #define B3000000 0010015 | ||
158 | #define B3500000 0010016 | ||
159 | #define B4000000 0010017 | ||
160 | #define CIBAUD 002003600000 /* input baud rate (not used) */ | ||
161 | #define CMSPAR 010000000000 /* mark or space (stick) parity */ | ||
162 | #define CRTSCTS 020000000000 /* flow control */ | ||
163 | |||
164 | #define IBSHIFT 16 /* Shift from CBAUD to CIBAUD */ | ||
165 | |||
166 | /* c_lflag bits */ | ||
167 | |||
168 | #define ISIG 0000001 | ||
169 | #define ICANON 0000002 | ||
170 | #define XCASE 0000004 | ||
171 | #define ECHO 0000010 | ||
172 | #define ECHOE 0000020 | ||
173 | #define ECHOK 0000040 | ||
174 | #define ECHONL 0000100 | ||
175 | #define NOFLSH 0000200 | ||
176 | #define TOSTOP 0000400 | ||
177 | #define ECHOCTL 0001000 | ||
178 | #define ECHOPRT 0002000 | ||
179 | #define ECHOKE 0004000 | ||
180 | #define FLUSHO 0010000 | ||
181 | #define PENDIN 0040000 | ||
182 | #define IEXTEN 0100000 | ||
183 | |||
184 | /* tcflow() and TCXONC use these */ | ||
185 | |||
186 | #define TCOOFF 0 | ||
187 | #define TCOON 1 | ||
188 | #define TCIOFF 2 | ||
189 | #define TCION 3 | ||
190 | |||
191 | /* tcflush() and TCFLSH use these */ | ||
192 | |||
193 | #define TCIFLUSH 0 | ||
194 | #define TCOFLUSH 1 | ||
195 | #define TCIOFLUSH 2 | ||
196 | |||
197 | /* tcsetattr uses these */ | ||
198 | |||
199 | #define TCSANOW 0 | ||
200 | #define TCSADRAIN 1 | ||
201 | #define TCSAFLUSH 2 | ||
202 | |||
203 | #endif /* _ASM_MICROBLAZE_TERMBITS_H */ | ||
diff --git a/arch/microblaze/include/asm/termios.h b/arch/microblaze/include/asm/termios.h index 47a46d1fbe26..280d78a9d966 100644 --- a/arch/microblaze/include/asm/termios.h +++ b/arch/microblaze/include/asm/termios.h | |||
@@ -1,88 +1 @@ | |||
1 | /* | #include <asm-generic/termios.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_TERMIOS_H | ||
10 | #define _ASM_MICROBLAZE_TERMIOS_H | ||
11 | |||
12 | #include <linux/string.h> | ||
13 | #include <asm/termbits.h> | ||
14 | #include <asm/ioctls.h> | ||
15 | |||
16 | struct winsize { | ||
17 | unsigned short ws_row; | ||
18 | unsigned short ws_col; | ||
19 | unsigned short ws_xpixel; | ||
20 | unsigned short ws_ypixel; | ||
21 | }; | ||
22 | |||
23 | #define NCC 8 | ||
24 | struct termio { | ||
25 | unsigned short c_iflag; /* input mode flags */ | ||
26 | unsigned short c_oflag; /* output mode flags */ | ||
27 | unsigned short c_cflag; /* control mode flags */ | ||
28 | unsigned short c_lflag; /* local mode flags */ | ||
29 | unsigned char c_line; /* line discipline */ | ||
30 | unsigned char c_cc[NCC]; /* control characters */ | ||
31 | }; | ||
32 | |||
33 | #ifdef __KERNEL__ | ||
34 | /* intr=^C quit=^| erase=del kill=^U | ||
35 | eof=^D vtime=\0 vmin=\1 sxtc=\0 | ||
36 | start=^Q stop=^S susp=^Z eol=\0 | ||
37 | reprint=^R discard=^U werase=^W lnext=^V | ||
38 | eol2=\0 | ||
39 | */ | ||
40 | #define INIT_C_CC "\003\034\177\025\004\0\1\0\021\023\032\0\022\017\027\026\0" | ||
41 | #endif | ||
42 | |||
43 | /* Modem lines */ | ||
44 | |||
45 | #define TIOCM_LE 0x001 | ||
46 | #define TIOCM_DTR 0x002 | ||
47 | #define TIOCM_RTS 0x004 | ||
48 | #define TIOCM_ST 0x008 | ||
49 | #define TIOCM_SR 0x010 | ||
50 | #define TIOCM_CTS 0x020 | ||
51 | #define TIOCM_CAR 0x040 | ||
52 | #define TIOCM_RNG 0x080 | ||
53 | #define TIOCM_DSR 0x100 | ||
54 | #define TIOCM_CD TIOCM_CAR | ||
55 | #define TIOCM_RI TIOCM_RNG | ||
56 | #define TIOCM_OUT1 0x2000 | ||
57 | #define TIOCM_OUT2 0x4000 | ||
58 | #define TIOCM_LOOP 0x8000 | ||
59 | |||
60 | /* ioctl (fd, TIOCSERGETLSR, &result) where result may be as below */ | ||
61 | |||
62 | /* Line disciplines */ | ||
63 | |||
64 | #define N_TTY 0 | ||
65 | #define N_SLIP 1 | ||
66 | #define N_MOUSE 2 | ||
67 | #define N_PPP 3 | ||
68 | #define N_STRIP 4 | ||
69 | #define N_AX25 5 | ||
70 | #define N_X25 6 /* X.25 async */ | ||
71 | #define N_6PACK 7 | ||
72 | #define N_MASC 8 /* Reserved for Mobitex module <kaz@cafe.net> */ | ||
73 | #define N_R3964 9 /* Reserved for Simatic R3964 module */ | ||
74 | #define N_PROFIBUS_FDL 10 /* Reserved for Profibus <Dave@mvhi.com> */ | ||
75 | #define N_IRDA 11 /* Linux IR - http://irda.sourceforge.net/ */ | ||
76 | #define N_SMSBLOCK 12 /* SMS block mode - for talking to GSM data cards | ||
77 | about SMS messages */ | ||
78 | #define N_HDLC 13 /* synchronous HDLC */ | ||
79 | #define N_SYNC_PPP 14 | ||
80 | #define N_HCI 15 /* Bluetooth HCI UART */ | ||
81 | |||
82 | #ifdef __KERNEL__ | ||
83 | |||
84 | #include <asm-generic/termios-base.h> | ||
85 | |||
86 | #endif /* __KERNEL__ */ | ||
87 | |||
88 | #endif /* _ASM_MICROBLAZE_TERMIOS_H */ | ||
diff --git a/arch/microblaze/include/asm/timex.h b/arch/microblaze/include/asm/timex.h index 678525dc6d0b..befcf3de5532 100644 --- a/arch/microblaze/include/asm/timex.h +++ b/arch/microblaze/include/asm/timex.h | |||
@@ -9,10 +9,8 @@ | |||
9 | #ifndef _ASM_MICROBLAZE_TIMEX_H | 9 | #ifndef _ASM_MICROBLAZE_TIMEX_H |
10 | #define _ASM_MICROBLAZE_TIMEX_H | 10 | #define _ASM_MICROBLAZE_TIMEX_H |
11 | 11 | ||
12 | #define CLOCK_TICK_RATE 1000 /* Timer input freq. */ | 12 | #include <asm-generic/timex.h> |
13 | |||
14 | typedef unsigned long cycles_t; | ||
15 | 13 | ||
16 | #define get_cycles() (0) | 14 | #define CLOCK_TICK_RATE 1000 /* Timer input freq. */ |
17 | 15 | ||
18 | #endif /* _ASM_TIMEX_H */ | 16 | #endif /* _ASM_TIMEX_H */ |
diff --git a/arch/microblaze/include/asm/types.h b/arch/microblaze/include/asm/types.h index bebc018318f5..b9e79bc580dd 100644 --- a/arch/microblaze/include/asm/types.h +++ b/arch/microblaze/include/asm/types.h | |||
@@ -1,38 +1 @@ | |||
1 | /* | #include <asm-generic/types.h> | |
2 | * Copyright (C) Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_TYPES_H | ||
10 | #define _ASM_MICROBLAZE_TYPES_H | ||
11 | |||
12 | /* | ||
13 | * This file is never included by application software unless | ||
14 | * explicitly requested (e.g., via linux/types.h) in which case the | ||
15 | * application is Linux specific so (user-) name space pollution is | ||
16 | * not a major issue. However, for interoperability, libraries still | ||
17 | * need to be careful to avoid a name clashes. | ||
18 | */ | ||
19 | |||
20 | #include <asm-generic/int-ll64.h> | ||
21 | |||
22 | # ifndef __ASSEMBLY__ | ||
23 | |||
24 | typedef unsigned short umode_t; | ||
25 | |||
26 | /* | ||
27 | * These aren't exported outside the kernel to avoid name space clashes | ||
28 | */ | ||
29 | # ifdef __KERNEL__ | ||
30 | # define BITS_PER_LONG 32 | ||
31 | |||
32 | /* Dma addresses are 32-bits wide. */ | ||
33 | |||
34 | typedef u32 dma_addr_t; | ||
35 | |||
36 | # endif/* __KERNEL__ */ | ||
37 | # endif /* __ASSEMBLY__ */ | ||
38 | #endif /* _ASM_MICROBLAZE_TYPES_H */ | ||
diff --git a/arch/microblaze/include/asm/ucontext.h b/arch/microblaze/include/asm/ucontext.h index 11f6bb3ae3a4..9bc07b9f30fb 100644 --- a/arch/microblaze/include/asm/ucontext.h +++ b/arch/microblaze/include/asm/ucontext.h | |||
@@ -1,22 +1 @@ | |||
1 | /* | #include <asm-generic/ucontext.h> | |
2 | * Copyright (C) 2006 Atmark Techno, Inc. | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive | ||
6 | * for more details. | ||
7 | */ | ||
8 | |||
9 | #ifndef _ASM_MICROBLAZE_UCONTEXT_H | ||
10 | #define _ASM_MICROBLAZE_UCONTEXT_H | ||
11 | |||
12 | #include <asm/sigcontext.h> | ||
13 | |||
14 | struct ucontext { | ||
15 | unsigned long uc_flags; | ||
16 | struct ucontext *uc_link; | ||
17 | stack_t uc_stack; | ||
18 | struct sigcontext uc_mcontext; | ||
19 | sigset_t uc_sigmask; /* mask last for extensibility */ | ||
20 | }; | ||
21 | |||
22 | #endif /* _ASM_MICROBLAZE_UCONTEXT_H */ | ||
diff --git a/arch/microblaze/include/asm/unistd.h b/arch/microblaze/include/asm/unistd.h index b5e2f5fa5c53..0b852327c0e7 100644 --- a/arch/microblaze/include/asm/unistd.h +++ b/arch/microblaze/include/asm/unistd.h | |||
@@ -380,8 +380,10 @@ | |||
380 | #define __NR_accept04 362 /* new */ | 380 | #define __NR_accept04 362 /* new */ |
381 | #define __NR_preadv 363 /* new */ | 381 | #define __NR_preadv 363 /* new */ |
382 | #define __NR_pwritev 364 /* new */ | 382 | #define __NR_pwritev 364 /* new */ |
383 | #define __NR_rt_tgsigqueueinfo 365 /* new */ | ||
384 | #define __NR_perf_counter_open 366 /* new */ | ||
383 | 385 | ||
384 | #define __NR_syscalls 365 | 386 | #define __NR_syscalls 367 |
385 | 387 | ||
386 | #ifdef __KERNEL__ | 388 | #ifdef __KERNEL__ |
387 | #ifndef __ASSEMBLY__ | 389 | #ifndef __ASSEMBLY__ |
@@ -408,7 +410,7 @@ | |||
408 | #define __ARCH_WANT_SYS_SIGPENDING | 410 | #define __ARCH_WANT_SYS_SIGPENDING |
409 | #define __ARCH_WANT_SYS_SIGPROCMASK | 411 | #define __ARCH_WANT_SYS_SIGPROCMASK |
410 | #define __ARCH_WANT_SYS_RT_SIGACTION | 412 | #define __ARCH_WANT_SYS_RT_SIGACTION |
411 | /* #define __ARCH_WANT_SYS_RT_SIGSUSPEND */ | 413 | #define __ARCH_WANT_SYS_RT_SIGSUSPEND |
412 | 414 | ||
413 | /* | 415 | /* |
414 | * "Conditional" syscalls | 416 | * "Conditional" syscalls |
diff --git a/arch/microblaze/include/asm/vga.h b/arch/microblaze/include/asm/vga.h index 8b137891791f..89d82fd8fcf1 100644 --- a/arch/microblaze/include/asm/vga.h +++ b/arch/microblaze/include/asm/vga.h | |||
@@ -1 +1 @@ | |||
#include <asm-generic/vga.h> | |||
diff --git a/arch/microblaze/kernel/entry-nommu.S b/arch/microblaze/kernel/entry-nommu.S index 1fce6b803f54..9083d85376a4 100644 --- a/arch/microblaze/kernel/entry-nommu.S +++ b/arch/microblaze/kernel/entry-nommu.S | |||
@@ -551,30 +551,22 @@ no_work_pending: | |||
551 | rtid r14, 0 | 551 | rtid r14, 0 |
552 | nop | 552 | nop |
553 | 553 | ||
554 | sys_vfork_wrapper: | 554 | sys_vfork: |
555 | brid sys_vfork | 555 | brid microblaze_vfork |
556 | addk r5, r1, r0 | 556 | addk r5, r1, r0 |
557 | 557 | ||
558 | sys_clone_wrapper: | 558 | sys_clone: |
559 | brid sys_clone | 559 | brid microblaze_clone |
560 | addk r7, r1, r0 | 560 | addk r7, r1, r0 |
561 | 561 | ||
562 | sys_execve_wrapper: | 562 | sys_execve: |
563 | brid sys_execve | 563 | brid microblaze_execve |
564 | addk r8, r1, r0 | 564 | addk r8, r1, r0 |
565 | 565 | ||
566 | sys_sigreturn_wrapper: | ||
567 | brid sys_sigreturn | ||
568 | addk r5, r1, r0 | ||
569 | |||
570 | sys_rt_sigreturn_wrapper: | 566 | sys_rt_sigreturn_wrapper: |
571 | brid sys_rt_sigreturn | 567 | brid sys_rt_sigreturn |
572 | addk r5, r1, r0 | 568 | addk r5, r1, r0 |
573 | 569 | ||
574 | sys_sigsuspend_wrapper: | ||
575 | brid sys_rt_sigsuspend | ||
576 | addk r6, r1, r0 | ||
577 | |||
578 | sys_rt_sigsuspend_wrapper: | 570 | sys_rt_sigsuspend_wrapper: |
579 | brid sys_rt_sigsuspend | 571 | brid sys_rt_sigsuspend |
580 | addk r7, r1, r0 | 572 | addk r7, r1, r0 |
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S index 91a0e7b185dd..c7353e79f4a2 100644 --- a/arch/microblaze/kernel/entry.S +++ b/arch/microblaze/kernel/entry.S | |||
@@ -429,12 +429,11 @@ C_ENTRY(ret_from_fork): | |||
429 | brid ret_from_trap; /* Do normal trap return */ | 429 | brid ret_from_trap; /* Do normal trap return */ |
430 | nop; | 430 | nop; |
431 | 431 | ||
432 | C_ENTRY(sys_vfork_wrapper): | 432 | C_ENTRY(sys_vfork): |
433 | brid microblaze_vfork /* Do real work (tail-call) */ | ||
433 | la r5, r1, PTO | 434 | la r5, r1, PTO |
434 | brid sys_vfork /* Do real work (tail-call) */ | ||
435 | nop | ||
436 | 435 | ||
437 | C_ENTRY(sys_clone_wrapper): | 436 | C_ENTRY(sys_clone): |
438 | bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */ | 437 | bnei r6, 1f; /* See if child SP arg (arg 1) is 0. */ |
439 | lwi r6, r1, PTO+PT_R1; /* If so, use paret's stack ptr */ | 438 | lwi r6, r1, PTO+PT_R1; /* If so, use paret's stack ptr */ |
440 | 1: la r7, r1, PTO; /* Arg 2: parent context */ | 439 | 1: la r7, r1, PTO; /* Arg 2: parent context */ |
@@ -444,20 +443,9 @@ C_ENTRY(sys_clone_wrapper): | |||
444 | brid do_fork /* Do real work (tail-call) */ | 443 | brid do_fork /* Do real work (tail-call) */ |
445 | nop; | 444 | nop; |
446 | 445 | ||
447 | C_ENTRY(sys_execve_wrapper): | 446 | C_ENTRY(sys_execve): |
448 | la r8, r1, PTO; /* add user context as 4th arg */ | 447 | la r8, r1, PTO; /* add user context as 4th arg */ |
449 | brid sys_execve; /* Do real work (tail-call).*/ | 448 | brid microblaze_execve; /* Do real work (tail-call).*/ |
450 | nop; | ||
451 | |||
452 | C_ENTRY(sys_sigsuspend_wrapper): | ||
453 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
454 | swi r4, r1, PTO+PT_R4; | ||
455 | la r6, r1, PTO; /* add user context as 2nd arg */ | ||
456 | bralid r15, sys_sigsuspend; /* Do real work.*/ | ||
457 | nop; | ||
458 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
459 | lwi r4, r1, PTO+PT_R4; | ||
460 | bri ret_from_trap /* fall through will not work here due to align */ | ||
461 | nop; | 449 | nop; |
462 | 450 | ||
463 | C_ENTRY(sys_rt_sigsuspend_wrapper): | 451 | C_ENTRY(sys_rt_sigsuspend_wrapper): |
@@ -471,18 +459,6 @@ C_ENTRY(sys_rt_sigsuspend_wrapper): | |||
471 | bri ret_from_trap /* fall through will not work here due to align */ | 459 | bri ret_from_trap /* fall through will not work here due to align */ |
472 | nop; | 460 | nop; |
473 | 461 | ||
474 | |||
475 | C_ENTRY(sys_sigreturn_wrapper): | ||
476 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
477 | swi r4, r1, PTO+PT_R4; | ||
478 | la r5, r1, PTO; /* add user context as 1st arg */ | ||
479 | brlid r15, sys_sigreturn; /* Do real work.*/ | ||
480 | nop; | ||
481 | lwi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | ||
482 | lwi r4, r1, PTO+PT_R4; | ||
483 | bri ret_from_trap /* fall through will not work here due to align */ | ||
484 | nop; | ||
485 | |||
486 | C_ENTRY(sys_rt_sigreturn_wrapper): | 462 | C_ENTRY(sys_rt_sigreturn_wrapper): |
487 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ | 463 | swi r3, r1, PTO+PT_R3; /* restore saved r3, r4 registers */ |
488 | swi r4, r1, PTO+PT_R4; | 464 | swi r4, r1, PTO+PT_R4; |
diff --git a/arch/microblaze/kernel/signal.c b/arch/microblaze/kernel/signal.c index 4c0e6521b114..493819c25fba 100644 --- a/arch/microblaze/kernel/signal.c +++ b/arch/microblaze/kernel/signal.c | |||
@@ -45,91 +45,8 @@ | |||
45 | 45 | ||
46 | asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_sycall); | 46 | asmlinkage int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_sycall); |
47 | 47 | ||
48 | /* | ||
49 | * Atomically swap in the new signal mask, and wait for a signal. | ||
50 | */ | ||
51 | asmlinkage int | ||
52 | sys_sigsuspend(old_sigset_t mask, struct pt_regs *regs) | ||
53 | { | ||
54 | sigset_t saveset; | ||
55 | |||
56 | mask &= _BLOCKABLE; | ||
57 | spin_lock_irq(¤t->sighand->siglock); | ||
58 | saveset = current->blocked; | ||
59 | siginitset(¤t->blocked, mask); | ||
60 | recalc_sigpending(); | ||
61 | spin_unlock_irq(¤t->sighand->siglock); | ||
62 | |||
63 | regs->r3 = -EINTR; | ||
64 | while (1) { | ||
65 | current->state = TASK_INTERRUPTIBLE; | ||
66 | schedule(); | ||
67 | if (do_signal(regs, &saveset, 1)) | ||
68 | return -EINTR; | ||
69 | } | ||
70 | } | ||
71 | |||
72 | asmlinkage int | ||
73 | sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, | ||
74 | struct pt_regs *regs) | ||
75 | { | ||
76 | sigset_t saveset, newset; | ||
77 | |||
78 | /* XXX: Don't preclude handling different sized sigset_t's. */ | ||
79 | if (sigsetsize != sizeof(sigset_t)) | ||
80 | return -EINVAL; | ||
81 | |||
82 | if (copy_from_user(&newset, unewset, sizeof(newset))) | ||
83 | return -EFAULT; | ||
84 | sigdelsetmask(&newset, ~_BLOCKABLE); | ||
85 | spin_lock_irq(¤t->sighand->siglock); | ||
86 | saveset = current->blocked; | ||
87 | current->blocked = newset; | ||
88 | recalc_sigpending(); | ||
89 | spin_unlock_irq(¤t->sighand->siglock); | ||
90 | |||
91 | regs->r3 = -EINTR; | ||
92 | while (1) { | ||
93 | current->state = TASK_INTERRUPTIBLE; | ||
94 | schedule(); | ||
95 | if (do_signal(regs, &saveset, 1)) | ||
96 | return -EINTR; | ||
97 | } | ||
98 | } | ||
99 | |||
100 | asmlinkage int | ||
101 | sys_sigaction(int sig, const struct old_sigaction *act, | ||
102 | struct old_sigaction *oact) | ||
103 | { | ||
104 | struct k_sigaction new_ka, old_ka; | ||
105 | int ret; | ||
106 | |||
107 | if (act) { | ||
108 | old_sigset_t mask; | ||
109 | if (!access_ok(VERIFY_READ, act, sizeof(*act)) || | ||
110 | __get_user(new_ka.sa.sa_handler, &act->sa_handler) || | ||
111 | __get_user(new_ka.sa.sa_restorer, &act->sa_restorer)) | ||
112 | return -EFAULT; | ||
113 | __get_user(new_ka.sa.sa_flags, &act->sa_flags); | ||
114 | __get_user(mask, &act->sa_mask); | ||
115 | siginitset(&new_ka.sa.sa_mask, mask); | ||
116 | } | ||
117 | 48 | ||
118 | ret = do_sigaction(sig, act ? &new_ka : NULL, oact ? &old_ka : NULL); | 49 | asmlinkage long |
119 | |||
120 | if (!ret && oact) { | ||
121 | if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) || | ||
122 | __put_user(old_ka.sa.sa_handler, &oact->sa_handler) || | ||
123 | __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer)) | ||
124 | return -EFAULT; | ||
125 | __put_user(old_ka.sa.sa_flags, &oact->sa_flags); | ||
126 | __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask); | ||
127 | } | ||
128 | |||
129 | return ret; | ||
130 | } | ||
131 | |||
132 | asmlinkage int | ||
133 | sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, | 50 | sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, |
134 | struct pt_regs *regs) | 51 | struct pt_regs *regs) |
135 | { | 52 | { |
@@ -139,7 +56,6 @@ sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, | |||
139 | /* | 56 | /* |
140 | * Do a signal return; undo the signal stack. | 57 | * Do a signal return; undo the signal stack. |
141 | */ | 58 | */ |
142 | |||
143 | struct sigframe { | 59 | struct sigframe { |
144 | struct sigcontext sc; | 60 | struct sigcontext sc; |
145 | unsigned long extramask[_NSIG_WORDS-1]; | 61 | unsigned long extramask[_NSIG_WORDS-1]; |
@@ -176,40 +92,7 @@ static int restore_sigcontext(struct pt_regs *regs, | |||
176 | return err; | 92 | return err; |
177 | } | 93 | } |
178 | 94 | ||
179 | asmlinkage int sys_sigreturn(struct pt_regs *regs) | 95 | asmlinkage long sys_rt_sigreturn(struct pt_regs *regs) |
180 | { | ||
181 | struct sigframe *frame = | ||
182 | (struct sigframe *)(regs->r1 + STATE_SAVE_ARG_SPACE); | ||
183 | |||
184 | sigset_t set; | ||
185 | int rval; | ||
186 | |||
187 | if (!access_ok(VERIFY_READ, frame, sizeof(*frame))) | ||
188 | goto badframe; | ||
189 | |||
190 | if (__get_user(set.sig[0], &frame->sc.oldmask) | ||
191 | || (_NSIG_WORDS > 1 | ||
192 | && __copy_from_user(&set.sig[1], &frame->extramask, | ||
193 | sizeof(frame->extramask)))) | ||
194 | goto badframe; | ||
195 | |||
196 | sigdelsetmask(&set, ~_BLOCKABLE); | ||
197 | |||
198 | spin_lock_irq(¤t->sighand->siglock); | ||
199 | current->blocked = set; | ||
200 | recalc_sigpending(); | ||
201 | spin_unlock_irq(¤t->sighand->siglock); | ||
202 | |||
203 | if (restore_sigcontext(regs, &frame->sc, &rval)) | ||
204 | goto badframe; | ||
205 | return rval; | ||
206 | |||
207 | badframe: | ||
208 | force_sig(SIGSEGV, current); | ||
209 | return 0; | ||
210 | } | ||
211 | |||
212 | asmlinkage int sys_rt_sigreturn(struct pt_regs *regs) | ||
213 | { | 96 | { |
214 | struct rt_sigframe __user *frame = | 97 | struct rt_sigframe __user *frame = |
215 | (struct rt_sigframe __user *)(regs->r1 + STATE_SAVE_ARG_SPACE); | 98 | (struct rt_sigframe __user *)(regs->r1 + STATE_SAVE_ARG_SPACE); |
@@ -324,21 +207,17 @@ static void setup_rt_frame(int sig, struct k_sigaction *ka, siginfo_t *info, | |||
324 | /* Set up to return from userspace. If provided, use a stub | 207 | /* Set up to return from userspace. If provided, use a stub |
325 | already in userspace. */ | 208 | already in userspace. */ |
326 | /* minus 8 is offset to cater for "rtsd r15,8" */ | 209 | /* minus 8 is offset to cater for "rtsd r15,8" */ |
327 | if (ka->sa.sa_flags & SA_RESTORER) { | 210 | /* addi r12, r0, __NR_sigreturn */ |
328 | regs->r15 = ((unsigned long)ka->sa.sa_restorer)-8; | 211 | err |= __put_user(0x31800000 | __NR_rt_sigreturn , |
329 | } else { | 212 | frame->tramp + 0); |
330 | /* addi r12, r0, __NR_sigreturn */ | 213 | /* brki r14, 0x8 */ |
331 | err |= __put_user(0x31800000 | __NR_rt_sigreturn , | 214 | err |= __put_user(0xb9cc0008, frame->tramp + 1); |
332 | frame->tramp + 0); | 215 | |
333 | /* brki r14, 0x8 */ | 216 | /* Return from sighandler will jump to the tramp. |
334 | err |= __put_user(0xb9cc0008, frame->tramp + 1); | 217 | Negative 8 offset because return is rtsd r15, 8 */ |
335 | 218 | regs->r15 = ((unsigned long)frame->tramp)-8; | |
336 | /* Return from sighandler will jump to the tramp. | 219 | |
337 | Negative 8 offset because return is rtsd r15, 8 */ | 220 | __invalidate_cache_sigtramp((unsigned long)frame->tramp); |
338 | regs->r15 = ((unsigned long)frame->tramp)-8; | ||
339 | |||
340 | __invalidate_cache_sigtramp((unsigned long)frame->tramp); | ||
341 | } | ||
342 | 221 | ||
343 | if (err) | 222 | if (err) |
344 | goto give_sigsegv; | 223 | goto give_sigsegv; |
@@ -405,7 +284,7 @@ do_restart: | |||
405 | * OK, we're invoking a handler | 284 | * OK, we're invoking a handler |
406 | */ | 285 | */ |
407 | 286 | ||
408 | static void | 287 | static int |
409 | handle_signal(unsigned long sig, struct k_sigaction *ka, | 288 | handle_signal(unsigned long sig, struct k_sigaction *ka, |
410 | siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) | 289 | siginfo_t *info, sigset_t *oldset, struct pt_regs *regs) |
411 | { | 290 | { |
@@ -426,6 +305,7 @@ handle_signal(unsigned long sig, struct k_sigaction *ka, | |||
426 | recalc_sigpending(); | 305 | recalc_sigpending(); |
427 | spin_unlock_irq(¤t->sighand->siglock); | 306 | spin_unlock_irq(¤t->sighand->siglock); |
428 | } | 307 | } |
308 | return 1; | ||
429 | } | 309 | } |
430 | 310 | ||
431 | /* | 311 | /* |
@@ -456,7 +336,9 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_syscall) | |||
456 | if (kernel_mode(regs)) | 336 | if (kernel_mode(regs)) |
457 | return 1; | 337 | return 1; |
458 | 338 | ||
459 | if (!oldset) | 339 | if (current_thread_info()->status & TS_RESTORE_SIGMASK) |
340 | oldset = ¤t->saved_sigmask; | ||
341 | else | ||
460 | oldset = ¤t->blocked; | 342 | oldset = ¤t->blocked; |
461 | 343 | ||
462 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); | 344 | signr = get_signal_to_deliver(&info, &ka, regs, NULL); |
@@ -464,13 +346,31 @@ int do_signal(struct pt_regs *regs, sigset_t *oldset, int in_syscall) | |||
464 | /* Whee! Actually deliver the signal. */ | 346 | /* Whee! Actually deliver the signal. */ |
465 | if (in_syscall) | 347 | if (in_syscall) |
466 | handle_restart(regs, &ka, 1); | 348 | handle_restart(regs, &ka, 1); |
467 | handle_signal(signr, &ka, &info, oldset, regs); | 349 | if (handle_signal(signr, &ka, &info, oldset, regs)) { |
350 | /* | ||
351 | * A signal was successfully delivered; the saved | ||
352 | * sigmask will have been stored in the signal frame, | ||
353 | * and will be restored by sigreturn, so we can simply | ||
354 | * clear the TS_RESTORE_SIGMASK flag. | ||
355 | */ | ||
356 | current_thread_info()->status &= | ||
357 | ~TS_RESTORE_SIGMASK; | ||
358 | } | ||
468 | return 1; | 359 | return 1; |
469 | } | 360 | } |
470 | 361 | ||
471 | if (in_syscall) | 362 | if (in_syscall) |
472 | handle_restart(regs, NULL, 0); | 363 | handle_restart(regs, NULL, 0); |
473 | 364 | ||
365 | /* | ||
366 | * If there's no signal to deliver, we just put the saved sigmask | ||
367 | * back. | ||
368 | */ | ||
369 | if (current_thread_info()->status & TS_RESTORE_SIGMASK) { | ||
370 | current_thread_info()->status &= ~TS_RESTORE_SIGMASK; | ||
371 | sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); | ||
372 | } | ||
373 | |||
474 | /* Did we come from a system call? */ | 374 | /* Did we come from a system call? */ |
475 | return 0; | 375 | return 0; |
476 | } | 376 | } |
diff --git a/arch/microblaze/kernel/sys_microblaze.c b/arch/microblaze/kernel/sys_microblaze.c index 31905ff590b7..8c9ebac5da10 100644 --- a/arch/microblaze/kernel/sys_microblaze.c +++ b/arch/microblaze/kernel/sys_microblaze.c | |||
@@ -39,7 +39,7 @@ | |||
39 | * | 39 | * |
40 | * This is really horribly ugly. This will be remove with new toolchain. | 40 | * This is really horribly ugly. This will be remove with new toolchain. |
41 | */ | 41 | */ |
42 | asmlinkage int | 42 | asmlinkage long |
43 | sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth) | 43 | sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth) |
44 | { | 44 | { |
45 | int version, ret; | 45 | int version, ret; |
@@ -134,20 +134,20 @@ sys_ipc(uint call, int first, int second, int third, void *ptr, long fifth) | |||
134 | return ret; | 134 | return ret; |
135 | } | 135 | } |
136 | 136 | ||
137 | asmlinkage int sys_vfork(struct pt_regs *regs) | 137 | asmlinkage long microblaze_vfork(struct pt_regs *regs) |
138 | { | 138 | { |
139 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->r1, | 139 | return do_fork(CLONE_VFORK | CLONE_VM | SIGCHLD, regs->r1, |
140 | regs, 0, NULL, NULL); | 140 | regs, 0, NULL, NULL); |
141 | } | 141 | } |
142 | 142 | ||
143 | asmlinkage int sys_clone(int flags, unsigned long stack, struct pt_regs *regs) | 143 | asmlinkage long microblaze_clone(int flags, unsigned long stack, struct pt_regs *regs) |
144 | { | 144 | { |
145 | if (!stack) | 145 | if (!stack) |
146 | stack = regs->r1; | 146 | stack = regs->r1; |
147 | return do_fork(flags, stack, regs, 0, NULL, NULL); | 147 | return do_fork(flags, stack, regs, 0, NULL, NULL); |
148 | } | 148 | } |
149 | 149 | ||
150 | asmlinkage int sys_execve(char __user *filenamei, char __user *__user *argv, | 150 | asmlinkage long microblaze_execve(char __user *filenamei, char __user *__user *argv, |
151 | char __user *__user *envp, struct pt_regs *regs) | 151 | char __user *__user *envp, struct pt_regs *regs) |
152 | { | 152 | { |
153 | int error; | 153 | int error; |
@@ -163,8 +163,8 @@ out: | |||
163 | return error; | 163 | return error; |
164 | } | 164 | } |
165 | 165 | ||
166 | asmlinkage unsigned long | 166 | asmlinkage long |
167 | sys_mmap2(unsigned long addr, size_t len, | 167 | sys_mmap2(unsigned long addr, unsigned long len, |
168 | unsigned long prot, unsigned long flags, | 168 | unsigned long prot, unsigned long flags, |
169 | unsigned long fd, unsigned long pgoff) | 169 | unsigned long fd, unsigned long pgoff) |
170 | { | 170 | { |
@@ -189,18 +189,18 @@ out: | |||
189 | return ret; | 189 | return ret; |
190 | } | 190 | } |
191 | 191 | ||
192 | asmlinkage unsigned long sys_mmap(unsigned long addr, size_t len, | 192 | asmlinkage long sys_mmap(unsigned long addr, unsigned long len, |
193 | unsigned long prot, unsigned long flags, | 193 | unsigned long prot, unsigned long flags, |
194 | unsigned long fd, off_t offset) | 194 | unsigned long fd, off_t pgoff) |
195 | { | 195 | { |
196 | int err = -EINVAL; | 196 | int err = -EINVAL; |
197 | 197 | ||
198 | if (offset & ~PAGE_MASK) { | 198 | if (pgoff & ~PAGE_MASK) { |
199 | printk(KERN_INFO "no pagemask in mmap\r\n"); | 199 | printk(KERN_INFO "no pagemask in mmap\r\n"); |
200 | goto out; | 200 | goto out; |
201 | } | 201 | } |
202 | 202 | ||
203 | err = sys_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT); | 203 | err = sys_mmap2(addr, len, prot, flags, fd, pgoff >> PAGE_SHIFT); |
204 | out: | 204 | out: |
205 | return err; | 205 | return err; |
206 | } | 206 | } |
diff --git a/arch/microblaze/kernel/syscall_table.S b/arch/microblaze/kernel/syscall_table.S index 376d1789f7c0..31b32a6c5f4e 100644 --- a/arch/microblaze/kernel/syscall_table.S +++ b/arch/microblaze/kernel/syscall_table.S | |||
@@ -15,7 +15,7 @@ ENTRY(sys_call_table) | |||
15 | .long sys_creat | 15 | .long sys_creat |
16 | .long sys_link | 16 | .long sys_link |
17 | .long sys_unlink /* 10 */ | 17 | .long sys_unlink /* 10 */ |
18 | .long sys_execve_wrapper | 18 | .long sys_execve |
19 | .long sys_chdir | 19 | .long sys_chdir |
20 | .long sys_time | 20 | .long sys_time |
21 | .long sys_mknod | 21 | .long sys_mknod |
@@ -71,12 +71,12 @@ ENTRY(sys_call_table) | |||
71 | .long sys_getppid | 71 | .long sys_getppid |
72 | .long sys_getpgrp /* 65 */ | 72 | .long sys_getpgrp /* 65 */ |
73 | .long sys_setsid | 73 | .long sys_setsid |
74 | .long sys_sigaction | 74 | .long sys_ni_syscall /* sys_sigaction */ |
75 | .long sys_sgetmask | 75 | .long sys_sgetmask |
76 | .long sys_ssetmask | 76 | .long sys_ssetmask |
77 | .long sys_setreuid /* 70 */ | 77 | .long sys_setreuid /* 70 */ |
78 | .long sys_setregid | 78 | .long sys_setregid |
79 | .long sys_sigsuspend_wrapper | 79 | .long sys_ni_syscall /* sys_sigsuspend_wrapper */ |
80 | .long sys_sigpending | 80 | .long sys_sigpending |
81 | .long sys_sethostname | 81 | .long sys_sethostname |
82 | .long sys_setrlimit /* 75 */ | 82 | .long sys_setrlimit /* 75 */ |
@@ -123,8 +123,8 @@ ENTRY(sys_call_table) | |||
123 | .long sys_sysinfo | 123 | .long sys_sysinfo |
124 | .long sys_ipc | 124 | .long sys_ipc |
125 | .long sys_fsync | 125 | .long sys_fsync |
126 | .long sys_sigreturn_wrapper | 126 | .long sys_ni_syscall /* sys_sigreturn_wrapper */ |
127 | .long sys_clone_wrapper /* 120 */ | 127 | .long sys_clone /* 120 */ |
128 | .long sys_setdomainname | 128 | .long sys_setdomainname |
129 | .long sys_newuname | 129 | .long sys_newuname |
130 | .long sys_ni_syscall /* modify_ldt */ | 130 | .long sys_ni_syscall /* modify_ldt */ |
@@ -194,7 +194,7 @@ ENTRY(sys_call_table) | |||
194 | .long sys_sendfile | 194 | .long sys_sendfile |
195 | .long sys_ni_syscall /* reserved for streams1 */ | 195 | .long sys_ni_syscall /* reserved for streams1 */ |
196 | .long sys_ni_syscall /* reserved for streams2 */ | 196 | .long sys_ni_syscall /* reserved for streams2 */ |
197 | .long sys_vfork_wrapper /* 190 */ | 197 | .long sys_vfork /* 190 */ |
198 | .long sys_getrlimit | 198 | .long sys_getrlimit |
199 | .long sys_mmap2 /* mmap2 */ | 199 | .long sys_mmap2 /* mmap2 */ |
200 | .long sys_truncate64 | 200 | .long sys_truncate64 |
@@ -369,3 +369,5 @@ ENTRY(sys_call_table) | |||
369 | .long sys_ni_syscall | 369 | .long sys_ni_syscall |
370 | .long sys_ni_syscall | 370 | .long sys_ni_syscall |
371 | .long sys_ni_syscall | 371 | .long sys_ni_syscall |
372 | .long sys_rt_tgsigqueueinfo /* 365 */ | ||
373 | .long sys_perf_counter_open | ||
diff --git a/arch/microblaze/lib/Makefile b/arch/microblaze/lib/Makefile index 71c8cb6c9e43..b579db068c06 100644 --- a/arch/microblaze/lib/Makefile +++ b/arch/microblaze/lib/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile | 2 | # Makefile |
3 | # | 3 | # |
4 | 4 | ||
5 | lib-y := memset.o checksum.o | 5 | lib-y := memset.o |
6 | 6 | ||
7 | ifeq ($(CONFIG_OPT_LIB_ASM),y) | 7 | ifeq ($(CONFIG_OPT_LIB_ASM),y) |
8 | lib-y += fastcopy.o | 8 | lib-y += fastcopy.o |
diff --git a/arch/microblaze/lib/checksum.c b/arch/microblaze/lib/checksum.c deleted file mode 100644 index f08e74591418..000000000000 --- a/arch/microblaze/lib/checksum.c +++ /dev/null | |||
@@ -1,172 +0,0 @@ | |||
1 | /* | ||
2 | * | ||
3 | * INET An implementation of the TCP/IP protocol suite for the LINUX | ||
4 | * operating system. INET is implemented using the BSD Socket | ||
5 | * interface as the means of communication with the user level. | ||
6 | * | ||
7 | * IP/TCP/UDP checksumming routines | ||
8 | * | ||
9 | * Authors: Jorge Cwik, <jorge@laser.satlink.net> | ||
10 | * Arnt Gulbrandsen, <agulbra@nvg.unit.no> | ||
11 | * Tom May, <ftom@netcom.com> | ||
12 | * Andreas Schwab, <schwab@issan.informatik.uni-dortmund.de> | ||
13 | * Lots of code moved from tcp.c and ip.c; see those files | ||
14 | * for more names. | ||
15 | * | ||
16 | * 03/02/96 Jes Sorensen, Andreas Schwab, Roman Hodek: | ||
17 | * Fixed some nasty bugs, causing some horrible crashes. | ||
18 | * A: At some points, the sum (%0) was used as | ||
19 | * length-counter instead of the length counter | ||
20 | * (%1). Thanks to Roman Hodek for pointing this out. | ||
21 | * B: GCC seems to mess up if one uses too many | ||
22 | * data-registers to hold input values and one tries to | ||
23 | * specify d0 and d1 as scratch registers. Letting gcc | ||
24 | * choose these registers itself solves the problem. | ||
25 | * | ||
26 | * This program is free software; you can redistribute it and/or | ||
27 | * modify it under the terms of the GNU General Public License | ||
28 | * as published by the Free Software Foundation; either version | ||
29 | * 2 of the License, or (at your option) any later version. | ||
30 | */ | ||
31 | |||
32 | /* Revised by Kenneth Albanowski for m68knommu. Basic problem: unaligned access | ||
33 | kills, so most of the assembly has to go. */ | ||
34 | |||
35 | #include <linux/module.h> | ||
36 | #include <net/checksum.h> | ||
37 | |||
38 | #include <asm/byteorder.h> | ||
39 | |||
40 | static inline unsigned short from32to16(unsigned long x) | ||
41 | { | ||
42 | /* add up 16-bit and 16-bit for 16+c bit */ | ||
43 | x = (x & 0xffff) + (x >> 16); | ||
44 | /* add up carry.. */ | ||
45 | x = (x & 0xffff) + (x >> 16); | ||
46 | return x; | ||
47 | } | ||
48 | |||
49 | static unsigned int do_csum(const unsigned char *buff, int len) | ||
50 | { | ||
51 | int odd, count; | ||
52 | unsigned long result = 0; | ||
53 | |||
54 | if (len <= 0) | ||
55 | goto out; | ||
56 | odd = 1 & (unsigned long) buff; | ||
57 | if (odd) { | ||
58 | result = *buff; | ||
59 | len--; | ||
60 | buff++; | ||
61 | } | ||
62 | count = len >> 1; /* nr of 16-bit words.. */ | ||
63 | if (count) { | ||
64 | if (2 & (unsigned long) buff) { | ||
65 | result += *(unsigned short *) buff; | ||
66 | count--; | ||
67 | len -= 2; | ||
68 | buff += 2; | ||
69 | } | ||
70 | count >>= 1; /* nr of 32-bit words.. */ | ||
71 | if (count) { | ||
72 | unsigned long carry = 0; | ||
73 | do { | ||
74 | unsigned long w = *(unsigned long *) buff; | ||
75 | count--; | ||
76 | buff += 4; | ||
77 | result += carry; | ||
78 | result += w; | ||
79 | carry = (w > result); | ||
80 | } while (count); | ||
81 | result += carry; | ||
82 | result = (result & 0xffff) + (result >> 16); | ||
83 | } | ||
84 | if (len & 2) { | ||
85 | result += *(unsigned short *) buff; | ||
86 | buff += 2; | ||
87 | } | ||
88 | } | ||
89 | if (len & 1) | ||
90 | result += (*buff << 8); | ||
91 | result = from32to16(result); | ||
92 | if (odd) | ||
93 | result = ((result >> 8) & 0xff) | ((result & 0xff) << 8); | ||
94 | out: | ||
95 | return result; | ||
96 | } | ||
97 | |||
98 | /* | ||
99 | * This is a version of ip_compute_csum() optimized for IP headers, | ||
100 | * which always checksum on 4 octet boundaries. | ||
101 | */ | ||
102 | __sum16 ip_fast_csum(const void *iph, unsigned int ihl) | ||
103 | { | ||
104 | return (__force __sum16)~do_csum(iph, ihl*4); | ||
105 | } | ||
106 | EXPORT_SYMBOL(ip_fast_csum); | ||
107 | |||
108 | /* | ||
109 | * computes the checksum of a memory block at buff, length len, | ||
110 | * and adds in "sum" (32-bit) | ||
111 | * | ||
112 | * returns a 32-bit number suitable for feeding into itself | ||
113 | * or csum_tcpudp_magic | ||
114 | * | ||
115 | * this function must be called with even lengths, except | ||
116 | * for the last fragment, which may be odd | ||
117 | * | ||
118 | * it's best to have buff aligned on a 32-bit boundary | ||
119 | */ | ||
120 | __wsum csum_partial(const void *buff, int len, __wsum wsum) | ||
121 | { | ||
122 | unsigned int sum = (__force unsigned int)wsum; | ||
123 | unsigned int result = do_csum(buff, len); | ||
124 | |||
125 | /* add in old sum, and carry.. */ | ||
126 | result += sum; | ||
127 | if (sum > result) | ||
128 | result += 1; | ||
129 | return (__force __wsum)result; | ||
130 | } | ||
131 | EXPORT_SYMBOL(csum_partial); | ||
132 | |||
133 | /* | ||
134 | * this routine is used for miscellaneous IP-like checksums, mainly | ||
135 | * in icmp.c | ||
136 | */ | ||
137 | __sum16 ip_compute_csum(const void *buff, int len) | ||
138 | { | ||
139 | return (__force __sum16)~do_csum(buff, len); | ||
140 | } | ||
141 | EXPORT_SYMBOL(ip_compute_csum); | ||
142 | |||
143 | /* | ||
144 | * copy from fs while checksumming, otherwise like csum_partial | ||
145 | */ | ||
146 | __wsum | ||
147 | csum_partial_copy_from_user(const void __user *src, void *dst, int len, | ||
148 | __wsum sum, int *csum_err) | ||
149 | { | ||
150 | int missing; | ||
151 | |||
152 | missing = __copy_from_user(dst, src, len); | ||
153 | if (missing) { | ||
154 | memset(dst + len - missing, 0, missing); | ||
155 | *csum_err = -EFAULT; | ||
156 | } else | ||
157 | *csum_err = 0; | ||
158 | |||
159 | return csum_partial(dst, len, sum); | ||
160 | } | ||
161 | EXPORT_SYMBOL(csum_partial_copy_from_user); | ||
162 | |||
163 | /* | ||
164 | * copy from ds while checksumming, otherwise like csum_partial | ||
165 | */ | ||
166 | __wsum | ||
167 | csum_partial_copy(const void *src, void *dst, int len, __wsum sum) | ||
168 | { | ||
169 | memcpy(dst, src, len); | ||
170 | return csum_partial(dst, len, sum); | ||
171 | } | ||
172 | EXPORT_SYMBOL(csum_partial_copy); | ||
diff --git a/arch/microblaze/mm/init.c b/arch/microblaze/mm/init.c index b5a701cd71e0..8d92c4efe9a4 100644 --- a/arch/microblaze/mm/init.c +++ b/arch/microblaze/mm/init.c | |||
@@ -80,15 +80,15 @@ void __init setup_memory(void) | |||
80 | memory_size = memory_end - memory_start; | 80 | memory_size = memory_end - memory_start; |
81 | PAGE_OFFSET = memory_start; | 81 | PAGE_OFFSET = memory_start; |
82 | printk(KERN_INFO "%s: Main mem: 0x%x-0x%x, " | 82 | printk(KERN_INFO "%s: Main mem: 0x%x-0x%x, " |
83 | "size 0x%08x\n", __func__, memory_start, | 83 | "size 0x%08x\n", __func__, (u32) memory_start, |
84 | memory_end, memory_size); | 84 | (u32) memory_end, (u32) memory_size); |
85 | break; | 85 | break; |
86 | } | 86 | } |
87 | } | 87 | } |
88 | 88 | ||
89 | if (!memory_start || !memory_end) { | 89 | if (!memory_start || !memory_end) { |
90 | panic("%s: Missing memory setting 0x%08x-0x%08x\n", | 90 | panic("%s: Missing memory setting 0x%08x-0x%08x\n", |
91 | __func__, memory_start, memory_end); | 91 | __func__, (u32) memory_start, (u32) memory_end); |
92 | } | 92 | } |
93 | 93 | ||
94 | /* reservation of region where is the kernel */ | 94 | /* reservation of region where is the kernel */ |
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 8c4be1f301cf..3ca0fe1a9123 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -22,6 +22,26 @@ choice | |||
22 | config MACH_ALCHEMY | 22 | config MACH_ALCHEMY |
23 | bool "Alchemy processor based machines" | 23 | bool "Alchemy processor based machines" |
24 | 24 | ||
25 | config AR7 | ||
26 | bool "Texas Instruments AR7" | ||
27 | select BOOT_ELF32 | ||
28 | select DMA_NONCOHERENT | ||
29 | select CEVT_R4K | ||
30 | select CSRC_R4K | ||
31 | select IRQ_CPU | ||
32 | select NO_EXCEPT_FILL | ||
33 | select SWAP_IO_SPACE | ||
34 | select SYS_HAS_CPU_MIPS32_R1 | ||
35 | select SYS_HAS_EARLY_PRINTK | ||
36 | select SYS_SUPPORTS_32BIT_KERNEL | ||
37 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
38 | select GENERIC_GPIO | ||
39 | select GCD | ||
40 | select VLYNQ | ||
41 | help | ||
42 | Support for the Texas Instruments AR7 System-on-a-Chip | ||
43 | family: TNETD7100, 7200 and 7300. | ||
44 | |||
25 | config BASLER_EXCITE | 45 | config BASLER_EXCITE |
26 | bool "Basler eXcite smart camera" | 46 | bool "Basler eXcite smart camera" |
27 | select CEVT_R4K | 47 | select CEVT_R4K |
@@ -209,7 +229,7 @@ config MIPS_MALTA | |||
209 | select SYS_SUPPORTS_64BIT_KERNEL | 229 | select SYS_SUPPORTS_64BIT_KERNEL |
210 | select SYS_SUPPORTS_BIG_ENDIAN | 230 | select SYS_SUPPORTS_BIG_ENDIAN |
211 | select SYS_SUPPORTS_LITTLE_ENDIAN | 231 | select SYS_SUPPORTS_LITTLE_ENDIAN |
212 | select SYS_SUPPORTS_MIPS_CMP if BROKEN # because SYNC_R4K is broken | 232 | select SYS_SUPPORTS_MIPS_CMP |
213 | select SYS_SUPPORTS_MULTITHREADING | 233 | select SYS_SUPPORTS_MULTITHREADING |
214 | select SYS_SUPPORTS_SMARTMIPS | 234 | select SYS_SUPPORTS_SMARTMIPS |
215 | help | 235 | help |
@@ -247,6 +267,7 @@ config MACH_VR41XX | |||
247 | select CEVT_R4K | 267 | select CEVT_R4K |
248 | select CSRC_R4K | 268 | select CSRC_R4K |
249 | select SYS_HAS_CPU_VR41XX | 269 | select SYS_HAS_CPU_VR41XX |
270 | select ARCH_REQUIRE_GPIOLIB | ||
250 | 271 | ||
251 | config NXP_STB220 | 272 | config NXP_STB220 |
252 | bool "NXP STB220 board" | 273 | bool "NXP STB220 board" |
@@ -1635,7 +1656,7 @@ config MIPS_APSP_KSPD | |||
1635 | config MIPS_CMP | 1656 | config MIPS_CMP |
1636 | bool "MIPS CMP framework support" | 1657 | bool "MIPS CMP framework support" |
1637 | depends on SYS_SUPPORTS_MIPS_CMP | 1658 | depends on SYS_SUPPORTS_MIPS_CMP |
1638 | select SYNC_R4K if BROKEN | 1659 | select SYNC_R4K |
1639 | select SYS_SUPPORTS_SMP | 1660 | select SYS_SUPPORTS_SMP |
1640 | select SYS_SUPPORTS_SCHED_SMT if SMP | 1661 | select SYS_SUPPORTS_SCHED_SMT if SMP |
1641 | select WEAK_ORDERING | 1662 | select WEAK_ORDERING |
@@ -2147,11 +2168,11 @@ menu "Power management options" | |||
2147 | 2168 | ||
2148 | config ARCH_HIBERNATION_POSSIBLE | 2169 | config ARCH_HIBERNATION_POSSIBLE |
2149 | def_bool y | 2170 | def_bool y |
2150 | depends on SYS_SUPPORTS_HOTPLUG_CPU | 2171 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
2151 | 2172 | ||
2152 | config ARCH_SUSPEND_POSSIBLE | 2173 | config ARCH_SUSPEND_POSSIBLE |
2153 | def_bool y | 2174 | def_bool y |
2154 | depends on SYS_SUPPORTS_HOTPLUG_CPU | 2175 | depends on SYS_SUPPORTS_HOTPLUG_CPU || !SMP |
2155 | 2176 | ||
2156 | source "kernel/power/Kconfig" | 2177 | source "kernel/power/Kconfig" |
2157 | 2178 | ||
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 807572a6a4d2..861da514a468 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -173,6 +173,13 @@ libs-y += arch/mips/fw/lib/ | |||
173 | # | 173 | # |
174 | 174 | ||
175 | # | 175 | # |
176 | # Texas Instruments AR7 | ||
177 | # | ||
178 | core-$(CONFIG_AR7) += arch/mips/ar7/ | ||
179 | cflags-$(CONFIG_AR7) += -I$(srctree)/arch/mips/include/asm/mach-ar7 | ||
180 | load-$(CONFIG_AR7) += 0xffffffff94100000 | ||
181 | |||
182 | # | ||
176 | # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. | 183 | # Acer PICA 61, Mips Magnum 4000 and Olivetti M700. |
177 | # | 184 | # |
178 | core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ | 185 | core-$(CONFIG_MACH_JAZZ) += arch/mips/jazz/ |
diff --git a/arch/mips/ar7/Makefile b/arch/mips/ar7/Makefile new file mode 100644 index 000000000000..7435e44b3964 --- /dev/null +++ b/arch/mips/ar7/Makefile | |||
@@ -0,0 +1,10 @@ | |||
1 | |||
2 | obj-y := \ | ||
3 | prom.o \ | ||
4 | setup.o \ | ||
5 | memory.o \ | ||
6 | irq.o \ | ||
7 | time.o \ | ||
8 | platform.o \ | ||
9 | gpio.o \ | ||
10 | clock.o | ||
diff --git a/arch/mips/ar7/clock.c b/arch/mips/ar7/clock.c new file mode 100644 index 000000000000..27dc6663f2fa --- /dev/null +++ b/arch/mips/ar7/clock.c | |||
@@ -0,0 +1,440 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org> | ||
3 | * Copyright (C) 2007 Eugene Konev <ejka@openwrt.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/types.h> | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/delay.h> | ||
25 | #include <linux/gcd.h> | ||
26 | #include <linux/io.h> | ||
27 | |||
28 | #include <asm/addrspace.h> | ||
29 | #include <asm/mach-ar7/ar7.h> | ||
30 | |||
31 | #define BOOT_PLL_SOURCE_MASK 0x3 | ||
32 | #define CPU_PLL_SOURCE_SHIFT 16 | ||
33 | #define BUS_PLL_SOURCE_SHIFT 14 | ||
34 | #define USB_PLL_SOURCE_SHIFT 18 | ||
35 | #define DSP_PLL_SOURCE_SHIFT 22 | ||
36 | #define BOOT_PLL_SOURCE_AFE 0 | ||
37 | #define BOOT_PLL_SOURCE_BUS 0 | ||
38 | #define BOOT_PLL_SOURCE_REF 1 | ||
39 | #define BOOT_PLL_SOURCE_XTAL 2 | ||
40 | #define BOOT_PLL_SOURCE_CPU 3 | ||
41 | #define BOOT_PLL_BYPASS 0x00000020 | ||
42 | #define BOOT_PLL_ASYNC_MODE 0x02000000 | ||
43 | #define BOOT_PLL_2TO1_MODE 0x00008000 | ||
44 | |||
45 | #define TNETD7200_CLOCK_ID_CPU 0 | ||
46 | #define TNETD7200_CLOCK_ID_DSP 1 | ||
47 | #define TNETD7200_CLOCK_ID_USB 2 | ||
48 | |||
49 | #define TNETD7200_DEF_CPU_CLK 211000000 | ||
50 | #define TNETD7200_DEF_DSP_CLK 125000000 | ||
51 | #define TNETD7200_DEF_USB_CLK 48000000 | ||
52 | |||
53 | struct tnetd7300_clock { | ||
54 | u32 ctrl; | ||
55 | #define PREDIV_MASK 0x001f0000 | ||
56 | #define PREDIV_SHIFT 16 | ||
57 | #define POSTDIV_MASK 0x0000001f | ||
58 | u32 unused1[3]; | ||
59 | u32 pll; | ||
60 | #define MUL_MASK 0x0000f000 | ||
61 | #define MUL_SHIFT 12 | ||
62 | #define PLL_MODE_MASK 0x00000001 | ||
63 | #define PLL_NDIV 0x00000800 | ||
64 | #define PLL_DIV 0x00000002 | ||
65 | #define PLL_STATUS 0x00000001 | ||
66 | u32 unused2[3]; | ||
67 | }; | ||
68 | |||
69 | struct tnetd7300_clocks { | ||
70 | struct tnetd7300_clock bus; | ||
71 | struct tnetd7300_clock cpu; | ||
72 | struct tnetd7300_clock usb; | ||
73 | struct tnetd7300_clock dsp; | ||
74 | }; | ||
75 | |||
76 | struct tnetd7200_clock { | ||
77 | u32 ctrl; | ||
78 | u32 unused1[3]; | ||
79 | #define DIVISOR_ENABLE_MASK 0x00008000 | ||
80 | u32 mul; | ||
81 | u32 prediv; | ||
82 | u32 postdiv; | ||
83 | u32 postdiv2; | ||
84 | u32 unused2[6]; | ||
85 | u32 cmd; | ||
86 | u32 status; | ||
87 | u32 cmden; | ||
88 | u32 padding[15]; | ||
89 | }; | ||
90 | |||
91 | struct tnetd7200_clocks { | ||
92 | struct tnetd7200_clock cpu; | ||
93 | struct tnetd7200_clock dsp; | ||
94 | struct tnetd7200_clock usb; | ||
95 | }; | ||
96 | |||
97 | int ar7_cpu_clock = 150000000; | ||
98 | EXPORT_SYMBOL(ar7_cpu_clock); | ||
99 | int ar7_bus_clock = 125000000; | ||
100 | EXPORT_SYMBOL(ar7_bus_clock); | ||
101 | int ar7_dsp_clock; | ||
102 | EXPORT_SYMBOL(ar7_dsp_clock); | ||
103 | |||
104 | static void approximate(int base, int target, int *prediv, | ||
105 | int *postdiv, int *mul) | ||
106 | { | ||
107 | int i, j, k, freq, res = target; | ||
108 | for (i = 1; i <= 16; i++) | ||
109 | for (j = 1; j <= 32; j++) | ||
110 | for (k = 1; k <= 32; k++) { | ||
111 | freq = abs(base / j * i / k - target); | ||
112 | if (freq < res) { | ||
113 | res = freq; | ||
114 | *mul = i; | ||
115 | *prediv = j; | ||
116 | *postdiv = k; | ||
117 | } | ||
118 | } | ||
119 | } | ||
120 | |||
121 | static void calculate(int base, int target, int *prediv, int *postdiv, | ||
122 | int *mul) | ||
123 | { | ||
124 | int tmp_gcd, tmp_base, tmp_freq; | ||
125 | |||
126 | for (*prediv = 1; *prediv <= 32; (*prediv)++) { | ||
127 | tmp_base = base / *prediv; | ||
128 | tmp_gcd = gcd(target, tmp_base); | ||
129 | *mul = target / tmp_gcd; | ||
130 | *postdiv = tmp_base / tmp_gcd; | ||
131 | if ((*mul < 1) || (*mul >= 16)) | ||
132 | continue; | ||
133 | if ((*postdiv > 0) & (*postdiv <= 32)) | ||
134 | break; | ||
135 | } | ||
136 | |||
137 | if (base / *prediv * *mul / *postdiv != target) { | ||
138 | approximate(base, target, prediv, postdiv, mul); | ||
139 | tmp_freq = base / *prediv * *mul / *postdiv; | ||
140 | printk(KERN_WARNING | ||
141 | "Adjusted requested frequency %d to %d\n", | ||
142 | target, tmp_freq); | ||
143 | } | ||
144 | |||
145 | printk(KERN_DEBUG "Clocks: prediv: %d, postdiv: %d, mul: %d\n", | ||
146 | *prediv, *postdiv, *mul); | ||
147 | } | ||
148 | |||
149 | static int tnetd7300_dsp_clock(void) | ||
150 | { | ||
151 | u32 didr1, didr2; | ||
152 | u8 rev = ar7_chip_rev(); | ||
153 | didr1 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x18)); | ||
154 | didr2 = readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x1c)); | ||
155 | if (didr2 & (1 << 23)) | ||
156 | return 0; | ||
157 | if ((rev >= 0x23) && (rev != 0x57)) | ||
158 | return 250000000; | ||
159 | if ((((didr2 & 0x1fff) << 10) | ((didr1 & 0xffc00000) >> 22)) | ||
160 | > 4208000) | ||
161 | return 250000000; | ||
162 | return 0; | ||
163 | } | ||
164 | |||
165 | static int tnetd7300_get_clock(u32 shift, struct tnetd7300_clock *clock, | ||
166 | u32 *bootcr, u32 bus_clock) | ||
167 | { | ||
168 | int product; | ||
169 | int base_clock = AR7_REF_CLOCK; | ||
170 | u32 ctrl = readl(&clock->ctrl); | ||
171 | u32 pll = readl(&clock->pll); | ||
172 | int prediv = ((ctrl & PREDIV_MASK) >> PREDIV_SHIFT) + 1; | ||
173 | int postdiv = (ctrl & POSTDIV_MASK) + 1; | ||
174 | int divisor = prediv * postdiv; | ||
175 | int mul = ((pll & MUL_MASK) >> MUL_SHIFT) + 1; | ||
176 | |||
177 | switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { | ||
178 | case BOOT_PLL_SOURCE_BUS: | ||
179 | base_clock = bus_clock; | ||
180 | break; | ||
181 | case BOOT_PLL_SOURCE_REF: | ||
182 | base_clock = AR7_REF_CLOCK; | ||
183 | break; | ||
184 | case BOOT_PLL_SOURCE_XTAL: | ||
185 | base_clock = AR7_XTAL_CLOCK; | ||
186 | break; | ||
187 | case BOOT_PLL_SOURCE_CPU: | ||
188 | base_clock = ar7_cpu_clock; | ||
189 | break; | ||
190 | } | ||
191 | |||
192 | if (*bootcr & BOOT_PLL_BYPASS) | ||
193 | return base_clock / divisor; | ||
194 | |||
195 | if ((pll & PLL_MODE_MASK) == 0) | ||
196 | return (base_clock >> (mul / 16 + 1)) / divisor; | ||
197 | |||
198 | if ((pll & (PLL_NDIV | PLL_DIV)) == (PLL_NDIV | PLL_DIV)) { | ||
199 | product = (mul & 1) ? | ||
200 | (base_clock * mul) >> 1 : | ||
201 | (base_clock * (mul - 1)) >> 2; | ||
202 | return product / divisor; | ||
203 | } | ||
204 | |||
205 | if (mul == 16) | ||
206 | return base_clock / divisor; | ||
207 | |||
208 | return base_clock * mul / divisor; | ||
209 | } | ||
210 | |||
211 | static void tnetd7300_set_clock(u32 shift, struct tnetd7300_clock *clock, | ||
212 | u32 *bootcr, u32 frequency) | ||
213 | { | ||
214 | int prediv, postdiv, mul; | ||
215 | int base_clock = ar7_bus_clock; | ||
216 | |||
217 | switch ((*bootcr & (BOOT_PLL_SOURCE_MASK << shift)) >> shift) { | ||
218 | case BOOT_PLL_SOURCE_BUS: | ||
219 | base_clock = ar7_bus_clock; | ||
220 | break; | ||
221 | case BOOT_PLL_SOURCE_REF: | ||
222 | base_clock = AR7_REF_CLOCK; | ||
223 | break; | ||
224 | case BOOT_PLL_SOURCE_XTAL: | ||
225 | base_clock = AR7_XTAL_CLOCK; | ||
226 | break; | ||
227 | case BOOT_PLL_SOURCE_CPU: | ||
228 | base_clock = ar7_cpu_clock; | ||
229 | break; | ||
230 | } | ||
231 | |||
232 | calculate(base_clock, frequency, &prediv, &postdiv, &mul); | ||
233 | |||
234 | writel(((prediv - 1) << PREDIV_SHIFT) | (postdiv - 1), &clock->ctrl); | ||
235 | msleep(1); | ||
236 | writel(4, &clock->pll); | ||
237 | while (readl(&clock->pll) & PLL_STATUS) | ||
238 | ; | ||
239 | writel(((mul - 1) << MUL_SHIFT) | (0xff << 3) | 0x0e, &clock->pll); | ||
240 | msleep(75); | ||
241 | } | ||
242 | |||
243 | static void __init tnetd7300_init_clocks(void) | ||
244 | { | ||
245 | u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); | ||
246 | struct tnetd7300_clocks *clocks = | ||
247 | ioremap_nocache(UR8_REGS_CLOCKS, | ||
248 | sizeof(struct tnetd7300_clocks)); | ||
249 | |||
250 | ar7_bus_clock = tnetd7300_get_clock(BUS_PLL_SOURCE_SHIFT, | ||
251 | &clocks->bus, bootcr, AR7_AFE_CLOCK); | ||
252 | |||
253 | if (*bootcr & BOOT_PLL_ASYNC_MODE) | ||
254 | ar7_cpu_clock = tnetd7300_get_clock(CPU_PLL_SOURCE_SHIFT, | ||
255 | &clocks->cpu, bootcr, AR7_AFE_CLOCK); | ||
256 | else | ||
257 | ar7_cpu_clock = ar7_bus_clock; | ||
258 | |||
259 | if (ar7_dsp_clock == 250000000) | ||
260 | tnetd7300_set_clock(DSP_PLL_SOURCE_SHIFT, &clocks->dsp, | ||
261 | bootcr, ar7_dsp_clock); | ||
262 | |||
263 | iounmap(clocks); | ||
264 | iounmap(bootcr); | ||
265 | } | ||
266 | |||
267 | static int tnetd7200_get_clock(int base, struct tnetd7200_clock *clock, | ||
268 | u32 *bootcr, u32 bus_clock) | ||
269 | { | ||
270 | int divisor = ((readl(&clock->prediv) & 0x1f) + 1) * | ||
271 | ((readl(&clock->postdiv) & 0x1f) + 1); | ||
272 | |||
273 | if (*bootcr & BOOT_PLL_BYPASS) | ||
274 | return base / divisor; | ||
275 | |||
276 | return base * ((readl(&clock->mul) & 0xf) + 1) / divisor; | ||
277 | } | ||
278 | |||
279 | |||
280 | static void tnetd7200_set_clock(int base, struct tnetd7200_clock *clock, | ||
281 | int prediv, int postdiv, int postdiv2, int mul, u32 frequency) | ||
282 | { | ||
283 | printk(KERN_INFO | ||
284 | "Clocks: base = %d, frequency = %u, prediv = %d, " | ||
285 | "postdiv = %d, postdiv2 = %d, mul = %d\n", | ||
286 | base, frequency, prediv, postdiv, postdiv2, mul); | ||
287 | |||
288 | writel(0, &clock->ctrl); | ||
289 | writel(DIVISOR_ENABLE_MASK | ((prediv - 1) & 0x1F), &clock->prediv); | ||
290 | writel((mul - 1) & 0xF, &clock->mul); | ||
291 | |||
292 | while (readl(&clock->status) & 0x1) | ||
293 | ; /* nop */ | ||
294 | |||
295 | writel(DIVISOR_ENABLE_MASK | ((postdiv - 1) & 0x1F), &clock->postdiv); | ||
296 | |||
297 | writel(readl(&clock->cmden) | 1, &clock->cmden); | ||
298 | writel(readl(&clock->cmd) | 1, &clock->cmd); | ||
299 | |||
300 | while (readl(&clock->status) & 0x1) | ||
301 | ; /* nop */ | ||
302 | |||
303 | writel(DIVISOR_ENABLE_MASK | ((postdiv2 - 1) & 0x1F), &clock->postdiv2); | ||
304 | |||
305 | writel(readl(&clock->cmden) | 1, &clock->cmden); | ||
306 | writel(readl(&clock->cmd) | 1, &clock->cmd); | ||
307 | |||
308 | while (readl(&clock->status) & 0x1) | ||
309 | ; /* nop */ | ||
310 | |||
311 | writel(readl(&clock->ctrl) | 1, &clock->ctrl); | ||
312 | } | ||
313 | |||
314 | static int tnetd7200_get_clock_base(int clock_id, u32 *bootcr) | ||
315 | { | ||
316 | if (*bootcr & BOOT_PLL_ASYNC_MODE) | ||
317 | /* Async */ | ||
318 | switch (clock_id) { | ||
319 | case TNETD7200_CLOCK_ID_DSP: | ||
320 | return AR7_REF_CLOCK; | ||
321 | default: | ||
322 | return AR7_AFE_CLOCK; | ||
323 | } | ||
324 | else | ||
325 | /* Sync */ | ||
326 | if (*bootcr & BOOT_PLL_2TO1_MODE) | ||
327 | /* 2:1 */ | ||
328 | switch (clock_id) { | ||
329 | case TNETD7200_CLOCK_ID_DSP: | ||
330 | return AR7_REF_CLOCK; | ||
331 | default: | ||
332 | return AR7_AFE_CLOCK; | ||
333 | } | ||
334 | else | ||
335 | /* 1:1 */ | ||
336 | return AR7_REF_CLOCK; | ||
337 | } | ||
338 | |||
339 | |||
340 | static void __init tnetd7200_init_clocks(void) | ||
341 | { | ||
342 | u32 *bootcr = (u32 *)ioremap_nocache(AR7_REGS_DCL, 4); | ||
343 | struct tnetd7200_clocks *clocks = | ||
344 | ioremap_nocache(AR7_REGS_CLOCKS, | ||
345 | sizeof(struct tnetd7200_clocks)); | ||
346 | int cpu_base, cpu_mul, cpu_prediv, cpu_postdiv; | ||
347 | int dsp_base, dsp_mul, dsp_prediv, dsp_postdiv; | ||
348 | int usb_base, usb_mul, usb_prediv, usb_postdiv; | ||
349 | |||
350 | cpu_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_CPU, bootcr); | ||
351 | dsp_base = tnetd7200_get_clock_base(TNETD7200_CLOCK_ID_DSP, bootcr); | ||
352 | |||
353 | if (*bootcr & BOOT_PLL_ASYNC_MODE) { | ||
354 | printk(KERN_INFO "Clocks: Async mode\n"); | ||
355 | |||
356 | printk(KERN_INFO "Clocks: Setting DSP clock\n"); | ||
357 | calculate(dsp_base, TNETD7200_DEF_DSP_CLK, | ||
358 | &dsp_prediv, &dsp_postdiv, &dsp_mul); | ||
359 | ar7_bus_clock = | ||
360 | ((dsp_base / dsp_prediv) * dsp_mul) / dsp_postdiv; | ||
361 | tnetd7200_set_clock(dsp_base, &clocks->dsp, | ||
362 | dsp_prediv, dsp_postdiv * 2, dsp_postdiv, dsp_mul * 2, | ||
363 | ar7_bus_clock); | ||
364 | |||
365 | printk(KERN_INFO "Clocks: Setting CPU clock\n"); | ||
366 | calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, | ||
367 | &cpu_postdiv, &cpu_mul); | ||
368 | ar7_cpu_clock = | ||
369 | ((cpu_base / cpu_prediv) * cpu_mul) / cpu_postdiv; | ||
370 | tnetd7200_set_clock(cpu_base, &clocks->cpu, | ||
371 | cpu_prediv, cpu_postdiv, -1, cpu_mul, | ||
372 | ar7_cpu_clock); | ||
373 | |||
374 | } else | ||
375 | if (*bootcr & BOOT_PLL_2TO1_MODE) { | ||
376 | printk(KERN_INFO "Clocks: Sync 2:1 mode\n"); | ||
377 | |||
378 | printk(KERN_INFO "Clocks: Setting CPU clock\n"); | ||
379 | calculate(cpu_base, TNETD7200_DEF_CPU_CLK, &cpu_prediv, | ||
380 | &cpu_postdiv, &cpu_mul); | ||
381 | ar7_cpu_clock = ((cpu_base / cpu_prediv) * cpu_mul) | ||
382 | / cpu_postdiv; | ||
383 | tnetd7200_set_clock(cpu_base, &clocks->cpu, | ||
384 | cpu_prediv, cpu_postdiv, -1, cpu_mul, | ||
385 | ar7_cpu_clock); | ||
386 | |||
387 | printk(KERN_INFO "Clocks: Setting DSP clock\n"); | ||
388 | calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, | ||
389 | &dsp_postdiv, &dsp_mul); | ||
390 | ar7_bus_clock = ar7_cpu_clock / 2; | ||
391 | tnetd7200_set_clock(dsp_base, &clocks->dsp, | ||
392 | dsp_prediv, dsp_postdiv * 2, dsp_postdiv, | ||
393 | dsp_mul * 2, ar7_bus_clock); | ||
394 | } else { | ||
395 | printk(KERN_INFO "Clocks: Sync 1:1 mode\n"); | ||
396 | |||
397 | printk(KERN_INFO "Clocks: Setting DSP clock\n"); | ||
398 | calculate(dsp_base, TNETD7200_DEF_DSP_CLK, &dsp_prediv, | ||
399 | &dsp_postdiv, &dsp_mul); | ||
400 | ar7_bus_clock = ((dsp_base / dsp_prediv) * dsp_mul) | ||
401 | / dsp_postdiv; | ||
402 | tnetd7200_set_clock(dsp_base, &clocks->dsp, | ||
403 | dsp_prediv, dsp_postdiv * 2, dsp_postdiv, | ||
404 | dsp_mul * 2, ar7_bus_clock); | ||
405 | |||
406 | ar7_cpu_clock = ar7_bus_clock; | ||
407 | } | ||
408 | |||
409 | printk(KERN_INFO "Clocks: Setting USB clock\n"); | ||
410 | usb_base = ar7_bus_clock; | ||
411 | calculate(usb_base, TNETD7200_DEF_USB_CLK, &usb_prediv, | ||
412 | &usb_postdiv, &usb_mul); | ||
413 | tnetd7200_set_clock(usb_base, &clocks->usb, | ||
414 | usb_prediv, usb_postdiv, -1, usb_mul, | ||
415 | TNETD7200_DEF_USB_CLK); | ||
416 | |||
417 | ar7_dsp_clock = ar7_cpu_clock; | ||
418 | |||
419 | iounmap(clocks); | ||
420 | iounmap(bootcr); | ||
421 | } | ||
422 | |||
423 | int __init ar7_init_clocks(void) | ||
424 | { | ||
425 | switch (ar7_chip_id()) { | ||
426 | case AR7_CHIP_7100: | ||
427 | case AR7_CHIP_7200: | ||
428 | tnetd7200_init_clocks(); | ||
429 | break; | ||
430 | case AR7_CHIP_7300: | ||
431 | ar7_dsp_clock = tnetd7300_dsp_clock(); | ||
432 | tnetd7300_init_clocks(); | ||
433 | break; | ||
434 | default: | ||
435 | break; | ||
436 | } | ||
437 | |||
438 | return 0; | ||
439 | } | ||
440 | arch_initcall(ar7_init_clocks); | ||
diff --git a/arch/mips/ar7/gpio.c b/arch/mips/ar7/gpio.c new file mode 100644 index 000000000000..74e14a3dbf4a --- /dev/null +++ b/arch/mips/ar7/gpio.c | |||
@@ -0,0 +1,48 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org> | ||
3 | * Copyright (C) 2007 Eugene Konev <ejka@openwrt.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/module.h> | ||
21 | |||
22 | #include <asm/mach-ar7/gpio.h> | ||
23 | |||
24 | static const char *ar7_gpio_list[AR7_GPIO_MAX]; | ||
25 | |||
26 | int gpio_request(unsigned gpio, const char *label) | ||
27 | { | ||
28 | if (gpio >= AR7_GPIO_MAX) | ||
29 | return -EINVAL; | ||
30 | |||
31 | if (ar7_gpio_list[gpio]) | ||
32 | return -EBUSY; | ||
33 | |||
34 | if (label) | ||
35 | ar7_gpio_list[gpio] = label; | ||
36 | else | ||
37 | ar7_gpio_list[gpio] = "busy"; | ||
38 | |||
39 | return 0; | ||
40 | } | ||
41 | EXPORT_SYMBOL(gpio_request); | ||
42 | |||
43 | void gpio_free(unsigned gpio) | ||
44 | { | ||
45 | BUG_ON(!ar7_gpio_list[gpio]); | ||
46 | ar7_gpio_list[gpio] = NULL; | ||
47 | } | ||
48 | EXPORT_SYMBOL(gpio_free); | ||
diff --git a/arch/mips/ar7/irq.c b/arch/mips/ar7/irq.c new file mode 100644 index 000000000000..c781556c44e4 --- /dev/null +++ b/arch/mips/ar7/irq.c | |||
@@ -0,0 +1,176 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org> | ||
3 | * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/io.h> | ||
22 | |||
23 | #include <asm/irq_cpu.h> | ||
24 | #include <asm/mipsregs.h> | ||
25 | #include <asm/mach-ar7/ar7.h> | ||
26 | |||
27 | #define EXCEPT_OFFSET 0x80 | ||
28 | #define PACE_OFFSET 0xA0 | ||
29 | #define CHNLS_OFFSET 0x200 | ||
30 | |||
31 | #define REG_OFFSET(irq, reg) ((irq) / 32 * 0x4 + reg * 0x10) | ||
32 | #define SEC_REG_OFFSET(reg) (EXCEPT_OFFSET + reg * 0x8) | ||
33 | #define SEC_SR_OFFSET (SEC_REG_OFFSET(0)) /* 0x80 */ | ||
34 | #define CR_OFFSET(irq) (REG_OFFSET(irq, 1)) /* 0x10 */ | ||
35 | #define SEC_CR_OFFSET (SEC_REG_OFFSET(1)) /* 0x88 */ | ||
36 | #define ESR_OFFSET(irq) (REG_OFFSET(irq, 2)) /* 0x20 */ | ||
37 | #define SEC_ESR_OFFSET (SEC_REG_OFFSET(2)) /* 0x90 */ | ||
38 | #define ECR_OFFSET(irq) (REG_OFFSET(irq, 3)) /* 0x30 */ | ||
39 | #define SEC_ECR_OFFSET (SEC_REG_OFFSET(3)) /* 0x98 */ | ||
40 | #define PIR_OFFSET (0x40) | ||
41 | #define MSR_OFFSET (0x44) | ||
42 | #define PM_OFFSET(irq) (REG_OFFSET(irq, 5)) /* 0x50 */ | ||
43 | #define TM_OFFSET(irq) (REG_OFFSET(irq, 6)) /* 0x60 */ | ||
44 | |||
45 | #define REG(addr) ((u32 *)(KSEG1ADDR(AR7_REGS_IRQ) + addr)) | ||
46 | |||
47 | #define CHNL_OFFSET(chnl) (CHNLS_OFFSET + (chnl * 4)) | ||
48 | |||
49 | static int ar7_irq_base; | ||
50 | |||
51 | static void ar7_unmask_irq(unsigned int irq) | ||
52 | { | ||
53 | writel(1 << ((irq - ar7_irq_base) % 32), | ||
54 | REG(ESR_OFFSET(irq - ar7_irq_base))); | ||
55 | } | ||
56 | |||
57 | static void ar7_mask_irq(unsigned int irq) | ||
58 | { | ||
59 | writel(1 << ((irq - ar7_irq_base) % 32), | ||
60 | REG(ECR_OFFSET(irq - ar7_irq_base))); | ||
61 | } | ||
62 | |||
63 | static void ar7_ack_irq(unsigned int irq) | ||
64 | { | ||
65 | writel(1 << ((irq - ar7_irq_base) % 32), | ||
66 | REG(CR_OFFSET(irq - ar7_irq_base))); | ||
67 | } | ||
68 | |||
69 | static void ar7_unmask_sec_irq(unsigned int irq) | ||
70 | { | ||
71 | writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ESR_OFFSET)); | ||
72 | } | ||
73 | |||
74 | static void ar7_mask_sec_irq(unsigned int irq) | ||
75 | { | ||
76 | writel(1 << (irq - ar7_irq_base - 40), REG(SEC_ECR_OFFSET)); | ||
77 | } | ||
78 | |||
79 | static void ar7_ack_sec_irq(unsigned int irq) | ||
80 | { | ||
81 | writel(1 << (irq - ar7_irq_base - 40), REG(SEC_CR_OFFSET)); | ||
82 | } | ||
83 | |||
84 | static struct irq_chip ar7_irq_type = { | ||
85 | .name = "AR7", | ||
86 | .unmask = ar7_unmask_irq, | ||
87 | .mask = ar7_mask_irq, | ||
88 | .ack = ar7_ack_irq | ||
89 | }; | ||
90 | |||
91 | static struct irq_chip ar7_sec_irq_type = { | ||
92 | .name = "AR7", | ||
93 | .unmask = ar7_unmask_sec_irq, | ||
94 | .mask = ar7_mask_sec_irq, | ||
95 | .ack = ar7_ack_sec_irq, | ||
96 | }; | ||
97 | |||
98 | static struct irqaction ar7_cascade_action = { | ||
99 | .handler = no_action, | ||
100 | .name = "AR7 cascade interrupt" | ||
101 | }; | ||
102 | |||
103 | static void __init ar7_irq_init(int base) | ||
104 | { | ||
105 | int i; | ||
106 | /* | ||
107 | * Disable interrupts and clear pending | ||
108 | */ | ||
109 | writel(0xffffffff, REG(ECR_OFFSET(0))); | ||
110 | writel(0xff, REG(ECR_OFFSET(32))); | ||
111 | writel(0xffffffff, REG(SEC_ECR_OFFSET)); | ||
112 | writel(0xffffffff, REG(CR_OFFSET(0))); | ||
113 | writel(0xff, REG(CR_OFFSET(32))); | ||
114 | writel(0xffffffff, REG(SEC_CR_OFFSET)); | ||
115 | |||
116 | ar7_irq_base = base; | ||
117 | |||
118 | for (i = 0; i < 40; i++) { | ||
119 | writel(i, REG(CHNL_OFFSET(i))); | ||
120 | /* Primary IRQ's */ | ||
121 | set_irq_chip_and_handler(base + i, &ar7_irq_type, | ||
122 | handle_level_irq); | ||
123 | /* Secondary IRQ's */ | ||
124 | if (i < 32) | ||
125 | set_irq_chip_and_handler(base + i + 40, | ||
126 | &ar7_sec_irq_type, | ||
127 | handle_level_irq); | ||
128 | } | ||
129 | |||
130 | setup_irq(2, &ar7_cascade_action); | ||
131 | setup_irq(ar7_irq_base, &ar7_cascade_action); | ||
132 | set_c0_status(IE_IRQ0); | ||
133 | } | ||
134 | |||
135 | void __init arch_init_irq(void) | ||
136 | { | ||
137 | mips_cpu_irq_init(); | ||
138 | ar7_irq_init(8); | ||
139 | } | ||
140 | |||
141 | static void ar7_cascade(void) | ||
142 | { | ||
143 | u32 status; | ||
144 | int i, irq; | ||
145 | |||
146 | /* Primary IRQ's */ | ||
147 | irq = readl(REG(PIR_OFFSET)) & 0x3f; | ||
148 | if (irq) { | ||
149 | do_IRQ(ar7_irq_base + irq); | ||
150 | return; | ||
151 | } | ||
152 | |||
153 | /* Secondary IRQ's are cascaded through primary '0' */ | ||
154 | writel(1, REG(CR_OFFSET(irq))); | ||
155 | status = readl(REG(SEC_SR_OFFSET)); | ||
156 | for (i = 0; i < 32; i++) { | ||
157 | if (status & 1) { | ||
158 | do_IRQ(ar7_irq_base + i + 40); | ||
159 | return; | ||
160 | } | ||
161 | status >>= 1; | ||
162 | } | ||
163 | |||
164 | spurious_interrupt(); | ||
165 | } | ||
166 | |||
167 | asmlinkage void plat_irq_dispatch(void) | ||
168 | { | ||
169 | unsigned int pending = read_c0_status() & read_c0_cause() & ST0_IM; | ||
170 | if (pending & STATUSF_IP7) /* cpu timer */ | ||
171 | do_IRQ(7); | ||
172 | else if (pending & STATUSF_IP2) /* int0 hardware line */ | ||
173 | ar7_cascade(); | ||
174 | else | ||
175 | spurious_interrupt(); | ||
176 | } | ||
diff --git a/arch/mips/ar7/memory.c b/arch/mips/ar7/memory.c new file mode 100644 index 000000000000..46fed44825a6 --- /dev/null +++ b/arch/mips/ar7/memory.c | |||
@@ -0,0 +1,72 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Felix Fietkau <nbd@openwrt.org> | ||
3 | * Copyright (C) 2007 Eugene Konev <ejka@openwrt.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | #include <linux/bootmem.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/mm.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/pfn.h> | ||
24 | #include <linux/proc_fs.h> | ||
25 | #include <linux/string.h> | ||
26 | #include <linux/swap.h> | ||
27 | |||
28 | #include <asm/bootinfo.h> | ||
29 | #include <asm/page.h> | ||
30 | #include <asm/sections.h> | ||
31 | |||
32 | #include <asm/mach-ar7/ar7.h> | ||
33 | #include <asm/mips-boards/prom.h> | ||
34 | |||
35 | static int __init memsize(void) | ||
36 | { | ||
37 | u32 size = (64 << 20); | ||
38 | u32 *addr = (u32 *)KSEG1ADDR(AR7_SDRAM_BASE + size - 4); | ||
39 | u32 *kernel_end = (u32 *)KSEG1ADDR(CPHYSADDR((u32)&_end)); | ||
40 | u32 *tmpaddr = addr; | ||
41 | |||
42 | while (tmpaddr > kernel_end) { | ||
43 | *tmpaddr = (u32)tmpaddr; | ||
44 | size >>= 1; | ||
45 | tmpaddr -= size >> 2; | ||
46 | } | ||
47 | |||
48 | do { | ||
49 | tmpaddr += size >> 2; | ||
50 | if (*tmpaddr != (u32)tmpaddr) | ||
51 | break; | ||
52 | size <<= 1; | ||
53 | } while (size < (64 << 20)); | ||
54 | |||
55 | writel(tmpaddr, &addr); | ||
56 | |||
57 | return size; | ||
58 | } | ||
59 | |||
60 | void __init prom_meminit(void) | ||
61 | { | ||
62 | unsigned long pages; | ||
63 | |||
64 | pages = memsize() >> PAGE_SHIFT; | ||
65 | add_memory_region(PHYS_OFFSET, pages << PAGE_SHIFT, | ||
66 | BOOT_MEM_RAM); | ||
67 | } | ||
68 | |||
69 | void __init prom_free_prom_memory(void) | ||
70 | { | ||
71 | /* Nothing to free */ | ||
72 | } | ||
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c new file mode 100644 index 000000000000..542244961780 --- /dev/null +++ b/arch/mips/ar7/platform.c | |||
@@ -0,0 +1,555 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org> | ||
3 | * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/init.h> | ||
21 | #include <linux/types.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/delay.h> | ||
24 | #include <linux/dma-mapping.h> | ||
25 | #include <linux/platform_device.h> | ||
26 | #include <linux/mtd/physmap.h> | ||
27 | #include <linux/serial.h> | ||
28 | #include <linux/serial_8250.h> | ||
29 | #include <linux/ioport.h> | ||
30 | #include <linux/io.h> | ||
31 | #include <linux/version.h> | ||
32 | #include <linux/vlynq.h> | ||
33 | #include <linux/leds.h> | ||
34 | #include <linux/string.h> | ||
35 | #include <linux/etherdevice.h> | ||
36 | |||
37 | #include <asm/addrspace.h> | ||
38 | #include <asm/mach-ar7/ar7.h> | ||
39 | #include <asm/mach-ar7/gpio.h> | ||
40 | #include <asm/mach-ar7/prom.h> | ||
41 | |||
42 | struct plat_vlynq_data { | ||
43 | struct plat_vlynq_ops ops; | ||
44 | int gpio_bit; | ||
45 | int reset_bit; | ||
46 | }; | ||
47 | |||
48 | |||
49 | static int vlynq_on(struct vlynq_device *dev) | ||
50 | { | ||
51 | int result; | ||
52 | struct plat_vlynq_data *pdata = dev->dev.platform_data; | ||
53 | |||
54 | result = gpio_request(pdata->gpio_bit, "vlynq"); | ||
55 | if (result) | ||
56 | goto out; | ||
57 | |||
58 | ar7_device_reset(pdata->reset_bit); | ||
59 | |||
60 | result = ar7_gpio_disable(pdata->gpio_bit); | ||
61 | if (result) | ||
62 | goto out_enabled; | ||
63 | |||
64 | result = ar7_gpio_enable(pdata->gpio_bit); | ||
65 | if (result) | ||
66 | goto out_enabled; | ||
67 | |||
68 | result = gpio_direction_output(pdata->gpio_bit, 0); | ||
69 | if (result) | ||
70 | goto out_gpio_enabled; | ||
71 | |||
72 | msleep(50); | ||
73 | |||
74 | gpio_set_value(pdata->gpio_bit, 1); | ||
75 | msleep(50); | ||
76 | |||
77 | return 0; | ||
78 | |||
79 | out_gpio_enabled: | ||
80 | ar7_gpio_disable(pdata->gpio_bit); | ||
81 | out_enabled: | ||
82 | ar7_device_disable(pdata->reset_bit); | ||
83 | gpio_free(pdata->gpio_bit); | ||
84 | out: | ||
85 | return result; | ||
86 | } | ||
87 | |||
88 | static void vlynq_off(struct vlynq_device *dev) | ||
89 | { | ||
90 | struct plat_vlynq_data *pdata = dev->dev.platform_data; | ||
91 | ar7_gpio_disable(pdata->gpio_bit); | ||
92 | gpio_free(pdata->gpio_bit); | ||
93 | ar7_device_disable(pdata->reset_bit); | ||
94 | } | ||
95 | |||
96 | static struct resource physmap_flash_resource = { | ||
97 | .name = "mem", | ||
98 | .flags = IORESOURCE_MEM, | ||
99 | .start = 0x10000000, | ||
100 | .end = 0x107fffff, | ||
101 | }; | ||
102 | |||
103 | static struct resource cpmac_low_res[] = { | ||
104 | { | ||
105 | .name = "regs", | ||
106 | .flags = IORESOURCE_MEM, | ||
107 | .start = AR7_REGS_MAC0, | ||
108 | .end = AR7_REGS_MAC0 + 0x7ff, | ||
109 | }, | ||
110 | { | ||
111 | .name = "irq", | ||
112 | .flags = IORESOURCE_IRQ, | ||
113 | .start = 27, | ||
114 | .end = 27, | ||
115 | }, | ||
116 | }; | ||
117 | |||
118 | static struct resource cpmac_high_res[] = { | ||
119 | { | ||
120 | .name = "regs", | ||
121 | .flags = IORESOURCE_MEM, | ||
122 | .start = AR7_REGS_MAC1, | ||
123 | .end = AR7_REGS_MAC1 + 0x7ff, | ||
124 | }, | ||
125 | { | ||
126 | .name = "irq", | ||
127 | .flags = IORESOURCE_IRQ, | ||
128 | .start = 41, | ||
129 | .end = 41, | ||
130 | }, | ||
131 | }; | ||
132 | |||
133 | static struct resource vlynq_low_res[] = { | ||
134 | { | ||
135 | .name = "regs", | ||
136 | .flags = IORESOURCE_MEM, | ||
137 | .start = AR7_REGS_VLYNQ0, | ||
138 | .end = AR7_REGS_VLYNQ0 + 0xff, | ||
139 | }, | ||
140 | { | ||
141 | .name = "irq", | ||
142 | .flags = IORESOURCE_IRQ, | ||
143 | .start = 29, | ||
144 | .end = 29, | ||
145 | }, | ||
146 | { | ||
147 | .name = "mem", | ||
148 | .flags = IORESOURCE_MEM, | ||
149 | .start = 0x04000000, | ||
150 | .end = 0x04ffffff, | ||
151 | }, | ||
152 | { | ||
153 | .name = "devirq", | ||
154 | .flags = IORESOURCE_IRQ, | ||
155 | .start = 80, | ||
156 | .end = 111, | ||
157 | }, | ||
158 | }; | ||
159 | |||
160 | static struct resource vlynq_high_res[] = { | ||
161 | { | ||
162 | .name = "regs", | ||
163 | .flags = IORESOURCE_MEM, | ||
164 | .start = AR7_REGS_VLYNQ1, | ||
165 | .end = AR7_REGS_VLYNQ1 + 0xff, | ||
166 | }, | ||
167 | { | ||
168 | .name = "irq", | ||
169 | .flags = IORESOURCE_IRQ, | ||
170 | .start = 33, | ||
171 | .end = 33, | ||
172 | }, | ||
173 | { | ||
174 | .name = "mem", | ||
175 | .flags = IORESOURCE_MEM, | ||
176 | .start = 0x0c000000, | ||
177 | .end = 0x0cffffff, | ||
178 | }, | ||
179 | { | ||
180 | .name = "devirq", | ||
181 | .flags = IORESOURCE_IRQ, | ||
182 | .start = 112, | ||
183 | .end = 143, | ||
184 | }, | ||
185 | }; | ||
186 | |||
187 | static struct resource usb_res[] = { | ||
188 | { | ||
189 | .name = "regs", | ||
190 | .flags = IORESOURCE_MEM, | ||
191 | .start = AR7_REGS_USB, | ||
192 | .end = AR7_REGS_USB + 0xff, | ||
193 | }, | ||
194 | { | ||
195 | .name = "irq", | ||
196 | .flags = IORESOURCE_IRQ, | ||
197 | .start = 32, | ||
198 | .end = 32, | ||
199 | }, | ||
200 | { | ||
201 | .name = "mem", | ||
202 | .flags = IORESOURCE_MEM, | ||
203 | .start = 0x03400000, | ||
204 | .end = 0x034001fff, | ||
205 | }, | ||
206 | }; | ||
207 | |||
208 | static struct physmap_flash_data physmap_flash_data = { | ||
209 | .width = 2, | ||
210 | }; | ||
211 | |||
212 | static struct plat_cpmac_data cpmac_low_data = { | ||
213 | .reset_bit = 17, | ||
214 | .power_bit = 20, | ||
215 | .phy_mask = 0x80000000, | ||
216 | }; | ||
217 | |||
218 | static struct plat_cpmac_data cpmac_high_data = { | ||
219 | .reset_bit = 21, | ||
220 | .power_bit = 22, | ||
221 | .phy_mask = 0x7fffffff, | ||
222 | }; | ||
223 | |||
224 | static struct plat_vlynq_data vlynq_low_data = { | ||
225 | .ops.on = vlynq_on, | ||
226 | .ops.off = vlynq_off, | ||
227 | .reset_bit = 20, | ||
228 | .gpio_bit = 18, | ||
229 | }; | ||
230 | |||
231 | static struct plat_vlynq_data vlynq_high_data = { | ||
232 | .ops.on = vlynq_on, | ||
233 | .ops.off = vlynq_off, | ||
234 | .reset_bit = 16, | ||
235 | .gpio_bit = 19, | ||
236 | }; | ||
237 | |||
238 | static struct platform_device physmap_flash = { | ||
239 | .id = 0, | ||
240 | .name = "physmap-flash", | ||
241 | .dev.platform_data = &physmap_flash_data, | ||
242 | .resource = &physmap_flash_resource, | ||
243 | .num_resources = 1, | ||
244 | }; | ||
245 | |||
246 | static u64 cpmac_dma_mask = DMA_32BIT_MASK; | ||
247 | static struct platform_device cpmac_low = { | ||
248 | .id = 0, | ||
249 | .name = "cpmac", | ||
250 | .dev = { | ||
251 | .dma_mask = &cpmac_dma_mask, | ||
252 | .coherent_dma_mask = DMA_32BIT_MASK, | ||
253 | .platform_data = &cpmac_low_data, | ||
254 | }, | ||
255 | .resource = cpmac_low_res, | ||
256 | .num_resources = ARRAY_SIZE(cpmac_low_res), | ||
257 | }; | ||
258 | |||
259 | static struct platform_device cpmac_high = { | ||
260 | .id = 1, | ||
261 | .name = "cpmac", | ||
262 | .dev = { | ||
263 | .dma_mask = &cpmac_dma_mask, | ||
264 | .coherent_dma_mask = DMA_32BIT_MASK, | ||
265 | .platform_data = &cpmac_high_data, | ||
266 | }, | ||
267 | .resource = cpmac_high_res, | ||
268 | .num_resources = ARRAY_SIZE(cpmac_high_res), | ||
269 | }; | ||
270 | |||
271 | static struct platform_device vlynq_low = { | ||
272 | .id = 0, | ||
273 | .name = "vlynq", | ||
274 | .dev.platform_data = &vlynq_low_data, | ||
275 | .resource = vlynq_low_res, | ||
276 | .num_resources = ARRAY_SIZE(vlynq_low_res), | ||
277 | }; | ||
278 | |||
279 | static struct platform_device vlynq_high = { | ||
280 | .id = 1, | ||
281 | .name = "vlynq", | ||
282 | .dev.platform_data = &vlynq_high_data, | ||
283 | .resource = vlynq_high_res, | ||
284 | .num_resources = ARRAY_SIZE(vlynq_high_res), | ||
285 | }; | ||
286 | |||
287 | |||
288 | static struct gpio_led default_leds[] = { | ||
289 | { | ||
290 | .name = "status", | ||
291 | .gpio = 8, | ||
292 | .active_low = 1, | ||
293 | }, | ||
294 | }; | ||
295 | |||
296 | static struct gpio_led dsl502t_leds[] = { | ||
297 | { | ||
298 | .name = "status", | ||
299 | .gpio = 9, | ||
300 | .active_low = 1, | ||
301 | }, | ||
302 | { | ||
303 | .name = "ethernet", | ||
304 | .gpio = 7, | ||
305 | .active_low = 1, | ||
306 | }, | ||
307 | { | ||
308 | .name = "usb", | ||
309 | .gpio = 12, | ||
310 | .active_low = 1, | ||
311 | }, | ||
312 | }; | ||
313 | |||
314 | static struct gpio_led dg834g_leds[] = { | ||
315 | { | ||
316 | .name = "ppp", | ||
317 | .gpio = 6, | ||
318 | .active_low = 1, | ||
319 | }, | ||
320 | { | ||
321 | .name = "status", | ||
322 | .gpio = 7, | ||
323 | .active_low = 1, | ||
324 | }, | ||
325 | { | ||
326 | .name = "adsl", | ||
327 | .gpio = 8, | ||
328 | .active_low = 1, | ||
329 | }, | ||
330 | { | ||
331 | .name = "wifi", | ||
332 | .gpio = 12, | ||
333 | .active_low = 1, | ||
334 | }, | ||
335 | { | ||
336 | .name = "power", | ||
337 | .gpio = 14, | ||
338 | .active_low = 1, | ||
339 | .default_trigger = "default-on", | ||
340 | }, | ||
341 | }; | ||
342 | |||
343 | static struct gpio_led fb_sl_leds[] = { | ||
344 | { | ||
345 | .name = "1", | ||
346 | .gpio = 7, | ||
347 | }, | ||
348 | { | ||
349 | .name = "2", | ||
350 | .gpio = 13, | ||
351 | .active_low = 1, | ||
352 | }, | ||
353 | { | ||
354 | .name = "3", | ||
355 | .gpio = 10, | ||
356 | .active_low = 1, | ||
357 | }, | ||
358 | { | ||
359 | .name = "4", | ||
360 | .gpio = 12, | ||
361 | .active_low = 1, | ||
362 | }, | ||
363 | { | ||
364 | .name = "5", | ||
365 | .gpio = 9, | ||
366 | .active_low = 1, | ||
367 | }, | ||
368 | }; | ||
369 | |||
370 | static struct gpio_led fb_fon_leds[] = { | ||
371 | { | ||
372 | .name = "1", | ||
373 | .gpio = 8, | ||
374 | }, | ||
375 | { | ||
376 | .name = "2", | ||
377 | .gpio = 3, | ||
378 | .active_low = 1, | ||
379 | }, | ||
380 | { | ||
381 | .name = "3", | ||
382 | .gpio = 5, | ||
383 | }, | ||
384 | { | ||
385 | .name = "4", | ||
386 | .gpio = 4, | ||
387 | .active_low = 1, | ||
388 | }, | ||
389 | { | ||
390 | .name = "5", | ||
391 | .gpio = 11, | ||
392 | .active_low = 1, | ||
393 | }, | ||
394 | }; | ||
395 | |||
396 | static struct gpio_led_platform_data ar7_led_data; | ||
397 | |||
398 | static struct platform_device ar7_gpio_leds = { | ||
399 | .name = "leds-gpio", | ||
400 | .id = -1, | ||
401 | .dev = { | ||
402 | .platform_data = &ar7_led_data, | ||
403 | } | ||
404 | }; | ||
405 | |||
406 | static struct platform_device ar7_udc = { | ||
407 | .id = -1, | ||
408 | .name = "ar7_udc", | ||
409 | .resource = usb_res, | ||
410 | .num_resources = ARRAY_SIZE(usb_res), | ||
411 | }; | ||
412 | |||
413 | static inline unsigned char char2hex(char h) | ||
414 | { | ||
415 | switch (h) { | ||
416 | case '0': case '1': case '2': case '3': case '4': | ||
417 | case '5': case '6': case '7': case '8': case '9': | ||
418 | return h - '0'; | ||
419 | case 'A': case 'B': case 'C': case 'D': case 'E': case 'F': | ||
420 | return h - 'A' + 10; | ||
421 | case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': | ||
422 | return h - 'a' + 10; | ||
423 | default: | ||
424 | return 0; | ||
425 | } | ||
426 | } | ||
427 | |||
428 | static void cpmac_get_mac(int instance, unsigned char *dev_addr) | ||
429 | { | ||
430 | int i; | ||
431 | char name[5], default_mac[ETH_ALEN], *mac; | ||
432 | |||
433 | mac = NULL; | ||
434 | sprintf(name, "mac%c", 'a' + instance); | ||
435 | mac = prom_getenv(name); | ||
436 | if (!mac) { | ||
437 | sprintf(name, "mac%c", 'a'); | ||
438 | mac = prom_getenv(name); | ||
439 | } | ||
440 | if (!mac) { | ||
441 | random_ether_addr(default_mac); | ||
442 | mac = default_mac; | ||
443 | } | ||
444 | for (i = 0; i < 6; i++) | ||
445 | dev_addr[i] = (char2hex(mac[i * 3]) << 4) + | ||
446 | char2hex(mac[i * 3 + 1]); | ||
447 | } | ||
448 | |||
449 | static void __init detect_leds(void) | ||
450 | { | ||
451 | char *prid, *usb_prod; | ||
452 | |||
453 | /* Default LEDs */ | ||
454 | ar7_led_data.num_leds = ARRAY_SIZE(default_leds); | ||
455 | ar7_led_data.leds = default_leds; | ||
456 | |||
457 | /* FIXME: the whole thing is unreliable */ | ||
458 | prid = prom_getenv("ProductID"); | ||
459 | usb_prod = prom_getenv("usb_prod"); | ||
460 | |||
461 | /* If we can't get the product id from PROM, use the default LEDs */ | ||
462 | if (!prid) | ||
463 | return; | ||
464 | |||
465 | if (strstr(prid, "Fritz_Box_FON")) { | ||
466 | ar7_led_data.num_leds = ARRAY_SIZE(fb_fon_leds); | ||
467 | ar7_led_data.leds = fb_fon_leds; | ||
468 | } else if (strstr(prid, "Fritz_Box_")) { | ||
469 | ar7_led_data.num_leds = ARRAY_SIZE(fb_sl_leds); | ||
470 | ar7_led_data.leds = fb_sl_leds; | ||
471 | } else if ((!strcmp(prid, "AR7RD") || !strcmp(prid, "AR7DB")) | ||
472 | && usb_prod != NULL && strstr(usb_prod, "DSL-502T")) { | ||
473 | ar7_led_data.num_leds = ARRAY_SIZE(dsl502t_leds); | ||
474 | ar7_led_data.leds = dsl502t_leds; | ||
475 | } else if (strstr(prid, "DG834")) { | ||
476 | ar7_led_data.num_leds = ARRAY_SIZE(dg834g_leds); | ||
477 | ar7_led_data.leds = dg834g_leds; | ||
478 | } | ||
479 | } | ||
480 | |||
481 | static int __init ar7_register_devices(void) | ||
482 | { | ||
483 | int res; | ||
484 | static struct uart_port uart_port[2]; | ||
485 | |||
486 | memset(uart_port, 0, sizeof(struct uart_port) * 2); | ||
487 | |||
488 | uart_port[0].type = PORT_16550A; | ||
489 | uart_port[0].line = 0; | ||
490 | uart_port[0].irq = AR7_IRQ_UART0; | ||
491 | uart_port[0].uartclk = ar7_bus_freq() / 2; | ||
492 | uart_port[0].iotype = UPIO_MEM32; | ||
493 | uart_port[0].mapbase = AR7_REGS_UART0; | ||
494 | uart_port[0].membase = ioremap(uart_port[0].mapbase, 256); | ||
495 | uart_port[0].regshift = 2; | ||
496 | res = early_serial_setup(&uart_port[0]); | ||
497 | if (res) | ||
498 | return res; | ||
499 | |||
500 | |||
501 | /* Only TNETD73xx have a second serial port */ | ||
502 | if (ar7_has_second_uart()) { | ||
503 | uart_port[1].type = PORT_16550A; | ||
504 | uart_port[1].line = 1; | ||
505 | uart_port[1].irq = AR7_IRQ_UART1; | ||
506 | uart_port[1].uartclk = ar7_bus_freq() / 2; | ||
507 | uart_port[1].iotype = UPIO_MEM32; | ||
508 | uart_port[1].mapbase = UR8_REGS_UART1; | ||
509 | uart_port[1].membase = ioremap(uart_port[1].mapbase, 256); | ||
510 | uart_port[1].regshift = 2; | ||
511 | res = early_serial_setup(&uart_port[1]); | ||
512 | if (res) | ||
513 | return res; | ||
514 | } | ||
515 | |||
516 | res = platform_device_register(&physmap_flash); | ||
517 | if (res) | ||
518 | return res; | ||
519 | |||
520 | ar7_device_disable(vlynq_low_data.reset_bit); | ||
521 | res = platform_device_register(&vlynq_low); | ||
522 | if (res) | ||
523 | return res; | ||
524 | |||
525 | if (ar7_has_high_vlynq()) { | ||
526 | ar7_device_disable(vlynq_high_data.reset_bit); | ||
527 | res = platform_device_register(&vlynq_high); | ||
528 | if (res) | ||
529 | return res; | ||
530 | } | ||
531 | |||
532 | if (ar7_has_high_cpmac()) { | ||
533 | cpmac_get_mac(1, cpmac_high_data.dev_addr); | ||
534 | res = platform_device_register(&cpmac_high); | ||
535 | if (res) | ||
536 | return res; | ||
537 | } else { | ||
538 | cpmac_low_data.phy_mask = 0xffffffff; | ||
539 | } | ||
540 | |||
541 | cpmac_get_mac(0, cpmac_low_data.dev_addr); | ||
542 | res = platform_device_register(&cpmac_low); | ||
543 | if (res) | ||
544 | return res; | ||
545 | |||
546 | detect_leds(); | ||
547 | res = platform_device_register(&ar7_gpio_leds); | ||
548 | if (res) | ||
549 | return res; | ||
550 | |||
551 | res = platform_device_register(&ar7_udc); | ||
552 | |||
553 | return res; | ||
554 | } | ||
555 | arch_initcall(ar7_register_devices); | ||
diff --git a/arch/mips/ar7/prom.c b/arch/mips/ar7/prom.c new file mode 100644 index 000000000000..a320bceb2f9d --- /dev/null +++ b/arch/mips/ar7/prom.c | |||
@@ -0,0 +1,297 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can distribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License (Version 2) as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
12 | * for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
17 | * | ||
18 | * Putting things on the screen/serial line using YAMONs facilities. | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/serial_reg.h> | ||
23 | #include <linux/spinlock.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/string.h> | ||
26 | #include <linux/io.h> | ||
27 | #include <asm/bootinfo.h> | ||
28 | |||
29 | #include <asm/mach-ar7/ar7.h> | ||
30 | #include <asm/mach-ar7/prom.h> | ||
31 | |||
32 | #define MAX_ENTRY 80 | ||
33 | |||
34 | struct env_var { | ||
35 | char *name; | ||
36 | char *value; | ||
37 | }; | ||
38 | |||
39 | static struct env_var adam2_env[MAX_ENTRY]; | ||
40 | |||
41 | char *prom_getenv(const char *name) | ||
42 | { | ||
43 | int i; | ||
44 | for (i = 0; (i < MAX_ENTRY) && adam2_env[i].name; i++) | ||
45 | if (!strcmp(name, adam2_env[i].name)) | ||
46 | return adam2_env[i].value; | ||
47 | |||
48 | return NULL; | ||
49 | } | ||
50 | EXPORT_SYMBOL(prom_getenv); | ||
51 | |||
52 | char * __init prom_getcmdline(void) | ||
53 | { | ||
54 | return &(arcs_cmdline[0]); | ||
55 | } | ||
56 | |||
57 | static void __init ar7_init_cmdline(int argc, char *argv[]) | ||
58 | { | ||
59 | char *cp; | ||
60 | int actr; | ||
61 | |||
62 | actr = 1; /* Always ignore argv[0] */ | ||
63 | |||
64 | cp = &(arcs_cmdline[0]); | ||
65 | while (actr < argc) { | ||
66 | strcpy(cp, argv[actr]); | ||
67 | cp += strlen(argv[actr]); | ||
68 | *cp++ = ' '; | ||
69 | actr++; | ||
70 | } | ||
71 | if (cp != &(arcs_cmdline[0])) { | ||
72 | /* get rid of trailing space */ | ||
73 | --cp; | ||
74 | *cp = '\0'; | ||
75 | } | ||
76 | } | ||
77 | |||
78 | struct psbl_rec { | ||
79 | u32 psbl_size; | ||
80 | u32 env_base; | ||
81 | u32 env_size; | ||
82 | u32 ffs_base; | ||
83 | u32 ffs_size; | ||
84 | }; | ||
85 | |||
86 | static __initdata char psp_env_version[] = "TIENV0.8"; | ||
87 | |||
88 | struct psp_env_chunk { | ||
89 | u8 num; | ||
90 | u8 ctrl; | ||
91 | u16 csum; | ||
92 | u8 len; | ||
93 | char data[11]; | ||
94 | } __attribute__ ((packed)); | ||
95 | |||
96 | struct psp_var_map_entry { | ||
97 | u8 num; | ||
98 | char *value; | ||
99 | }; | ||
100 | |||
101 | static struct psp_var_map_entry psp_var_map[] = { | ||
102 | { 1, "cpufrequency" }, | ||
103 | { 2, "memsize" }, | ||
104 | { 3, "flashsize" }, | ||
105 | { 4, "modetty0" }, | ||
106 | { 5, "modetty1" }, | ||
107 | { 8, "maca" }, | ||
108 | { 9, "macb" }, | ||
109 | { 28, "sysfrequency" }, | ||
110 | { 38, "mipsfrequency" }, | ||
111 | }; | ||
112 | |||
113 | /* | ||
114 | |||
115 | Well-known variable (num is looked up in table above for matching variable name) | ||
116 | Example: cpufrequency=211968000 | ||
117 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- | ||
118 | | 01 |CTRL|CHECKSUM | 01 | _2 | _1 | _1 | _9 | _6 | _8 | _0 | _0 | _0 | \0 | FF | ||
119 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- | ||
120 | |||
121 | Name=Value pair in a single chunk | ||
122 | Example: NAME=VALUE | ||
123 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- | ||
124 | | 00 |CTRL|CHECKSUM | 01 | _N | _A | _M | _E | _0 | _V | _A | _L | _U | _E | \0 | ||
125 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- | ||
126 | |||
127 | Name=Value pair in 2 chunks (len is the number of chunks) | ||
128 | Example: bootloaderVersion=1.3.7.15 | ||
129 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- | ||
130 | | 00 |CTRL|CHECKSUM | 02 | _b | _o | _o | _t | _l | _o | _a | _d | _e | _r | _V | ||
131 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- | ||
132 | | _e | _r | _s | _i | _o | _n | \0 | _1 | _. | _3 | _. | _7 | _. | _1 | _5 | \0 | ||
133 | +----+----+----+----+----+----+----+----+----+----+----+----+----+----+----+--- | ||
134 | |||
135 | Data is padded with 0xFF | ||
136 | |||
137 | */ | ||
138 | |||
139 | #define PSP_ENV_SIZE 4096 | ||
140 | |||
141 | static char psp_env_data[PSP_ENV_SIZE] = { 0, }; | ||
142 | |||
143 | static char * __init lookup_psp_var_map(u8 num) | ||
144 | { | ||
145 | int i; | ||
146 | |||
147 | for (i = 0; i < sizeof(psp_var_map); i++) | ||
148 | if (psp_var_map[i].num == num) | ||
149 | return psp_var_map[i].value; | ||
150 | |||
151 | return NULL; | ||
152 | } | ||
153 | |||
154 | static void __init add_adam2_var(char *name, char *value) | ||
155 | { | ||
156 | int i; | ||
157 | for (i = 0; i < MAX_ENTRY; i++) { | ||
158 | if (!adam2_env[i].name) { | ||
159 | adam2_env[i].name = name; | ||
160 | adam2_env[i].value = value; | ||
161 | return; | ||
162 | } else if (!strcmp(adam2_env[i].name, name)) { | ||
163 | adam2_env[i].value = value; | ||
164 | return; | ||
165 | } | ||
166 | } | ||
167 | } | ||
168 | |||
169 | static int __init parse_psp_env(void *psp_env_base) | ||
170 | { | ||
171 | int i, n; | ||
172 | char *name, *value; | ||
173 | struct psp_env_chunk *chunks = (struct psp_env_chunk *)psp_env_data; | ||
174 | |||
175 | memcpy_fromio(chunks, psp_env_base, PSP_ENV_SIZE); | ||
176 | |||
177 | i = 1; | ||
178 | n = PSP_ENV_SIZE / sizeof(struct psp_env_chunk); | ||
179 | while (i < n) { | ||
180 | if ((chunks[i].num == 0xff) || ((i + chunks[i].len) > n)) | ||
181 | break; | ||
182 | value = chunks[i].data; | ||
183 | if (chunks[i].num) { | ||
184 | name = lookup_psp_var_map(chunks[i].num); | ||
185 | } else { | ||
186 | name = value; | ||
187 | value += strlen(name) + 1; | ||
188 | } | ||
189 | if (name) | ||
190 | add_adam2_var(name, value); | ||
191 | i += chunks[i].len; | ||
192 | } | ||
193 | return 0; | ||
194 | } | ||
195 | |||
196 | static void __init ar7_init_env(struct env_var *env) | ||
197 | { | ||
198 | int i; | ||
199 | struct psbl_rec *psbl = (struct psbl_rec *)(KSEG1ADDR(0x14000300)); | ||
200 | void *psp_env = (void *)KSEG1ADDR(psbl->env_base); | ||
201 | |||
202 | if (strcmp(psp_env, psp_env_version) == 0) { | ||
203 | parse_psp_env(psp_env); | ||
204 | } else { | ||
205 | for (i = 0; i < MAX_ENTRY; i++, env++) | ||
206 | if (env->name) | ||
207 | add_adam2_var(env->name, env->value); | ||
208 | } | ||
209 | } | ||
210 | |||
211 | static void __init console_config(void) | ||
212 | { | ||
213 | #ifdef CONFIG_SERIAL_8250_CONSOLE | ||
214 | char console_string[40]; | ||
215 | int baud = 0; | ||
216 | char parity = '\0', bits = '\0', flow = '\0'; | ||
217 | char *s, *p; | ||
218 | |||
219 | if (strstr(prom_getcmdline(), "console=")) | ||
220 | return; | ||
221 | |||
222 | #ifdef CONFIG_KGDB | ||
223 | if (!strstr(prom_getcmdline(), "nokgdb")) { | ||
224 | strcat(prom_getcmdline(), " console=kgdb"); | ||
225 | kgdb_enabled = 1; | ||
226 | return; | ||
227 | } | ||
228 | #endif | ||
229 | |||
230 | s = prom_getenv("modetty0"); | ||
231 | if (s) { | ||
232 | baud = simple_strtoul(s, &p, 10); | ||
233 | s = p; | ||
234 | if (*s == ',') | ||
235 | s++; | ||
236 | if (*s) | ||
237 | parity = *s++; | ||
238 | if (*s == ',') | ||
239 | s++; | ||
240 | if (*s) | ||
241 | bits = *s++; | ||
242 | if (*s == ',') | ||
243 | s++; | ||
244 | if (*s == 'h') | ||
245 | flow = 'r'; | ||
246 | } | ||
247 | |||
248 | if (baud == 0) | ||
249 | baud = 38400; | ||
250 | if (parity != 'n' && parity != 'o' && parity != 'e') | ||
251 | parity = 'n'; | ||
252 | if (bits != '7' && bits != '8') | ||
253 | bits = '8'; | ||
254 | |||
255 | if (flow == 'r') | ||
256 | sprintf(console_string, " console=ttyS0,%d%c%c%c", baud, | ||
257 | parity, bits, flow); | ||
258 | else | ||
259 | sprintf(console_string, " console=ttyS0,%d%c%c", baud, parity, | ||
260 | bits); | ||
261 | strcat(prom_getcmdline(), console_string); | ||
262 | #endif | ||
263 | } | ||
264 | |||
265 | void __init prom_init(void) | ||
266 | { | ||
267 | ar7_init_cmdline(fw_arg0, (char **)fw_arg1); | ||
268 | ar7_init_env((struct env_var *)fw_arg2); | ||
269 | console_config(); | ||
270 | } | ||
271 | |||
272 | #define PORT(offset) (KSEG1ADDR(AR7_REGS_UART0 + (offset * 4))) | ||
273 | static inline unsigned int serial_in(int offset) | ||
274 | { | ||
275 | return readl((void *)PORT(offset)); | ||
276 | } | ||
277 | |||
278 | static inline void serial_out(int offset, int value) | ||
279 | { | ||
280 | writel(value, (void *)PORT(offset)); | ||
281 | } | ||
282 | |||
283 | char prom_getchar(void) | ||
284 | { | ||
285 | while (!(serial_in(UART_LSR) & UART_LSR_DR)) | ||
286 | ; | ||
287 | return serial_in(UART_RX); | ||
288 | } | ||
289 | |||
290 | int prom_putchar(char c) | ||
291 | { | ||
292 | while ((serial_in(UART_LSR) & UART_LSR_TEMT) == 0) | ||
293 | ; | ||
294 | serial_out(UART_TX, c); | ||
295 | return 1; | ||
296 | } | ||
297 | |||
diff --git a/arch/mips/ar7/setup.c b/arch/mips/ar7/setup.c new file mode 100644 index 000000000000..6ebb5f16d967 --- /dev/null +++ b/arch/mips/ar7/setup.c | |||
@@ -0,0 +1,94 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can distribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License (Version 2) as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
12 | * for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
17 | */ | ||
18 | #include <linux/version.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/ioport.h> | ||
21 | #include <linux/pm.h> | ||
22 | #include <linux/time.h> | ||
23 | |||
24 | #include <asm/reboot.h> | ||
25 | #include <asm/mach-ar7/ar7.h> | ||
26 | #include <asm/mach-ar7/prom.h> | ||
27 | |||
28 | static void ar7_machine_restart(char *command) | ||
29 | { | ||
30 | u32 *softres_reg = ioremap(AR7_REGS_RESET + | ||
31 | AR7_RESET_SOFTWARE, 1); | ||
32 | writel(1, softres_reg); | ||
33 | } | ||
34 | |||
35 | static void ar7_machine_halt(void) | ||
36 | { | ||
37 | while (1) | ||
38 | ; | ||
39 | } | ||
40 | |||
41 | static void ar7_machine_power_off(void) | ||
42 | { | ||
43 | u32 *power_reg = (u32 *)ioremap(AR7_REGS_POWER, 1); | ||
44 | u32 power_state = readl(power_reg) | (3 << 30); | ||
45 | writel(power_state, power_reg); | ||
46 | ar7_machine_halt(); | ||
47 | } | ||
48 | |||
49 | const char *get_system_type(void) | ||
50 | { | ||
51 | u16 chip_id = ar7_chip_id(); | ||
52 | switch (chip_id) { | ||
53 | case AR7_CHIP_7300: | ||
54 | return "TI AR7 (TNETD7300)"; | ||
55 | case AR7_CHIP_7100: | ||
56 | return "TI AR7 (TNETD7100)"; | ||
57 | case AR7_CHIP_7200: | ||
58 | return "TI AR7 (TNETD7200)"; | ||
59 | default: | ||
60 | return "TI AR7 (Unknown)"; | ||
61 | } | ||
62 | } | ||
63 | |||
64 | static int __init ar7_init_console(void) | ||
65 | { | ||
66 | return 0; | ||
67 | } | ||
68 | console_initcall(ar7_init_console); | ||
69 | |||
70 | /* | ||
71 | * Initializes basic routines and structures pointers, memory size (as | ||
72 | * given by the bios and saves the command line. | ||
73 | */ | ||
74 | |||
75 | void __init plat_mem_setup(void) | ||
76 | { | ||
77 | unsigned long io_base; | ||
78 | |||
79 | _machine_restart = ar7_machine_restart; | ||
80 | _machine_halt = ar7_machine_halt; | ||
81 | pm_power_off = ar7_machine_power_off; | ||
82 | panic_timeout = 3; | ||
83 | |||
84 | io_base = (unsigned long)ioremap(AR7_REGS_BASE, 0x10000); | ||
85 | if (!io_base) | ||
86 | panic("Can't remap IO base!\n"); | ||
87 | set_io_port_base(io_base); | ||
88 | |||
89 | prom_meminit(); | ||
90 | |||
91 | printk(KERN_INFO "%s, ID: 0x%04x, Revision: 0x%02x\n", | ||
92 | get_system_type(), | ||
93 | ar7_chip_id(), ar7_chip_rev()); | ||
94 | } | ||
diff --git a/arch/mips/ar7/time.c b/arch/mips/ar7/time.c new file mode 100644 index 000000000000..a1fba894daa2 --- /dev/null +++ b/arch/mips/ar7/time.c | |||
@@ -0,0 +1,30 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * | ||
5 | * This program is free software; you can distribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License (Version 2) as | ||
7 | * published by the Free Software Foundation. | ||
8 | * | ||
9 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
10 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
11 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
12 | * for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License along | ||
15 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
16 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
17 | * | ||
18 | * Setting up the clock on the MIPS boards. | ||
19 | */ | ||
20 | |||
21 | #include <linux/init.h> | ||
22 | #include <linux/time.h> | ||
23 | |||
24 | #include <asm/time.h> | ||
25 | #include <asm/mach-ar7/ar7.h> | ||
26 | |||
27 | void __init plat_time_init(void) | ||
28 | { | ||
29 | mips_hpt_frequency = ar7_cpu_freq() / 2; | ||
30 | } | ||
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile index 7c0528b0e34c..d6903c3f3d51 100644 --- a/arch/mips/cavium-octeon/Makefile +++ b/arch/mips/cavium-octeon/Makefile | |||
@@ -14,9 +14,5 @@ obj-y += dma-octeon.o flash_setup.o | |||
14 | obj-y += octeon-memcpy.o | 14 | obj-y += octeon-memcpy.o |
15 | 15 | ||
16 | obj-$(CONFIG_SMP) += smp.o | 16 | obj-$(CONFIG_SMP) += smp.o |
17 | obj-$(CONFIG_PCI) += pci-common.o | ||
18 | obj-$(CONFIG_PCI) += pci.o | ||
19 | obj-$(CONFIG_PCI) += pcie.o | ||
20 | obj-$(CONFIG_PCI_MSI) += msi.o | ||
21 | 17 | ||
22 | EXTRA_CFLAGS += -Werror | 18 | EXTRA_CFLAGS += -Werror |
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c index 627c162a6159..4b92bfc662db 100644 --- a/arch/mips/cavium-octeon/dma-octeon.c +++ b/arch/mips/cavium-octeon/dma-octeon.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include <dma-coherence.h> | 29 | #include <dma-coherence.h> |
30 | 30 | ||
31 | #ifdef CONFIG_PCI | 31 | #ifdef CONFIG_PCI |
32 | #include "pci-common.h" | 32 | #include <asm/octeon/pci-octeon.h> |
33 | #endif | 33 | #endif |
34 | 34 | ||
35 | #define BAR2_PCI_ADDRESS 0x8000000000ul | 35 | #define BAR2_PCI_ADDRESS 0x8000000000ul |
diff --git a/arch/mips/cavium-octeon/pci-common.c b/arch/mips/cavium-octeon/pci-common.c deleted file mode 100644 index cd029f88da7f..000000000000 --- a/arch/mips/cavium-octeon/pci-common.c +++ /dev/null | |||
@@ -1,137 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2005-2007 Cavium Networks | ||
7 | */ | ||
8 | #include <linux/kernel.h> | ||
9 | #include <linux/init.h> | ||
10 | #include <linux/pci.h> | ||
11 | #include <linux/interrupt.h> | ||
12 | #include <linux/time.h> | ||
13 | #include <linux/delay.h> | ||
14 | #include "pci-common.h" | ||
15 | |||
16 | typeof(pcibios_map_irq) *octeon_pcibios_map_irq; | ||
17 | enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID; | ||
18 | |||
19 | /** | ||
20 | * Map a PCI device to the appropriate interrupt line | ||
21 | * | ||
22 | * @param dev The Linux PCI device structure for the device to map | ||
23 | * @param slot The slot number for this device on __BUS 0__. Linux | ||
24 | * enumerates through all the bridges and figures out the | ||
25 | * slot on Bus 0 where this device eventually hooks to. | ||
26 | * @param pin The PCI interrupt pin read from the device, then swizzled | ||
27 | * as it goes through each bridge. | ||
28 | * @return Interrupt number for the device | ||
29 | */ | ||
30 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | ||
31 | { | ||
32 | if (octeon_pcibios_map_irq) | ||
33 | return octeon_pcibios_map_irq(dev, slot, pin); | ||
34 | else | ||
35 | panic("octeon_pcibios_map_irq doesn't point to a " | ||
36 | "pcibios_map_irq() function"); | ||
37 | } | ||
38 | |||
39 | |||
40 | /** | ||
41 | * Called to perform platform specific PCI setup | ||
42 | * | ||
43 | * @param dev | ||
44 | * @return | ||
45 | */ | ||
46 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
47 | { | ||
48 | uint16_t config; | ||
49 | uint32_t dconfig; | ||
50 | int pos; | ||
51 | /* | ||
52 | * Force the Cache line setting to 64 bytes. The standard | ||
53 | * Linux bus scan doesn't seem to set it. Octeon really has | ||
54 | * 128 byte lines, but Intel bridges get really upset if you | ||
55 | * try and set values above 64 bytes. Value is specified in | ||
56 | * 32bit words. | ||
57 | */ | ||
58 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 64 / 4); | ||
59 | /* Set latency timers for all devices */ | ||
60 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 48); | ||
61 | |||
62 | /* Enable reporting System errors and parity errors on all devices */ | ||
63 | /* Enable parity checking and error reporting */ | ||
64 | pci_read_config_word(dev, PCI_COMMAND, &config); | ||
65 | config |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR; | ||
66 | pci_write_config_word(dev, PCI_COMMAND, config); | ||
67 | |||
68 | if (dev->subordinate) { | ||
69 | /* Set latency timers on sub bridges */ | ||
70 | pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 48); | ||
71 | /* More bridge error detection */ | ||
72 | pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &config); | ||
73 | config |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR; | ||
74 | pci_write_config_word(dev, PCI_BRIDGE_CONTROL, config); | ||
75 | } | ||
76 | |||
77 | /* Enable the PCIe normal error reporting */ | ||
78 | pos = pci_find_capability(dev, PCI_CAP_ID_EXP); | ||
79 | if (pos) { | ||
80 | /* Update Device Control */ | ||
81 | pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config); | ||
82 | /* Correctable Error Reporting */ | ||
83 | config |= PCI_EXP_DEVCTL_CERE; | ||
84 | /* Non-Fatal Error Reporting */ | ||
85 | config |= PCI_EXP_DEVCTL_NFERE; | ||
86 | /* Fatal Error Reporting */ | ||
87 | config |= PCI_EXP_DEVCTL_FERE; | ||
88 | /* Unsupported Request */ | ||
89 | config |= PCI_EXP_DEVCTL_URRE; | ||
90 | pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config); | ||
91 | } | ||
92 | |||
93 | /* Find the Advanced Error Reporting capability */ | ||
94 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | ||
95 | if (pos) { | ||
96 | /* Clear Uncorrectable Error Status */ | ||
97 | pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, | ||
98 | &dconfig); | ||
99 | pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, | ||
100 | dconfig); | ||
101 | /* Enable reporting of all uncorrectable errors */ | ||
102 | /* Uncorrectable Error Mask - turned on bits disable errors */ | ||
103 | pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 0); | ||
104 | /* | ||
105 | * Leave severity at HW default. This only controls if | ||
106 | * errors are reported as uncorrectable or | ||
107 | * correctable, not if the error is reported. | ||
108 | */ | ||
109 | /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */ | ||
110 | /* Clear Correctable Error Status */ | ||
111 | pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &dconfig); | ||
112 | pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, dconfig); | ||
113 | /* Enable reporting of all correctable errors */ | ||
114 | /* Correctable Error Mask - turned on bits disable errors */ | ||
115 | pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, 0); | ||
116 | /* Advanced Error Capabilities */ | ||
117 | pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig); | ||
118 | /* ECRC Generation Enable */ | ||
119 | if (config & PCI_ERR_CAP_ECRC_GENC) | ||
120 | config |= PCI_ERR_CAP_ECRC_GENE; | ||
121 | /* ECRC Check Enable */ | ||
122 | if (config & PCI_ERR_CAP_ECRC_CHKC) | ||
123 | config |= PCI_ERR_CAP_ECRC_CHKE; | ||
124 | pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig); | ||
125 | /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */ | ||
126 | /* Report all errors to the root complex */ | ||
127 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, | ||
128 | PCI_ERR_ROOT_CMD_COR_EN | | ||
129 | PCI_ERR_ROOT_CMD_NONFATAL_EN | | ||
130 | PCI_ERR_ROOT_CMD_FATAL_EN); | ||
131 | /* Clear the Root status register */ | ||
132 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &dconfig); | ||
133 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig); | ||
134 | } | ||
135 | |||
136 | return 0; | ||
137 | } | ||
diff --git a/arch/mips/cobalt/buttons.c b/arch/mips/cobalt/buttons.c index 9e143989c7b8..4eaec8b46e0c 100644 --- a/arch/mips/cobalt/buttons.c +++ b/arch/mips/cobalt/buttons.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Cobalt buttons platform device. | 2 | * Cobalt buttons platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cobalt/lcd.c b/arch/mips/cobalt/lcd.c index 0720e4fae311..0f1cd90f37ed 100644 --- a/arch/mips/cobalt/lcd.c +++ b/arch/mips/cobalt/lcd.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Registration of Cobalt LCD platform device. | 2 | * Registration of Cobalt LCD platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cobalt/led.c b/arch/mips/cobalt/led.c index 1c6ebd468b07..d3ce6fa1dc74 100644 --- a/arch/mips/cobalt/led.c +++ b/arch/mips/cobalt/led.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Registration of Cobalt LED platform device. | 2 | * Registration of Cobalt LED platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cobalt/mtd.c b/arch/mips/cobalt/mtd.c index 2b088ef3839a..691d620b6766 100644 --- a/arch/mips/cobalt/mtd.c +++ b/arch/mips/cobalt/mtd.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Registration of Cobalt MTD device. | 2 | * Registration of Cobalt MTD device. |
3 | * | 3 | * |
4 | * Copyright (C) 2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2006 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cobalt/rtc.c b/arch/mips/cobalt/rtc.c index e70794b8bcba..3ab39898b4e4 100644 --- a/arch/mips/cobalt/rtc.c +++ b/arch/mips/cobalt/rtc.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Registration of Cobalt RTC platform device. | 2 | * Registration of Cobalt RTC platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cobalt/serial.c b/arch/mips/cobalt/serial.c index 53b8d0d6da90..7cb51f57275e 100644 --- a/arch/mips/cobalt/serial.c +++ b/arch/mips/cobalt/serial.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Registration of Cobalt UART platform device. | 2 | * Registration of Cobalt UART platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cobalt/time.c b/arch/mips/cobalt/time.c index 4a570e7145fe..0162f9edc693 100644 --- a/arch/mips/cobalt/time.c +++ b/arch/mips/cobalt/time.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Cobalt time initialization. | 2 | * Cobalt time initialization. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig new file mode 100644 index 000000000000..dad5b6769d74 --- /dev/null +++ b/arch/mips/configs/ar7_defconfig | |||
@@ -0,0 +1,1182 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.30 | ||
4 | # Wed Jun 24 14:08:59 2009 | ||
5 | # | ||
6 | CONFIG_MIPS=y | ||
7 | |||
8 | # | ||
9 | # Machine selection | ||
10 | # | ||
11 | # CONFIG_MACH_ALCHEMY is not set | ||
12 | CONFIG_AR7=y | ||
13 | # CONFIG_BASLER_EXCITE is not set | ||
14 | # CONFIG_BCM47XX is not set | ||
15 | # CONFIG_MIPS_COBALT is not set | ||
16 | # CONFIG_MACH_DECSTATION is not set | ||
17 | # CONFIG_MACH_JAZZ is not set | ||
18 | # CONFIG_LASAT is not set | ||
19 | # CONFIG_LEMOTE_FULONG is not set | ||
20 | # CONFIG_MIPS_MALTA is not set | ||
21 | # CONFIG_MIPS_SIM is not set | ||
22 | # CONFIG_NEC_MARKEINS is not set | ||
23 | # CONFIG_MACH_VR41XX is not set | ||
24 | # CONFIG_NXP_STB220 is not set | ||
25 | # CONFIG_NXP_STB225 is not set | ||
26 | # CONFIG_PNX8550_JBS is not set | ||
27 | # CONFIG_PNX8550_STB810 is not set | ||
28 | # CONFIG_PMC_MSP is not set | ||
29 | # CONFIG_PMC_YOSEMITE is not set | ||
30 | # CONFIG_SGI_IP22 is not set | ||
31 | # CONFIG_SGI_IP27 is not set | ||
32 | # CONFIG_SGI_IP28 is not set | ||
33 | # CONFIG_SGI_IP32 is not set | ||
34 | # CONFIG_SIBYTE_CRHINE is not set | ||
35 | # CONFIG_SIBYTE_CARMEL is not set | ||
36 | # CONFIG_SIBYTE_CRHONE is not set | ||
37 | # CONFIG_SIBYTE_RHONE is not set | ||
38 | # CONFIG_SIBYTE_SWARM is not set | ||
39 | # CONFIG_SIBYTE_LITTLESUR is not set | ||
40 | # CONFIG_SIBYTE_SENTOSA is not set | ||
41 | # CONFIG_SIBYTE_BIGSUR is not set | ||
42 | # CONFIG_SNI_RM is not set | ||
43 | # CONFIG_MACH_TX39XX is not set | ||
44 | # CONFIG_MACH_TX49XX is not set | ||
45 | # CONFIG_MIKROTIK_RB532 is not set | ||
46 | # CONFIG_WR_PPMC is not set | ||
47 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set | ||
48 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set | ||
49 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set | ||
50 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
51 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
52 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
53 | CONFIG_ARCH_SUPPORTS_OPROFILE=y | ||
54 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
55 | CONFIG_GENERIC_HWEIGHT=y | ||
56 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
57 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
58 | CONFIG_GENERIC_TIME=y | ||
59 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
60 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
61 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
62 | CONFIG_CEVT_R4K_LIB=y | ||
63 | CONFIG_CEVT_R4K=y | ||
64 | CONFIG_CSRC_R4K_LIB=y | ||
65 | CONFIG_CSRC_R4K=y | ||
66 | CONFIG_DMA_NONCOHERENT=y | ||
67 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | ||
68 | CONFIG_EARLY_PRINTK=y | ||
69 | CONFIG_SYS_HAS_EARLY_PRINTK=y | ||
70 | # CONFIG_HOTPLUG_CPU is not set | ||
71 | # CONFIG_NO_IOPORT is not set | ||
72 | CONFIG_GENERIC_GPIO=y | ||
73 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
74 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
75 | CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y | ||
76 | CONFIG_IRQ_CPU=y | ||
77 | CONFIG_NO_EXCEPT_FILL=y | ||
78 | CONFIG_SWAP_IO_SPACE=y | ||
79 | CONFIG_BOOT_ELF32=y | ||
80 | CONFIG_MIPS_L1_CACHE_SHIFT=5 | ||
81 | |||
82 | # | ||
83 | # CPU selection | ||
84 | # | ||
85 | # CONFIG_CPU_LOONGSON2 is not set | ||
86 | CONFIG_CPU_MIPS32_R1=y | ||
87 | # CONFIG_CPU_MIPS32_R2 is not set | ||
88 | # CONFIG_CPU_MIPS64_R1 is not set | ||
89 | # CONFIG_CPU_MIPS64_R2 is not set | ||
90 | # CONFIG_CPU_R3000 is not set | ||
91 | # CONFIG_CPU_TX39XX is not set | ||
92 | # CONFIG_CPU_VR41XX is not set | ||
93 | # CONFIG_CPU_R4300 is not set | ||
94 | # CONFIG_CPU_R4X00 is not set | ||
95 | # CONFIG_CPU_TX49XX is not set | ||
96 | # CONFIG_CPU_R5000 is not set | ||
97 | # CONFIG_CPU_R5432 is not set | ||
98 | # CONFIG_CPU_R5500 is not set | ||
99 | # CONFIG_CPU_R6000 is not set | ||
100 | # CONFIG_CPU_NEVADA is not set | ||
101 | # CONFIG_CPU_R8000 is not set | ||
102 | # CONFIG_CPU_R10000 is not set | ||
103 | # CONFIG_CPU_RM7000 is not set | ||
104 | # CONFIG_CPU_RM9000 is not set | ||
105 | # CONFIG_CPU_SB1 is not set | ||
106 | # CONFIG_CPU_CAVIUM_OCTEON is not set | ||
107 | CONFIG_SYS_HAS_CPU_MIPS32_R1=y | ||
108 | CONFIG_CPU_MIPS32=y | ||
109 | CONFIG_CPU_MIPSR1=y | ||
110 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | ||
111 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y | ||
112 | CONFIG_HARDWARE_WATCHPOINTS=y | ||
113 | |||
114 | # | ||
115 | # Kernel type | ||
116 | # | ||
117 | CONFIG_32BIT=y | ||
118 | # CONFIG_64BIT is not set | ||
119 | CONFIG_PAGE_SIZE_4KB=y | ||
120 | # CONFIG_PAGE_SIZE_8KB is not set | ||
121 | # CONFIG_PAGE_SIZE_16KB is not set | ||
122 | # CONFIG_PAGE_SIZE_32KB is not set | ||
123 | # CONFIG_PAGE_SIZE_64KB is not set | ||
124 | CONFIG_CPU_HAS_PREFETCH=y | ||
125 | CONFIG_MIPS_MT_DISABLED=y | ||
126 | # CONFIG_MIPS_MT_SMP is not set | ||
127 | # CONFIG_MIPS_MT_SMTC is not set | ||
128 | CONFIG_CPU_HAS_LLSC=y | ||
129 | CONFIG_CPU_HAS_SYNC=y | ||
130 | CONFIG_GENERIC_HARDIRQS=y | ||
131 | CONFIG_GENERIC_IRQ_PROBE=y | ||
132 | CONFIG_CPU_SUPPORTS_HIGHMEM=y | ||
133 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
134 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
135 | CONFIG_SELECT_MEMORY_MODEL=y | ||
136 | CONFIG_FLATMEM_MANUAL=y | ||
137 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
138 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
139 | CONFIG_FLATMEM=y | ||
140 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
141 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
142 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
143 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
144 | CONFIG_ZONE_DMA_FLAG=0 | ||
145 | CONFIG_VIRT_TO_BUS=y | ||
146 | CONFIG_HAVE_MLOCK=y | ||
147 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
148 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
149 | CONFIG_TICK_ONESHOT=y | ||
150 | # CONFIG_NO_HZ is not set | ||
151 | CONFIG_HIGH_RES_TIMERS=y | ||
152 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
153 | # CONFIG_HZ_48 is not set | ||
154 | CONFIG_HZ_100=y | ||
155 | # CONFIG_HZ_128 is not set | ||
156 | # CONFIG_HZ_250 is not set | ||
157 | # CONFIG_HZ_256 is not set | ||
158 | # CONFIG_HZ_1000 is not set | ||
159 | # CONFIG_HZ_1024 is not set | ||
160 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y | ||
161 | CONFIG_HZ=100 | ||
162 | CONFIG_PREEMPT_NONE=y | ||
163 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
164 | # CONFIG_PREEMPT is not set | ||
165 | CONFIG_KEXEC=y | ||
166 | # CONFIG_SECCOMP is not set | ||
167 | CONFIG_LOCKDEP_SUPPORT=y | ||
168 | CONFIG_STACKTRACE_SUPPORT=y | ||
169 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
170 | |||
171 | # | ||
172 | # General setup | ||
173 | # | ||
174 | CONFIG_EXPERIMENTAL=y | ||
175 | CONFIG_BROKEN_ON_SMP=y | ||
176 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
177 | CONFIG_LOCALVERSION="" | ||
178 | # CONFIG_LOCALVERSION_AUTO is not set | ||
179 | CONFIG_SWAP=y | ||
180 | CONFIG_SYSVIPC=y | ||
181 | CONFIG_SYSVIPC_SYSCTL=y | ||
182 | # CONFIG_POSIX_MQUEUE is not set | ||
183 | CONFIG_BSD_PROCESS_ACCT=y | ||
184 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
185 | # CONFIG_TASKSTATS is not set | ||
186 | # CONFIG_AUDIT is not set | ||
187 | |||
188 | # | ||
189 | # RCU Subsystem | ||
190 | # | ||
191 | CONFIG_CLASSIC_RCU=y | ||
192 | # CONFIG_TREE_RCU is not set | ||
193 | # CONFIG_PREEMPT_RCU is not set | ||
194 | # CONFIG_TREE_RCU_TRACE is not set | ||
195 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
196 | # CONFIG_IKCONFIG is not set | ||
197 | CONFIG_LOG_BUF_SHIFT=14 | ||
198 | # CONFIG_GROUP_SCHED is not set | ||
199 | # CONFIG_CGROUPS is not set | ||
200 | CONFIG_SYSFS_DEPRECATED=y | ||
201 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
202 | CONFIG_RELAY=y | ||
203 | # CONFIG_NAMESPACES is not set | ||
204 | CONFIG_BLK_DEV_INITRD=y | ||
205 | CONFIG_INITRAMFS_SOURCE="" | ||
206 | CONFIG_RD_GZIP=y | ||
207 | # CONFIG_RD_BZIP2 is not set | ||
208 | CONFIG_RD_LZMA=y | ||
209 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
210 | CONFIG_SYSCTL=y | ||
211 | CONFIG_ANON_INODES=y | ||
212 | CONFIG_EMBEDDED=y | ||
213 | CONFIG_SYSCTL_SYSCALL=y | ||
214 | # CONFIG_KALLSYMS is not set | ||
215 | CONFIG_HOTPLUG=y | ||
216 | CONFIG_PRINTK=y | ||
217 | CONFIG_BUG=y | ||
218 | # CONFIG_ELF_CORE is not set | ||
219 | # CONFIG_PCSPKR_PLATFORM is not set | ||
220 | CONFIG_BASE_FULL=y | ||
221 | CONFIG_FUTEX=y | ||
222 | CONFIG_EPOLL=y | ||
223 | CONFIG_SIGNALFD=y | ||
224 | CONFIG_TIMERFD=y | ||
225 | CONFIG_EVENTFD=y | ||
226 | CONFIG_SHMEM=y | ||
227 | CONFIG_AIO=y | ||
228 | |||
229 | # | ||
230 | # Performance Counters | ||
231 | # | ||
232 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
233 | CONFIG_STRIP_ASM_SYMS=y | ||
234 | # CONFIG_COMPAT_BRK is not set | ||
235 | CONFIG_SLAB=y | ||
236 | # CONFIG_SLUB is not set | ||
237 | # CONFIG_SLOB is not set | ||
238 | # CONFIG_PROFILING is not set | ||
239 | # CONFIG_MARKERS is not set | ||
240 | CONFIG_HAVE_OPROFILE=y | ||
241 | # CONFIG_SLOW_WORK is not set | ||
242 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
243 | CONFIG_SLABINFO=y | ||
244 | CONFIG_RT_MUTEXES=y | ||
245 | CONFIG_BASE_SMALL=0 | ||
246 | CONFIG_MODULES=y | ||
247 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
248 | CONFIG_MODULE_UNLOAD=y | ||
249 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
250 | # CONFIG_MODVERSIONS is not set | ||
251 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
252 | CONFIG_BLOCK=y | ||
253 | # CONFIG_LBD is not set | ||
254 | # CONFIG_BLK_DEV_BSG is not set | ||
255 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
256 | |||
257 | # | ||
258 | # IO Schedulers | ||
259 | # | ||
260 | CONFIG_IOSCHED_NOOP=y | ||
261 | # CONFIG_IOSCHED_AS is not set | ||
262 | CONFIG_IOSCHED_DEADLINE=y | ||
263 | # CONFIG_IOSCHED_CFQ is not set | ||
264 | # CONFIG_DEFAULT_AS is not set | ||
265 | CONFIG_DEFAULT_DEADLINE=y | ||
266 | # CONFIG_DEFAULT_CFQ is not set | ||
267 | # CONFIG_DEFAULT_NOOP is not set | ||
268 | CONFIG_DEFAULT_IOSCHED="deadline" | ||
269 | CONFIG_PROBE_INITRD_HEADER=y | ||
270 | # CONFIG_FREEZER is not set | ||
271 | |||
272 | # | ||
273 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | ||
274 | # | ||
275 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
276 | CONFIG_MMU=y | ||
277 | # CONFIG_PCCARD is not set | ||
278 | |||
279 | # | ||
280 | # Executable file formats | ||
281 | # | ||
282 | CONFIG_BINFMT_ELF=y | ||
283 | # CONFIG_HAVE_AOUT is not set | ||
284 | # CONFIG_BINFMT_MISC is not set | ||
285 | CONFIG_TRAD_SIGNALS=y | ||
286 | |||
287 | # | ||
288 | # Power management options | ||
289 | # | ||
290 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
291 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
292 | # CONFIG_PM is not set | ||
293 | CONFIG_NET=y | ||
294 | |||
295 | # | ||
296 | # Networking options | ||
297 | # | ||
298 | CONFIG_PACKET=y | ||
299 | CONFIG_PACKET_MMAP=y | ||
300 | CONFIG_UNIX=y | ||
301 | # CONFIG_NET_KEY is not set | ||
302 | CONFIG_INET=y | ||
303 | CONFIG_IP_MULTICAST=y | ||
304 | CONFIG_IP_ADVANCED_ROUTER=y | ||
305 | CONFIG_ASK_IP_FIB_HASH=y | ||
306 | # CONFIG_IP_FIB_TRIE is not set | ||
307 | CONFIG_IP_FIB_HASH=y | ||
308 | CONFIG_IP_MULTIPLE_TABLES=y | ||
309 | CONFIG_IP_ROUTE_MULTIPATH=y | ||
310 | CONFIG_IP_ROUTE_VERBOSE=y | ||
311 | # CONFIG_IP_PNP is not set | ||
312 | # CONFIG_NET_IPIP is not set | ||
313 | # CONFIG_NET_IPGRE is not set | ||
314 | CONFIG_IP_MROUTE=y | ||
315 | # CONFIG_IP_PIMSM_V1 is not set | ||
316 | # CONFIG_IP_PIMSM_V2 is not set | ||
317 | CONFIG_ARPD=y | ||
318 | CONFIG_SYN_COOKIES=y | ||
319 | # CONFIG_INET_AH is not set | ||
320 | # CONFIG_INET_ESP is not set | ||
321 | # CONFIG_INET_IPCOMP is not set | ||
322 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
323 | # CONFIG_INET_TUNNEL is not set | ||
324 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
325 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
326 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
327 | # CONFIG_INET_LRO is not set | ||
328 | # CONFIG_INET_DIAG is not set | ||
329 | CONFIG_TCP_CONG_ADVANCED=y | ||
330 | # CONFIG_TCP_CONG_BIC is not set | ||
331 | # CONFIG_TCP_CONG_CUBIC is not set | ||
332 | CONFIG_TCP_CONG_WESTWOOD=y | ||
333 | # CONFIG_TCP_CONG_HTCP is not set | ||
334 | # CONFIG_TCP_CONG_HSTCP is not set | ||
335 | # CONFIG_TCP_CONG_HYBLA is not set | ||
336 | # CONFIG_TCP_CONG_VEGAS is not set | ||
337 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
338 | # CONFIG_TCP_CONG_LP is not set | ||
339 | # CONFIG_TCP_CONG_VENO is not set | ||
340 | # CONFIG_TCP_CONG_YEAH is not set | ||
341 | # CONFIG_TCP_CONG_ILLINOIS is not set | ||
342 | # CONFIG_DEFAULT_BIC is not set | ||
343 | # CONFIG_DEFAULT_CUBIC is not set | ||
344 | # CONFIG_DEFAULT_HTCP is not set | ||
345 | # CONFIG_DEFAULT_VEGAS is not set | ||
346 | CONFIG_DEFAULT_WESTWOOD=y | ||
347 | # CONFIG_DEFAULT_RENO is not set | ||
348 | CONFIG_DEFAULT_TCP_CONG="westwood" | ||
349 | # CONFIG_TCP_MD5SIG is not set | ||
350 | # CONFIG_IPV6 is not set | ||
351 | # CONFIG_NETWORK_SECMARK is not set | ||
352 | CONFIG_NETFILTER=y | ||
353 | # CONFIG_NETFILTER_DEBUG is not set | ||
354 | CONFIG_NETFILTER_ADVANCED=y | ||
355 | # CONFIG_BRIDGE_NETFILTER is not set | ||
356 | |||
357 | # | ||
358 | # Core Netfilter Configuration | ||
359 | # | ||
360 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
361 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
362 | CONFIG_NF_CONNTRACK=m | ||
363 | # CONFIG_NF_CT_ACCT is not set | ||
364 | CONFIG_NF_CONNTRACK_MARK=y | ||
365 | # CONFIG_NF_CONNTRACK_EVENTS is not set | ||
366 | # CONFIG_NF_CT_PROTO_DCCP is not set | ||
367 | # CONFIG_NF_CT_PROTO_SCTP is not set | ||
368 | # CONFIG_NF_CT_PROTO_UDPLITE is not set | ||
369 | # CONFIG_NF_CONNTRACK_AMANDA is not set | ||
370 | CONFIG_NF_CONNTRACK_FTP=m | ||
371 | # CONFIG_NF_CONNTRACK_H323 is not set | ||
372 | CONFIG_NF_CONNTRACK_IRC=m | ||
373 | # CONFIG_NF_CONNTRACK_NETBIOS_NS is not set | ||
374 | # CONFIG_NF_CONNTRACK_PPTP is not set | ||
375 | # CONFIG_NF_CONNTRACK_SANE is not set | ||
376 | # CONFIG_NF_CONNTRACK_SIP is not set | ||
377 | CONFIG_NF_CONNTRACK_TFTP=m | ||
378 | # CONFIG_NF_CT_NETLINK is not set | ||
379 | # CONFIG_NETFILTER_TPROXY is not set | ||
380 | CONFIG_NETFILTER_XTABLES=m | ||
381 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set | ||
382 | # CONFIG_NETFILTER_XT_TARGET_CONNMARK is not set | ||
383 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | ||
384 | # CONFIG_NETFILTER_XT_TARGET_HL is not set | ||
385 | # CONFIG_NETFILTER_XT_TARGET_LED is not set | ||
386 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set | ||
387 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set | ||
388 | # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set | ||
389 | CONFIG_NETFILTER_XT_TARGET_NOTRACK=m | ||
390 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | ||
391 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | ||
392 | CONFIG_NETFILTER_XT_TARGET_TCPMSS=m | ||
393 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | ||
394 | # CONFIG_NETFILTER_XT_MATCH_CLUSTER is not set | ||
395 | # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set | ||
396 | # CONFIG_NETFILTER_XT_MATCH_CONNBYTES is not set | ||
397 | # CONFIG_NETFILTER_XT_MATCH_CONNLIMIT is not set | ||
398 | # CONFIG_NETFILTER_XT_MATCH_CONNMARK is not set | ||
399 | # CONFIG_NETFILTER_XT_MATCH_CONNTRACK is not set | ||
400 | # CONFIG_NETFILTER_XT_MATCH_DCCP is not set | ||
401 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set | ||
402 | # CONFIG_NETFILTER_XT_MATCH_ESP is not set | ||
403 | # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set | ||
404 | # CONFIG_NETFILTER_XT_MATCH_HELPER is not set | ||
405 | # CONFIG_NETFILTER_XT_MATCH_HL is not set | ||
406 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | ||
407 | # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set | ||
408 | CONFIG_NETFILTER_XT_MATCH_LIMIT=m | ||
409 | CONFIG_NETFILTER_XT_MATCH_MAC=m | ||
410 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set | ||
411 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=m | ||
412 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | ||
413 | # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set | ||
414 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | ||
415 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | ||
416 | # CONFIG_NETFILTER_XT_MATCH_REALM is not set | ||
417 | # CONFIG_NETFILTER_XT_MATCH_RECENT is not set | ||
418 | # CONFIG_NETFILTER_XT_MATCH_SCTP is not set | ||
419 | CONFIG_NETFILTER_XT_MATCH_STATE=m | ||
420 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | ||
421 | # CONFIG_NETFILTER_XT_MATCH_STRING is not set | ||
422 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set | ||
423 | # CONFIG_NETFILTER_XT_MATCH_TIME is not set | ||
424 | # CONFIG_NETFILTER_XT_MATCH_U32 is not set | ||
425 | # CONFIG_IP_VS is not set | ||
426 | |||
427 | # | ||
428 | # IP: Netfilter Configuration | ||
429 | # | ||
430 | CONFIG_NF_DEFRAG_IPV4=m | ||
431 | CONFIG_NF_CONNTRACK_IPV4=m | ||
432 | CONFIG_NF_CONNTRACK_PROC_COMPAT=y | ||
433 | # CONFIG_IP_NF_QUEUE is not set | ||
434 | CONFIG_IP_NF_IPTABLES=m | ||
435 | # CONFIG_IP_NF_MATCH_ADDRTYPE is not set | ||
436 | # CONFIG_IP_NF_MATCH_AH is not set | ||
437 | # CONFIG_IP_NF_MATCH_ECN is not set | ||
438 | # CONFIG_IP_NF_MATCH_TTL is not set | ||
439 | CONFIG_IP_NF_FILTER=m | ||
440 | CONFIG_IP_NF_TARGET_REJECT=m | ||
441 | CONFIG_IP_NF_TARGET_LOG=m | ||
442 | # CONFIG_IP_NF_TARGET_ULOG is not set | ||
443 | CONFIG_NF_NAT=m | ||
444 | CONFIG_NF_NAT_NEEDED=y | ||
445 | CONFIG_IP_NF_TARGET_MASQUERADE=m | ||
446 | # CONFIG_IP_NF_TARGET_NETMAP is not set | ||
447 | # CONFIG_IP_NF_TARGET_REDIRECT is not set | ||
448 | # CONFIG_NF_NAT_SNMP_BASIC is not set | ||
449 | CONFIG_NF_NAT_FTP=m | ||
450 | CONFIG_NF_NAT_IRC=m | ||
451 | CONFIG_NF_NAT_TFTP=m | ||
452 | # CONFIG_NF_NAT_AMANDA is not set | ||
453 | # CONFIG_NF_NAT_PPTP is not set | ||
454 | # CONFIG_NF_NAT_H323 is not set | ||
455 | # CONFIG_NF_NAT_SIP is not set | ||
456 | CONFIG_IP_NF_MANGLE=m | ||
457 | # CONFIG_IP_NF_TARGET_CLUSTERIP is not set | ||
458 | # CONFIG_IP_NF_TARGET_ECN is not set | ||
459 | # CONFIG_IP_NF_TARGET_TTL is not set | ||
460 | CONFIG_IP_NF_RAW=m | ||
461 | # CONFIG_IP_NF_ARPTABLES is not set | ||
462 | # CONFIG_IP_DCCP is not set | ||
463 | # CONFIG_IP_SCTP is not set | ||
464 | # CONFIG_TIPC is not set | ||
465 | CONFIG_ATM=m | ||
466 | # CONFIG_ATM_CLIP is not set | ||
467 | # CONFIG_ATM_LANE is not set | ||
468 | CONFIG_ATM_BR2684=m | ||
469 | CONFIG_ATM_BR2684_IPFILTER=y | ||
470 | CONFIG_STP=y | ||
471 | CONFIG_BRIDGE=y | ||
472 | # CONFIG_NET_DSA is not set | ||
473 | CONFIG_VLAN_8021Q=y | ||
474 | # CONFIG_VLAN_8021Q_GVRP is not set | ||
475 | # CONFIG_DECNET is not set | ||
476 | CONFIG_LLC=y | ||
477 | # CONFIG_LLC2 is not set | ||
478 | # CONFIG_IPX is not set | ||
479 | # CONFIG_ATALK is not set | ||
480 | # CONFIG_X25 is not set | ||
481 | # CONFIG_LAPB is not set | ||
482 | # CONFIG_ECONET is not set | ||
483 | # CONFIG_WAN_ROUTER is not set | ||
484 | # CONFIG_PHONET is not set | ||
485 | # CONFIG_IEEE802154 is not set | ||
486 | CONFIG_NET_SCHED=y | ||
487 | |||
488 | # | ||
489 | # Queueing/Scheduling | ||
490 | # | ||
491 | # CONFIG_NET_SCH_CBQ is not set | ||
492 | # CONFIG_NET_SCH_HTB is not set | ||
493 | # CONFIG_NET_SCH_HFSC is not set | ||
494 | # CONFIG_NET_SCH_ATM is not set | ||
495 | # CONFIG_NET_SCH_PRIO is not set | ||
496 | # CONFIG_NET_SCH_MULTIQ is not set | ||
497 | # CONFIG_NET_SCH_RED is not set | ||
498 | # CONFIG_NET_SCH_SFQ is not set | ||
499 | # CONFIG_NET_SCH_TEQL is not set | ||
500 | # CONFIG_NET_SCH_TBF is not set | ||
501 | # CONFIG_NET_SCH_GRED is not set | ||
502 | # CONFIG_NET_SCH_DSMARK is not set | ||
503 | # CONFIG_NET_SCH_NETEM is not set | ||
504 | # CONFIG_NET_SCH_DRR is not set | ||
505 | # CONFIG_NET_SCH_INGRESS is not set | ||
506 | |||
507 | # | ||
508 | # Classification | ||
509 | # | ||
510 | # CONFIG_NET_CLS_BASIC is not set | ||
511 | # CONFIG_NET_CLS_TCINDEX is not set | ||
512 | # CONFIG_NET_CLS_ROUTE4 is not set | ||
513 | # CONFIG_NET_CLS_FW is not set | ||
514 | # CONFIG_NET_CLS_U32 is not set | ||
515 | # CONFIG_NET_CLS_RSVP is not set | ||
516 | # CONFIG_NET_CLS_RSVP6 is not set | ||
517 | # CONFIG_NET_CLS_FLOW is not set | ||
518 | # CONFIG_NET_EMATCH is not set | ||
519 | CONFIG_NET_CLS_ACT=y | ||
520 | CONFIG_NET_ACT_POLICE=y | ||
521 | # CONFIG_NET_ACT_GACT is not set | ||
522 | # CONFIG_NET_ACT_MIRRED is not set | ||
523 | # CONFIG_NET_ACT_IPT is not set | ||
524 | # CONFIG_NET_ACT_NAT is not set | ||
525 | # CONFIG_NET_ACT_PEDIT is not set | ||
526 | # CONFIG_NET_ACT_SIMP is not set | ||
527 | # CONFIG_NET_ACT_SKBEDIT is not set | ||
528 | CONFIG_NET_SCH_FIFO=y | ||
529 | # CONFIG_DCB is not set | ||
530 | |||
531 | # | ||
532 | # Network testing | ||
533 | # | ||
534 | # CONFIG_NET_PKTGEN is not set | ||
535 | CONFIG_HAMRADIO=y | ||
536 | |||
537 | # | ||
538 | # Packet Radio protocols | ||
539 | # | ||
540 | # CONFIG_AX25 is not set | ||
541 | # CONFIG_CAN is not set | ||
542 | # CONFIG_IRDA is not set | ||
543 | # CONFIG_BT is not set | ||
544 | # CONFIG_AF_RXRPC is not set | ||
545 | CONFIG_FIB_RULES=y | ||
546 | CONFIG_WIRELESS=y | ||
547 | CONFIG_CFG80211=m | ||
548 | # CONFIG_CFG80211_REG_DEBUG is not set | ||
549 | # CONFIG_CFG80211_DEBUGFS is not set | ||
550 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
551 | CONFIG_WIRELESS_EXT=y | ||
552 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
553 | # CONFIG_LIB80211 is not set | ||
554 | CONFIG_MAC80211=m | ||
555 | CONFIG_MAC80211_DEFAULT_PS=y | ||
556 | CONFIG_MAC80211_DEFAULT_PS_VALUE=1 | ||
557 | |||
558 | # | ||
559 | # Rate control algorithm selection | ||
560 | # | ||
561 | CONFIG_MAC80211_RC_PID=y | ||
562 | CONFIG_MAC80211_RC_MINSTREL=y | ||
563 | CONFIG_MAC80211_RC_DEFAULT_PID=y | ||
564 | # CONFIG_MAC80211_RC_DEFAULT_MINSTREL is not set | ||
565 | CONFIG_MAC80211_RC_DEFAULT="pid" | ||
566 | # CONFIG_MAC80211_MESH is not set | ||
567 | # CONFIG_MAC80211_LEDS is not set | ||
568 | # CONFIG_MAC80211_DEBUGFS is not set | ||
569 | # CONFIG_MAC80211_DEBUG_MENU is not set | ||
570 | # CONFIG_WIMAX is not set | ||
571 | # CONFIG_RFKILL is not set | ||
572 | # CONFIG_NET_9P is not set | ||
573 | |||
574 | # | ||
575 | # Device Drivers | ||
576 | # | ||
577 | |||
578 | # | ||
579 | # Generic Driver Options | ||
580 | # | ||
581 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
582 | CONFIG_STANDALONE=y | ||
583 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
584 | CONFIG_FW_LOADER=y | ||
585 | # CONFIG_FIRMWARE_IN_KERNEL is not set | ||
586 | CONFIG_EXTRA_FIRMWARE="" | ||
587 | # CONFIG_SYS_HYPERVISOR is not set | ||
588 | # CONFIG_CONNECTOR is not set | ||
589 | CONFIG_MTD=y | ||
590 | # CONFIG_MTD_DEBUG is not set | ||
591 | # CONFIG_MTD_CONCAT is not set | ||
592 | CONFIG_MTD_PARTITIONS=y | ||
593 | # CONFIG_MTD_TESTS is not set | ||
594 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
595 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
596 | # CONFIG_MTD_AR7_PARTS is not set | ||
597 | |||
598 | # | ||
599 | # User Modules And Translation Layers | ||
600 | # | ||
601 | CONFIG_MTD_CHAR=y | ||
602 | CONFIG_MTD_BLKDEVS=y | ||
603 | CONFIG_MTD_BLOCK=y | ||
604 | # CONFIG_FTL is not set | ||
605 | # CONFIG_NFTL is not set | ||
606 | # CONFIG_INFTL is not set | ||
607 | # CONFIG_RFD_FTL is not set | ||
608 | # CONFIG_SSFDC is not set | ||
609 | # CONFIG_MTD_OOPS is not set | ||
610 | |||
611 | # | ||
612 | # RAM/ROM/Flash chip drivers | ||
613 | # | ||
614 | CONFIG_MTD_CFI=y | ||
615 | # CONFIG_MTD_JEDECPROBE is not set | ||
616 | CONFIG_MTD_GEN_PROBE=y | ||
617 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
618 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
619 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
620 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
621 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
622 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
623 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
624 | CONFIG_MTD_CFI_I1=y | ||
625 | CONFIG_MTD_CFI_I2=y | ||
626 | # CONFIG_MTD_CFI_I4 is not set | ||
627 | # CONFIG_MTD_CFI_I8 is not set | ||
628 | CONFIG_MTD_CFI_INTELEXT=y | ||
629 | CONFIG_MTD_CFI_AMDSTD=y | ||
630 | CONFIG_MTD_CFI_STAA=y | ||
631 | CONFIG_MTD_CFI_UTIL=y | ||
632 | # CONFIG_MTD_RAM is not set | ||
633 | # CONFIG_MTD_ROM is not set | ||
634 | # CONFIG_MTD_ABSENT is not set | ||
635 | |||
636 | # | ||
637 | # Mapping drivers for chip access | ||
638 | # | ||
639 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
640 | CONFIG_MTD_PHYSMAP=y | ||
641 | # CONFIG_MTD_PHYSMAP_COMPAT is not set | ||
642 | # CONFIG_MTD_PLATRAM is not set | ||
643 | |||
644 | # | ||
645 | # Self-contained MTD device drivers | ||
646 | # | ||
647 | # CONFIG_MTD_SLRAM is not set | ||
648 | # CONFIG_MTD_PHRAM is not set | ||
649 | # CONFIG_MTD_MTDRAM is not set | ||
650 | # CONFIG_MTD_BLOCK2MTD is not set | ||
651 | |||
652 | # | ||
653 | # Disk-On-Chip Device Drivers | ||
654 | # | ||
655 | # CONFIG_MTD_DOC2000 is not set | ||
656 | # CONFIG_MTD_DOC2001 is not set | ||
657 | # CONFIG_MTD_DOC2001PLUS is not set | ||
658 | # CONFIG_MTD_NAND is not set | ||
659 | # CONFIG_MTD_ONENAND is not set | ||
660 | |||
661 | # | ||
662 | # LPDDR flash memory drivers | ||
663 | # | ||
664 | # CONFIG_MTD_LPDDR is not set | ||
665 | |||
666 | # | ||
667 | # UBI - Unsorted block images | ||
668 | # | ||
669 | # CONFIG_MTD_UBI is not set | ||
670 | # CONFIG_PARPORT is not set | ||
671 | CONFIG_BLK_DEV=y | ||
672 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
673 | # CONFIG_BLK_DEV_LOOP is not set | ||
674 | # CONFIG_BLK_DEV_NBD is not set | ||
675 | # CONFIG_BLK_DEV_RAM is not set | ||
676 | # CONFIG_CDROM_PKTCDVD is not set | ||
677 | # CONFIG_ATA_OVER_ETH is not set | ||
678 | # CONFIG_BLK_DEV_HD is not set | ||
679 | CONFIG_MISC_DEVICES=y | ||
680 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
681 | # CONFIG_C2PORT is not set | ||
682 | |||
683 | # | ||
684 | # EEPROM support | ||
685 | # | ||
686 | # CONFIG_EEPROM_93CX6 is not set | ||
687 | CONFIG_HAVE_IDE=y | ||
688 | # CONFIG_IDE is not set | ||
689 | |||
690 | # | ||
691 | # SCSI device support | ||
692 | # | ||
693 | # CONFIG_RAID_ATTRS is not set | ||
694 | # CONFIG_SCSI is not set | ||
695 | # CONFIG_SCSI_DMA is not set | ||
696 | # CONFIG_SCSI_NETLINK is not set | ||
697 | # CONFIG_ATA is not set | ||
698 | # CONFIG_MD is not set | ||
699 | CONFIG_NETDEVICES=y | ||
700 | # CONFIG_IFB is not set | ||
701 | # CONFIG_DUMMY is not set | ||
702 | # CONFIG_BONDING is not set | ||
703 | # CONFIG_MACVLAN is not set | ||
704 | # CONFIG_EQUALIZER is not set | ||
705 | # CONFIG_TUN is not set | ||
706 | # CONFIG_VETH is not set | ||
707 | CONFIG_PHYLIB=y | ||
708 | |||
709 | # | ||
710 | # MII PHY device drivers | ||
711 | # | ||
712 | # CONFIG_MARVELL_PHY is not set | ||
713 | # CONFIG_DAVICOM_PHY is not set | ||
714 | # CONFIG_QSEMI_PHY is not set | ||
715 | # CONFIG_LXT_PHY is not set | ||
716 | # CONFIG_CICADA_PHY is not set | ||
717 | # CONFIG_VITESSE_PHY is not set | ||
718 | # CONFIG_SMSC_PHY is not set | ||
719 | # CONFIG_BROADCOM_PHY is not set | ||
720 | # CONFIG_ICPLUS_PHY is not set | ||
721 | # CONFIG_REALTEK_PHY is not set | ||
722 | # CONFIG_NATIONAL_PHY is not set | ||
723 | # CONFIG_STE10XP is not set | ||
724 | # CONFIG_LSI_ET1011C_PHY is not set | ||
725 | CONFIG_FIXED_PHY=y | ||
726 | # CONFIG_MDIO_BITBANG is not set | ||
727 | CONFIG_NET_ETHERNET=y | ||
728 | CONFIG_MII=y | ||
729 | # CONFIG_AX88796 is not set | ||
730 | # CONFIG_SMC91X is not set | ||
731 | # CONFIG_DM9000 is not set | ||
732 | # CONFIG_ETHOC is not set | ||
733 | # CONFIG_DNET is not set | ||
734 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
735 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
736 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
737 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
738 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
739 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
740 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
741 | # CONFIG_B44 is not set | ||
742 | # CONFIG_KS8842 is not set | ||
743 | CONFIG_CPMAC=y | ||
744 | # CONFIG_NETDEV_1000 is not set | ||
745 | # CONFIG_NETDEV_10000 is not set | ||
746 | |||
747 | # | ||
748 | # Wireless LAN | ||
749 | # | ||
750 | # CONFIG_WLAN_PRE80211 is not set | ||
751 | CONFIG_WLAN_80211=y | ||
752 | # CONFIG_LIBERTAS is not set | ||
753 | # CONFIG_LIBERTAS_THINFIRM is not set | ||
754 | # CONFIG_MAC80211_HWSIM is not set | ||
755 | # CONFIG_P54_COMMON is not set | ||
756 | # CONFIG_HOSTAP is not set | ||
757 | # CONFIG_B43 is not set | ||
758 | # CONFIG_B43LEGACY is not set | ||
759 | # CONFIG_RT2X00 is not set | ||
760 | |||
761 | # | ||
762 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
763 | # | ||
764 | # CONFIG_WAN is not set | ||
765 | CONFIG_ATM_DRIVERS=y | ||
766 | # CONFIG_ATM_DUMMY is not set | ||
767 | # CONFIG_ATM_TCP is not set | ||
768 | CONFIG_PPP=m | ||
769 | CONFIG_PPP_MULTILINK=y | ||
770 | CONFIG_PPP_FILTER=y | ||
771 | CONFIG_PPP_ASYNC=m | ||
772 | # CONFIG_PPP_SYNC_TTY is not set | ||
773 | # CONFIG_PPP_DEFLATE is not set | ||
774 | # CONFIG_PPP_BSDCOMP is not set | ||
775 | # CONFIG_PPP_MPPE is not set | ||
776 | CONFIG_PPPOE=m | ||
777 | CONFIG_PPPOATM=m | ||
778 | # CONFIG_PPPOL2TP is not set | ||
779 | # CONFIG_SLIP is not set | ||
780 | CONFIG_SLHC=m | ||
781 | # CONFIG_NETCONSOLE is not set | ||
782 | # CONFIG_NETPOLL is not set | ||
783 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
784 | # CONFIG_ISDN is not set | ||
785 | # CONFIG_PHONE is not set | ||
786 | |||
787 | # | ||
788 | # Input device support | ||
789 | # | ||
790 | # CONFIG_INPUT is not set | ||
791 | |||
792 | # | ||
793 | # Hardware I/O ports | ||
794 | # | ||
795 | # CONFIG_SERIO is not set | ||
796 | # CONFIG_GAMEPORT is not set | ||
797 | |||
798 | # | ||
799 | # Character devices | ||
800 | # | ||
801 | # CONFIG_VT is not set | ||
802 | # CONFIG_DEVKMEM is not set | ||
803 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
804 | |||
805 | # | ||
806 | # Serial drivers | ||
807 | # | ||
808 | CONFIG_SERIAL_8250=y | ||
809 | CONFIG_SERIAL_8250_CONSOLE=y | ||
810 | CONFIG_SERIAL_8250_NR_UARTS=2 | ||
811 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
812 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
813 | |||
814 | # | ||
815 | # Non-8250 serial port support | ||
816 | # | ||
817 | CONFIG_SERIAL_CORE=y | ||
818 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
819 | CONFIG_UNIX98_PTYS=y | ||
820 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
821 | # CONFIG_LEGACY_PTYS is not set | ||
822 | # CONFIG_IPMI_HANDLER is not set | ||
823 | CONFIG_HW_RANDOM=y | ||
824 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
825 | # CONFIG_R3964 is not set | ||
826 | # CONFIG_RAW_DRIVER is not set | ||
827 | # CONFIG_TCG_TPM is not set | ||
828 | # CONFIG_I2C is not set | ||
829 | # CONFIG_SPI is not set | ||
830 | # CONFIG_W1 is not set | ||
831 | # CONFIG_POWER_SUPPLY is not set | ||
832 | # CONFIG_HWMON is not set | ||
833 | # CONFIG_THERMAL is not set | ||
834 | # CONFIG_THERMAL_HWMON is not set | ||
835 | CONFIG_WATCHDOG=y | ||
836 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
837 | |||
838 | # | ||
839 | # Watchdog Device Drivers | ||
840 | # | ||
841 | # CONFIG_SOFT_WATCHDOG is not set | ||
842 | CONFIG_AR7_WDT=y | ||
843 | CONFIG_SSB_POSSIBLE=y | ||
844 | |||
845 | # | ||
846 | # Sonics Silicon Backplane | ||
847 | # | ||
848 | CONFIG_SSB=y | ||
849 | # CONFIG_SSB_SILENT is not set | ||
850 | # CONFIG_SSB_DEBUG is not set | ||
851 | CONFIG_SSB_SERIAL=y | ||
852 | CONFIG_SSB_DRIVER_MIPS=y | ||
853 | CONFIG_SSB_EMBEDDED=y | ||
854 | CONFIG_SSB_DRIVER_EXTIF=y | ||
855 | |||
856 | # | ||
857 | # Multifunction device drivers | ||
858 | # | ||
859 | # CONFIG_MFD_CORE is not set | ||
860 | # CONFIG_MFD_SM501 is not set | ||
861 | # CONFIG_HTC_PASIC3 is not set | ||
862 | # CONFIG_MFD_TMIO is not set | ||
863 | # CONFIG_REGULATOR is not set | ||
864 | # CONFIG_MEDIA_SUPPORT is not set | ||
865 | |||
866 | # | ||
867 | # Graphics support | ||
868 | # | ||
869 | # CONFIG_VGASTATE is not set | ||
870 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
871 | # CONFIG_FB is not set | ||
872 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
873 | |||
874 | # | ||
875 | # Display device support | ||
876 | # | ||
877 | # CONFIG_DISPLAY_SUPPORT is not set | ||
878 | # CONFIG_SOUND is not set | ||
879 | # CONFIG_USB_SUPPORT is not set | ||
880 | # CONFIG_MMC is not set | ||
881 | # CONFIG_MEMSTICK is not set | ||
882 | CONFIG_NEW_LEDS=y | ||
883 | CONFIG_LEDS_CLASS=y | ||
884 | |||
885 | # | ||
886 | # LED drivers | ||
887 | # | ||
888 | # CONFIG_LEDS_GPIO is not set | ||
889 | |||
890 | # | ||
891 | # LED Triggers | ||
892 | # | ||
893 | CONFIG_LEDS_TRIGGERS=y | ||
894 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
895 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
896 | # CONFIG_LEDS_TRIGGER_BACKLIGHT is not set | ||
897 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
898 | |||
899 | # | ||
900 | # iptables trigger is under Netfilter config (LED target) | ||
901 | # | ||
902 | # CONFIG_ACCESSIBILITY is not set | ||
903 | CONFIG_RTC_LIB=y | ||
904 | # CONFIG_RTC_CLASS is not set | ||
905 | # CONFIG_DMADEVICES is not set | ||
906 | # CONFIG_AUXDISPLAY is not set | ||
907 | # CONFIG_UIO is not set | ||
908 | |||
909 | # | ||
910 | # TI VLYNQ | ||
911 | # | ||
912 | CONFIG_VLYNQ=y | ||
913 | # CONFIG_STAGING is not set | ||
914 | |||
915 | # | ||
916 | # File systems | ||
917 | # | ||
918 | # CONFIG_EXT2_FS is not set | ||
919 | # CONFIG_EXT3_FS is not set | ||
920 | # CONFIG_EXT4_FS is not set | ||
921 | # CONFIG_REISERFS_FS is not set | ||
922 | # CONFIG_JFS_FS is not set | ||
923 | # CONFIG_FS_POSIX_ACL is not set | ||
924 | # CONFIG_XFS_FS is not set | ||
925 | # CONFIG_OCFS2_FS is not set | ||
926 | # CONFIG_BTRFS_FS is not set | ||
927 | CONFIG_FILE_LOCKING=y | ||
928 | CONFIG_FSNOTIFY=y | ||
929 | # CONFIG_DNOTIFY is not set | ||
930 | # CONFIG_INOTIFY is not set | ||
931 | CONFIG_INOTIFY_USER=y | ||
932 | # CONFIG_QUOTA is not set | ||
933 | # CONFIG_AUTOFS_FS is not set | ||
934 | # CONFIG_AUTOFS4_FS is not set | ||
935 | # CONFIG_FUSE_FS is not set | ||
936 | |||
937 | # | ||
938 | # Caches | ||
939 | # | ||
940 | # CONFIG_FSCACHE is not set | ||
941 | |||
942 | # | ||
943 | # CD-ROM/DVD Filesystems | ||
944 | # | ||
945 | # CONFIG_ISO9660_FS is not set | ||
946 | # CONFIG_UDF_FS is not set | ||
947 | |||
948 | # | ||
949 | # DOS/FAT/NT Filesystems | ||
950 | # | ||
951 | # CONFIG_MSDOS_FS is not set | ||
952 | # CONFIG_VFAT_FS is not set | ||
953 | # CONFIG_NTFS_FS is not set | ||
954 | |||
955 | # | ||
956 | # Pseudo filesystems | ||
957 | # | ||
958 | CONFIG_PROC_FS=y | ||
959 | CONFIG_PROC_KCORE=y | ||
960 | CONFIG_PROC_SYSCTL=y | ||
961 | # CONFIG_PROC_PAGE_MONITOR is not set | ||
962 | CONFIG_SYSFS=y | ||
963 | CONFIG_TMPFS=y | ||
964 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
965 | # CONFIG_HUGETLB_PAGE is not set | ||
966 | # CONFIG_CONFIGFS_FS is not set | ||
967 | CONFIG_MISC_FILESYSTEMS=y | ||
968 | # CONFIG_ADFS_FS is not set | ||
969 | # CONFIG_AFFS_FS is not set | ||
970 | # CONFIG_HFS_FS is not set | ||
971 | # CONFIG_HFSPLUS_FS is not set | ||
972 | # CONFIG_BEFS_FS is not set | ||
973 | # CONFIG_BFS_FS is not set | ||
974 | # CONFIG_EFS_FS is not set | ||
975 | CONFIG_JFFS2_FS=y | ||
976 | CONFIG_JFFS2_FS_DEBUG=0 | ||
977 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
978 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
979 | CONFIG_JFFS2_SUMMARY=y | ||
980 | # CONFIG_JFFS2_FS_XATTR is not set | ||
981 | CONFIG_JFFS2_COMPRESSION_OPTIONS=y | ||
982 | CONFIG_JFFS2_ZLIB=y | ||
983 | # CONFIG_JFFS2_LZO is not set | ||
984 | CONFIG_JFFS2_RTIME=y | ||
985 | # CONFIG_JFFS2_RUBIN is not set | ||
986 | # CONFIG_JFFS2_CMODE_NONE is not set | ||
987 | CONFIG_JFFS2_CMODE_PRIORITY=y | ||
988 | # CONFIG_JFFS2_CMODE_SIZE is not set | ||
989 | # CONFIG_JFFS2_CMODE_FAVOURLZO is not set | ||
990 | # CONFIG_CRAMFS is not set | ||
991 | CONFIG_SQUASHFS=y | ||
992 | # CONFIG_SQUASHFS_EMBEDDED is not set | ||
993 | CONFIG_SQUASHFS_FRAGMENT_CACHE_SIZE=3 | ||
994 | # CONFIG_VXFS_FS is not set | ||
995 | # CONFIG_MINIX_FS is not set | ||
996 | # CONFIG_OMFS_FS is not set | ||
997 | # CONFIG_HPFS_FS is not set | ||
998 | # CONFIG_QNX4FS_FS is not set | ||
999 | # CONFIG_ROMFS_FS is not set | ||
1000 | # CONFIG_SYSV_FS is not set | ||
1001 | # CONFIG_UFS_FS is not set | ||
1002 | # CONFIG_NILFS2_FS is not set | ||
1003 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1004 | # CONFIG_NFS_FS is not set | ||
1005 | # CONFIG_NFSD is not set | ||
1006 | # CONFIG_SMB_FS is not set | ||
1007 | # CONFIG_CIFS is not set | ||
1008 | # CONFIG_NCP_FS is not set | ||
1009 | # CONFIG_CODA_FS is not set | ||
1010 | # CONFIG_AFS_FS is not set | ||
1011 | |||
1012 | # | ||
1013 | # Partition Types | ||
1014 | # | ||
1015 | CONFIG_PARTITION_ADVANCED=y | ||
1016 | # CONFIG_ACORN_PARTITION is not set | ||
1017 | # CONFIG_OSF_PARTITION is not set | ||
1018 | # CONFIG_AMIGA_PARTITION is not set | ||
1019 | # CONFIG_ATARI_PARTITION is not set | ||
1020 | # CONFIG_MAC_PARTITION is not set | ||
1021 | CONFIG_MSDOS_PARTITION=y | ||
1022 | CONFIG_BSD_DISKLABEL=y | ||
1023 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1024 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1025 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1026 | # CONFIG_LDM_PARTITION is not set | ||
1027 | # CONFIG_SGI_PARTITION is not set | ||
1028 | # CONFIG_ULTRIX_PARTITION is not set | ||
1029 | # CONFIG_SUN_PARTITION is not set | ||
1030 | # CONFIG_KARMA_PARTITION is not set | ||
1031 | # CONFIG_EFI_PARTITION is not set | ||
1032 | # CONFIG_SYSV68_PARTITION is not set | ||
1033 | # CONFIG_NLS is not set | ||
1034 | # CONFIG_DLM is not set | ||
1035 | |||
1036 | # | ||
1037 | # Kernel hacking | ||
1038 | # | ||
1039 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
1040 | # CONFIG_PRINTK_TIME is not set | ||
1041 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1042 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
1043 | CONFIG_FRAME_WARN=1024 | ||
1044 | # CONFIG_MAGIC_SYSRQ is not set | ||
1045 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1046 | CONFIG_DEBUG_FS=y | ||
1047 | # CONFIG_HEADERS_CHECK is not set | ||
1048 | # CONFIG_DEBUG_KERNEL is not set | ||
1049 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1050 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1051 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
1052 | CONFIG_TRACING_SUPPORT=y | ||
1053 | # CONFIG_FTRACE is not set | ||
1054 | # CONFIG_DYNAMIC_DEBUG is not set | ||
1055 | # CONFIG_SAMPLES is not set | ||
1056 | CONFIG_HAVE_ARCH_KGDB=y | ||
1057 | CONFIG_CMDLINE="rootfstype=squashfs,jffs2" | ||
1058 | |||
1059 | # | ||
1060 | # Security options | ||
1061 | # | ||
1062 | # CONFIG_KEYS is not set | ||
1063 | # CONFIG_SECURITY is not set | ||
1064 | # CONFIG_SECURITYFS is not set | ||
1065 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1066 | CONFIG_CRYPTO=y | ||
1067 | |||
1068 | # | ||
1069 | # Crypto core or helper | ||
1070 | # | ||
1071 | # CONFIG_CRYPTO_FIPS is not set | ||
1072 | CONFIG_CRYPTO_ALGAPI=m | ||
1073 | CONFIG_CRYPTO_ALGAPI2=m | ||
1074 | CONFIG_CRYPTO_AEAD2=m | ||
1075 | CONFIG_CRYPTO_BLKCIPHER=m | ||
1076 | CONFIG_CRYPTO_BLKCIPHER2=m | ||
1077 | CONFIG_CRYPTO_HASH2=m | ||
1078 | CONFIG_CRYPTO_RNG2=m | ||
1079 | CONFIG_CRYPTO_PCOMP=m | ||
1080 | CONFIG_CRYPTO_MANAGER=m | ||
1081 | CONFIG_CRYPTO_MANAGER2=m | ||
1082 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1083 | # CONFIG_CRYPTO_NULL is not set | ||
1084 | CONFIG_CRYPTO_WORKQUEUE=m | ||
1085 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1086 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1087 | # CONFIG_CRYPTO_TEST is not set | ||
1088 | |||
1089 | # | ||
1090 | # Authenticated Encryption with Associated Data | ||
1091 | # | ||
1092 | # CONFIG_CRYPTO_CCM is not set | ||
1093 | # CONFIG_CRYPTO_GCM is not set | ||
1094 | # CONFIG_CRYPTO_SEQIV is not set | ||
1095 | |||
1096 | # | ||
1097 | # Block modes | ||
1098 | # | ||
1099 | # CONFIG_CRYPTO_CBC is not set | ||
1100 | # CONFIG_CRYPTO_CTR is not set | ||
1101 | # CONFIG_CRYPTO_CTS is not set | ||
1102 | CONFIG_CRYPTO_ECB=m | ||
1103 | # CONFIG_CRYPTO_LRW is not set | ||
1104 | # CONFIG_CRYPTO_PCBC is not set | ||
1105 | # CONFIG_CRYPTO_XTS is not set | ||
1106 | |||
1107 | # | ||
1108 | # Hash modes | ||
1109 | # | ||
1110 | # CONFIG_CRYPTO_HMAC is not set | ||
1111 | # CONFIG_CRYPTO_XCBC is not set | ||
1112 | |||
1113 | # | ||
1114 | # Digest | ||
1115 | # | ||
1116 | # CONFIG_CRYPTO_CRC32C is not set | ||
1117 | # CONFIG_CRYPTO_MD4 is not set | ||
1118 | # CONFIG_CRYPTO_MD5 is not set | ||
1119 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1120 | # CONFIG_CRYPTO_RMD128 is not set | ||
1121 | # CONFIG_CRYPTO_RMD160 is not set | ||
1122 | # CONFIG_CRYPTO_RMD256 is not set | ||
1123 | # CONFIG_CRYPTO_RMD320 is not set | ||
1124 | # CONFIG_CRYPTO_SHA1 is not set | ||
1125 | # CONFIG_CRYPTO_SHA256 is not set | ||
1126 | # CONFIG_CRYPTO_SHA512 is not set | ||
1127 | # CONFIG_CRYPTO_TGR192 is not set | ||
1128 | # CONFIG_CRYPTO_WP512 is not set | ||
1129 | |||
1130 | # | ||
1131 | # Ciphers | ||
1132 | # | ||
1133 | CONFIG_CRYPTO_AES=m | ||
1134 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1135 | CONFIG_CRYPTO_ARC4=m | ||
1136 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1137 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1138 | # CONFIG_CRYPTO_CAST5 is not set | ||
1139 | # CONFIG_CRYPTO_CAST6 is not set | ||
1140 | # CONFIG_CRYPTO_DES is not set | ||
1141 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1142 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1143 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1144 | # CONFIG_CRYPTO_SEED is not set | ||
1145 | # CONFIG_CRYPTO_SERPENT is not set | ||
1146 | # CONFIG_CRYPTO_TEA is not set | ||
1147 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1148 | |||
1149 | # | ||
1150 | # Compression | ||
1151 | # | ||
1152 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1153 | # CONFIG_CRYPTO_ZLIB is not set | ||
1154 | # CONFIG_CRYPTO_LZO is not set | ||
1155 | |||
1156 | # | ||
1157 | # Random Number Generation | ||
1158 | # | ||
1159 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1160 | # CONFIG_CRYPTO_HW is not set | ||
1161 | # CONFIG_BINARY_PRINTF is not set | ||
1162 | |||
1163 | # | ||
1164 | # Library routines | ||
1165 | # | ||
1166 | CONFIG_BITREVERSE=y | ||
1167 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1168 | CONFIG_CRC_CCITT=m | ||
1169 | # CONFIG_CRC16 is not set | ||
1170 | # CONFIG_CRC_T10DIF is not set | ||
1171 | # CONFIG_CRC_ITU_T is not set | ||
1172 | CONFIG_CRC32=y | ||
1173 | # CONFIG_CRC7 is not set | ||
1174 | # CONFIG_LIBCRC32C is not set | ||
1175 | CONFIG_ZLIB_INFLATE=y | ||
1176 | CONFIG_ZLIB_DEFLATE=y | ||
1177 | CONFIG_DECOMPRESS_GZIP=y | ||
1178 | CONFIG_DECOMPRESS_LZMA=y | ||
1179 | CONFIG_HAS_IOMEM=y | ||
1180 | CONFIG_HAS_IOPORT=y | ||
1181 | CONFIG_HAS_DMA=y | ||
1182 | CONFIG_NLATTR=y | ||
diff --git a/arch/mips/gt64120/wrppmc/serial.c b/arch/mips/gt64120/wrppmc/serial.c index 5ec1c2ffd3a5..6f9d0858f596 100644 --- a/arch/mips/gt64120/wrppmc/serial.c +++ b/arch/mips/gt64120/wrppmc/serial.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Registration of WRPPMC UART platform device. | 2 | * Registration of WRPPMC UART platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/amon.h b/arch/mips/include/asm/amon.h new file mode 100644 index 000000000000..c3dc1a68dd8d --- /dev/null +++ b/arch/mips/include/asm/amon.h | |||
@@ -0,0 +1,7 @@ | |||
1 | /* | ||
2 | * Amon support | ||
3 | */ | ||
4 | |||
5 | int amon_cpu_avail(int); | ||
6 | void amon_cpu_start(int, unsigned long, unsigned long, | ||
7 | unsigned long, unsigned long); | ||
diff --git a/arch/mips/include/asm/ds1287.h b/arch/mips/include/asm/ds1287.h index ba1702e86931..3af0b8fb3b8c 100644 --- a/arch/mips/include/asm/ds1287.h +++ b/arch/mips/include/asm/ds1287.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * DS1287 timer functions. | 2 | * DS1287 timer functions. |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h index d58f128aa747..7990694cda22 100644 --- a/arch/mips/include/asm/elf.h +++ b/arch/mips/include/asm/elf.h | |||
@@ -316,9 +316,13 @@ extern void elf_dump_regs(elf_greg_t *, struct pt_regs *regs); | |||
316 | extern int dump_task_regs(struct task_struct *, elf_gregset_t *); | 316 | extern int dump_task_regs(struct task_struct *, elf_gregset_t *); |
317 | extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); | 317 | extern int dump_task_fpu(struct task_struct *, elf_fpregset_t *); |
318 | 318 | ||
319 | #ifndef ELF_CORE_COPY_REGS | ||
319 | #define ELF_CORE_COPY_REGS(elf_regs, regs) \ | 320 | #define ELF_CORE_COPY_REGS(elf_regs, regs) \ |
320 | elf_dump_regs((elf_greg_t *)&(elf_regs), regs); | 321 | elf_dump_regs((elf_greg_t *)&(elf_regs), regs); |
322 | #endif | ||
323 | #ifndef ELF_CORE_COPY_TASK_REGS | ||
321 | #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) | 324 | #define ELF_CORE_COPY_TASK_REGS(tsk, elf_regs) dump_task_regs(tsk, elf_regs) |
325 | #endif | ||
322 | #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ | 326 | #define ELF_CORE_COPY_FPREGS(tsk, elf_fpregs) \ |
323 | dump_task_fpu(tsk, elf_fpregs) | 327 | dump_task_fpu(tsk, elf_fpregs) |
324 | 328 | ||
diff --git a/arch/mips/include/asm/gcmpregs.h b/arch/mips/include/asm/gcmpregs.h index d74a8a4ca861..36fd969d64d6 100644 --- a/arch/mips/include/asm/gcmpregs.h +++ b/arch/mips/include/asm/gcmpregs.h | |||
@@ -114,4 +114,6 @@ | |||
114 | #define GCMP_CCB_DINTGROUP_OFS 0x0030 /* DINT Group Participate */ | 114 | #define GCMP_CCB_DINTGROUP_OFS 0x0030 /* DINT Group Participate */ |
115 | #define GCMP_CCB_DBGGROUP_OFS 0x0100 /* DebugBreak Group */ | 115 | #define GCMP_CCB_DBGGROUP_OFS 0x0100 /* DebugBreak Group */ |
116 | 116 | ||
117 | extern int __init gcmp_probe(unsigned long, unsigned long); | ||
118 | |||
117 | #endif /* _ASM_GCMPREGS_H */ | 119 | #endif /* _ASM_GCMPREGS_H */ |
diff --git a/arch/mips/include/asm/gic.h b/arch/mips/include/asm/gic.h index 954807d9d66a..10292e37c1f7 100644 --- a/arch/mips/include/asm/gic.h +++ b/arch/mips/include/asm/gic.h | |||
@@ -20,7 +20,11 @@ | |||
20 | #define GIC_TRIG_EDGE 1 | 20 | #define GIC_TRIG_EDGE 1 |
21 | #define GIC_TRIG_LEVEL 0 | 21 | #define GIC_TRIG_LEVEL 0 |
22 | 22 | ||
23 | #if CONFIG_SMP | ||
24 | #define GIC_NUM_INTRS (24 + NR_CPUS * 2) | ||
25 | #else | ||
23 | #define GIC_NUM_INTRS 32 | 26 | #define GIC_NUM_INTRS 32 |
27 | #endif | ||
24 | 28 | ||
25 | #define MSK(n) ((1 << (n)) - 1) | 29 | #define MSK(n) ((1 << (n)) - 1) |
26 | #define REG32(addr) (*(volatile unsigned int *) (addr)) | 30 | #define REG32(addr) (*(volatile unsigned int *) (addr)) |
@@ -483,5 +487,7 @@ extern void gic_init(unsigned long gic_base_addr, | |||
483 | 487 | ||
484 | extern unsigned int gic_get_int(void); | 488 | extern unsigned int gic_get_int(void); |
485 | extern void gic_send_ipi(unsigned int intr); | 489 | extern void gic_send_ipi(unsigned int intr); |
490 | extern unsigned int plat_ipi_call_int_xlate(unsigned int); | ||
491 | extern unsigned int plat_ipi_resched_int_xlate(unsigned int); | ||
486 | 492 | ||
487 | #endif /* _ASM_GICREGS_H */ | 493 | #endif /* _ASM_GICREGS_H */ |
diff --git a/arch/mips/include/asm/irq_gt641xx.h b/arch/mips/include/asm/irq_gt641xx.h index f9a7c3ac2e66..250a2407b599 100644 --- a/arch/mips/include/asm/irq_gt641xx.h +++ b/arch/mips/include/asm/irq_gt641xx.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Galileo/Marvell GT641xx IRQ definitions. | 2 | * Galileo/Marvell GT641xx IRQ definitions. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/mach-ar7/ar7.h b/arch/mips/include/asm/mach-ar7/ar7.h new file mode 100644 index 000000000000..de71694614de --- /dev/null +++ b/arch/mips/include/asm/mach-ar7/ar7.h | |||
@@ -0,0 +1,178 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006,2007 Felix Fietkau <nbd@openwrt.org> | ||
3 | * Copyright (C) 2006,2007 Eugene Konev <ejka@openwrt.org> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
18 | */ | ||
19 | |||
20 | #ifndef __AR7_H__ | ||
21 | #define __AR7_H__ | ||
22 | |||
23 | #include <linux/delay.h> | ||
24 | #include <linux/io.h> | ||
25 | #include <linux/errno.h> | ||
26 | |||
27 | #include <asm/addrspace.h> | ||
28 | |||
29 | #define AR7_SDRAM_BASE 0x14000000 | ||
30 | |||
31 | #define AR7_REGS_BASE 0x08610000 | ||
32 | |||
33 | #define AR7_REGS_MAC0 (AR7_REGS_BASE + 0x0000) | ||
34 | #define AR7_REGS_GPIO (AR7_REGS_BASE + 0x0900) | ||
35 | /* 0x08610A00 - 0x08610BFF (512 bytes, 128 bytes / clock) */ | ||
36 | #define AR7_REGS_POWER (AR7_REGS_BASE + 0x0a00) | ||
37 | #define AR7_REGS_CLOCKS (AR7_REGS_POWER + 0x80) | ||
38 | #define UR8_REGS_CLOCKS (AR7_REGS_POWER + 0x20) | ||
39 | #define AR7_REGS_UART0 (AR7_REGS_BASE + 0x0e00) | ||
40 | #define AR7_REGS_USB (AR7_REGS_BASE + 0x1200) | ||
41 | #define AR7_REGS_RESET (AR7_REGS_BASE + 0x1600) | ||
42 | #define AR7_REGS_VLYNQ0 (AR7_REGS_BASE + 0x1800) | ||
43 | #define AR7_REGS_DCL (AR7_REGS_BASE + 0x1a00) | ||
44 | #define AR7_REGS_VLYNQ1 (AR7_REGS_BASE + 0x1c00) | ||
45 | #define AR7_REGS_MDIO (AR7_REGS_BASE + 0x1e00) | ||
46 | #define AR7_REGS_IRQ (AR7_REGS_BASE + 0x2400) | ||
47 | #define AR7_REGS_MAC1 (AR7_REGS_BASE + 0x2800) | ||
48 | |||
49 | #define AR7_REGS_WDT (AR7_REGS_BASE + 0x1f00) | ||
50 | #define UR8_REGS_WDT (AR7_REGS_BASE + 0x0b00) | ||
51 | #define UR8_REGS_UART1 (AR7_REGS_BASE + 0x0f00) | ||
52 | |||
53 | #define AR7_RESET_PEREPHERIAL 0x0 | ||
54 | #define AR7_RESET_SOFTWARE 0x4 | ||
55 | #define AR7_RESET_STATUS 0x8 | ||
56 | |||
57 | #define AR7_RESET_BIT_CPMAC_LO 17 | ||
58 | #define AR7_RESET_BIT_CPMAC_HI 21 | ||
59 | #define AR7_RESET_BIT_MDIO 22 | ||
60 | #define AR7_RESET_BIT_EPHY 26 | ||
61 | |||
62 | /* GPIO control registers */ | ||
63 | #define AR7_GPIO_INPUT 0x0 | ||
64 | #define AR7_GPIO_OUTPUT 0x4 | ||
65 | #define AR7_GPIO_DIR 0x8 | ||
66 | #define AR7_GPIO_ENABLE 0xc | ||
67 | |||
68 | #define AR7_CHIP_7100 0x18 | ||
69 | #define AR7_CHIP_7200 0x2b | ||
70 | #define AR7_CHIP_7300 0x05 | ||
71 | |||
72 | /* Interrupts */ | ||
73 | #define AR7_IRQ_UART0 15 | ||
74 | #define AR7_IRQ_UART1 16 | ||
75 | |||
76 | /* Clocks */ | ||
77 | #define AR7_AFE_CLOCK 35328000 | ||
78 | #define AR7_REF_CLOCK 25000000 | ||
79 | #define AR7_XTAL_CLOCK 24000000 | ||
80 | |||
81 | struct plat_cpmac_data { | ||
82 | int reset_bit; | ||
83 | int power_bit; | ||
84 | u32 phy_mask; | ||
85 | char dev_addr[6]; | ||
86 | }; | ||
87 | |||
88 | struct plat_dsl_data { | ||
89 | int reset_bit_dsl; | ||
90 | int reset_bit_sar; | ||
91 | }; | ||
92 | |||
93 | extern int ar7_cpu_clock, ar7_bus_clock, ar7_dsp_clock; | ||
94 | |||
95 | static inline u16 ar7_chip_id(void) | ||
96 | { | ||
97 | return readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) & 0xffff; | ||
98 | } | ||
99 | |||
100 | static inline u8 ar7_chip_rev(void) | ||
101 | { | ||
102 | return (readl((void *)KSEG1ADDR(AR7_REGS_GPIO + 0x14)) >> 16) & 0xff; | ||
103 | } | ||
104 | |||
105 | static inline int ar7_cpu_freq(void) | ||
106 | { | ||
107 | return ar7_cpu_clock; | ||
108 | } | ||
109 | |||
110 | static inline int ar7_bus_freq(void) | ||
111 | { | ||
112 | return ar7_bus_clock; | ||
113 | } | ||
114 | |||
115 | static inline int ar7_vbus_freq(void) | ||
116 | { | ||
117 | return ar7_bus_clock / 2; | ||
118 | } | ||
119 | #define ar7_cpmac_freq ar7_vbus_freq | ||
120 | |||
121 | static inline int ar7_dsp_freq(void) | ||
122 | { | ||
123 | return ar7_dsp_clock; | ||
124 | } | ||
125 | |||
126 | static inline int ar7_has_high_cpmac(void) | ||
127 | { | ||
128 | u16 chip_id = ar7_chip_id(); | ||
129 | switch (chip_id) { | ||
130 | case AR7_CHIP_7100: | ||
131 | case AR7_CHIP_7200: | ||
132 | return 0; | ||
133 | case AR7_CHIP_7300: | ||
134 | return 1; | ||
135 | default: | ||
136 | return -ENXIO; | ||
137 | } | ||
138 | } | ||
139 | #define ar7_has_high_vlynq ar7_has_high_cpmac | ||
140 | #define ar7_has_second_uart ar7_has_high_cpmac | ||
141 | |||
142 | static inline void ar7_device_enable(u32 bit) | ||
143 | { | ||
144 | void *reset_reg = | ||
145 | (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); | ||
146 | writel(readl(reset_reg) | (1 << bit), reset_reg); | ||
147 | msleep(20); | ||
148 | } | ||
149 | |||
150 | static inline void ar7_device_disable(u32 bit) | ||
151 | { | ||
152 | void *reset_reg = | ||
153 | (void *)KSEG1ADDR(AR7_REGS_RESET + AR7_RESET_PEREPHERIAL); | ||
154 | writel(readl(reset_reg) & ~(1 << bit), reset_reg); | ||
155 | msleep(20); | ||
156 | } | ||
157 | |||
158 | static inline void ar7_device_reset(u32 bit) | ||
159 | { | ||
160 | ar7_device_disable(bit); | ||
161 | ar7_device_enable(bit); | ||
162 | } | ||
163 | |||
164 | static inline void ar7_device_on(u32 bit) | ||
165 | { | ||
166 | void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); | ||
167 | writel(readl(power_reg) | (1 << bit), power_reg); | ||
168 | msleep(20); | ||
169 | } | ||
170 | |||
171 | static inline void ar7_device_off(u32 bit) | ||
172 | { | ||
173 | void *power_reg = (void *)KSEG1ADDR(AR7_REGS_POWER); | ||
174 | writel(readl(power_reg) & ~(1 << bit), power_reg); | ||
175 | msleep(20); | ||
176 | } | ||
177 | |||
178 | #endif /* __AR7_H__ */ | ||
diff --git a/arch/mips/include/asm/mach-ar7/gpio.h b/arch/mips/include/asm/mach-ar7/gpio.h new file mode 100644 index 000000000000..cbe9c4f126df --- /dev/null +++ b/arch/mips/include/asm/mach-ar7/gpio.h | |||
@@ -0,0 +1,110 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Florian Fainelli <florian@openwrt.org> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | |||
19 | #ifndef __AR7_GPIO_H__ | ||
20 | #define __AR7_GPIO_H__ | ||
21 | |||
22 | #include <asm/mach-ar7/ar7.h> | ||
23 | |||
24 | #define AR7_GPIO_MAX 32 | ||
25 | |||
26 | extern int gpio_request(unsigned gpio, const char *label); | ||
27 | extern void gpio_free(unsigned gpio); | ||
28 | |||
29 | /* Common GPIO layer */ | ||
30 | static inline int gpio_get_value(unsigned gpio) | ||
31 | { | ||
32 | void __iomem *gpio_in = | ||
33 | (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_INPUT); | ||
34 | |||
35 | return readl(gpio_in) & (1 << gpio); | ||
36 | } | ||
37 | |||
38 | static inline void gpio_set_value(unsigned gpio, int value) | ||
39 | { | ||
40 | void __iomem *gpio_out = | ||
41 | (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_OUTPUT); | ||
42 | unsigned tmp; | ||
43 | |||
44 | tmp = readl(gpio_out) & ~(1 << gpio); | ||
45 | if (value) | ||
46 | tmp |= 1 << gpio; | ||
47 | writel(tmp, gpio_out); | ||
48 | } | ||
49 | |||
50 | static inline int gpio_direction_input(unsigned gpio) | ||
51 | { | ||
52 | void __iomem *gpio_dir = | ||
53 | (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); | ||
54 | |||
55 | if (gpio >= AR7_GPIO_MAX) | ||
56 | return -EINVAL; | ||
57 | |||
58 | writel(readl(gpio_dir) | (1 << gpio), gpio_dir); | ||
59 | |||
60 | return 0; | ||
61 | } | ||
62 | |||
63 | static inline int gpio_direction_output(unsigned gpio, int value) | ||
64 | { | ||
65 | void __iomem *gpio_dir = | ||
66 | (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_DIR); | ||
67 | |||
68 | if (gpio >= AR7_GPIO_MAX) | ||
69 | return -EINVAL; | ||
70 | |||
71 | gpio_set_value(gpio, value); | ||
72 | writel(readl(gpio_dir) & ~(1 << gpio), gpio_dir); | ||
73 | |||
74 | return 0; | ||
75 | } | ||
76 | |||
77 | static inline int gpio_to_irq(unsigned gpio) | ||
78 | { | ||
79 | return -EINVAL; | ||
80 | } | ||
81 | |||
82 | static inline int irq_to_gpio(unsigned irq) | ||
83 | { | ||
84 | return -EINVAL; | ||
85 | } | ||
86 | |||
87 | /* Board specific GPIO functions */ | ||
88 | static inline int ar7_gpio_enable(unsigned gpio) | ||
89 | { | ||
90 | void __iomem *gpio_en = | ||
91 | (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); | ||
92 | |||
93 | writel(readl(gpio_en) | (1 << gpio), gpio_en); | ||
94 | |||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | static inline int ar7_gpio_disable(unsigned gpio) | ||
99 | { | ||
100 | void __iomem *gpio_en = | ||
101 | (void __iomem *)KSEG1ADDR(AR7_REGS_GPIO + AR7_GPIO_ENABLE); | ||
102 | |||
103 | writel(readl(gpio_en) & ~(1 << gpio), gpio_en); | ||
104 | |||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | #include <asm-generic/gpio.h> | ||
109 | |||
110 | #endif | ||
diff --git a/arch/mips/include/asm/mach-ar7/irq.h b/arch/mips/include/asm/mach-ar7/irq.h new file mode 100644 index 000000000000..39e9757e3d93 --- /dev/null +++ b/arch/mips/include/asm/mach-ar7/irq.h | |||
@@ -0,0 +1,16 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Shamelessly copied from asm-mips/mach-emma2rh/ | ||
7 | * Copyright (C) 2003 by Ralf Baechle | ||
8 | */ | ||
9 | #ifndef __ASM_AR7_IRQ_H | ||
10 | #define __ASM_AR7_IRQ_H | ||
11 | |||
12 | #define NR_IRQS 256 | ||
13 | |||
14 | #include_next <irq.h> | ||
15 | |||
16 | #endif /* __ASM_AR7_IRQ_H */ | ||
diff --git a/arch/mips/include/asm/mach-ar7/prom.h b/arch/mips/include/asm/mach-ar7/prom.h new file mode 100644 index 000000000000..088f61fe85ea --- /dev/null +++ b/arch/mips/include/asm/mach-ar7/prom.h | |||
@@ -0,0 +1,25 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006, 2007 Florian Fainelli <florian@openwrt.org> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | |||
19 | #ifndef __PROM_H__ | ||
20 | #define __PROM_H__ | ||
21 | |||
22 | extern char *prom_getenv(const char *name); | ||
23 | extern void prom_meminit(void); | ||
24 | |||
25 | #endif /* __PROM_H__ */ | ||
diff --git a/arch/mips/include/asm/mach-ar7/spaces.h b/arch/mips/include/asm/mach-ar7/spaces.h new file mode 100644 index 000000000000..ac28f273449c --- /dev/null +++ b/arch/mips/include/asm/mach-ar7/spaces.h | |||
@@ -0,0 +1,22 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1994 - 1999, 2000, 03, 04 Ralf Baechle | ||
7 | * Copyright (C) 2000, 2002 Maciej W. Rozycki | ||
8 | * Copyright (C) 1990, 1999, 2000 Silicon Graphics, Inc. | ||
9 | */ | ||
10 | #ifndef _ASM_AR7_SPACES_H | ||
11 | #define _ASM_AR7_SPACES_H | ||
12 | |||
13 | /* | ||
14 | * This handles the memory map. | ||
15 | * We handle pages at KSEG0 for kernels with 32 bit address space. | ||
16 | */ | ||
17 | #define PAGE_OFFSET 0x94000000UL | ||
18 | #define PHYS_OFFSET 0x14000000UL | ||
19 | |||
20 | #include <asm/mach-generic/spaces.h> | ||
21 | |||
22 | #endif /* __ASM_AR7_SPACES_H */ | ||
diff --git a/arch/mips/include/asm/mach-ar7/war.h b/arch/mips/include/asm/mach-ar7/war.h new file mode 100644 index 000000000000..f4862b563080 --- /dev/null +++ b/arch/mips/include/asm/mach-ar7/war.h | |||
@@ -0,0 +1,25 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> | ||
7 | */ | ||
8 | #ifndef __ASM_MIPS_MACH_AR7_WAR_H | ||
9 | #define __ASM_MIPS_MACH_AR7_WAR_H | ||
10 | |||
11 | #define R4600_V1_INDEX_ICACHEOP_WAR 0 | ||
12 | #define R4600_V1_HIT_CACHEOP_WAR 0 | ||
13 | #define R4600_V2_HIT_CACHEOP_WAR 0 | ||
14 | #define R5432_CP0_INTERRUPT_WAR 0 | ||
15 | #define BCM1250_M3_WAR 0 | ||
16 | #define SIBYTE_1956_WAR 0 | ||
17 | #define MIPS4K_ICACHE_REFILL_WAR 0 | ||
18 | #define MIPS_CACHE_SYNC_WAR 0 | ||
19 | #define TX49XX_ICACHE_INDEX_INV_WAR 0 | ||
20 | #define RM9000_CDEX_SMP_WAR 0 | ||
21 | #define ICACHE_REFILLS_WORKAROUND_WAR 0 | ||
22 | #define R10000_LLSC_WAR 0 | ||
23 | #define MIPS34K_MISSED_ITLB_WAR 0 | ||
24 | |||
25 | #endif /* __ASM_MIPS_MACH_AR7_WAR_H */ | ||
diff --git a/arch/mips/include/asm/mach-cobalt/irq.h b/arch/mips/include/asm/mach-cobalt/irq.h index 57c8c9ac5851..9da9acf5dcba 100644 --- a/arch/mips/include/asm/mach-cobalt/irq.h +++ b/arch/mips/include/asm/mach-cobalt/irq.h | |||
@@ -8,7 +8,7 @@ | |||
8 | * Copyright (C) 1997 Cobalt Microserver | 8 | * Copyright (C) 1997 Cobalt Microserver |
9 | * Copyright (C) 1997, 2003 Ralf Baechle | 9 | * Copyright (C) 1997, 2003 Ralf Baechle |
10 | * Copyright (C) 2001-2003 Liam Davies (ldavies@agile.tv) | 10 | * Copyright (C) 2001-2003 Liam Davies (ldavies@agile.tv) |
11 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 11 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
12 | */ | 12 | */ |
13 | #ifndef _ASM_COBALT_IRQ_H | 13 | #ifndef _ASM_COBALT_IRQ_H |
14 | #define _ASM_COBALT_IRQ_H | 14 | #define _ASM_COBALT_IRQ_H |
diff --git a/arch/mips/include/asm/mach-cobalt/mach-gt64120.h b/arch/mips/include/asm/mach-cobalt/mach-gt64120.h index ae9c5523c7ef..f8afec3f2943 100644 --- a/arch/mips/include/asm/mach-cobalt/mach-gt64120.h +++ b/arch/mips/include/asm/mach-cobalt/mach-gt64120.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 2 | * Copyright (C) 2006 Yoichi Yuasa <yuasa@linux-mips.org> |
3 | * | 3 | * |
4 | * This program is free software; you can redistribute it and/or modify | 4 | * This program is free software; you can redistribute it and/or modify |
5 | * it under the terms of the GNU General Public License as published by | 5 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cavium-octeon/pci-common.h b/arch/mips/include/asm/octeon/pci-octeon.h index 74ae79991e45..6ac5d3e3398e 100644 --- a/arch/mips/cavium-octeon/pci-common.h +++ b/arch/mips/include/asm/octeon/pci-octeon.h | |||
@@ -3,23 +3,29 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2005-2007 Cavium Networks | 6 | * Copyright (C) 2005-2009 Cavium Networks |
7 | */ | 7 | */ |
8 | #ifndef __OCTEON_PCI_COMMON_H__ | 8 | |
9 | #define __OCTEON_PCI_COMMON_H__ | 9 | #ifndef __PCI_OCTEON_H__ |
10 | #define __PCI_OCTEON_H__ | ||
10 | 11 | ||
11 | #include <linux/pci.h> | 12 | #include <linux/pci.h> |
12 | 13 | ||
13 | /* Some PCI cards require delays when accessing config space. */ | 14 | /* Some PCI cards require delays when accessing config space. */ |
14 | #define PCI_CONFIG_SPACE_DELAY 10000 | 15 | #define PCI_CONFIG_SPACE_DELAY 10000 |
15 | 16 | ||
16 | /* pcibios_map_irq() is defined inside pci-common.c. All it does is call the | 17 | /* |
17 | Octeon specific version pointed to by this variable. This function needs to | 18 | * pcibios_map_irq() is defined inside pci-octeon.c. All it does is |
18 | change for PCI or PCIe based hosts */ | 19 | * call the Octeon specific version pointed to by this variable. This |
19 | extern typeof(pcibios_map_irq) *octeon_pcibios_map_irq; | 20 | * function needs to change for PCI or PCIe based hosts. |
21 | */ | ||
22 | extern int (*octeon_pcibios_map_irq)(const struct pci_dev *dev, | ||
23 | u8 slot, u8 pin); | ||
20 | 24 | ||
21 | /* The following defines are only used when octeon_dma_bar_type = | 25 | /* |
22 | OCTEON_DMA_BAR_TYPE_BIG */ | 26 | * The following defines are used when octeon_dma_bar_type = |
27 | * OCTEON_DMA_BAR_TYPE_BIG | ||
28 | */ | ||
23 | #define OCTEON_PCI_BAR1_HOLE_BITS 5 | 29 | #define OCTEON_PCI_BAR1_HOLE_BITS 5 |
24 | #define OCTEON_PCI_BAR1_HOLE_SIZE (1ul<<(OCTEON_PCI_BAR1_HOLE_BITS+3)) | 30 | #define OCTEON_PCI_BAR1_HOLE_SIZE (1ul<<(OCTEON_PCI_BAR1_HOLE_BITS+3)) |
25 | 31 | ||
@@ -30,9 +36,9 @@ enum octeon_dma_bar_type { | |||
30 | OCTEON_DMA_BAR_TYPE_PCIE | 36 | OCTEON_DMA_BAR_TYPE_PCIE |
31 | }; | 37 | }; |
32 | 38 | ||
33 | /** | 39 | /* |
34 | * This is a variable to tell the DMA mapping system in dma-octeon.c | 40 | * This tells the DMA mapping system in dma-octeon.c how to map PCI |
35 | * how to map PCI DMA addresses. | 41 | * DMA addresses. |
36 | */ | 42 | */ |
37 | extern enum octeon_dma_bar_type octeon_dma_bar_type; | 43 | extern enum octeon_dma_bar_type octeon_dma_bar_type; |
38 | 44 | ||
diff --git a/arch/mips/include/asm/page.h b/arch/mips/include/asm/page.h index dc0eaa731281..96a14a426a7c 100644 --- a/arch/mips/include/asm/page.h +++ b/arch/mips/include/asm/page.h | |||
@@ -165,7 +165,14 @@ typedef struct { unsigned long pgprot; } pgprot_t; | |||
165 | 165 | ||
166 | #ifdef CONFIG_FLATMEM | 166 | #ifdef CONFIG_FLATMEM |
167 | 167 | ||
168 | #define pfn_valid(pfn) ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr) | 168 | #define pfn_valid(pfn) \ |
169 | ({ \ | ||
170 | unsigned long __pfn = (pfn); \ | ||
171 | /* avoid <linux/bootmem.h> include hell */ \ | ||
172 | extern unsigned long min_low_pfn; \ | ||
173 | \ | ||
174 | __pfn >= min_low_pfn && __pfn < max_mapnr; \ | ||
175 | }) | ||
169 | 176 | ||
170 | #elif defined(CONFIG_SPARSEMEM) | 177 | #elif defined(CONFIG_SPARSEMEM) |
171 | 178 | ||
diff --git a/arch/mips/include/asm/reg.h b/arch/mips/include/asm/reg.h index 634b55d7e7f6..910e71a12466 100644 --- a/arch/mips/include/asm/reg.h +++ b/arch/mips/include/asm/reg.h | |||
@@ -69,7 +69,7 @@ | |||
69 | 69 | ||
70 | #endif | 70 | #endif |
71 | 71 | ||
72 | #ifdef CONFIG_64BIT | 72 | #if defined(CONFIG_64BIT) && !defined(WANT_COMPAT_REG_H) |
73 | 73 | ||
74 | #define EF_R0 0 | 74 | #define EF_R0 0 |
75 | #define EF_R1 1 | 75 | #define EF_R1 1 |
diff --git a/arch/mips/include/asm/swab.h b/arch/mips/include/asm/swab.h index 99993c0d6c12..97c2f81b4b43 100644 --- a/arch/mips/include/asm/swab.h +++ b/arch/mips/include/asm/swab.h | |||
@@ -38,7 +38,11 @@ static inline __attribute_const__ __u32 __arch_swab32(__u32 x) | |||
38 | } | 38 | } |
39 | #define __arch_swab32 __arch_swab32 | 39 | #define __arch_swab32 __arch_swab32 |
40 | 40 | ||
41 | #ifdef CONFIG_CPU_MIPS64_R2 | 41 | /* |
42 | * Having already checked for CONFIG_CPU_MIPSR2, enable the | ||
43 | * optimized version for 64-bit kernel on r2 CPUs. | ||
44 | */ | ||
45 | #ifdef CONFIG_64BIT | ||
42 | static inline __attribute_const__ __u64 __arch_swab64(__u64 x) | 46 | static inline __attribute_const__ __u64 __arch_swab64(__u64 x) |
43 | { | 47 | { |
44 | __asm__( | 48 | __asm__( |
@@ -50,6 +54,6 @@ static inline __attribute_const__ __u64 __arch_swab64(__u64 x) | |||
50 | return x; | 54 | return x; |
51 | } | 55 | } |
52 | #define __arch_swab64 __arch_swab64 | 56 | #define __arch_swab64 __arch_swab64 |
53 | #endif /* CONFIG_CPU_MIPS64_R2 */ | 57 | #endif /* CONFIG_64BIT */ |
54 | #endif /* CONFIG_CPU_MIPSR2 */ | 58 | #endif /* CONFIG_CPU_MIPSR2 */ |
55 | #endif /* _ASM_SWAB_H */ | 59 | #endif /* _ASM_SWAB_H */ |
diff --git a/arch/mips/include/asm/unistd.h b/arch/mips/include/asm/unistd.h index 40005010827c..b70c49fdda26 100644 --- a/arch/mips/include/asm/unistd.h +++ b/arch/mips/include/asm/unistd.h | |||
@@ -352,16 +352,18 @@ | |||
352 | #define __NR_inotify_init1 (__NR_Linux + 329) | 352 | #define __NR_inotify_init1 (__NR_Linux + 329) |
353 | #define __NR_preadv (__NR_Linux + 330) | 353 | #define __NR_preadv (__NR_Linux + 330) |
354 | #define __NR_pwritev (__NR_Linux + 331) | 354 | #define __NR_pwritev (__NR_Linux + 331) |
355 | #define __NR_rt_tgsigqueueinfo (__NR_Linux + 332) | ||
356 | #define __NR_perf_counter_open (__NR_Linux + 333) | ||
355 | 357 | ||
356 | /* | 358 | /* |
357 | * Offset of the last Linux o32 flavoured syscall | 359 | * Offset of the last Linux o32 flavoured syscall |
358 | */ | 360 | */ |
359 | #define __NR_Linux_syscalls 331 | 361 | #define __NR_Linux_syscalls 333 |
360 | 362 | ||
361 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ | 363 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI32 */ |
362 | 364 | ||
363 | #define __NR_O32_Linux 4000 | 365 | #define __NR_O32_Linux 4000 |
364 | #define __NR_O32_Linux_syscalls 331 | 366 | #define __NR_O32_Linux_syscalls 333 |
365 | 367 | ||
366 | #if _MIPS_SIM == _MIPS_SIM_ABI64 | 368 | #if _MIPS_SIM == _MIPS_SIM_ABI64 |
367 | 369 | ||
@@ -660,16 +662,18 @@ | |||
660 | #define __NR_inotify_init1 (__NR_Linux + 288) | 662 | #define __NR_inotify_init1 (__NR_Linux + 288) |
661 | #define __NR_preadv (__NR_Linux + 289) | 663 | #define __NR_preadv (__NR_Linux + 289) |
662 | #define __NR_pwritev (__NR_Linux + 290) | 664 | #define __NR_pwritev (__NR_Linux + 290) |
665 | #define __NR_rt_tgsigqueueinfo (__NR_Linux + 291) | ||
666 | #define __NR_perf_counter_open (__NR_Linux + 292) | ||
663 | 667 | ||
664 | /* | 668 | /* |
665 | * Offset of the last Linux 64-bit flavoured syscall | 669 | * Offset of the last Linux 64-bit flavoured syscall |
666 | */ | 670 | */ |
667 | #define __NR_Linux_syscalls 290 | 671 | #define __NR_Linux_syscalls 292 |
668 | 672 | ||
669 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ | 673 | #endif /* _MIPS_SIM == _MIPS_SIM_ABI64 */ |
670 | 674 | ||
671 | #define __NR_64_Linux 5000 | 675 | #define __NR_64_Linux 5000 |
672 | #define __NR_64_Linux_syscalls 290 | 676 | #define __NR_64_Linux_syscalls 292 |
673 | 677 | ||
674 | #if _MIPS_SIM == _MIPS_SIM_NABI32 | 678 | #if _MIPS_SIM == _MIPS_SIM_NABI32 |
675 | 679 | ||
@@ -972,16 +976,18 @@ | |||
972 | #define __NR_inotify_init1 (__NR_Linux + 292) | 976 | #define __NR_inotify_init1 (__NR_Linux + 292) |
973 | #define __NR_preadv (__NR_Linux + 293) | 977 | #define __NR_preadv (__NR_Linux + 293) |
974 | #define __NR_pwritev (__NR_Linux + 294) | 978 | #define __NR_pwritev (__NR_Linux + 294) |
979 | #define __NR_rt_tgsigqueueinfo (__NR_Linux + 295) | ||
980 | #define __NR_perf_counter_open (__NR_Linux + 296) | ||
975 | 981 | ||
976 | /* | 982 | /* |
977 | * Offset of the last N32 flavoured syscall | 983 | * Offset of the last N32 flavoured syscall |
978 | */ | 984 | */ |
979 | #define __NR_Linux_syscalls 294 | 985 | #define __NR_Linux_syscalls 296 |
980 | 986 | ||
981 | #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ | 987 | #endif /* _MIPS_SIM == _MIPS_SIM_NABI32 */ |
982 | 988 | ||
983 | #define __NR_N32_Linux 6000 | 989 | #define __NR_N32_Linux 6000 |
984 | #define __NR_N32_Linux_syscalls 294 | 990 | #define __NR_N32_Linux_syscalls 296 |
985 | 991 | ||
986 | #ifdef __KERNEL__ | 992 | #ifdef __KERNEL__ |
987 | 993 | ||
diff --git a/arch/mips/include/asm/vr41xx/capcella.h b/arch/mips/include/asm/vr41xx/capcella.h index e0ee05a3dfcc..fcc6569414fa 100644 --- a/arch/mips/include/asm/vr41xx/capcella.h +++ b/arch/mips/include/asm/vr41xx/capcella.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * capcella.h, Include file for ZAO Networks Capcella. | 2 | * capcella.h, Include file for ZAO Networks Capcella. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/vr41xx/giu.h b/arch/mips/include/asm/vr41xx/giu.h index 0bcdd3a5c256..6a90bc1d916b 100644 --- a/arch/mips/include/asm/vr41xx/giu.h +++ b/arch/mips/include/asm/vr41xx/giu.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Include file for NEC VR4100 series General-purpose I/O Unit. | 2 | * Include file for NEC VR4100 series General-purpose I/O Unit. |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2005-2009 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -41,7 +41,8 @@ typedef enum { | |||
41 | IRQ_SIGNAL_HOLD, | 41 | IRQ_SIGNAL_HOLD, |
42 | } irq_signal_t; | 42 | } irq_signal_t; |
43 | 43 | ||
44 | extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal); | 44 | extern void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, |
45 | irq_signal_t signal); | ||
45 | 46 | ||
46 | typedef enum { | 47 | typedef enum { |
47 | IRQ_LEVEL_LOW, | 48 | IRQ_LEVEL_LOW, |
@@ -51,23 +52,6 @@ typedef enum { | |||
51 | extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level); | 52 | extern void vr41xx_set_irq_level(unsigned int pin, irq_level_t level); |
52 | 53 | ||
53 | typedef enum { | 54 | typedef enum { |
54 | GPIO_DATA_LOW, | ||
55 | GPIO_DATA_HIGH, | ||
56 | GPIO_DATA_INVAL, | ||
57 | } gpio_data_t; | ||
58 | |||
59 | extern gpio_data_t vr41xx_gpio_get_pin(unsigned int pin); | ||
60 | extern int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data); | ||
61 | |||
62 | typedef enum { | ||
63 | GPIO_INPUT, | ||
64 | GPIO_OUTPUT, | ||
65 | GPIO_OUTPUT_DISABLE, | ||
66 | } gpio_direction_t; | ||
67 | |||
68 | extern int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir); | ||
69 | |||
70 | typedef enum { | ||
71 | GPIO_PULL_DOWN, | 55 | GPIO_PULL_DOWN, |
72 | GPIO_PULL_UP, | 56 | GPIO_PULL_UP, |
73 | GPIO_PULL_DISABLE, | 57 | GPIO_PULL_DISABLE, |
diff --git a/arch/mips/include/asm/vr41xx/irq.h b/arch/mips/include/asm/vr41xx/irq.h index d315dfbc08f2..b07f7321751d 100644 --- a/arch/mips/include/asm/vr41xx/irq.h +++ b/arch/mips/include/asm/vr41xx/irq.h | |||
@@ -7,7 +7,7 @@ | |||
7 | * Copyright (C) 2001, 2002 Paul Mundt | 7 | * Copyright (C) 2001, 2002 Paul Mundt |
8 | * Copyright (C) 2002 MontaVista Software, Inc. | 8 | * Copyright (C) 2002 MontaVista Software, Inc. |
9 | * Copyright (C) 2002 TimeSys Corp. | 9 | * Copyright (C) 2002 TimeSys Corp. |
10 | * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 10 | * Copyright (C) 2003-2006 Yoichi Yuasa <yuasa@linux-mips.org> |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or modify it | 12 | * This program is free software; you can redistribute it and/or modify it |
13 | * under the terms of the GNU General Public License as published by the | 13 | * under the terms of the GNU General Public License as published by the |
diff --git a/arch/mips/include/asm/vr41xx/mpc30x.h b/arch/mips/include/asm/vr41xx/mpc30x.h index 1d67df843dc3..130d09d8c8cb 100644 --- a/arch/mips/include/asm/vr41xx/mpc30x.h +++ b/arch/mips/include/asm/vr41xx/mpc30x.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * mpc30x.h, Include file for Victor MP-C303/304. | 2 | * mpc30x.h, Include file for Victor MP-C303/304. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/vr41xx/pci.h b/arch/mips/include/asm/vr41xx/pci.h index 6fc01ce19777..c231a3d6cfd8 100644 --- a/arch/mips/include/asm/vr41xx/pci.h +++ b/arch/mips/include/asm/vr41xx/pci.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Include file for NEC VR4100 series PCI Control Unit. | 2 | * Include file for NEC VR4100 series PCI Control Unit. |
3 | * | 3 | * |
4 | * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/vr41xx/siu.h b/arch/mips/include/asm/vr41xx/siu.h index da9f6e373409..ca806bc4ddc8 100644 --- a/arch/mips/include/asm/vr41xx/siu.h +++ b/arch/mips/include/asm/vr41xx/siu.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Include file for NEC VR4100 series Serial Interface Unit. | 2 | * Include file for NEC VR4100 series Serial Interface Unit. |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2005-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/vr41xx/tb0219.h b/arch/mips/include/asm/vr41xx/tb0219.h index dc981b4be0a4..c78e8243b447 100644 --- a/arch/mips/include/asm/vr41xx/tb0219.h +++ b/arch/mips/include/asm/vr41xx/tb0219.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * tb0219.h, Include file for TANBAC TB0219. | 2 | * tb0219.h, Include file for TANBAC TB0219. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * Modified for TANBAC TB0219: | 6 | * Modified for TANBAC TB0219: |
7 | * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> | 7 | * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> |
diff --git a/arch/mips/include/asm/vr41xx/tb0226.h b/arch/mips/include/asm/vr41xx/tb0226.h index de527dcfa5f3..36f5f798e416 100644 --- a/arch/mips/include/asm/vr41xx/tb0226.h +++ b/arch/mips/include/asm/vr41xx/tb0226.h | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * tb0226.h, Include file for TANBAC TB0226. | 2 | * tb0226.h, Include file for TANBAC TB0226. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2004 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/include/asm/vr41xx/vr41xx.h b/arch/mips/include/asm/vr41xx/vr41xx.h index 22be64971cc6..7b96a43b72ba 100644 --- a/arch/mips/include/asm/vr41xx/vr41xx.h +++ b/arch/mips/include/asm/vr41xx/vr41xx.h | |||
@@ -7,7 +7,7 @@ | |||
7 | * Copyright (C) 2001, 2002 Paul Mundt | 7 | * Copyright (C) 2001, 2002 Paul Mundt |
8 | * Copyright (C) 2002 MontaVista Software, Inc. | 8 | * Copyright (C) 2002 MontaVista Software, Inc. |
9 | * Copyright (C) 2002 TimeSys Corp. | 9 | * Copyright (C) 2002 TimeSys Corp. |
10 | * Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 10 | * Copyright (C) 2003-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
11 | * | 11 | * |
12 | * This program is free software; you can redistribute it and/or modify it | 12 | * This program is free software; you can redistribute it and/or modify it |
13 | * under the terms of the GNU General Public License as published by the | 13 | * under the terms of the GNU General Public License as published by the |
diff --git a/arch/mips/kernel/binfmt_elfo32.c b/arch/mips/kernel/binfmt_elfo32.c index e1333d7319e2..ff448233dab5 100644 --- a/arch/mips/kernel/binfmt_elfo32.c +++ b/arch/mips/kernel/binfmt_elfo32.c | |||
@@ -53,6 +53,23 @@ typedef elf_fpreg_t elf_fpregset_t[ELF_NFPREG]; | |||
53 | #define ELF_ET_DYN_BASE (TASK32_SIZE / 3 * 2) | 53 | #define ELF_ET_DYN_BASE (TASK32_SIZE / 3 * 2) |
54 | 54 | ||
55 | #include <asm/processor.h> | 55 | #include <asm/processor.h> |
56 | |||
57 | /* | ||
58 | * When this file is selected, we are definitely running a 64bit kernel. | ||
59 | * So using the right regs define in asm/reg.h | ||
60 | */ | ||
61 | #define WANT_COMPAT_REG_H | ||
62 | |||
63 | /* These MUST be defined before elf.h gets included */ | ||
64 | extern void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs); | ||
65 | #define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs); | ||
66 | #define ELF_CORE_COPY_TASK_REGS(_tsk, _dest) \ | ||
67 | ({ \ | ||
68 | int __res = 1; \ | ||
69 | elf32_core_copy_regs(*(_dest), task_pt_regs(_tsk)); \ | ||
70 | __res; \ | ||
71 | }) | ||
72 | |||
56 | #include <linux/module.h> | 73 | #include <linux/module.h> |
57 | #include <linux/elfcore.h> | 74 | #include <linux/elfcore.h> |
58 | #include <linux/compat.h> | 75 | #include <linux/compat.h> |
@@ -110,9 +127,6 @@ jiffies_to_compat_timeval(unsigned long jiffies, struct compat_timeval *value) | |||
110 | value->tv_usec = rem / NSEC_PER_USEC; | 127 | value->tv_usec = rem / NSEC_PER_USEC; |
111 | } | 128 | } |
112 | 129 | ||
113 | #undef ELF_CORE_COPY_REGS | ||
114 | #define ELF_CORE_COPY_REGS(_dest, _regs) elf32_core_copy_regs(_dest, _regs); | ||
115 | |||
116 | void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs) | 130 | void elf32_core_copy_regs(elf_gregset_t grp, struct pt_regs *regs) |
117 | { | 131 | { |
118 | int i; | 132 | int i; |
diff --git a/arch/mips/kernel/cevt-ds1287.c b/arch/mips/kernel/cevt-ds1287.c index 1ada45ea0700..6996da4d74a2 100644 --- a/arch/mips/kernel/cevt-ds1287.c +++ b/arch/mips/kernel/cevt-ds1287.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * DS1287 clockevent driver | 2 | * DS1287 clockevent driver |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/kernel/cevt-gt641xx.c b/arch/mips/kernel/cevt-gt641xx.c index e9b787feedcb..92351e00ae0e 100644 --- a/arch/mips/kernel/cevt-gt641xx.c +++ b/arch/mips/kernel/cevt-gt641xx.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GT641xx clockevent routines. | 2 | * GT641xx clockevent routines. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/kernel/csrc-ioasic.c b/arch/mips/kernel/csrc-ioasic.c index b551f48d3a07..23da108506b0 100644 --- a/arch/mips/kernel/csrc-ioasic.c +++ b/arch/mips/kernel/csrc-ioasic.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * DEC I/O ASIC's counter clocksource | 2 | * DEC I/O ASIC's counter clocksource |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/kernel/irq-gic.c b/arch/mips/kernel/irq-gic.c index 39000f103f2c..d2072cd38592 100644 --- a/arch/mips/kernel/irq-gic.c +++ b/arch/mips/kernel/irq-gic.c | |||
@@ -107,9 +107,7 @@ static unsigned int gic_irq_startup(unsigned int irq) | |||
107 | { | 107 | { |
108 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | 108 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
109 | irq -= _irqbase; | 109 | irq -= _irqbase; |
110 | /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */ | 110 | GIC_SET_INTR_MASK(irq, 1); |
111 | GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))), | ||
112 | 1 << (irq % 32)); | ||
113 | return 0; | 111 | return 0; |
114 | } | 112 | } |
115 | 113 | ||
@@ -120,8 +118,7 @@ static void gic_irq_ack(unsigned int irq) | |||
120 | #endif | 118 | #endif |
121 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | 119 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
122 | irq -= _irqbase; | 120 | irq -= _irqbase; |
123 | GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))), | 121 | GIC_CLR_INTR_MASK(irq, 1); |
124 | 1 << (irq % 32)); | ||
125 | 122 | ||
126 | if (_intrmap[irq].trigtype == GIC_TRIG_EDGE) { | 123 | if (_intrmap[irq].trigtype == GIC_TRIG_EDGE) { |
127 | if (!gic_wedgeb2bok) | 124 | if (!gic_wedgeb2bok) |
@@ -138,18 +135,14 @@ static void gic_mask_irq(unsigned int irq) | |||
138 | { | 135 | { |
139 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | 136 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
140 | irq -= _irqbase; | 137 | irq -= _irqbase; |
141 | /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */ | 138 | GIC_CLR_INTR_MASK(irq, 1); |
142 | GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_RMASK_31_0_OFS + (irq / 32))), | ||
143 | 1 << (irq % 32)); | ||
144 | } | 139 | } |
145 | 140 | ||
146 | static void gic_unmask_irq(unsigned int irq) | 141 | static void gic_unmask_irq(unsigned int irq) |
147 | { | 142 | { |
148 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); | 143 | pr_debug("CPU%d: %s: irq%d\n", smp_processor_id(), __func__, irq); |
149 | irq -= _irqbase; | 144 | irq -= _irqbase; |
150 | /* FIXME: this is wrong for !GICISWORDLITTLEENDIAN */ | 145 | GIC_SET_INTR_MASK(irq, 1); |
151 | GICWRITE(GIC_REG_ADDR(SHARED, (GIC_SH_SMASK_31_0_OFS + (irq / 32))), | ||
152 | 1 << (irq % 32)); | ||
153 | } | 146 | } |
154 | 147 | ||
155 | #ifdef CONFIG_SMP | 148 | #ifdef CONFIG_SMP |
@@ -254,6 +247,10 @@ static void __init gic_basic_init(void) | |||
254 | if (cpu == X) | 247 | if (cpu == X) |
255 | continue; | 248 | continue; |
256 | 249 | ||
250 | if (cpu == 0 && i != 0 && _intrmap[i].intrnum == 0 && | ||
251 | _intrmap[i].ipiflag == 0) | ||
252 | continue; | ||
253 | |||
257 | setup_intr(_intrmap[i].intrnum, | 254 | setup_intr(_intrmap[i].intrnum, |
258 | _intrmap[i].cpunum, | 255 | _intrmap[i].cpunum, |
259 | _intrmap[i].pin, | 256 | _intrmap[i].pin, |
diff --git a/arch/mips/kernel/irq-gt641xx.c b/arch/mips/kernel/irq-gt641xx.c index 1b81b131f43c..ebcc5f7ad9c2 100644 --- a/arch/mips/kernel/irq-gt641xx.c +++ b/arch/mips/kernel/irq-gt641xx.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * GT641xx IRQ routines. | 2 | * GT641xx IRQ routines. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/kernel/scall32-o32.S b/arch/mips/kernel/scall32-o32.S index 0b31b9bda048..20a86e08fd58 100644 --- a/arch/mips/kernel/scall32-o32.S +++ b/arch/mips/kernel/scall32-o32.S | |||
@@ -652,6 +652,8 @@ einval: li v0, -ENOSYS | |||
652 | sys sys_inotify_init1 1 | 652 | sys sys_inotify_init1 1 |
653 | sys sys_preadv 6 /* 4330 */ | 653 | sys sys_preadv 6 /* 4330 */ |
654 | sys sys_pwritev 6 | 654 | sys sys_pwritev 6 |
655 | sys sys_rt_tgsigqueueinfo 4 | ||
656 | sys sys_perf_counter_open 5 | ||
655 | .endm | 657 | .endm |
656 | 658 | ||
657 | /* We pre-compute the number of _instruction_ bytes needed to | 659 | /* We pre-compute the number of _instruction_ bytes needed to |
diff --git a/arch/mips/kernel/scall64-64.S b/arch/mips/kernel/scall64-64.S index c647fd6e722f..b046130d4c5d 100644 --- a/arch/mips/kernel/scall64-64.S +++ b/arch/mips/kernel/scall64-64.S | |||
@@ -489,4 +489,6 @@ sys_call_table: | |||
489 | PTR sys_inotify_init1 | 489 | PTR sys_inotify_init1 |
490 | PTR sys_preadv | 490 | PTR sys_preadv |
491 | PTR sys_pwritev /* 5390 */ | 491 | PTR sys_pwritev /* 5390 */ |
492 | PTR sys_rt_tgsigqueueinfo | ||
493 | PTR sys_perf_counter_open | ||
492 | .size sys_call_table,.-sys_call_table | 494 | .size sys_call_table,.-sys_call_table |
diff --git a/arch/mips/kernel/scall64-n32.S b/arch/mips/kernel/scall64-n32.S index 93cc672f4522..15874f9812cc 100644 --- a/arch/mips/kernel/scall64-n32.S +++ b/arch/mips/kernel/scall64-n32.S | |||
@@ -415,4 +415,6 @@ EXPORT(sysn32_call_table) | |||
415 | PTR sys_inotify_init1 | 415 | PTR sys_inotify_init1 |
416 | PTR sys_preadv | 416 | PTR sys_preadv |
417 | PTR sys_pwritev | 417 | PTR sys_pwritev |
418 | PTR compat_sys_rt_tgsigqueueinfo /* 5295 */ | ||
419 | PTR sys_perf_counter_open | ||
418 | .size sysn32_call_table,.-sysn32_call_table | 420 | .size sysn32_call_table,.-sysn32_call_table |
diff --git a/arch/mips/kernel/scall64-o32.S b/arch/mips/kernel/scall64-o32.S index a5598b2339dd..781e0f1e9533 100644 --- a/arch/mips/kernel/scall64-o32.S +++ b/arch/mips/kernel/scall64-o32.S | |||
@@ -535,4 +535,6 @@ sys_call_table: | |||
535 | PTR sys_inotify_init1 | 535 | PTR sys_inotify_init1 |
536 | PTR compat_sys_preadv /* 4330 */ | 536 | PTR compat_sys_preadv /* 4330 */ |
537 | PTR compat_sys_pwritev | 537 | PTR compat_sys_pwritev |
538 | PTR compat_sys_rt_tgsigqueueinfo | ||
539 | PTR sys_perf_counter_open | ||
538 | .size sys_call_table,.-sys_call_table | 540 | .size sys_call_table,.-sys_call_table |
diff --git a/arch/mips/kernel/smp-cmp.c b/arch/mips/kernel/smp-cmp.c index 653be061b9ec..ad0ff5dc4d59 100644 --- a/arch/mips/kernel/smp-cmp.c +++ b/arch/mips/kernel/smp-cmp.c | |||
@@ -37,80 +37,24 @@ | |||
37 | #include <asm/mipsregs.h> | 37 | #include <asm/mipsregs.h> |
38 | #include <asm/mipsmtregs.h> | 38 | #include <asm/mipsmtregs.h> |
39 | #include <asm/mips_mt.h> | 39 | #include <asm/mips_mt.h> |
40 | 40 | #include <asm/amon.h> | |
41 | /* | 41 | #include <asm/gic.h> |
42 | * Crude manipulation of the CPU masks to control which | ||
43 | * which CPU's are brought online during initialisation | ||
44 | * | ||
45 | * Beware... this needs to be called after CPU discovery | ||
46 | * but before CPU bringup | ||
47 | */ | ||
48 | static int __init allowcpus(char *str) | ||
49 | { | ||
50 | cpumask_t cpu_allow_map; | ||
51 | char buf[256]; | ||
52 | int len; | ||
53 | |||
54 | cpus_clear(cpu_allow_map); | ||
55 | if (cpulist_parse(str, &cpu_allow_map) == 0) { | ||
56 | cpu_set(0, cpu_allow_map); | ||
57 | cpus_and(cpu_possible_map, cpu_possible_map, cpu_allow_map); | ||
58 | len = cpulist_scnprintf(buf, sizeof(buf)-1, &cpu_possible_map); | ||
59 | buf[len] = '\0'; | ||
60 | pr_debug("Allowable CPUs: %s\n", buf); | ||
61 | return 1; | ||
62 | } else | ||
63 | return 0; | ||
64 | } | ||
65 | __setup("allowcpus=", allowcpus); | ||
66 | 42 | ||
67 | static void ipi_call_function(unsigned int cpu) | 43 | static void ipi_call_function(unsigned int cpu) |
68 | { | 44 | { |
69 | unsigned int action = 0; | ||
70 | |||
71 | pr_debug("CPU%d: %s cpu %d status %08x\n", | 45 | pr_debug("CPU%d: %s cpu %d status %08x\n", |
72 | smp_processor_id(), __func__, cpu, read_c0_status()); | 46 | smp_processor_id(), __func__, cpu, read_c0_status()); |
73 | 47 | ||
74 | switch (cpu) { | 48 | gic_send_ipi(plat_ipi_call_int_xlate(cpu)); |
75 | case 0: | ||
76 | action = GIC_IPI_EXT_INTR_CALLFNC_VPE0; | ||
77 | break; | ||
78 | case 1: | ||
79 | action = GIC_IPI_EXT_INTR_CALLFNC_VPE1; | ||
80 | break; | ||
81 | case 2: | ||
82 | action = GIC_IPI_EXT_INTR_CALLFNC_VPE2; | ||
83 | break; | ||
84 | case 3: | ||
85 | action = GIC_IPI_EXT_INTR_CALLFNC_VPE3; | ||
86 | break; | ||
87 | } | ||
88 | gic_send_ipi(action); | ||
89 | } | 49 | } |
90 | 50 | ||
91 | 51 | ||
92 | static void ipi_resched(unsigned int cpu) | 52 | static void ipi_resched(unsigned int cpu) |
93 | { | 53 | { |
94 | unsigned int action = 0; | ||
95 | |||
96 | pr_debug("CPU%d: %s cpu %d status %08x\n", | 54 | pr_debug("CPU%d: %s cpu %d status %08x\n", |
97 | smp_processor_id(), __func__, cpu, read_c0_status()); | 55 | smp_processor_id(), __func__, cpu, read_c0_status()); |
98 | 56 | ||
99 | switch (cpu) { | 57 | gic_send_ipi(plat_ipi_resched_int_xlate(cpu)); |
100 | case 0: | ||
101 | action = GIC_IPI_EXT_INTR_RESCHED_VPE0; | ||
102 | break; | ||
103 | case 1: | ||
104 | action = GIC_IPI_EXT_INTR_RESCHED_VPE1; | ||
105 | break; | ||
106 | case 2: | ||
107 | action = GIC_IPI_EXT_INTR_RESCHED_VPE2; | ||
108 | break; | ||
109 | case 3: | ||
110 | action = GIC_IPI_EXT_INTR_RESCHED_VPE3; | ||
111 | break; | ||
112 | } | ||
113 | gic_send_ipi(action); | ||
114 | } | 58 | } |
115 | 59 | ||
116 | /* | 60 | /* |
@@ -206,7 +150,7 @@ static void cmp_boot_secondary(int cpu, struct task_struct *idle) | |||
206 | (unsigned long)(gp + sizeof(struct thread_info))); | 150 | (unsigned long)(gp + sizeof(struct thread_info))); |
207 | #endif | 151 | #endif |
208 | 152 | ||
209 | amon_cpu_start(cpu, pc, sp, gp, a0); | 153 | amon_cpu_start(cpu, pc, sp, (unsigned long)gp, a0); |
210 | } | 154 | } |
211 | 155 | ||
212 | /* | 156 | /* |
diff --git a/arch/mips/kernel/sync-r4k.c b/arch/mips/kernel/sync-r4k.c index 9021108eb9c1..05dd170a83f7 100644 --- a/arch/mips/kernel/sync-r4k.c +++ b/arch/mips/kernel/sync-r4k.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Count register synchronisation. | 2 | * Count register synchronisation. |
3 | * | 3 | * |
4 | * All CPUs will have their count registers synchronised to the CPU0 expirelo | 4 | * All CPUs will have their count registers synchronised to the CPU0 next time |
5 | * value. This can cause a small timewarp for CPU0. All other CPU's should | 5 | * value. This can cause a small timewarp for CPU0. All other CPU's should |
6 | * not have done anything significant (but they may have had interrupts | 6 | * not have done anything significant (but they may have had interrupts |
7 | * enabled briefly - prom_smp_finish() should not be responsible for enabling | 7 | * enabled briefly - prom_smp_finish() should not be responsible for enabling |
@@ -13,21 +13,22 @@ | |||
13 | #include <linux/kernel.h> | 13 | #include <linux/kernel.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/irqflags.h> | 15 | #include <linux/irqflags.h> |
16 | #include <linux/r4k-timer.h> | 16 | #include <linux/cpumask.h> |
17 | 17 | ||
18 | #include <asm/r4k-timer.h> | ||
18 | #include <asm/atomic.h> | 19 | #include <asm/atomic.h> |
19 | #include <asm/barrier.h> | 20 | #include <asm/barrier.h> |
20 | #include <asm/cpumask.h> | ||
21 | #include <asm/mipsregs.h> | 21 | #include <asm/mipsregs.h> |
22 | 22 | ||
23 | static atomic_t __initdata count_start_flag = ATOMIC_INIT(0); | 23 | static atomic_t __cpuinitdata count_start_flag = ATOMIC_INIT(0); |
24 | static atomic_t __initdata count_count_start = ATOMIC_INIT(0); | 24 | static atomic_t __cpuinitdata count_count_start = ATOMIC_INIT(0); |
25 | static atomic_t __initdata count_count_stop = ATOMIC_INIT(0); | 25 | static atomic_t __cpuinitdata count_count_stop = ATOMIC_INIT(0); |
26 | static atomic_t __cpuinitdata count_reference = ATOMIC_INIT(0); | ||
26 | 27 | ||
27 | #define COUNTON 100 | 28 | #define COUNTON 100 |
28 | #define NR_LOOPS 5 | 29 | #define NR_LOOPS 5 |
29 | 30 | ||
30 | void __init synchronise_count_master(void) | 31 | void __cpuinit synchronise_count_master(void) |
31 | { | 32 | { |
32 | int i; | 33 | int i; |
33 | unsigned long flags; | 34 | unsigned long flags; |
@@ -42,19 +43,20 @@ void __init synchronise_count_master(void) | |||
42 | return; | 43 | return; |
43 | #endif | 44 | #endif |
44 | 45 | ||
45 | pr_info("Checking COUNT synchronization across %u CPUs: ", | 46 | printk(KERN_INFO "Synchronize counters across %u CPUs: ", |
46 | num_online_cpus()); | 47 | num_online_cpus()); |
47 | 48 | ||
48 | local_irq_save(flags); | 49 | local_irq_save(flags); |
49 | 50 | ||
50 | /* | 51 | /* |
51 | * Notify the slaves that it's time to start | 52 | * Notify the slaves that it's time to start |
52 | */ | 53 | */ |
54 | atomic_set(&count_reference, read_c0_count()); | ||
53 | atomic_set(&count_start_flag, 1); | 55 | atomic_set(&count_start_flag, 1); |
54 | smp_wmb(); | 56 | smp_wmb(); |
55 | 57 | ||
56 | /* Count will be initialised to expirelo for all CPU's */ | 58 | /* Count will be initialised to current timer for all CPU's */ |
57 | initcount = expirelo; | 59 | initcount = read_c0_count(); |
58 | 60 | ||
59 | /* | 61 | /* |
60 | * We loop a few times to get a primed instruction cache, | 62 | * We loop a few times to get a primed instruction cache, |
@@ -106,7 +108,7 @@ void __init synchronise_count_master(void) | |||
106 | printk("done.\n"); | 108 | printk("done.\n"); |
107 | } | 109 | } |
108 | 110 | ||
109 | void __init synchronise_count_slave(void) | 111 | void __cpuinit synchronise_count_slave(void) |
110 | { | 112 | { |
111 | int i; | 113 | int i; |
112 | unsigned long flags; | 114 | unsigned long flags; |
@@ -131,8 +133,8 @@ void __init synchronise_count_slave(void) | |||
131 | while (!atomic_read(&count_start_flag)) | 133 | while (!atomic_read(&count_start_flag)) |
132 | mb(); | 134 | mb(); |
133 | 135 | ||
134 | /* Count will be initialised to expirelo for all CPU's */ | 136 | /* Count will be initialised to next expire for all CPU's */ |
135 | initcount = expirelo; | 137 | initcount = atomic_read(&count_reference); |
136 | 138 | ||
137 | ncpus = num_online_cpus(); | 139 | ncpus = num_online_cpus(); |
138 | for (i = 0; i < NR_LOOPS; i++) { | 140 | for (i = 0; i < NR_LOOPS; i++) { |
@@ -156,4 +158,3 @@ void __init synchronise_count_slave(void) | |||
156 | local_irq_restore(flags); | 158 | local_irq_restore(flags); |
157 | } | 159 | } |
158 | #undef NR_LOOPS | 160 | #undef NR_LOOPS |
159 | #endif | ||
diff --git a/arch/mips/kernel/vpe.c b/arch/mips/kernel/vpe.c index 3ca5f42e819d..07b9ec2c6e3d 100644 --- a/arch/mips/kernel/vpe.c +++ b/arch/mips/kernel/vpe.c | |||
@@ -1387,7 +1387,7 @@ static ssize_t store_ntcs(struct device *dev, struct device_attribute *attr, | |||
1387 | return len; | 1387 | return len; |
1388 | 1388 | ||
1389 | out_einval: | 1389 | out_einval: |
1390 | return -EINVAL;; | 1390 | return -EINVAL; |
1391 | } | 1391 | } |
1392 | 1392 | ||
1393 | static struct device_attribute vpe_class_attributes[] = { | 1393 | static struct device_attribute vpe_class_attributes[] = { |
diff --git a/arch/mips/mti-malta/malta-init.c b/arch/mips/mti-malta/malta-init.c index 475038a141a6..27c807b67fea 100644 --- a/arch/mips/mti-malta/malta-init.c +++ b/arch/mips/mti-malta/malta-init.c | |||
@@ -30,6 +30,7 @@ | |||
30 | #include <asm/cacheflush.h> | 30 | #include <asm/cacheflush.h> |
31 | #include <asm/traps.h> | 31 | #include <asm/traps.h> |
32 | 32 | ||
33 | #include <asm/gcmpregs.h> | ||
33 | #include <asm/mips-boards/prom.h> | 34 | #include <asm/mips-boards/prom.h> |
34 | #include <asm/mips-boards/generic.h> | 35 | #include <asm/mips-boards/generic.h> |
35 | #include <asm/mips-boards/bonito64.h> | 36 | #include <asm/mips-boards/bonito64.h> |
@@ -192,6 +193,8 @@ extern struct plat_smp_ops msmtc_smp_ops; | |||
192 | 193 | ||
193 | void __init prom_init(void) | 194 | void __init prom_init(void) |
194 | { | 195 | { |
196 | int result; | ||
197 | |||
195 | prom_argc = fw_arg0; | 198 | prom_argc = fw_arg0; |
196 | _prom_argv = (int *) fw_arg1; | 199 | _prom_argv = (int *) fw_arg1; |
197 | _prom_envp = (int *) fw_arg2; | 200 | _prom_envp = (int *) fw_arg2; |
@@ -358,12 +361,21 @@ void __init prom_init(void) | |||
358 | #ifdef CONFIG_SERIAL_8250_CONSOLE | 361 | #ifdef CONFIG_SERIAL_8250_CONSOLE |
359 | console_config(); | 362 | console_config(); |
360 | #endif | 363 | #endif |
364 | /* Early detection of CMP support */ | ||
365 | result = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ); | ||
366 | |||
361 | #ifdef CONFIG_MIPS_CMP | 367 | #ifdef CONFIG_MIPS_CMP |
362 | register_smp_ops(&cmp_smp_ops); | 368 | if (result) |
369 | register_smp_ops(&cmp_smp_ops); | ||
363 | #endif | 370 | #endif |
364 | #ifdef CONFIG_MIPS_MT_SMP | 371 | #ifdef CONFIG_MIPS_MT_SMP |
372 | #ifdef CONFIG_MIPS_CMP | ||
373 | if (!result) | ||
374 | register_smp_ops(&vsmp_smp_ops); | ||
375 | #else | ||
365 | register_smp_ops(&vsmp_smp_ops); | 376 | register_smp_ops(&vsmp_smp_ops); |
366 | #endif | 377 | #endif |
378 | #endif | ||
367 | #ifdef CONFIG_MIPS_MT_SMTC | 379 | #ifdef CONFIG_MIPS_MT_SMTC |
368 | register_smp_ops(&msmtc_smp_ops); | 380 | register_smp_ops(&msmtc_smp_ops); |
369 | #endif | 381 | #endif |
diff --git a/arch/mips/mti-malta/malta-int.c b/arch/mips/mti-malta/malta-int.c index b4eaf137e4a7..a8756f82c31b 100644 --- a/arch/mips/mti-malta/malta-int.c +++ b/arch/mips/mti-malta/malta-int.c | |||
@@ -331,6 +331,21 @@ static struct irqaction irq_call = { | |||
331 | .flags = IRQF_DISABLED|IRQF_PERCPU, | 331 | .flags = IRQF_DISABLED|IRQF_PERCPU, |
332 | .name = "IPI_call" | 332 | .name = "IPI_call" |
333 | }; | 333 | }; |
334 | |||
335 | static int gic_resched_int_base; | ||
336 | static int gic_call_int_base; | ||
337 | #define GIC_RESCHED_INT(cpu) (gic_resched_int_base+(cpu)) | ||
338 | #define GIC_CALL_INT(cpu) (gic_call_int_base+(cpu)) | ||
339 | |||
340 | unsigned int plat_ipi_call_int_xlate(unsigned int cpu) | ||
341 | { | ||
342 | return GIC_CALL_INT(cpu); | ||
343 | } | ||
344 | |||
345 | unsigned int plat_ipi_resched_int_xlate(unsigned int cpu) | ||
346 | { | ||
347 | return GIC_RESCHED_INT(cpu); | ||
348 | } | ||
334 | #endif /* CONFIG_MIPS_MT_SMP */ | 349 | #endif /* CONFIG_MIPS_MT_SMP */ |
335 | 350 | ||
336 | static struct irqaction i8259irq = { | 351 | static struct irqaction i8259irq = { |
@@ -370,7 +385,7 @@ static int __initdata msc_nr_eicirqs = ARRAY_SIZE(msc_eicirqmap); | |||
370 | * Interrupts and CPUs/Core Interrupts. The nature of the External | 385 | * Interrupts and CPUs/Core Interrupts. The nature of the External |
371 | * Interrupts is also defined here - polarity/trigger. | 386 | * Interrupts is also defined here - polarity/trigger. |
372 | */ | 387 | */ |
373 | static struct gic_intr_map gic_intr_map[] = { | 388 | static struct gic_intr_map gic_intr_map[GIC_NUM_INTRS] = { |
374 | { GIC_EXT_INTR(0), X, X, X, X, 0 }, | 389 | { GIC_EXT_INTR(0), X, X, X, X, 0 }, |
375 | { GIC_EXT_INTR(1), X, X, X, X, 0 }, | 390 | { GIC_EXT_INTR(1), X, X, X, X, 0 }, |
376 | { GIC_EXT_INTR(2), X, X, X, X, 0 }, | 391 | { GIC_EXT_INTR(2), X, X, X, X, 0 }, |
@@ -387,21 +402,14 @@ static struct gic_intr_map gic_intr_map[] = { | |||
387 | { GIC_EXT_INTR(13), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 402 | { GIC_EXT_INTR(13), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, |
388 | { GIC_EXT_INTR(14), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, | 403 | { GIC_EXT_INTR(14), 0, GIC_MAP_TO_NMI_MSK, GIC_POL_POS, GIC_TRIG_LEVEL, 0 }, |
389 | { GIC_EXT_INTR(15), X, X, X, X, 0 }, | 404 | { GIC_EXT_INTR(15), X, X, X, X, 0 }, |
390 | { GIC_EXT_INTR(16), 0, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | 405 | /* This is the end of the general interrupts now we do IPI ones */ |
391 | { GIC_EXT_INTR(17), 0, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | ||
392 | { GIC_EXT_INTR(18), 1, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | ||
393 | { GIC_EXT_INTR(19), 1, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | ||
394 | { GIC_EXT_INTR(20), 2, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | ||
395 | { GIC_EXT_INTR(21), 2, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | ||
396 | { GIC_EXT_INTR(22), 3, GIC_CPU_INT1, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | ||
397 | { GIC_EXT_INTR(23), 3, GIC_CPU_INT2, GIC_POL_POS, GIC_TRIG_EDGE, 1 }, | ||
398 | }; | 406 | }; |
399 | #endif | 407 | #endif |
400 | 408 | ||
401 | /* | 409 | /* |
402 | * GCMP needs to be detected before any SMP initialisation | 410 | * GCMP needs to be detected before any SMP initialisation |
403 | */ | 411 | */ |
404 | static int __init gcmp_probe(unsigned long addr, unsigned long size) | 412 | int __init gcmp_probe(unsigned long addr, unsigned long size) |
405 | { | 413 | { |
406 | if (gcmp_present >= 0) | 414 | if (gcmp_present >= 0) |
407 | return gcmp_present; | 415 | return gcmp_present; |
@@ -416,28 +424,36 @@ static int __init gcmp_probe(unsigned long addr, unsigned long size) | |||
416 | } | 424 | } |
417 | 425 | ||
418 | #if defined(CONFIG_MIPS_MT_SMP) | 426 | #if defined(CONFIG_MIPS_MT_SMP) |
427 | static void __init fill_ipi_map1(int baseintr, int cpu, int cpupin) | ||
428 | { | ||
429 | int intr = baseintr + cpu; | ||
430 | gic_intr_map[intr].intrnum = GIC_EXT_INTR(intr); | ||
431 | gic_intr_map[intr].cpunum = cpu; | ||
432 | gic_intr_map[intr].pin = cpupin; | ||
433 | gic_intr_map[intr].polarity = GIC_POL_POS; | ||
434 | gic_intr_map[intr].trigtype = GIC_TRIG_EDGE; | ||
435 | gic_intr_map[intr].ipiflag = 1; | ||
436 | ipi_map[cpu] |= (1 << (cpupin + 2)); | ||
437 | } | ||
438 | |||
419 | static void __init fill_ipi_map(void) | 439 | static void __init fill_ipi_map(void) |
420 | { | 440 | { |
421 | int i; | 441 | int cpu; |
422 | 442 | ||
423 | for (i = 0; i < ARRAY_SIZE(gic_intr_map); i++) { | 443 | for (cpu = 0; cpu < NR_CPUS; cpu++) { |
424 | if (gic_intr_map[i].ipiflag && (gic_intr_map[i].cpunum != X)) | 444 | fill_ipi_map1(gic_resched_int_base, cpu, GIC_CPU_INT1); |
425 | ipi_map[gic_intr_map[i].cpunum] |= | 445 | fill_ipi_map1(gic_call_int_base, cpu, GIC_CPU_INT2); |
426 | (1 << (gic_intr_map[i].pin + 2)); | ||
427 | } | 446 | } |
428 | } | 447 | } |
429 | #endif | 448 | #endif |
430 | 449 | ||
431 | void __init arch_init_irq(void) | 450 | void __init arch_init_irq(void) |
432 | { | 451 | { |
433 | int gic_present, gcmp_present; | ||
434 | |||
435 | init_i8259_irqs(); | 452 | init_i8259_irqs(); |
436 | 453 | ||
437 | if (!cpu_has_veic) | 454 | if (!cpu_has_veic) |
438 | mips_cpu_irq_init(); | 455 | mips_cpu_irq_init(); |
439 | 456 | ||
440 | gcmp_present = gcmp_probe(GCMP_BASE_ADDR, GCMP_ADDRSPACE_SZ); | ||
441 | if (gcmp_present) { | 457 | if (gcmp_present) { |
442 | GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK; | 458 | GCMPGCB(GICBA) = GIC_BASE_ADDR | GCMP_GCB_GICBA_EN_MSK; |
443 | gic_present = 1; | 459 | gic_present = 1; |
@@ -514,24 +530,10 @@ void __init arch_init_irq(void) | |||
514 | if (gic_present) { | 530 | if (gic_present) { |
515 | /* FIXME */ | 531 | /* FIXME */ |
516 | int i; | 532 | int i; |
517 | struct { | 533 | |
518 | unsigned int resched; | 534 | gic_call_int_base = GIC_NUM_INTRS - NR_CPUS; |
519 | unsigned int call; | 535 | gic_resched_int_base = gic_call_int_base - NR_CPUS; |
520 | } ipiirq[] = { | 536 | |
521 | { | ||
522 | .resched = GIC_IPI_EXT_INTR_RESCHED_VPE0, | ||
523 | .call = GIC_IPI_EXT_INTR_CALLFNC_VPE0}, | ||
524 | { | ||
525 | .resched = GIC_IPI_EXT_INTR_RESCHED_VPE1, | ||
526 | .call = GIC_IPI_EXT_INTR_CALLFNC_VPE1 | ||
527 | }, { | ||
528 | .resched = GIC_IPI_EXT_INTR_RESCHED_VPE2, | ||
529 | .call = GIC_IPI_EXT_INTR_CALLFNC_VPE2 | ||
530 | }, { | ||
531 | .resched = GIC_IPI_EXT_INTR_RESCHED_VPE3, | ||
532 | .call = GIC_IPI_EXT_INTR_CALLFNC_VPE3 | ||
533 | } | ||
534 | }; | ||
535 | fill_ipi_map(); | 537 | fill_ipi_map(); |
536 | gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); | 538 | gic_init(GIC_BASE_ADDR, GIC_ADDRSPACE_SZ, gic_intr_map, ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE); |
537 | if (!gcmp_present) { | 539 | if (!gcmp_present) { |
@@ -553,12 +555,15 @@ void __init arch_init_irq(void) | |||
553 | printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status()); | 555 | printk("CPU%d: status register now %08x\n", smp_processor_id(), read_c0_status()); |
554 | write_c0_status(0x1100dc00); | 556 | write_c0_status(0x1100dc00); |
555 | printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status()); | 557 | printk("CPU%d: status register frc %08x\n", smp_processor_id(), read_c0_status()); |
556 | for (i = 0; i < ARRAY_SIZE(ipiirq); i++) { | 558 | for (i = 0; i < NR_CPUS; i++) { |
557 | setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, &irq_resched); | 559 | setup_irq(MIPS_GIC_IRQ_BASE + |
558 | setup_irq(MIPS_GIC_IRQ_BASE + ipiirq[i].call, &irq_call); | 560 | GIC_RESCHED_INT(i), &irq_resched); |
559 | 561 | setup_irq(MIPS_GIC_IRQ_BASE + | |
560 | set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].resched, handle_percpu_irq); | 562 | GIC_CALL_INT(i), &irq_call); |
561 | set_irq_handler(MIPS_GIC_IRQ_BASE + ipiirq[i].call, handle_percpu_irq); | 563 | set_irq_handler(MIPS_GIC_IRQ_BASE + |
564 | GIC_RESCHED_INT(i), handle_percpu_irq); | ||
565 | set_irq_handler(MIPS_GIC_IRQ_BASE + | ||
566 | GIC_CALL_INT(i), handle_percpu_irq); | ||
562 | } | 567 | } |
563 | } else { | 568 | } else { |
564 | /* set up ipi interrupts */ | 569 | /* set up ipi interrupts */ |
diff --git a/arch/mips/mti-malta/malta-reset.c b/arch/mips/mti-malta/malta-reset.c index 42dee4da37ba..f48d60e84290 100644 --- a/arch/mips/mti-malta/malta-reset.c +++ b/arch/mips/mti-malta/malta-reset.c | |||
@@ -28,9 +28,6 @@ | |||
28 | #include <asm/reboot.h> | 28 | #include <asm/reboot.h> |
29 | #include <asm/mips-boards/generic.h> | 29 | #include <asm/mips-boards/generic.h> |
30 | 30 | ||
31 | static void mips_machine_restart(char *command); | ||
32 | static void mips_machine_halt(void); | ||
33 | |||
34 | static void mips_machine_restart(char *command) | 31 | static void mips_machine_restart(char *command) |
35 | { | 32 | { |
36 | unsigned int __iomem *softres_reg = | 33 | unsigned int __iomem *softres_reg = |
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index e8a97f59e066..63d8a297c58d 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile | |||
@@ -52,3 +52,8 @@ obj-$(CONFIG_VICTOR_MPC30X) += fixup-mpc30x.o | |||
52 | obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o | 52 | obj-$(CONFIG_ZAO_CAPCELLA) += fixup-capcella.o |
53 | obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o | 53 | obj-$(CONFIG_WR_PPMC) += fixup-wrppmc.o |
54 | obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o | 54 | obj-$(CONFIG_MIKROTIK_RB532) += pci-rc32434.o ops-rc32434.o fixup-rc32434.o |
55 | obj-$(CONFIG_CPU_CAVIUM_OCTEON) += pci-octeon.o pcie-octeon.o | ||
56 | |||
57 | ifdef CONFIG_PCI_MSI | ||
58 | obj-$(CONFIG_CPU_CAVIUM_OCTEON) += msi-octeon.o | ||
59 | endif | ||
diff --git a/arch/mips/pci/fixup-capcella.c b/arch/mips/pci/fixup-capcella.c index 1416bca6d1a3..1c02f5737367 100644 --- a/arch/mips/pci/fixup-capcella.c +++ b/arch/mips/pci/fixup-capcella.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups. | 2 | * fixup-cappcela.c, The ZAO Networks Capcella specific PCI fixups. |
3 | * | 3 | * |
4 | * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/pci/fixup-mpc30x.c b/arch/mips/pci/fixup-mpc30x.c index 591159625722..e08f49cb6875 100644 --- a/arch/mips/pci/fixup-mpc30x.c +++ b/arch/mips/pci/fixup-mpc30x.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups. | 2 | * fixup-mpc30x.c, The Victor MP-C303/304 specific PCI fixups. |
3 | * | 3 | * |
4 | * Copyright (C) 2002,2004 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002,2004 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/pci/fixup-tb0219.c b/arch/mips/pci/fixup-tb0219.c index ed87733f6796..8084b17d4406 100644 --- a/arch/mips/pci/fixup-tb0219.c +++ b/arch/mips/pci/fixup-tb0219.c | |||
@@ -2,7 +2,7 @@ | |||
2 | * fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups. | 2 | * fixup-tb0219.c, The TANBAC TB0219 specific PCI fixups. |
3 | * | 3 | * |
4 | * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> | 4 | * Copyright (C) 2003 Megasolution Inc. <matsu@megasolution.jp> |
5 | * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 5 | * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
8 | * it under the terms of the GNU General Public License as published by | 8 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/pci/fixup-tb0226.c b/arch/mips/pci/fixup-tb0226.c index e3eedf4bf9bd..4196ccf3ea3d 100644 --- a/arch/mips/pci/fixup-tb0226.c +++ b/arch/mips/pci/fixup-tb0226.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. | 2 | * fixup-tb0226.c, The TANBAC TB0226 specific PCI fixups. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/pci/fixup-tb0287.c b/arch/mips/pci/fixup-tb0287.c index 267ab3dc3d42..2fe29db43725 100644 --- a/arch/mips/pci/fixup-tb0287.c +++ b/arch/mips/pci/fixup-tb0287.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups. | 2 | * fixup-tb0287.c, The TANBAC TB0287 specific PCI fixups. |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2005 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cavium-octeon/msi.c b/arch/mips/pci/msi-octeon.c index 964b03b75a8f..03742e647657 100644 --- a/arch/mips/cavium-octeon/msi.c +++ b/arch/mips/pci/msi-octeon.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2005-2007 Cavium Networks | 6 | * Copyright (C) 2005-2009 Cavium Networks |
7 | */ | 7 | */ |
8 | #include <linux/kernel.h> | 8 | #include <linux/kernel.h> |
9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
@@ -16,8 +16,7 @@ | |||
16 | #include <asm/octeon/cvmx-pci-defs.h> | 16 | #include <asm/octeon/cvmx-pci-defs.h> |
17 | #include <asm/octeon/cvmx-npei-defs.h> | 17 | #include <asm/octeon/cvmx-npei-defs.h> |
18 | #include <asm/octeon/cvmx-pexp-defs.h> | 18 | #include <asm/octeon/cvmx-pexp-defs.h> |
19 | 19 | #include <asm/octeon/pci-octeon.h> | |
20 | #include "pci-common.h" | ||
21 | 20 | ||
22 | /* | 21 | /* |
23 | * Each bit in msi_free_irq_bitmask represents a MSI interrupt that is | 22 | * Each bit in msi_free_irq_bitmask represents a MSI interrupt that is |
@@ -47,8 +46,8 @@ static DEFINE_SPINLOCK(msi_free_irq_bitmask_lock); | |||
47 | * programming the MSI control bits [6:4] before calling | 46 | * programming the MSI control bits [6:4] before calling |
48 | * pci_enable_msi(). | 47 | * pci_enable_msi(). |
49 | * | 48 | * |
50 | * @param dev Device requesting MSI interrupts | 49 | * @dev: Device requesting MSI interrupts |
51 | * @param desc MSI descriptor | 50 | * @desc: MSI descriptor |
52 | * | 51 | * |
53 | * Returns 0 on success. | 52 | * Returns 0 on success. |
54 | */ | 53 | */ |
@@ -213,14 +212,9 @@ void arch_teardown_msi_irq(unsigned int irq) | |||
213 | } | 212 | } |
214 | 213 | ||
215 | 214 | ||
216 | /** | 215 | /* |
217 | * Called by the interrupt handling code when an MSI interrupt | 216 | * Called by the interrupt handling code when an MSI interrupt |
218 | * occurs. | 217 | * occurs. |
219 | * | ||
220 | * @param cpl | ||
221 | * @param dev_id | ||
222 | * | ||
223 | * @return | ||
224 | */ | 218 | */ |
225 | static irqreturn_t octeon_msi_interrupt(int cpl, void *dev_id) | 219 | static irqreturn_t octeon_msi_interrupt(int cpl, void *dev_id) |
226 | { | 220 | { |
@@ -256,31 +250,37 @@ static irqreturn_t octeon_msi_interrupt(int cpl, void *dev_id) | |||
256 | } | 250 | } |
257 | 251 | ||
258 | 252 | ||
259 | /** | 253 | /* |
260 | * Initializes the MSI interrupt handling code | 254 | * Initializes the MSI interrupt handling code |
261 | * | ||
262 | * @return | ||
263 | */ | 255 | */ |
264 | int octeon_msi_initialize(void) | 256 | int octeon_msi_initialize(void) |
265 | { | 257 | { |
266 | int r; | ||
267 | if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { | 258 | if (octeon_has_feature(OCTEON_FEATURE_PCIE)) { |
268 | r = request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt, | 259 | if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt, |
269 | IRQF_SHARED, | 260 | IRQF_SHARED, |
270 | "MSI[0:63]", octeon_msi_interrupt); | 261 | "MSI[0:63]", octeon_msi_interrupt)) |
262 | panic("request_irq(OCTEON_IRQ_PCI_MSI0) failed"); | ||
271 | } else if (octeon_is_pci_host()) { | 263 | } else if (octeon_is_pci_host()) { |
272 | r = request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt, | 264 | if (request_irq(OCTEON_IRQ_PCI_MSI0, octeon_msi_interrupt, |
273 | IRQF_SHARED, | 265 | IRQF_SHARED, |
274 | "MSI[0:15]", octeon_msi_interrupt); | 266 | "MSI[0:15]", octeon_msi_interrupt)) |
275 | r += request_irq(OCTEON_IRQ_PCI_MSI1, octeon_msi_interrupt, | 267 | panic("request_irq(OCTEON_IRQ_PCI_MSI0) failed"); |
276 | IRQF_SHARED, | 268 | |
277 | "MSI[16:31]", octeon_msi_interrupt); | 269 | if (request_irq(OCTEON_IRQ_PCI_MSI1, octeon_msi_interrupt, |
278 | r += request_irq(OCTEON_IRQ_PCI_MSI2, octeon_msi_interrupt, | 270 | IRQF_SHARED, |
279 | IRQF_SHARED, | 271 | "MSI[16:31]", octeon_msi_interrupt)) |
280 | "MSI[32:47]", octeon_msi_interrupt); | 272 | panic("request_irq(OCTEON_IRQ_PCI_MSI1) failed"); |
281 | r += request_irq(OCTEON_IRQ_PCI_MSI3, octeon_msi_interrupt, | 273 | |
282 | IRQF_SHARED, | 274 | if (request_irq(OCTEON_IRQ_PCI_MSI2, octeon_msi_interrupt, |
283 | "MSI[48:63]", octeon_msi_interrupt); | 275 | IRQF_SHARED, |
276 | "MSI[32:47]", octeon_msi_interrupt)) | ||
277 | panic("request_irq(OCTEON_IRQ_PCI_MSI2) failed"); | ||
278 | |||
279 | if (request_irq(OCTEON_IRQ_PCI_MSI3, octeon_msi_interrupt, | ||
280 | IRQF_SHARED, | ||
281 | "MSI[48:63]", octeon_msi_interrupt)) | ||
282 | panic("request_irq(OCTEON_IRQ_PCI_MSI3) failed"); | ||
283 | |||
284 | } | 284 | } |
285 | return 0; | 285 | return 0; |
286 | } | 286 | } |
diff --git a/arch/mips/pci/ops-vr41xx.c b/arch/mips/pci/ops-vr41xx.c index 900c6b32576c..28962a7c6606 100644 --- a/arch/mips/pci/ops-vr41xx.c +++ b/arch/mips/pci/ops-vr41xx.c | |||
@@ -2,8 +2,8 @@ | |||
2 | * ops-vr41xx.c, PCI configuration routines for the PCIU of NEC VR4100 series. | 2 | * ops-vr41xx.c, PCI configuration routines for the PCIU of NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2001-2003 MontaVista Software Inc. | 4 | * Copyright (C) 2001-2003 MontaVista Software Inc. |
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> | 5 | * Author: Yoichi Yuasa <source@mvista.com> |
6 | * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 6 | * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -21,7 +21,7 @@ | |||
21 | */ | 21 | */ |
22 | /* | 22 | /* |
23 | * Changes: | 23 | * Changes: |
24 | * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> | 24 | * MontaVista Software Inc. <source@mvista.com> |
25 | * - New creation, NEC VR4122 and VR4131 are supported. | 25 | * - New creation, NEC VR4122 and VR4131 are supported. |
26 | */ | 26 | */ |
27 | #include <linux/pci.h> | 27 | #include <linux/pci.h> |
diff --git a/arch/mips/cavium-octeon/pci.c b/arch/mips/pci/pci-octeon.c index 67c0ff5e92f1..9cb0c807f564 100644 --- a/arch/mips/cavium-octeon/pci.c +++ b/arch/mips/pci/pci-octeon.c | |||
@@ -3,7 +3,7 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * Copyright (C) 2005-2007 Cavium Networks | 6 | * Copyright (C) 2005-2009 Cavium Networks |
7 | */ | 7 | */ |
8 | #include <linux/kernel.h> | 8 | #include <linux/kernel.h> |
9 | #include <linux/init.h> | 9 | #include <linux/init.h> |
@@ -17,8 +17,7 @@ | |||
17 | #include <asm/octeon/octeon.h> | 17 | #include <asm/octeon/octeon.h> |
18 | #include <asm/octeon/cvmx-npi-defs.h> | 18 | #include <asm/octeon/cvmx-npi-defs.h> |
19 | #include <asm/octeon/cvmx-pci-defs.h> | 19 | #include <asm/octeon/cvmx-pci-defs.h> |
20 | 20 | #include <asm/octeon/pci-octeon.h> | |
21 | #include "pci-common.h" | ||
22 | 21 | ||
23 | #define USE_OCTEON_INTERNAL_ARBITER | 22 | #define USE_OCTEON_INTERNAL_ARBITER |
24 | 23 | ||
@@ -54,6 +53,126 @@ union octeon_pci_address { | |||
54 | } s; | 53 | } s; |
55 | }; | 54 | }; |
56 | 55 | ||
56 | int __initdata (*octeon_pcibios_map_irq)(const struct pci_dev *dev, | ||
57 | u8 slot, u8 pin); | ||
58 | enum octeon_dma_bar_type octeon_dma_bar_type = OCTEON_DMA_BAR_TYPE_INVALID; | ||
59 | |||
60 | /** | ||
61 | * Map a PCI device to the appropriate interrupt line | ||
62 | * | ||
63 | * @dev: The Linux PCI device structure for the device to map | ||
64 | * @slot: The slot number for this device on __BUS 0__. Linux | ||
65 | * enumerates through all the bridges and figures out the | ||
66 | * slot on Bus 0 where this device eventually hooks to. | ||
67 | * @pin: The PCI interrupt pin read from the device, then swizzled | ||
68 | * as it goes through each bridge. | ||
69 | * Returns Interrupt number for the device | ||
70 | */ | ||
71 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | ||
72 | { | ||
73 | if (octeon_pcibios_map_irq) | ||
74 | return octeon_pcibios_map_irq(dev, slot, pin); | ||
75 | else | ||
76 | panic("octeon_pcibios_map_irq not set."); | ||
77 | } | ||
78 | |||
79 | |||
80 | /* | ||
81 | * Called to perform platform specific PCI setup | ||
82 | */ | ||
83 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
84 | { | ||
85 | uint16_t config; | ||
86 | uint32_t dconfig; | ||
87 | int pos; | ||
88 | /* | ||
89 | * Force the Cache line setting to 64 bytes. The standard | ||
90 | * Linux bus scan doesn't seem to set it. Octeon really has | ||
91 | * 128 byte lines, but Intel bridges get really upset if you | ||
92 | * try and set values above 64 bytes. Value is specified in | ||
93 | * 32bit words. | ||
94 | */ | ||
95 | pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, 64 / 4); | ||
96 | /* Set latency timers for all devices */ | ||
97 | pci_write_config_byte(dev, PCI_LATENCY_TIMER, 48); | ||
98 | |||
99 | /* Enable reporting System errors and parity errors on all devices */ | ||
100 | /* Enable parity checking and error reporting */ | ||
101 | pci_read_config_word(dev, PCI_COMMAND, &config); | ||
102 | config |= PCI_COMMAND_PARITY | PCI_COMMAND_SERR; | ||
103 | pci_write_config_word(dev, PCI_COMMAND, config); | ||
104 | |||
105 | if (dev->subordinate) { | ||
106 | /* Set latency timers on sub bridges */ | ||
107 | pci_write_config_byte(dev, PCI_SEC_LATENCY_TIMER, 48); | ||
108 | /* More bridge error detection */ | ||
109 | pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &config); | ||
110 | config |= PCI_BRIDGE_CTL_PARITY | PCI_BRIDGE_CTL_SERR; | ||
111 | pci_write_config_word(dev, PCI_BRIDGE_CONTROL, config); | ||
112 | } | ||
113 | |||
114 | /* Enable the PCIe normal error reporting */ | ||
115 | pos = pci_find_capability(dev, PCI_CAP_ID_EXP); | ||
116 | if (pos) { | ||
117 | /* Update Device Control */ | ||
118 | pci_read_config_word(dev, pos + PCI_EXP_DEVCTL, &config); | ||
119 | /* Correctable Error Reporting */ | ||
120 | config |= PCI_EXP_DEVCTL_CERE; | ||
121 | /* Non-Fatal Error Reporting */ | ||
122 | config |= PCI_EXP_DEVCTL_NFERE; | ||
123 | /* Fatal Error Reporting */ | ||
124 | config |= PCI_EXP_DEVCTL_FERE; | ||
125 | /* Unsupported Request */ | ||
126 | config |= PCI_EXP_DEVCTL_URRE; | ||
127 | pci_write_config_word(dev, pos + PCI_EXP_DEVCTL, config); | ||
128 | } | ||
129 | |||
130 | /* Find the Advanced Error Reporting capability */ | ||
131 | pos = pci_find_ext_capability(dev, PCI_EXT_CAP_ID_ERR); | ||
132 | if (pos) { | ||
133 | /* Clear Uncorrectable Error Status */ | ||
134 | pci_read_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, | ||
135 | &dconfig); | ||
136 | pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_STATUS, | ||
137 | dconfig); | ||
138 | /* Enable reporting of all uncorrectable errors */ | ||
139 | /* Uncorrectable Error Mask - turned on bits disable errors */ | ||
140 | pci_write_config_dword(dev, pos + PCI_ERR_UNCOR_MASK, 0); | ||
141 | /* | ||
142 | * Leave severity at HW default. This only controls if | ||
143 | * errors are reported as uncorrectable or | ||
144 | * correctable, not if the error is reported. | ||
145 | */ | ||
146 | /* PCI_ERR_UNCOR_SEVER - Uncorrectable Error Severity */ | ||
147 | /* Clear Correctable Error Status */ | ||
148 | pci_read_config_dword(dev, pos + PCI_ERR_COR_STATUS, &dconfig); | ||
149 | pci_write_config_dword(dev, pos + PCI_ERR_COR_STATUS, dconfig); | ||
150 | /* Enable reporting of all correctable errors */ | ||
151 | /* Correctable Error Mask - turned on bits disable errors */ | ||
152 | pci_write_config_dword(dev, pos + PCI_ERR_COR_MASK, 0); | ||
153 | /* Advanced Error Capabilities */ | ||
154 | pci_read_config_dword(dev, pos + PCI_ERR_CAP, &dconfig); | ||
155 | /* ECRC Generation Enable */ | ||
156 | if (config & PCI_ERR_CAP_ECRC_GENC) | ||
157 | config |= PCI_ERR_CAP_ECRC_GENE; | ||
158 | /* ECRC Check Enable */ | ||
159 | if (config & PCI_ERR_CAP_ECRC_CHKC) | ||
160 | config |= PCI_ERR_CAP_ECRC_CHKE; | ||
161 | pci_write_config_dword(dev, pos + PCI_ERR_CAP, dconfig); | ||
162 | /* PCI_ERR_HEADER_LOG - Header Log Register (16 bytes) */ | ||
163 | /* Report all errors to the root complex */ | ||
164 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, | ||
165 | PCI_ERR_ROOT_CMD_COR_EN | | ||
166 | PCI_ERR_ROOT_CMD_NONFATAL_EN | | ||
167 | PCI_ERR_ROOT_CMD_FATAL_EN); | ||
168 | /* Clear the Root status register */ | ||
169 | pci_read_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, &dconfig); | ||
170 | pci_write_config_dword(dev, pos + PCI_ERR_ROOT_STATUS, dconfig); | ||
171 | } | ||
172 | |||
173 | return 0; | ||
174 | } | ||
175 | |||
57 | /** | 176 | /** |
58 | * Return the mapping of PCI device number to IRQ line. Each | 177 | * Return the mapping of PCI device number to IRQ line. Each |
59 | * character in the return string represents the interrupt | 178 | * character in the return string represents the interrupt |
@@ -136,9 +255,8 @@ int __init octeon_pci_pcibios_map_irq(const struct pci_dev *dev, | |||
136 | } | 255 | } |
137 | 256 | ||
138 | 257 | ||
139 | /** | 258 | /* |
140 | * Read a value from configuration space | 259 | * Read a value from configuration space |
141 | * | ||
142 | */ | 260 | */ |
143 | static int octeon_read_config(struct pci_bus *bus, unsigned int devfn, | 261 | static int octeon_read_config(struct pci_bus *bus, unsigned int devfn, |
144 | int reg, int size, u32 *val) | 262 | int reg, int size, u32 *val) |
@@ -174,15 +292,8 @@ static int octeon_read_config(struct pci_bus *bus, unsigned int devfn, | |||
174 | } | 292 | } |
175 | 293 | ||
176 | 294 | ||
177 | /** | 295 | /* |
178 | * Write a value to PCI configuration space | 296 | * Write a value to PCI configuration space |
179 | * | ||
180 | * @bus: | ||
181 | * @devfn: | ||
182 | * @reg: | ||
183 | * @size: | ||
184 | * @val: | ||
185 | * Returns | ||
186 | */ | 297 | */ |
187 | static int octeon_write_config(struct pci_bus *bus, unsigned int devfn, | 298 | static int octeon_write_config(struct pci_bus *bus, unsigned int devfn, |
188 | int reg, int size, u32 val) | 299 | int reg, int size, u32 val) |
@@ -251,10 +362,8 @@ static struct pci_controller octeon_pci_controller = { | |||
251 | }; | 362 | }; |
252 | 363 | ||
253 | 364 | ||
254 | /** | 365 | /* |
255 | * Low level initialize the Octeon PCI controller | 366 | * Low level initialize the Octeon PCI controller |
256 | * | ||
257 | * Returns | ||
258 | */ | 367 | */ |
259 | static void octeon_pci_initialize(void) | 368 | static void octeon_pci_initialize(void) |
260 | { | 369 | { |
@@ -398,7 +507,7 @@ static void octeon_pci_initialize(void) | |||
398 | pci_int_arb_cfg.s.en = 1; /* Internal arbiter enable */ | 507 | pci_int_arb_cfg.s.en = 1; /* Internal arbiter enable */ |
399 | cvmx_write_csr(CVMX_NPI_PCI_INT_ARB_CFG, pci_int_arb_cfg.u64); | 508 | cvmx_write_csr(CVMX_NPI_PCI_INT_ARB_CFG, pci_int_arb_cfg.u64); |
400 | } | 509 | } |
401 | #endif /* USE_OCTEON_INTERNAL_ARBITER */ | 510 | #endif /* USE_OCTEON_INTERNAL_ARBITER */ |
402 | 511 | ||
403 | /* | 512 | /* |
404 | * Preferrably written to 1 to set MLTD. [RDSATI,TRTAE, | 513 | * Preferrably written to 1 to set MLTD. [RDSATI,TRTAE, |
@@ -457,10 +566,8 @@ static void octeon_pci_initialize(void) | |||
457 | } | 566 | } |
458 | 567 | ||
459 | 568 | ||
460 | /** | 569 | /* |
461 | * Initialize the Octeon PCI controller | 570 | * Initialize the Octeon PCI controller |
462 | * | ||
463 | * Returns | ||
464 | */ | 571 | */ |
465 | static int __init octeon_pci_setup(void) | 572 | static int __init octeon_pci_setup(void) |
466 | { | 573 | { |
diff --git a/arch/mips/pci/pci-vr41xx.c b/arch/mips/pci/pci-vr41xx.c index d1e049b55f34..56525711f8b7 100644 --- a/arch/mips/pci/pci-vr41xx.c +++ b/arch/mips/pci/pci-vr41xx.c | |||
@@ -2,8 +2,8 @@ | |||
2 | * pci-vr41xx.c, PCI Control Unit routines for the NEC VR4100 series. | 2 | * pci-vr41xx.c, PCI Control Unit routines for the NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2001-2003 MontaVista Software Inc. | 4 | * Copyright (C) 2001-2003 MontaVista Software Inc. |
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> | 5 | * Author: Yoichi Yuasa <source@mvista.com> |
6 | * Copyright (C) 2004-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 6 | * Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
7 | * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) | 7 | * Copyright (C) 2004 by Ralf Baechle (ralf@linux-mips.org) |
8 | * | 8 | * |
9 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
@@ -22,7 +22,7 @@ | |||
22 | */ | 22 | */ |
23 | /* | 23 | /* |
24 | * Changes: | 24 | * Changes: |
25 | * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> | 25 | * MontaVista Software Inc. <source@mvista.com> |
26 | * - New creation, NEC VR4122 and VR4131 are supported. | 26 | * - New creation, NEC VR4122 and VR4131 are supported. |
27 | */ | 27 | */ |
28 | #include <linux/init.h> | 28 | #include <linux/init.h> |
diff --git a/arch/mips/pci/pci-vr41xx.h b/arch/mips/pci/pci-vr41xx.h index 8a35e32b8376..6b1ae2eb1c06 100644 --- a/arch/mips/pci/pci-vr41xx.h +++ b/arch/mips/pci/pci-vr41xx.h | |||
@@ -2,8 +2,8 @@ | |||
2 | * pci-vr41xx.h, Include file for PCI Control Unit of the NEC VR4100 series. | 2 | * pci-vr41xx.h, Include file for PCI Control Unit of the NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2002 MontaVista Software Inc. | 4 | * Copyright (C) 2002 MontaVista Software Inc. |
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> | 5 | * Author: Yoichi Yuasa <source@mvista.com> |
6 | * Copyright (C) 2004-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 6 | * Copyright (C) 2004-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/cavium-octeon/pcie.c b/arch/mips/pci/pcie-octeon.c index 49d14081b3b5..75262247f3e4 100644 --- a/arch/mips/cavium-octeon/pcie.c +++ b/arch/mips/pci/pcie-octeon.c | |||
@@ -18,8 +18,7 @@ | |||
18 | #include <asm/octeon/cvmx-pescx-defs.h> | 18 | #include <asm/octeon/cvmx-pescx-defs.h> |
19 | #include <asm/octeon/cvmx-pexp-defs.h> | 19 | #include <asm/octeon/cvmx-pexp-defs.h> |
20 | #include <asm/octeon/cvmx-helper-errata.h> | 20 | #include <asm/octeon/cvmx-helper-errata.h> |
21 | 21 | #include <asm/octeon/pci-octeon.h> | |
22 | #include "pci-common.h" | ||
23 | 22 | ||
24 | union cvmx_pcie_address { | 23 | union cvmx_pcie_address { |
25 | uint64_t u64; | 24 | uint64_t u64; |
@@ -976,13 +975,13 @@ static int cvmx_pcie_rc_initialize(int pcie_port) | |||
976 | /** | 975 | /** |
977 | * Map a PCI device to the appropriate interrupt line | 976 | * Map a PCI device to the appropriate interrupt line |
978 | * | 977 | * |
979 | * @param dev The Linux PCI device structure for the device to map | 978 | * @dev: The Linux PCI device structure for the device to map |
980 | * @param slot The slot number for this device on __BUS 0__. Linux | 979 | * @slot: The slot number for this device on __BUS 0__. Linux |
981 | * enumerates through all the bridges and figures out the | 980 | * enumerates through all the bridges and figures out the |
982 | * slot on Bus 0 where this device eventually hooks to. | 981 | * slot on Bus 0 where this device eventually hooks to. |
983 | * @param pin The PCI interrupt pin read from the device, then swizzled | 982 | * @pin: The PCI interrupt pin read from the device, then swizzled |
984 | * as it goes through each bridge. | 983 | * as it goes through each bridge. |
985 | * @return Interrupt number for the device | 984 | * Returns Interrupt number for the device |
986 | */ | 985 | */ |
987 | int __init octeon_pcie_pcibios_map_irq(const struct pci_dev *dev, | 986 | int __init octeon_pcie_pcibios_map_irq(const struct pci_dev *dev, |
988 | u8 slot, u8 pin) | 987 | u8 slot, u8 pin) |
@@ -1025,12 +1024,12 @@ int __init octeon_pcie_pcibios_map_irq(const struct pci_dev *dev, | |||
1025 | /** | 1024 | /** |
1026 | * Read a value from configuration space | 1025 | * Read a value from configuration space |
1027 | * | 1026 | * |
1028 | * @param bus | 1027 | * @bus: |
1029 | * @param devfn | 1028 | * @devfn: |
1030 | * @param reg | 1029 | * @reg: |
1031 | * @param size | 1030 | * @size: |
1032 | * @param val | 1031 | * @val: |
1033 | * @return | 1032 | * Returns |
1034 | */ | 1033 | */ |
1035 | static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus, | 1034 | static inline int octeon_pcie_read_config(int pcie_port, struct pci_bus *bus, |
1036 | unsigned int devfn, int reg, int size, | 1035 | unsigned int devfn, int reg, int size, |
@@ -1156,12 +1155,12 @@ static int octeon_pcie1_read_config(struct pci_bus *bus, unsigned int devfn, | |||
1156 | /** | 1155 | /** |
1157 | * Write a value to PCI configuration space | 1156 | * Write a value to PCI configuration space |
1158 | * | 1157 | * |
1159 | * @param bus | 1158 | * @bus: |
1160 | * @param devfn | 1159 | * @devfn: |
1161 | * @param reg | 1160 | * @reg: |
1162 | * @param size | 1161 | * @size: |
1163 | * @param val | 1162 | * @val: |
1164 | * @return | 1163 | * Returns |
1165 | */ | 1164 | */ |
1166 | static inline int octeon_pcie_write_config(int pcie_port, struct pci_bus *bus, | 1165 | static inline int octeon_pcie_write_config(int pcie_port, struct pci_bus *bus, |
1167 | unsigned int devfn, int reg, | 1166 | unsigned int devfn, int reg, |
@@ -1254,7 +1253,7 @@ static struct pci_controller octeon_pcie1_controller = { | |||
1254 | /** | 1253 | /** |
1255 | * Initialize the Octeon PCIe controllers | 1254 | * Initialize the Octeon PCIe controllers |
1256 | * | 1255 | * |
1257 | * @return | 1256 | * Returns |
1258 | */ | 1257 | */ |
1259 | static int __init octeon_pcie_setup(void) | 1258 | static int __init octeon_pcie_setup(void) |
1260 | { | 1259 | { |
diff --git a/arch/mips/vr41xx/casio-e55/setup.c b/arch/mips/vr41xx/casio-e55/setup.c index 6d9bab890587..719f4a5b9844 100644 --- a/arch/mips/vr41xx/casio-e55/setup.c +++ b/arch/mips/vr41xx/casio-e55/setup.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. | 2 | * setup.c, Setup for the CASIO CASSIOPEIA E-11/15/55/65. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2006 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/common/bcu.c b/arch/mips/vr41xx/common/bcu.c index d77c330a0d59..6346c59c9f9d 100644 --- a/arch/mips/vr41xx/common/bcu.c +++ b/arch/mips/vr41xx/common/bcu.c | |||
@@ -2,8 +2,8 @@ | |||
2 | * bcu.c, Bus Control Unit routines for the NEC VR4100 series. | 2 | * bcu.c, Bus Control Unit routines for the NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2002 MontaVista Software Inc. | 4 | * Copyright (C) 2002 MontaVista Software Inc. |
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com, or source@mvista.com> | 5 | * Author: Yoichi Yuasa <source@mvista.com> |
6 | * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 6 | * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -21,11 +21,11 @@ | |||
21 | */ | 21 | */ |
22 | /* | 22 | /* |
23 | * Changes: | 23 | * Changes: |
24 | * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> | 24 | * MontaVista Software Inc. <source@mvista.com> |
25 | * - New creation, NEC VR4122 and VR4131 are supported. | 25 | * - New creation, NEC VR4122 and VR4131 are supported. |
26 | * - Added support for NEC VR4111 and VR4121. | 26 | * - Added support for NEC VR4111 and VR4121. |
27 | * | 27 | * |
28 | * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 28 | * Yoichi Yuasa <yuasa@linux-mips.org> |
29 | * - Added support for NEC VR4133. | 29 | * - Added support for NEC VR4133. |
30 | */ | 30 | */ |
31 | #include <linux/kernel.h> | 31 | #include <linux/kernel.h> |
diff --git a/arch/mips/vr41xx/common/cmu.c b/arch/mips/vr41xx/common/cmu.c index ad0e8e3409d9..8ba7d04a5ec5 100644 --- a/arch/mips/vr41xx/common/cmu.c +++ b/arch/mips/vr41xx/common/cmu.c | |||
@@ -2,8 +2,8 @@ | |||
2 | * cmu.c, Clock Mask Unit routines for the NEC VR4100 series. | 2 | * cmu.c, Clock Mask Unit routines for the NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2001-2002 MontaVista Software Inc. | 4 | * Copyright (C) 2001-2002 MontaVista Software Inc. |
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> | 5 | * Author: Yoichi Yuasa <source@mvista.com> |
6 | * Copuright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 6 | * Copuright (C) 2003-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -21,11 +21,11 @@ | |||
21 | */ | 21 | */ |
22 | /* | 22 | /* |
23 | * Changes: | 23 | * Changes: |
24 | * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> | 24 | * MontaVista Software Inc. <source@mvista.com> |
25 | * - New creation, NEC VR4122 and VR4131 are supported. | 25 | * - New creation, NEC VR4122 and VR4131 are supported. |
26 | * - Added support for NEC VR4111 and VR4121. | 26 | * - Added support for NEC VR4111 and VR4121. |
27 | * | 27 | * |
28 | * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 28 | * Yoichi Yuasa <yuasa@linux-mips.org> |
29 | * - Added support for NEC VR4133. | 29 | * - Added support for NEC VR4133. |
30 | */ | 30 | */ |
31 | #include <linux/init.h> | 31 | #include <linux/init.h> |
diff --git a/arch/mips/vr41xx/common/giu.c b/arch/mips/vr41xx/common/giu.c index 2b272f1496fe..22cc6f2100a1 100644 --- a/arch/mips/vr41xx/common/giu.c +++ b/arch/mips/vr41xx/common/giu.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * NEC VR4100 series GIU platform device. | 2 | * NEC VR4100 series GIU platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c index 3f23d9fda662..6d39e222b170 100644 --- a/arch/mips/vr41xx/common/icu.c +++ b/arch/mips/vr41xx/common/icu.c | |||
@@ -2,8 +2,8 @@ | |||
2 | * icu.c, Interrupt Control Unit routines for the NEC VR4100 series. | 2 | * icu.c, Interrupt Control Unit routines for the NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2001-2002 MontaVista Software Inc. | 4 | * Copyright (C) 2001-2002 MontaVista Software Inc. |
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> | 5 | * Author: Yoichi Yuasa <source@mvista.com> |
6 | * Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 6 | * Copyright (C) 2003-2006 Yoichi Yuasa <yuasa@linux-mips.org> |
7 | * | 7 | * |
8 | * This program is free software; you can redistribute it and/or modify | 8 | * This program is free software; you can redistribute it and/or modify |
9 | * it under the terms of the GNU General Public License as published by | 9 | * it under the terms of the GNU General Public License as published by |
@@ -21,11 +21,11 @@ | |||
21 | */ | 21 | */ |
22 | /* | 22 | /* |
23 | * Changes: | 23 | * Changes: |
24 | * MontaVista Software Inc. <yyuasa@mvista.com> or <source@mvista.com> | 24 | * MontaVista Software Inc. <source@mvista.com> |
25 | * - New creation, NEC VR4122 and VR4131 are supported. | 25 | * - New creation, NEC VR4122 and VR4131 are supported. |
26 | * - Added support for NEC VR4111 and VR4121. | 26 | * - Added support for NEC VR4111 and VR4121. |
27 | * | 27 | * |
28 | * Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 28 | * Yoichi Yuasa <yuasa@linux-mips.org> |
29 | * - Coped with INTASSIGN of NEC VR4133. | 29 | * - Coped with INTASSIGN of NEC VR4133. |
30 | */ | 30 | */ |
31 | #include <linux/errno.h> | 31 | #include <linux/errno.h> |
diff --git a/arch/mips/vr41xx/common/init.c b/arch/mips/vr41xx/common/init.c index c64995342ba8..1386e6f081c8 100644 --- a/arch/mips/vr41xx/common/init.c +++ b/arch/mips/vr41xx/common/init.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * init.c, Common initialization routines for NEC VR4100 series. | 2 | * init.c, Common initialization routines for NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2003-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/common/irq.c b/arch/mips/vr41xx/common/irq.c index 9cc389109b19..bef06872f012 100644 --- a/arch/mips/vr41xx/common/irq.c +++ b/arch/mips/vr41xx/common/irq.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Interrupt handing routines for NEC VR4100 series. | 2 | * Interrupt handing routines for NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2005-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2005-2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/common/pmu.c b/arch/mips/vr41xx/common/pmu.c index 028aaf75eb21..692b4e85b7fc 100644 --- a/arch/mips/vr41xx/common/pmu.c +++ b/arch/mips/vr41xx/common/pmu.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * pmu.c, Power Management Unit routines for NEC VR4100 series. | 2 | * pmu.c, Power Management Unit routines for NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2003-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2003-2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/common/rtc.c b/arch/mips/vr41xx/common/rtc.c index 9f26c14edcac..ebc5dcf0ed8e 100644 --- a/arch/mips/vr41xx/common/rtc.c +++ b/arch/mips/vr41xx/common/rtc.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * NEC VR4100 series RTC platform device. | 2 | * NEC VR4100 series RTC platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/common/siu.c b/arch/mips/vr41xx/common/siu.c index 654dee6208be..54eae56108fb 100644 --- a/arch/mips/vr41xx/common/siu.c +++ b/arch/mips/vr41xx/common/siu.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * NEC VR4100 series SIU platform device. | 2 | * NEC VR4100 series SIU platform device. |
3 | * | 3 | * |
4 | * Copyright (C) 2007-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/common/type.c b/arch/mips/vr41xx/common/type.c index e0c1ac5e988e..ff841422b638 100644 --- a/arch/mips/vr41xx/common/type.c +++ b/arch/mips/vr41xx/common/type.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * type.c, System type for NEC VR4100 series. | 2 | * type.c, System type for NEC VR4100 series. |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2005 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mips/vr41xx/ibm-workpad/setup.c b/arch/mips/vr41xx/ibm-workpad/setup.c index 9eef297eca1a..3982f378a3e6 100644 --- a/arch/mips/vr41xx/ibm-workpad/setup.c +++ b/arch/mips/vr41xx/ibm-workpad/setup.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * setup.c, Setup for the IBM WorkPad z50. | 2 | * setup.c, Setup for the IBM WorkPad z50. |
3 | * | 3 | * |
4 | * Copyright (C) 2002-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2002-2006 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/arch/mn10300/include/asm/pci.h b/arch/mn10300/include/asm/pci.h index e58b9a46e1b1..35d2ed6396f6 100644 --- a/arch/mn10300/include/asm/pci.h +++ b/arch/mn10300/include/asm/pci.h | |||
@@ -70,10 +70,6 @@ struct pci_dev; | |||
70 | */ | 70 | */ |
71 | #define PCI_DMA_BUS_IS_PHYS (1) | 71 | #define PCI_DMA_BUS_IS_PHYS (1) |
72 | 72 | ||
73 | |||
74 | /* This is always fine. */ | ||
75 | #define pci_dac_dma_supported(pci_dev, mask) (0) | ||
76 | |||
77 | /* Return the index of the PCI controller for device. */ | 73 | /* Return the index of the PCI controller for device. */ |
78 | static inline int pci_controller_num(struct pci_dev *dev) | 74 | static inline int pci_controller_num(struct pci_dev *dev) |
79 | { | 75 | { |
diff --git a/arch/mn10300/kernel/vmlinux.lds.S b/arch/mn10300/kernel/vmlinux.lds.S index bcebcefb4ad7..c96ba3da95ac 100644 --- a/arch/mn10300/kernel/vmlinux.lds.S +++ b/arch/mn10300/kernel/vmlinux.lds.S | |||
@@ -61,7 +61,7 @@ SECTIONS | |||
61 | _edata = .; /* End of data section */ | 61 | _edata = .; /* End of data section */ |
62 | } | 62 | } |
63 | 63 | ||
64 | .data.init_task : { INIT_TASK(THREAD_SIZE); } | 64 | .data.init_task : { INIT_TASK_DATA(THREAD_SIZE); } |
65 | 65 | ||
66 | /* might get freed after init */ | 66 | /* might get freed after init */ |
67 | . = ALIGN(PAGE_SIZE); | 67 | . = ALIGN(PAGE_SIZE); |
diff --git a/arch/parisc/Kconfig b/arch/parisc/Kconfig index 9038f39d9d73..06f8d5b5b0f9 100644 --- a/arch/parisc/Kconfig +++ b/arch/parisc/Kconfig | |||
@@ -16,6 +16,8 @@ config PARISC | |||
16 | select RTC_DRV_GENERIC | 16 | select RTC_DRV_GENERIC |
17 | select INIT_ALL_POSSIBLE | 17 | select INIT_ALL_POSSIBLE |
18 | select BUG | 18 | select BUG |
19 | select HAVE_PERF_COUNTERS | ||
20 | select GENERIC_ATOMIC64 if !64BIT | ||
19 | help | 21 | help |
20 | The PA-RISC microprocessor is designed by Hewlett-Packard and used | 22 | The PA-RISC microprocessor is designed by Hewlett-Packard and used |
21 | in many of their workstations & servers (HP9000 700 and 800 series, | 23 | in many of their workstations & servers (HP9000 700 and 800 series, |
diff --git a/arch/parisc/include/asm/atomic.h b/arch/parisc/include/asm/atomic.h index 7eeaff944360..8bc9e96699b2 100644 --- a/arch/parisc/include/asm/atomic.h +++ b/arch/parisc/include/asm/atomic.h | |||
@@ -222,13 +222,13 @@ static __inline__ int atomic_add_unless(atomic_t *v, int a, int u) | |||
222 | 222 | ||
223 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) | 223 | #define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0) |
224 | 224 | ||
225 | #define atomic_add(i,v) ((void)(__atomic_add_return( ((int)(i)),(v)))) | 225 | #define atomic_add(i,v) ((void)(__atomic_add_return( (i),(v)))) |
226 | #define atomic_sub(i,v) ((void)(__atomic_add_return(-((int)(i)),(v)))) | 226 | #define atomic_sub(i,v) ((void)(__atomic_add_return(-(i),(v)))) |
227 | #define atomic_inc(v) ((void)(__atomic_add_return( 1,(v)))) | 227 | #define atomic_inc(v) ((void)(__atomic_add_return( 1,(v)))) |
228 | #define atomic_dec(v) ((void)(__atomic_add_return( -1,(v)))) | 228 | #define atomic_dec(v) ((void)(__atomic_add_return( -1,(v)))) |
229 | 229 | ||
230 | #define atomic_add_return(i,v) (__atomic_add_return( ((int)(i)),(v))) | 230 | #define atomic_add_return(i,v) (__atomic_add_return( (i),(v))) |
231 | #define atomic_sub_return(i,v) (__atomic_add_return(-((int)(i)),(v))) | 231 | #define atomic_sub_return(i,v) (__atomic_add_return(-(i),(v))) |
232 | #define atomic_inc_return(v) (__atomic_add_return( 1,(v))) | 232 | #define atomic_inc_return(v) (__atomic_add_return( 1,(v))) |
233 | #define atomic_dec_return(v) (__atomic_add_return( -1,(v))) | 233 | #define atomic_dec_return(v) (__atomic_add_return( -1,(v))) |
234 | 234 | ||
@@ -336,7 +336,11 @@ static __inline__ int atomic64_add_unless(atomic64_t *v, long a, long u) | |||
336 | 336 | ||
337 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) | 337 | #define atomic64_inc_not_zero(v) atomic64_add_unless((v), 1, 0) |
338 | 338 | ||
339 | #endif /* CONFIG_64BIT */ | 339 | #else /* CONFIG_64BIT */ |
340 | |||
341 | #include <asm-generic/atomic64.h> | ||
342 | |||
343 | #endif /* !CONFIG_64BIT */ | ||
340 | 344 | ||
341 | #include <asm-generic/atomic-long.h> | 345 | #include <asm-generic/atomic-long.h> |
342 | 346 | ||
diff --git a/arch/parisc/include/asm/dma.h b/arch/parisc/include/asm/dma.h index 31ad0f05af3d..f7a18f968703 100644 --- a/arch/parisc/include/asm/dma.h +++ b/arch/parisc/include/asm/dma.h | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: dma.h,v 1.2 1999/04/27 00:46:18 deller Exp $ | 1 | /* asm/dma.h: Defines for using and allocating dma channels. |
2 | * linux/include/asm/dma.h: Defines for using and allocating dma channels. | ||
3 | * Written by Hennus Bergman, 1992. | 2 | * Written by Hennus Bergman, 1992. |
4 | * High DMA channel support & info by Hannu Savolainen | 3 | * High DMA channel support & info by Hannu Savolainen |
5 | * and John Boyd, Nov. 1992. | 4 | * and John Boyd, Nov. 1992. |
diff --git a/arch/parisc/include/asm/perf_counter.h b/arch/parisc/include/asm/perf_counter.h new file mode 100644 index 000000000000..dc9e829f7013 --- /dev/null +++ b/arch/parisc/include/asm/perf_counter.h | |||
@@ -0,0 +1,7 @@ | |||
1 | #ifndef __ASM_PARISC_PERF_COUNTER_H | ||
2 | #define __ASM_PARISC_PERF_COUNTER_H | ||
3 | |||
4 | /* parisc only supports software counters through this interface. */ | ||
5 | static inline void set_perf_counter_pending(void) { } | ||
6 | |||
7 | #endif /* __ASM_PARISC_PERF_COUNTER_H */ | ||
diff --git a/arch/parisc/include/asm/processor.h b/arch/parisc/include/asm/processor.h index 9d64df8754ba..9ce66e9d1c2b 100644 --- a/arch/parisc/include/asm/processor.h +++ b/arch/parisc/include/asm/processor.h | |||
@@ -18,6 +18,7 @@ | |||
18 | #include <asm/types.h> | 18 | #include <asm/types.h> |
19 | #include <asm/system.h> | 19 | #include <asm/system.h> |
20 | #include <asm/percpu.h> | 20 | #include <asm/percpu.h> |
21 | |||
21 | #endif /* __ASSEMBLY__ */ | 22 | #endif /* __ASSEMBLY__ */ |
22 | 23 | ||
23 | #define KERNEL_STACK_SIZE (4*PAGE_SIZE) | 24 | #define KERNEL_STACK_SIZE (4*PAGE_SIZE) |
@@ -127,6 +128,8 @@ struct thread_struct { | |||
127 | unsigned long flags; | 128 | unsigned long flags; |
128 | }; | 129 | }; |
129 | 130 | ||
131 | #define task_pt_regs(tsk) ((struct pt_regs *)&((tsk)->thread.regs)) | ||
132 | |||
130 | /* Thread struct flags. */ | 133 | /* Thread struct flags. */ |
131 | #define PARISC_UAC_NOPRINT (1UL << 0) /* see prctl and unaligned.c */ | 134 | #define PARISC_UAC_NOPRINT (1UL << 0) /* see prctl and unaligned.c */ |
132 | #define PARISC_UAC_SIGBUS (1UL << 1) | 135 | #define PARISC_UAC_SIGBUS (1UL << 1) |
diff --git a/arch/parisc/include/asm/system.h b/arch/parisc/include/asm/system.h index ee80c920b464..d91357bca5b4 100644 --- a/arch/parisc/include/asm/system.h +++ b/arch/parisc/include/asm/system.h | |||
@@ -168,8 +168,8 @@ static inline void set_eiem(unsigned long val) | |||
168 | /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ | 168 | /* LDCW, the only atomic read-write operation PA-RISC has. *sigh*. */ |
169 | #define __ldcw(a) ({ \ | 169 | #define __ldcw(a) ({ \ |
170 | unsigned __ret; \ | 170 | unsigned __ret; \ |
171 | __asm__ __volatile__(__LDCW " 0(%1),%0" \ | 171 | __asm__ __volatile__(__LDCW " 0(%2),%0" \ |
172 | : "=r" (__ret) : "r" (a)); \ | 172 | : "=r" (__ret), "+m" (*(a)) : "r" (a)); \ |
173 | __ret; \ | 173 | __ret; \ |
174 | }) | 174 | }) |
175 | 175 | ||
diff --git a/arch/parisc/include/asm/tlbflush.h b/arch/parisc/include/asm/tlbflush.h index 1f6fd4fc05b9..8f1a8100bf2d 100644 --- a/arch/parisc/include/asm/tlbflush.h +++ b/arch/parisc/include/asm/tlbflush.h | |||
@@ -12,14 +12,12 @@ | |||
12 | * N class systems, only one PxTLB inter processor broadcast can be | 12 | * N class systems, only one PxTLB inter processor broadcast can be |
13 | * active at any one time on the Merced bus. This tlb purge | 13 | * active at any one time on the Merced bus. This tlb purge |
14 | * synchronisation is fairly lightweight and harmless so we activate | 14 | * synchronisation is fairly lightweight and harmless so we activate |
15 | * it on all SMP systems not just the N class. We also need to have | 15 | * it on all systems not just the N class. |
16 | * preemption disabled on uniprocessor machines, and spin_lock does that | ||
17 | * nicely. | ||
18 | */ | 16 | */ |
19 | extern spinlock_t pa_tlb_lock; | 17 | extern spinlock_t pa_tlb_lock; |
20 | 18 | ||
21 | #define purge_tlb_start(x) spin_lock(&pa_tlb_lock) | 19 | #define purge_tlb_start(flags) spin_lock_irqsave(&pa_tlb_lock, flags) |
22 | #define purge_tlb_end(x) spin_unlock(&pa_tlb_lock) | 20 | #define purge_tlb_end(flags) spin_unlock_irqrestore(&pa_tlb_lock, flags) |
23 | 21 | ||
24 | extern void flush_tlb_all(void); | 22 | extern void flush_tlb_all(void); |
25 | extern void flush_tlb_all_local(void *); | 23 | extern void flush_tlb_all_local(void *); |
@@ -63,14 +61,16 @@ static inline void flush_tlb_mm(struct mm_struct *mm) | |||
63 | static inline void flush_tlb_page(struct vm_area_struct *vma, | 61 | static inline void flush_tlb_page(struct vm_area_struct *vma, |
64 | unsigned long addr) | 62 | unsigned long addr) |
65 | { | 63 | { |
64 | unsigned long flags; | ||
65 | |||
66 | /* For one page, it's not worth testing the split_tlb variable */ | 66 | /* For one page, it's not worth testing the split_tlb variable */ |
67 | 67 | ||
68 | mb(); | 68 | mb(); |
69 | mtsp(vma->vm_mm->context,1); | 69 | mtsp(vma->vm_mm->context,1); |
70 | purge_tlb_start(); | 70 | purge_tlb_start(flags); |
71 | pdtlb(addr); | 71 | pdtlb(addr); |
72 | pitlb(addr); | 72 | pitlb(addr); |
73 | purge_tlb_end(); | 73 | purge_tlb_end(flags); |
74 | } | 74 | } |
75 | 75 | ||
76 | void __flush_tlb_range(unsigned long sid, | 76 | void __flush_tlb_range(unsigned long sid, |
diff --git a/arch/parisc/include/asm/unistd.h b/arch/parisc/include/asm/unistd.h index ef26b009dc5d..f3d3b8b012c4 100644 --- a/arch/parisc/include/asm/unistd.h +++ b/arch/parisc/include/asm/unistd.h | |||
@@ -807,8 +807,12 @@ | |||
807 | #define __NR_dup3 (__NR_Linux + 312) | 807 | #define __NR_dup3 (__NR_Linux + 312) |
808 | #define __NR_pipe2 (__NR_Linux + 313) | 808 | #define __NR_pipe2 (__NR_Linux + 313) |
809 | #define __NR_inotify_init1 (__NR_Linux + 314) | 809 | #define __NR_inotify_init1 (__NR_Linux + 314) |
810 | #define __NR_preadv (__NR_Linux + 315) | ||
811 | #define __NR_pwritev (__NR_Linux + 316) | ||
812 | #define __NR_rt_tgsigqueueinfo (__NR_Linux + 317) | ||
813 | #define __NR_perf_counter_open (__NR_Linux + 318) | ||
810 | 814 | ||
811 | #define __NR_Linux_syscalls (__NR_inotify_init1 + 1) | 815 | #define __NR_Linux_syscalls (__NR_perf_counter_open + 1) |
812 | 816 | ||
813 | 817 | ||
814 | #define __IGNORE_select /* newselect */ | 818 | #define __IGNORE_select /* newselect */ |
diff --git a/arch/parisc/kernel/cache.c b/arch/parisc/kernel/cache.c index 837530ea32e7..b6ed34de14e1 100644 --- a/arch/parisc/kernel/cache.c +++ b/arch/parisc/kernel/cache.c | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: cache.c,v 1.4 2000/01/25 00:11:38 prumpf Exp $ | 1 | /* |
2 | * | ||
3 | * This file is subject to the terms and conditions of the GNU General Public | 2 | * This file is subject to the terms and conditions of the GNU General Public |
4 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
5 | * for more details. | 4 | * for more details. |
@@ -398,12 +397,13 @@ EXPORT_SYMBOL(flush_kernel_icache_range_asm); | |||
398 | 397 | ||
399 | void clear_user_page_asm(void *page, unsigned long vaddr) | 398 | void clear_user_page_asm(void *page, unsigned long vaddr) |
400 | { | 399 | { |
400 | unsigned long flags; | ||
401 | /* This function is implemented in assembly in pacache.S */ | 401 | /* This function is implemented in assembly in pacache.S */ |
402 | extern void __clear_user_page_asm(void *page, unsigned long vaddr); | 402 | extern void __clear_user_page_asm(void *page, unsigned long vaddr); |
403 | 403 | ||
404 | purge_tlb_start(); | 404 | purge_tlb_start(flags); |
405 | __clear_user_page_asm(page, vaddr); | 405 | __clear_user_page_asm(page, vaddr); |
406 | purge_tlb_end(); | 406 | purge_tlb_end(flags); |
407 | } | 407 | } |
408 | 408 | ||
409 | #define FLUSH_THRESHOLD 0x80000 /* 0.5MB */ | 409 | #define FLUSH_THRESHOLD 0x80000 /* 0.5MB */ |
@@ -444,20 +444,24 @@ extern void clear_user_page_asm(void *page, unsigned long vaddr); | |||
444 | 444 | ||
445 | void clear_user_page(void *page, unsigned long vaddr, struct page *pg) | 445 | void clear_user_page(void *page, unsigned long vaddr, struct page *pg) |
446 | { | 446 | { |
447 | unsigned long flags; | ||
448 | |||
447 | purge_kernel_dcache_page((unsigned long)page); | 449 | purge_kernel_dcache_page((unsigned long)page); |
448 | purge_tlb_start(); | 450 | purge_tlb_start(flags); |
449 | pdtlb_kernel(page); | 451 | pdtlb_kernel(page); |
450 | purge_tlb_end(); | 452 | purge_tlb_end(flags); |
451 | clear_user_page_asm(page, vaddr); | 453 | clear_user_page_asm(page, vaddr); |
452 | } | 454 | } |
453 | EXPORT_SYMBOL(clear_user_page); | 455 | EXPORT_SYMBOL(clear_user_page); |
454 | 456 | ||
455 | void flush_kernel_dcache_page_addr(void *addr) | 457 | void flush_kernel_dcache_page_addr(void *addr) |
456 | { | 458 | { |
459 | unsigned long flags; | ||
460 | |||
457 | flush_kernel_dcache_page_asm(addr); | 461 | flush_kernel_dcache_page_asm(addr); |
458 | purge_tlb_start(); | 462 | purge_tlb_start(flags); |
459 | pdtlb_kernel(addr); | 463 | pdtlb_kernel(addr); |
460 | purge_tlb_end(); | 464 | purge_tlb_end(flags); |
461 | } | 465 | } |
462 | EXPORT_SYMBOL(flush_kernel_dcache_page_addr); | 466 | EXPORT_SYMBOL(flush_kernel_dcache_page_addr); |
463 | 467 | ||
@@ -490,8 +494,10 @@ void __flush_tlb_range(unsigned long sid, unsigned long start, | |||
490 | if (npages >= 512) /* 2MB of space: arbitrary, should be tuned */ | 494 | if (npages >= 512) /* 2MB of space: arbitrary, should be tuned */ |
491 | flush_tlb_all(); | 495 | flush_tlb_all(); |
492 | else { | 496 | else { |
497 | unsigned long flags; | ||
498 | |||
493 | mtsp(sid, 1); | 499 | mtsp(sid, 1); |
494 | purge_tlb_start(); | 500 | purge_tlb_start(flags); |
495 | if (split_tlb) { | 501 | if (split_tlb) { |
496 | while (npages--) { | 502 | while (npages--) { |
497 | pdtlb(start); | 503 | pdtlb(start); |
@@ -504,7 +510,7 @@ void __flush_tlb_range(unsigned long sid, unsigned long start, | |||
504 | start += PAGE_SIZE; | 510 | start += PAGE_SIZE; |
505 | } | 511 | } |
506 | } | 512 | } |
507 | purge_tlb_end(); | 513 | purge_tlb_end(flags); |
508 | } | 514 | } |
509 | } | 515 | } |
510 | 516 | ||
diff --git a/arch/parisc/kernel/inventory.c b/arch/parisc/kernel/inventory.c index bd1f7f1ff74e..d228d8237879 100644 --- a/arch/parisc/kernel/inventory.c +++ b/arch/parisc/kernel/inventory.c | |||
@@ -170,23 +170,27 @@ static void __init pagezero_memconfig(void) | |||
170 | static int __init | 170 | static int __init |
171 | pat_query_module(ulong pcell_loc, ulong mod_index) | 171 | pat_query_module(ulong pcell_loc, ulong mod_index) |
172 | { | 172 | { |
173 | pdc_pat_cell_mod_maddr_block_t pa_pdc_cell; | 173 | pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell; |
174 | unsigned long bytecnt; | 174 | unsigned long bytecnt; |
175 | unsigned long temp; /* 64-bit scratch value */ | 175 | unsigned long temp; /* 64-bit scratch value */ |
176 | long status; /* PDC return value status */ | 176 | long status; /* PDC return value status */ |
177 | struct parisc_device *dev; | 177 | struct parisc_device *dev; |
178 | 178 | ||
179 | pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL); | ||
180 | if (!pa_pdc_cell) | ||
181 | panic("couldn't allocate memory for PDC_PAT_CELL!"); | ||
182 | |||
179 | /* return cell module (PA or Processor view) */ | 183 | /* return cell module (PA or Processor view) */ |
180 | status = pdc_pat_cell_module(&bytecnt, pcell_loc, mod_index, | 184 | status = pdc_pat_cell_module(&bytecnt, pcell_loc, mod_index, |
181 | PA_VIEW, &pa_pdc_cell); | 185 | PA_VIEW, pa_pdc_cell); |
182 | 186 | ||
183 | if (status != PDC_OK) { | 187 | if (status != PDC_OK) { |
184 | /* no more cell modules or error */ | 188 | /* no more cell modules or error */ |
185 | return status; | 189 | return status; |
186 | } | 190 | } |
187 | 191 | ||
188 | temp = pa_pdc_cell.cba; | 192 | temp = pa_pdc_cell->cba; |
189 | dev = alloc_pa_dev(PAT_GET_CBA(temp), &pa_pdc_cell.mod_path); | 193 | dev = alloc_pa_dev(PAT_GET_CBA(temp), &(pa_pdc_cell->mod_path)); |
190 | if (!dev) { | 194 | if (!dev) { |
191 | return PDC_OK; | 195 | return PDC_OK; |
192 | } | 196 | } |
@@ -203,8 +207,8 @@ pat_query_module(ulong pcell_loc, ulong mod_index) | |||
203 | 207 | ||
204 | /* save generic info returned from the call */ | 208 | /* save generic info returned from the call */ |
205 | /* REVISIT: who is the consumer of this? not sure yet... */ | 209 | /* REVISIT: who is the consumer of this? not sure yet... */ |
206 | dev->mod_info = pa_pdc_cell.mod_info; /* pass to PAT_GET_ENTITY() */ | 210 | dev->mod_info = pa_pdc_cell->mod_info; /* pass to PAT_GET_ENTITY() */ |
207 | dev->pmod_loc = pa_pdc_cell.mod_location; | 211 | dev->pmod_loc = pa_pdc_cell->mod_location; |
208 | 212 | ||
209 | register_parisc_device(dev); /* advertise device */ | 213 | register_parisc_device(dev); /* advertise device */ |
210 | 214 | ||
@@ -216,14 +220,14 @@ pat_query_module(ulong pcell_loc, ulong mod_index) | |||
216 | 220 | ||
217 | case PAT_ENTITY_PROC: | 221 | case PAT_ENTITY_PROC: |
218 | printk(KERN_DEBUG "PAT_ENTITY_PROC: id_eid 0x%lx\n", | 222 | printk(KERN_DEBUG "PAT_ENTITY_PROC: id_eid 0x%lx\n", |
219 | pa_pdc_cell.mod[0]); | 223 | pa_pdc_cell->mod[0]); |
220 | break; | 224 | break; |
221 | 225 | ||
222 | case PAT_ENTITY_MEM: | 226 | case PAT_ENTITY_MEM: |
223 | printk(KERN_DEBUG | 227 | printk(KERN_DEBUG |
224 | "PAT_ENTITY_MEM: amount 0x%lx min_gni_base 0x%lx min_gni_len 0x%lx\n", | 228 | "PAT_ENTITY_MEM: amount 0x%lx min_gni_base 0x%lx min_gni_len 0x%lx\n", |
225 | pa_pdc_cell.mod[0], pa_pdc_cell.mod[1], | 229 | pa_pdc_cell->mod[0], pa_pdc_cell->mod[1], |
226 | pa_pdc_cell.mod[2]); | 230 | pa_pdc_cell->mod[2]); |
227 | break; | 231 | break; |
228 | case PAT_ENTITY_CA: | 232 | case PAT_ENTITY_CA: |
229 | printk(KERN_DEBUG "PAT_ENTITY_CA: %ld\n", pcell_loc); | 233 | printk(KERN_DEBUG "PAT_ENTITY_CA: %ld\n", pcell_loc); |
@@ -243,23 +247,26 @@ pat_query_module(ulong pcell_loc, ulong mod_index) | |||
243 | print_ranges: | 247 | print_ranges: |
244 | pdc_pat_cell_module(&bytecnt, pcell_loc, mod_index, | 248 | pdc_pat_cell_module(&bytecnt, pcell_loc, mod_index, |
245 | IO_VIEW, &io_pdc_cell); | 249 | IO_VIEW, &io_pdc_cell); |
246 | printk(KERN_DEBUG "ranges %ld\n", pa_pdc_cell.mod[1]); | 250 | printk(KERN_DEBUG "ranges %ld\n", pa_pdc_cell->mod[1]); |
247 | for (i = 0; i < pa_pdc_cell.mod[1]; i++) { | 251 | for (i = 0; i < pa_pdc_cell->mod[1]; i++) { |
248 | printk(KERN_DEBUG | 252 | printk(KERN_DEBUG |
249 | " PA_VIEW %ld: 0x%016lx 0x%016lx 0x%016lx\n", | 253 | " PA_VIEW %ld: 0x%016lx 0x%016lx 0x%016lx\n", |
250 | i, pa_pdc_cell.mod[2 + i * 3], /* type */ | 254 | i, pa_pdc_cell->mod[2 + i * 3], /* type */ |
251 | pa_pdc_cell.mod[3 + i * 3], /* start */ | 255 | pa_pdc_cell->mod[3 + i * 3], /* start */ |
252 | pa_pdc_cell.mod[4 + i * 3]); /* finish (ie end) */ | 256 | pa_pdc_cell->mod[4 + i * 3]); /* finish (ie end) */ |
253 | printk(KERN_DEBUG | 257 | printk(KERN_DEBUG |
254 | " IO_VIEW %ld: 0x%016lx 0x%016lx 0x%016lx\n", | 258 | " IO_VIEW %ld: 0x%016lx 0x%016lx 0x%016lx\n", |
255 | i, io_pdc_cell.mod[2 + i * 3], /* type */ | 259 | i, io_pdc_cell->mod[2 + i * 3], /* type */ |
256 | io_pdc_cell.mod[3 + i * 3], /* start */ | 260 | io_pdc_cell->mod[3 + i * 3], /* start */ |
257 | io_pdc_cell.mod[4 + i * 3]); /* finish (ie end) */ | 261 | io_pdc_cell->mod[4 + i * 3]); /* finish (ie end) */ |
258 | } | 262 | } |
259 | printk(KERN_DEBUG "\n"); | 263 | printk(KERN_DEBUG "\n"); |
260 | break; | 264 | break; |
261 | } | 265 | } |
262 | #endif /* DEBUG_PAT */ | 266 | #endif /* DEBUG_PAT */ |
267 | |||
268 | kfree(pa_pdc_cell); | ||
269 | |||
263 | return PDC_OK; | 270 | return PDC_OK; |
264 | } | 271 | } |
265 | 272 | ||
diff --git a/arch/parisc/kernel/irq.c b/arch/parisc/kernel/irq.c index 8007f1e65729..330f536a9324 100644 --- a/arch/parisc/kernel/irq.c +++ b/arch/parisc/kernel/irq.c | |||
@@ -120,7 +120,7 @@ int cpu_check_affinity(unsigned int irq, const struct cpumask *dest) | |||
120 | if (CHECK_IRQ_PER_CPU(irq)) { | 120 | if (CHECK_IRQ_PER_CPU(irq)) { |
121 | /* Bad linux design decision. The mask has already | 121 | /* Bad linux design decision. The mask has already |
122 | * been set; we must reset it */ | 122 | * been set; we must reset it */ |
123 | cpumask_setall(&irq_desc[irq].affinity); | 123 | cpumask_setall(irq_desc[irq].affinity); |
124 | return -EINVAL; | 124 | return -EINVAL; |
125 | } | 125 | } |
126 | 126 | ||
@@ -138,13 +138,13 @@ static int cpu_set_affinity_irq(unsigned int irq, const struct cpumask *dest) | |||
138 | if (cpu_dest < 0) | 138 | if (cpu_dest < 0) |
139 | return -1; | 139 | return -1; |
140 | 140 | ||
141 | cpumask_copy(&irq_desc[irq].affinity, dest); | 141 | cpumask_copy(irq_desc[irq].affinity, dest); |
142 | 142 | ||
143 | return 0; | 143 | return 0; |
144 | } | 144 | } |
145 | #endif | 145 | #endif |
146 | 146 | ||
147 | static struct hw_interrupt_type cpu_interrupt_type = { | 147 | static struct irq_chip cpu_interrupt_type = { |
148 | .typename = "CPU", | 148 | .typename = "CPU", |
149 | .startup = cpu_startup_irq, | 149 | .startup = cpu_startup_irq, |
150 | .shutdown = cpu_disable_irq, | 150 | .shutdown = cpu_disable_irq, |
@@ -299,7 +299,7 @@ int txn_alloc_irq(unsigned int bits_wide) | |||
299 | unsigned long txn_affinity_addr(unsigned int irq, int cpu) | 299 | unsigned long txn_affinity_addr(unsigned int irq, int cpu) |
300 | { | 300 | { |
301 | #ifdef CONFIG_SMP | 301 | #ifdef CONFIG_SMP |
302 | cpumask_copy(&irq_desc[irq].affinity, cpumask_of(cpu)); | 302 | cpumask_copy(irq_desc[irq].affinity, cpumask_of(cpu)); |
303 | #endif | 303 | #endif |
304 | 304 | ||
305 | return per_cpu(cpu_data, cpu).txn_addr; | 305 | return per_cpu(cpu_data, cpu).txn_addr; |
@@ -356,7 +356,7 @@ void do_cpu_irq_mask(struct pt_regs *regs) | |||
356 | irq = eirr_to_irq(eirr_val); | 356 | irq = eirr_to_irq(eirr_val); |
357 | 357 | ||
358 | #ifdef CONFIG_SMP | 358 | #ifdef CONFIG_SMP |
359 | cpumask_copy(&dest, &irq_desc[irq].affinity); | 359 | cpumask_copy(&dest, irq_desc[irq].affinity); |
360 | if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) && | 360 | if (CHECK_IRQ_PER_CPU(irq_desc[irq].status) && |
361 | !cpu_isset(smp_processor_id(), dest)) { | 361 | !cpu_isset(smp_processor_id(), dest)) { |
362 | int cpu = first_cpu(dest); | 362 | int cpu = first_cpu(dest); |
diff --git a/arch/parisc/kernel/pci-dma.c b/arch/parisc/kernel/pci-dma.c index 7d927eac932b..c07f618ff7da 100644 --- a/arch/parisc/kernel/pci-dma.c +++ b/arch/parisc/kernel/pci-dma.c | |||
@@ -90,12 +90,14 @@ static inline int map_pte_uncached(pte_t * pte, | |||
90 | if (end > PMD_SIZE) | 90 | if (end > PMD_SIZE) |
91 | end = PMD_SIZE; | 91 | end = PMD_SIZE; |
92 | do { | 92 | do { |
93 | unsigned long flags; | ||
94 | |||
93 | if (!pte_none(*pte)) | 95 | if (!pte_none(*pte)) |
94 | printk(KERN_ERR "map_pte_uncached: page already exists\n"); | 96 | printk(KERN_ERR "map_pte_uncached: page already exists\n"); |
95 | set_pte(pte, __mk_pte(*paddr_ptr, PAGE_KERNEL_UNC)); | 97 | set_pte(pte, __mk_pte(*paddr_ptr, PAGE_KERNEL_UNC)); |
96 | purge_tlb_start(); | 98 | purge_tlb_start(flags); |
97 | pdtlb_kernel(orig_vaddr); | 99 | pdtlb_kernel(orig_vaddr); |
98 | purge_tlb_end(); | 100 | purge_tlb_end(flags); |
99 | vaddr += PAGE_SIZE; | 101 | vaddr += PAGE_SIZE; |
100 | orig_vaddr += PAGE_SIZE; | 102 | orig_vaddr += PAGE_SIZE; |
101 | (*paddr_ptr) += PAGE_SIZE; | 103 | (*paddr_ptr) += PAGE_SIZE; |
@@ -168,11 +170,13 @@ static inline void unmap_uncached_pte(pmd_t * pmd, unsigned long vaddr, | |||
168 | if (end > PMD_SIZE) | 170 | if (end > PMD_SIZE) |
169 | end = PMD_SIZE; | 171 | end = PMD_SIZE; |
170 | do { | 172 | do { |
173 | unsigned long flags; | ||
171 | pte_t page = *pte; | 174 | pte_t page = *pte; |
175 | |||
172 | pte_clear(&init_mm, vaddr, pte); | 176 | pte_clear(&init_mm, vaddr, pte); |
173 | purge_tlb_start(); | 177 | purge_tlb_start(flags); |
174 | pdtlb_kernel(orig_vaddr); | 178 | pdtlb_kernel(orig_vaddr); |
175 | purge_tlb_end(); | 179 | purge_tlb_end(flags); |
176 | vaddr += PAGE_SIZE; | 180 | vaddr += PAGE_SIZE; |
177 | orig_vaddr += PAGE_SIZE; | 181 | orig_vaddr += PAGE_SIZE; |
178 | pte++; | 182 | pte++; |
diff --git a/arch/parisc/kernel/pci.c b/arch/parisc/kernel/pci.c index 6936386c9861..f7064abc3bb6 100644 --- a/arch/parisc/kernel/pci.c +++ b/arch/parisc/kernel/pci.c | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: pci.c,v 1.6 2000/01/29 00:12:05 grundler Exp $ | 1 | /* |
2 | * | ||
3 | * This file is subject to the terms and conditions of the GNU General Public | 2 | * This file is subject to the terms and conditions of the GNU General Public |
4 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
5 | * for more details. | 4 | * for more details. |
diff --git a/arch/parisc/kernel/processor.c b/arch/parisc/kernel/processor.c index e09d0f7fb6b0..c8fb61ed32f4 100644 --- a/arch/parisc/kernel/processor.c +++ b/arch/parisc/kernel/processor.c | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: processor.c,v 1.1 2002/07/20 16:27:06 rhirst Exp $ | 1 | /* |
2 | * | ||
3 | * Initial setup-routines for HP 9000 based hardware. | 2 | * Initial setup-routines for HP 9000 based hardware. |
4 | * | 3 | * |
5 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | 4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds |
@@ -121,22 +120,28 @@ static int __cpuinit processor_probe(struct parisc_device *dev) | |||
121 | if (is_pdc_pat()) { | 120 | if (is_pdc_pat()) { |
122 | ulong status; | 121 | ulong status; |
123 | unsigned long bytecnt; | 122 | unsigned long bytecnt; |
124 | pdc_pat_cell_mod_maddr_block_t pa_pdc_cell; | 123 | pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell; |
125 | #undef USE_PAT_CPUID | 124 | #undef USE_PAT_CPUID |
126 | #ifdef USE_PAT_CPUID | 125 | #ifdef USE_PAT_CPUID |
127 | struct pdc_pat_cpu_num cpu_info; | 126 | struct pdc_pat_cpu_num cpu_info; |
128 | #endif | 127 | #endif |
129 | 128 | ||
129 | pa_pdc_cell = kmalloc(sizeof (*pa_pdc_cell), GFP_KERNEL); | ||
130 | if (!pa_pdc_cell) | ||
131 | panic("couldn't allocate memory for PDC_PAT_CELL!"); | ||
132 | |||
130 | status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc, | 133 | status = pdc_pat_cell_module(&bytecnt, dev->pcell_loc, |
131 | dev->mod_index, PA_VIEW, &pa_pdc_cell); | 134 | dev->mod_index, PA_VIEW, pa_pdc_cell); |
132 | 135 | ||
133 | BUG_ON(PDC_OK != status); | 136 | BUG_ON(PDC_OK != status); |
134 | 137 | ||
135 | /* verify it's the same as what do_pat_inventory() found */ | 138 | /* verify it's the same as what do_pat_inventory() found */ |
136 | BUG_ON(dev->mod_info != pa_pdc_cell.mod_info); | 139 | BUG_ON(dev->mod_info != pa_pdc_cell->mod_info); |
137 | BUG_ON(dev->pmod_loc != pa_pdc_cell.mod_location); | 140 | BUG_ON(dev->pmod_loc != pa_pdc_cell->mod_location); |
141 | |||
142 | txn_addr = pa_pdc_cell->mod[0]; /* id_eid for IO sapic */ | ||
138 | 143 | ||
139 | txn_addr = pa_pdc_cell.mod[0]; /* id_eid for IO sapic */ | 144 | kfree(pa_pdc_cell); |
140 | 145 | ||
141 | #ifdef USE_PAT_CPUID | 146 | #ifdef USE_PAT_CPUID |
142 | /* We need contiguous numbers for cpuid. Firmware's notion | 147 | /* We need contiguous numbers for cpuid. Firmware's notion |
diff --git a/arch/parisc/kernel/setup.c b/arch/parisc/kernel/setup.c index 82131ca8e05c..cb71f3dac995 100644 --- a/arch/parisc/kernel/setup.c +++ b/arch/parisc/kernel/setup.c | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: setup.c,v 1.8 2000/02/02 04:42:38 prumpf Exp $ | 1 | /* |
2 | * | ||
3 | * Initial setup-routines for HP 9000 based hardware. | 2 | * Initial setup-routines for HP 9000 based hardware. |
4 | * | 3 | * |
5 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds | 4 | * Copyright (C) 1991, 1992, 1995 Linus Torvalds |
diff --git a/arch/parisc/kernel/sys_parisc32.c b/arch/parisc/kernel/sys_parisc32.c index 1adb40c81669..92a0acaa0d12 100644 --- a/arch/parisc/kernel/sys_parisc32.c +++ b/arch/parisc/kernel/sys_parisc32.c | |||
@@ -174,68 +174,6 @@ asmlinkage long sys32_sched_rr_get_interval(pid_t pid, | |||
174 | return ret; | 174 | return ret; |
175 | } | 175 | } |
176 | 176 | ||
177 | /*** copied from mips64 ***/ | ||
178 | /* | ||
179 | * Ooo, nasty. We need here to frob 32-bit unsigned longs to | ||
180 | * 64-bit unsigned longs. | ||
181 | */ | ||
182 | |||
183 | static inline int | ||
184 | get_fd_set32(unsigned long n, u32 *ufdset, unsigned long *fdset) | ||
185 | { | ||
186 | n = (n + 8*sizeof(u32) - 1) / (8*sizeof(u32)); | ||
187 | if (ufdset) { | ||
188 | unsigned long odd; | ||
189 | |||
190 | if (!access_ok(VERIFY_WRITE, ufdset, n*sizeof(u32))) | ||
191 | return -EFAULT; | ||
192 | |||
193 | odd = n & 1UL; | ||
194 | n &= ~1UL; | ||
195 | while (n) { | ||
196 | unsigned long h, l; | ||
197 | __get_user(l, ufdset); | ||
198 | __get_user(h, ufdset+1); | ||
199 | ufdset += 2; | ||
200 | *fdset++ = h << 32 | l; | ||
201 | n -= 2; | ||
202 | } | ||
203 | if (odd) | ||
204 | __get_user(*fdset, ufdset); | ||
205 | } else { | ||
206 | /* Tricky, must clear full unsigned long in the | ||
207 | * kernel fdset at the end, this makes sure that | ||
208 | * actually happens. | ||
209 | */ | ||
210 | memset(fdset, 0, ((n + 1) & ~1)*sizeof(u32)); | ||
211 | } | ||
212 | return 0; | ||
213 | } | ||
214 | |||
215 | static inline void | ||
216 | set_fd_set32(unsigned long n, u32 *ufdset, unsigned long *fdset) | ||
217 | { | ||
218 | unsigned long odd; | ||
219 | n = (n + 8*sizeof(u32) - 1) / (8*sizeof(u32)); | ||
220 | |||
221 | if (!ufdset) | ||
222 | return; | ||
223 | |||
224 | odd = n & 1UL; | ||
225 | n &= ~1UL; | ||
226 | while (n) { | ||
227 | unsigned long h, l; | ||
228 | l = *fdset++; | ||
229 | h = l >> 32; | ||
230 | __put_user(l, ufdset); | ||
231 | __put_user(h, ufdset+1); | ||
232 | ufdset += 2; | ||
233 | n -= 2; | ||
234 | } | ||
235 | if (odd) | ||
236 | __put_user(*fdset, ufdset); | ||
237 | } | ||
238 | |||
239 | struct msgbuf32 { | 177 | struct msgbuf32 { |
240 | int mtype; | 178 | int mtype; |
241 | char mtext[1]; | 179 | char mtext[1]; |
diff --git a/arch/parisc/kernel/syscall_table.S b/arch/parisc/kernel/syscall_table.S index 03b9a01bc16c..cf145eb026b3 100644 --- a/arch/parisc/kernel/syscall_table.S +++ b/arch/parisc/kernel/syscall_table.S | |||
@@ -413,6 +413,10 @@ | |||
413 | ENTRY_SAME(dup3) | 413 | ENTRY_SAME(dup3) |
414 | ENTRY_SAME(pipe2) | 414 | ENTRY_SAME(pipe2) |
415 | ENTRY_SAME(inotify_init1) | 415 | ENTRY_SAME(inotify_init1) |
416 | ENTRY_COMP(preadv) /* 315 */ | ||
417 | ENTRY_COMP(pwritev) | ||
418 | ENTRY_COMP(rt_tgsigqueueinfo) | ||
419 | ENTRY_SAME(perf_counter_open) | ||
416 | 420 | ||
417 | /* Nothing yet */ | 421 | /* Nothing yet */ |
418 | 422 | ||
diff --git a/arch/parisc/kernel/time.c b/arch/parisc/kernel/time.c index d4dd05674c62..a79c6f9e7e2c 100644 --- a/arch/parisc/kernel/time.c +++ b/arch/parisc/kernel/time.c | |||
@@ -56,9 +56,9 @@ static unsigned long clocktick __read_mostly; /* timer cycles per tick */ | |||
56 | */ | 56 | */ |
57 | irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id) | 57 | irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id) |
58 | { | 58 | { |
59 | unsigned long now; | 59 | unsigned long now, now2; |
60 | unsigned long next_tick; | 60 | unsigned long next_tick; |
61 | unsigned long cycles_elapsed, ticks_elapsed; | 61 | unsigned long cycles_elapsed, ticks_elapsed = 1; |
62 | unsigned long cycles_remainder; | 62 | unsigned long cycles_remainder; |
63 | unsigned int cpu = smp_processor_id(); | 63 | unsigned int cpu = smp_processor_id(); |
64 | struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu); | 64 | struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu); |
@@ -71,44 +71,24 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id) | |||
71 | /* Initialize next_tick to the expected tick time. */ | 71 | /* Initialize next_tick to the expected tick time. */ |
72 | next_tick = cpuinfo->it_value; | 72 | next_tick = cpuinfo->it_value; |
73 | 73 | ||
74 | /* Get current interval timer. | 74 | /* Get current cycle counter (Control Register 16). */ |
75 | * CR16 reads as 64 bits in CPU wide mode. | ||
76 | * CR16 reads as 32 bits in CPU narrow mode. | ||
77 | */ | ||
78 | now = mfctl(16); | 75 | now = mfctl(16); |
79 | 76 | ||
80 | cycles_elapsed = now - next_tick; | 77 | cycles_elapsed = now - next_tick; |
81 | 78 | ||
82 | if ((cycles_elapsed >> 5) < cpt) { | 79 | if ((cycles_elapsed >> 6) < cpt) { |
83 | /* use "cheap" math (add/subtract) instead | 80 | /* use "cheap" math (add/subtract) instead |
84 | * of the more expensive div/mul method | 81 | * of the more expensive div/mul method |
85 | */ | 82 | */ |
86 | cycles_remainder = cycles_elapsed; | 83 | cycles_remainder = cycles_elapsed; |
87 | ticks_elapsed = 1; | ||
88 | while (cycles_remainder > cpt) { | 84 | while (cycles_remainder > cpt) { |
89 | cycles_remainder -= cpt; | 85 | cycles_remainder -= cpt; |
90 | ticks_elapsed++; | 86 | ticks_elapsed++; |
91 | } | 87 | } |
92 | } else { | 88 | } else { |
89 | /* TODO: Reduce this to one fdiv op */ | ||
93 | cycles_remainder = cycles_elapsed % cpt; | 90 | cycles_remainder = cycles_elapsed % cpt; |
94 | ticks_elapsed = 1 + cycles_elapsed / cpt; | 91 | ticks_elapsed += cycles_elapsed / cpt; |
95 | } | ||
96 | |||
97 | /* Can we differentiate between "early CR16" (aka Scenario 1) and | ||
98 | * "long delay" (aka Scenario 3)? I don't think so. | ||
99 | * | ||
100 | * We expected timer_interrupt to be delivered at least a few hundred | ||
101 | * cycles after the IT fires. But it's arbitrary how much time passes | ||
102 | * before we call it "late". I've picked one second. | ||
103 | */ | ||
104 | if (unlikely(ticks_elapsed > HZ)) { | ||
105 | /* Scenario 3: very long delay? bad in any case */ | ||
106 | printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!" | ||
107 | " cycles %lX rem %lX " | ||
108 | " next/now %lX/%lX\n", | ||
109 | cpu, | ||
110 | cycles_elapsed, cycles_remainder, | ||
111 | next_tick, now ); | ||
112 | } | 92 | } |
113 | 93 | ||
114 | /* convert from "division remainder" to "remainder of clock tick" */ | 94 | /* convert from "division remainder" to "remainder of clock tick" */ |
@@ -122,18 +102,56 @@ irqreturn_t __irq_entry timer_interrupt(int irq, void *dev_id) | |||
122 | 102 | ||
123 | cpuinfo->it_value = next_tick; | 103 | cpuinfo->it_value = next_tick; |
124 | 104 | ||
125 | /* Skip one clocktick on purpose if we are likely to miss next_tick. | 105 | /* Program the IT when to deliver the next interrupt. |
126 | * We want to avoid the new next_tick being less than CR16. | 106 | * Only bottom 32-bits of next_tick are writable in CR16! |
127 | * If that happened, itimer wouldn't fire until CR16 wrapped. | ||
128 | * We'll catch the tick we missed on the tick after that. | ||
129 | */ | 107 | */ |
130 | if (!(cycles_remainder >> 13)) | ||
131 | next_tick += cpt; | ||
132 | |||
133 | /* Program the IT when to deliver the next interrupt. */ | ||
134 | /* Only bottom 32-bits of next_tick are written to cr16. */ | ||
135 | mtctl(next_tick, 16); | 108 | mtctl(next_tick, 16); |
136 | 109 | ||
110 | /* Skip one clocktick on purpose if we missed next_tick. | ||
111 | * The new CR16 must be "later" than current CR16 otherwise | ||
112 | * itimer would not fire until CR16 wrapped - e.g 4 seconds | ||
113 | * later on a 1Ghz processor. We'll account for the missed | ||
114 | * tick on the next timer interrupt. | ||
115 | * | ||
116 | * "next_tick - now" will always give the difference regardless | ||
117 | * if one or the other wrapped. If "now" is "bigger" we'll end up | ||
118 | * with a very large unsigned number. | ||
119 | */ | ||
120 | now2 = mfctl(16); | ||
121 | if (next_tick - now2 > cpt) | ||
122 | mtctl(next_tick+cpt, 16); | ||
123 | |||
124 | #if 1 | ||
125 | /* | ||
126 | * GGG: DEBUG code for how many cycles programming CR16 used. | ||
127 | */ | ||
128 | if (unlikely(now2 - now > 0x3000)) /* 12K cycles */ | ||
129 | printk (KERN_CRIT "timer_interrupt(CPU %d): SLOW! 0x%lx cycles!" | ||
130 | " cyc %lX rem %lX " | ||
131 | " next/now %lX/%lX\n", | ||
132 | cpu, now2 - now, cycles_elapsed, cycles_remainder, | ||
133 | next_tick, now ); | ||
134 | #endif | ||
135 | |||
136 | /* Can we differentiate between "early CR16" (aka Scenario 1) and | ||
137 | * "long delay" (aka Scenario 3)? I don't think so. | ||
138 | * | ||
139 | * Timer_interrupt will be delivered at least a few hundred cycles | ||
140 | * after the IT fires. But it's arbitrary how much time passes | ||
141 | * before we call it "late". I've picked one second. | ||
142 | * | ||
143 | * It's important NO printk's are between reading CR16 and | ||
144 | * setting up the next value. May introduce huge variance. | ||
145 | */ | ||
146 | if (unlikely(ticks_elapsed > HZ)) { | ||
147 | /* Scenario 3: very long delay? bad in any case */ | ||
148 | printk (KERN_CRIT "timer_interrupt(CPU %d): delayed!" | ||
149 | " cycles %lX rem %lX " | ||
150 | " next/now %lX/%lX\n", | ||
151 | cpu, | ||
152 | cycles_elapsed, cycles_remainder, | ||
153 | next_tick, now ); | ||
154 | } | ||
137 | 155 | ||
138 | /* Done mucking with unreliable delivery of interrupts. | 156 | /* Done mucking with unreliable delivery of interrupts. |
139 | * Go do system house keeping. | 157 | * Go do system house keeping. |
@@ -173,7 +191,7 @@ EXPORT_SYMBOL(profile_pc); | |||
173 | 191 | ||
174 | /* clock source code */ | 192 | /* clock source code */ |
175 | 193 | ||
176 | static cycle_t read_cr16(void) | 194 | static cycle_t read_cr16(struct clocksource *cs) |
177 | { | 195 | { |
178 | return get_cycles(); | 196 | return get_cycles(); |
179 | } | 197 | } |
diff --git a/arch/parisc/lib/checksum.c b/arch/parisc/lib/checksum.c index 462696d30d3b..ae66d31f9ecf 100644 --- a/arch/parisc/lib/checksum.c +++ b/arch/parisc/lib/checksum.c | |||
@@ -13,8 +13,6 @@ | |||
13 | * modify it under the terms of the GNU General Public License | 13 | * modify it under the terms of the GNU General Public License |
14 | * as published by the Free Software Foundation; either version | 14 | * as published by the Free Software Foundation; either version |
15 | * 2 of the License, or (at your option) any later version. | 15 | * 2 of the License, or (at your option) any later version. |
16 | * | ||
17 | * $Id: checksum.c,v 1.3 1997/12/01 17:57:34 ralf Exp $ | ||
18 | */ | 16 | */ |
19 | #include <linux/module.h> | 17 | #include <linux/module.h> |
20 | #include <linux/types.h> | 18 | #include <linux/types.h> |
diff --git a/arch/parisc/lib/memcpy.c b/arch/parisc/lib/memcpy.c index bbda909c866e..abf41f4632a9 100644 --- a/arch/parisc/lib/memcpy.c +++ b/arch/parisc/lib/memcpy.c | |||
@@ -405,7 +405,7 @@ byte_copy: | |||
405 | 405 | ||
406 | unaligned_copy: | 406 | unaligned_copy: |
407 | /* possibly we are aligned on a word, but not on a double... */ | 407 | /* possibly we are aligned on a word, but not on a double... */ |
408 | if (likely(t1 & (sizeof(unsigned int)-1)) == 0) { | 408 | if (likely((t1 & (sizeof(unsigned int)-1)) == 0)) { |
409 | t2 = src & (sizeof(unsigned int) - 1); | 409 | t2 = src & (sizeof(unsigned int) - 1); |
410 | 410 | ||
411 | if (unlikely(t2 != 0)) { | 411 | if (unlikely(t2 != 0)) { |
diff --git a/arch/parisc/math-emu/decode_exc.c b/arch/parisc/math-emu/decode_exc.c index 66c8a9f6a27e..3ca1c6149218 100644 --- a/arch/parisc/math-emu/decode_exc.c +++ b/arch/parisc/math-emu/decode_exc.c | |||
@@ -40,7 +40,7 @@ | |||
40 | * END_DESC | 40 | * END_DESC |
41 | */ | 41 | */ |
42 | 42 | ||
43 | 43 | #include <linux/kernel.h> | |
44 | #include "float.h" | 44 | #include "float.h" |
45 | #include "sgl_float.h" | 45 | #include "sgl_float.h" |
46 | #include "dbl_float.h" | 46 | #include "dbl_float.h" |
diff --git a/arch/parisc/mm/fault.c b/arch/parisc/mm/fault.c index bfb6dd6ab380..c6afbfc95770 100644 --- a/arch/parisc/mm/fault.c +++ b/arch/parisc/mm/fault.c | |||
@@ -1,5 +1,4 @@ | |||
1 | /* $Id: fault.c,v 1.5 2000/01/26 16:20:29 jsm Exp $ | 1 | /* |
2 | * | ||
3 | * This file is subject to the terms and conditions of the GNU General Public | 2 | * This file is subject to the terms and conditions of the GNU General Public |
4 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
5 | * for more details. | 4 | * for more details. |
diff --git a/arch/parisc/mm/init.c b/arch/parisc/mm/init.c index 4356ceb1e366..b0831d9e35cb 100644 --- a/arch/parisc/mm/init.c +++ b/arch/parisc/mm/init.c | |||
@@ -370,34 +370,22 @@ static void __init setup_bootmem(void) | |||
370 | 370 | ||
371 | void free_initmem(void) | 371 | void free_initmem(void) |
372 | { | 372 | { |
373 | unsigned long addr, init_begin, init_end; | 373 | unsigned long addr; |
374 | 374 | unsigned long init_begin = (unsigned long)__init_begin; | |
375 | printk(KERN_INFO "Freeing unused kernel memory: "); | 375 | unsigned long init_end = (unsigned long)__init_end; |
376 | 376 | ||
377 | #ifdef CONFIG_DEBUG_KERNEL | 377 | #ifdef CONFIG_DEBUG_KERNEL |
378 | /* Attempt to catch anyone trying to execute code here | 378 | /* Attempt to catch anyone trying to execute code here |
379 | * by filling the page with BRK insns. | 379 | * by filling the page with BRK insns. |
380 | * | ||
381 | * If we disable interrupts for all CPUs, then IPI stops working. | ||
382 | * Kinda breaks the global cache flushing. | ||
383 | */ | 380 | */ |
384 | local_irq_disable(); | 381 | memset((void *)init_begin, 0x00, init_end - init_begin); |
385 | 382 | flush_icache_range(init_begin, init_end); | |
386 | memset(__init_begin, 0x00, | ||
387 | (unsigned long)__init_end - (unsigned long)__init_begin); | ||
388 | |||
389 | flush_data_cache(); | ||
390 | asm volatile("sync" : : ); | ||
391 | flush_icache_range((unsigned long)__init_begin, (unsigned long)__init_end); | ||
392 | asm volatile("sync" : : ); | ||
393 | |||
394 | local_irq_enable(); | ||
395 | #endif | 383 | #endif |
396 | 384 | ||
397 | /* align __init_begin and __init_end to page size, | 385 | /* align __init_begin and __init_end to page size, |
398 | ignoring linker script where we might have tried to save RAM */ | 386 | ignoring linker script where we might have tried to save RAM */ |
399 | init_begin = PAGE_ALIGN((unsigned long)(__init_begin)); | 387 | init_begin = PAGE_ALIGN(init_begin); |
400 | init_end = PAGE_ALIGN((unsigned long)(__init_end)); | 388 | init_end = PAGE_ALIGN(init_end); |
401 | for (addr = init_begin; addr < init_end; addr += PAGE_SIZE) { | 389 | for (addr = init_begin; addr < init_end; addr += PAGE_SIZE) { |
402 | ClearPageReserved(virt_to_page(addr)); | 390 | ClearPageReserved(virt_to_page(addr)); |
403 | init_page_count(virt_to_page(addr)); | 391 | init_page_count(virt_to_page(addr)); |
@@ -409,7 +397,8 @@ void free_initmem(void) | |||
409 | /* set up a new led state on systems shipped LED State panel */ | 397 | /* set up a new led state on systems shipped LED State panel */ |
410 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE); | 398 | pdc_chassis_send_status(PDC_CHASSIS_DIRECT_BCOMPLETE); |
411 | 399 | ||
412 | printk("%luk freed\n", (init_end - init_begin) >> 10); | 400 | printk(KERN_INFO "Freeing unused kernel memory: %luk freed\n", |
401 | (init_end - init_begin) >> 10); | ||
413 | } | 402 | } |
414 | 403 | ||
415 | 404 | ||
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index d1430ef6b4f9..738bdc6b0f8b 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig | |||
@@ -1913,25 +1913,26 @@ config DMAR_DEFAULT_ON | |||
1913 | recommended you say N here while the DMAR code remains | 1913 | recommended you say N here while the DMAR code remains |
1914 | experimental. | 1914 | experimental. |
1915 | 1915 | ||
1916 | config DMAR_GFX_WA | 1916 | config DMAR_BROKEN_GFX_WA |
1917 | def_bool y | 1917 | def_bool n |
1918 | prompt "Support for Graphics workaround" | 1918 | prompt "Workaround broken graphics drivers (going away soon)" |
1919 | depends on DMAR | 1919 | depends on DMAR |
1920 | ---help--- | 1920 | ---help--- |
1921 | Current Graphics drivers tend to use physical address | 1921 | Current Graphics drivers tend to use physical address |
1922 | for DMA and avoid using DMA APIs. Setting this config | 1922 | for DMA and avoid using DMA APIs. Setting this config |
1923 | option permits the IOMMU driver to set a unity map for | 1923 | option permits the IOMMU driver to set a unity map for |
1924 | all the OS-visible memory. Hence the driver can continue | 1924 | all the OS-visible memory. Hence the driver can continue |
1925 | to use physical addresses for DMA. | 1925 | to use physical addresses for DMA, at least until this |
1926 | option is removed in the 2.6.32 kernel. | ||
1926 | 1927 | ||
1927 | config DMAR_FLOPPY_WA | 1928 | config DMAR_FLOPPY_WA |
1928 | def_bool y | 1929 | def_bool y |
1929 | depends on DMAR | 1930 | depends on DMAR |
1930 | ---help--- | 1931 | ---help--- |
1931 | Floppy disk drivers are know to bypass DMA API calls | 1932 | Floppy disk drivers are known to bypass DMA API calls |
1932 | thereby failing to work when IOMMU is enabled. This | 1933 | thereby failing to work when IOMMU is enabled. This |
1933 | workaround will setup a 1:1 mapping for the first | 1934 | workaround will setup a 1:1 mapping for the first |
1934 | 16M to make floppy (an ISA device) work. | 1935 | 16MiB to make floppy (an ISA device) work. |
1935 | 1936 | ||
1936 | config INTR_REMAP | 1937 | config INTR_REMAP |
1937 | bool "Support for Interrupt Remapping (EXPERIMENTAL)" | 1938 | bool "Support for Interrupt Remapping (EXPERIMENTAL)" |
diff --git a/arch/x86/kernel/Makefile b/arch/x86/kernel/Makefile index 6c327b852e23..430d5b24af7b 100644 --- a/arch/x86/kernel/Makefile +++ b/arch/x86/kernel/Makefile | |||
@@ -26,6 +26,8 @@ CFLAGS_tsc.o := $(nostackp) | |||
26 | CFLAGS_paravirt.o := $(nostackp) | 26 | CFLAGS_paravirt.o := $(nostackp) |
27 | GCOV_PROFILE_vsyscall_64.o := n | 27 | GCOV_PROFILE_vsyscall_64.o := n |
28 | GCOV_PROFILE_hpet.o := n | 28 | GCOV_PROFILE_hpet.o := n |
29 | GCOV_PROFILE_tsc.o := n | ||
30 | GCOV_PROFILE_paravirt.o := n | ||
29 | 31 | ||
30 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o | 32 | obj-y := process_$(BITS).o signal.o entry_$(BITS).o |
31 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o | 33 | obj-y += traps.o irq.o irq_$(BITS).o dumpstack_$(BITS).o |
diff --git a/arch/x86/kernel/pci-dma.c b/arch/x86/kernel/pci-dma.c index 47630479b067..1a041bcf506b 100644 --- a/arch/x86/kernel/pci-dma.c +++ b/arch/x86/kernel/pci-dma.c | |||
@@ -211,11 +211,11 @@ static __init int iommu_setup(char *p) | |||
211 | #ifdef CONFIG_SWIOTLB | 211 | #ifdef CONFIG_SWIOTLB |
212 | if (!strncmp(p, "soft", 4)) | 212 | if (!strncmp(p, "soft", 4)) |
213 | swiotlb = 1; | 213 | swiotlb = 1; |
214 | #endif | ||
214 | if (!strncmp(p, "pt", 2)) { | 215 | if (!strncmp(p, "pt", 2)) { |
215 | iommu_pass_through = 1; | 216 | iommu_pass_through = 1; |
216 | return 1; | 217 | return 1; |
217 | } | 218 | } |
218 | #endif | ||
219 | 219 | ||
220 | gart_parse_options(p); | 220 | gart_parse_options(p); |
221 | 221 | ||
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c index b26626dc517c..1014eb4bfc37 100644 --- a/arch/x86/pci/acpi.c +++ b/arch/x86/pci/acpi.c | |||
@@ -68,6 +68,10 @@ setup_resource(struct acpi_resource *acpi_res, void *data) | |||
68 | unsigned long flags; | 68 | unsigned long flags; |
69 | struct resource *root; | 69 | struct resource *root; |
70 | int max_root_bus_resources = PCI_BUS_NUM_RESOURCES; | 70 | int max_root_bus_resources = PCI_BUS_NUM_RESOURCES; |
71 | u64 start, end; | ||
72 | |||
73 | if (bus_has_transparent_bridge(info->bus)) | ||
74 | max_root_bus_resources -= 3; | ||
71 | 75 | ||
72 | status = resource_to_addr(acpi_res, &addr); | 76 | status = resource_to_addr(acpi_res, &addr); |
73 | if (!ACPI_SUCCESS(status)) | 77 | if (!ACPI_SUCCESS(status)) |
@@ -84,25 +88,24 @@ setup_resource(struct acpi_resource *acpi_res, void *data) | |||
84 | } else | 88 | } else |
85 | return AE_OK; | 89 | return AE_OK; |
86 | 90 | ||
87 | res = &info->res[info->res_num]; | 91 | start = addr.minimum + addr.translation_offset; |
88 | res->name = info->name; | 92 | end = start + addr.address_length - 1; |
89 | res->flags = flags; | ||
90 | res->start = addr.minimum + addr.translation_offset; | ||
91 | res->end = res->start + addr.address_length - 1; | ||
92 | res->child = NULL; | ||
93 | |||
94 | if (bus_has_transparent_bridge(info->bus)) | ||
95 | max_root_bus_resources -= 3; | ||
96 | if (info->res_num >= max_root_bus_resources) { | 93 | if (info->res_num >= max_root_bus_resources) { |
97 | printk(KERN_WARNING "PCI: Failed to allocate 0x%lx-0x%lx " | 94 | printk(KERN_WARNING "PCI: Failed to allocate 0x%lx-0x%lx " |
98 | "from %s for %s due to _CRS returning more than " | 95 | "from %s for %s due to _CRS returning more than " |
99 | "%d resource descriptors\n", (unsigned long) res->start, | 96 | "%d resource descriptors\n", (unsigned long) start, |
100 | (unsigned long) res->end, root->name, info->name, | 97 | (unsigned long) end, root->name, info->name, |
101 | max_root_bus_resources); | 98 | max_root_bus_resources); |
102 | info->res_num++; | ||
103 | return AE_OK; | 99 | return AE_OK; |
104 | } | 100 | } |
105 | 101 | ||
102 | res = &info->res[info->res_num]; | ||
103 | res->name = info->name; | ||
104 | res->flags = flags; | ||
105 | res->start = start; | ||
106 | res->end = end; | ||
107 | res->child = NULL; | ||
108 | |||
106 | if (insert_resource(root, res)) { | 109 | if (insert_resource(root, res)) { |
107 | printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx " | 110 | printk(KERN_ERR "PCI: Failed to allocate 0x%lx-0x%lx " |
108 | "from %s for %s\n", (unsigned long) res->start, | 111 | "from %s for %s\n", (unsigned long) res->start, |
@@ -115,23 +118,6 @@ setup_resource(struct acpi_resource *acpi_res, void *data) | |||
115 | } | 118 | } |
116 | 119 | ||
117 | static void | 120 | static void |
118 | adjust_transparent_bridge_resources(struct pci_bus *bus) | ||
119 | { | ||
120 | struct pci_dev *dev; | ||
121 | |||
122 | list_for_each_entry(dev, &bus->devices, bus_list) { | ||
123 | int i; | ||
124 | u16 class = dev->class >> 8; | ||
125 | |||
126 | if (class == PCI_CLASS_BRIDGE_PCI && dev->transparent) { | ||
127 | for(i = 3; i < PCI_BUS_NUM_RESOURCES; i++) | ||
128 | dev->subordinate->resource[i] = | ||
129 | dev->bus->resource[i - 3]; | ||
130 | } | ||
131 | } | ||
132 | } | ||
133 | |||
134 | static void | ||
135 | get_current_resources(struct acpi_device *device, int busnum, | 121 | get_current_resources(struct acpi_device *device, int busnum, |
136 | int domain, struct pci_bus *bus) | 122 | int domain, struct pci_bus *bus) |
137 | { | 123 | { |
@@ -158,8 +144,6 @@ get_current_resources(struct acpi_device *device, int busnum, | |||
158 | info.res_num = 0; | 144 | info.res_num = 0; |
159 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, | 145 | acpi_walk_resources(device->handle, METHOD_NAME__CRS, setup_resource, |
160 | &info); | 146 | &info); |
161 | if (info.res_num) | ||
162 | adjust_transparent_bridge_resources(bus); | ||
163 | 147 | ||
164 | return; | 148 | return; |
165 | 149 | ||
@@ -222,8 +206,15 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do | |||
222 | */ | 206 | */ |
223 | memcpy(bus->sysdata, sd, sizeof(*sd)); | 207 | memcpy(bus->sysdata, sd, sizeof(*sd)); |
224 | kfree(sd); | 208 | kfree(sd); |
225 | } else | 209 | } else { |
226 | bus = pci_scan_bus_parented(NULL, busnum, &pci_root_ops, sd); | 210 | bus = pci_create_bus(NULL, busnum, &pci_root_ops, sd); |
211 | if (bus) { | ||
212 | if (pci_probe & PCI_USE__CRS) | ||
213 | get_current_resources(device, busnum, domain, | ||
214 | bus); | ||
215 | bus->subordinate = pci_scan_child_bus(bus); | ||
216 | } | ||
217 | } | ||
227 | 218 | ||
228 | if (!bus) | 219 | if (!bus) |
229 | kfree(sd); | 220 | kfree(sd); |
@@ -238,8 +229,6 @@ struct pci_bus * __devinit pci_acpi_scan_root(struct acpi_device *device, int do | |||
238 | #endif | 229 | #endif |
239 | } | 230 | } |
240 | 231 | ||
241 | if (bus && (pci_probe & PCI_USE__CRS)) | ||
242 | get_current_resources(device, busnum, domain, bus); | ||
243 | return bus; | 232 | return bus; |
244 | } | 233 | } |
245 | 234 | ||
diff --git a/arch/x86/pci/amd_bus.c b/arch/x86/pci/amd_bus.c index f893d6a6e803..3ffa10df20b9 100644 --- a/arch/x86/pci/amd_bus.c +++ b/arch/x86/pci/amd_bus.c | |||
@@ -100,8 +100,9 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b) | |||
100 | int j; | 100 | int j; |
101 | struct pci_root_info *info; | 101 | struct pci_root_info *info; |
102 | 102 | ||
103 | /* don't go for it if _CRS is used */ | 103 | /* don't go for it if _CRS is used already */ |
104 | if (pci_probe & PCI_USE__CRS) | 104 | if (b->resource[0] != &ioport_resource || |
105 | b->resource[1] != &iomem_resource) | ||
105 | return; | 106 | return; |
106 | 107 | ||
107 | /* if only one root bus, don't need to anything */ | 108 | /* if only one root bus, don't need to anything */ |
@@ -116,6 +117,9 @@ void x86_pci_root_bus_res_quirks(struct pci_bus *b) | |||
116 | if (i == pci_root_num) | 117 | if (i == pci_root_num) |
117 | return; | 118 | return; |
118 | 119 | ||
120 | printk(KERN_DEBUG "PCI: peer root bus %02x res updated from pci conf\n", | ||
121 | b->number); | ||
122 | |||
119 | info = &pci_root_info[i]; | 123 | info = &pci_root_info[i]; |
120 | for (j = 0; j < info->res_num; j++) { | 124 | for (j = 0; j < info->res_num; j++) { |
121 | struct resource *res; | 125 | struct resource *res; |
diff --git a/block/blk-merge.c b/block/blk-merge.c index 39ce64432ba6..e1999679a4d5 100644 --- a/block/blk-merge.c +++ b/block/blk-merge.c | |||
@@ -350,6 +350,12 @@ static int attempt_merge(struct request_queue *q, struct request *req, | |||
350 | if (blk_integrity_rq(req) != blk_integrity_rq(next)) | 350 | if (blk_integrity_rq(req) != blk_integrity_rq(next)) |
351 | return 0; | 351 | return 0; |
352 | 352 | ||
353 | /* don't merge requests of different failfast settings */ | ||
354 | if (blk_failfast_dev(req) != blk_failfast_dev(next) || | ||
355 | blk_failfast_transport(req) != blk_failfast_transport(next) || | ||
356 | blk_failfast_driver(req) != blk_failfast_driver(next)) | ||
357 | return 0; | ||
358 | |||
353 | /* | 359 | /* |
354 | * If we are allowed to merge, then append bio list | 360 | * If we are allowed to merge, then append bio list |
355 | * from next to rq and release next. merge_requests_fn | 361 | * from next to rq and release next. merge_requests_fn |
diff --git a/block/elevator.c b/block/elevator.c index ca861927ba41..6f2375339a99 100644 --- a/block/elevator.c +++ b/block/elevator.c | |||
@@ -100,6 +100,14 @@ int elv_rq_merge_ok(struct request *rq, struct bio *bio) | |||
100 | if (bio_integrity(bio) != blk_integrity_rq(rq)) | 100 | if (bio_integrity(bio) != blk_integrity_rq(rq)) |
101 | return 0; | 101 | return 0; |
102 | 102 | ||
103 | /* | ||
104 | * Don't merge if failfast settings don't match | ||
105 | */ | ||
106 | if (bio_failfast_dev(bio) != blk_failfast_dev(rq) || | ||
107 | bio_failfast_transport(bio) != blk_failfast_transport(rq) || | ||
108 | bio_failfast_driver(bio) != blk_failfast_driver(rq)) | ||
109 | return 0; | ||
110 | |||
103 | if (!elv_iosched_allow_merge(rq, bio)) | 111 | if (!elv_iosched_allow_merge(rq, bio)) |
104 | return 0; | 112 | return 0; |
105 | 113 | ||
diff --git a/drivers/block/cciss.c b/drivers/block/cciss.c index c7a527c08a09..65a0655e7fc8 100644 --- a/drivers/block/cciss.c +++ b/drivers/block/cciss.c | |||
@@ -226,8 +226,18 @@ static inline void addQ(struct hlist_head *list, CommandList_struct *c) | |||
226 | 226 | ||
227 | static inline void removeQ(CommandList_struct *c) | 227 | static inline void removeQ(CommandList_struct *c) |
228 | { | 228 | { |
229 | if (WARN_ON(hlist_unhashed(&c->list))) | 229 | /* |
230 | * After kexec/dump some commands might still | ||
231 | * be in flight, which the firmware will try | ||
232 | * to complete. Resetting the firmware doesn't work | ||
233 | * with old fw revisions, so we have to mark | ||
234 | * them off as 'stale' to prevent the driver from | ||
235 | * falling over. | ||
236 | */ | ||
237 | if (WARN_ON(hlist_unhashed(&c->list))) { | ||
238 | c->cmd_type = CMD_MSG_STALE; | ||
230 | return; | 239 | return; |
240 | } | ||
231 | 241 | ||
232 | hlist_del_init(&c->list); | 242 | hlist_del_init(&c->list); |
233 | } | 243 | } |
@@ -4246,7 +4256,8 @@ static void fail_all_cmds(unsigned long ctlr) | |||
4246 | while (!hlist_empty(&h->cmpQ)) { | 4256 | while (!hlist_empty(&h->cmpQ)) { |
4247 | c = hlist_entry(h->cmpQ.first, CommandList_struct, list); | 4257 | c = hlist_entry(h->cmpQ.first, CommandList_struct, list); |
4248 | removeQ(c); | 4258 | removeQ(c); |
4249 | c->err_info->CommandStatus = CMD_HARDWARE_ERR; | 4259 | if (c->cmd_type != CMD_MSG_STALE) |
4260 | c->err_info->CommandStatus = CMD_HARDWARE_ERR; | ||
4250 | if (c->cmd_type == CMD_RWREQ) { | 4261 | if (c->cmd_type == CMD_RWREQ) { |
4251 | complete_command(h, c, 0); | 4262 | complete_command(h, c, 0); |
4252 | } else if (c->cmd_type == CMD_IOCTL_PEND) | 4263 | } else if (c->cmd_type == CMD_IOCTL_PEND) |
diff --git a/drivers/block/cciss_cmd.h b/drivers/block/cciss_cmd.h index cd665b00c7c5..dbaed1ea0da3 100644 --- a/drivers/block/cciss_cmd.h +++ b/drivers/block/cciss_cmd.h | |||
@@ -274,6 +274,7 @@ typedef struct _ErrorInfo_struct { | |||
274 | #define CMD_SCSI 0x03 | 274 | #define CMD_SCSI 0x03 |
275 | #define CMD_MSG_DONE 0x04 | 275 | #define CMD_MSG_DONE 0x04 |
276 | #define CMD_MSG_TIMEOUT 0x05 | 276 | #define CMD_MSG_TIMEOUT 0x05 |
277 | #define CMD_MSG_STALE 0xff | ||
277 | 278 | ||
278 | /* This structure needs to be divisible by 8 for new | 279 | /* This structure needs to be divisible by 8 for new |
279 | * indexing method. | 280 | * indexing method. |
diff --git a/drivers/char/Kconfig b/drivers/char/Kconfig index 0bd01f49cfd8..6a06913b01d3 100644 --- a/drivers/char/Kconfig +++ b/drivers/char/Kconfig | |||
@@ -1029,10 +1029,6 @@ config CS5535_GPIO | |||
1029 | 1029 | ||
1030 | If compiled as a module, it will be called cs5535_gpio. | 1030 | If compiled as a module, it will be called cs5535_gpio. |
1031 | 1031 | ||
1032 | config GPIO_VR41XX | ||
1033 | tristate "NEC VR4100 series General-purpose I/O Unit support" | ||
1034 | depends on CPU_VR41XX | ||
1035 | |||
1036 | config RAW_DRIVER | 1032 | config RAW_DRIVER |
1037 | tristate "RAW driver (/dev/raw/rawN)" | 1033 | tristate "RAW driver (/dev/raw/rawN)" |
1038 | depends on BLOCK | 1034 | depends on BLOCK |
diff --git a/drivers/char/Makefile b/drivers/char/Makefile index 189efcff08ce..66f779ad4f4c 100644 --- a/drivers/char/Makefile +++ b/drivers/char/Makefile | |||
@@ -95,7 +95,6 @@ obj-$(CONFIG_SCx200_GPIO) += scx200_gpio.o | |||
95 | obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o | 95 | obj-$(CONFIG_PC8736x_GPIO) += pc8736x_gpio.o |
96 | obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o | 96 | obj-$(CONFIG_NSC_GPIO) += nsc_gpio.o |
97 | obj-$(CONFIG_CS5535_GPIO) += cs5535_gpio.o | 97 | obj-$(CONFIG_CS5535_GPIO) += cs5535_gpio.o |
98 | obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o | ||
99 | obj-$(CONFIG_GPIO_TB0219) += tb0219.o | 98 | obj-$(CONFIG_GPIO_TB0219) += tb0219.o |
100 | obj-$(CONFIG_TELCLOCK) += tlclk.o | 99 | obj-$(CONFIG_TELCLOCK) += tlclk.o |
101 | 100 | ||
diff --git a/drivers/char/tb0219.c b/drivers/char/tb0219.c index 6062b62800fd..b3ec9b10e292 100644 --- a/drivers/char/tb0219.c +++ b/drivers/char/tb0219.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for TANBAC TB0219 base board. | 2 | * Driver for TANBAC TB0219 base board. |
3 | * | 3 | * |
4 | * Copyright (C) 2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2005 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -28,7 +28,7 @@ | |||
28 | #include <asm/vr41xx/giu.h> | 28 | #include <asm/vr41xx/giu.h> |
29 | #include <asm/vr41xx/tb0219.h> | 29 | #include <asm/vr41xx/tb0219.h> |
30 | 30 | ||
31 | MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>"); | 31 | MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>"); |
32 | MODULE_DESCRIPTION("TANBAC TB0219 base board driver"); | 32 | MODULE_DESCRIPTION("TANBAC TB0219 base board driver"); |
33 | MODULE_LICENSE("GPL"); | 33 | MODULE_LICENSE("GPL"); |
34 | 34 | ||
diff --git a/drivers/char/vr41xx_giu.c b/drivers/char/vr41xx_giu.c index 54c837288d19..e69de29bb2d1 100644 --- a/drivers/char/vr41xx_giu.c +++ b/drivers/char/vr41xx_giu.c | |||
@@ -1,680 +0,0 @@ | |||
1 | /* | ||
2 | * Driver for NEC VR4100 series General-purpose I/O Unit. | ||
3 | * | ||
4 | * Copyright (C) 2002 MontaVista Software Inc. | ||
5 | * Author: Yoichi Yuasa <yyuasa@mvista.com or source@mvista.com> | ||
6 | * Copyright (C) 2003-2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | #include <linux/errno.h> | ||
23 | #include <linux/fs.h> | ||
24 | #include <linux/init.h> | ||
25 | #include <linux/interrupt.h> | ||
26 | #include <linux/irq.h> | ||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/module.h> | ||
29 | #include <linux/platform_device.h> | ||
30 | #include <linux/smp_lock.h> | ||
31 | #include <linux/spinlock.h> | ||
32 | #include <linux/types.h> | ||
33 | |||
34 | #include <asm/io.h> | ||
35 | #include <asm/vr41xx/giu.h> | ||
36 | #include <asm/vr41xx/irq.h> | ||
37 | #include <asm/vr41xx/vr41xx.h> | ||
38 | |||
39 | MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>"); | ||
40 | MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver"); | ||
41 | MODULE_LICENSE("GPL"); | ||
42 | |||
43 | static int major; /* default is dynamic major device number */ | ||
44 | module_param(major, int, 0); | ||
45 | MODULE_PARM_DESC(major, "Major device number"); | ||
46 | |||
47 | #define GIUIOSELL 0x00 | ||
48 | #define GIUIOSELH 0x02 | ||
49 | #define GIUPIODL 0x04 | ||
50 | #define GIUPIODH 0x06 | ||
51 | #define GIUINTSTATL 0x08 | ||
52 | #define GIUINTSTATH 0x0a | ||
53 | #define GIUINTENL 0x0c | ||
54 | #define GIUINTENH 0x0e | ||
55 | #define GIUINTTYPL 0x10 | ||
56 | #define GIUINTTYPH 0x12 | ||
57 | #define GIUINTALSELL 0x14 | ||
58 | #define GIUINTALSELH 0x16 | ||
59 | #define GIUINTHTSELL 0x18 | ||
60 | #define GIUINTHTSELH 0x1a | ||
61 | #define GIUPODATL 0x1c | ||
62 | #define GIUPODATEN 0x1c | ||
63 | #define GIUPODATH 0x1e | ||
64 | #define PIOEN0 0x0100 | ||
65 | #define PIOEN1 0x0200 | ||
66 | #define GIUPODAT 0x1e | ||
67 | #define GIUFEDGEINHL 0x20 | ||
68 | #define GIUFEDGEINHH 0x22 | ||
69 | #define GIUREDGEINHL 0x24 | ||
70 | #define GIUREDGEINHH 0x26 | ||
71 | |||
72 | #define GIUUSEUPDN 0x1e0 | ||
73 | #define GIUTERMUPDN 0x1e2 | ||
74 | |||
75 | #define GPIO_HAS_PULLUPDOWN_IO 0x0001 | ||
76 | #define GPIO_HAS_OUTPUT_ENABLE 0x0002 | ||
77 | #define GPIO_HAS_INTERRUPT_EDGE_SELECT 0x0100 | ||
78 | |||
79 | static spinlock_t giu_lock; | ||
80 | static unsigned long giu_flags; | ||
81 | static unsigned int giu_nr_pins; | ||
82 | |||
83 | static void __iomem *giu_base; | ||
84 | |||
85 | #define giu_read(offset) readw(giu_base + (offset)) | ||
86 | #define giu_write(offset, value) writew((value), giu_base + (offset)) | ||
87 | |||
88 | #define GPIO_PIN_OF_IRQ(irq) ((irq) - GIU_IRQ_BASE) | ||
89 | #define GIUINT_HIGH_OFFSET 16 | ||
90 | #define GIUINT_HIGH_MAX 32 | ||
91 | |||
92 | static inline uint16_t giu_set(uint16_t offset, uint16_t set) | ||
93 | { | ||
94 | uint16_t data; | ||
95 | |||
96 | data = giu_read(offset); | ||
97 | data |= set; | ||
98 | giu_write(offset, data); | ||
99 | |||
100 | return data; | ||
101 | } | ||
102 | |||
103 | static inline uint16_t giu_clear(uint16_t offset, uint16_t clear) | ||
104 | { | ||
105 | uint16_t data; | ||
106 | |||
107 | data = giu_read(offset); | ||
108 | data &= ~clear; | ||
109 | giu_write(offset, data); | ||
110 | |||
111 | return data; | ||
112 | } | ||
113 | |||
114 | static void ack_giuint_low(unsigned int irq) | ||
115 | { | ||
116 | giu_write(GIUINTSTATL, 1 << GPIO_PIN_OF_IRQ(irq)); | ||
117 | } | ||
118 | |||
119 | static void mask_giuint_low(unsigned int irq) | ||
120 | { | ||
121 | giu_clear(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(irq)); | ||
122 | } | ||
123 | |||
124 | static void mask_ack_giuint_low(unsigned int irq) | ||
125 | { | ||
126 | unsigned int pin; | ||
127 | |||
128 | pin = GPIO_PIN_OF_IRQ(irq); | ||
129 | giu_clear(GIUINTENL, 1 << pin); | ||
130 | giu_write(GIUINTSTATL, 1 << pin); | ||
131 | } | ||
132 | |||
133 | static void unmask_giuint_low(unsigned int irq) | ||
134 | { | ||
135 | giu_set(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(irq)); | ||
136 | } | ||
137 | |||
138 | static struct irq_chip giuint_low_irq_chip = { | ||
139 | .name = "GIUINTL", | ||
140 | .ack = ack_giuint_low, | ||
141 | .mask = mask_giuint_low, | ||
142 | .mask_ack = mask_ack_giuint_low, | ||
143 | .unmask = unmask_giuint_low, | ||
144 | }; | ||
145 | |||
146 | static void ack_giuint_high(unsigned int irq) | ||
147 | { | ||
148 | giu_write(GIUINTSTATH, 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET)); | ||
149 | } | ||
150 | |||
151 | static void mask_giuint_high(unsigned int irq) | ||
152 | { | ||
153 | giu_clear(GIUINTENH, 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET)); | ||
154 | } | ||
155 | |||
156 | static void mask_ack_giuint_high(unsigned int irq) | ||
157 | { | ||
158 | unsigned int pin; | ||
159 | |||
160 | pin = GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET; | ||
161 | giu_clear(GIUINTENH, 1 << pin); | ||
162 | giu_write(GIUINTSTATH, 1 << pin); | ||
163 | } | ||
164 | |||
165 | static void unmask_giuint_high(unsigned int irq) | ||
166 | { | ||
167 | giu_set(GIUINTENH, 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET)); | ||
168 | } | ||
169 | |||
170 | static struct irq_chip giuint_high_irq_chip = { | ||
171 | .name = "GIUINTH", | ||
172 | .ack = ack_giuint_high, | ||
173 | .mask = mask_giuint_high, | ||
174 | .mask_ack = mask_ack_giuint_high, | ||
175 | .unmask = unmask_giuint_high, | ||
176 | }; | ||
177 | |||
178 | static int giu_get_irq(unsigned int irq) | ||
179 | { | ||
180 | uint16_t pendl, pendh, maskl, maskh; | ||
181 | int i; | ||
182 | |||
183 | pendl = giu_read(GIUINTSTATL); | ||
184 | pendh = giu_read(GIUINTSTATH); | ||
185 | maskl = giu_read(GIUINTENL); | ||
186 | maskh = giu_read(GIUINTENH); | ||
187 | |||
188 | maskl &= pendl; | ||
189 | maskh &= pendh; | ||
190 | |||
191 | if (maskl) { | ||
192 | for (i = 0; i < 16; i++) { | ||
193 | if (maskl & (1 << i)) | ||
194 | return GIU_IRQ(i); | ||
195 | } | ||
196 | } else if (maskh) { | ||
197 | for (i = 0; i < 16; i++) { | ||
198 | if (maskh & (1 << i)) | ||
199 | return GIU_IRQ(i + GIUINT_HIGH_OFFSET); | ||
200 | } | ||
201 | } | ||
202 | |||
203 | printk(KERN_ERR "spurious GIU interrupt: %04x(%04x),%04x(%04x)\n", | ||
204 | maskl, pendl, maskh, pendh); | ||
205 | |||
206 | atomic_inc(&irq_err_count); | ||
207 | |||
208 | return -EINVAL; | ||
209 | } | ||
210 | |||
211 | void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, irq_signal_t signal) | ||
212 | { | ||
213 | uint16_t mask; | ||
214 | |||
215 | if (pin < GIUINT_HIGH_OFFSET) { | ||
216 | mask = 1 << pin; | ||
217 | if (trigger != IRQ_TRIGGER_LEVEL) { | ||
218 | giu_set(GIUINTTYPL, mask); | ||
219 | if (signal == IRQ_SIGNAL_HOLD) | ||
220 | giu_set(GIUINTHTSELL, mask); | ||
221 | else | ||
222 | giu_clear(GIUINTHTSELL, mask); | ||
223 | if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) { | ||
224 | switch (trigger) { | ||
225 | case IRQ_TRIGGER_EDGE_FALLING: | ||
226 | giu_set(GIUFEDGEINHL, mask); | ||
227 | giu_clear(GIUREDGEINHL, mask); | ||
228 | break; | ||
229 | case IRQ_TRIGGER_EDGE_RISING: | ||
230 | giu_clear(GIUFEDGEINHL, mask); | ||
231 | giu_set(GIUREDGEINHL, mask); | ||
232 | break; | ||
233 | default: | ||
234 | giu_set(GIUFEDGEINHL, mask); | ||
235 | giu_set(GIUREDGEINHL, mask); | ||
236 | break; | ||
237 | } | ||
238 | } | ||
239 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
240 | &giuint_low_irq_chip, | ||
241 | handle_edge_irq); | ||
242 | } else { | ||
243 | giu_clear(GIUINTTYPL, mask); | ||
244 | giu_clear(GIUINTHTSELL, mask); | ||
245 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
246 | &giuint_low_irq_chip, | ||
247 | handle_level_irq); | ||
248 | } | ||
249 | giu_write(GIUINTSTATL, mask); | ||
250 | } else if (pin < GIUINT_HIGH_MAX) { | ||
251 | mask = 1 << (pin - GIUINT_HIGH_OFFSET); | ||
252 | if (trigger != IRQ_TRIGGER_LEVEL) { | ||
253 | giu_set(GIUINTTYPH, mask); | ||
254 | if (signal == IRQ_SIGNAL_HOLD) | ||
255 | giu_set(GIUINTHTSELH, mask); | ||
256 | else | ||
257 | giu_clear(GIUINTHTSELH, mask); | ||
258 | if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) { | ||
259 | switch (trigger) { | ||
260 | case IRQ_TRIGGER_EDGE_FALLING: | ||
261 | giu_set(GIUFEDGEINHH, mask); | ||
262 | giu_clear(GIUREDGEINHH, mask); | ||
263 | break; | ||
264 | case IRQ_TRIGGER_EDGE_RISING: | ||
265 | giu_clear(GIUFEDGEINHH, mask); | ||
266 | giu_set(GIUREDGEINHH, mask); | ||
267 | break; | ||
268 | default: | ||
269 | giu_set(GIUFEDGEINHH, mask); | ||
270 | giu_set(GIUREDGEINHH, mask); | ||
271 | break; | ||
272 | } | ||
273 | } | ||
274 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
275 | &giuint_high_irq_chip, | ||
276 | handle_edge_irq); | ||
277 | } else { | ||
278 | giu_clear(GIUINTTYPH, mask); | ||
279 | giu_clear(GIUINTHTSELH, mask); | ||
280 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
281 | &giuint_high_irq_chip, | ||
282 | handle_level_irq); | ||
283 | } | ||
284 | giu_write(GIUINTSTATH, mask); | ||
285 | } | ||
286 | } | ||
287 | EXPORT_SYMBOL_GPL(vr41xx_set_irq_trigger); | ||
288 | |||
289 | void vr41xx_set_irq_level(unsigned int pin, irq_level_t level) | ||
290 | { | ||
291 | uint16_t mask; | ||
292 | |||
293 | if (pin < GIUINT_HIGH_OFFSET) { | ||
294 | mask = 1 << pin; | ||
295 | if (level == IRQ_LEVEL_HIGH) | ||
296 | giu_set(GIUINTALSELL, mask); | ||
297 | else | ||
298 | giu_clear(GIUINTALSELL, mask); | ||
299 | giu_write(GIUINTSTATL, mask); | ||
300 | } else if (pin < GIUINT_HIGH_MAX) { | ||
301 | mask = 1 << (pin - GIUINT_HIGH_OFFSET); | ||
302 | if (level == IRQ_LEVEL_HIGH) | ||
303 | giu_set(GIUINTALSELH, mask); | ||
304 | else | ||
305 | giu_clear(GIUINTALSELH, mask); | ||
306 | giu_write(GIUINTSTATH, mask); | ||
307 | } | ||
308 | } | ||
309 | EXPORT_SYMBOL_GPL(vr41xx_set_irq_level); | ||
310 | |||
311 | gpio_data_t vr41xx_gpio_get_pin(unsigned int pin) | ||
312 | { | ||
313 | uint16_t reg, mask; | ||
314 | |||
315 | if (pin >= giu_nr_pins) | ||
316 | return GPIO_DATA_INVAL; | ||
317 | |||
318 | if (pin < 16) { | ||
319 | reg = giu_read(GIUPIODL); | ||
320 | mask = (uint16_t)1 << pin; | ||
321 | } else if (pin < 32) { | ||
322 | reg = giu_read(GIUPIODH); | ||
323 | mask = (uint16_t)1 << (pin - 16); | ||
324 | } else if (pin < 48) { | ||
325 | reg = giu_read(GIUPODATL); | ||
326 | mask = (uint16_t)1 << (pin - 32); | ||
327 | } else { | ||
328 | reg = giu_read(GIUPODATH); | ||
329 | mask = (uint16_t)1 << (pin - 48); | ||
330 | } | ||
331 | |||
332 | if (reg & mask) | ||
333 | return GPIO_DATA_HIGH; | ||
334 | |||
335 | return GPIO_DATA_LOW; | ||
336 | } | ||
337 | EXPORT_SYMBOL_GPL(vr41xx_gpio_get_pin); | ||
338 | |||
339 | int vr41xx_gpio_set_pin(unsigned int pin, gpio_data_t data) | ||
340 | { | ||
341 | uint16_t offset, mask, reg; | ||
342 | unsigned long flags; | ||
343 | |||
344 | if (pin >= giu_nr_pins) | ||
345 | return -EINVAL; | ||
346 | |||
347 | if (pin < 16) { | ||
348 | offset = GIUPIODL; | ||
349 | mask = (uint16_t)1 << pin; | ||
350 | } else if (pin < 32) { | ||
351 | offset = GIUPIODH; | ||
352 | mask = (uint16_t)1 << (pin - 16); | ||
353 | } else if (pin < 48) { | ||
354 | offset = GIUPODATL; | ||
355 | mask = (uint16_t)1 << (pin - 32); | ||
356 | } else { | ||
357 | offset = GIUPODATH; | ||
358 | mask = (uint16_t)1 << (pin - 48); | ||
359 | } | ||
360 | |||
361 | spin_lock_irqsave(&giu_lock, flags); | ||
362 | |||
363 | reg = giu_read(offset); | ||
364 | if (data == GPIO_DATA_HIGH) | ||
365 | reg |= mask; | ||
366 | else | ||
367 | reg &= ~mask; | ||
368 | giu_write(offset, reg); | ||
369 | |||
370 | spin_unlock_irqrestore(&giu_lock, flags); | ||
371 | |||
372 | return 0; | ||
373 | } | ||
374 | EXPORT_SYMBOL_GPL(vr41xx_gpio_set_pin); | ||
375 | |||
376 | int vr41xx_gpio_set_direction(unsigned int pin, gpio_direction_t dir) | ||
377 | { | ||
378 | uint16_t offset, mask, reg; | ||
379 | unsigned long flags; | ||
380 | |||
381 | if (pin >= giu_nr_pins) | ||
382 | return -EINVAL; | ||
383 | |||
384 | if (pin < 16) { | ||
385 | offset = GIUIOSELL; | ||
386 | mask = (uint16_t)1 << pin; | ||
387 | } else if (pin < 32) { | ||
388 | offset = GIUIOSELH; | ||
389 | mask = (uint16_t)1 << (pin - 16); | ||
390 | } else { | ||
391 | if (giu_flags & GPIO_HAS_OUTPUT_ENABLE) { | ||
392 | offset = GIUPODATEN; | ||
393 | mask = (uint16_t)1 << (pin - 32); | ||
394 | } else { | ||
395 | switch (pin) { | ||
396 | case 48: | ||
397 | offset = GIUPODATH; | ||
398 | mask = PIOEN0; | ||
399 | break; | ||
400 | case 49: | ||
401 | offset = GIUPODATH; | ||
402 | mask = PIOEN1; | ||
403 | break; | ||
404 | default: | ||
405 | return -EINVAL; | ||
406 | } | ||
407 | } | ||
408 | } | ||
409 | |||
410 | spin_lock_irqsave(&giu_lock, flags); | ||
411 | |||
412 | reg = giu_read(offset); | ||
413 | if (dir == GPIO_OUTPUT) | ||
414 | reg |= mask; | ||
415 | else | ||
416 | reg &= ~mask; | ||
417 | giu_write(offset, reg); | ||
418 | |||
419 | spin_unlock_irqrestore(&giu_lock, flags); | ||
420 | |||
421 | return 0; | ||
422 | } | ||
423 | EXPORT_SYMBOL_GPL(vr41xx_gpio_set_direction); | ||
424 | |||
425 | int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull) | ||
426 | { | ||
427 | uint16_t reg, mask; | ||
428 | unsigned long flags; | ||
429 | |||
430 | if ((giu_flags & GPIO_HAS_PULLUPDOWN_IO) != GPIO_HAS_PULLUPDOWN_IO) | ||
431 | return -EPERM; | ||
432 | |||
433 | if (pin >= 15) | ||
434 | return -EINVAL; | ||
435 | |||
436 | mask = (uint16_t)1 << pin; | ||
437 | |||
438 | spin_lock_irqsave(&giu_lock, flags); | ||
439 | |||
440 | if (pull == GPIO_PULL_UP || pull == GPIO_PULL_DOWN) { | ||
441 | reg = giu_read(GIUTERMUPDN); | ||
442 | if (pull == GPIO_PULL_UP) | ||
443 | reg |= mask; | ||
444 | else | ||
445 | reg &= ~mask; | ||
446 | giu_write(GIUTERMUPDN, reg); | ||
447 | |||
448 | reg = giu_read(GIUUSEUPDN); | ||
449 | reg |= mask; | ||
450 | giu_write(GIUUSEUPDN, reg); | ||
451 | } else { | ||
452 | reg = giu_read(GIUUSEUPDN); | ||
453 | reg &= ~mask; | ||
454 | giu_write(GIUUSEUPDN, reg); | ||
455 | } | ||
456 | |||
457 | spin_unlock_irqrestore(&giu_lock, flags); | ||
458 | |||
459 | return 0; | ||
460 | } | ||
461 | EXPORT_SYMBOL_GPL(vr41xx_gpio_pullupdown); | ||
462 | |||
463 | static ssize_t gpio_read(struct file *file, char __user *buf, size_t len, | ||
464 | loff_t *ppos) | ||
465 | { | ||
466 | unsigned int pin; | ||
467 | char value = '0'; | ||
468 | |||
469 | pin = iminor(file->f_path.dentry->d_inode); | ||
470 | if (pin >= giu_nr_pins) | ||
471 | return -EBADF; | ||
472 | |||
473 | if (vr41xx_gpio_get_pin(pin) == GPIO_DATA_HIGH) | ||
474 | value = '1'; | ||
475 | |||
476 | if (len <= 0) | ||
477 | return -EFAULT; | ||
478 | |||
479 | if (put_user(value, buf)) | ||
480 | return -EFAULT; | ||
481 | |||
482 | return 1; | ||
483 | } | ||
484 | |||
485 | static ssize_t gpio_write(struct file *file, const char __user *data, | ||
486 | size_t len, loff_t *ppos) | ||
487 | { | ||
488 | unsigned int pin; | ||
489 | size_t i; | ||
490 | char c; | ||
491 | int retval = 0; | ||
492 | |||
493 | pin = iminor(file->f_path.dentry->d_inode); | ||
494 | if (pin >= giu_nr_pins) | ||
495 | return -EBADF; | ||
496 | |||
497 | for (i = 0; i < len; i++) { | ||
498 | if (get_user(c, data + i)) | ||
499 | return -EFAULT; | ||
500 | |||
501 | switch (c) { | ||
502 | case '0': | ||
503 | retval = vr41xx_gpio_set_pin(pin, GPIO_DATA_LOW); | ||
504 | break; | ||
505 | case '1': | ||
506 | retval = vr41xx_gpio_set_pin(pin, GPIO_DATA_HIGH); | ||
507 | break; | ||
508 | case 'D': | ||
509 | printk(KERN_INFO "GPIO%d: pull down\n", pin); | ||
510 | retval = vr41xx_gpio_pullupdown(pin, GPIO_PULL_DOWN); | ||
511 | break; | ||
512 | case 'd': | ||
513 | printk(KERN_INFO "GPIO%d: pull up/down disable\n", pin); | ||
514 | retval = vr41xx_gpio_pullupdown(pin, GPIO_PULL_DISABLE); | ||
515 | break; | ||
516 | case 'I': | ||
517 | printk(KERN_INFO "GPIO%d: input\n", pin); | ||
518 | retval = vr41xx_gpio_set_direction(pin, GPIO_INPUT); | ||
519 | break; | ||
520 | case 'O': | ||
521 | printk(KERN_INFO "GPIO%d: output\n", pin); | ||
522 | retval = vr41xx_gpio_set_direction(pin, GPIO_OUTPUT); | ||
523 | break; | ||
524 | case 'o': | ||
525 | printk(KERN_INFO "GPIO%d: output disable\n", pin); | ||
526 | retval = vr41xx_gpio_set_direction(pin, GPIO_OUTPUT_DISABLE); | ||
527 | break; | ||
528 | case 'P': | ||
529 | printk(KERN_INFO "GPIO%d: pull up\n", pin); | ||
530 | retval = vr41xx_gpio_pullupdown(pin, GPIO_PULL_UP); | ||
531 | break; | ||
532 | case 'p': | ||
533 | printk(KERN_INFO "GPIO%d: pull up/down disable\n", pin); | ||
534 | retval = vr41xx_gpio_pullupdown(pin, GPIO_PULL_DISABLE); | ||
535 | break; | ||
536 | default: | ||
537 | break; | ||
538 | } | ||
539 | |||
540 | if (retval < 0) | ||
541 | break; | ||
542 | } | ||
543 | |||
544 | return i; | ||
545 | } | ||
546 | |||
547 | static int gpio_open(struct inode *inode, struct file *file) | ||
548 | { | ||
549 | unsigned int pin; | ||
550 | |||
551 | cycle_kernel_lock(); | ||
552 | pin = iminor(inode); | ||
553 | if (pin >= giu_nr_pins) | ||
554 | return -EBADF; | ||
555 | |||
556 | return nonseekable_open(inode, file); | ||
557 | } | ||
558 | |||
559 | static int gpio_release(struct inode *inode, struct file *file) | ||
560 | { | ||
561 | unsigned int pin; | ||
562 | |||
563 | pin = iminor(inode); | ||
564 | if (pin >= giu_nr_pins) | ||
565 | return -EBADF; | ||
566 | |||
567 | return 0; | ||
568 | } | ||
569 | |||
570 | static const struct file_operations gpio_fops = { | ||
571 | .owner = THIS_MODULE, | ||
572 | .read = gpio_read, | ||
573 | .write = gpio_write, | ||
574 | .open = gpio_open, | ||
575 | .release = gpio_release, | ||
576 | }; | ||
577 | |||
578 | static int __devinit giu_probe(struct platform_device *dev) | ||
579 | { | ||
580 | struct resource *res; | ||
581 | unsigned int trigger, i, pin; | ||
582 | struct irq_chip *chip; | ||
583 | int irq, retval; | ||
584 | |||
585 | switch (dev->id) { | ||
586 | case GPIO_50PINS_PULLUPDOWN: | ||
587 | giu_flags = GPIO_HAS_PULLUPDOWN_IO; | ||
588 | giu_nr_pins = 50; | ||
589 | break; | ||
590 | case GPIO_36PINS: | ||
591 | giu_nr_pins = 36; | ||
592 | break; | ||
593 | case GPIO_48PINS_EDGE_SELECT: | ||
594 | giu_flags = GPIO_HAS_INTERRUPT_EDGE_SELECT; | ||
595 | giu_nr_pins = 48; | ||
596 | break; | ||
597 | default: | ||
598 | printk(KERN_ERR "GIU: unknown ID %d\n", dev->id); | ||
599 | return -ENODEV; | ||
600 | } | ||
601 | |||
602 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | ||
603 | if (!res) | ||
604 | return -EBUSY; | ||
605 | |||
606 | giu_base = ioremap(res->start, res->end - res->start + 1); | ||
607 | if (!giu_base) | ||
608 | return -ENOMEM; | ||
609 | |||
610 | retval = register_chrdev(major, "GIU", &gpio_fops); | ||
611 | if (retval < 0) { | ||
612 | iounmap(giu_base); | ||
613 | giu_base = NULL; | ||
614 | return retval; | ||
615 | } | ||
616 | |||
617 | if (major == 0) { | ||
618 | major = retval; | ||
619 | printk(KERN_INFO "GIU: major number %d\n", major); | ||
620 | } | ||
621 | |||
622 | spin_lock_init(&giu_lock); | ||
623 | |||
624 | giu_write(GIUINTENL, 0); | ||
625 | giu_write(GIUINTENH, 0); | ||
626 | |||
627 | trigger = giu_read(GIUINTTYPH) << 16; | ||
628 | trigger |= giu_read(GIUINTTYPL); | ||
629 | for (i = GIU_IRQ_BASE; i <= GIU_IRQ_LAST; i++) { | ||
630 | pin = GPIO_PIN_OF_IRQ(i); | ||
631 | if (pin < GIUINT_HIGH_OFFSET) | ||
632 | chip = &giuint_low_irq_chip; | ||
633 | else | ||
634 | chip = &giuint_high_irq_chip; | ||
635 | |||
636 | if (trigger & (1 << pin)) | ||
637 | set_irq_chip_and_handler(i, chip, handle_edge_irq); | ||
638 | else | ||
639 | set_irq_chip_and_handler(i, chip, handle_level_irq); | ||
640 | |||
641 | } | ||
642 | |||
643 | irq = platform_get_irq(dev, 0); | ||
644 | if (irq < 0 || irq >= nr_irqs) | ||
645 | return -EBUSY; | ||
646 | |||
647 | return cascade_irq(irq, giu_get_irq); | ||
648 | } | ||
649 | |||
650 | static int __devexit giu_remove(struct platform_device *dev) | ||
651 | { | ||
652 | if (giu_base) { | ||
653 | iounmap(giu_base); | ||
654 | giu_base = NULL; | ||
655 | } | ||
656 | |||
657 | return 0; | ||
658 | } | ||
659 | |||
660 | static struct platform_driver giu_device_driver = { | ||
661 | .probe = giu_probe, | ||
662 | .remove = __devexit_p(giu_remove), | ||
663 | .driver = { | ||
664 | .name = "GIU", | ||
665 | .owner = THIS_MODULE, | ||
666 | }, | ||
667 | }; | ||
668 | |||
669 | static int __init vr41xx_giu_init(void) | ||
670 | { | ||
671 | return platform_driver_register(&giu_device_driver); | ||
672 | } | ||
673 | |||
674 | static void __exit vr41xx_giu_exit(void) | ||
675 | { | ||
676 | platform_driver_unregister(&giu_device_driver); | ||
677 | } | ||
678 | |||
679 | module_init(vr41xx_giu_init); | ||
680 | module_exit(vr41xx_giu_exit); | ||
diff --git a/drivers/firewire/core-card.c b/drivers/firewire/core-card.c index 543fccac81bb..f74edae5cb4c 100644 --- a/drivers/firewire/core-card.c +++ b/drivers/firewire/core-card.c | |||
@@ -196,8 +196,8 @@ static void allocate_broadcast_channel(struct fw_card *card, int generation) | |||
196 | { | 196 | { |
197 | int channel, bandwidth = 0; | 197 | int channel, bandwidth = 0; |
198 | 198 | ||
199 | fw_iso_resource_manage(card, generation, 1ULL << 31, | 199 | fw_iso_resource_manage(card, generation, 1ULL << 31, &channel, |
200 | &channel, &bandwidth, true); | 200 | &bandwidth, true, card->bm_transaction_data); |
201 | if (channel == 31) { | 201 | if (channel == 31) { |
202 | card->broadcast_channel_allocated = true; | 202 | card->broadcast_channel_allocated = true; |
203 | device_for_each_child(card->device, (void *)(long)generation, | 203 | device_for_each_child(card->device, (void *)(long)generation, |
@@ -230,7 +230,6 @@ static void fw_card_bm_work(struct work_struct *work) | |||
230 | bool do_reset = false; | 230 | bool do_reset = false; |
231 | bool root_device_is_running; | 231 | bool root_device_is_running; |
232 | bool root_device_is_cmc; | 232 | bool root_device_is_cmc; |
233 | __be32 lock_data[2]; | ||
234 | 233 | ||
235 | spin_lock_irqsave(&card->lock, flags); | 234 | spin_lock_irqsave(&card->lock, flags); |
236 | 235 | ||
@@ -273,22 +272,23 @@ static void fw_card_bm_work(struct work_struct *work) | |||
273 | goto pick_me; | 272 | goto pick_me; |
274 | } | 273 | } |
275 | 274 | ||
276 | lock_data[0] = cpu_to_be32(0x3f); | 275 | card->bm_transaction_data[0] = cpu_to_be32(0x3f); |
277 | lock_data[1] = cpu_to_be32(local_id); | 276 | card->bm_transaction_data[1] = cpu_to_be32(local_id); |
278 | 277 | ||
279 | spin_unlock_irqrestore(&card->lock, flags); | 278 | spin_unlock_irqrestore(&card->lock, flags); |
280 | 279 | ||
281 | rcode = fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP, | 280 | rcode = fw_run_transaction(card, TCODE_LOCK_COMPARE_SWAP, |
282 | irm_id, generation, SCODE_100, | 281 | irm_id, generation, SCODE_100, |
283 | CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID, | 282 | CSR_REGISTER_BASE + CSR_BUS_MANAGER_ID, |
284 | lock_data, sizeof(lock_data)); | 283 | card->bm_transaction_data, |
284 | sizeof(card->bm_transaction_data)); | ||
285 | 285 | ||
286 | if (rcode == RCODE_GENERATION) | 286 | if (rcode == RCODE_GENERATION) |
287 | /* Another bus reset, BM work has been rescheduled. */ | 287 | /* Another bus reset, BM work has been rescheduled. */ |
288 | goto out; | 288 | goto out; |
289 | 289 | ||
290 | if (rcode == RCODE_COMPLETE && | 290 | if (rcode == RCODE_COMPLETE && |
291 | lock_data[0] != cpu_to_be32(0x3f)) { | 291 | card->bm_transaction_data[0] != cpu_to_be32(0x3f)) { |
292 | 292 | ||
293 | /* Somebody else is BM. Only act as IRM. */ | 293 | /* Somebody else is BM. Only act as IRM. */ |
294 | if (local_id == irm_id) | 294 | if (local_id == irm_id) |
diff --git a/drivers/firewire/core-cdev.c b/drivers/firewire/core-cdev.c index d1d30c615b0f..ced186d7e9a9 100644 --- a/drivers/firewire/core-cdev.c +++ b/drivers/firewire/core-cdev.c | |||
@@ -125,6 +125,7 @@ struct iso_resource { | |||
125 | int generation; | 125 | int generation; |
126 | u64 channels; | 126 | u64 channels; |
127 | s32 bandwidth; | 127 | s32 bandwidth; |
128 | __be32 transaction_data[2]; | ||
128 | struct iso_resource_event *e_alloc, *e_dealloc; | 129 | struct iso_resource_event *e_alloc, *e_dealloc; |
129 | }; | 130 | }; |
130 | 131 | ||
@@ -1049,7 +1050,8 @@ static void iso_resource_work(struct work_struct *work) | |||
1049 | r->channels, &channel, &bandwidth, | 1050 | r->channels, &channel, &bandwidth, |
1050 | todo == ISO_RES_ALLOC || | 1051 | todo == ISO_RES_ALLOC || |
1051 | todo == ISO_RES_REALLOC || | 1052 | todo == ISO_RES_REALLOC || |
1052 | todo == ISO_RES_ALLOC_ONCE); | 1053 | todo == ISO_RES_ALLOC_ONCE, |
1054 | r->transaction_data); | ||
1053 | /* | 1055 | /* |
1054 | * Is this generation outdated already? As long as this resource sticks | 1056 | * Is this generation outdated already? As long as this resource sticks |
1055 | * in the idr, it will be scheduled again for a newer generation or at | 1057 | * in the idr, it will be scheduled again for a newer generation or at |
diff --git a/drivers/firewire/core-iso.c b/drivers/firewire/core-iso.c index 166f19c6d38d..110e731f5574 100644 --- a/drivers/firewire/core-iso.c +++ b/drivers/firewire/core-iso.c | |||
@@ -177,9 +177,8 @@ EXPORT_SYMBOL(fw_iso_context_stop); | |||
177 | */ | 177 | */ |
178 | 178 | ||
179 | static int manage_bandwidth(struct fw_card *card, int irm_id, int generation, | 179 | static int manage_bandwidth(struct fw_card *card, int irm_id, int generation, |
180 | int bandwidth, bool allocate) | 180 | int bandwidth, bool allocate, __be32 data[2]) |
181 | { | 181 | { |
182 | __be32 data[2]; | ||
183 | int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0; | 182 | int try, new, old = allocate ? BANDWIDTH_AVAILABLE_INITIAL : 0; |
184 | 183 | ||
185 | /* | 184 | /* |
@@ -215,9 +214,9 @@ static int manage_bandwidth(struct fw_card *card, int irm_id, int generation, | |||
215 | } | 214 | } |
216 | 215 | ||
217 | static int manage_channel(struct fw_card *card, int irm_id, int generation, | 216 | static int manage_channel(struct fw_card *card, int irm_id, int generation, |
218 | u32 channels_mask, u64 offset, bool allocate) | 217 | u32 channels_mask, u64 offset, bool allocate, __be32 data[2]) |
219 | { | 218 | { |
220 | __be32 data[2], c, all, old; | 219 | __be32 c, all, old; |
221 | int i, retry = 5; | 220 | int i, retry = 5; |
222 | 221 | ||
223 | old = all = allocate ? cpu_to_be32(~0) : 0; | 222 | old = all = allocate ? cpu_to_be32(~0) : 0; |
@@ -260,7 +259,7 @@ static int manage_channel(struct fw_card *card, int irm_id, int generation, | |||
260 | } | 259 | } |
261 | 260 | ||
262 | static void deallocate_channel(struct fw_card *card, int irm_id, | 261 | static void deallocate_channel(struct fw_card *card, int irm_id, |
263 | int generation, int channel) | 262 | int generation, int channel, __be32 buffer[2]) |
264 | { | 263 | { |
265 | u32 mask; | 264 | u32 mask; |
266 | u64 offset; | 265 | u64 offset; |
@@ -269,7 +268,7 @@ static void deallocate_channel(struct fw_card *card, int irm_id, | |||
269 | offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI : | 268 | offset = channel < 32 ? CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI : |
270 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO; | 269 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO; |
271 | 270 | ||
272 | manage_channel(card, irm_id, generation, mask, offset, false); | 271 | manage_channel(card, irm_id, generation, mask, offset, false, buffer); |
273 | } | 272 | } |
274 | 273 | ||
275 | /** | 274 | /** |
@@ -298,7 +297,7 @@ static void deallocate_channel(struct fw_card *card, int irm_id, | |||
298 | */ | 297 | */ |
299 | void fw_iso_resource_manage(struct fw_card *card, int generation, | 298 | void fw_iso_resource_manage(struct fw_card *card, int generation, |
300 | u64 channels_mask, int *channel, int *bandwidth, | 299 | u64 channels_mask, int *channel, int *bandwidth, |
301 | bool allocate) | 300 | bool allocate, __be32 buffer[2]) |
302 | { | 301 | { |
303 | u32 channels_hi = channels_mask; /* channels 31...0 */ | 302 | u32 channels_hi = channels_mask; /* channels 31...0 */ |
304 | u32 channels_lo = channels_mask >> 32; /* channels 63...32 */ | 303 | u32 channels_lo = channels_mask >> 32; /* channels 63...32 */ |
@@ -310,10 +309,12 @@ void fw_iso_resource_manage(struct fw_card *card, int generation, | |||
310 | 309 | ||
311 | if (channels_hi) | 310 | if (channels_hi) |
312 | c = manage_channel(card, irm_id, generation, channels_hi, | 311 | c = manage_channel(card, irm_id, generation, channels_hi, |
313 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI, allocate); | 312 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_HI, |
313 | allocate, buffer); | ||
314 | if (channels_lo && c < 0) { | 314 | if (channels_lo && c < 0) { |
315 | c = manage_channel(card, irm_id, generation, channels_lo, | 315 | c = manage_channel(card, irm_id, generation, channels_lo, |
316 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO, allocate); | 316 | CSR_REGISTER_BASE + CSR_CHANNELS_AVAILABLE_LO, |
317 | allocate, buffer); | ||
317 | if (c >= 0) | 318 | if (c >= 0) |
318 | c += 32; | 319 | c += 32; |
319 | } | 320 | } |
@@ -325,12 +326,13 @@ void fw_iso_resource_manage(struct fw_card *card, int generation, | |||
325 | if (*bandwidth == 0) | 326 | if (*bandwidth == 0) |
326 | return; | 327 | return; |
327 | 328 | ||
328 | ret = manage_bandwidth(card, irm_id, generation, *bandwidth, allocate); | 329 | ret = manage_bandwidth(card, irm_id, generation, *bandwidth, |
330 | allocate, buffer); | ||
329 | if (ret < 0) | 331 | if (ret < 0) |
330 | *bandwidth = 0; | 332 | *bandwidth = 0; |
331 | 333 | ||
332 | if (allocate && ret < 0 && c >= 0) { | 334 | if (allocate && ret < 0 && c >= 0) { |
333 | deallocate_channel(card, irm_id, generation, c); | 335 | deallocate_channel(card, irm_id, generation, c, buffer); |
334 | *channel = ret; | 336 | *channel = ret; |
335 | } | 337 | } |
336 | } | 338 | } |
diff --git a/drivers/firewire/core.h b/drivers/firewire/core.h index c3cfc647e5e3..6052816be353 100644 --- a/drivers/firewire/core.h +++ b/drivers/firewire/core.h | |||
@@ -120,7 +120,8 @@ void fw_node_event(struct fw_card *card, struct fw_node *node, int event); | |||
120 | 120 | ||
121 | int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma); | 121 | int fw_iso_buffer_map(struct fw_iso_buffer *buffer, struct vm_area_struct *vma); |
122 | void fw_iso_resource_manage(struct fw_card *card, int generation, | 122 | void fw_iso_resource_manage(struct fw_card *card, int generation, |
123 | u64 channels_mask, int *channel, int *bandwidth, bool allocate); | 123 | u64 channels_mask, int *channel, int *bandwidth, |
124 | bool allocate, __be32 buffer[2]); | ||
124 | 125 | ||
125 | 126 | ||
126 | /* -topology */ | 127 | /* -topology */ |
diff --git a/drivers/firewire/sbp2.c b/drivers/firewire/sbp2.c index 24c45635376a..8d51568ee143 100644 --- a/drivers/firewire/sbp2.c +++ b/drivers/firewire/sbp2.c | |||
@@ -201,6 +201,12 @@ static struct fw_device *target_device(struct sbp2_target *tgt) | |||
201 | #define SBP2_CYCLE_LIMIT (0xc8 << 12) /* 200 125us cycles */ | 201 | #define SBP2_CYCLE_LIMIT (0xc8 << 12) /* 200 125us cycles */ |
202 | 202 | ||
203 | /* | 203 | /* |
204 | * There is no transport protocol limit to the CDB length, but we implement | ||
205 | * a fixed length only. 16 bytes is enough for disks larger than 2 TB. | ||
206 | */ | ||
207 | #define SBP2_MAX_CDB_SIZE 16 | ||
208 | |||
209 | /* | ||
204 | * The default maximum s/g segment size of a FireWire controller is | 210 | * The default maximum s/g segment size of a FireWire controller is |
205 | * usually 0x10000, but SBP-2 only allows 0xffff. Since buffers have to | 211 | * usually 0x10000, but SBP-2 only allows 0xffff. Since buffers have to |
206 | * be quadlet-aligned, we set the length limit to 0xffff & ~3. | 212 | * be quadlet-aligned, we set the length limit to 0xffff & ~3. |
@@ -312,7 +318,7 @@ struct sbp2_command_orb { | |||
312 | struct sbp2_pointer next; | 318 | struct sbp2_pointer next; |
313 | struct sbp2_pointer data_descriptor; | 319 | struct sbp2_pointer data_descriptor; |
314 | __be32 misc; | 320 | __be32 misc; |
315 | u8 command_block[12]; | 321 | u8 command_block[SBP2_MAX_CDB_SIZE]; |
316 | } request; | 322 | } request; |
317 | struct scsi_cmnd *cmd; | 323 | struct scsi_cmnd *cmd; |
318 | scsi_done_fn_t done; | 324 | scsi_done_fn_t done; |
@@ -1146,6 +1152,8 @@ static int sbp2_probe(struct device *dev) | |||
1146 | if (fw_device_enable_phys_dma(device) < 0) | 1152 | if (fw_device_enable_phys_dma(device) < 0) |
1147 | goto fail_shost_put; | 1153 | goto fail_shost_put; |
1148 | 1154 | ||
1155 | shost->max_cmd_len = SBP2_MAX_CDB_SIZE; | ||
1156 | |||
1149 | if (scsi_add_host(shost, &unit->device) < 0) | 1157 | if (scsi_add_host(shost, &unit->device) < 0) |
1150 | goto fail_shost_put; | 1158 | goto fail_shost_put; |
1151 | 1159 | ||
diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig index 3582c39f9725..96dda81c9228 100644 --- a/drivers/gpio/Kconfig +++ b/drivers/gpio/Kconfig | |||
@@ -79,6 +79,12 @@ config GPIO_XILINX | |||
79 | help | 79 | help |
80 | Say yes here to support the Xilinx FPGA GPIO device | 80 | Say yes here to support the Xilinx FPGA GPIO device |
81 | 81 | ||
82 | config GPIO_VR41XX | ||
83 | tristate "NEC VR4100 series General-purpose I/O Uint support" | ||
84 | depends on CPU_VR41XX | ||
85 | help | ||
86 | Say yes here to support the NEC VR4100 series General-purpose I/O Uint | ||
87 | |||
82 | comment "I2C GPIO expanders:" | 88 | comment "I2C GPIO expanders:" |
83 | 89 | ||
84 | config GPIO_MAX732X | 90 | config GPIO_MAX732X |
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile index ef90203e8f3c..9244c6fcd8be 100644 --- a/drivers/gpio/Makefile +++ b/drivers/gpio/Makefile | |||
@@ -13,3 +13,4 @@ obj-$(CONFIG_GPIO_PL061) += pl061.o | |||
13 | obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o | 13 | obj-$(CONFIG_GPIO_TWL4030) += twl4030-gpio.o |
14 | obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o | 14 | obj-$(CONFIG_GPIO_XILINX) += xilinx_gpio.o |
15 | obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o | 15 | obj-$(CONFIG_GPIO_BT8XX) += bt8xxgpio.o |
16 | obj-$(CONFIG_GPIO_VR41XX) += vr41xx_giu.o | ||
diff --git a/drivers/gpio/vr41xx_giu.c b/drivers/gpio/vr41xx_giu.c new file mode 100644 index 000000000000..b70e06133e78 --- /dev/null +++ b/drivers/gpio/vr41xx_giu.c | |||
@@ -0,0 +1,586 @@ | |||
1 | /* | ||
2 | * Driver for NEC VR4100 series General-purpose I/O Unit. | ||
3 | * | ||
4 | * Copyright (C) 2002 MontaVista Software Inc. | ||
5 | * Author: Yoichi Yuasa <source@mvista.com> | ||
6 | * Copyright (C) 2003-2009 Yoichi Yuasa <yuasa@linux-mips.org> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | #include <linux/errno.h> | ||
23 | #include <linux/fs.h> | ||
24 | #include <linux/gpio.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/io.h> | ||
28 | #include <linux/irq.h> | ||
29 | #include <linux/kernel.h> | ||
30 | #include <linux/module.h> | ||
31 | #include <linux/platform_device.h> | ||
32 | #include <linux/smp_lock.h> | ||
33 | #include <linux/spinlock.h> | ||
34 | #include <linux/types.h> | ||
35 | |||
36 | #include <asm/vr41xx/giu.h> | ||
37 | #include <asm/vr41xx/irq.h> | ||
38 | #include <asm/vr41xx/vr41xx.h> | ||
39 | |||
40 | MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>"); | ||
41 | MODULE_DESCRIPTION("NEC VR4100 series General-purpose I/O Unit driver"); | ||
42 | MODULE_LICENSE("GPL"); | ||
43 | |||
44 | #define GIUIOSELL 0x00 | ||
45 | #define GIUIOSELH 0x02 | ||
46 | #define GIUPIODL 0x04 | ||
47 | #define GIUPIODH 0x06 | ||
48 | #define GIUINTSTATL 0x08 | ||
49 | #define GIUINTSTATH 0x0a | ||
50 | #define GIUINTENL 0x0c | ||
51 | #define GIUINTENH 0x0e | ||
52 | #define GIUINTTYPL 0x10 | ||
53 | #define GIUINTTYPH 0x12 | ||
54 | #define GIUINTALSELL 0x14 | ||
55 | #define GIUINTALSELH 0x16 | ||
56 | #define GIUINTHTSELL 0x18 | ||
57 | #define GIUINTHTSELH 0x1a | ||
58 | #define GIUPODATL 0x1c | ||
59 | #define GIUPODATEN 0x1c | ||
60 | #define GIUPODATH 0x1e | ||
61 | #define PIOEN0 0x0100 | ||
62 | #define PIOEN1 0x0200 | ||
63 | #define GIUPODAT 0x1e | ||
64 | #define GIUFEDGEINHL 0x20 | ||
65 | #define GIUFEDGEINHH 0x22 | ||
66 | #define GIUREDGEINHL 0x24 | ||
67 | #define GIUREDGEINHH 0x26 | ||
68 | |||
69 | #define GIUUSEUPDN 0x1e0 | ||
70 | #define GIUTERMUPDN 0x1e2 | ||
71 | |||
72 | #define GPIO_HAS_PULLUPDOWN_IO 0x0001 | ||
73 | #define GPIO_HAS_OUTPUT_ENABLE 0x0002 | ||
74 | #define GPIO_HAS_INTERRUPT_EDGE_SELECT 0x0100 | ||
75 | |||
76 | enum { | ||
77 | GPIO_INPUT, | ||
78 | GPIO_OUTPUT, | ||
79 | }; | ||
80 | |||
81 | static DEFINE_SPINLOCK(giu_lock); | ||
82 | static unsigned long giu_flags; | ||
83 | |||
84 | static void __iomem *giu_base; | ||
85 | |||
86 | #define giu_read(offset) readw(giu_base + (offset)) | ||
87 | #define giu_write(offset, value) writew((value), giu_base + (offset)) | ||
88 | |||
89 | #define GPIO_PIN_OF_IRQ(irq) ((irq) - GIU_IRQ_BASE) | ||
90 | #define GIUINT_HIGH_OFFSET 16 | ||
91 | #define GIUINT_HIGH_MAX 32 | ||
92 | |||
93 | static inline u16 giu_set(u16 offset, u16 set) | ||
94 | { | ||
95 | u16 data; | ||
96 | |||
97 | data = giu_read(offset); | ||
98 | data |= set; | ||
99 | giu_write(offset, data); | ||
100 | |||
101 | return data; | ||
102 | } | ||
103 | |||
104 | static inline u16 giu_clear(u16 offset, u16 clear) | ||
105 | { | ||
106 | u16 data; | ||
107 | |||
108 | data = giu_read(offset); | ||
109 | data &= ~clear; | ||
110 | giu_write(offset, data); | ||
111 | |||
112 | return data; | ||
113 | } | ||
114 | |||
115 | static void ack_giuint_low(unsigned int irq) | ||
116 | { | ||
117 | giu_write(GIUINTSTATL, 1 << GPIO_PIN_OF_IRQ(irq)); | ||
118 | } | ||
119 | |||
120 | static void mask_giuint_low(unsigned int irq) | ||
121 | { | ||
122 | giu_clear(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(irq)); | ||
123 | } | ||
124 | |||
125 | static void mask_ack_giuint_low(unsigned int irq) | ||
126 | { | ||
127 | unsigned int pin; | ||
128 | |||
129 | pin = GPIO_PIN_OF_IRQ(irq); | ||
130 | giu_clear(GIUINTENL, 1 << pin); | ||
131 | giu_write(GIUINTSTATL, 1 << pin); | ||
132 | } | ||
133 | |||
134 | static void unmask_giuint_low(unsigned int irq) | ||
135 | { | ||
136 | giu_set(GIUINTENL, 1 << GPIO_PIN_OF_IRQ(irq)); | ||
137 | } | ||
138 | |||
139 | static struct irq_chip giuint_low_irq_chip = { | ||
140 | .name = "GIUINTL", | ||
141 | .ack = ack_giuint_low, | ||
142 | .mask = mask_giuint_low, | ||
143 | .mask_ack = mask_ack_giuint_low, | ||
144 | .unmask = unmask_giuint_low, | ||
145 | }; | ||
146 | |||
147 | static void ack_giuint_high(unsigned int irq) | ||
148 | { | ||
149 | giu_write(GIUINTSTATH, | ||
150 | 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET)); | ||
151 | } | ||
152 | |||
153 | static void mask_giuint_high(unsigned int irq) | ||
154 | { | ||
155 | giu_clear(GIUINTENH, 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET)); | ||
156 | } | ||
157 | |||
158 | static void mask_ack_giuint_high(unsigned int irq) | ||
159 | { | ||
160 | unsigned int pin; | ||
161 | |||
162 | pin = GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET; | ||
163 | giu_clear(GIUINTENH, 1 << pin); | ||
164 | giu_write(GIUINTSTATH, 1 << pin); | ||
165 | } | ||
166 | |||
167 | static void unmask_giuint_high(unsigned int irq) | ||
168 | { | ||
169 | giu_set(GIUINTENH, 1 << (GPIO_PIN_OF_IRQ(irq) - GIUINT_HIGH_OFFSET)); | ||
170 | } | ||
171 | |||
172 | static struct irq_chip giuint_high_irq_chip = { | ||
173 | .name = "GIUINTH", | ||
174 | .ack = ack_giuint_high, | ||
175 | .mask = mask_giuint_high, | ||
176 | .mask_ack = mask_ack_giuint_high, | ||
177 | .unmask = unmask_giuint_high, | ||
178 | }; | ||
179 | |||
180 | static int giu_get_irq(unsigned int irq) | ||
181 | { | ||
182 | u16 pendl, pendh, maskl, maskh; | ||
183 | int i; | ||
184 | |||
185 | pendl = giu_read(GIUINTSTATL); | ||
186 | pendh = giu_read(GIUINTSTATH); | ||
187 | maskl = giu_read(GIUINTENL); | ||
188 | maskh = giu_read(GIUINTENH); | ||
189 | |||
190 | maskl &= pendl; | ||
191 | maskh &= pendh; | ||
192 | |||
193 | if (maskl) { | ||
194 | for (i = 0; i < 16; i++) { | ||
195 | if (maskl & (1 << i)) | ||
196 | return GIU_IRQ(i); | ||
197 | } | ||
198 | } else if (maskh) { | ||
199 | for (i = 0; i < 16; i++) { | ||
200 | if (maskh & (1 << i)) | ||
201 | return GIU_IRQ(i + GIUINT_HIGH_OFFSET); | ||
202 | } | ||
203 | } | ||
204 | |||
205 | printk(KERN_ERR "spurious GIU interrupt: %04x(%04x),%04x(%04x)\n", | ||
206 | maskl, pendl, maskh, pendh); | ||
207 | |||
208 | atomic_inc(&irq_err_count); | ||
209 | |||
210 | return -EINVAL; | ||
211 | } | ||
212 | |||
213 | void vr41xx_set_irq_trigger(unsigned int pin, irq_trigger_t trigger, | ||
214 | irq_signal_t signal) | ||
215 | { | ||
216 | u16 mask; | ||
217 | |||
218 | if (pin < GIUINT_HIGH_OFFSET) { | ||
219 | mask = 1 << pin; | ||
220 | if (trigger != IRQ_TRIGGER_LEVEL) { | ||
221 | giu_set(GIUINTTYPL, mask); | ||
222 | if (signal == IRQ_SIGNAL_HOLD) | ||
223 | giu_set(GIUINTHTSELL, mask); | ||
224 | else | ||
225 | giu_clear(GIUINTHTSELL, mask); | ||
226 | if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) { | ||
227 | switch (trigger) { | ||
228 | case IRQ_TRIGGER_EDGE_FALLING: | ||
229 | giu_set(GIUFEDGEINHL, mask); | ||
230 | giu_clear(GIUREDGEINHL, mask); | ||
231 | break; | ||
232 | case IRQ_TRIGGER_EDGE_RISING: | ||
233 | giu_clear(GIUFEDGEINHL, mask); | ||
234 | giu_set(GIUREDGEINHL, mask); | ||
235 | break; | ||
236 | default: | ||
237 | giu_set(GIUFEDGEINHL, mask); | ||
238 | giu_set(GIUREDGEINHL, mask); | ||
239 | break; | ||
240 | } | ||
241 | } | ||
242 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
243 | &giuint_low_irq_chip, | ||
244 | handle_edge_irq); | ||
245 | } else { | ||
246 | giu_clear(GIUINTTYPL, mask); | ||
247 | giu_clear(GIUINTHTSELL, mask); | ||
248 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
249 | &giuint_low_irq_chip, | ||
250 | handle_level_irq); | ||
251 | } | ||
252 | giu_write(GIUINTSTATL, mask); | ||
253 | } else if (pin < GIUINT_HIGH_MAX) { | ||
254 | mask = 1 << (pin - GIUINT_HIGH_OFFSET); | ||
255 | if (trigger != IRQ_TRIGGER_LEVEL) { | ||
256 | giu_set(GIUINTTYPH, mask); | ||
257 | if (signal == IRQ_SIGNAL_HOLD) | ||
258 | giu_set(GIUINTHTSELH, mask); | ||
259 | else | ||
260 | giu_clear(GIUINTHTSELH, mask); | ||
261 | if (giu_flags & GPIO_HAS_INTERRUPT_EDGE_SELECT) { | ||
262 | switch (trigger) { | ||
263 | case IRQ_TRIGGER_EDGE_FALLING: | ||
264 | giu_set(GIUFEDGEINHH, mask); | ||
265 | giu_clear(GIUREDGEINHH, mask); | ||
266 | break; | ||
267 | case IRQ_TRIGGER_EDGE_RISING: | ||
268 | giu_clear(GIUFEDGEINHH, mask); | ||
269 | giu_set(GIUREDGEINHH, mask); | ||
270 | break; | ||
271 | default: | ||
272 | giu_set(GIUFEDGEINHH, mask); | ||
273 | giu_set(GIUREDGEINHH, mask); | ||
274 | break; | ||
275 | } | ||
276 | } | ||
277 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
278 | &giuint_high_irq_chip, | ||
279 | handle_edge_irq); | ||
280 | } else { | ||
281 | giu_clear(GIUINTTYPH, mask); | ||
282 | giu_clear(GIUINTHTSELH, mask); | ||
283 | set_irq_chip_and_handler(GIU_IRQ(pin), | ||
284 | &giuint_high_irq_chip, | ||
285 | handle_level_irq); | ||
286 | } | ||
287 | giu_write(GIUINTSTATH, mask); | ||
288 | } | ||
289 | } | ||
290 | EXPORT_SYMBOL_GPL(vr41xx_set_irq_trigger); | ||
291 | |||
292 | void vr41xx_set_irq_level(unsigned int pin, irq_level_t level) | ||
293 | { | ||
294 | u16 mask; | ||
295 | |||
296 | if (pin < GIUINT_HIGH_OFFSET) { | ||
297 | mask = 1 << pin; | ||
298 | if (level == IRQ_LEVEL_HIGH) | ||
299 | giu_set(GIUINTALSELL, mask); | ||
300 | else | ||
301 | giu_clear(GIUINTALSELL, mask); | ||
302 | giu_write(GIUINTSTATL, mask); | ||
303 | } else if (pin < GIUINT_HIGH_MAX) { | ||
304 | mask = 1 << (pin - GIUINT_HIGH_OFFSET); | ||
305 | if (level == IRQ_LEVEL_HIGH) | ||
306 | giu_set(GIUINTALSELH, mask); | ||
307 | else | ||
308 | giu_clear(GIUINTALSELH, mask); | ||
309 | giu_write(GIUINTSTATH, mask); | ||
310 | } | ||
311 | } | ||
312 | EXPORT_SYMBOL_GPL(vr41xx_set_irq_level); | ||
313 | |||
314 | static int giu_set_direction(struct gpio_chip *chip, unsigned pin, int dir) | ||
315 | { | ||
316 | u16 offset, mask, reg; | ||
317 | unsigned long flags; | ||
318 | |||
319 | if (pin >= chip->ngpio) | ||
320 | return -EINVAL; | ||
321 | |||
322 | if (pin < 16) { | ||
323 | offset = GIUIOSELL; | ||
324 | mask = 1 << pin; | ||
325 | } else if (pin < 32) { | ||
326 | offset = GIUIOSELH; | ||
327 | mask = 1 << (pin - 16); | ||
328 | } else { | ||
329 | if (giu_flags & GPIO_HAS_OUTPUT_ENABLE) { | ||
330 | offset = GIUPODATEN; | ||
331 | mask = 1 << (pin - 32); | ||
332 | } else { | ||
333 | switch (pin) { | ||
334 | case 48: | ||
335 | offset = GIUPODATH; | ||
336 | mask = PIOEN0; | ||
337 | break; | ||
338 | case 49: | ||
339 | offset = GIUPODATH; | ||
340 | mask = PIOEN1; | ||
341 | break; | ||
342 | default: | ||
343 | return -EINVAL; | ||
344 | } | ||
345 | } | ||
346 | } | ||
347 | |||
348 | spin_lock_irqsave(&giu_lock, flags); | ||
349 | |||
350 | reg = giu_read(offset); | ||
351 | if (dir == GPIO_OUTPUT) | ||
352 | reg |= mask; | ||
353 | else | ||
354 | reg &= ~mask; | ||
355 | giu_write(offset, reg); | ||
356 | |||
357 | spin_unlock_irqrestore(&giu_lock, flags); | ||
358 | |||
359 | return 0; | ||
360 | } | ||
361 | |||
362 | int vr41xx_gpio_pullupdown(unsigned int pin, gpio_pull_t pull) | ||
363 | { | ||
364 | u16 reg, mask; | ||
365 | unsigned long flags; | ||
366 | |||
367 | if ((giu_flags & GPIO_HAS_PULLUPDOWN_IO) != GPIO_HAS_PULLUPDOWN_IO) | ||
368 | return -EPERM; | ||
369 | |||
370 | if (pin >= 15) | ||
371 | return -EINVAL; | ||
372 | |||
373 | mask = 1 << pin; | ||
374 | |||
375 | spin_lock_irqsave(&giu_lock, flags); | ||
376 | |||
377 | if (pull == GPIO_PULL_UP || pull == GPIO_PULL_DOWN) { | ||
378 | reg = giu_read(GIUTERMUPDN); | ||
379 | if (pull == GPIO_PULL_UP) | ||
380 | reg |= mask; | ||
381 | else | ||
382 | reg &= ~mask; | ||
383 | giu_write(GIUTERMUPDN, reg); | ||
384 | |||
385 | reg = giu_read(GIUUSEUPDN); | ||
386 | reg |= mask; | ||
387 | giu_write(GIUUSEUPDN, reg); | ||
388 | } else { | ||
389 | reg = giu_read(GIUUSEUPDN); | ||
390 | reg &= ~mask; | ||
391 | giu_write(GIUUSEUPDN, reg); | ||
392 | } | ||
393 | |||
394 | spin_unlock_irqrestore(&giu_lock, flags); | ||
395 | |||
396 | return 0; | ||
397 | } | ||
398 | EXPORT_SYMBOL_GPL(vr41xx_gpio_pullupdown); | ||
399 | |||
400 | static int vr41xx_gpio_get(struct gpio_chip *chip, unsigned pin) | ||
401 | { | ||
402 | u16 reg, mask; | ||
403 | |||
404 | if (pin >= chip->ngpio) | ||
405 | return -EINVAL; | ||
406 | |||
407 | if (pin < 16) { | ||
408 | reg = giu_read(GIUPIODL); | ||
409 | mask = 1 << pin; | ||
410 | } else if (pin < 32) { | ||
411 | reg = giu_read(GIUPIODH); | ||
412 | mask = 1 << (pin - 16); | ||
413 | } else if (pin < 48) { | ||
414 | reg = giu_read(GIUPODATL); | ||
415 | mask = 1 << (pin - 32); | ||
416 | } else { | ||
417 | reg = giu_read(GIUPODATH); | ||
418 | mask = 1 << (pin - 48); | ||
419 | } | ||
420 | |||
421 | if (reg & mask) | ||
422 | return 1; | ||
423 | |||
424 | return 0; | ||
425 | } | ||
426 | |||
427 | static void vr41xx_gpio_set(struct gpio_chip *chip, unsigned pin, | ||
428 | int value) | ||
429 | { | ||
430 | u16 offset, mask, reg; | ||
431 | unsigned long flags; | ||
432 | |||
433 | if (pin >= chip->ngpio) | ||
434 | return; | ||
435 | |||
436 | if (pin < 16) { | ||
437 | offset = GIUPIODL; | ||
438 | mask = 1 << pin; | ||
439 | } else if (pin < 32) { | ||
440 | offset = GIUPIODH; | ||
441 | mask = 1 << (pin - 16); | ||
442 | } else if (pin < 48) { | ||
443 | offset = GIUPODATL; | ||
444 | mask = 1 << (pin - 32); | ||
445 | } else { | ||
446 | offset = GIUPODATH; | ||
447 | mask = 1 << (pin - 48); | ||
448 | } | ||
449 | |||
450 | spin_lock_irqsave(&giu_lock, flags); | ||
451 | |||
452 | reg = giu_read(offset); | ||
453 | if (value) | ||
454 | reg |= mask; | ||
455 | else | ||
456 | reg &= ~mask; | ||
457 | giu_write(offset, reg); | ||
458 | |||
459 | spin_unlock_irqrestore(&giu_lock, flags); | ||
460 | } | ||
461 | |||
462 | |||
463 | static int vr41xx_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | ||
464 | { | ||
465 | return giu_set_direction(chip, offset, GPIO_INPUT); | ||
466 | } | ||
467 | |||
468 | static int vr41xx_gpio_direction_output(struct gpio_chip *chip, unsigned offset, | ||
469 | int value) | ||
470 | { | ||
471 | vr41xx_gpio_set(chip, offset, value); | ||
472 | |||
473 | return giu_set_direction(chip, offset, GPIO_OUTPUT); | ||
474 | } | ||
475 | |||
476 | static int vr41xx_gpio_to_irq(struct gpio_chip *chip, unsigned offset) | ||
477 | { | ||
478 | if (offset >= chip->ngpio) | ||
479 | return -EINVAL; | ||
480 | |||
481 | return GIU_IRQ_BASE + offset; | ||
482 | } | ||
483 | |||
484 | static struct gpio_chip vr41xx_gpio_chip = { | ||
485 | .label = "vr41xx", | ||
486 | .owner = THIS_MODULE, | ||
487 | .direction_input = vr41xx_gpio_direction_input, | ||
488 | .get = vr41xx_gpio_get, | ||
489 | .direction_output = vr41xx_gpio_direction_output, | ||
490 | .set = vr41xx_gpio_set, | ||
491 | .to_irq = vr41xx_gpio_to_irq, | ||
492 | }; | ||
493 | |||
494 | static int __devinit giu_probe(struct platform_device *pdev) | ||
495 | { | ||
496 | struct resource *res; | ||
497 | unsigned int trigger, i, pin; | ||
498 | struct irq_chip *chip; | ||
499 | int irq, retval; | ||
500 | |||
501 | switch (pdev->id) { | ||
502 | case GPIO_50PINS_PULLUPDOWN: | ||
503 | giu_flags = GPIO_HAS_PULLUPDOWN_IO; | ||
504 | vr41xx_gpio_chip.ngpio = 50; | ||
505 | break; | ||
506 | case GPIO_36PINS: | ||
507 | vr41xx_gpio_chip.ngpio = 36; | ||
508 | break; | ||
509 | case GPIO_48PINS_EDGE_SELECT: | ||
510 | giu_flags = GPIO_HAS_INTERRUPT_EDGE_SELECT; | ||
511 | vr41xx_gpio_chip.ngpio = 48; | ||
512 | break; | ||
513 | default: | ||
514 | dev_err(&pdev->dev, "GIU: unknown ID %d\n", pdev->id); | ||
515 | return -ENODEV; | ||
516 | } | ||
517 | |||
518 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
519 | if (!res) | ||
520 | return -EBUSY; | ||
521 | |||
522 | giu_base = ioremap(res->start, res->end - res->start + 1); | ||
523 | if (!giu_base) | ||
524 | return -ENOMEM; | ||
525 | |||
526 | vr41xx_gpio_chip.dev = &pdev->dev; | ||
527 | |||
528 | retval = gpiochip_add(&vr41xx_gpio_chip); | ||
529 | |||
530 | giu_write(GIUINTENL, 0); | ||
531 | giu_write(GIUINTENH, 0); | ||
532 | |||
533 | trigger = giu_read(GIUINTTYPH) << 16; | ||
534 | trigger |= giu_read(GIUINTTYPL); | ||
535 | for (i = GIU_IRQ_BASE; i <= GIU_IRQ_LAST; i++) { | ||
536 | pin = GPIO_PIN_OF_IRQ(i); | ||
537 | if (pin < GIUINT_HIGH_OFFSET) | ||
538 | chip = &giuint_low_irq_chip; | ||
539 | else | ||
540 | chip = &giuint_high_irq_chip; | ||
541 | |||
542 | if (trigger & (1 << pin)) | ||
543 | set_irq_chip_and_handler(i, chip, handle_edge_irq); | ||
544 | else | ||
545 | set_irq_chip_and_handler(i, chip, handle_level_irq); | ||
546 | |||
547 | } | ||
548 | |||
549 | irq = platform_get_irq(pdev, 0); | ||
550 | if (irq < 0 || irq >= nr_irqs) | ||
551 | return -EBUSY; | ||
552 | |||
553 | return cascade_irq(irq, giu_get_irq); | ||
554 | } | ||
555 | |||
556 | static int __devexit giu_remove(struct platform_device *pdev) | ||
557 | { | ||
558 | if (giu_base) { | ||
559 | iounmap(giu_base); | ||
560 | giu_base = NULL; | ||
561 | } | ||
562 | |||
563 | return 0; | ||
564 | } | ||
565 | |||
566 | static struct platform_driver giu_device_driver = { | ||
567 | .probe = giu_probe, | ||
568 | .remove = __devexit_p(giu_remove), | ||
569 | .driver = { | ||
570 | .name = "GIU", | ||
571 | .owner = THIS_MODULE, | ||
572 | }, | ||
573 | }; | ||
574 | |||
575 | static int __init vr41xx_giu_init(void) | ||
576 | { | ||
577 | return platform_driver_register(&giu_device_driver); | ||
578 | } | ||
579 | |||
580 | static void __exit vr41xx_giu_exit(void) | ||
581 | { | ||
582 | platform_driver_unregister(&giu_device_driver); | ||
583 | } | ||
584 | |||
585 | module_init(vr41xx_giu_init); | ||
586 | module_exit(vr41xx_giu_exit); | ||
diff --git a/drivers/ieee1394/sbp2.c b/drivers/ieee1394/sbp2.c index 83b734aec923..52b25f8b111d 100644 --- a/drivers/ieee1394/sbp2.c +++ b/drivers/ieee1394/sbp2.c | |||
@@ -880,6 +880,7 @@ static struct sbp2_lu *sbp2_alloc_device(struct unit_directory *ud) | |||
880 | } | 880 | } |
881 | 881 | ||
882 | shost->hostdata[0] = (unsigned long)lu; | 882 | shost->hostdata[0] = (unsigned long)lu; |
883 | shost->max_cmd_len = SBP2_MAX_CDB_SIZE; | ||
883 | 884 | ||
884 | if (!scsi_add_host(shost, &ud->device)) { | 885 | if (!scsi_add_host(shost, &ud->device)) { |
885 | lu->shost = shost; | 886 | lu->shost = shost; |
diff --git a/drivers/ieee1394/sbp2.h b/drivers/ieee1394/sbp2.h index c5036f1cc5b0..64a3a66a8a39 100644 --- a/drivers/ieee1394/sbp2.h +++ b/drivers/ieee1394/sbp2.h | |||
@@ -25,6 +25,12 @@ | |||
25 | #define SBP2_DEVICE_NAME "sbp2" | 25 | #define SBP2_DEVICE_NAME "sbp2" |
26 | 26 | ||
27 | /* | 27 | /* |
28 | * There is no transport protocol limit to the CDB length, but we implement | ||
29 | * a fixed length only. 16 bytes is enough for disks larger than 2 TB. | ||
30 | */ | ||
31 | #define SBP2_MAX_CDB_SIZE 16 | ||
32 | |||
33 | /* | ||
28 | * SBP-2 specific definitions | 34 | * SBP-2 specific definitions |
29 | */ | 35 | */ |
30 | 36 | ||
@@ -51,7 +57,7 @@ struct sbp2_command_orb { | |||
51 | u32 data_descriptor_hi; | 57 | u32 data_descriptor_hi; |
52 | u32 data_descriptor_lo; | 58 | u32 data_descriptor_lo; |
53 | u32 misc; | 59 | u32 misc; |
54 | u8 cdb[12]; | 60 | u8 cdb[SBP2_MAX_CDB_SIZE]; |
55 | } __attribute__((packed)); | 61 | } __attribute__((packed)); |
56 | 62 | ||
57 | #define SBP2_LOGIN_REQUEST 0x0 | 63 | #define SBP2_LOGIN_REQUEST 0x0 |
diff --git a/drivers/input/misc/cobalt_btns.c b/drivers/input/misc/cobalt_btns.c index 2adf9cb265da..d114d3a9e1e9 100644 --- a/drivers/input/misc/cobalt_btns.c +++ b/drivers/input/misc/cobalt_btns.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Cobalt button interface driver. | 2 | * Cobalt button interface driver. |
3 | * | 3 | * |
4 | * Copyright (C) 2007-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -148,7 +148,7 @@ static int __devexit cobalt_buttons_remove(struct platform_device *pdev) | |||
148 | return 0; | 148 | return 0; |
149 | } | 149 | } |
150 | 150 | ||
151 | MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>"); | 151 | MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>"); |
152 | MODULE_DESCRIPTION("Cobalt button interface driver"); | 152 | MODULE_DESCRIPTION("Cobalt button interface driver"); |
153 | MODULE_LICENSE("GPL"); | 153 | MODULE_LICENSE("GPL"); |
154 | /* work with hotplug and coldplug */ | 154 | /* work with hotplug and coldplug */ |
diff --git a/drivers/leds/leds-cobalt-raq.c b/drivers/leds/leds-cobalt-raq.c index ff0e8c3fbf9b..5f1ce810815f 100644 --- a/drivers/leds/leds-cobalt-raq.c +++ b/drivers/leds/leds-cobalt-raq.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * LEDs driver for the Cobalt Raq series. | 2 | * LEDs driver for the Cobalt Raq series. |
3 | * | 3 | * |
4 | * Copyright (C) 2007 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2007 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/drivers/media/common/tuners/tuner-xc2028.c b/drivers/media/common/tuners/tuner-xc2028.c index b6da9c3873fe..aa20ce8cc668 100644 --- a/drivers/media/common/tuners/tuner-xc2028.c +++ b/drivers/media/common/tuners/tuner-xc2028.c | |||
@@ -1096,8 +1096,19 @@ static int xc2028_set_params(struct dvb_frontend *fe, | |||
1096 | } | 1096 | } |
1097 | 1097 | ||
1098 | /* All S-code tables need a 200kHz shift */ | 1098 | /* All S-code tables need a 200kHz shift */ |
1099 | if (priv->ctrl.demod) | 1099 | if (priv->ctrl.demod) { |
1100 | demod = priv->ctrl.demod + 200; | 1100 | demod = priv->ctrl.demod + 200; |
1101 | /* | ||
1102 | * The DTV7 S-code table needs a 700 kHz shift. | ||
1103 | * Thanks to Terry Wu <terrywu2009@gmail.com> for reporting this | ||
1104 | * | ||
1105 | * DTV7 is only used in Australia. Germany or Italy may also | ||
1106 | * use this firmware after initialization, but a tune to a UHF | ||
1107 | * channel should then cause DTV78 to be used. | ||
1108 | */ | ||
1109 | if (type & DTV7) | ||
1110 | demod += 500; | ||
1111 | } | ||
1101 | 1112 | ||
1102 | return generic_set_freq(fe, p->frequency, | 1113 | return generic_set_freq(fe, p->frequency, |
1103 | T_DIGITAL_TV, type, 0, demod); | 1114 | T_DIGITAL_TV, type, 0, demod); |
diff --git a/drivers/media/dvb/ttpci/Kconfig b/drivers/media/dvb/ttpci/Kconfig index 68eb4493f991..d8d4214fd65f 100644 --- a/drivers/media/dvb/ttpci/Kconfig +++ b/drivers/media/dvb/ttpci/Kconfig | |||
@@ -1,5 +1,6 @@ | |||
1 | config TTPCI_EEPROM | 1 | config TTPCI_EEPROM |
2 | tristate | 2 | tristate |
3 | depends on I2C | ||
3 | default n | 4 | default n |
4 | 5 | ||
5 | config DVB_AV7110 | 6 | config DVB_AV7110 |
diff --git a/drivers/media/radio/radio-si470x.c b/drivers/media/radio/radio-si470x.c index 640421ceb24a..46d216329611 100644 --- a/drivers/media/radio/radio-si470x.c +++ b/drivers/media/radio/radio-si470x.c | |||
@@ -1200,7 +1200,7 @@ static int si470x_fops_release(struct file *file) | |||
1200 | video_unregister_device(radio->videodev); | 1200 | video_unregister_device(radio->videodev); |
1201 | kfree(radio->buffer); | 1201 | kfree(radio->buffer); |
1202 | kfree(radio); | 1202 | kfree(radio); |
1203 | goto done; | 1203 | goto unlock; |
1204 | } | 1204 | } |
1205 | 1205 | ||
1206 | /* stop rds reception */ | 1206 | /* stop rds reception */ |
@@ -1213,9 +1213,8 @@ static int si470x_fops_release(struct file *file) | |||
1213 | retval = si470x_stop(radio); | 1213 | retval = si470x_stop(radio); |
1214 | usb_autopm_put_interface(radio->intf); | 1214 | usb_autopm_put_interface(radio->intf); |
1215 | } | 1215 | } |
1216 | 1216 | unlock: | |
1217 | mutex_unlock(&radio->disconnect_lock); | 1217 | mutex_unlock(&radio->disconnect_lock); |
1218 | |||
1219 | done: | 1218 | done: |
1220 | return retval; | 1219 | return retval; |
1221 | } | 1220 | } |
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig index 061e147f6f26..84b6fc15519d 100644 --- a/drivers/media/video/Kconfig +++ b/drivers/media/video/Kconfig | |||
@@ -312,6 +312,14 @@ config VIDEO_OV7670 | |||
312 | OV7670 VGA camera. It currently only works with the M88ALP01 | 312 | OV7670 VGA camera. It currently only works with the M88ALP01 |
313 | controller. | 313 | controller. |
314 | 314 | ||
315 | config VIDEO_MT9V011 | ||
316 | tristate "Micron mt9v011 sensor support" | ||
317 | depends on I2C && VIDEO_V4L2 | ||
318 | ---help--- | ||
319 | This is a Video4Linux2 sensor-level driver for the Micron | ||
320 | mt0v011 1.3 Mpixel camera. It currently only works with the | ||
321 | em28xx driver. | ||
322 | |||
315 | config VIDEO_TCM825X | 323 | config VIDEO_TCM825X |
316 | tristate "TCM825x camera sensor support" | 324 | tristate "TCM825x camera sensor support" |
317 | depends on I2C && VIDEO_V4L2 | 325 | depends on I2C && VIDEO_V4L2 |
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile index 7fb3add1b387..9f2e3214a482 100644 --- a/drivers/media/video/Makefile +++ b/drivers/media/video/Makefile | |||
@@ -69,6 +69,7 @@ obj-$(CONFIG_VIDEO_UPD64083) += upd64083.o | |||
69 | obj-$(CONFIG_VIDEO_OV7670) += ov7670.o | 69 | obj-$(CONFIG_VIDEO_OV7670) += ov7670.o |
70 | obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o | 70 | obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o |
71 | obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o | 71 | obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o |
72 | obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o | ||
72 | 73 | ||
73 | obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o | 74 | obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o |
74 | obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o | 75 | obj-$(CONFIG_SOC_CAMERA_MT9M111) += mt9m111.o |
diff --git a/drivers/media/video/cx18/cx18-cards.c b/drivers/media/video/cx18/cx18-cards.c index c92a25036f0e..36f2d76006fd 100644 --- a/drivers/media/video/cx18/cx18-cards.c +++ b/drivers/media/video/cx18/cx18-cards.c | |||
@@ -198,11 +198,14 @@ static const struct cx18_card_pci_info cx18_pci_mpc718[] = { | |||
198 | 198 | ||
199 | static const struct cx18_card cx18_card_mpc718 = { | 199 | static const struct cx18_card cx18_card_mpc718 = { |
200 | .type = CX18_CARD_YUAN_MPC718, | 200 | .type = CX18_CARD_YUAN_MPC718, |
201 | .name = "Yuan MPC718", | 201 | .name = "Yuan MPC718 MiniPCI DVB-T/Analog", |
202 | .comment = "Analog video capture works; some audio line in may not.\n", | 202 | .comment = "Experimenters needed for device to work well.\n" |
203 | "\tTo help, mail the ivtv-devel list (www.ivtvdriver.org).\n", | ||
203 | .v4l2_capabilities = CX18_CAP_ENCODER, | 204 | .v4l2_capabilities = CX18_CAP_ENCODER, |
204 | .hw_audio_ctrl = CX18_HW_418_AV, | 205 | .hw_audio_ctrl = CX18_HW_418_AV, |
205 | .hw_all = CX18_HW_418_AV | CX18_HW_TUNER | CX18_HW_GPIO_RESET_CTRL, | 206 | .hw_muxer = CX18_HW_GPIO_MUX, |
207 | .hw_all = CX18_HW_418_AV | CX18_HW_TUNER | | ||
208 | CX18_HW_GPIO_MUX | CX18_HW_DVB | CX18_HW_GPIO_RESET_CTRL, | ||
206 | .video_inputs = { | 209 | .video_inputs = { |
207 | { CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE2 }, | 210 | { CX18_CARD_INPUT_VID_TUNER, 0, CX18_AV_COMPOSITE2 }, |
208 | { CX18_CARD_INPUT_SVIDEO1, 1, | 211 | { CX18_CARD_INPUT_SVIDEO1, 1, |
@@ -211,27 +214,34 @@ static const struct cx18_card cx18_card_mpc718 = { | |||
211 | { CX18_CARD_INPUT_SVIDEO2, 2, | 214 | { CX18_CARD_INPUT_SVIDEO2, 2, |
212 | CX18_AV_SVIDEO_LUMA7 | CX18_AV_SVIDEO_CHROMA8 }, | 215 | CX18_AV_SVIDEO_LUMA7 | CX18_AV_SVIDEO_CHROMA8 }, |
213 | { CX18_CARD_INPUT_COMPOSITE2, 2, CX18_AV_COMPOSITE6 }, | 216 | { CX18_CARD_INPUT_COMPOSITE2, 2, CX18_AV_COMPOSITE6 }, |
214 | { CX18_CARD_INPUT_COMPOSITE3, 2, CX18_AV_COMPOSITE3 }, | ||
215 | }, | 217 | }, |
216 | .audio_inputs = { | 218 | .audio_inputs = { |
217 | { CX18_CARD_INPUT_AUD_TUNER, CX18_AV_AUDIO5, 0 }, | 219 | { CX18_CARD_INPUT_AUD_TUNER, CX18_AV_AUDIO5, 0 }, |
218 | { CX18_CARD_INPUT_LINE_IN1, CX18_AV_AUDIO_SERIAL1, 0 }, | 220 | { CX18_CARD_INPUT_LINE_IN1, CX18_AV_AUDIO_SERIAL1, 1 }, |
219 | { CX18_CARD_INPUT_LINE_IN2, CX18_AV_AUDIO_SERIAL1, 0 }, | 221 | { CX18_CARD_INPUT_LINE_IN2, CX18_AV_AUDIO_SERIAL2, 1 }, |
220 | }, | 222 | }, |
221 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, CX18_AV_AUDIO_SERIAL1, 0 }, | ||
222 | .tuners = { | 223 | .tuners = { |
223 | /* XC3028 tuner */ | 224 | /* XC3028 tuner */ |
224 | { .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 }, | 225 | { .std = V4L2_STD_ALL, .tuner = TUNER_XC2028 }, |
225 | }, | 226 | }, |
227 | /* FIXME - the FM radio is just a guess and driver doesn't use SIF */ | ||
228 | .radio_input = { CX18_CARD_INPUT_AUD_TUNER, CX18_AV_AUDIO5, 2 }, | ||
226 | .ddr = { | 229 | .ddr = { |
227 | /* Probably Samsung K4D263238G-VC33 memory */ | 230 | /* Hynix HY5DU283222B DDR RAM */ |
228 | .chip_config = 0x003, | 231 | .chip_config = 0x303, |
229 | .refresh = 0x30c, | 232 | .refresh = 0x3bd, |
230 | .timing1 = 0x23230b73, | 233 | .timing1 = 0x36320966, |
231 | .timing2 = 0x08, | 234 | .timing2 = 0x1f, |
232 | .tune_lane = 0, | 235 | .tune_lane = 0, |
233 | .initial_emrs = 2, | 236 | .initial_emrs = 2, |
234 | }, | 237 | }, |
238 | .gpio_init.initial_value = 0x1, | ||
239 | .gpio_init.direction = 0x3, | ||
240 | /* FIXME - these GPIO's are just guesses */ | ||
241 | .gpio_audio_input = { .mask = 0x3, | ||
242 | .tuner = 0x1, | ||
243 | .linein = 0x3, | ||
244 | .radio = 0x1 }, | ||
235 | .xceive_pin = 0, | 245 | .xceive_pin = 0, |
236 | .pci_list = cx18_pci_mpc718, | 246 | .pci_list = cx18_pci_mpc718, |
237 | .i2c = &cx18_i2c_std, | 247 | .i2c = &cx18_i2c_std, |
diff --git a/drivers/media/video/cx18/cx18-dvb.c b/drivers/media/video/cx18/cx18-dvb.c index 6ea3fe623ef4..51a0c33b25b7 100644 --- a/drivers/media/video/cx18/cx18-dvb.c +++ b/drivers/media/video/cx18/cx18-dvb.c | |||
@@ -30,6 +30,10 @@ | |||
30 | #include "s5h1409.h" | 30 | #include "s5h1409.h" |
31 | #include "mxl5005s.h" | 31 | #include "mxl5005s.h" |
32 | #include "zl10353.h" | 32 | #include "zl10353.h" |
33 | |||
34 | #include <linux/firmware.h> | ||
35 | #include "mt352.h" | ||
36 | #include "mt352_priv.h" | ||
33 | #include "tuner-xc2028.h" | 37 | #include "tuner-xc2028.h" |
34 | 38 | ||
35 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | 39 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
@@ -38,6 +42,11 @@ DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | |||
38 | #define CX18_CLOCK_ENABLE2 0xc71024 | 42 | #define CX18_CLOCK_ENABLE2 0xc71024 |
39 | #define CX18_DMUX_CLK_MASK 0x0080 | 43 | #define CX18_DMUX_CLK_MASK 0x0080 |
40 | 44 | ||
45 | /* | ||
46 | * CX18_CARD_HVR_1600_ESMT | ||
47 | * CX18_CARD_HVR_1600_SAMSUNG | ||
48 | */ | ||
49 | |||
41 | static struct mxl5005s_config hauppauge_hvr1600_tuner = { | 50 | static struct mxl5005s_config hauppauge_hvr1600_tuner = { |
42 | .i2c_address = 0xC6 >> 1, | 51 | .i2c_address = 0xC6 >> 1, |
43 | .if_freq = IF_FREQ_5380000HZ, | 52 | .if_freq = IF_FREQ_5380000HZ, |
@@ -65,6 +74,9 @@ static struct s5h1409_config hauppauge_hvr1600_config = { | |||
65 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK | 74 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK |
66 | }; | 75 | }; |
67 | 76 | ||
77 | /* | ||
78 | * CX18_CARD_LEADTEK_DVR3100H | ||
79 | */ | ||
68 | /* Information/confirmation of proper config values provided by Terry Wu */ | 80 | /* Information/confirmation of proper config values provided by Terry Wu */ |
69 | static struct zl10353_config leadtek_dvr3100h_demod = { | 81 | static struct zl10353_config leadtek_dvr3100h_demod = { |
70 | .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ | 82 | .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ |
@@ -74,6 +86,121 @@ static struct zl10353_config leadtek_dvr3100h_demod = { | |||
74 | .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ | 86 | .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ |
75 | }; | 87 | }; |
76 | 88 | ||
89 | /* | ||
90 | * CX18_CARD_YUAN_MPC718 | ||
91 | */ | ||
92 | /* | ||
93 | * Due to | ||
94 | * | ||
95 | * 1. an absence of information on how to prgram the MT352 | ||
96 | * 2. the Linux mt352 module pushing MT352 initialzation off onto us here | ||
97 | * | ||
98 | * We have to use an init sequence that *you* must extract from the Windows | ||
99 | * driver (yuanrap.sys) and which we load as a firmware. | ||
100 | * | ||
101 | * If someone can provide me with a Zarlink MT352 (Intel CE6352?) Design Manual | ||
102 | * with chip programming details, then I can remove this annoyance. | ||
103 | */ | ||
104 | static int yuan_mpc718_mt352_reqfw(struct cx18_stream *stream, | ||
105 | const struct firmware **fw) | ||
106 | { | ||
107 | struct cx18 *cx = stream->cx; | ||
108 | const char *fn = "dvb-cx18-mpc718-mt352.fw"; | ||
109 | int ret; | ||
110 | |||
111 | ret = request_firmware(fw, fn, &cx->pci_dev->dev); | ||
112 | if (ret) | ||
113 | CX18_ERR("Unable to open firmware file %s\n", fn); | ||
114 | else { | ||
115 | size_t sz = (*fw)->size; | ||
116 | if (sz < 2 || sz > 64 || (sz % 2) != 0) { | ||
117 | CX18_ERR("Firmware %s has a bad size: %lu bytes\n", | ||
118 | fn, (unsigned long) sz); | ||
119 | ret = -EILSEQ; | ||
120 | release_firmware(*fw); | ||
121 | *fw = NULL; | ||
122 | } | ||
123 | } | ||
124 | |||
125 | if (ret) { | ||
126 | CX18_ERR("The MPC718 board variant with the MT352 DVB-T" | ||
127 | "demodualtor will not work without it\n"); | ||
128 | CX18_ERR("Run 'linux/Documentation/dvb/get_dvb_firmware " | ||
129 | "mpc718' if you need the firmware\n"); | ||
130 | } | ||
131 | return ret; | ||
132 | } | ||
133 | |||
134 | static int yuan_mpc718_mt352_init(struct dvb_frontend *fe) | ||
135 | { | ||
136 | struct cx18_dvb *dvb = container_of(fe->dvb, | ||
137 | struct cx18_dvb, dvb_adapter); | ||
138 | struct cx18_stream *stream = container_of(dvb, struct cx18_stream, dvb); | ||
139 | const struct firmware *fw = NULL; | ||
140 | int ret; | ||
141 | int i; | ||
142 | u8 buf[3]; | ||
143 | |||
144 | ret = yuan_mpc718_mt352_reqfw(stream, &fw); | ||
145 | if (ret) | ||
146 | return ret; | ||
147 | |||
148 | /* Loop through all the register-value pairs in the firmware file */ | ||
149 | for (i = 0; i < fw->size; i += 2) { | ||
150 | buf[0] = fw->data[i]; | ||
151 | /* Intercept a few registers we want to set ourselves */ | ||
152 | switch (buf[0]) { | ||
153 | case TRL_NOMINAL_RATE_0: | ||
154 | /* Set our custom OFDM bandwidth in the case below */ | ||
155 | break; | ||
156 | case TRL_NOMINAL_RATE_1: | ||
157 | /* 6 MHz: 64/7 * 6/8 / 20.48 * 2^16 = 0x55b6.db6 */ | ||
158 | /* 7 MHz: 64/7 * 7/8 / 20.48 * 2^16 = 0x6400 */ | ||
159 | /* 8 MHz: 64/7 * 8/8 / 20.48 * 2^16 = 0x7249.249 */ | ||
160 | buf[1] = 0x72; | ||
161 | buf[2] = 0x49; | ||
162 | mt352_write(fe, buf, 3); | ||
163 | break; | ||
164 | case INPUT_FREQ_0: | ||
165 | /* Set our custom IF in the case below */ | ||
166 | break; | ||
167 | case INPUT_FREQ_1: | ||
168 | /* 4.56 MHz IF: (20.48 - 4.56)/20.48 * 2^14 = 0x31c0 */ | ||
169 | buf[1] = 0x31; | ||
170 | buf[2] = 0xc0; | ||
171 | mt352_write(fe, buf, 3); | ||
172 | break; | ||
173 | default: | ||
174 | /* Pass through the register-value pair from the fw */ | ||
175 | buf[1] = fw->data[i+1]; | ||
176 | mt352_write(fe, buf, 2); | ||
177 | break; | ||
178 | } | ||
179 | } | ||
180 | |||
181 | buf[0] = (u8) TUNER_GO; | ||
182 | buf[1] = 0x01; /* Go */ | ||
183 | mt352_write(fe, buf, 2); | ||
184 | release_firmware(fw); | ||
185 | return 0; | ||
186 | } | ||
187 | |||
188 | static struct mt352_config yuan_mpc718_mt352_demod = { | ||
189 | .demod_address = 0x1e >> 1, | ||
190 | .adc_clock = 20480, /* 20.480 MHz */ | ||
191 | .if2 = 4560, /* 4.560 MHz */ | ||
192 | .no_tuner = 1, /* XC3028 is not behind the gate */ | ||
193 | .demod_init = yuan_mpc718_mt352_init, | ||
194 | }; | ||
195 | |||
196 | static struct zl10353_config yuan_mpc718_zl10353_demod = { | ||
197 | .demod_address = 0x1e >> 1, /* Datasheet suggested straps */ | ||
198 | .if2 = 45600, /* 4.560 MHz IF from the XC3028 */ | ||
199 | .parallel_ts = 1, /* Not a serial TS */ | ||
200 | .no_tuner = 1, /* XC3028 is not behind the gate */ | ||
201 | .disable_i2c_gate_ctrl = 1, /* Disable the I2C gate */ | ||
202 | }; | ||
203 | |||
77 | static int dvb_register(struct cx18_stream *stream); | 204 | static int dvb_register(struct cx18_stream *stream); |
78 | 205 | ||
79 | /* Kernel DVB framework calls this when the feed needs to start. | 206 | /* Kernel DVB framework calls this when the feed needs to start. |
@@ -113,6 +240,7 @@ static int cx18_dvb_start_feed(struct dvb_demux_feed *feed) | |||
113 | break; | 240 | break; |
114 | 241 | ||
115 | case CX18_CARD_LEADTEK_DVR3100H: | 242 | case CX18_CARD_LEADTEK_DVR3100H: |
243 | case CX18_CARD_YUAN_MPC718: | ||
116 | default: | 244 | default: |
117 | /* Assumption - Parallel transport - Signalling | 245 | /* Assumption - Parallel transport - Signalling |
118 | * undefined or default. | 246 | * undefined or default. |
@@ -326,6 +454,38 @@ static int dvb_register(struct cx18_stream *stream) | |||
326 | fe->ops.tuner_ops.set_config(fe, &ctrl); | 454 | fe->ops.tuner_ops.set_config(fe, &ctrl); |
327 | } | 455 | } |
328 | break; | 456 | break; |
457 | case CX18_CARD_YUAN_MPC718: | ||
458 | /* | ||
459 | * TODO | ||
460 | * Apparently, these cards also could instead have a | ||
461 | * DiBcom demod supported by one of the db7000 drivers | ||
462 | */ | ||
463 | dvb->fe = dvb_attach(mt352_attach, | ||
464 | &yuan_mpc718_mt352_demod, | ||
465 | &cx->i2c_adap[1]); | ||
466 | if (dvb->fe == NULL) | ||
467 | dvb->fe = dvb_attach(zl10353_attach, | ||
468 | &yuan_mpc718_zl10353_demod, | ||
469 | &cx->i2c_adap[1]); | ||
470 | if (dvb->fe != NULL) { | ||
471 | struct dvb_frontend *fe; | ||
472 | struct xc2028_config cfg = { | ||
473 | .i2c_adap = &cx->i2c_adap[1], | ||
474 | .i2c_addr = 0xc2 >> 1, | ||
475 | .ctrl = NULL, | ||
476 | }; | ||
477 | static struct xc2028_ctrl ctrl = { | ||
478 | .fname = XC2028_DEFAULT_FIRMWARE, | ||
479 | .max_len = 64, | ||
480 | .demod = XC3028_FE_ZARLINK456, | ||
481 | .type = XC2028_AUTO, | ||
482 | }; | ||
483 | |||
484 | fe = dvb_attach(xc2028_attach, dvb->fe, &cfg); | ||
485 | if (fe != NULL && fe->ops.tuner_ops.set_config != NULL) | ||
486 | fe->ops.tuner_ops.set_config(fe, &ctrl); | ||
487 | } | ||
488 | break; | ||
329 | default: | 489 | default: |
330 | /* No Digital Tv Support */ | 490 | /* No Digital Tv Support */ |
331 | break; | 491 | break; |
diff --git a/drivers/media/video/cx23885/cx23885-dvb.c b/drivers/media/video/cx23885/cx23885-dvb.c index 48a975134ac5..86ac529e62be 100644 --- a/drivers/media/video/cx23885/cx23885-dvb.c +++ b/drivers/media/video/cx23885/cx23885-dvb.c | |||
@@ -463,6 +463,30 @@ static struct xc5000_config mygica_x8506_xc5000_config = { | |||
463 | .if_khz = 5380, | 463 | .if_khz = 5380, |
464 | }; | 464 | }; |
465 | 465 | ||
466 | static int cx23885_dvb_set_frontend(struct dvb_frontend *fe, | ||
467 | struct dvb_frontend_parameters *param) | ||
468 | { | ||
469 | struct cx23885_tsport *port = fe->dvb->priv; | ||
470 | struct cx23885_dev *dev = port->dev; | ||
471 | |||
472 | switch (dev->board) { | ||
473 | case CX23885_BOARD_HAUPPAUGE_HVR1275: | ||
474 | switch (param->u.vsb.modulation) { | ||
475 | case VSB_8: | ||
476 | cx23885_gpio_clear(dev, GPIO_5); | ||
477 | break; | ||
478 | case QAM_64: | ||
479 | case QAM_256: | ||
480 | default: | ||
481 | cx23885_gpio_set(dev, GPIO_5); | ||
482 | break; | ||
483 | } | ||
484 | break; | ||
485 | } | ||
486 | return (port->set_frontend_save) ? | ||
487 | port->set_frontend_save(fe, param) : -ENODEV; | ||
488 | } | ||
489 | |||
466 | static int dvb_register(struct cx23885_tsport *port) | 490 | static int dvb_register(struct cx23885_tsport *port) |
467 | { | 491 | { |
468 | struct cx23885_dev *dev = port->dev; | 492 | struct cx23885_dev *dev = port->dev; |
@@ -502,6 +526,12 @@ static int dvb_register(struct cx23885_tsport *port) | |||
502 | 0x60, &dev->i2c_bus[1].i2c_adap, | 526 | 0x60, &dev->i2c_bus[1].i2c_adap, |
503 | &hauppauge_hvr127x_config); | 527 | &hauppauge_hvr127x_config); |
504 | } | 528 | } |
529 | |||
530 | /* FIXME: temporary hack */ | ||
531 | /* define bridge override to set_frontend */ | ||
532 | port->set_frontend_save = fe0->dvb.frontend->ops.set_frontend; | ||
533 | fe0->dvb.frontend->ops.set_frontend = cx23885_dvb_set_frontend; | ||
534 | |||
505 | break; | 535 | break; |
506 | case CX23885_BOARD_HAUPPAUGE_HVR1255: | 536 | case CX23885_BOARD_HAUPPAUGE_HVR1255: |
507 | i2c_bus = &dev->i2c_bus[0]; | 537 | i2c_bus = &dev->i2c_bus[0]; |
diff --git a/drivers/media/video/cx23885/cx23885.h b/drivers/media/video/cx23885/cx23885.h index 1a2ac518a3f1..214a55e943b7 100644 --- a/drivers/media/video/cx23885/cx23885.h +++ b/drivers/media/video/cx23885/cx23885.h | |||
@@ -288,6 +288,10 @@ struct cx23885_tsport { | |||
288 | /* Allow a single tsport to have multiple frontends */ | 288 | /* Allow a single tsport to have multiple frontends */ |
289 | u32 num_frontends; | 289 | u32 num_frontends; |
290 | void *port_priv; | 290 | void *port_priv; |
291 | |||
292 | /* FIXME: temporary hack */ | ||
293 | int (*set_frontend_save) (struct dvb_frontend *, | ||
294 | struct dvb_frontend_parameters *); | ||
291 | }; | 295 | }; |
292 | 296 | ||
293 | struct cx23885_dev { | 297 | struct cx23885_dev { |
diff --git a/drivers/media/video/em28xx/Kconfig b/drivers/media/video/em28xx/Kconfig index 16a5af30e9d1..6524b493e033 100644 --- a/drivers/media/video/em28xx/Kconfig +++ b/drivers/media/video/em28xx/Kconfig | |||
@@ -8,6 +8,8 @@ config VIDEO_EM28XX | |||
8 | select VIDEO_SAA711X if VIDEO_HELPER_CHIPS_AUTO | 8 | select VIDEO_SAA711X if VIDEO_HELPER_CHIPS_AUTO |
9 | select VIDEO_TVP5150 if VIDEO_HELPER_CHIPS_AUTO | 9 | select VIDEO_TVP5150 if VIDEO_HELPER_CHIPS_AUTO |
10 | select VIDEO_MSP3400 if VIDEO_HELPER_CHIPS_AUTO | 10 | select VIDEO_MSP3400 if VIDEO_HELPER_CHIPS_AUTO |
11 | select VIDEO_MT9V011 if VIDEO_HELPER_CHIPS_AUTO | ||
12 | |||
11 | ---help--- | 13 | ---help--- |
12 | This is a video4linux driver for Empia 28xx based TV cards. | 14 | This is a video4linux driver for Empia 28xx based TV cards. |
13 | 15 | ||
diff --git a/drivers/media/video/em28xx/em28xx-cards.c b/drivers/media/video/em28xx/em28xx-cards.c index c43fdb9bc888..ebd24a25fb85 100644 --- a/drivers/media/video/em28xx/em28xx-cards.c +++ b/drivers/media/video/em28xx/em28xx-cards.c | |||
@@ -58,6 +58,8 @@ static unsigned int card[] = {[0 ... (EM28XX_MAXBOARDS - 1)] = UNSET }; | |||
58 | module_param_array(card, int, NULL, 0444); | 58 | module_param_array(card, int, NULL, 0444); |
59 | MODULE_PARM_DESC(card, "card type"); | 59 | MODULE_PARM_DESC(card, "card type"); |
60 | 60 | ||
61 | #define MT9V011_VERSION 0x8243 | ||
62 | |||
61 | /* Bitmask marking allocated devices from 0 to EM28XX_MAXBOARDS */ | 63 | /* Bitmask marking allocated devices from 0 to EM28XX_MAXBOARDS */ |
62 | static unsigned long em28xx_devused; | 64 | static unsigned long em28xx_devused; |
63 | 65 | ||
@@ -191,6 +193,13 @@ static struct em28xx_reg_seq terratec_av350_unmute_gpio[] = { | |||
191 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | 193 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, |
192 | { -1, -1, -1, -1}, | 194 | { -1, -1, -1, -1}, |
193 | }; | 195 | }; |
196 | |||
197 | static struct em28xx_reg_seq silvercrest_reg_seq[] = { | ||
198 | {EM28XX_R08_GPIO, 0xff, 0xff, 10}, | ||
199 | {EM28XX_R08_GPIO, 0x01, 0xf7, 10}, | ||
200 | { -1, -1, -1, -1}, | ||
201 | }; | ||
202 | |||
194 | /* | 203 | /* |
195 | * Board definitions | 204 | * Board definitions |
196 | */ | 205 | */ |
@@ -438,6 +447,18 @@ struct em28xx_board em28xx_boards[] = { | |||
438 | .amux = EM28XX_AMUX_VIDEO, | 447 | .amux = EM28XX_AMUX_VIDEO, |
439 | } }, | 448 | } }, |
440 | }, | 449 | }, |
450 | [EM2820_BOARD_SILVERCREST_WEBCAM] = { | ||
451 | .name = "Silvercrest Webcam 1.3mpix", | ||
452 | .tuner_type = TUNER_ABSENT, | ||
453 | .is_27xx = 1, | ||
454 | .decoder = EM28XX_MT9V011, | ||
455 | .input = { { | ||
456 | .type = EM28XX_VMUX_COMPOSITE1, | ||
457 | .vmux = 0, | ||
458 | .amux = EM28XX_AMUX_VIDEO, | ||
459 | .gpio = silvercrest_reg_seq, | ||
460 | } }, | ||
461 | }, | ||
441 | [EM2821_BOARD_SUPERCOMP_USB_2] = { | 462 | [EM2821_BOARD_SUPERCOMP_USB_2] = { |
442 | .name = "Supercomp USB 2.0 TV", | 463 | .name = "Supercomp USB 2.0 TV", |
443 | .valid = EM28XX_BOARD_NOT_VALIDATED, | 464 | .valid = EM28XX_BOARD_NOT_VALIDATED, |
@@ -826,7 +847,7 @@ struct em28xx_board em28xx_boards[] = { | |||
826 | .tuner_gpio = default_tuner_gpio, | 847 | .tuner_gpio = default_tuner_gpio, |
827 | .decoder = EM28XX_TVP5150, | 848 | .decoder = EM28XX_TVP5150, |
828 | .has_dvb = 1, | 849 | .has_dvb = 1, |
829 | .dvb_gpio = default_analog, | 850 | .dvb_gpio = default_digital, |
830 | .input = { { | 851 | .input = { { |
831 | .type = EM28XX_VMUX_TELEVISION, | 852 | .type = EM28XX_VMUX_TELEVISION, |
832 | .vmux = TVP5150_COMPOSITE0, | 853 | .vmux = TVP5150_COMPOSITE0, |
@@ -1639,6 +1660,11 @@ static unsigned short tvp5150_addrs[] = { | |||
1639 | I2C_CLIENT_END | 1660 | I2C_CLIENT_END |
1640 | }; | 1661 | }; |
1641 | 1662 | ||
1663 | static unsigned short mt9v011_addrs[] = { | ||
1664 | 0xba >> 1, | ||
1665 | I2C_CLIENT_END | ||
1666 | }; | ||
1667 | |||
1642 | static unsigned short msp3400_addrs[] = { | 1668 | static unsigned short msp3400_addrs[] = { |
1643 | 0x80 >> 1, | 1669 | 0x80 >> 1, |
1644 | 0x88 >> 1, | 1670 | 0x88 >> 1, |
@@ -1678,6 +1704,46 @@ static inline void em28xx_set_model(struct em28xx *dev) | |||
1678 | EM28XX_I2C_FREQ_100_KHZ; | 1704 | EM28XX_I2C_FREQ_100_KHZ; |
1679 | } | 1705 | } |
1680 | 1706 | ||
1707 | /* HINT method: webcam I2C chips | ||
1708 | * | ||
1709 | * This method work for webcams with Micron sensors | ||
1710 | */ | ||
1711 | static int em28xx_hint_sensor(struct em28xx *dev) | ||
1712 | { | ||
1713 | int rc; | ||
1714 | char *sensor_name; | ||
1715 | unsigned char cmd; | ||
1716 | __be16 version_be; | ||
1717 | u16 version; | ||
1718 | |||
1719 | if (dev->model != EM2820_BOARD_UNKNOWN) | ||
1720 | return 0; | ||
1721 | |||
1722 | dev->i2c_client.addr = 0xba >> 1; | ||
1723 | cmd = 0; | ||
1724 | i2c_master_send(&dev->i2c_client, &cmd, 1); | ||
1725 | rc = i2c_master_recv(&dev->i2c_client, (char *)&version_be, 2); | ||
1726 | if (rc != 2) | ||
1727 | return -EINVAL; | ||
1728 | |||
1729 | version = be16_to_cpu(version_be); | ||
1730 | |||
1731 | switch (version) { | ||
1732 | case MT9V011_VERSION: | ||
1733 | dev->model = EM2820_BOARD_SILVERCREST_WEBCAM; | ||
1734 | sensor_name = "mt9v011"; | ||
1735 | break; | ||
1736 | default: | ||
1737 | printk("Unknown Sensor 0x%04x\n", be16_to_cpu(version)); | ||
1738 | return -EINVAL; | ||
1739 | } | ||
1740 | |||
1741 | em28xx_errdev("Sensor is %s, assuming that webcam is %s\n", | ||
1742 | sensor_name, em28xx_boards[dev->model].name); | ||
1743 | |||
1744 | return 0; | ||
1745 | } | ||
1746 | |||
1681 | /* Since em28xx_pre_card_setup() requires a proper dev->model, | 1747 | /* Since em28xx_pre_card_setup() requires a proper dev->model, |
1682 | * this won't work for boards with generic PCI IDs | 1748 | * this won't work for boards with generic PCI IDs |
1683 | */ | 1749 | */ |
@@ -1706,7 +1772,10 @@ void em28xx_pre_card_setup(struct em28xx *dev) | |||
1706 | em28xx_info("chip ID is em2750\n"); | 1772 | em28xx_info("chip ID is em2750\n"); |
1707 | break; | 1773 | break; |
1708 | case CHIP_ID_EM2820: | 1774 | case CHIP_ID_EM2820: |
1709 | em28xx_info("chip ID is em2820\n"); | 1775 | if (dev->board.is_27xx) |
1776 | em28xx_info("chip is em2710\n"); | ||
1777 | else | ||
1778 | em28xx_info("chip ID is em2820\n"); | ||
1710 | break; | 1779 | break; |
1711 | case CHIP_ID_EM2840: | 1780 | case CHIP_ID_EM2840: |
1712 | em28xx_info("chip ID is em2840\n"); | 1781 | em28xx_info("chip ID is em2840\n"); |
@@ -2158,6 +2227,10 @@ void em28xx_card_setup(struct em28xx *dev) | |||
2158 | before probing the i2c bus. */ | 2227 | before probing the i2c bus. */ |
2159 | em28xx_set_mode(dev, EM28XX_ANALOG_MODE); | 2228 | em28xx_set_mode(dev, EM28XX_ANALOG_MODE); |
2160 | break; | 2229 | break; |
2230 | case EM2820_BOARD_SILVERCREST_WEBCAM: | ||
2231 | /* FIXME: need to document the registers bellow */ | ||
2232 | em28xx_write_reg(dev, 0x0d, 0x42); | ||
2233 | em28xx_write_reg(dev, 0x13, 0x08); | ||
2161 | } | 2234 | } |
2162 | 2235 | ||
2163 | if (dev->board.has_snapshot_button) | 2236 | if (dev->board.has_snapshot_button) |
@@ -2189,6 +2262,10 @@ void em28xx_card_setup(struct em28xx *dev) | |||
2189 | v4l2_i2c_new_probed_subdev(&dev->v4l2_dev, &dev->i2c_adap, | 2262 | v4l2_i2c_new_probed_subdev(&dev->v4l2_dev, &dev->i2c_adap, |
2190 | "tvp5150", "tvp5150", tvp5150_addrs); | 2263 | "tvp5150", "tvp5150", tvp5150_addrs); |
2191 | 2264 | ||
2265 | if (dev->board.decoder == EM28XX_MT9V011) | ||
2266 | v4l2_i2c_new_probed_subdev(&dev->v4l2_dev, &dev->i2c_adap, | ||
2267 | "mt9v011", "mt9v011", mt9v011_addrs); | ||
2268 | |||
2192 | if (dev->board.adecoder == EM28XX_TVAUDIO) | 2269 | if (dev->board.adecoder == EM28XX_TVAUDIO) |
2193 | v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap, | 2270 | v4l2_i2c_new_subdev(&dev->v4l2_dev, &dev->i2c_adap, |
2194 | "tvaudio", "tvaudio", dev->board.tvaudio_addr); | 2271 | "tvaudio", "tvaudio", dev->board.tvaudio_addr); |
@@ -2333,6 +2410,8 @@ static int em28xx_init_dev(struct em28xx **devhandle, struct usb_device *udev, | |||
2333 | return errCode; | 2410 | return errCode; |
2334 | } | 2411 | } |
2335 | 2412 | ||
2413 | em28xx_hint_sensor(dev); | ||
2414 | |||
2336 | /* Do board specific init and eeprom reading */ | 2415 | /* Do board specific init and eeprom reading */ |
2337 | em28xx_card_setup(dev); | 2416 | em28xx_card_setup(dev); |
2338 | 2417 | ||
@@ -2573,6 +2652,7 @@ static int em28xx_usb_probe(struct usb_interface *interface, | |||
2573 | retval = em28xx_init_dev(&dev, udev, interface, nr); | 2652 | retval = em28xx_init_dev(&dev, udev, interface, nr); |
2574 | if (retval) { | 2653 | if (retval) { |
2575 | em28xx_devused &= ~(1<<dev->devno); | 2654 | em28xx_devused &= ~(1<<dev->devno); |
2655 | mutex_unlock(&dev->lock); | ||
2576 | kfree(dev); | 2656 | kfree(dev); |
2577 | goto err; | 2657 | goto err; |
2578 | } | 2658 | } |
diff --git a/drivers/media/video/em28xx/em28xx-core.c b/drivers/media/video/em28xx/em28xx-core.c index c8d7ce8fbd36..079ab4d563a6 100644 --- a/drivers/media/video/em28xx/em28xx-core.c +++ b/drivers/media/video/em28xx/em28xx-core.c | |||
@@ -648,17 +648,28 @@ int em28xx_capture_start(struct em28xx *dev, int start) | |||
648 | int em28xx_set_outfmt(struct em28xx *dev) | 648 | int em28xx_set_outfmt(struct em28xx *dev) |
649 | { | 649 | { |
650 | int ret; | 650 | int ret; |
651 | int vinmode, vinctl, outfmt; | ||
652 | |||
653 | outfmt = dev->format->reg; | ||
654 | |||
655 | if (dev->board.is_27xx) { | ||
656 | vinmode = 0x0d; | ||
657 | vinctl = 0x00; | ||
658 | } else { | ||
659 | vinmode = 0x10; | ||
660 | vinctl = 0x11; | ||
661 | } | ||
651 | 662 | ||
652 | ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT, | 663 | ret = em28xx_write_reg_bits(dev, EM28XX_R27_OUTFMT, |
653 | dev->format->reg | 0x20, 0x3f); | 664 | outfmt | 0x20, 0xff); |
654 | if (ret < 0) | 665 | if (ret < 0) |
655 | return ret; | 666 | return ret; |
656 | 667 | ||
657 | ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, 0x10); | 668 | ret = em28xx_write_reg(dev, EM28XX_R10_VINMODE, vinmode); |
658 | if (ret < 0) | 669 | if (ret < 0) |
659 | return ret; | 670 | return ret; |
660 | 671 | ||
661 | return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, 0x11); | 672 | return em28xx_write_reg(dev, EM28XX_R11_VINCTRL, vinctl); |
662 | } | 673 | } |
663 | 674 | ||
664 | static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax, | 675 | static int em28xx_accumulator_set(struct em28xx *dev, u8 xmin, u8 xmax, |
@@ -695,13 +706,19 @@ static int em28xx_scaler_set(struct em28xx *dev, u16 h, u16 v) | |||
695 | { | 706 | { |
696 | u8 mode; | 707 | u8 mode; |
697 | /* the em2800 scaler only supports scaling down to 50% */ | 708 | /* the em2800 scaler only supports scaling down to 50% */ |
698 | if (dev->board.is_em2800) | 709 | |
710 | if (dev->board.is_27xx) { | ||
711 | /* FIXME: Don't use the scaler yet */ | ||
712 | mode = 0; | ||
713 | } else if (dev->board.is_em2800) { | ||
699 | mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00); | 714 | mode = (v ? 0x20 : 0x00) | (h ? 0x10 : 0x00); |
700 | else { | 715 | } else { |
701 | u8 buf[2]; | 716 | u8 buf[2]; |
717 | |||
702 | buf[0] = h; | 718 | buf[0] = h; |
703 | buf[1] = h >> 8; | 719 | buf[1] = h >> 8; |
704 | em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2); | 720 | em28xx_write_regs(dev, EM28XX_R30_HSCALELOW, (char *)buf, 2); |
721 | |||
705 | buf[0] = v; | 722 | buf[0] = v; |
706 | buf[1] = v >> 8; | 723 | buf[1] = v >> 8; |
707 | em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2); | 724 | em28xx_write_regs(dev, EM28XX_R32_VSCALELOW, (char *)buf, 2); |
@@ -720,8 +737,11 @@ int em28xx_resolution_set(struct em28xx *dev) | |||
720 | height = norm_maxh(dev) >> 1; | 737 | height = norm_maxh(dev) >> 1; |
721 | 738 | ||
722 | em28xx_set_outfmt(dev); | 739 | em28xx_set_outfmt(dev); |
740 | |||
741 | |||
723 | em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2); | 742 | em28xx_accumulator_set(dev, 1, (width - 4) >> 2, 1, (height - 4) >> 2); |
724 | em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2); | 743 | em28xx_capture_area_set(dev, 0, 0, width >> 2, height >> 2); |
744 | |||
725 | return em28xx_scaler_set(dev, dev->hscale, dev->vscale); | 745 | return em28xx_scaler_set(dev, dev->hscale, dev->vscale); |
726 | } | 746 | } |
727 | 747 | ||
diff --git a/drivers/media/video/em28xx/em28xx-dvb.c b/drivers/media/video/em28xx/em28xx-dvb.c index e7b47c8da8f3..3da97c32b8fa 100644 --- a/drivers/media/video/em28xx/em28xx-dvb.c +++ b/drivers/media/video/em28xx/em28xx-dvb.c | |||
@@ -243,6 +243,14 @@ static struct s5h1409_config em28xx_s5h1409_with_xc3028 = { | |||
243 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK | 243 | .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK |
244 | }; | 244 | }; |
245 | 245 | ||
246 | static struct zl10353_config em28xx_terratec_xs_zl10353_xc3028 = { | ||
247 | .demod_address = (0x1e >> 1), | ||
248 | .no_tuner = 1, | ||
249 | .disable_i2c_gate_ctrl = 1, | ||
250 | .parallel_ts = 1, | ||
251 | .if2 = 45600, | ||
252 | }; | ||
253 | |||
246 | #ifdef EM28XX_DRX397XD_SUPPORT | 254 | #ifdef EM28XX_DRX397XD_SUPPORT |
247 | /* [TODO] djh - not sure yet what the device config needs to contain */ | 255 | /* [TODO] djh - not sure yet what the device config needs to contain */ |
248 | static struct drx397xD_config em28xx_drx397xD_with_xc3028 = { | 256 | static struct drx397xD_config em28xx_drx397xD_with_xc3028 = { |
@@ -433,7 +441,6 @@ static int dvb_init(struct em28xx *dev) | |||
433 | } | 441 | } |
434 | break; | 442 | break; |
435 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900: | 443 | case EM2880_BOARD_HAUPPAUGE_WINTV_HVR_900: |
436 | case EM2880_BOARD_TERRATEC_HYBRID_XS: | ||
437 | case EM2880_BOARD_KWORLD_DVB_310U: | 444 | case EM2880_BOARD_KWORLD_DVB_310U: |
438 | case EM2880_BOARD_EMPIRE_DUAL_TV: | 445 | case EM2880_BOARD_EMPIRE_DUAL_TV: |
439 | dvb->frontend = dvb_attach(zl10353_attach, | 446 | dvb->frontend = dvb_attach(zl10353_attach, |
@@ -444,6 +451,25 @@ static int dvb_init(struct em28xx *dev) | |||
444 | goto out_free; | 451 | goto out_free; |
445 | } | 452 | } |
446 | break; | 453 | break; |
454 | case EM2880_BOARD_TERRATEC_HYBRID_XS: | ||
455 | dvb->frontend = dvb_attach(zl10353_attach, | ||
456 | &em28xx_terratec_xs_zl10353_xc3028, | ||
457 | &dev->i2c_adap); | ||
458 | if (dvb->frontend == NULL) { | ||
459 | /* This board could have either a zl10353 or a mt352. | ||
460 | If the chip id isn't for zl10353, try mt352 */ | ||
461 | |||
462 | /* FIXME: make support for mt352 work */ | ||
463 | printk(KERN_ERR "version of this board with mt352 not " | ||
464 | "currently supported\n"); | ||
465 | result = -EINVAL; | ||
466 | goto out_free; | ||
467 | } | ||
468 | if (attach_xc3028(0x61, dev) < 0) { | ||
469 | result = -EINVAL; | ||
470 | goto out_free; | ||
471 | } | ||
472 | break; | ||
447 | case EM2883_BOARD_KWORLD_HYBRID_330U: | 473 | case EM2883_BOARD_KWORLD_HYBRID_330U: |
448 | case EM2882_BOARD_EVGA_INDTUBE: | 474 | case EM2882_BOARD_EVGA_INDTUBE: |
449 | dvb->frontend = dvb_attach(s5h1409_attach, | 475 | dvb->frontend = dvb_attach(s5h1409_attach, |
diff --git a/drivers/media/video/em28xx/em28xx-i2c.c b/drivers/media/video/em28xx/em28xx-i2c.c index 2c86fcf089f5..27e33a287dfc 100644 --- a/drivers/media/video/em28xx/em28xx-i2c.c +++ b/drivers/media/video/em28xx/em28xx-i2c.c | |||
@@ -483,7 +483,7 @@ static char *i2c_devs[128] = { | |||
483 | [0xa0 >> 1] = "eeprom", | 483 | [0xa0 >> 1] = "eeprom", |
484 | [0xb0 >> 1] = "tda9874", | 484 | [0xb0 >> 1] = "tda9874", |
485 | [0xb8 >> 1] = "tvp5150a", | 485 | [0xb8 >> 1] = "tvp5150a", |
486 | [0xba >> 1] = "tvp5150a", | 486 | [0xba >> 1] = "webcam sensor or tvp5150a", |
487 | [0xc0 >> 1] = "tuner (analog)", | 487 | [0xc0 >> 1] = "tuner (analog)", |
488 | [0xc2 >> 1] = "tuner (analog)", | 488 | [0xc2 >> 1] = "tuner (analog)", |
489 | [0xc4 >> 1] = "tuner (analog)", | 489 | [0xc4 >> 1] = "tuner (analog)", |
diff --git a/drivers/media/video/em28xx/em28xx-video.c b/drivers/media/video/em28xx/em28xx-video.c index 8fe1beecfffa..14316c912179 100644 --- a/drivers/media/video/em28xx/em28xx-video.c +++ b/drivers/media/video/em28xx/em28xx-video.c | |||
@@ -90,10 +90,35 @@ MODULE_PARM_DESC(video_debug, "enable debug messages [video]"); | |||
90 | /* supported video standards */ | 90 | /* supported video standards */ |
91 | static struct em28xx_fmt format[] = { | 91 | static struct em28xx_fmt format[] = { |
92 | { | 92 | { |
93 | .name = "16bpp YUY2, 4:2:2, packed", | 93 | .name = "16 bpp YUY2, 4:2:2, packed", |
94 | .fourcc = V4L2_PIX_FMT_YUYV, | 94 | .fourcc = V4L2_PIX_FMT_YUYV, |
95 | .depth = 16, | 95 | .depth = 16, |
96 | .reg = EM28XX_OUTFMT_YUV422_Y0UY1V, | 96 | .reg = EM28XX_OUTFMT_YUV422_Y0UY1V, |
97 | }, { | ||
98 | .name = "16 bpp RGB 565, LE", | ||
99 | .fourcc = V4L2_PIX_FMT_RGB565, | ||
100 | .depth = 16, | ||
101 | .reg = EM28XX_OUTFMT_RGB_16_656, | ||
102 | }, { | ||
103 | .name = "8 bpp Bayer BGBG..GRGR", | ||
104 | .fourcc = V4L2_PIX_FMT_SBGGR8, | ||
105 | .depth = 8, | ||
106 | .reg = EM28XX_OUTFMT_RGB_8_BGBG, | ||
107 | }, { | ||
108 | .name = "8 bpp Bayer GRGR..BGBG", | ||
109 | .fourcc = V4L2_PIX_FMT_SGRBG8, | ||
110 | .depth = 8, | ||
111 | .reg = EM28XX_OUTFMT_RGB_8_GRGR, | ||
112 | }, { | ||
113 | .name = "8 bpp Bayer GBGB..RGRG", | ||
114 | .fourcc = V4L2_PIX_FMT_SGBRG8, | ||
115 | .depth = 8, | ||
116 | .reg = EM28XX_OUTFMT_RGB_8_GBGB, | ||
117 | }, { | ||
118 | .name = "12 bpp YUV411", | ||
119 | .fourcc = V4L2_PIX_FMT_YUV411P, | ||
120 | .depth = 12, | ||
121 | .reg = EM28XX_OUTFMT_YUV411, | ||
97 | }, | 122 | }, |
98 | }; | 123 | }; |
99 | 124 | ||
@@ -701,7 +726,11 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, | |||
701 | return -EINVAL; | 726 | return -EINVAL; |
702 | } | 727 | } |
703 | 728 | ||
704 | if (dev->board.is_em2800) { | 729 | if (dev->board.is_27xx) { |
730 | /* FIXME: This is the only supported fmt */ | ||
731 | width = 640; | ||
732 | height = 480; | ||
733 | } else if (dev->board.is_em2800) { | ||
705 | /* the em2800 can only scale down to 50% */ | 734 | /* the em2800 can only scale down to 50% */ |
706 | height = height > (3 * maxh / 4) ? maxh : maxh / 2; | 735 | height = height > (3 * maxh / 4) ? maxh : maxh / 2; |
707 | width = width > (3 * maxw / 4) ? maxw : maxw / 2; | 736 | width = width > (3 * maxw / 4) ? maxw : maxw / 2; |
@@ -733,13 +762,40 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, | |||
733 | return 0; | 762 | return 0; |
734 | } | 763 | } |
735 | 764 | ||
765 | static int em28xx_set_video_format(struct em28xx *dev, unsigned int fourcc, | ||
766 | unsigned width, unsigned height) | ||
767 | { | ||
768 | struct em28xx_fmt *fmt; | ||
769 | |||
770 | /* FIXME: This is the only supported fmt */ | ||
771 | if (dev->board.is_27xx) { | ||
772 | width = 640; | ||
773 | height = 480; | ||
774 | } | ||
775 | |||
776 | fmt = format_by_fourcc(fourcc); | ||
777 | if (!fmt) | ||
778 | return -EINVAL; | ||
779 | |||
780 | dev->format = fmt; | ||
781 | dev->width = width; | ||
782 | dev->height = height; | ||
783 | |||
784 | /* set new image size */ | ||
785 | get_scale(dev, dev->width, dev->height, &dev->hscale, &dev->vscale); | ||
786 | |||
787 | em28xx_set_alternate(dev); | ||
788 | em28xx_resolution_set(dev); | ||
789 | |||
790 | return 0; | ||
791 | } | ||
792 | |||
736 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, | 793 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, |
737 | struct v4l2_format *f) | 794 | struct v4l2_format *f) |
738 | { | 795 | { |
739 | struct em28xx_fh *fh = priv; | 796 | struct em28xx_fh *fh = priv; |
740 | struct em28xx *dev = fh->dev; | 797 | struct em28xx *dev = fh->dev; |
741 | int rc; | 798 | int rc; |
742 | struct em28xx_fmt *fmt; | ||
743 | 799 | ||
744 | rc = check_dev(dev); | 800 | rc = check_dev(dev); |
745 | if (rc < 0) | 801 | if (rc < 0) |
@@ -749,12 +805,6 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, | |||
749 | 805 | ||
750 | vidioc_try_fmt_vid_cap(file, priv, f); | 806 | vidioc_try_fmt_vid_cap(file, priv, f); |
751 | 807 | ||
752 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); | ||
753 | if (!fmt) { | ||
754 | rc = -EINVAL; | ||
755 | goto out; | ||
756 | } | ||
757 | |||
758 | if (videobuf_queue_is_busy(&fh->vb_vidq)) { | 808 | if (videobuf_queue_is_busy(&fh->vb_vidq)) { |
759 | em28xx_errdev("%s queue busy\n", __func__); | 809 | em28xx_errdev("%s queue busy\n", __func__); |
760 | rc = -EBUSY; | 810 | rc = -EBUSY; |
@@ -767,16 +817,8 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, | |||
767 | goto out; | 817 | goto out; |
768 | } | 818 | } |
769 | 819 | ||
770 | /* set new image size */ | 820 | rc = em28xx_set_video_format(dev, f->fmt.pix.pixelformat, |
771 | dev->width = f->fmt.pix.width; | 821 | f->fmt.pix.width, f->fmt.pix.height); |
772 | dev->height = f->fmt.pix.height; | ||
773 | dev->format = fmt; | ||
774 | get_scale(dev, dev->width, dev->height, &dev->hscale, &dev->vscale); | ||
775 | |||
776 | em28xx_set_alternate(dev); | ||
777 | em28xx_resolution_set(dev); | ||
778 | |||
779 | rc = 0; | ||
780 | 822 | ||
781 | out: | 823 | out: |
782 | mutex_unlock(&dev->lock); | 824 | mutex_unlock(&dev->lock); |
@@ -1616,11 +1658,6 @@ static int em28xx_v4l2_open(struct file *filp) | |||
1616 | filp->private_data = fh; | 1658 | filp->private_data = fh; |
1617 | 1659 | ||
1618 | if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && dev->users == 0) { | 1660 | if (fh->type == V4L2_BUF_TYPE_VIDEO_CAPTURE && dev->users == 0) { |
1619 | dev->width = norm_maxw(dev); | ||
1620 | dev->height = norm_maxh(dev); | ||
1621 | dev->hscale = 0; | ||
1622 | dev->vscale = 0; | ||
1623 | |||
1624 | em28xx_set_mode(dev, EM28XX_ANALOG_MODE); | 1661 | em28xx_set_mode(dev, EM28XX_ANALOG_MODE); |
1625 | em28xx_set_alternate(dev); | 1662 | em28xx_set_alternate(dev); |
1626 | em28xx_resolution_set(dev); | 1663 | em28xx_resolution_set(dev); |
@@ -1962,15 +1999,14 @@ int em28xx_register_analog_devices(struct em28xx *dev) | |||
1962 | 1999 | ||
1963 | /* set default norm */ | 2000 | /* set default norm */ |
1964 | dev->norm = em28xx_video_template.current_norm; | 2001 | dev->norm = em28xx_video_template.current_norm; |
1965 | dev->width = norm_maxw(dev); | ||
1966 | dev->height = norm_maxh(dev); | ||
1967 | dev->interlaced = EM28XX_INTERLACED_DEFAULT; | 2002 | dev->interlaced = EM28XX_INTERLACED_DEFAULT; |
1968 | dev->hscale = 0; | ||
1969 | dev->vscale = 0; | ||
1970 | dev->ctl_input = 0; | 2003 | dev->ctl_input = 0; |
1971 | 2004 | ||
1972 | /* Analog specific initialization */ | 2005 | /* Analog specific initialization */ |
1973 | dev->format = &format[0]; | 2006 | dev->format = &format[0]; |
2007 | em28xx_set_video_format(dev, format[0].fourcc, | ||
2008 | norm_maxw(dev), norm_maxh(dev)); | ||
2009 | |||
1974 | video_mux(dev, dev->ctl_input); | 2010 | video_mux(dev, dev->ctl_input); |
1975 | 2011 | ||
1976 | /* Audio defaults */ | 2012 | /* Audio defaults */ |
diff --git a/drivers/media/video/em28xx/em28xx.h b/drivers/media/video/em28xx/em28xx.h index 813ce45c2f99..d90fef463764 100644 --- a/drivers/media/video/em28xx/em28xx.h +++ b/drivers/media/video/em28xx/em28xx.h | |||
@@ -107,6 +107,7 @@ | |||
107 | #define EM2860_BOARD_TERRATEC_AV350 68 | 107 | #define EM2860_BOARD_TERRATEC_AV350 68 |
108 | #define EM2882_BOARD_KWORLD_ATSC_315U 69 | 108 | #define EM2882_BOARD_KWORLD_ATSC_315U 69 |
109 | #define EM2882_BOARD_EVGA_INDTUBE 70 | 109 | #define EM2882_BOARD_EVGA_INDTUBE 70 |
110 | #define EM2820_BOARD_SILVERCREST_WEBCAM 71 | ||
110 | 111 | ||
111 | /* Limits minimum and default number of buffers */ | 112 | /* Limits minimum and default number of buffers */ |
112 | #define EM28XX_MIN_BUF 4 | 113 | #define EM28XX_MIN_BUF 4 |
@@ -360,6 +361,7 @@ enum em28xx_decoder { | |||
360 | EM28XX_NODECODER, | 361 | EM28XX_NODECODER, |
361 | EM28XX_TVP5150, | 362 | EM28XX_TVP5150, |
362 | EM28XX_SAA711X, | 363 | EM28XX_SAA711X, |
364 | EM28XX_MT9V011, | ||
363 | }; | 365 | }; |
364 | 366 | ||
365 | enum em28xx_adecoder { | 367 | enum em28xx_adecoder { |
@@ -388,6 +390,7 @@ struct em28xx_board { | |||
388 | unsigned int max_range_640_480:1; | 390 | unsigned int max_range_640_480:1; |
389 | unsigned int has_dvb:1; | 391 | unsigned int has_dvb:1; |
390 | unsigned int has_snapshot_button:1; | 392 | unsigned int has_snapshot_button:1; |
393 | unsigned int is_27xx:1; | ||
391 | unsigned int valid:1; | 394 | unsigned int valid:1; |
392 | 395 | ||
393 | unsigned char xclk, i2c_speed; | 396 | unsigned char xclk, i2c_speed; |
diff --git a/drivers/media/video/gspca/stv06xx/stv06xx.h b/drivers/media/video/gspca/stv06xx/stv06xx.h index 9df7137fe67e..992ce530f138 100644 --- a/drivers/media/video/gspca/stv06xx/stv06xx.h +++ b/drivers/media/video/gspca/stv06xx/stv06xx.h | |||
@@ -36,10 +36,6 @@ | |||
36 | 36 | ||
37 | #define STV_ISOC_ENDPOINT_ADDR 0x81 | 37 | #define STV_ISOC_ENDPOINT_ADDR 0x81 |
38 | 38 | ||
39 | #ifndef V4L2_PIX_FMT_SGRBG8 | ||
40 | #define V4L2_PIX_FMT_SGRBG8 v4l2_fourcc('G', 'R', 'B', 'G') | ||
41 | #endif | ||
42 | |||
43 | #define STV_REG23 0x0423 | 39 | #define STV_REG23 0x0423 |
44 | 40 | ||
45 | /* Control registers of the STV0600 ASIC */ | 41 | /* Control registers of the STV0600 ASIC */ |
diff --git a/drivers/media/video/mt9v011.c b/drivers/media/video/mt9v011.c new file mode 100644 index 000000000000..1fe8fc9183a7 --- /dev/null +++ b/drivers/media/video/mt9v011.c | |||
@@ -0,0 +1,431 @@ | |||
1 | /* | ||
2 | * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor | ||
3 | * | ||
4 | * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com) | ||
5 | * This code is placed under the terms of the GNU General Public License v2 | ||
6 | */ | ||
7 | |||
8 | #include <linux/i2c.h> | ||
9 | #include <linux/videodev2.h> | ||
10 | #include <linux/delay.h> | ||
11 | #include <media/v4l2-device.h> | ||
12 | #include "mt9v011.h" | ||
13 | #include <media/v4l2-i2c-drv.h> | ||
14 | #include <media/v4l2-chip-ident.h> | ||
15 | |||
16 | MODULE_DESCRIPTION("Micron mt9v011 sensor driver"); | ||
17 | MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>"); | ||
18 | MODULE_LICENSE("GPL"); | ||
19 | |||
20 | |||
21 | static int debug; | ||
22 | module_param(debug, int, 0); | ||
23 | MODULE_PARM_DESC(debug, "Debug level (0-2)"); | ||
24 | |||
25 | /* supported controls */ | ||
26 | static struct v4l2_queryctrl mt9v011_qctrl[] = { | ||
27 | { | ||
28 | .id = V4L2_CID_GAIN, | ||
29 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
30 | .name = "Gain", | ||
31 | .minimum = 0, | ||
32 | .maximum = (1 << 10) - 1, | ||
33 | .step = 1, | ||
34 | .default_value = 0x0020, | ||
35 | .flags = 0, | ||
36 | }, { | ||
37 | .id = V4L2_CID_RED_BALANCE, | ||
38 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
39 | .name = "Red Balance", | ||
40 | .minimum = -1 << 9, | ||
41 | .maximum = (1 << 9) - 1, | ||
42 | .step = 1, | ||
43 | .default_value = 0, | ||
44 | .flags = 0, | ||
45 | }, { | ||
46 | .id = V4L2_CID_BLUE_BALANCE, | ||
47 | .type = V4L2_CTRL_TYPE_INTEGER, | ||
48 | .name = "Blue Balance", | ||
49 | .minimum = -1 << 9, | ||
50 | .maximum = (1 << 9) - 1, | ||
51 | .step = 1, | ||
52 | .default_value = 0, | ||
53 | .flags = 0, | ||
54 | }, | ||
55 | }; | ||
56 | |||
57 | struct mt9v011 { | ||
58 | struct v4l2_subdev sd; | ||
59 | unsigned width, height; | ||
60 | |||
61 | u16 global_gain, red_bal, blue_bal; | ||
62 | }; | ||
63 | |||
64 | static inline struct mt9v011 *to_mt9v011(struct v4l2_subdev *sd) | ||
65 | { | ||
66 | return container_of(sd, struct mt9v011, sd); | ||
67 | } | ||
68 | |||
69 | static int mt9v011_read(struct v4l2_subdev *sd, unsigned char addr) | ||
70 | { | ||
71 | struct i2c_client *c = v4l2_get_subdevdata(sd); | ||
72 | __be16 buffer; | ||
73 | int rc, val; | ||
74 | |||
75 | rc = i2c_master_send(c, &addr, 1); | ||
76 | if (rc != 1) | ||
77 | v4l2_dbg(0, debug, sd, | ||
78 | "i2c i/o error: rc == %d (should be 1)\n", rc); | ||
79 | |||
80 | msleep(10); | ||
81 | |||
82 | rc = i2c_master_recv(c, (char *)&buffer, 2); | ||
83 | if (rc != 2) | ||
84 | v4l2_dbg(0, debug, sd, | ||
85 | "i2c i/o error: rc == %d (should be 2)\n", rc); | ||
86 | |||
87 | val = be16_to_cpu(buffer); | ||
88 | |||
89 | v4l2_dbg(2, debug, sd, "mt9v011: read 0x%02x = 0x%04x\n", addr, val); | ||
90 | |||
91 | return val; | ||
92 | } | ||
93 | |||
94 | static void mt9v011_write(struct v4l2_subdev *sd, unsigned char addr, | ||
95 | u16 value) | ||
96 | { | ||
97 | struct i2c_client *c = v4l2_get_subdevdata(sd); | ||
98 | unsigned char buffer[3]; | ||
99 | int rc; | ||
100 | |||
101 | buffer[0] = addr; | ||
102 | buffer[1] = value >> 8; | ||
103 | buffer[2] = value & 0xff; | ||
104 | |||
105 | v4l2_dbg(2, debug, sd, | ||
106 | "mt9v011: writing 0x%02x 0x%04x\n", buffer[0], value); | ||
107 | rc = i2c_master_send(c, buffer, 3); | ||
108 | if (rc != 3) | ||
109 | v4l2_dbg(0, debug, sd, | ||
110 | "i2c i/o error: rc == %d (should be 3)\n", rc); | ||
111 | } | ||
112 | |||
113 | |||
114 | struct i2c_reg_value { | ||
115 | unsigned char reg; | ||
116 | u16 value; | ||
117 | }; | ||
118 | |||
119 | /* | ||
120 | * Values used at the original driver | ||
121 | * Some values are marked as Reserved at the datasheet | ||
122 | */ | ||
123 | static const struct i2c_reg_value mt9v011_init_default[] = { | ||
124 | { R0D_MT9V011_RESET, 0x0001 }, | ||
125 | { R0D_MT9V011_RESET, 0x0000 }, | ||
126 | |||
127 | { R0C_MT9V011_SHUTTER_DELAY, 0x0000 }, | ||
128 | { R09_MT9V011_SHUTTER_WIDTH, 0x1fc }, | ||
129 | |||
130 | { R0A_MT9V011_CLK_SPEED, 0x0000 }, | ||
131 | { R1E_MT9V011_DIGITAL_ZOOM, 0x0000 }, | ||
132 | { R20_MT9V011_READ_MODE, 0x1000 }, | ||
133 | |||
134 | { R07_MT9V011_OUT_CTRL, 0x000a }, /* chip enable */ | ||
135 | }; | ||
136 | |||
137 | static void set_balance(struct v4l2_subdev *sd) | ||
138 | { | ||
139 | struct mt9v011 *core = to_mt9v011(sd); | ||
140 | u16 green1_gain, green2_gain, blue_gain, red_gain; | ||
141 | |||
142 | green1_gain = core->global_gain; | ||
143 | green2_gain = core->global_gain; | ||
144 | |||
145 | blue_gain = core->global_gain + | ||
146 | core->global_gain * core->blue_bal / (1 << 9); | ||
147 | |||
148 | red_gain = core->global_gain + | ||
149 | core->global_gain * core->blue_bal / (1 << 9); | ||
150 | |||
151 | mt9v011_write(sd, R2B_MT9V011_GREEN_1_GAIN, green1_gain); | ||
152 | mt9v011_write(sd, R2E_MT9V011_GREEN_2_GAIN, green1_gain); | ||
153 | mt9v011_write(sd, R2C_MT9V011_BLUE_GAIN, blue_gain); | ||
154 | mt9v011_write(sd, R2D_MT9V011_RED_GAIN, red_gain); | ||
155 | } | ||
156 | |||
157 | static void set_res(struct v4l2_subdev *sd) | ||
158 | { | ||
159 | struct mt9v011 *core = to_mt9v011(sd); | ||
160 | unsigned vstart, hstart; | ||
161 | |||
162 | /* | ||
163 | * The mt9v011 doesn't have scaling. So, in order to select the desired | ||
164 | * resolution, we're cropping at the middle of the sensor. | ||
165 | * hblank and vblank should be adjusted, in order to warrant that | ||
166 | * we'll preserve the line timings for 30 fps, no matter what resolution | ||
167 | * is selected. | ||
168 | * NOTE: datasheet says that width (and height) should be filled with | ||
169 | * width-1. However, this doesn't work, since one pixel per line will | ||
170 | * be missing. | ||
171 | */ | ||
172 | |||
173 | hstart = 14 + (640 - core->width) / 2; | ||
174 | mt9v011_write(sd, R02_MT9V011_COLSTART, hstart); | ||
175 | mt9v011_write(sd, R04_MT9V011_WIDTH, core->width); | ||
176 | mt9v011_write(sd, R05_MT9V011_HBLANK, 771 - core->width); | ||
177 | |||
178 | vstart = 8 + (640 - core->height) / 2; | ||
179 | mt9v011_write(sd, R01_MT9V011_ROWSTART, vstart); | ||
180 | mt9v011_write(sd, R03_MT9V011_HEIGHT, core->height); | ||
181 | mt9v011_write(sd, R06_MT9V011_VBLANK, 508 - core->height); | ||
182 | }; | ||
183 | |||
184 | static int mt9v011_reset(struct v4l2_subdev *sd, u32 val) | ||
185 | { | ||
186 | int i; | ||
187 | |||
188 | for (i = 0; i < ARRAY_SIZE(mt9v011_init_default); i++) | ||
189 | mt9v011_write(sd, mt9v011_init_default[i].reg, | ||
190 | mt9v011_init_default[i].value); | ||
191 | |||
192 | set_balance(sd); | ||
193 | set_res(sd); | ||
194 | |||
195 | return 0; | ||
196 | }; | ||
197 | |||
198 | static int mt9v011_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | ||
199 | { | ||
200 | struct mt9v011 *core = to_mt9v011(sd); | ||
201 | |||
202 | v4l2_dbg(1, debug, sd, "g_ctrl called\n"); | ||
203 | |||
204 | switch (ctrl->id) { | ||
205 | case V4L2_CID_GAIN: | ||
206 | ctrl->value = core->global_gain; | ||
207 | return 0; | ||
208 | case V4L2_CID_RED_BALANCE: | ||
209 | ctrl->value = core->red_bal; | ||
210 | return 0; | ||
211 | case V4L2_CID_BLUE_BALANCE: | ||
212 | ctrl->value = core->blue_bal; | ||
213 | return 0; | ||
214 | } | ||
215 | return -EINVAL; | ||
216 | } | ||
217 | |||
218 | static int mt9v011_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl) | ||
219 | { | ||
220 | struct mt9v011 *core = to_mt9v011(sd); | ||
221 | u8 i, n; | ||
222 | n = ARRAY_SIZE(mt9v011_qctrl); | ||
223 | |||
224 | for (i = 0; i < n; i++) { | ||
225 | if (ctrl->id != mt9v011_qctrl[i].id) | ||
226 | continue; | ||
227 | if (ctrl->value < mt9v011_qctrl[i].minimum || | ||
228 | ctrl->value > mt9v011_qctrl[i].maximum) | ||
229 | return -ERANGE; | ||
230 | v4l2_dbg(1, debug, sd, "s_ctrl: id=%d, value=%d\n", | ||
231 | ctrl->id, ctrl->value); | ||
232 | break; | ||
233 | } | ||
234 | |||
235 | switch (ctrl->id) { | ||
236 | case V4L2_CID_GAIN: | ||
237 | core->global_gain = ctrl->value; | ||
238 | break; | ||
239 | case V4L2_CID_RED_BALANCE: | ||
240 | core->red_bal = ctrl->value; | ||
241 | break; | ||
242 | case V4L2_CID_BLUE_BALANCE: | ||
243 | core->blue_bal = ctrl->value; | ||
244 | break; | ||
245 | default: | ||
246 | return -EINVAL; | ||
247 | } | ||
248 | |||
249 | set_balance(sd); | ||
250 | |||
251 | return 0; | ||
252 | } | ||
253 | |||
254 | static int mt9v011_enum_fmt(struct v4l2_subdev *sd, struct v4l2_fmtdesc *fmt) | ||
255 | { | ||
256 | if (fmt->index > 0) | ||
257 | return -EINVAL; | ||
258 | |||
259 | fmt->flags = 0; | ||
260 | strcpy(fmt->description, "8 bpp Bayer GRGR..BGBG"); | ||
261 | fmt->pixelformat = V4L2_PIX_FMT_SGRBG8; | ||
262 | |||
263 | return 0; | ||
264 | } | ||
265 | |||
266 | static int mt9v011_try_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) | ||
267 | { | ||
268 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | ||
269 | |||
270 | if (pix->pixelformat != V4L2_PIX_FMT_SGRBG8) | ||
271 | return -EINVAL; | ||
272 | |||
273 | v4l_bound_align_image(&pix->width, 48, 639, 1, | ||
274 | &pix->height, 32, 480, 1, 0); | ||
275 | |||
276 | return 0; | ||
277 | } | ||
278 | |||
279 | static int mt9v011_s_fmt(struct v4l2_subdev *sd, struct v4l2_format *fmt) | ||
280 | { | ||
281 | struct v4l2_pix_format *pix = &fmt->fmt.pix; | ||
282 | struct mt9v011 *core = to_mt9v011(sd); | ||
283 | int rc; | ||
284 | |||
285 | rc = mt9v011_try_fmt(sd, fmt); | ||
286 | if (rc < 0) | ||
287 | return -EINVAL; | ||
288 | |||
289 | core->width = pix->width; | ||
290 | core->height = pix->height; | ||
291 | |||
292 | set_res(sd); | ||
293 | |||
294 | return 0; | ||
295 | } | ||
296 | |||
297 | |||
298 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
299 | static int mt9v011_g_register(struct v4l2_subdev *sd, | ||
300 | struct v4l2_dbg_register *reg) | ||
301 | { | ||
302 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
303 | |||
304 | if (!v4l2_chip_match_i2c_client(client, ®->match)) | ||
305 | return -EINVAL; | ||
306 | if (!capable(CAP_SYS_ADMIN)) | ||
307 | return -EPERM; | ||
308 | |||
309 | reg->val = mt9v011_read(sd, reg->reg & 0xff); | ||
310 | reg->size = 2; | ||
311 | |||
312 | return 0; | ||
313 | } | ||
314 | |||
315 | static int mt9v011_s_register(struct v4l2_subdev *sd, | ||
316 | struct v4l2_dbg_register *reg) | ||
317 | { | ||
318 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
319 | |||
320 | if (!v4l2_chip_match_i2c_client(client, ®->match)) | ||
321 | return -EINVAL; | ||
322 | if (!capable(CAP_SYS_ADMIN)) | ||
323 | return -EPERM; | ||
324 | |||
325 | mt9v011_write(sd, reg->reg & 0xff, reg->val & 0xffff); | ||
326 | |||
327 | return 0; | ||
328 | } | ||
329 | #endif | ||
330 | |||
331 | static int mt9v011_g_chip_ident(struct v4l2_subdev *sd, | ||
332 | struct v4l2_dbg_chip_ident *chip) | ||
333 | { | ||
334 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
335 | |||
336 | return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_MT9V011, | ||
337 | MT9V011_VERSION); | ||
338 | } | ||
339 | |||
340 | static const struct v4l2_subdev_core_ops mt9v011_core_ops = { | ||
341 | .g_ctrl = mt9v011_g_ctrl, | ||
342 | .s_ctrl = mt9v011_s_ctrl, | ||
343 | .reset = mt9v011_reset, | ||
344 | .g_chip_ident = mt9v011_g_chip_ident, | ||
345 | #ifdef CONFIG_VIDEO_ADV_DEBUG | ||
346 | .g_register = mt9v011_g_register, | ||
347 | .s_register = mt9v011_s_register, | ||
348 | #endif | ||
349 | }; | ||
350 | |||
351 | static const struct v4l2_subdev_video_ops mt9v011_video_ops = { | ||
352 | .enum_fmt = mt9v011_enum_fmt, | ||
353 | .try_fmt = mt9v011_try_fmt, | ||
354 | .s_fmt = mt9v011_s_fmt, | ||
355 | }; | ||
356 | |||
357 | static const struct v4l2_subdev_ops mt9v011_ops = { | ||
358 | .core = &mt9v011_core_ops, | ||
359 | .video = &mt9v011_video_ops, | ||
360 | }; | ||
361 | |||
362 | |||
363 | /**************************************************************************** | ||
364 | I2C Client & Driver | ||
365 | ****************************************************************************/ | ||
366 | |||
367 | static int mt9v011_probe(struct i2c_client *c, | ||
368 | const struct i2c_device_id *id) | ||
369 | { | ||
370 | u16 version; | ||
371 | struct mt9v011 *core; | ||
372 | struct v4l2_subdev *sd; | ||
373 | |||
374 | /* Check if the adapter supports the needed features */ | ||
375 | if (!i2c_check_functionality(c->adapter, | ||
376 | I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) | ||
377 | return -EIO; | ||
378 | |||
379 | core = kzalloc(sizeof(struct mt9v011), GFP_KERNEL); | ||
380 | if (!core) | ||
381 | return -ENOMEM; | ||
382 | |||
383 | sd = &core->sd; | ||
384 | v4l2_i2c_subdev_init(sd, c, &mt9v011_ops); | ||
385 | |||
386 | /* Check if the sensor is really a MT9V011 */ | ||
387 | version = mt9v011_read(sd, R00_MT9V011_CHIP_VERSION); | ||
388 | if (version != MT9V011_VERSION) { | ||
389 | v4l2_info(sd, "*** unknown micron chip detected (0x%04x.\n", | ||
390 | version); | ||
391 | kfree(core); | ||
392 | return -EINVAL; | ||
393 | } | ||
394 | |||
395 | core->global_gain = 0x0024; | ||
396 | core->width = 640; | ||
397 | core->height = 480; | ||
398 | |||
399 | v4l_info(c, "chip found @ 0x%02x (%s)\n", | ||
400 | c->addr << 1, c->adapter->name); | ||
401 | |||
402 | return 0; | ||
403 | } | ||
404 | |||
405 | static int mt9v011_remove(struct i2c_client *c) | ||
406 | { | ||
407 | struct v4l2_subdev *sd = i2c_get_clientdata(c); | ||
408 | |||
409 | v4l2_dbg(1, debug, sd, | ||
410 | "mt9v011.c: removing mt9v011 adapter on address 0x%x\n", | ||
411 | c->addr << 1); | ||
412 | |||
413 | v4l2_device_unregister_subdev(sd); | ||
414 | kfree(to_mt9v011(sd)); | ||
415 | return 0; | ||
416 | } | ||
417 | |||
418 | /* ----------------------------------------------------------------------- */ | ||
419 | |||
420 | static const struct i2c_device_id mt9v011_id[] = { | ||
421 | { "mt9v011", 0 }, | ||
422 | { } | ||
423 | }; | ||
424 | MODULE_DEVICE_TABLE(i2c, mt9v011_id); | ||
425 | |||
426 | static struct v4l2_i2c_driver_data v4l2_i2c_data = { | ||
427 | .name = "mt9v011", | ||
428 | .probe = mt9v011_probe, | ||
429 | .remove = mt9v011_remove, | ||
430 | .id_table = mt9v011_id, | ||
431 | }; | ||
diff --git a/drivers/media/video/mt9v011.h b/drivers/media/video/mt9v011.h new file mode 100644 index 000000000000..9e443ee30558 --- /dev/null +++ b/drivers/media/video/mt9v011.h | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * mt9v011 -Micron 1/4-Inch VGA Digital Image Sensor | ||
3 | * | ||
4 | * Copyright (c) 2009 Mauro Carvalho Chehab (mchehab@redhat.com) | ||
5 | * This code is placed under the terms of the GNU General Public License v2 | ||
6 | */ | ||
7 | |||
8 | #ifndef MT9V011_H_ | ||
9 | #define MT9V011_H_ | ||
10 | |||
11 | #define R00_MT9V011_CHIP_VERSION 0x00 | ||
12 | #define R01_MT9V011_ROWSTART 0x01 | ||
13 | #define R02_MT9V011_COLSTART 0x02 | ||
14 | #define R03_MT9V011_HEIGHT 0x03 | ||
15 | #define R04_MT9V011_WIDTH 0x04 | ||
16 | #define R05_MT9V011_HBLANK 0x05 | ||
17 | #define R06_MT9V011_VBLANK 0x06 | ||
18 | #define R07_MT9V011_OUT_CTRL 0x07 | ||
19 | #define R09_MT9V011_SHUTTER_WIDTH 0x09 | ||
20 | #define R0A_MT9V011_CLK_SPEED 0x0a | ||
21 | #define R0B_MT9V011_RESTART 0x0b | ||
22 | #define R0C_MT9V011_SHUTTER_DELAY 0x0c | ||
23 | #define R0D_MT9V011_RESET 0x0d | ||
24 | #define R1E_MT9V011_DIGITAL_ZOOM 0x1e | ||
25 | #define R20_MT9V011_READ_MODE 0x20 | ||
26 | #define R2B_MT9V011_GREEN_1_GAIN 0x2b | ||
27 | #define R2C_MT9V011_BLUE_GAIN 0x2c | ||
28 | #define R2D_MT9V011_RED_GAIN 0x2d | ||
29 | #define R2E_MT9V011_GREEN_2_GAIN 0x2e | ||
30 | #define R35_MT9V011_GLOBAL_GAIN 0x35 | ||
31 | #define RF1_MT9V011_CHIP_ENABLE 0xf1 | ||
32 | |||
33 | #define MT9V011_VERSION 0x8243 | ||
34 | |||
35 | #endif | ||
diff --git a/drivers/media/video/soc_camera.c b/drivers/media/video/soc_camera.c index 16f595d4337a..9f5ae8167855 100644 --- a/drivers/media/video/soc_camera.c +++ b/drivers/media/video/soc_camera.c | |||
@@ -237,11 +237,11 @@ static int soc_camera_init_user_formats(struct soc_camera_device *icd) | |||
237 | return -ENOMEM; | 237 | return -ENOMEM; |
238 | 238 | ||
239 | icd->num_user_formats = fmts; | 239 | icd->num_user_formats = fmts; |
240 | fmts = 0; | ||
241 | 240 | ||
242 | dev_dbg(&icd->dev, "Found %d supported formats.\n", fmts); | 241 | dev_dbg(&icd->dev, "Found %d supported formats.\n", fmts); |
243 | 242 | ||
244 | /* Second pass - actually fill data formats */ | 243 | /* Second pass - actually fill data formats */ |
244 | fmts = 0; | ||
245 | for (i = 0; i < icd->num_formats; i++) | 245 | for (i = 0; i < icd->num_formats; i++) |
246 | if (!ici->ops->get_formats) { | 246 | if (!ici->ops->get_formats) { |
247 | icd->user_formats[i].host_fmt = icd->formats + i; | 247 | icd->user_formats[i].host_fmt = icd->formats + i; |
@@ -877,8 +877,11 @@ static int soc_camera_probe(struct device *dev) | |||
877 | (unsigned short)~0; | 877 | (unsigned short)~0; |
878 | 878 | ||
879 | ret = soc_camera_init_user_formats(icd); | 879 | ret = soc_camera_init_user_formats(icd); |
880 | if (ret < 0) | 880 | if (ret < 0) { |
881 | if (icd->ops->remove) | ||
882 | icd->ops->remove(icd); | ||
881 | goto eiufmt; | 883 | goto eiufmt; |
884 | } | ||
882 | 885 | ||
883 | icd->height = DEFAULT_HEIGHT; | 886 | icd->height = DEFAULT_HEIGHT; |
884 | icd->width = DEFAULT_WIDTH; | 887 | icd->width = DEFAULT_WIDTH; |
@@ -902,8 +905,10 @@ static int soc_camera_remove(struct device *dev) | |||
902 | { | 905 | { |
903 | struct soc_camera_device *icd = to_soc_camera_dev(dev); | 906 | struct soc_camera_device *icd = to_soc_camera_dev(dev); |
904 | 907 | ||
908 | mutex_lock(&icd->video_lock); | ||
905 | if (icd->ops->remove) | 909 | if (icd->ops->remove) |
906 | icd->ops->remove(icd); | 910 | icd->ops->remove(icd); |
911 | mutex_unlock(&icd->video_lock); | ||
907 | 912 | ||
908 | soc_camera_free_user_formats(icd); | 913 | soc_camera_free_user_formats(icd); |
909 | 914 | ||
@@ -1145,6 +1150,7 @@ evidallocd: | |||
1145 | } | 1150 | } |
1146 | EXPORT_SYMBOL(soc_camera_video_start); | 1151 | EXPORT_SYMBOL(soc_camera_video_start); |
1147 | 1152 | ||
1153 | /* Called from client .remove() methods with .video_lock held */ | ||
1148 | void soc_camera_video_stop(struct soc_camera_device *icd) | 1154 | void soc_camera_video_stop(struct soc_camera_device *icd) |
1149 | { | 1155 | { |
1150 | struct video_device *vdev = icd->vdev; | 1156 | struct video_device *vdev = icd->vdev; |
@@ -1154,10 +1160,8 @@ void soc_camera_video_stop(struct soc_camera_device *icd) | |||
1154 | if (!icd->dev.parent || !vdev) | 1160 | if (!icd->dev.parent || !vdev) |
1155 | return; | 1161 | return; |
1156 | 1162 | ||
1157 | mutex_lock(&icd->video_lock); | ||
1158 | video_unregister_device(vdev); | 1163 | video_unregister_device(vdev); |
1159 | icd->vdev = NULL; | 1164 | icd->vdev = NULL; |
1160 | mutex_unlock(&icd->video_lock); | ||
1161 | } | 1165 | } |
1162 | EXPORT_SYMBOL(soc_camera_video_stop); | 1166 | EXPORT_SYMBOL(soc_camera_video_stop); |
1163 | 1167 | ||
diff --git a/drivers/media/video/vivi.c b/drivers/media/video/vivi.c index cd7266858462..7705fc6baf00 100644 --- a/drivers/media/video/vivi.c +++ b/drivers/media/video/vivi.c | |||
@@ -343,6 +343,53 @@ static struct bar_std bars[] = { | |||
343 | #define TO_U(r, g, b) \ | 343 | #define TO_U(r, g, b) \ |
344 | (((-9714 * r - 19070 * g + 28784 * b + 32768) >> 16) + 128) | 344 | (((-9714 * r - 19070 * g + 28784 * b + 32768) >> 16) + 128) |
345 | 345 | ||
346 | /* precalculate color bar values to speed up rendering */ | ||
347 | static void precalculate_bars(struct vivi_fh *fh) | ||
348 | { | ||
349 | struct vivi_dev *dev = fh->dev; | ||
350 | unsigned char r, g, b; | ||
351 | int k, is_yuv; | ||
352 | |||
353 | fh->input = dev->input; | ||
354 | |||
355 | for (k = 0; k < 8; k++) { | ||
356 | r = bars[fh->input].bar[k][0]; | ||
357 | g = bars[fh->input].bar[k][1]; | ||
358 | b = bars[fh->input].bar[k][2]; | ||
359 | is_yuv = 0; | ||
360 | |||
361 | switch (fh->fmt->fourcc) { | ||
362 | case V4L2_PIX_FMT_YUYV: | ||
363 | case V4L2_PIX_FMT_UYVY: | ||
364 | is_yuv = 1; | ||
365 | break; | ||
366 | case V4L2_PIX_FMT_RGB565: | ||
367 | case V4L2_PIX_FMT_RGB565X: | ||
368 | r >>= 3; | ||
369 | g >>= 2; | ||
370 | b >>= 3; | ||
371 | break; | ||
372 | case V4L2_PIX_FMT_RGB555: | ||
373 | case V4L2_PIX_FMT_RGB555X: | ||
374 | r >>= 3; | ||
375 | g >>= 3; | ||
376 | b >>= 3; | ||
377 | break; | ||
378 | } | ||
379 | |||
380 | if (is_yuv) { | ||
381 | fh->bars[k][0] = TO_Y(r, g, b); /* Luma */ | ||
382 | fh->bars[k][1] = TO_U(r, g, b); /* Cb */ | ||
383 | fh->bars[k][2] = TO_V(r, g, b); /* Cr */ | ||
384 | } else { | ||
385 | fh->bars[k][0] = r; | ||
386 | fh->bars[k][1] = g; | ||
387 | fh->bars[k][2] = b; | ||
388 | } | ||
389 | } | ||
390 | |||
391 | } | ||
392 | |||
346 | #define TSTAMP_MIN_Y 24 | 393 | #define TSTAMP_MIN_Y 24 |
347 | #define TSTAMP_MAX_Y (TSTAMP_MIN_Y + 15) | 394 | #define TSTAMP_MAX_Y (TSTAMP_MIN_Y + 15) |
348 | #define TSTAMP_INPUT_X 10 | 395 | #define TSTAMP_INPUT_X 10 |
@@ -755,6 +802,8 @@ buffer_prepare(struct videobuf_queue *vq, struct videobuf_buffer *vb, | |||
755 | buf->vb.height = fh->height; | 802 | buf->vb.height = fh->height; |
756 | buf->vb.field = field; | 803 | buf->vb.field = field; |
757 | 804 | ||
805 | precalculate_bars(fh); | ||
806 | |||
758 | if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { | 807 | if (VIDEOBUF_NEEDS_INIT == buf->vb.state) { |
759 | rc = videobuf_iolock(vq, &buf->vb, NULL); | 808 | rc = videobuf_iolock(vq, &buf->vb, NULL); |
760 | if (rc < 0) | 809 | if (rc < 0) |
@@ -893,53 +942,6 @@ static int vidioc_try_fmt_vid_cap(struct file *file, void *priv, | |||
893 | return 0; | 942 | return 0; |
894 | } | 943 | } |
895 | 944 | ||
896 | /* precalculate color bar values to speed up rendering */ | ||
897 | static void precalculate_bars(struct vivi_fh *fh) | ||
898 | { | ||
899 | struct vivi_dev *dev = fh->dev; | ||
900 | unsigned char r, g, b; | ||
901 | int k, is_yuv; | ||
902 | |||
903 | fh->input = dev->input; | ||
904 | |||
905 | for (k = 0; k < 8; k++) { | ||
906 | r = bars[fh->input].bar[k][0]; | ||
907 | g = bars[fh->input].bar[k][1]; | ||
908 | b = bars[fh->input].bar[k][2]; | ||
909 | is_yuv = 0; | ||
910 | |||
911 | switch (fh->fmt->fourcc) { | ||
912 | case V4L2_PIX_FMT_YUYV: | ||
913 | case V4L2_PIX_FMT_UYVY: | ||
914 | is_yuv = 1; | ||
915 | break; | ||
916 | case V4L2_PIX_FMT_RGB565: | ||
917 | case V4L2_PIX_FMT_RGB565X: | ||
918 | r >>= 3; | ||
919 | g >>= 2; | ||
920 | b >>= 3; | ||
921 | break; | ||
922 | case V4L2_PIX_FMT_RGB555: | ||
923 | case V4L2_PIX_FMT_RGB555X: | ||
924 | r >>= 3; | ||
925 | g >>= 3; | ||
926 | b >>= 3; | ||
927 | break; | ||
928 | } | ||
929 | |||
930 | if (is_yuv) { | ||
931 | fh->bars[k][0] = TO_Y(r, g, b); /* Luma */ | ||
932 | fh->bars[k][1] = TO_U(r, g, b); /* Cb */ | ||
933 | fh->bars[k][2] = TO_V(r, g, b); /* Cr */ | ||
934 | } else { | ||
935 | fh->bars[k][0] = r; | ||
936 | fh->bars[k][1] = g; | ||
937 | fh->bars[k][2] = b; | ||
938 | } | ||
939 | } | ||
940 | |||
941 | } | ||
942 | |||
943 | /*FIXME: This seems to be generic enough to be at videodev2 */ | 945 | /*FIXME: This seems to be generic enough to be at videodev2 */ |
944 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, | 946 | static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, |
945 | struct v4l2_format *f) | 947 | struct v4l2_format *f) |
@@ -965,8 +967,6 @@ static int vidioc_s_fmt_vid_cap(struct file *file, void *priv, | |||
965 | fh->vb_vidq.field = f->fmt.pix.field; | 967 | fh->vb_vidq.field = f->fmt.pix.field; |
966 | fh->type = f->type; | 968 | fh->type = f->type; |
967 | 969 | ||
968 | precalculate_bars(fh); | ||
969 | |||
970 | ret = 0; | 970 | ret = 0; |
971 | out: | 971 | out: |
972 | mutex_unlock(&q->vb_lock); | 972 | mutex_unlock(&q->vb_lock); |
@@ -1357,6 +1357,7 @@ static int __init vivi_create_instance(int inst) | |||
1357 | goto unreg_dev; | 1357 | goto unreg_dev; |
1358 | 1358 | ||
1359 | *vfd = vivi_template; | 1359 | *vfd = vivi_template; |
1360 | vfd->debug = debug; | ||
1360 | 1361 | ||
1361 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, video_nr); | 1362 | ret = video_register_device(vfd, VFL_TYPE_GRABBER, video_nr); |
1362 | if (ret < 0) | 1363 | if (ret < 0) |
diff --git a/drivers/mfd/ezx-pcap.c b/drivers/mfd/ezx-pcap.c index 671a7efe86a8..c1de4afa89a6 100644 --- a/drivers/mfd/ezx-pcap.c +++ b/drivers/mfd/ezx-pcap.c | |||
@@ -238,8 +238,10 @@ static irqreturn_t pcap_adc_irq(int irq, void *_pcap) | |||
238 | mutex_lock(&pcap->adc_mutex); | 238 | mutex_lock(&pcap->adc_mutex); |
239 | req = pcap->adc_queue[pcap->adc_head]; | 239 | req = pcap->adc_queue[pcap->adc_head]; |
240 | 240 | ||
241 | if (WARN(!req, KERN_WARNING "adc irq without pending request\n")) | 241 | if (WARN(!req, KERN_WARNING "adc irq without pending request\n")) { |
242 | mutex_unlock(&pcap->adc_mutex); | ||
242 | return IRQ_HANDLED; | 243 | return IRQ_HANDLED; |
244 | } | ||
243 | 245 | ||
244 | /* read requested channels results */ | 246 | /* read requested channels results */ |
245 | ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); | 247 | ezx_pcap_read(pcap, PCAP_REG_ADC, &tmp); |
diff --git a/drivers/mfd/sm501.c b/drivers/mfd/sm501.c index 4c7b7962f6b8..0cc5eeff5ee8 100644 --- a/drivers/mfd/sm501.c +++ b/drivers/mfd/sm501.c | |||
@@ -367,7 +367,8 @@ int sm501_unit_power(struct device *dev, unsigned int unit, unsigned int to) | |||
367 | break; | 367 | break; |
368 | 368 | ||
369 | default: | 369 | default: |
370 | return -1; | 370 | gate = -1; |
371 | goto already; | ||
371 | } | 372 | } |
372 | 373 | ||
373 | writel(mode, sm->regs + SM501_POWER_MODE_CONTROL); | 374 | writel(mode, sm->regs + SM501_POWER_MODE_CONTROL); |
diff --git a/drivers/parisc/ccio-dma.c b/drivers/parisc/ccio-dma.c index 5d610cbcfe80..0f0e0b919ef4 100644 --- a/drivers/parisc/ccio-dma.c +++ b/drivers/parisc/ccio-dma.c | |||
@@ -1134,7 +1134,7 @@ static const struct file_operations ccio_proc_bitmap_fops = { | |||
1134 | .llseek = seq_lseek, | 1134 | .llseek = seq_lseek, |
1135 | .release = single_release, | 1135 | .release = single_release, |
1136 | }; | 1136 | }; |
1137 | #endif | 1137 | #endif /* CONFIG_PROC_FS */ |
1138 | 1138 | ||
1139 | /** | 1139 | /** |
1140 | * ccio_find_ioc - Find the ioc in the ioc_list | 1140 | * ccio_find_ioc - Find the ioc in the ioc_list |
@@ -1568,14 +1568,15 @@ static int __init ccio_probe(struct parisc_device *dev) | |||
1568 | /* if this fails, no I/O cards will work, so may as well bug */ | 1568 | /* if this fails, no I/O cards will work, so may as well bug */ |
1569 | BUG_ON(dev->dev.platform_data == NULL); | 1569 | BUG_ON(dev->dev.platform_data == NULL); |
1570 | HBA_DATA(dev->dev.platform_data)->iommu = ioc; | 1570 | HBA_DATA(dev->dev.platform_data)->iommu = ioc; |
1571 | 1571 | ||
1572 | #ifdef CONFIG_PROC_FS | ||
1572 | if (ioc_count == 0) { | 1573 | if (ioc_count == 0) { |
1573 | proc_create(MODULE_NAME, 0, proc_runway_root, | 1574 | proc_create(MODULE_NAME, 0, proc_runway_root, |
1574 | &ccio_proc_info_fops); | 1575 | &ccio_proc_info_fops); |
1575 | proc_create(MODULE_NAME"-bitmap", 0, proc_runway_root, | 1576 | proc_create(MODULE_NAME"-bitmap", 0, proc_runway_root, |
1576 | &ccio_proc_bitmap_fops); | 1577 | &ccio_proc_bitmap_fops); |
1577 | } | 1578 | } |
1578 | 1579 | #endif | |
1579 | ioc_count++; | 1580 | ioc_count++; |
1580 | 1581 | ||
1581 | parisc_has_iommu(); | 1582 | parisc_has_iommu(); |
diff --git a/drivers/parisc/dino.c b/drivers/parisc/dino.c index 52ae0b1d470c..c590974e9815 100644 --- a/drivers/parisc/dino.c +++ b/drivers/parisc/dino.c | |||
@@ -353,7 +353,7 @@ static unsigned int dino_startup_irq(unsigned int irq) | |||
353 | return 0; | 353 | return 0; |
354 | } | 354 | } |
355 | 355 | ||
356 | static struct hw_interrupt_type dino_interrupt_type = { | 356 | static struct irq_chip dino_interrupt_type = { |
357 | .typename = "GSC-PCI", | 357 | .typename = "GSC-PCI", |
358 | .startup = dino_startup_irq, | 358 | .startup = dino_startup_irq, |
359 | .shutdown = dino_disable_irq, | 359 | .shutdown = dino_disable_irq, |
@@ -1019,22 +1019,22 @@ static int __init dino_probe(struct parisc_device *dev) | |||
1019 | ** It's not used to avoid chicken/egg problems | 1019 | ** It's not used to avoid chicken/egg problems |
1020 | ** with configuration accessor functions. | 1020 | ** with configuration accessor functions. |
1021 | */ | 1021 | */ |
1022 | bus = pci_scan_bus_parented(&dev->dev, dino_current_bus, | 1022 | dino_dev->hba.hba_bus = bus = pci_scan_bus_parented(&dev->dev, |
1023 | &dino_cfg_ops, NULL); | 1023 | dino_current_bus, &dino_cfg_ops, NULL); |
1024 | |||
1024 | if(bus) { | 1025 | if(bus) { |
1025 | pci_bus_add_devices(bus); | ||
1026 | /* This code *depends* on scanning being single threaded | 1026 | /* This code *depends* on scanning being single threaded |
1027 | * if it isn't, this global bus number count will fail | 1027 | * if it isn't, this global bus number count will fail |
1028 | */ | 1028 | */ |
1029 | dino_current_bus = bus->subordinate + 1; | 1029 | dino_current_bus = bus->subordinate + 1; |
1030 | pci_bus_assign_resources(bus); | 1030 | pci_bus_assign_resources(bus); |
1031 | pci_bus_add_devices(bus); | ||
1031 | } else { | 1032 | } else { |
1032 | printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (probably duplicate bus number %d)\n", | 1033 | printk(KERN_ERR "ERROR: failed to scan PCI bus on %s (duplicate bus number %d?)\n", |
1033 | dev_name(&dev->dev), dino_current_bus); | 1034 | dev_name(&dev->dev), dino_current_bus); |
1034 | /* increment the bus number in case of duplicates */ | 1035 | /* increment the bus number in case of duplicates */ |
1035 | dino_current_bus++; | 1036 | dino_current_bus++; |
1036 | } | 1037 | } |
1037 | dino_dev->hba.hba_bus = bus; | ||
1038 | return 0; | 1038 | return 0; |
1039 | } | 1039 | } |
1040 | 1040 | ||
diff --git a/drivers/parisc/eisa.c b/drivers/parisc/eisa.c index 5b89f404e668..51220749cb65 100644 --- a/drivers/parisc/eisa.c +++ b/drivers/parisc/eisa.c | |||
@@ -188,7 +188,7 @@ static unsigned int eisa_startup_irq(unsigned int irq) | |||
188 | return 0; | 188 | return 0; |
189 | } | 189 | } |
190 | 190 | ||
191 | static struct hw_interrupt_type eisa_interrupt_type = { | 191 | static struct irq_chip eisa_interrupt_type = { |
192 | .typename = "EISA", | 192 | .typename = "EISA", |
193 | .startup = eisa_startup_irq, | 193 | .startup = eisa_startup_irq, |
194 | .shutdown = eisa_disable_irq, | 194 | .shutdown = eisa_disable_irq, |
diff --git a/drivers/parisc/gsc.c b/drivers/parisc/gsc.c index d33632917696..647adc9f85ad 100644 --- a/drivers/parisc/gsc.c +++ b/drivers/parisc/gsc.c | |||
@@ -148,7 +148,7 @@ static unsigned int gsc_asic_startup_irq(unsigned int irq) | |||
148 | return 0; | 148 | return 0; |
149 | } | 149 | } |
150 | 150 | ||
151 | static struct hw_interrupt_type gsc_asic_interrupt_type = { | 151 | static struct irq_chip gsc_asic_interrupt_type = { |
152 | .typename = "GSC-ASIC", | 152 | .typename = "GSC-ASIC", |
153 | .startup = gsc_asic_startup_irq, | 153 | .startup = gsc_asic_startup_irq, |
154 | .shutdown = gsc_asic_disable_irq, | 154 | .shutdown = gsc_asic_disable_irq, |
@@ -158,7 +158,7 @@ static struct hw_interrupt_type gsc_asic_interrupt_type = { | |||
158 | .end = no_end_irq, | 158 | .end = no_end_irq, |
159 | }; | 159 | }; |
160 | 160 | ||
161 | int gsc_assign_irq(struct hw_interrupt_type *type, void *data) | 161 | int gsc_assign_irq(struct irq_chip *type, void *data) |
162 | { | 162 | { |
163 | static int irq = GSC_IRQ_BASE; | 163 | static int irq = GSC_IRQ_BASE; |
164 | struct irq_desc *desc; | 164 | struct irq_desc *desc; |
diff --git a/drivers/parisc/gsc.h b/drivers/parisc/gsc.h index 762a1babad60..b9d7bfb68e24 100644 --- a/drivers/parisc/gsc.h +++ b/drivers/parisc/gsc.h | |||
@@ -38,7 +38,7 @@ struct gsc_asic { | |||
38 | int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic); | 38 | int gsc_common_setup(struct parisc_device *parent, struct gsc_asic *gsc_asic); |
39 | int gsc_alloc_irq(struct gsc_irq *dev); /* dev needs an irq */ | 39 | int gsc_alloc_irq(struct gsc_irq *dev); /* dev needs an irq */ |
40 | int gsc_claim_irq(struct gsc_irq *dev, int irq); /* dev needs this irq */ | 40 | int gsc_claim_irq(struct gsc_irq *dev, int irq); /* dev needs this irq */ |
41 | int gsc_assign_irq(struct hw_interrupt_type *type, void *data); | 41 | int gsc_assign_irq(struct irq_chip *type, void *data); |
42 | int gsc_find_local_irq(unsigned int irq, int *global_irq, int limit); | 42 | int gsc_find_local_irq(unsigned int irq, int *global_irq, int limit); |
43 | void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl, | 43 | void gsc_fixup_irqs(struct parisc_device *parent, void *ctrl, |
44 | void (*choose)(struct parisc_device *child, void *ctrl)); | 44 | void (*choose)(struct parisc_device *child, void *ctrl)); |
diff --git a/drivers/parisc/iosapic.c b/drivers/parisc/iosapic.c index 4a9cc92d4d18..88e333553212 100644 --- a/drivers/parisc/iosapic.c +++ b/drivers/parisc/iosapic.c | |||
@@ -729,7 +729,7 @@ static int iosapic_set_affinity_irq(unsigned int irq, | |||
729 | } | 729 | } |
730 | #endif | 730 | #endif |
731 | 731 | ||
732 | static struct hw_interrupt_type iosapic_interrupt_type = { | 732 | static struct irq_chip iosapic_interrupt_type = { |
733 | .typename = "IO-SAPIC-level", | 733 | .typename = "IO-SAPIC-level", |
734 | .startup = iosapic_startup_irq, | 734 | .startup = iosapic_startup_irq, |
735 | .shutdown = iosapic_disable_irq, | 735 | .shutdown = iosapic_disable_irq, |
diff --git a/drivers/parisc/lba_pci.c b/drivers/parisc/lba_pci.c index 59fbbf128365..ede614616f8e 100644 --- a/drivers/parisc/lba_pci.c +++ b/drivers/parisc/lba_pci.c | |||
@@ -980,28 +980,38 @@ static void | |||
980 | lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev) | 980 | lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev) |
981 | { | 981 | { |
982 | unsigned long bytecnt; | 982 | unsigned long bytecnt; |
983 | pdc_pat_cell_mod_maddr_block_t pa_pdc_cell; /* PA_VIEW */ | ||
984 | pdc_pat_cell_mod_maddr_block_t io_pdc_cell; /* IO_VIEW */ | ||
985 | long io_count; | 983 | long io_count; |
986 | long status; /* PDC return status */ | 984 | long status; /* PDC return status */ |
987 | long pa_count; | 985 | long pa_count; |
986 | pdc_pat_cell_mod_maddr_block_t *pa_pdc_cell; /* PA_VIEW */ | ||
987 | pdc_pat_cell_mod_maddr_block_t *io_pdc_cell; /* IO_VIEW */ | ||
988 | int i; | 988 | int i; |
989 | 989 | ||
990 | pa_pdc_cell = kzalloc(sizeof(pdc_pat_cell_mod_maddr_block_t), GFP_KERNEL); | ||
991 | if (!pa_pdc_cell) | ||
992 | return; | ||
993 | |||
994 | io_pdc_cell = kzalloc(sizeof(pdc_pat_cell_mod_maddr_block_t), GFP_KERNEL); | ||
995 | if (!pa_pdc_cell) { | ||
996 | kfree(pa_pdc_cell); | ||
997 | return; | ||
998 | } | ||
999 | |||
990 | /* return cell module (IO view) */ | 1000 | /* return cell module (IO view) */ |
991 | status = pdc_pat_cell_module(&bytecnt, pa_dev->pcell_loc, pa_dev->mod_index, | 1001 | status = pdc_pat_cell_module(&bytecnt, pa_dev->pcell_loc, pa_dev->mod_index, |
992 | PA_VIEW, & pa_pdc_cell); | 1002 | PA_VIEW, pa_pdc_cell); |
993 | pa_count = pa_pdc_cell.mod[1]; | 1003 | pa_count = pa_pdc_cell->mod[1]; |
994 | 1004 | ||
995 | status |= pdc_pat_cell_module(&bytecnt, pa_dev->pcell_loc, pa_dev->mod_index, | 1005 | status |= pdc_pat_cell_module(&bytecnt, pa_dev->pcell_loc, pa_dev->mod_index, |
996 | IO_VIEW, &io_pdc_cell); | 1006 | IO_VIEW, io_pdc_cell); |
997 | io_count = io_pdc_cell.mod[1]; | 1007 | io_count = io_pdc_cell->mod[1]; |
998 | 1008 | ||
999 | /* We've already done this once for device discovery...*/ | 1009 | /* We've already done this once for device discovery...*/ |
1000 | if (status != PDC_OK) { | 1010 | if (status != PDC_OK) { |
1001 | panic("pdc_pat_cell_module() call failed for LBA!\n"); | 1011 | panic("pdc_pat_cell_module() call failed for LBA!\n"); |
1002 | } | 1012 | } |
1003 | 1013 | ||
1004 | if (PAT_GET_ENTITY(pa_pdc_cell.mod_info) != PAT_ENTITY_LBA) { | 1014 | if (PAT_GET_ENTITY(pa_pdc_cell->mod_info) != PAT_ENTITY_LBA) { |
1005 | panic("pdc_pat_cell_module() entity returned != PAT_ENTITY_LBA!\n"); | 1015 | panic("pdc_pat_cell_module() entity returned != PAT_ENTITY_LBA!\n"); |
1006 | } | 1016 | } |
1007 | 1017 | ||
@@ -1016,8 +1026,8 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev) | |||
1016 | } *p, *io; | 1026 | } *p, *io; |
1017 | struct resource *r; | 1027 | struct resource *r; |
1018 | 1028 | ||
1019 | p = (void *) &(pa_pdc_cell.mod[2+i*3]); | 1029 | p = (void *) &(pa_pdc_cell->mod[2+i*3]); |
1020 | io = (void *) &(io_pdc_cell.mod[2+i*3]); | 1030 | io = (void *) &(io_pdc_cell->mod[2+i*3]); |
1021 | 1031 | ||
1022 | /* Convert the PAT range data to PCI "struct resource" */ | 1032 | /* Convert the PAT range data to PCI "struct resource" */ |
1023 | switch(p->type & 0xff) { | 1033 | switch(p->type & 0xff) { |
@@ -1096,6 +1106,9 @@ lba_pat_resources(struct parisc_device *pa_dev, struct lba_device *lba_dev) | |||
1096 | break; | 1106 | break; |
1097 | } | 1107 | } |
1098 | } | 1108 | } |
1109 | |||
1110 | kfree(pa_pdc_cell); | ||
1111 | kfree(io_pdc_cell); | ||
1099 | } | 1112 | } |
1100 | #else | 1113 | #else |
1101 | /* keep compiler from complaining about missing declarations */ | 1114 | /* keep compiler from complaining about missing declarations */ |
@@ -1509,10 +1522,6 @@ lba_driver_probe(struct parisc_device *dev) | |||
1509 | lba_bus = lba_dev->hba.hba_bus = | 1522 | lba_bus = lba_dev->hba.hba_bus = |
1510 | pci_scan_bus_parented(&dev->dev, lba_dev->hba.bus_num.start, | 1523 | pci_scan_bus_parented(&dev->dev, lba_dev->hba.bus_num.start, |
1511 | cfg_ops, NULL); | 1524 | cfg_ops, NULL); |
1512 | if (lba_bus) { | ||
1513 | lba_next_bus = lba_bus->subordinate + 1; | ||
1514 | pci_bus_add_devices(lba_bus); | ||
1515 | } | ||
1516 | 1525 | ||
1517 | /* This is in lieu of calling pci_assign_unassigned_resources() */ | 1526 | /* This is in lieu of calling pci_assign_unassigned_resources() */ |
1518 | if (is_pdc_pat()) { | 1527 | if (is_pdc_pat()) { |
@@ -1533,7 +1542,6 @@ lba_driver_probe(struct parisc_device *dev) | |||
1533 | } | 1542 | } |
1534 | pci_enable_bridges(lba_bus); | 1543 | pci_enable_bridges(lba_bus); |
1535 | 1544 | ||
1536 | |||
1537 | /* | 1545 | /* |
1538 | ** Once PCI register ops has walked the bus, access to config | 1546 | ** Once PCI register ops has walked the bus, access to config |
1539 | ** space is restricted. Avoids master aborts on config cycles. | 1547 | ** space is restricted. Avoids master aborts on config cycles. |
@@ -1543,6 +1551,11 @@ lba_driver_probe(struct parisc_device *dev) | |||
1543 | lba_dev->flags |= LBA_FLAG_SKIP_PROBE; | 1551 | lba_dev->flags |= LBA_FLAG_SKIP_PROBE; |
1544 | } | 1552 | } |
1545 | 1553 | ||
1554 | if (lba_bus) { | ||
1555 | lba_next_bus = lba_bus->subordinate + 1; | ||
1556 | pci_bus_add_devices(lba_bus); | ||
1557 | } | ||
1558 | |||
1546 | /* Whew! Finally done! Tell services we got this one covered. */ | 1559 | /* Whew! Finally done! Tell services we got this one covered. */ |
1547 | return 0; | 1560 | return 0; |
1548 | } | 1561 | } |
diff --git a/drivers/parisc/sba_iommu.c b/drivers/parisc/sba_iommu.c index d46dd57450ac..123d8fe3427d 100644 --- a/drivers/parisc/sba_iommu.c +++ b/drivers/parisc/sba_iommu.c | |||
@@ -2057,6 +2057,7 @@ void sba_directed_lmmio(struct parisc_device *pci_hba, struct resource *r) | |||
2057 | r->start = (base & ~1UL) | PCI_F_EXTEND; | 2057 | r->start = (base & ~1UL) | PCI_F_EXTEND; |
2058 | size = ~ READ_REG32(reg + LMMIO_DIRECT0_MASK); | 2058 | size = ~ READ_REG32(reg + LMMIO_DIRECT0_MASK); |
2059 | r->end = r->start + size; | 2059 | r->end = r->start + size; |
2060 | r->flags = IORESOURCE_MEM; | ||
2060 | } | 2061 | } |
2061 | } | 2062 | } |
2062 | 2063 | ||
@@ -2093,4 +2094,5 @@ void sba_distributed_lmmio(struct parisc_device *pci_hba, struct resource *r ) | |||
2093 | size = (~READ_REG32(sba->sba_hpa + LMMIO_DIST_MASK)) / ROPES_PER_IOC; | 2094 | size = (~READ_REG32(sba->sba_hpa + LMMIO_DIST_MASK)) / ROPES_PER_IOC; |
2094 | r->start += rope * (size + 1); /* adjust base for this rope */ | 2095 | r->start += rope * (size + 1); /* adjust base for this rope */ |
2095 | r->end = r->start + size; | 2096 | r->end = r->start + size; |
2097 | r->flags = IORESOURCE_MEM; | ||
2096 | } | 2098 | } |
diff --git a/drivers/parisc/superio.c b/drivers/parisc/superio.c index 33e5ade774ca..675f04e6597a 100644 --- a/drivers/parisc/superio.c +++ b/drivers/parisc/superio.c | |||
@@ -325,7 +325,7 @@ static unsigned int superio_startup_irq(unsigned int irq) | |||
325 | return 0; | 325 | return 0; |
326 | } | 326 | } |
327 | 327 | ||
328 | static struct hw_interrupt_type superio_interrupt_type = { | 328 | static struct irq_chip superio_interrupt_type = { |
329 | .typename = SUPERIO, | 329 | .typename = SUPERIO, |
330 | .startup = superio_startup_irq, | 330 | .startup = superio_startup_irq, |
331 | .shutdown = superio_disable_irq, | 331 | .shutdown = superio_disable_irq, |
@@ -434,8 +434,8 @@ static void __init superio_parport_init(void) | |||
434 | 0 /*base_hi*/, | 434 | 0 /*base_hi*/, |
435 | PAR_IRQ, | 435 | PAR_IRQ, |
436 | PARPORT_DMA_NONE /* dma */, | 436 | PARPORT_DMA_NONE /* dma */, |
437 | NULL /*struct pci_dev* */), | 437 | NULL /*struct pci_dev* */, |
438 | 0 /* shared irq flags */ ) | 438 | 0 /* shared irq flags */)) |
439 | 439 | ||
440 | printk(KERN_WARNING PFX "Probing parallel port failed.\n"); | 440 | printk(KERN_WARNING PFX "Probing parallel port failed.\n"); |
441 | #endif /* CONFIG_PARPORT_PC */ | 441 | #endif /* CONFIG_PARPORT_PC */ |
diff --git a/drivers/pci/hotplug/pci_hotplug_core.c b/drivers/pci/hotplug/pci_hotplug_core.c index 844580489d4d..5c5043f239cf 100644 --- a/drivers/pci/hotplug/pci_hotplug_core.c +++ b/drivers/pci/hotplug/pci_hotplug_core.c | |||
@@ -555,6 +555,8 @@ static struct hotplug_slot *get_slot_from_name (const char *name) | |||
555 | * @slot: pointer to the &struct hotplug_slot to register | 555 | * @slot: pointer to the &struct hotplug_slot to register |
556 | * @devnr: device number | 556 | * @devnr: device number |
557 | * @name: name registered with kobject core | 557 | * @name: name registered with kobject core |
558 | * @owner: caller module owner | ||
559 | * @mod_name: caller module name | ||
558 | * | 560 | * |
559 | * Registers a hotplug slot with the pci hotplug subsystem, which will allow | 561 | * Registers a hotplug slot with the pci hotplug subsystem, which will allow |
560 | * userspace interaction to the slot. | 562 | * userspace interaction to the slot. |
diff --git a/drivers/pci/intel-iommu.c b/drivers/pci/intel-iommu.c index 420afa887283..360fb67a30d7 100644 --- a/drivers/pci/intel-iommu.c +++ b/drivers/pci/intel-iommu.c | |||
@@ -56,14 +56,32 @@ | |||
56 | #define MAX_AGAW_WIDTH 64 | 56 | #define MAX_AGAW_WIDTH 64 |
57 | 57 | ||
58 | #define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1) | 58 | #define DOMAIN_MAX_ADDR(gaw) ((((u64)1) << gaw) - 1) |
59 | #define DOMAIN_MAX_PFN(gaw) ((((u64)1) << (gaw-VTD_PAGE_SHIFT)) - 1) | ||
59 | 60 | ||
60 | #define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT) | 61 | #define IOVA_PFN(addr) ((addr) >> PAGE_SHIFT) |
61 | #define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32)) | 62 | #define DMA_32BIT_PFN IOVA_PFN(DMA_BIT_MASK(32)) |
62 | #define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64)) | 63 | #define DMA_64BIT_PFN IOVA_PFN(DMA_BIT_MASK(64)) |
63 | 64 | ||
64 | #ifndef PHYSICAL_PAGE_MASK | 65 | |
65 | #define PHYSICAL_PAGE_MASK PAGE_MASK | 66 | /* VT-d pages must always be _smaller_ than MM pages. Otherwise things |
66 | #endif | 67 | are never going to work. */ |
68 | static inline unsigned long dma_to_mm_pfn(unsigned long dma_pfn) | ||
69 | { | ||
70 | return dma_pfn >> (PAGE_SHIFT - VTD_PAGE_SHIFT); | ||
71 | } | ||
72 | |||
73 | static inline unsigned long mm_to_dma_pfn(unsigned long mm_pfn) | ||
74 | { | ||
75 | return mm_pfn << (PAGE_SHIFT - VTD_PAGE_SHIFT); | ||
76 | } | ||
77 | static inline unsigned long page_to_dma_pfn(struct page *pg) | ||
78 | { | ||
79 | return mm_to_dma_pfn(page_to_pfn(pg)); | ||
80 | } | ||
81 | static inline unsigned long virt_to_dma_pfn(void *p) | ||
82 | { | ||
83 | return page_to_dma_pfn(virt_to_page(p)); | ||
84 | } | ||
67 | 85 | ||
68 | /* global iommu list, set NULL for ignored DMAR units */ | 86 | /* global iommu list, set NULL for ignored DMAR units */ |
69 | static struct intel_iommu **g_iommus; | 87 | static struct intel_iommu **g_iommus; |
@@ -204,12 +222,17 @@ static inline void dma_set_pte_prot(struct dma_pte *pte, unsigned long prot) | |||
204 | 222 | ||
205 | static inline u64 dma_pte_addr(struct dma_pte *pte) | 223 | static inline u64 dma_pte_addr(struct dma_pte *pte) |
206 | { | 224 | { |
207 | return (pte->val & VTD_PAGE_MASK); | 225 | #ifdef CONFIG_64BIT |
226 | return pte->val & VTD_PAGE_MASK; | ||
227 | #else | ||
228 | /* Must have a full atomic 64-bit read */ | ||
229 | return __cmpxchg64(pte, 0ULL, 0ULL) & VTD_PAGE_MASK; | ||
230 | #endif | ||
208 | } | 231 | } |
209 | 232 | ||
210 | static inline void dma_set_pte_addr(struct dma_pte *pte, u64 addr) | 233 | static inline void dma_set_pte_pfn(struct dma_pte *pte, unsigned long pfn) |
211 | { | 234 | { |
212 | pte->val |= (addr & VTD_PAGE_MASK); | 235 | pte->val |= (uint64_t)pfn << VTD_PAGE_SHIFT; |
213 | } | 236 | } |
214 | 237 | ||
215 | static inline bool dma_pte_present(struct dma_pte *pte) | 238 | static inline bool dma_pte_present(struct dma_pte *pte) |
@@ -217,6 +240,11 @@ static inline bool dma_pte_present(struct dma_pte *pte) | |||
217 | return (pte->val & 3) != 0; | 240 | return (pte->val & 3) != 0; |
218 | } | 241 | } |
219 | 242 | ||
243 | static inline int first_pte_in_page(struct dma_pte *pte) | ||
244 | { | ||
245 | return !((unsigned long)pte & ~VTD_PAGE_MASK); | ||
246 | } | ||
247 | |||
220 | /* | 248 | /* |
221 | * This domain is a statically identity mapping domain. | 249 | * This domain is a statically identity mapping domain. |
222 | * 1. This domain creats a static 1:1 mapping to all usable memory. | 250 | * 1. This domain creats a static 1:1 mapping to all usable memory. |
@@ -244,7 +272,6 @@ struct dmar_domain { | |||
244 | struct iova_domain iovad; /* iova's that belong to this domain */ | 272 | struct iova_domain iovad; /* iova's that belong to this domain */ |
245 | 273 | ||
246 | struct dma_pte *pgd; /* virtual address */ | 274 | struct dma_pte *pgd; /* virtual address */ |
247 | spinlock_t mapping_lock; /* page table lock */ | ||
248 | int gaw; /* max guest address width */ | 275 | int gaw; /* max guest address width */ |
249 | 276 | ||
250 | /* adjusted guest address width, 0 is level 2 30-bit */ | 277 | /* adjusted guest address width, 0 is level 2 30-bit */ |
@@ -648,80 +675,78 @@ static inline int width_to_agaw(int width) | |||
648 | 675 | ||
649 | static inline unsigned int level_to_offset_bits(int level) | 676 | static inline unsigned int level_to_offset_bits(int level) |
650 | { | 677 | { |
651 | return (12 + (level - 1) * LEVEL_STRIDE); | 678 | return (level - 1) * LEVEL_STRIDE; |
652 | } | 679 | } |
653 | 680 | ||
654 | static inline int address_level_offset(u64 addr, int level) | 681 | static inline int pfn_level_offset(unsigned long pfn, int level) |
655 | { | 682 | { |
656 | return ((addr >> level_to_offset_bits(level)) & LEVEL_MASK); | 683 | return (pfn >> level_to_offset_bits(level)) & LEVEL_MASK; |
657 | } | 684 | } |
658 | 685 | ||
659 | static inline u64 level_mask(int level) | 686 | static inline unsigned long level_mask(int level) |
660 | { | 687 | { |
661 | return ((u64)-1 << level_to_offset_bits(level)); | 688 | return -1UL << level_to_offset_bits(level); |
662 | } | 689 | } |
663 | 690 | ||
664 | static inline u64 level_size(int level) | 691 | static inline unsigned long level_size(int level) |
665 | { | 692 | { |
666 | return ((u64)1 << level_to_offset_bits(level)); | 693 | return 1UL << level_to_offset_bits(level); |
667 | } | 694 | } |
668 | 695 | ||
669 | static inline u64 align_to_level(u64 addr, int level) | 696 | static inline unsigned long align_to_level(unsigned long pfn, int level) |
670 | { | 697 | { |
671 | return ((addr + level_size(level) - 1) & level_mask(level)); | 698 | return (pfn + level_size(level) - 1) & level_mask(level); |
672 | } | 699 | } |
673 | 700 | ||
674 | static struct dma_pte * addr_to_dma_pte(struct dmar_domain *domain, u64 addr) | 701 | static struct dma_pte *pfn_to_dma_pte(struct dmar_domain *domain, |
702 | unsigned long pfn) | ||
675 | { | 703 | { |
676 | int addr_width = agaw_to_width(domain->agaw); | 704 | int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; |
677 | struct dma_pte *parent, *pte = NULL; | 705 | struct dma_pte *parent, *pte = NULL; |
678 | int level = agaw_to_level(domain->agaw); | 706 | int level = agaw_to_level(domain->agaw); |
679 | int offset; | 707 | int offset; |
680 | unsigned long flags; | ||
681 | 708 | ||
682 | BUG_ON(!domain->pgd); | 709 | BUG_ON(!domain->pgd); |
683 | 710 | BUG_ON(addr_width < BITS_PER_LONG && pfn >> addr_width); | |
684 | addr &= (((u64)1) << addr_width) - 1; | ||
685 | parent = domain->pgd; | 711 | parent = domain->pgd; |
686 | 712 | ||
687 | spin_lock_irqsave(&domain->mapping_lock, flags); | ||
688 | while (level > 0) { | 713 | while (level > 0) { |
689 | void *tmp_page; | 714 | void *tmp_page; |
690 | 715 | ||
691 | offset = address_level_offset(addr, level); | 716 | offset = pfn_level_offset(pfn, level); |
692 | pte = &parent[offset]; | 717 | pte = &parent[offset]; |
693 | if (level == 1) | 718 | if (level == 1) |
694 | break; | 719 | break; |
695 | 720 | ||
696 | if (!dma_pte_present(pte)) { | 721 | if (!dma_pte_present(pte)) { |
722 | uint64_t pteval; | ||
723 | |||
697 | tmp_page = alloc_pgtable_page(); | 724 | tmp_page = alloc_pgtable_page(); |
698 | 725 | ||
699 | if (!tmp_page) { | 726 | if (!tmp_page) |
700 | spin_unlock_irqrestore(&domain->mapping_lock, | ||
701 | flags); | ||
702 | return NULL; | 727 | return NULL; |
728 | |||
729 | domain_flush_cache(domain, tmp_page, VTD_PAGE_SIZE); | ||
730 | pteval = (virt_to_dma_pfn(tmp_page) << VTD_PAGE_SHIFT) | DMA_PTE_READ | DMA_PTE_WRITE; | ||
731 | if (cmpxchg64(&pte->val, 0ULL, pteval)) { | ||
732 | /* Someone else set it while we were thinking; use theirs. */ | ||
733 | free_pgtable_page(tmp_page); | ||
734 | } else { | ||
735 | dma_pte_addr(pte); | ||
736 | domain_flush_cache(domain, pte, sizeof(*pte)); | ||
703 | } | 737 | } |
704 | domain_flush_cache(domain, tmp_page, PAGE_SIZE); | ||
705 | dma_set_pte_addr(pte, virt_to_phys(tmp_page)); | ||
706 | /* | ||
707 | * high level table always sets r/w, last level page | ||
708 | * table control read/write | ||
709 | */ | ||
710 | dma_set_pte_readable(pte); | ||
711 | dma_set_pte_writable(pte); | ||
712 | domain_flush_cache(domain, pte, sizeof(*pte)); | ||
713 | } | 738 | } |
714 | parent = phys_to_virt(dma_pte_addr(pte)); | 739 | parent = phys_to_virt(dma_pte_addr(pte)); |
715 | level--; | 740 | level--; |
716 | } | 741 | } |
717 | 742 | ||
718 | spin_unlock_irqrestore(&domain->mapping_lock, flags); | ||
719 | return pte; | 743 | return pte; |
720 | } | 744 | } |
721 | 745 | ||
722 | /* return address's pte at specific level */ | 746 | /* return address's pte at specific level */ |
723 | static struct dma_pte *dma_addr_level_pte(struct dmar_domain *domain, u64 addr, | 747 | static struct dma_pte *dma_pfn_level_pte(struct dmar_domain *domain, |
724 | int level) | 748 | unsigned long pfn, |
749 | int level) | ||
725 | { | 750 | { |
726 | struct dma_pte *parent, *pte = NULL; | 751 | struct dma_pte *parent, *pte = NULL; |
727 | int total = agaw_to_level(domain->agaw); | 752 | int total = agaw_to_level(domain->agaw); |
@@ -729,7 +754,7 @@ static struct dma_pte *dma_addr_level_pte(struct dmar_domain *domain, u64 addr, | |||
729 | 754 | ||
730 | parent = domain->pgd; | 755 | parent = domain->pgd; |
731 | while (level <= total) { | 756 | while (level <= total) { |
732 | offset = address_level_offset(addr, total); | 757 | offset = pfn_level_offset(pfn, total); |
733 | pte = &parent[offset]; | 758 | pte = &parent[offset]; |
734 | if (level == total) | 759 | if (level == total) |
735 | return pte; | 760 | return pte; |
@@ -742,74 +767,82 @@ static struct dma_pte *dma_addr_level_pte(struct dmar_domain *domain, u64 addr, | |||
742 | return NULL; | 767 | return NULL; |
743 | } | 768 | } |
744 | 769 | ||
745 | /* clear one page's page table */ | ||
746 | static void dma_pte_clear_one(struct dmar_domain *domain, u64 addr) | ||
747 | { | ||
748 | struct dma_pte *pte = NULL; | ||
749 | |||
750 | /* get last level pte */ | ||
751 | pte = dma_addr_level_pte(domain, addr, 1); | ||
752 | |||
753 | if (pte) { | ||
754 | dma_clear_pte(pte); | ||
755 | domain_flush_cache(domain, pte, sizeof(*pte)); | ||
756 | } | ||
757 | } | ||
758 | |||
759 | /* clear last level pte, a tlb flush should be followed */ | 770 | /* clear last level pte, a tlb flush should be followed */ |
760 | static void dma_pte_clear_range(struct dmar_domain *domain, u64 start, u64 end) | 771 | static void dma_pte_clear_range(struct dmar_domain *domain, |
772 | unsigned long start_pfn, | ||
773 | unsigned long last_pfn) | ||
761 | { | 774 | { |
762 | int addr_width = agaw_to_width(domain->agaw); | 775 | int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; |
763 | int npages; | 776 | struct dma_pte *first_pte, *pte; |
764 | 777 | ||
765 | start &= (((u64)1) << addr_width) - 1; | 778 | BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width); |
766 | end &= (((u64)1) << addr_width) - 1; | 779 | BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width); |
767 | /* in case it's partial page */ | ||
768 | start &= PAGE_MASK; | ||
769 | end = PAGE_ALIGN(end); | ||
770 | npages = (end - start) / VTD_PAGE_SIZE; | ||
771 | 780 | ||
772 | /* we don't need lock here, nobody else touches the iova range */ | 781 | /* we don't need lock here; nobody else touches the iova range */ |
773 | while (npages--) { | 782 | while (start_pfn <= last_pfn) { |
774 | dma_pte_clear_one(domain, start); | 783 | first_pte = pte = dma_pfn_level_pte(domain, start_pfn, 1); |
775 | start += VTD_PAGE_SIZE; | 784 | if (!pte) { |
785 | start_pfn = align_to_level(start_pfn + 1, 2); | ||
786 | continue; | ||
787 | } | ||
788 | do { | ||
789 | dma_clear_pte(pte); | ||
790 | start_pfn++; | ||
791 | pte++; | ||
792 | } while (start_pfn <= last_pfn && !first_pte_in_page(pte)); | ||
793 | |||
794 | domain_flush_cache(domain, first_pte, | ||
795 | (void *)pte - (void *)first_pte); | ||
776 | } | 796 | } |
777 | } | 797 | } |
778 | 798 | ||
779 | /* free page table pages. last level pte should already be cleared */ | 799 | /* free page table pages. last level pte should already be cleared */ |
780 | static void dma_pte_free_pagetable(struct dmar_domain *domain, | 800 | static void dma_pte_free_pagetable(struct dmar_domain *domain, |
781 | u64 start, u64 end) | 801 | unsigned long start_pfn, |
802 | unsigned long last_pfn) | ||
782 | { | 803 | { |
783 | int addr_width = agaw_to_width(domain->agaw); | 804 | int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; |
784 | struct dma_pte *pte; | 805 | struct dma_pte *first_pte, *pte; |
785 | int total = agaw_to_level(domain->agaw); | 806 | int total = agaw_to_level(domain->agaw); |
786 | int level; | 807 | int level; |
787 | u64 tmp; | 808 | unsigned long tmp; |
788 | 809 | ||
789 | start &= (((u64)1) << addr_width) - 1; | 810 | BUG_ON(addr_width < BITS_PER_LONG && start_pfn >> addr_width); |
790 | end &= (((u64)1) << addr_width) - 1; | 811 | BUG_ON(addr_width < BITS_PER_LONG && last_pfn >> addr_width); |
791 | 812 | ||
792 | /* we don't need lock here, nobody else touches the iova range */ | 813 | /* We don't need lock here; nobody else touches the iova range */ |
793 | level = 2; | 814 | level = 2; |
794 | while (level <= total) { | 815 | while (level <= total) { |
795 | tmp = align_to_level(start, level); | 816 | tmp = align_to_level(start_pfn, level); |
796 | if (tmp >= end || (tmp + level_size(level) > end)) | 817 | |
818 | /* If we can't even clear one PTE at this level, we're done */ | ||
819 | if (tmp + level_size(level) - 1 > last_pfn) | ||
797 | return; | 820 | return; |
798 | 821 | ||
799 | while (tmp < end) { | 822 | while (tmp + level_size(level) - 1 <= last_pfn) { |
800 | pte = dma_addr_level_pte(domain, tmp, level); | 823 | first_pte = pte = dma_pfn_level_pte(domain, tmp, level); |
801 | if (pte) { | 824 | if (!pte) { |
802 | free_pgtable_page( | 825 | tmp = align_to_level(tmp + 1, level + 1); |
803 | phys_to_virt(dma_pte_addr(pte))); | 826 | continue; |
804 | dma_clear_pte(pte); | ||
805 | domain_flush_cache(domain, pte, sizeof(*pte)); | ||
806 | } | 827 | } |
807 | tmp += level_size(level); | 828 | do { |
829 | if (dma_pte_present(pte)) { | ||
830 | free_pgtable_page(phys_to_virt(dma_pte_addr(pte))); | ||
831 | dma_clear_pte(pte); | ||
832 | } | ||
833 | pte++; | ||
834 | tmp += level_size(level); | ||
835 | } while (!first_pte_in_page(pte) && | ||
836 | tmp + level_size(level) - 1 <= last_pfn); | ||
837 | |||
838 | domain_flush_cache(domain, first_pte, | ||
839 | (void *)pte - (void *)first_pte); | ||
840 | |||
808 | } | 841 | } |
809 | level++; | 842 | level++; |
810 | } | 843 | } |
811 | /* free pgd */ | 844 | /* free pgd */ |
812 | if (start == 0 && end >= ((((u64)1) << addr_width) - 1)) { | 845 | if (start_pfn == 0 && last_pfn == DOMAIN_MAX_PFN(domain->gaw)) { |
813 | free_pgtable_page(domain->pgd); | 846 | free_pgtable_page(domain->pgd); |
814 | domain->pgd = NULL; | 847 | domain->pgd = NULL; |
815 | } | 848 | } |
@@ -1035,11 +1068,11 @@ static void iommu_flush_dev_iotlb(struct dmar_domain *domain, | |||
1035 | } | 1068 | } |
1036 | 1069 | ||
1037 | static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, u16 did, | 1070 | static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, u16 did, |
1038 | u64 addr, unsigned int pages) | 1071 | unsigned long pfn, unsigned int pages) |
1039 | { | 1072 | { |
1040 | unsigned int mask = ilog2(__roundup_pow_of_two(pages)); | 1073 | unsigned int mask = ilog2(__roundup_pow_of_two(pages)); |
1074 | uint64_t addr = (uint64_t)pfn << VTD_PAGE_SHIFT; | ||
1041 | 1075 | ||
1042 | BUG_ON(addr & (~VTD_PAGE_MASK)); | ||
1043 | BUG_ON(pages == 0); | 1076 | BUG_ON(pages == 0); |
1044 | 1077 | ||
1045 | /* | 1078 | /* |
@@ -1054,7 +1087,12 @@ static void iommu_flush_iotlb_psi(struct intel_iommu *iommu, u16 did, | |||
1054 | else | 1087 | else |
1055 | iommu->flush.flush_iotlb(iommu, did, addr, mask, | 1088 | iommu->flush.flush_iotlb(iommu, did, addr, mask, |
1056 | DMA_TLB_PSI_FLUSH); | 1089 | DMA_TLB_PSI_FLUSH); |
1057 | if (did) | 1090 | |
1091 | /* | ||
1092 | * In caching mode, domain ID 0 is reserved for non-present to present | ||
1093 | * mapping flush. Device IOTLB doesn't need to be flushed in this case. | ||
1094 | */ | ||
1095 | if (!cap_caching_mode(iommu->cap) || did) | ||
1058 | iommu_flush_dev_iotlb(iommu->domains[did], addr, mask); | 1096 | iommu_flush_dev_iotlb(iommu->domains[did], addr, mask); |
1059 | } | 1097 | } |
1060 | 1098 | ||
@@ -1279,7 +1317,6 @@ static void dmar_init_reserved_ranges(void) | |||
1279 | struct pci_dev *pdev = NULL; | 1317 | struct pci_dev *pdev = NULL; |
1280 | struct iova *iova; | 1318 | struct iova *iova; |
1281 | int i; | 1319 | int i; |
1282 | u64 addr, size; | ||
1283 | 1320 | ||
1284 | init_iova_domain(&reserved_iova_list, DMA_32BIT_PFN); | 1321 | init_iova_domain(&reserved_iova_list, DMA_32BIT_PFN); |
1285 | 1322 | ||
@@ -1302,12 +1339,9 @@ static void dmar_init_reserved_ranges(void) | |||
1302 | r = &pdev->resource[i]; | 1339 | r = &pdev->resource[i]; |
1303 | if (!r->flags || !(r->flags & IORESOURCE_MEM)) | 1340 | if (!r->flags || !(r->flags & IORESOURCE_MEM)) |
1304 | continue; | 1341 | continue; |
1305 | addr = r->start; | 1342 | iova = reserve_iova(&reserved_iova_list, |
1306 | addr &= PHYSICAL_PAGE_MASK; | 1343 | IOVA_PFN(r->start), |
1307 | size = r->end - addr; | 1344 | IOVA_PFN(r->end)); |
1308 | size = PAGE_ALIGN(size); | ||
1309 | iova = reserve_iova(&reserved_iova_list, IOVA_PFN(addr), | ||
1310 | IOVA_PFN(size + addr) - 1); | ||
1311 | if (!iova) | 1345 | if (!iova) |
1312 | printk(KERN_ERR "Reserve iova failed\n"); | 1346 | printk(KERN_ERR "Reserve iova failed\n"); |
1313 | } | 1347 | } |
@@ -1341,7 +1375,6 @@ static int domain_init(struct dmar_domain *domain, int guest_width) | |||
1341 | unsigned long sagaw; | 1375 | unsigned long sagaw; |
1342 | 1376 | ||
1343 | init_iova_domain(&domain->iovad, DMA_32BIT_PFN); | 1377 | init_iova_domain(&domain->iovad, DMA_32BIT_PFN); |
1344 | spin_lock_init(&domain->mapping_lock); | ||
1345 | spin_lock_init(&domain->iommu_lock); | 1378 | spin_lock_init(&domain->iommu_lock); |
1346 | 1379 | ||
1347 | domain_reserve_special_ranges(domain); | 1380 | domain_reserve_special_ranges(domain); |
@@ -1388,7 +1421,6 @@ static void domain_exit(struct dmar_domain *domain) | |||
1388 | { | 1421 | { |
1389 | struct dmar_drhd_unit *drhd; | 1422 | struct dmar_drhd_unit *drhd; |
1390 | struct intel_iommu *iommu; | 1423 | struct intel_iommu *iommu; |
1391 | u64 end; | ||
1392 | 1424 | ||
1393 | /* Domain 0 is reserved, so dont process it */ | 1425 | /* Domain 0 is reserved, so dont process it */ |
1394 | if (!domain) | 1426 | if (!domain) |
@@ -1397,14 +1429,12 @@ static void domain_exit(struct dmar_domain *domain) | |||
1397 | domain_remove_dev_info(domain); | 1429 | domain_remove_dev_info(domain); |
1398 | /* destroy iovas */ | 1430 | /* destroy iovas */ |
1399 | put_iova_domain(&domain->iovad); | 1431 | put_iova_domain(&domain->iovad); |
1400 | end = DOMAIN_MAX_ADDR(domain->gaw); | ||
1401 | end = end & (~PAGE_MASK); | ||
1402 | 1432 | ||
1403 | /* clear ptes */ | 1433 | /* clear ptes */ |
1404 | dma_pte_clear_range(domain, 0, end); | 1434 | dma_pte_clear_range(domain, 0, DOMAIN_MAX_PFN(domain->gaw)); |
1405 | 1435 | ||
1406 | /* free page tables */ | 1436 | /* free page tables */ |
1407 | dma_pte_free_pagetable(domain, 0, end); | 1437 | dma_pte_free_pagetable(domain, 0, DOMAIN_MAX_PFN(domain->gaw)); |
1408 | 1438 | ||
1409 | for_each_active_iommu(iommu, drhd) | 1439 | for_each_active_iommu(iommu, drhd) |
1410 | if (test_bit(iommu->seq_id, &domain->iommu_bmp)) | 1440 | if (test_bit(iommu->seq_id, &domain->iommu_bmp)) |
@@ -1618,42 +1648,86 @@ static int domain_context_mapped(struct pci_dev *pdev) | |||
1618 | tmp->devfn); | 1648 | tmp->devfn); |
1619 | } | 1649 | } |
1620 | 1650 | ||
1621 | static int | 1651 | static int __domain_mapping(struct dmar_domain *domain, unsigned long iov_pfn, |
1622 | domain_page_mapping(struct dmar_domain *domain, dma_addr_t iova, | 1652 | struct scatterlist *sg, unsigned long phys_pfn, |
1623 | u64 hpa, size_t size, int prot) | 1653 | unsigned long nr_pages, int prot) |
1624 | { | 1654 | { |
1625 | u64 start_pfn, end_pfn; | 1655 | struct dma_pte *first_pte = NULL, *pte = NULL; |
1626 | struct dma_pte *pte; | 1656 | phys_addr_t uninitialized_var(pteval); |
1627 | int index; | 1657 | int addr_width = agaw_to_width(domain->agaw) - VTD_PAGE_SHIFT; |
1628 | int addr_width = agaw_to_width(domain->agaw); | 1658 | unsigned long sg_res; |
1629 | 1659 | ||
1630 | hpa &= (((u64)1) << addr_width) - 1; | 1660 | BUG_ON(addr_width < BITS_PER_LONG && (iov_pfn + nr_pages - 1) >> addr_width); |
1631 | 1661 | ||
1632 | if ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) == 0) | 1662 | if ((prot & (DMA_PTE_READ|DMA_PTE_WRITE)) == 0) |
1633 | return -EINVAL; | 1663 | return -EINVAL; |
1634 | iova &= PAGE_MASK; | 1664 | |
1635 | start_pfn = ((u64)hpa) >> VTD_PAGE_SHIFT; | 1665 | prot &= DMA_PTE_READ | DMA_PTE_WRITE | DMA_PTE_SNP; |
1636 | end_pfn = (VTD_PAGE_ALIGN(((u64)hpa) + size)) >> VTD_PAGE_SHIFT; | 1666 | |
1637 | index = 0; | 1667 | if (sg) |
1638 | while (start_pfn < end_pfn) { | 1668 | sg_res = 0; |
1639 | pte = addr_to_dma_pte(domain, iova + VTD_PAGE_SIZE * index); | 1669 | else { |
1640 | if (!pte) | 1670 | sg_res = nr_pages + 1; |
1641 | return -ENOMEM; | 1671 | pteval = ((phys_addr_t)phys_pfn << VTD_PAGE_SHIFT) | prot; |
1672 | } | ||
1673 | |||
1674 | while (nr_pages--) { | ||
1675 | uint64_t tmp; | ||
1676 | |||
1677 | if (!sg_res) { | ||
1678 | sg_res = (sg->offset + sg->length + VTD_PAGE_SIZE - 1) >> VTD_PAGE_SHIFT; | ||
1679 | sg->dma_address = ((dma_addr_t)iov_pfn << VTD_PAGE_SHIFT) + sg->offset; | ||
1680 | sg->dma_length = sg->length; | ||
1681 | pteval = page_to_phys(sg_page(sg)) | prot; | ||
1682 | } | ||
1683 | if (!pte) { | ||
1684 | first_pte = pte = pfn_to_dma_pte(domain, iov_pfn); | ||
1685 | if (!pte) | ||
1686 | return -ENOMEM; | ||
1687 | } | ||
1642 | /* We don't need lock here, nobody else | 1688 | /* We don't need lock here, nobody else |
1643 | * touches the iova range | 1689 | * touches the iova range |
1644 | */ | 1690 | */ |
1645 | BUG_ON(dma_pte_addr(pte)); | 1691 | tmp = cmpxchg64_local(&pte->val, 0ULL, pteval); |
1646 | dma_set_pte_addr(pte, start_pfn << VTD_PAGE_SHIFT); | 1692 | if (tmp) { |
1647 | dma_set_pte_prot(pte, prot); | 1693 | static int dumps = 5; |
1648 | if (prot & DMA_PTE_SNP) | 1694 | printk(KERN_CRIT "ERROR: DMA PTE for vPFN 0x%lx already set (to %llx not %llx)\n", |
1649 | dma_set_pte_snp(pte); | 1695 | iov_pfn, tmp, (unsigned long long)pteval); |
1650 | domain_flush_cache(domain, pte, sizeof(*pte)); | 1696 | if (dumps) { |
1651 | start_pfn++; | 1697 | dumps--; |
1652 | index++; | 1698 | debug_dma_dump_mappings(NULL); |
1699 | } | ||
1700 | WARN_ON(1); | ||
1701 | } | ||
1702 | pte++; | ||
1703 | if (!nr_pages || first_pte_in_page(pte)) { | ||
1704 | domain_flush_cache(domain, first_pte, | ||
1705 | (void *)pte - (void *)first_pte); | ||
1706 | pte = NULL; | ||
1707 | } | ||
1708 | iov_pfn++; | ||
1709 | pteval += VTD_PAGE_SIZE; | ||
1710 | sg_res--; | ||
1711 | if (!sg_res) | ||
1712 | sg = sg_next(sg); | ||
1653 | } | 1713 | } |
1654 | return 0; | 1714 | return 0; |
1655 | } | 1715 | } |
1656 | 1716 | ||
1717 | static inline int domain_sg_mapping(struct dmar_domain *domain, unsigned long iov_pfn, | ||
1718 | struct scatterlist *sg, unsigned long nr_pages, | ||
1719 | int prot) | ||
1720 | { | ||
1721 | return __domain_mapping(domain, iov_pfn, sg, 0, nr_pages, prot); | ||
1722 | } | ||
1723 | |||
1724 | static inline int domain_pfn_mapping(struct dmar_domain *domain, unsigned long iov_pfn, | ||
1725 | unsigned long phys_pfn, unsigned long nr_pages, | ||
1726 | int prot) | ||
1727 | { | ||
1728 | return __domain_mapping(domain, iov_pfn, NULL, phys_pfn, nr_pages, prot); | ||
1729 | } | ||
1730 | |||
1657 | static void iommu_detach_dev(struct intel_iommu *iommu, u8 bus, u8 devfn) | 1731 | static void iommu_detach_dev(struct intel_iommu *iommu, u8 bus, u8 devfn) |
1658 | { | 1732 | { |
1659 | if (!iommu) | 1733 | if (!iommu) |
@@ -1844,58 +1918,61 @@ error: | |||
1844 | 1918 | ||
1845 | static int iommu_identity_mapping; | 1919 | static int iommu_identity_mapping; |
1846 | 1920 | ||
1921 | static int iommu_domain_identity_map(struct dmar_domain *domain, | ||
1922 | unsigned long long start, | ||
1923 | unsigned long long end) | ||
1924 | { | ||
1925 | unsigned long first_vpfn = start >> VTD_PAGE_SHIFT; | ||
1926 | unsigned long last_vpfn = end >> VTD_PAGE_SHIFT; | ||
1927 | |||
1928 | if (!reserve_iova(&domain->iovad, dma_to_mm_pfn(first_vpfn), | ||
1929 | dma_to_mm_pfn(last_vpfn))) { | ||
1930 | printk(KERN_ERR "IOMMU: reserve iova failed\n"); | ||
1931 | return -ENOMEM; | ||
1932 | } | ||
1933 | |||
1934 | pr_debug("Mapping reserved region %llx-%llx for domain %d\n", | ||
1935 | start, end, domain->id); | ||
1936 | /* | ||
1937 | * RMRR range might have overlap with physical memory range, | ||
1938 | * clear it first | ||
1939 | */ | ||
1940 | dma_pte_clear_range(domain, first_vpfn, last_vpfn); | ||
1941 | |||
1942 | return domain_pfn_mapping(domain, first_vpfn, first_vpfn, | ||
1943 | last_vpfn - first_vpfn + 1, | ||
1944 | DMA_PTE_READ|DMA_PTE_WRITE); | ||
1945 | } | ||
1946 | |||
1847 | static int iommu_prepare_identity_map(struct pci_dev *pdev, | 1947 | static int iommu_prepare_identity_map(struct pci_dev *pdev, |
1848 | unsigned long long start, | 1948 | unsigned long long start, |
1849 | unsigned long long end) | 1949 | unsigned long long end) |
1850 | { | 1950 | { |
1851 | struct dmar_domain *domain; | 1951 | struct dmar_domain *domain; |
1852 | unsigned long size; | ||
1853 | unsigned long long base; | ||
1854 | int ret; | 1952 | int ret; |
1855 | 1953 | ||
1856 | printk(KERN_INFO | 1954 | printk(KERN_INFO |
1857 | "IOMMU: Setting identity map for device %s [0x%Lx - 0x%Lx]\n", | 1955 | "IOMMU: Setting identity map for device %s [0x%Lx - 0x%Lx]\n", |
1858 | pci_name(pdev), start, end); | 1956 | pci_name(pdev), start, end); |
1859 | if (iommu_identity_mapping) | 1957 | |
1860 | domain = si_domain; | 1958 | domain = get_domain_for_dev(pdev, DEFAULT_DOMAIN_ADDRESS_WIDTH); |
1861 | else | ||
1862 | /* page table init */ | ||
1863 | domain = get_domain_for_dev(pdev, DEFAULT_DOMAIN_ADDRESS_WIDTH); | ||
1864 | if (!domain) | 1959 | if (!domain) |
1865 | return -ENOMEM; | 1960 | return -ENOMEM; |
1866 | 1961 | ||
1867 | /* The address might not be aligned */ | 1962 | ret = iommu_domain_identity_map(domain, start, end); |
1868 | base = start & PAGE_MASK; | ||
1869 | size = end - base; | ||
1870 | size = PAGE_ALIGN(size); | ||
1871 | if (!reserve_iova(&domain->iovad, IOVA_PFN(base), | ||
1872 | IOVA_PFN(base + size) - 1)) { | ||
1873 | printk(KERN_ERR "IOMMU: reserve iova failed\n"); | ||
1874 | ret = -ENOMEM; | ||
1875 | goto error; | ||
1876 | } | ||
1877 | |||
1878 | pr_debug("Mapping reserved region %lx@%llx for %s\n", | ||
1879 | size, base, pci_name(pdev)); | ||
1880 | /* | ||
1881 | * RMRR range might have overlap with physical memory range, | ||
1882 | * clear it first | ||
1883 | */ | ||
1884 | dma_pte_clear_range(domain, base, base + size); | ||
1885 | |||
1886 | ret = domain_page_mapping(domain, base, base, size, | ||
1887 | DMA_PTE_READ|DMA_PTE_WRITE); | ||
1888 | if (ret) | 1963 | if (ret) |
1889 | goto error; | 1964 | goto error; |
1890 | 1965 | ||
1891 | /* context entry init */ | 1966 | /* context entry init */ |
1892 | ret = domain_context_mapping(domain, pdev, CONTEXT_TT_MULTI_LEVEL); | 1967 | ret = domain_context_mapping(domain, pdev, CONTEXT_TT_MULTI_LEVEL); |
1893 | if (!ret) | 1968 | if (ret) |
1894 | return 0; | 1969 | goto error; |
1895 | error: | 1970 | |
1971 | return 0; | ||
1972 | |||
1973 | error: | ||
1896 | domain_exit(domain); | 1974 | domain_exit(domain); |
1897 | return ret; | 1975 | return ret; |
1898 | |||
1899 | } | 1976 | } |
1900 | 1977 | ||
1901 | static inline int iommu_prepare_rmrr_dev(struct dmar_rmrr_unit *rmrr, | 1978 | static inline int iommu_prepare_rmrr_dev(struct dmar_rmrr_unit *rmrr, |
@@ -1907,64 +1984,6 @@ static inline int iommu_prepare_rmrr_dev(struct dmar_rmrr_unit *rmrr, | |||
1907 | rmrr->end_address + 1); | 1984 | rmrr->end_address + 1); |
1908 | } | 1985 | } |
1909 | 1986 | ||
1910 | struct iommu_prepare_data { | ||
1911 | struct pci_dev *pdev; | ||
1912 | int ret; | ||
1913 | }; | ||
1914 | |||
1915 | static int __init iommu_prepare_work_fn(unsigned long start_pfn, | ||
1916 | unsigned long end_pfn, void *datax) | ||
1917 | { | ||
1918 | struct iommu_prepare_data *data; | ||
1919 | |||
1920 | data = (struct iommu_prepare_data *)datax; | ||
1921 | |||
1922 | data->ret = iommu_prepare_identity_map(data->pdev, | ||
1923 | start_pfn<<PAGE_SHIFT, end_pfn<<PAGE_SHIFT); | ||
1924 | return data->ret; | ||
1925 | |||
1926 | } | ||
1927 | |||
1928 | static int __init iommu_prepare_with_active_regions(struct pci_dev *pdev) | ||
1929 | { | ||
1930 | int nid; | ||
1931 | struct iommu_prepare_data data; | ||
1932 | |||
1933 | data.pdev = pdev; | ||
1934 | data.ret = 0; | ||
1935 | |||
1936 | for_each_online_node(nid) { | ||
1937 | work_with_active_regions(nid, iommu_prepare_work_fn, &data); | ||
1938 | if (data.ret) | ||
1939 | return data.ret; | ||
1940 | } | ||
1941 | return data.ret; | ||
1942 | } | ||
1943 | |||
1944 | #ifdef CONFIG_DMAR_GFX_WA | ||
1945 | static void __init iommu_prepare_gfx_mapping(void) | ||
1946 | { | ||
1947 | struct pci_dev *pdev = NULL; | ||
1948 | int ret; | ||
1949 | |||
1950 | for_each_pci_dev(pdev) { | ||
1951 | if (pdev->dev.archdata.iommu == DUMMY_DEVICE_DOMAIN_INFO || | ||
1952 | !IS_GFX_DEVICE(pdev)) | ||
1953 | continue; | ||
1954 | printk(KERN_INFO "IOMMU: gfx device %s 1-1 mapping\n", | ||
1955 | pci_name(pdev)); | ||
1956 | ret = iommu_prepare_with_active_regions(pdev); | ||
1957 | if (ret) | ||
1958 | printk(KERN_ERR "IOMMU: mapping reserved region failed\n"); | ||
1959 | } | ||
1960 | } | ||
1961 | #else /* !CONFIG_DMAR_GFX_WA */ | ||
1962 | static inline void iommu_prepare_gfx_mapping(void) | ||
1963 | { | ||
1964 | return; | ||
1965 | } | ||
1966 | #endif | ||
1967 | |||
1968 | #ifdef CONFIG_DMAR_FLOPPY_WA | 1987 | #ifdef CONFIG_DMAR_FLOPPY_WA |
1969 | static inline void iommu_prepare_isa(void) | 1988 | static inline void iommu_prepare_isa(void) |
1970 | { | 1989 | { |
@@ -1975,12 +1994,12 @@ static inline void iommu_prepare_isa(void) | |||
1975 | if (!pdev) | 1994 | if (!pdev) |
1976 | return; | 1995 | return; |
1977 | 1996 | ||
1978 | printk(KERN_INFO "IOMMU: Prepare 0-16M unity mapping for LPC\n"); | 1997 | printk(KERN_INFO "IOMMU: Prepare 0-16MiB unity mapping for LPC\n"); |
1979 | ret = iommu_prepare_identity_map(pdev, 0, 16*1024*1024); | 1998 | ret = iommu_prepare_identity_map(pdev, 0, 16*1024*1024); |
1980 | 1999 | ||
1981 | if (ret) | 2000 | if (ret) |
1982 | printk(KERN_ERR "IOMMU: Failed to create 0-64M identity map, " | 2001 | printk(KERN_ERR "IOMMU: Failed to create 0-16MiB identity map; " |
1983 | "floppy might not work\n"); | 2002 | "floppy might not work\n"); |
1984 | 2003 | ||
1985 | } | 2004 | } |
1986 | #else | 2005 | #else |
@@ -2008,16 +2027,30 @@ static int __init init_context_pass_through(void) | |||
2008 | } | 2027 | } |
2009 | 2028 | ||
2010 | static int md_domain_init(struct dmar_domain *domain, int guest_width); | 2029 | static int md_domain_init(struct dmar_domain *domain, int guest_width); |
2030 | |||
2031 | static int __init si_domain_work_fn(unsigned long start_pfn, | ||
2032 | unsigned long end_pfn, void *datax) | ||
2033 | { | ||
2034 | int *ret = datax; | ||
2035 | |||
2036 | *ret = iommu_domain_identity_map(si_domain, | ||
2037 | (uint64_t)start_pfn << PAGE_SHIFT, | ||
2038 | (uint64_t)end_pfn << PAGE_SHIFT); | ||
2039 | return *ret; | ||
2040 | |||
2041 | } | ||
2042 | |||
2011 | static int si_domain_init(void) | 2043 | static int si_domain_init(void) |
2012 | { | 2044 | { |
2013 | struct dmar_drhd_unit *drhd; | 2045 | struct dmar_drhd_unit *drhd; |
2014 | struct intel_iommu *iommu; | 2046 | struct intel_iommu *iommu; |
2015 | int ret = 0; | 2047 | int nid, ret = 0; |
2016 | 2048 | ||
2017 | si_domain = alloc_domain(); | 2049 | si_domain = alloc_domain(); |
2018 | if (!si_domain) | 2050 | if (!si_domain) |
2019 | return -EFAULT; | 2051 | return -EFAULT; |
2020 | 2052 | ||
2053 | pr_debug("Identity mapping domain is domain %d\n", si_domain->id); | ||
2021 | 2054 | ||
2022 | for_each_active_iommu(iommu, drhd) { | 2055 | for_each_active_iommu(iommu, drhd) { |
2023 | ret = iommu_attach_domain(si_domain, iommu); | 2056 | ret = iommu_attach_domain(si_domain, iommu); |
@@ -2034,6 +2067,12 @@ static int si_domain_init(void) | |||
2034 | 2067 | ||
2035 | si_domain->flags = DOMAIN_FLAG_STATIC_IDENTITY; | 2068 | si_domain->flags = DOMAIN_FLAG_STATIC_IDENTITY; |
2036 | 2069 | ||
2070 | for_each_online_node(nid) { | ||
2071 | work_with_active_regions(nid, si_domain_work_fn, &ret); | ||
2072 | if (ret) | ||
2073 | return ret; | ||
2074 | } | ||
2075 | |||
2037 | return 0; | 2076 | return 0; |
2038 | } | 2077 | } |
2039 | 2078 | ||
@@ -2078,6 +2117,47 @@ static int domain_add_dev_info(struct dmar_domain *domain, | |||
2078 | return 0; | 2117 | return 0; |
2079 | } | 2118 | } |
2080 | 2119 | ||
2120 | static int iommu_should_identity_map(struct pci_dev *pdev, int startup) | ||
2121 | { | ||
2122 | if (iommu_identity_mapping == 2) | ||
2123 | return IS_GFX_DEVICE(pdev); | ||
2124 | |||
2125 | /* | ||
2126 | * We want to start off with all devices in the 1:1 domain, and | ||
2127 | * take them out later if we find they can't access all of memory. | ||
2128 | * | ||
2129 | * However, we can't do this for PCI devices behind bridges, | ||
2130 | * because all PCI devices behind the same bridge will end up | ||
2131 | * with the same source-id on their transactions. | ||
2132 | * | ||
2133 | * Practically speaking, we can't change things around for these | ||
2134 | * devices at run-time, because we can't be sure there'll be no | ||
2135 | * DMA transactions in flight for any of their siblings. | ||
2136 | * | ||
2137 | * So PCI devices (unless they're on the root bus) as well as | ||
2138 | * their parent PCI-PCI or PCIe-PCI bridges must be left _out_ of | ||
2139 | * the 1:1 domain, just in _case_ one of their siblings turns out | ||
2140 | * not to be able to map all of memory. | ||
2141 | */ | ||
2142 | if (!pdev->is_pcie) { | ||
2143 | if (!pci_is_root_bus(pdev->bus)) | ||
2144 | return 0; | ||
2145 | if (pdev->class >> 8 == PCI_CLASS_BRIDGE_PCI) | ||
2146 | return 0; | ||
2147 | } else if (pdev->pcie_type == PCI_EXP_TYPE_PCI_BRIDGE) | ||
2148 | return 0; | ||
2149 | |||
2150 | /* | ||
2151 | * At boot time, we don't yet know if devices will be 64-bit capable. | ||
2152 | * Assume that they will -- if they turn out not to be, then we can | ||
2153 | * take them out of the 1:1 domain later. | ||
2154 | */ | ||
2155 | if (!startup) | ||
2156 | return pdev->dma_mask > DMA_BIT_MASK(32); | ||
2157 | |||
2158 | return 1; | ||
2159 | } | ||
2160 | |||
2081 | static int iommu_prepare_static_identity_mapping(void) | 2161 | static int iommu_prepare_static_identity_mapping(void) |
2082 | { | 2162 | { |
2083 | struct pci_dev *pdev = NULL; | 2163 | struct pci_dev *pdev = NULL; |
@@ -2087,16 +2167,19 @@ static int iommu_prepare_static_identity_mapping(void) | |||
2087 | if (ret) | 2167 | if (ret) |
2088 | return -EFAULT; | 2168 | return -EFAULT; |
2089 | 2169 | ||
2090 | printk(KERN_INFO "IOMMU: Setting identity map:\n"); | ||
2091 | for_each_pci_dev(pdev) { | 2170 | for_each_pci_dev(pdev) { |
2092 | ret = iommu_prepare_with_active_regions(pdev); | 2171 | if (iommu_should_identity_map(pdev, 1)) { |
2093 | if (ret) { | 2172 | printk(KERN_INFO "IOMMU: identity mapping for device %s\n", |
2094 | printk(KERN_INFO "1:1 mapping to one domain failed.\n"); | 2173 | pci_name(pdev)); |
2095 | return -EFAULT; | 2174 | |
2175 | ret = domain_context_mapping(si_domain, pdev, | ||
2176 | CONTEXT_TT_MULTI_LEVEL); | ||
2177 | if (ret) | ||
2178 | return ret; | ||
2179 | ret = domain_add_dev_info(si_domain, pdev); | ||
2180 | if (ret) | ||
2181 | return ret; | ||
2096 | } | 2182 | } |
2097 | ret = domain_add_dev_info(si_domain, pdev); | ||
2098 | if (ret) | ||
2099 | return ret; | ||
2100 | } | 2183 | } |
2101 | 2184 | ||
2102 | return 0; | 2185 | return 0; |
@@ -2251,6 +2334,10 @@ int __init init_dmars(void) | |||
2251 | * identity mapping if iommu_identity_mapping is set. | 2334 | * identity mapping if iommu_identity_mapping is set. |
2252 | */ | 2335 | */ |
2253 | if (!iommu_pass_through) { | 2336 | if (!iommu_pass_through) { |
2337 | #ifdef CONFIG_DMAR_BROKEN_GFX_WA | ||
2338 | if (!iommu_identity_mapping) | ||
2339 | iommu_identity_mapping = 2; | ||
2340 | #endif | ||
2254 | if (iommu_identity_mapping) | 2341 | if (iommu_identity_mapping) |
2255 | iommu_prepare_static_identity_mapping(); | 2342 | iommu_prepare_static_identity_mapping(); |
2256 | /* | 2343 | /* |
@@ -2284,8 +2371,6 @@ int __init init_dmars(void) | |||
2284 | } | 2371 | } |
2285 | } | 2372 | } |
2286 | 2373 | ||
2287 | iommu_prepare_gfx_mapping(); | ||
2288 | |||
2289 | iommu_prepare_isa(); | 2374 | iommu_prepare_isa(); |
2290 | } | 2375 | } |
2291 | 2376 | ||
@@ -2330,50 +2415,40 @@ error: | |||
2330 | return ret; | 2415 | return ret; |
2331 | } | 2416 | } |
2332 | 2417 | ||
2333 | static inline u64 aligned_size(u64 host_addr, size_t size) | 2418 | /* Returns a number of VTD pages, but aligned to MM page size */ |
2334 | { | 2419 | static inline unsigned long aligned_nrpages(unsigned long host_addr, |
2335 | u64 addr; | 2420 | size_t size) |
2336 | addr = (host_addr & (~PAGE_MASK)) + size; | ||
2337 | return PAGE_ALIGN(addr); | ||
2338 | } | ||
2339 | |||
2340 | struct iova * | ||
2341 | iommu_alloc_iova(struct dmar_domain *domain, size_t size, u64 end) | ||
2342 | { | 2421 | { |
2343 | struct iova *piova; | 2422 | host_addr &= ~PAGE_MASK; |
2344 | 2423 | return PAGE_ALIGN(host_addr + size) >> VTD_PAGE_SHIFT; | |
2345 | /* Make sure it's in range */ | ||
2346 | end = min_t(u64, DOMAIN_MAX_ADDR(domain->gaw), end); | ||
2347 | if (!size || (IOVA_START_ADDR + size > end)) | ||
2348 | return NULL; | ||
2349 | |||
2350 | piova = alloc_iova(&domain->iovad, | ||
2351 | size >> PAGE_SHIFT, IOVA_PFN(end), 1); | ||
2352 | return piova; | ||
2353 | } | 2424 | } |
2354 | 2425 | ||
2355 | static struct iova * | 2426 | /* This takes a number of _MM_ pages, not VTD pages */ |
2356 | __intel_alloc_iova(struct device *dev, struct dmar_domain *domain, | 2427 | static struct iova *intel_alloc_iova(struct device *dev, |
2357 | size_t size, u64 dma_mask) | 2428 | struct dmar_domain *domain, |
2429 | unsigned long nrpages, uint64_t dma_mask) | ||
2358 | { | 2430 | { |
2359 | struct pci_dev *pdev = to_pci_dev(dev); | 2431 | struct pci_dev *pdev = to_pci_dev(dev); |
2360 | struct iova *iova = NULL; | 2432 | struct iova *iova = NULL; |
2361 | 2433 | ||
2362 | if (dma_mask <= DMA_BIT_MASK(32) || dmar_forcedac) | 2434 | /* Restrict dma_mask to the width that the iommu can handle */ |
2363 | iova = iommu_alloc_iova(domain, size, dma_mask); | 2435 | dma_mask = min_t(uint64_t, DOMAIN_MAX_ADDR(domain->gaw), dma_mask); |
2364 | else { | 2436 | |
2437 | if (!dmar_forcedac && dma_mask > DMA_BIT_MASK(32)) { | ||
2365 | /* | 2438 | /* |
2366 | * First try to allocate an io virtual address in | 2439 | * First try to allocate an io virtual address in |
2367 | * DMA_BIT_MASK(32) and if that fails then try allocating | 2440 | * DMA_BIT_MASK(32) and if that fails then try allocating |
2368 | * from higher range | 2441 | * from higher range |
2369 | */ | 2442 | */ |
2370 | iova = iommu_alloc_iova(domain, size, DMA_BIT_MASK(32)); | 2443 | iova = alloc_iova(&domain->iovad, nrpages, |
2371 | if (!iova) | 2444 | IOVA_PFN(DMA_BIT_MASK(32)), 1); |
2372 | iova = iommu_alloc_iova(domain, size, dma_mask); | 2445 | if (iova) |
2373 | } | 2446 | return iova; |
2374 | 2447 | } | |
2375 | if (!iova) { | 2448 | iova = alloc_iova(&domain->iovad, nrpages, IOVA_PFN(dma_mask), 1); |
2376 | printk(KERN_ERR"Allocating iova for %s failed", pci_name(pdev)); | 2449 | if (unlikely(!iova)) { |
2450 | printk(KERN_ERR "Allocating %ld-page iova for %s failed", | ||
2451 | nrpages, pci_name(pdev)); | ||
2377 | return NULL; | 2452 | return NULL; |
2378 | } | 2453 | } |
2379 | 2454 | ||
@@ -2415,16 +2490,24 @@ static int iommu_dummy(struct pci_dev *pdev) | |||
2415 | } | 2490 | } |
2416 | 2491 | ||
2417 | /* Check if the pdev needs to go through non-identity map and unmap process.*/ | 2492 | /* Check if the pdev needs to go through non-identity map and unmap process.*/ |
2418 | static int iommu_no_mapping(struct pci_dev *pdev) | 2493 | static int iommu_no_mapping(struct device *dev) |
2419 | { | 2494 | { |
2495 | struct pci_dev *pdev; | ||
2420 | int found; | 2496 | int found; |
2421 | 2497 | ||
2498 | if (unlikely(dev->bus != &pci_bus_type)) | ||
2499 | return 1; | ||
2500 | |||
2501 | pdev = to_pci_dev(dev); | ||
2502 | if (iommu_dummy(pdev)) | ||
2503 | return 1; | ||
2504 | |||
2422 | if (!iommu_identity_mapping) | 2505 | if (!iommu_identity_mapping) |
2423 | return iommu_dummy(pdev); | 2506 | return 0; |
2424 | 2507 | ||
2425 | found = identity_mapping(pdev); | 2508 | found = identity_mapping(pdev); |
2426 | if (found) { | 2509 | if (found) { |
2427 | if (pdev->dma_mask > DMA_BIT_MASK(32)) | 2510 | if (iommu_should_identity_map(pdev, 0)) |
2428 | return 1; | 2511 | return 1; |
2429 | else { | 2512 | else { |
2430 | /* | 2513 | /* |
@@ -2441,9 +2524,12 @@ static int iommu_no_mapping(struct pci_dev *pdev) | |||
2441 | * In case of a detached 64 bit DMA device from vm, the device | 2524 | * In case of a detached 64 bit DMA device from vm, the device |
2442 | * is put into si_domain for identity mapping. | 2525 | * is put into si_domain for identity mapping. |
2443 | */ | 2526 | */ |
2444 | if (pdev->dma_mask > DMA_BIT_MASK(32)) { | 2527 | if (iommu_should_identity_map(pdev, 0)) { |
2445 | int ret; | 2528 | int ret; |
2446 | ret = domain_add_dev_info(si_domain, pdev); | 2529 | ret = domain_add_dev_info(si_domain, pdev); |
2530 | if (ret) | ||
2531 | return 0; | ||
2532 | ret = domain_context_mapping(si_domain, pdev, CONTEXT_TT_MULTI_LEVEL); | ||
2447 | if (!ret) { | 2533 | if (!ret) { |
2448 | printk(KERN_INFO "64bit %s uses identity mapping\n", | 2534 | printk(KERN_INFO "64bit %s uses identity mapping\n", |
2449 | pci_name(pdev)); | 2535 | pci_name(pdev)); |
@@ -2452,7 +2538,7 @@ static int iommu_no_mapping(struct pci_dev *pdev) | |||
2452 | } | 2538 | } |
2453 | } | 2539 | } |
2454 | 2540 | ||
2455 | return iommu_dummy(pdev); | 2541 | return 0; |
2456 | } | 2542 | } |
2457 | 2543 | ||
2458 | static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr, | 2544 | static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr, |
@@ -2468,7 +2554,7 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr, | |||
2468 | 2554 | ||
2469 | BUG_ON(dir == DMA_NONE); | 2555 | BUG_ON(dir == DMA_NONE); |
2470 | 2556 | ||
2471 | if (iommu_no_mapping(pdev)) | 2557 | if (iommu_no_mapping(hwdev)) |
2472 | return paddr; | 2558 | return paddr; |
2473 | 2559 | ||
2474 | domain = get_valid_domain_for_dev(pdev); | 2560 | domain = get_valid_domain_for_dev(pdev); |
@@ -2476,14 +2562,13 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr, | |||
2476 | return 0; | 2562 | return 0; |
2477 | 2563 | ||
2478 | iommu = domain_get_iommu(domain); | 2564 | iommu = domain_get_iommu(domain); |
2479 | size = aligned_size((u64)paddr, size); | 2565 | size = aligned_nrpages(paddr, size); |
2480 | 2566 | ||
2481 | iova = __intel_alloc_iova(hwdev, domain, size, pdev->dma_mask); | 2567 | iova = intel_alloc_iova(hwdev, domain, dma_to_mm_pfn(size), |
2568 | pdev->dma_mask); | ||
2482 | if (!iova) | 2569 | if (!iova) |
2483 | goto error; | 2570 | goto error; |
2484 | 2571 | ||
2485 | start_paddr = (phys_addr_t)iova->pfn_lo << PAGE_SHIFT; | ||
2486 | |||
2487 | /* | 2572 | /* |
2488 | * Check if DMAR supports zero-length reads on write only | 2573 | * Check if DMAR supports zero-length reads on write only |
2489 | * mappings.. | 2574 | * mappings.. |
@@ -2499,20 +2584,20 @@ static dma_addr_t __intel_map_single(struct device *hwdev, phys_addr_t paddr, | |||
2499 | * might have two guest_addr mapping to the same host paddr, but this | 2584 | * might have two guest_addr mapping to the same host paddr, but this |
2500 | * is not a big problem | 2585 | * is not a big problem |
2501 | */ | 2586 | */ |
2502 | ret = domain_page_mapping(domain, start_paddr, | 2587 | ret = domain_pfn_mapping(domain, mm_to_dma_pfn(iova->pfn_lo), |
2503 | ((u64)paddr) & PHYSICAL_PAGE_MASK, | 2588 | paddr >> VTD_PAGE_SHIFT, size, prot); |
2504 | size, prot); | ||
2505 | if (ret) | 2589 | if (ret) |
2506 | goto error; | 2590 | goto error; |
2507 | 2591 | ||
2508 | /* it's a non-present to present mapping. Only flush if caching mode */ | 2592 | /* it's a non-present to present mapping. Only flush if caching mode */ |
2509 | if (cap_caching_mode(iommu->cap)) | 2593 | if (cap_caching_mode(iommu->cap)) |
2510 | iommu_flush_iotlb_psi(iommu, 0, start_paddr, | 2594 | iommu_flush_iotlb_psi(iommu, 0, mm_to_dma_pfn(iova->pfn_lo), size); |
2511 | size >> VTD_PAGE_SHIFT); | ||
2512 | else | 2595 | else |
2513 | iommu_flush_write_buffer(iommu); | 2596 | iommu_flush_write_buffer(iommu); |
2514 | 2597 | ||
2515 | return start_paddr + ((u64)paddr & (~PAGE_MASK)); | 2598 | start_paddr = (phys_addr_t)iova->pfn_lo << PAGE_SHIFT; |
2599 | start_paddr += paddr & ~PAGE_MASK; | ||
2600 | return start_paddr; | ||
2516 | 2601 | ||
2517 | error: | 2602 | error: |
2518 | if (iova) | 2603 | if (iova) |
@@ -2605,11 +2690,11 @@ static void intel_unmap_page(struct device *dev, dma_addr_t dev_addr, | |||
2605 | { | 2690 | { |
2606 | struct pci_dev *pdev = to_pci_dev(dev); | 2691 | struct pci_dev *pdev = to_pci_dev(dev); |
2607 | struct dmar_domain *domain; | 2692 | struct dmar_domain *domain; |
2608 | unsigned long start_addr; | 2693 | unsigned long start_pfn, last_pfn; |
2609 | struct iova *iova; | 2694 | struct iova *iova; |
2610 | struct intel_iommu *iommu; | 2695 | struct intel_iommu *iommu; |
2611 | 2696 | ||
2612 | if (iommu_no_mapping(pdev)) | 2697 | if (iommu_no_mapping(dev)) |
2613 | return; | 2698 | return; |
2614 | 2699 | ||
2615 | domain = find_domain(pdev); | 2700 | domain = find_domain(pdev); |
@@ -2618,22 +2703,25 @@ static void intel_unmap_page(struct device *dev, dma_addr_t dev_addr, | |||
2618 | iommu = domain_get_iommu(domain); | 2703 | iommu = domain_get_iommu(domain); |
2619 | 2704 | ||
2620 | iova = find_iova(&domain->iovad, IOVA_PFN(dev_addr)); | 2705 | iova = find_iova(&domain->iovad, IOVA_PFN(dev_addr)); |
2621 | if (!iova) | 2706 | if (WARN_ONCE(!iova, "Driver unmaps unmatched page at PFN %llx\n", |
2707 | (unsigned long long)dev_addr)) | ||
2622 | return; | 2708 | return; |
2623 | 2709 | ||
2624 | start_addr = iova->pfn_lo << PAGE_SHIFT; | 2710 | start_pfn = mm_to_dma_pfn(iova->pfn_lo); |
2625 | size = aligned_size((u64)dev_addr, size); | 2711 | last_pfn = mm_to_dma_pfn(iova->pfn_hi + 1) - 1; |
2626 | 2712 | ||
2627 | pr_debug("Device %s unmapping: %zx@%llx\n", | 2713 | pr_debug("Device %s unmapping: pfn %lx-%lx\n", |
2628 | pci_name(pdev), size, (unsigned long long)start_addr); | 2714 | pci_name(pdev), start_pfn, last_pfn); |
2629 | 2715 | ||
2630 | /* clear the whole page */ | 2716 | /* clear the whole page */ |
2631 | dma_pte_clear_range(domain, start_addr, start_addr + size); | 2717 | dma_pte_clear_range(domain, start_pfn, last_pfn); |
2718 | |||
2632 | /* free page tables */ | 2719 | /* free page tables */ |
2633 | dma_pte_free_pagetable(domain, start_addr, start_addr + size); | 2720 | dma_pte_free_pagetable(domain, start_pfn, last_pfn); |
2721 | |||
2634 | if (intel_iommu_strict) { | 2722 | if (intel_iommu_strict) { |
2635 | iommu_flush_iotlb_psi(iommu, domain->id, start_addr, | 2723 | iommu_flush_iotlb_psi(iommu, domain->id, start_pfn, |
2636 | size >> VTD_PAGE_SHIFT); | 2724 | last_pfn - start_pfn + 1); |
2637 | /* free iova */ | 2725 | /* free iova */ |
2638 | __free_iova(&domain->iovad, iova); | 2726 | __free_iova(&domain->iovad, iova); |
2639 | } else { | 2727 | } else { |
@@ -2691,17 +2779,13 @@ static void intel_unmap_sg(struct device *hwdev, struct scatterlist *sglist, | |||
2691 | int nelems, enum dma_data_direction dir, | 2779 | int nelems, enum dma_data_direction dir, |
2692 | struct dma_attrs *attrs) | 2780 | struct dma_attrs *attrs) |
2693 | { | 2781 | { |
2694 | int i; | ||
2695 | struct pci_dev *pdev = to_pci_dev(hwdev); | 2782 | struct pci_dev *pdev = to_pci_dev(hwdev); |
2696 | struct dmar_domain *domain; | 2783 | struct dmar_domain *domain; |
2697 | unsigned long start_addr; | 2784 | unsigned long start_pfn, last_pfn; |
2698 | struct iova *iova; | 2785 | struct iova *iova; |
2699 | size_t size = 0; | ||
2700 | phys_addr_t addr; | ||
2701 | struct scatterlist *sg; | ||
2702 | struct intel_iommu *iommu; | 2786 | struct intel_iommu *iommu; |
2703 | 2787 | ||
2704 | if (iommu_no_mapping(pdev)) | 2788 | if (iommu_no_mapping(hwdev)) |
2705 | return; | 2789 | return; |
2706 | 2790 | ||
2707 | domain = find_domain(pdev); | 2791 | domain = find_domain(pdev); |
@@ -2710,22 +2794,21 @@ static void intel_unmap_sg(struct device *hwdev, struct scatterlist *sglist, | |||
2710 | iommu = domain_get_iommu(domain); | 2794 | iommu = domain_get_iommu(domain); |
2711 | 2795 | ||
2712 | iova = find_iova(&domain->iovad, IOVA_PFN(sglist[0].dma_address)); | 2796 | iova = find_iova(&domain->iovad, IOVA_PFN(sglist[0].dma_address)); |
2713 | if (!iova) | 2797 | if (WARN_ONCE(!iova, "Driver unmaps unmatched sglist at PFN %llx\n", |
2798 | (unsigned long long)sglist[0].dma_address)) | ||
2714 | return; | 2799 | return; |
2715 | for_each_sg(sglist, sg, nelems, i) { | ||
2716 | addr = page_to_phys(sg_page(sg)) + sg->offset; | ||
2717 | size += aligned_size((u64)addr, sg->length); | ||
2718 | } | ||
2719 | 2800 | ||
2720 | start_addr = iova->pfn_lo << PAGE_SHIFT; | 2801 | start_pfn = mm_to_dma_pfn(iova->pfn_lo); |
2802 | last_pfn = mm_to_dma_pfn(iova->pfn_hi + 1) - 1; | ||
2721 | 2803 | ||
2722 | /* clear the whole page */ | 2804 | /* clear the whole page */ |
2723 | dma_pte_clear_range(domain, start_addr, start_addr + size); | 2805 | dma_pte_clear_range(domain, start_pfn, last_pfn); |
2806 | |||
2724 | /* free page tables */ | 2807 | /* free page tables */ |
2725 | dma_pte_free_pagetable(domain, start_addr, start_addr + size); | 2808 | dma_pte_free_pagetable(domain, start_pfn, last_pfn); |
2726 | 2809 | ||
2727 | iommu_flush_iotlb_psi(iommu, domain->id, start_addr, | 2810 | iommu_flush_iotlb_psi(iommu, domain->id, start_pfn, |
2728 | size >> VTD_PAGE_SHIFT); | 2811 | (last_pfn - start_pfn + 1)); |
2729 | 2812 | ||
2730 | /* free iova */ | 2813 | /* free iova */ |
2731 | __free_iova(&domain->iovad, iova); | 2814 | __free_iova(&domain->iovad, iova); |
@@ -2748,21 +2831,20 @@ static int intel_nontranslate_map_sg(struct device *hddev, | |||
2748 | static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int nelems, | 2831 | static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int nelems, |
2749 | enum dma_data_direction dir, struct dma_attrs *attrs) | 2832 | enum dma_data_direction dir, struct dma_attrs *attrs) |
2750 | { | 2833 | { |
2751 | phys_addr_t addr; | ||
2752 | int i; | 2834 | int i; |
2753 | struct pci_dev *pdev = to_pci_dev(hwdev); | 2835 | struct pci_dev *pdev = to_pci_dev(hwdev); |
2754 | struct dmar_domain *domain; | 2836 | struct dmar_domain *domain; |
2755 | size_t size = 0; | 2837 | size_t size = 0; |
2756 | int prot = 0; | 2838 | int prot = 0; |
2757 | size_t offset = 0; | 2839 | size_t offset_pfn = 0; |
2758 | struct iova *iova = NULL; | 2840 | struct iova *iova = NULL; |
2759 | int ret; | 2841 | int ret; |
2760 | struct scatterlist *sg; | 2842 | struct scatterlist *sg; |
2761 | unsigned long start_addr; | 2843 | unsigned long start_vpfn; |
2762 | struct intel_iommu *iommu; | 2844 | struct intel_iommu *iommu; |
2763 | 2845 | ||
2764 | BUG_ON(dir == DMA_NONE); | 2846 | BUG_ON(dir == DMA_NONE); |
2765 | if (iommu_no_mapping(pdev)) | 2847 | if (iommu_no_mapping(hwdev)) |
2766 | return intel_nontranslate_map_sg(hwdev, sglist, nelems, dir); | 2848 | return intel_nontranslate_map_sg(hwdev, sglist, nelems, dir); |
2767 | 2849 | ||
2768 | domain = get_valid_domain_for_dev(pdev); | 2850 | domain = get_valid_domain_for_dev(pdev); |
@@ -2771,12 +2853,11 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int ne | |||
2771 | 2853 | ||
2772 | iommu = domain_get_iommu(domain); | 2854 | iommu = domain_get_iommu(domain); |
2773 | 2855 | ||
2774 | for_each_sg(sglist, sg, nelems, i) { | 2856 | for_each_sg(sglist, sg, nelems, i) |
2775 | addr = page_to_phys(sg_page(sg)) + sg->offset; | 2857 | size += aligned_nrpages(sg->offset, sg->length); |
2776 | size += aligned_size((u64)addr, sg->length); | ||
2777 | } | ||
2778 | 2858 | ||
2779 | iova = __intel_alloc_iova(hwdev, domain, size, pdev->dma_mask); | 2859 | iova = intel_alloc_iova(hwdev, domain, dma_to_mm_pfn(size), |
2860 | pdev->dma_mask); | ||
2780 | if (!iova) { | 2861 | if (!iova) { |
2781 | sglist->dma_length = 0; | 2862 | sglist->dma_length = 0; |
2782 | return 0; | 2863 | return 0; |
@@ -2792,35 +2873,24 @@ static int intel_map_sg(struct device *hwdev, struct scatterlist *sglist, int ne | |||
2792 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) | 2873 | if (dir == DMA_FROM_DEVICE || dir == DMA_BIDIRECTIONAL) |
2793 | prot |= DMA_PTE_WRITE; | 2874 | prot |= DMA_PTE_WRITE; |
2794 | 2875 | ||
2795 | start_addr = iova->pfn_lo << PAGE_SHIFT; | 2876 | start_vpfn = mm_to_dma_pfn(iova->pfn_lo); |
2796 | offset = 0; | 2877 | |
2797 | for_each_sg(sglist, sg, nelems, i) { | 2878 | ret = domain_sg_mapping(domain, start_vpfn, sglist, mm_to_dma_pfn(size), prot); |
2798 | addr = page_to_phys(sg_page(sg)) + sg->offset; | 2879 | if (unlikely(ret)) { |
2799 | size = aligned_size((u64)addr, sg->length); | 2880 | /* clear the page */ |
2800 | ret = domain_page_mapping(domain, start_addr + offset, | 2881 | dma_pte_clear_range(domain, start_vpfn, |
2801 | ((u64)addr) & PHYSICAL_PAGE_MASK, | 2882 | start_vpfn + size - 1); |
2802 | size, prot); | 2883 | /* free page tables */ |
2803 | if (ret) { | 2884 | dma_pte_free_pagetable(domain, start_vpfn, |
2804 | /* clear the page */ | 2885 | start_vpfn + size - 1); |
2805 | dma_pte_clear_range(domain, start_addr, | 2886 | /* free iova */ |
2806 | start_addr + offset); | 2887 | __free_iova(&domain->iovad, iova); |
2807 | /* free page tables */ | 2888 | return 0; |
2808 | dma_pte_free_pagetable(domain, start_addr, | ||
2809 | start_addr + offset); | ||
2810 | /* free iova */ | ||
2811 | __free_iova(&domain->iovad, iova); | ||
2812 | return 0; | ||
2813 | } | ||
2814 | sg->dma_address = start_addr + offset + | ||
2815 | ((u64)addr & (~PAGE_MASK)); | ||
2816 | sg->dma_length = sg->length; | ||
2817 | offset += size; | ||
2818 | } | 2889 | } |
2819 | 2890 | ||
2820 | /* it's a non-present to present mapping. Only flush if caching mode */ | 2891 | /* it's a non-present to present mapping. Only flush if caching mode */ |
2821 | if (cap_caching_mode(iommu->cap)) | 2892 | if (cap_caching_mode(iommu->cap)) |
2822 | iommu_flush_iotlb_psi(iommu, 0, start_addr, | 2893 | iommu_flush_iotlb_psi(iommu, 0, start_vpfn, offset_pfn); |
2823 | offset >> VTD_PAGE_SHIFT); | ||
2824 | else | 2894 | else |
2825 | iommu_flush_write_buffer(iommu); | 2895 | iommu_flush_write_buffer(iommu); |
2826 | 2896 | ||
@@ -3325,7 +3395,6 @@ static int md_domain_init(struct dmar_domain *domain, int guest_width) | |||
3325 | int adjust_width; | 3395 | int adjust_width; |
3326 | 3396 | ||
3327 | init_iova_domain(&domain->iovad, DMA_32BIT_PFN); | 3397 | init_iova_domain(&domain->iovad, DMA_32BIT_PFN); |
3328 | spin_lock_init(&domain->mapping_lock); | ||
3329 | spin_lock_init(&domain->iommu_lock); | 3398 | spin_lock_init(&domain->iommu_lock); |
3330 | 3399 | ||
3331 | domain_reserve_special_ranges(domain); | 3400 | domain_reserve_special_ranges(domain); |
@@ -3379,8 +3448,6 @@ static void iommu_free_vm_domain(struct dmar_domain *domain) | |||
3379 | 3448 | ||
3380 | static void vm_domain_exit(struct dmar_domain *domain) | 3449 | static void vm_domain_exit(struct dmar_domain *domain) |
3381 | { | 3450 | { |
3382 | u64 end; | ||
3383 | |||
3384 | /* Domain 0 is reserved, so dont process it */ | 3451 | /* Domain 0 is reserved, so dont process it */ |
3385 | if (!domain) | 3452 | if (!domain) |
3386 | return; | 3453 | return; |
@@ -3388,14 +3455,12 @@ static void vm_domain_exit(struct dmar_domain *domain) | |||
3388 | vm_domain_remove_all_dev_info(domain); | 3455 | vm_domain_remove_all_dev_info(domain); |
3389 | /* destroy iovas */ | 3456 | /* destroy iovas */ |
3390 | put_iova_domain(&domain->iovad); | 3457 | put_iova_domain(&domain->iovad); |
3391 | end = DOMAIN_MAX_ADDR(domain->gaw); | ||
3392 | end = end & (~VTD_PAGE_MASK); | ||
3393 | 3458 | ||
3394 | /* clear ptes */ | 3459 | /* clear ptes */ |
3395 | dma_pte_clear_range(domain, 0, end); | 3460 | dma_pte_clear_range(domain, 0, DOMAIN_MAX_PFN(domain->gaw)); |
3396 | 3461 | ||
3397 | /* free page tables */ | 3462 | /* free page tables */ |
3398 | dma_pte_free_pagetable(domain, 0, end); | 3463 | dma_pte_free_pagetable(domain, 0, DOMAIN_MAX_PFN(domain->gaw)); |
3399 | 3464 | ||
3400 | iommu_free_vm_domain(domain); | 3465 | iommu_free_vm_domain(domain); |
3401 | free_domain_mem(domain); | 3466 | free_domain_mem(domain); |
@@ -3504,7 +3569,7 @@ static int intel_iommu_map_range(struct iommu_domain *domain, | |||
3504 | if ((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping) | 3569 | if ((iommu_prot & IOMMU_CACHE) && dmar_domain->iommu_snooping) |
3505 | prot |= DMA_PTE_SNP; | 3570 | prot |= DMA_PTE_SNP; |
3506 | 3571 | ||
3507 | max_addr = (iova & VTD_PAGE_MASK) + VTD_PAGE_ALIGN(size); | 3572 | max_addr = iova + size; |
3508 | if (dmar_domain->max_addr < max_addr) { | 3573 | if (dmar_domain->max_addr < max_addr) { |
3509 | int min_agaw; | 3574 | int min_agaw; |
3510 | u64 end; | 3575 | u64 end; |
@@ -3522,8 +3587,11 @@ static int intel_iommu_map_range(struct iommu_domain *domain, | |||
3522 | } | 3587 | } |
3523 | dmar_domain->max_addr = max_addr; | 3588 | dmar_domain->max_addr = max_addr; |
3524 | } | 3589 | } |
3525 | 3590 | /* Round up size to next multiple of PAGE_SIZE, if it and | |
3526 | ret = domain_page_mapping(dmar_domain, iova, hpa, size, prot); | 3591 | the low bits of hpa would take us onto the next page */ |
3592 | size = aligned_nrpages(hpa, size); | ||
3593 | ret = domain_pfn_mapping(dmar_domain, iova >> VTD_PAGE_SHIFT, | ||
3594 | hpa >> VTD_PAGE_SHIFT, size, prot); | ||
3527 | return ret; | 3595 | return ret; |
3528 | } | 3596 | } |
3529 | 3597 | ||
@@ -3531,15 +3599,12 @@ static void intel_iommu_unmap_range(struct iommu_domain *domain, | |||
3531 | unsigned long iova, size_t size) | 3599 | unsigned long iova, size_t size) |
3532 | { | 3600 | { |
3533 | struct dmar_domain *dmar_domain = domain->priv; | 3601 | struct dmar_domain *dmar_domain = domain->priv; |
3534 | dma_addr_t base; | ||
3535 | 3602 | ||
3536 | /* The address might not be aligned */ | 3603 | dma_pte_clear_range(dmar_domain, iova >> VTD_PAGE_SHIFT, |
3537 | base = iova & VTD_PAGE_MASK; | 3604 | (iova + size - 1) >> VTD_PAGE_SHIFT); |
3538 | size = VTD_PAGE_ALIGN(size); | ||
3539 | dma_pte_clear_range(dmar_domain, base, base + size); | ||
3540 | 3605 | ||
3541 | if (dmar_domain->max_addr == base + size) | 3606 | if (dmar_domain->max_addr == iova + size) |
3542 | dmar_domain->max_addr = base; | 3607 | dmar_domain->max_addr = iova; |
3543 | } | 3608 | } |
3544 | 3609 | ||
3545 | static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, | 3610 | static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, |
@@ -3549,7 +3614,7 @@ static phys_addr_t intel_iommu_iova_to_phys(struct iommu_domain *domain, | |||
3549 | struct dma_pte *pte; | 3614 | struct dma_pte *pte; |
3550 | u64 phys = 0; | 3615 | u64 phys = 0; |
3551 | 3616 | ||
3552 | pte = addr_to_dma_pte(dmar_domain, iova); | 3617 | pte = pfn_to_dma_pte(dmar_domain, iova >> VTD_PAGE_SHIFT); |
3553 | if (pte) | 3618 | if (pte) |
3554 | phys = dma_pte_addr(pte); | 3619 | phys = dma_pte_addr(pte); |
3555 | 3620 | ||
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index d9f06fbfa0bf..d986afb7032b 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -127,17 +127,23 @@ static inline __attribute_const__ u32 msi_enabled_mask(u16 control) | |||
127 | * reliably as devices without an INTx disable bit will then generate a | 127 | * reliably as devices without an INTx disable bit will then generate a |
128 | * level IRQ which will never be cleared. | 128 | * level IRQ which will never be cleared. |
129 | */ | 129 | */ |
130 | static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | 130 | static u32 __msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) |
131 | { | 131 | { |
132 | u32 mask_bits = desc->masked; | 132 | u32 mask_bits = desc->masked; |
133 | 133 | ||
134 | if (!desc->msi_attrib.maskbit) | 134 | if (!desc->msi_attrib.maskbit) |
135 | return; | 135 | return 0; |
136 | 136 | ||
137 | mask_bits &= ~mask; | 137 | mask_bits &= ~mask; |
138 | mask_bits |= flag; | 138 | mask_bits |= flag; |
139 | pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits); | 139 | pci_write_config_dword(desc->dev, desc->mask_pos, mask_bits); |
140 | desc->masked = mask_bits; | 140 | |
141 | return mask_bits; | ||
142 | } | ||
143 | |||
144 | static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | ||
145 | { | ||
146 | desc->masked = __msi_mask_irq(desc, mask, flag); | ||
141 | } | 147 | } |
142 | 148 | ||
143 | /* | 149 | /* |
@@ -147,15 +153,21 @@ static void msi_mask_irq(struct msi_desc *desc, u32 mask, u32 flag) | |||
147 | * file. This saves a few milliseconds when initialising devices with lots | 153 | * file. This saves a few milliseconds when initialising devices with lots |
148 | * of MSI-X interrupts. | 154 | * of MSI-X interrupts. |
149 | */ | 155 | */ |
150 | static void msix_mask_irq(struct msi_desc *desc, u32 flag) | 156 | static u32 __msix_mask_irq(struct msi_desc *desc, u32 flag) |
151 | { | 157 | { |
152 | u32 mask_bits = desc->masked; | 158 | u32 mask_bits = desc->masked; |
153 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + | 159 | unsigned offset = desc->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE + |
154 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET; | 160 | PCI_MSIX_ENTRY_VECTOR_CTRL; |
155 | mask_bits &= ~1; | 161 | mask_bits &= ~1; |
156 | mask_bits |= flag; | 162 | mask_bits |= flag; |
157 | writel(mask_bits, desc->mask_base + offset); | 163 | writel(mask_bits, desc->mask_base + offset); |
158 | desc->masked = mask_bits; | 164 | |
165 | return mask_bits; | ||
166 | } | ||
167 | |||
168 | static void msix_mask_irq(struct msi_desc *desc, u32 flag) | ||
169 | { | ||
170 | desc->masked = __msix_mask_irq(desc, flag); | ||
159 | } | 171 | } |
160 | 172 | ||
161 | static void msi_set_mask_bit(unsigned irq, u32 flag) | 173 | static void msi_set_mask_bit(unsigned irq, u32 flag) |
@@ -188,9 +200,9 @@ void read_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | |||
188 | void __iomem *base = entry->mask_base + | 200 | void __iomem *base = entry->mask_base + |
189 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; | 201 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
190 | 202 | ||
191 | msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); | 203 | msg->address_lo = readl(base + PCI_MSIX_ENTRY_LOWER_ADDR); |
192 | msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); | 204 | msg->address_hi = readl(base + PCI_MSIX_ENTRY_UPPER_ADDR); |
193 | msg->data = readl(base + PCI_MSIX_ENTRY_DATA_OFFSET); | 205 | msg->data = readl(base + PCI_MSIX_ENTRY_DATA); |
194 | } else { | 206 | } else { |
195 | struct pci_dev *dev = entry->dev; | 207 | struct pci_dev *dev = entry->dev; |
196 | int pos = entry->msi_attrib.pos; | 208 | int pos = entry->msi_attrib.pos; |
@@ -225,11 +237,9 @@ void write_msi_msg_desc(struct irq_desc *desc, struct msi_msg *msg) | |||
225 | base = entry->mask_base + | 237 | base = entry->mask_base + |
226 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; | 238 | entry->msi_attrib.entry_nr * PCI_MSIX_ENTRY_SIZE; |
227 | 239 | ||
228 | writel(msg->address_lo, | 240 | writel(msg->address_lo, base + PCI_MSIX_ENTRY_LOWER_ADDR); |
229 | base + PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET); | 241 | writel(msg->address_hi, base + PCI_MSIX_ENTRY_UPPER_ADDR); |
230 | writel(msg->address_hi, | 242 | writel(msg->data, base + PCI_MSIX_ENTRY_DATA); |
231 | base + PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET); | ||
232 | writel(msg->data, base + PCI_MSIX_ENTRY_DATA_OFFSET); | ||
233 | } else { | 243 | } else { |
234 | struct pci_dev *dev = entry->dev; | 244 | struct pci_dev *dev = entry->dev; |
235 | int pos = entry->msi_attrib.pos; | 245 | int pos = entry->msi_attrib.pos; |
@@ -385,6 +395,7 @@ static int msi_capability_init(struct pci_dev *dev, int nvec) | |||
385 | /* Configure MSI capability structure */ | 395 | /* Configure MSI capability structure */ |
386 | ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); | 396 | ret = arch_setup_msi_irqs(dev, nvec, PCI_CAP_ID_MSI); |
387 | if (ret) { | 397 | if (ret) { |
398 | msi_mask_irq(entry, mask, ~mask); | ||
388 | msi_free_irqs(dev); | 399 | msi_free_irqs(dev); |
389 | return ret; | 400 | return ret; |
390 | } | 401 | } |
@@ -439,8 +450,14 @@ static int msix_capability_init(struct pci_dev *dev, | |||
439 | 450 | ||
440 | for (i = 0; i < nvec; i++) { | 451 | for (i = 0; i < nvec; i++) { |
441 | entry = alloc_msi_entry(dev); | 452 | entry = alloc_msi_entry(dev); |
442 | if (!entry) | 453 | if (!entry) { |
443 | break; | 454 | if (!i) |
455 | iounmap(base); | ||
456 | else | ||
457 | msi_free_irqs(dev); | ||
458 | /* No enough memory. Don't try again */ | ||
459 | return -ENOMEM; | ||
460 | } | ||
444 | 461 | ||
445 | j = entries[i].entry; | 462 | j = entries[i].entry; |
446 | entry->msi_attrib.is_msix = 1; | 463 | entry->msi_attrib.is_msix = 1; |
@@ -487,7 +504,7 @@ static int msix_capability_init(struct pci_dev *dev, | |||
487 | set_irq_msi(entry->irq, entry); | 504 | set_irq_msi(entry->irq, entry); |
488 | j = entries[i].entry; | 505 | j = entries[i].entry; |
489 | entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE + | 506 | entry->masked = readl(base + j * PCI_MSIX_ENTRY_SIZE + |
490 | PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET); | 507 | PCI_MSIX_ENTRY_VECTOR_CTRL); |
491 | msix_mask_irq(entry, 1); | 508 | msix_mask_irq(entry, 1); |
492 | i++; | 509 | i++; |
493 | } | 510 | } |
@@ -611,9 +628,11 @@ void pci_msi_shutdown(struct pci_dev *dev) | |||
611 | pci_intx_for_msi(dev, 1); | 628 | pci_intx_for_msi(dev, 1); |
612 | dev->msi_enabled = 0; | 629 | dev->msi_enabled = 0; |
613 | 630 | ||
631 | /* Return the device with MSI unmasked as initial states */ | ||
614 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl); | 632 | pci_read_config_word(dev, pos + PCI_MSI_FLAGS, &ctrl); |
615 | mask = msi_capable_mask(ctrl); | 633 | mask = msi_capable_mask(ctrl); |
616 | msi_mask_irq(desc, mask, ~mask); | 634 | /* Keep cached state to be restored */ |
635 | __msi_mask_irq(desc, mask, ~mask); | ||
617 | 636 | ||
618 | /* Restore dev->irq to its default pin-assertion irq */ | 637 | /* Restore dev->irq to its default pin-assertion irq */ |
619 | dev->irq = desc->msi_attrib.default_irq; | 638 | dev->irq = desc->msi_attrib.default_irq; |
@@ -653,7 +672,6 @@ static int msi_free_irqs(struct pci_dev* dev) | |||
653 | 672 | ||
654 | list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { | 673 | list_for_each_entry_safe(entry, tmp, &dev->msi_list, list) { |
655 | if (entry->msi_attrib.is_msix) { | 674 | if (entry->msi_attrib.is_msix) { |
656 | msix_mask_irq(entry, 1); | ||
657 | if (list_is_last(&entry->list, &dev->msi_list)) | 675 | if (list_is_last(&entry->list, &dev->msi_list)) |
658 | iounmap(entry->mask_base); | 676 | iounmap(entry->mask_base); |
659 | } | 677 | } |
@@ -741,9 +759,17 @@ static void msix_free_all_irqs(struct pci_dev *dev) | |||
741 | 759 | ||
742 | void pci_msix_shutdown(struct pci_dev* dev) | 760 | void pci_msix_shutdown(struct pci_dev* dev) |
743 | { | 761 | { |
762 | struct msi_desc *entry; | ||
763 | |||
744 | if (!pci_msi_enable || !dev || !dev->msix_enabled) | 764 | if (!pci_msi_enable || !dev || !dev->msix_enabled) |
745 | return; | 765 | return; |
746 | 766 | ||
767 | /* Return the device with MSI-X masked as initial states */ | ||
768 | list_for_each_entry(entry, &dev->msi_list, list) { | ||
769 | /* Keep cached states to be restored */ | ||
770 | __msix_mask_irq(entry, 1); | ||
771 | } | ||
772 | |||
747 | msix_set_enable(dev, 0); | 773 | msix_set_enable(dev, 0); |
748 | pci_intx_for_msi(dev, 1); | 774 | pci_intx_for_msi(dev, 1); |
749 | dev->msix_enabled = 0; | 775 | dev->msix_enabled = 0; |
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h index a0662842550b..de27c1cb5a2b 100644 --- a/drivers/pci/msi.h +++ b/drivers/pci/msi.h | |||
@@ -6,11 +6,11 @@ | |||
6 | #ifndef MSI_H | 6 | #ifndef MSI_H |
7 | #define MSI_H | 7 | #define MSI_H |
8 | 8 | ||
9 | #define PCI_MSIX_ENTRY_SIZE 16 | 9 | #define PCI_MSIX_ENTRY_SIZE 16 |
10 | #define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0 | 10 | #define PCI_MSIX_ENTRY_LOWER_ADDR 0 |
11 | #define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4 | 11 | #define PCI_MSIX_ENTRY_UPPER_ADDR 4 |
12 | #define PCI_MSIX_ENTRY_DATA_OFFSET 8 | 12 | #define PCI_MSIX_ENTRY_DATA 8 |
13 | #define PCI_MSIX_ENTRY_VECTOR_CTRL_OFFSET 12 | 13 | #define PCI_MSIX_ENTRY_VECTOR_CTRL 12 |
14 | 14 | ||
15 | #define msi_control_reg(base) (base + PCI_MSI_FLAGS) | 15 | #define msi_control_reg(base) (base + PCI_MSI_FLAGS) |
16 | #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) | 16 | #define msi_lower_address_reg(base) (base + PCI_MSI_ADDRESS_LO) |
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index 6c93af5ced18..dbd0f947f497 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c | |||
@@ -1517,11 +1517,20 @@ void pci_enable_ari(struct pci_dev *dev) | |||
1517 | * | 1517 | * |
1518 | * Perform INTx swizzling for a device behind one level of bridge. This is | 1518 | * Perform INTx swizzling for a device behind one level of bridge. This is |
1519 | * required by section 9.1 of the PCI-to-PCI bridge specification for devices | 1519 | * required by section 9.1 of the PCI-to-PCI bridge specification for devices |
1520 | * behind bridges on add-in cards. | 1520 | * behind bridges on add-in cards. For devices with ARI enabled, the slot |
1521 | * number is always 0 (see the Implementation Note in section 2.2.8.1 of | ||
1522 | * the PCI Express Base Specification, Revision 2.1) | ||
1521 | */ | 1523 | */ |
1522 | u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin) | 1524 | u8 pci_swizzle_interrupt_pin(struct pci_dev *dev, u8 pin) |
1523 | { | 1525 | { |
1524 | return (((pin - 1) + PCI_SLOT(dev->devfn)) % 4) + 1; | 1526 | int slot; |
1527 | |||
1528 | if (pci_ari_enabled(dev->bus)) | ||
1529 | slot = 0; | ||
1530 | else | ||
1531 | slot = PCI_SLOT(dev->devfn); | ||
1532 | |||
1533 | return (((pin - 1) + slot) % 4) + 1; | ||
1525 | } | 1534 | } |
1526 | 1535 | ||
1527 | int | 1536 | int |
@@ -2171,7 +2180,7 @@ static int pci_parent_bus_reset(struct pci_dev *dev, int probe) | |||
2171 | u16 ctrl; | 2180 | u16 ctrl; |
2172 | struct pci_dev *pdev; | 2181 | struct pci_dev *pdev; |
2173 | 2182 | ||
2174 | if (dev->subordinate) | 2183 | if (pci_is_root_bus(dev->bus) || dev->subordinate || !dev->bus->self) |
2175 | return -ENOTTY; | 2184 | return -ENOTTY; |
2176 | 2185 | ||
2177 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) | 2186 | list_for_each_entry(pdev, &dev->bus->devices, bus_list) |
diff --git a/drivers/pci/pcie/aer/ecrc.c b/drivers/pci/pcie/aer/ecrc.c index ece97df4df6d..a928d8ab6bda 100644 --- a/drivers/pci/pcie/aer/ecrc.c +++ b/drivers/pci/pcie/aer/ecrc.c | |||
@@ -106,7 +106,7 @@ void pcie_set_ecrc_checking(struct pci_dev *dev) | |||
106 | disable_ecrc_checking(dev); | 106 | disable_ecrc_checking(dev); |
107 | break; | 107 | break; |
108 | case ECRC_POLICY_ON: | 108 | case ECRC_POLICY_ON: |
109 | enable_ecrc_checking(dev);; | 109 | enable_ecrc_checking(dev); |
110 | break; | 110 | break; |
111 | default: | 111 | default: |
112 | return; | 112 | return; |
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c index 56552d74abea..06b965623962 100644 --- a/drivers/pci/quirks.c +++ b/drivers/pci/quirks.c | |||
@@ -1058,6 +1058,11 @@ static void __devinit quirk_no_ata_d3(struct pci_dev *pdev) | |||
1058 | } | 1058 | } |
1059 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_ANY_ID, quirk_no_ata_d3); | 1059 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_ANY_ID, quirk_no_ata_d3); |
1060 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, PCI_ANY_ID, quirk_no_ata_d3); | 1060 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_ATI, PCI_ANY_ID, quirk_no_ata_d3); |
1061 | /* ALi loses some register settings that we cannot then restore */ | ||
1062 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_AL, PCI_ANY_ID, quirk_no_ata_d3); | ||
1063 | /* VIA comes back fine but we need to keep it alive or ACPI GTM failures | ||
1064 | occur when mode detecting */ | ||
1065 | DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_VIA, PCI_ANY_ID, quirk_no_ata_d3); | ||
1061 | 1066 | ||
1062 | /* This was originally an Alpha specific thing, but it really fits here. | 1067 | /* This was originally an Alpha specific thing, but it really fits here. |
1063 | * The i82375 PCI/EISA bridge appears as non-classified. Fix that. | 1068 | * The i82375 PCI/EISA bridge appears as non-classified. Fix that. |
diff --git a/drivers/pci/slot.c b/drivers/pci/slot.c index eddb0748b0ea..8c02b6c53bdb 100644 --- a/drivers/pci/slot.c +++ b/drivers/pci/slot.c | |||
@@ -311,7 +311,7 @@ EXPORT_SYMBOL_GPL(pci_destroy_slot); | |||
311 | #include <linux/pci_hotplug.h> | 311 | #include <linux/pci_hotplug.h> |
312 | /** | 312 | /** |
313 | * pci_hp_create_link - create symbolic link to the hotplug driver module. | 313 | * pci_hp_create_link - create symbolic link to the hotplug driver module. |
314 | * @slot: struct pci_slot | 314 | * @pci_slot: struct pci_slot |
315 | * | 315 | * |
316 | * Helper function for pci_hotplug_core.c to create symbolic link to | 316 | * Helper function for pci_hotplug_core.c to create symbolic link to |
317 | * the hotplug driver module. | 317 | * the hotplug driver module. |
@@ -334,7 +334,7 @@ EXPORT_SYMBOL_GPL(pci_hp_create_module_link); | |||
334 | 334 | ||
335 | /** | 335 | /** |
336 | * pci_hp_remove_link - remove symbolic link to the hotplug driver module. | 336 | * pci_hp_remove_link - remove symbolic link to the hotplug driver module. |
337 | * @slot: struct pci_slot | 337 | * @pci_slot: struct pci_slot |
338 | * | 338 | * |
339 | * Helper function for pci_hotplug_core.c to remove symbolic link to | 339 | * Helper function for pci_hotplug_core.c to remove symbolic link to |
340 | * the hotplug driver module. | 340 | * the hotplug driver module. |
diff --git a/drivers/pcmcia/vrc4171_card.c b/drivers/pcmcia/vrc4171_card.c index 659421d0ca46..d4ad50d737b0 100644 --- a/drivers/pcmcia/vrc4171_card.c +++ b/drivers/pcmcia/vrc4171_card.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services. | 2 | * vrc4171_card.c, NEC VRC4171 Card Controller driver for Socket Services. |
3 | * | 3 | * |
4 | * Copyright (C) 2003-2005 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2003-2005 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -32,7 +32,7 @@ | |||
32 | #include "i82365.h" | 32 | #include "i82365.h" |
33 | 33 | ||
34 | MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services"); | 34 | MODULE_DESCRIPTION("NEC VRC4171 Card Controllers driver for Socket Services"); |
35 | MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>"); | 35 | MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>"); |
36 | MODULE_LICENSE("GPL"); | 36 | MODULE_LICENSE("GPL"); |
37 | 37 | ||
38 | #define CARD_MAX_SLOTS 2 | 38 | #define CARD_MAX_SLOTS 2 |
diff --git a/drivers/pcmcia/vrc4173_cardu.c b/drivers/pcmcia/vrc4173_cardu.c index 812f038e9bda..9b3c15827e5c 100644 --- a/drivers/pcmcia/vrc4173_cardu.c +++ b/drivers/pcmcia/vrc4173_cardu.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * NEC VRC4173 CARDU driver for Socket Services | 6 | * NEC VRC4173 CARDU driver for Socket Services |
7 | * (This device doesn't support CardBus. it is supporting only 16bit PC Card.) | 7 | * (This device doesn't support CardBus. it is supporting only 16bit PC Card.) |
8 | * | 8 | * |
9 | * Copyright 2002,2003 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 9 | * Copyright 2002,2003 Yoichi Yuasa <yuasa@linux-mips.org> |
10 | * | 10 | * |
11 | * This program is free software; you can redistribute it and/or modify it | 11 | * This program is free software; you can redistribute it and/or modify it |
12 | * under the terms of the GNU General Public License as published by the | 12 | * under the terms of the GNU General Public License as published by the |
@@ -41,7 +41,7 @@ | |||
41 | #include "vrc4173_cardu.h" | 41 | #include "vrc4173_cardu.h" |
42 | 42 | ||
43 | MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services"); | 43 | MODULE_DESCRIPTION("NEC VRC4173 CARDU driver for Socket Services"); |
44 | MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>"); | 44 | MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>"); |
45 | MODULE_LICENSE("GPL"); | 45 | MODULE_LICENSE("GPL"); |
46 | 46 | ||
47 | static int vrc4173_cardu_slots; | 47 | static int vrc4173_cardu_slots; |
diff --git a/drivers/pcmcia/vrc4173_cardu.h b/drivers/pcmcia/vrc4173_cardu.h index 7d77c74120c1..a7d96018ed8d 100644 --- a/drivers/pcmcia/vrc4173_cardu.h +++ b/drivers/pcmcia/vrc4173_cardu.h | |||
@@ -5,7 +5,7 @@ | |||
5 | * BRIEF MODULE DESCRIPTION | 5 | * BRIEF MODULE DESCRIPTION |
6 | * Include file for NEC VRC4173 CARDU. | 6 | * Include file for NEC VRC4173 CARDU. |
7 | * | 7 | * |
8 | * Copyright 2002 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 8 | * Copyright 2002 Yoichi Yuasa <yuasa@linux-mips.org> |
9 | * | 9 | * |
10 | * This program is free software; you can redistribute it and/or modify it | 10 | * This program is free software; you can redistribute it and/or modify it |
11 | * under the terms of the GNU General Public License as published by the | 11 | * under the terms of the GNU General Public License as published by the |
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index 32b27739ec2a..713f7bf5afb3 100644 --- a/drivers/rtc/rtc-ds1374.c +++ b/drivers/rtc/rtc-ds1374.c | |||
@@ -283,7 +283,7 @@ static void ds1374_work(struct work_struct *work) | |||
283 | 283 | ||
284 | stat = i2c_smbus_read_byte_data(client, DS1374_REG_SR); | 284 | stat = i2c_smbus_read_byte_data(client, DS1374_REG_SR); |
285 | if (stat < 0) | 285 | if (stat < 0) |
286 | return; | 286 | goto unlock; |
287 | 287 | ||
288 | if (stat & DS1374_REG_SR_AF) { | 288 | if (stat & DS1374_REG_SR_AF) { |
289 | stat &= ~DS1374_REG_SR_AF; | 289 | stat &= ~DS1374_REG_SR_AF; |
@@ -302,7 +302,7 @@ static void ds1374_work(struct work_struct *work) | |||
302 | out: | 302 | out: |
303 | if (!ds1374->exiting) | 303 | if (!ds1374->exiting) |
304 | enable_irq(client->irq); | 304 | enable_irq(client->irq); |
305 | 305 | unlock: | |
306 | mutex_unlock(&ds1374->mutex); | 306 | mutex_unlock(&ds1374->mutex); |
307 | } | 307 | } |
308 | 308 | ||
diff --git a/drivers/rtc/rtc-vr41xx.c b/drivers/rtc/rtc-vr41xx.c index f11297aff854..2c839d0d21bd 100644 --- a/drivers/rtc/rtc-vr41xx.c +++ b/drivers/rtc/rtc-vr41xx.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for NEC VR4100 series Real Time Clock unit. | 2 | * Driver for NEC VR4100 series Real Time Clock unit. |
3 | * | 3 | * |
4 | * Copyright (C) 2003-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2003-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
@@ -33,7 +33,7 @@ | |||
33 | #include <asm/io.h> | 33 | #include <asm/io.h> |
34 | #include <asm/uaccess.h> | 34 | #include <asm/uaccess.h> |
35 | 35 | ||
36 | MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>"); | 36 | MODULE_AUTHOR("Yoichi Yuasa <yuasa@linux-mips.org>"); |
37 | MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); | 37 | MODULE_DESCRIPTION("NEC VR4100 series RTC driver"); |
38 | MODULE_LICENSE("GPL v2"); | 38 | MODULE_LICENSE("GPL v2"); |
39 | 39 | ||
diff --git a/drivers/scsi/cxgb3i/Kbuild b/drivers/scsi/cxgb3i/Kbuild index 25a2032bfa26..70d060b7ff4f 100644 --- a/drivers/scsi/cxgb3i/Kbuild +++ b/drivers/scsi/cxgb3i/Kbuild | |||
@@ -1,4 +1,4 @@ | |||
1 | EXTRA_CFLAGS += -I$(TOPDIR)/drivers/net/cxgb3 | 1 | EXTRA_CFLAGS += -I$(srctree)/drivers/net/cxgb3 |
2 | 2 | ||
3 | cxgb3i-y := cxgb3i_init.o cxgb3i_iscsi.o cxgb3i_pdu.o cxgb3i_offload.o cxgb3i_ddp.o | 3 | cxgb3i-y := cxgb3i_init.o cxgb3i_iscsi.o cxgb3i_pdu.o cxgb3i_offload.o cxgb3i_ddp.o |
4 | obj-$(CONFIG_SCSI_CXGB3_ISCSI) += cxgb3i.o | 4 | obj-$(CONFIG_SCSI_CXGB3_ISCSI) += cxgb3i.o |
diff --git a/drivers/scsi/cxgb3i/cxgb3i_iscsi.c b/drivers/scsi/cxgb3i/cxgb3i_iscsi.c index 74369a3f963b..c399f485aa7d 100644 --- a/drivers/scsi/cxgb3i/cxgb3i_iscsi.c +++ b/drivers/scsi/cxgb3i/cxgb3i_iscsi.c | |||
@@ -13,6 +13,7 @@ | |||
13 | 13 | ||
14 | #include <linux/inet.h> | 14 | #include <linux/inet.h> |
15 | #include <linux/crypto.h> | 15 | #include <linux/crypto.h> |
16 | #include <linux/if_vlan.h> | ||
16 | #include <net/dst.h> | 17 | #include <net/dst.h> |
17 | #include <net/tcp.h> | 18 | #include <net/tcp.h> |
18 | #include <scsi/scsi_cmnd.h> | 19 | #include <scsi/scsi_cmnd.h> |
@@ -184,6 +185,9 @@ static struct cxgb3i_hba *cxgb3i_hba_find_by_netdev(struct net_device *ndev) | |||
184 | struct cxgb3i_adapter *snic; | 185 | struct cxgb3i_adapter *snic; |
185 | int i; | 186 | int i; |
186 | 187 | ||
188 | if (ndev->priv_flags & IFF_802_1Q_VLAN) | ||
189 | ndev = vlan_dev_real_dev(ndev); | ||
190 | |||
187 | read_lock(&cxgb3i_snic_rwlock); | 191 | read_lock(&cxgb3i_snic_rwlock); |
188 | list_for_each_entry(snic, &cxgb3i_snic_list, list_head) { | 192 | list_for_each_entry(snic, &cxgb3i_snic_list, list_head) { |
189 | for (i = 0; i < snic->hba_cnt; i++) { | 193 | for (i = 0; i < snic->hba_cnt; i++) { |
diff --git a/drivers/scsi/fnic/fnic_main.c b/drivers/scsi/fnic/fnic_main.c index a84072865fc2..2c266c01dc5a 100644 --- a/drivers/scsi/fnic/fnic_main.c +++ b/drivers/scsi/fnic/fnic_main.c | |||
@@ -473,16 +473,16 @@ static int __devinit fnic_probe(struct pci_dev *pdev, | |||
473 | * limitation for the device. Try 40-bit first, and | 473 | * limitation for the device. Try 40-bit first, and |
474 | * fail to 32-bit. | 474 | * fail to 32-bit. |
475 | */ | 475 | */ |
476 | err = pci_set_dma_mask(pdev, DMA_40BIT_MASK); | 476 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(40)); |
477 | if (err) { | 477 | if (err) { |
478 | err = pci_set_dma_mask(pdev, DMA_32BIT_MASK); | 478 | err = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
479 | if (err) { | 479 | if (err) { |
480 | shost_printk(KERN_ERR, fnic->lport->host, | 480 | shost_printk(KERN_ERR, fnic->lport->host, |
481 | "No usable DMA configuration " | 481 | "No usable DMA configuration " |
482 | "aborting\n"); | 482 | "aborting\n"); |
483 | goto err_out_release_regions; | 483 | goto err_out_release_regions; |
484 | } | 484 | } |
485 | err = pci_set_consistent_dma_mask(pdev, DMA_32BIT_MASK); | 485 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); |
486 | if (err) { | 486 | if (err) { |
487 | shost_printk(KERN_ERR, fnic->lport->host, | 487 | shost_printk(KERN_ERR, fnic->lport->host, |
488 | "Unable to obtain 32-bit DMA " | 488 | "Unable to obtain 32-bit DMA " |
@@ -490,7 +490,7 @@ static int __devinit fnic_probe(struct pci_dev *pdev, | |||
490 | goto err_out_release_regions; | 490 | goto err_out_release_regions; |
491 | } | 491 | } |
492 | } else { | 492 | } else { |
493 | err = pci_set_consistent_dma_mask(pdev, DMA_40BIT_MASK); | 493 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(40)); |
494 | if (err) { | 494 | if (err) { |
495 | shost_printk(KERN_ERR, fnic->lport->host, | 495 | shost_printk(KERN_ERR, fnic->lport->host, |
496 | "Unable to obtain 40-bit DMA " | 496 | "Unable to obtain 40-bit DMA " |
diff --git a/drivers/scsi/fnic/fnic_scsi.c b/drivers/scsi/fnic/fnic_scsi.c index eabf36502856..bfc996971b81 100644 --- a/drivers/scsi/fnic/fnic_scsi.c +++ b/drivers/scsi/fnic/fnic_scsi.c | |||
@@ -245,7 +245,7 @@ static inline int fnic_queue_wq_copy_desc(struct fnic *fnic, | |||
245 | struct vnic_wq_copy *wq, | 245 | struct vnic_wq_copy *wq, |
246 | struct fnic_io_req *io_req, | 246 | struct fnic_io_req *io_req, |
247 | struct scsi_cmnd *sc, | 247 | struct scsi_cmnd *sc, |
248 | u32 sg_count) | 248 | int sg_count) |
249 | { | 249 | { |
250 | struct scatterlist *sg; | 250 | struct scatterlist *sg; |
251 | struct fc_rport *rport = starget_to_rport(scsi_target(sc->device)); | 251 | struct fc_rport *rport = starget_to_rport(scsi_target(sc->device)); |
@@ -260,9 +260,6 @@ static inline int fnic_queue_wq_copy_desc(struct fnic *fnic, | |||
260 | char msg[2]; | 260 | char msg[2]; |
261 | 261 | ||
262 | if (sg_count) { | 262 | if (sg_count) { |
263 | BUG_ON(sg_count < 0); | ||
264 | BUG_ON(sg_count > FNIC_MAX_SG_DESC_CNT); | ||
265 | |||
266 | /* For each SGE, create a device desc entry */ | 263 | /* For each SGE, create a device desc entry */ |
267 | desc = io_req->sgl_list; | 264 | desc = io_req->sgl_list; |
268 | for_each_sg(scsi_sglist(sc), sg, sg_count, i) { | 265 | for_each_sg(scsi_sglist(sc), sg, sg_count, i) { |
@@ -344,7 +341,7 @@ int fnic_queuecommand(struct scsi_cmnd *sc, void (*done)(struct scsi_cmnd *)) | |||
344 | struct fnic *fnic; | 341 | struct fnic *fnic; |
345 | struct vnic_wq_copy *wq; | 342 | struct vnic_wq_copy *wq; |
346 | int ret; | 343 | int ret; |
347 | u32 sg_count; | 344 | int sg_count; |
348 | unsigned long flags; | 345 | unsigned long flags; |
349 | unsigned long ptr; | 346 | unsigned long ptr; |
350 | 347 | ||
diff --git a/drivers/scsi/ibmvscsi/ibmvscsi.c b/drivers/scsi/ibmvscsi/ibmvscsi.c index 869a11bdccbd..9928704e235f 100644 --- a/drivers/scsi/ibmvscsi/ibmvscsi.c +++ b/drivers/scsi/ibmvscsi/ibmvscsi.c | |||
@@ -1095,9 +1095,14 @@ static void adapter_info_rsp(struct srp_event_struct *evt_struct) | |||
1095 | MAX_INDIRECT_BUFS); | 1095 | MAX_INDIRECT_BUFS); |
1096 | hostdata->host->sg_tablesize = MAX_INDIRECT_BUFS; | 1096 | hostdata->host->sg_tablesize = MAX_INDIRECT_BUFS; |
1097 | } | 1097 | } |
1098 | |||
1099 | if (hostdata->madapter_info.os_type == 3) { | ||
1100 | enable_fast_fail(hostdata); | ||
1101 | return; | ||
1102 | } | ||
1098 | } | 1103 | } |
1099 | 1104 | ||
1100 | enable_fast_fail(hostdata); | 1105 | send_srp_login(hostdata); |
1101 | } | 1106 | } |
1102 | 1107 | ||
1103 | /** | 1108 | /** |
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c index 2eee9e6e4fe8..292c02f810d0 100644 --- a/drivers/scsi/scsi_transport_fc.c +++ b/drivers/scsi/scsi_transport_fc.c | |||
@@ -3670,13 +3670,14 @@ static void | |||
3670 | fc_bsg_goose_queue(struct fc_rport *rport) | 3670 | fc_bsg_goose_queue(struct fc_rport *rport) |
3671 | { | 3671 | { |
3672 | int flagset; | 3672 | int flagset; |
3673 | unsigned long flags; | ||
3673 | 3674 | ||
3674 | if (!rport->rqst_q) | 3675 | if (!rport->rqst_q) |
3675 | return; | 3676 | return; |
3676 | 3677 | ||
3677 | get_device(&rport->dev); | 3678 | get_device(&rport->dev); |
3678 | 3679 | ||
3679 | spin_lock(rport->rqst_q->queue_lock); | 3680 | spin_lock_irqsave(rport->rqst_q->queue_lock, flags); |
3680 | flagset = test_bit(QUEUE_FLAG_REENTER, &rport->rqst_q->queue_flags) && | 3681 | flagset = test_bit(QUEUE_FLAG_REENTER, &rport->rqst_q->queue_flags) && |
3681 | !test_bit(QUEUE_FLAG_REENTER, &rport->rqst_q->queue_flags); | 3682 | !test_bit(QUEUE_FLAG_REENTER, &rport->rqst_q->queue_flags); |
3682 | if (flagset) | 3683 | if (flagset) |
@@ -3684,7 +3685,7 @@ fc_bsg_goose_queue(struct fc_rport *rport) | |||
3684 | __blk_run_queue(rport->rqst_q); | 3685 | __blk_run_queue(rport->rqst_q); |
3685 | if (flagset) | 3686 | if (flagset) |
3686 | queue_flag_clear(QUEUE_FLAG_REENTER, rport->rqst_q); | 3687 | queue_flag_clear(QUEUE_FLAG_REENTER, rport->rqst_q); |
3687 | spin_unlock(rport->rqst_q->queue_lock); | 3688 | spin_unlock_irqrestore(rport->rqst_q->queue_lock, flags); |
3688 | 3689 | ||
3689 | put_device(&rport->dev); | 3690 | put_device(&rport->dev); |
3690 | } | 3691 | } |
diff --git a/drivers/scsi/zalon.c b/drivers/scsi/zalon.c index 97f3158fa7b5..27e84e4b1fa9 100644 --- a/drivers/scsi/zalon.c +++ b/drivers/scsi/zalon.c | |||
@@ -134,7 +134,7 @@ zalon_probe(struct parisc_device *dev) | |||
134 | 134 | ||
135 | host = ncr_attach(&zalon7xx_template, unit, &device); | 135 | host = ncr_attach(&zalon7xx_template, unit, &device); |
136 | if (!host) | 136 | if (!host) |
137 | goto fail; | 137 | return -ENODEV; |
138 | 138 | ||
139 | if (request_irq(dev->irq, ncr53c8xx_intr, IRQF_SHARED, "zalon", host)) { | 139 | if (request_irq(dev->irq, ncr53c8xx_intr, IRQF_SHARED, "zalon", host)) { |
140 | dev_printk(KERN_ERR, &dev->dev, "irq problem with %d, detaching\n ", | 140 | dev_printk(KERN_ERR, &dev->dev, "irq problem with %d, detaching\n ", |
diff --git a/drivers/serial/vr41xx_siu.c b/drivers/serial/vr41xx_siu.c index 0573f3b5175e..dac550e57c29 100644 --- a/drivers/serial/vr41xx_siu.c +++ b/drivers/serial/vr41xx_siu.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Driver for NEC VR4100 series Serial Interface Unit. | 2 | * Driver for NEC VR4100 series Serial Interface Unit. |
3 | * | 3 | * |
4 | * Copyright (C) 2004-2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2004-2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * Based on drivers/serial/8250.c, by Russell King. | 6 | * Based on drivers/serial/8250.c, by Russell King. |
7 | * | 7 | * |
diff --git a/drivers/ssb/driver_mipscore.c b/drivers/ssb/driver_mipscore.c index 3fd3e3b412b6..3c6feed46f6e 100644 --- a/drivers/ssb/driver_mipscore.c +++ b/drivers/ssb/driver_mipscore.c | |||
@@ -49,29 +49,54 @@ static const u32 ipsflag_irq_shift[] = { | |||
49 | 49 | ||
50 | static inline u32 ssb_irqflag(struct ssb_device *dev) | 50 | static inline u32 ssb_irqflag(struct ssb_device *dev) |
51 | { | 51 | { |
52 | return ssb_read32(dev, SSB_TPSFLAG) & SSB_TPSFLAG_BPFLAG; | 52 | u32 tpsflag = ssb_read32(dev, SSB_TPSFLAG); |
53 | if (tpsflag) | ||
54 | return ssb_read32(dev, SSB_TPSFLAG) & SSB_TPSFLAG_BPFLAG; | ||
55 | else | ||
56 | /* not irq supported */ | ||
57 | return 0x3f; | ||
58 | } | ||
59 | |||
60 | static struct ssb_device *find_device(struct ssb_device *rdev, int irqflag) | ||
61 | { | ||
62 | struct ssb_bus *bus = rdev->bus; | ||
63 | int i; | ||
64 | for (i = 0; i < bus->nr_devices; i++) { | ||
65 | struct ssb_device *dev; | ||
66 | dev = &(bus->devices[i]); | ||
67 | if (ssb_irqflag(dev) == irqflag) | ||
68 | return dev; | ||
69 | } | ||
70 | return NULL; | ||
53 | } | 71 | } |
54 | 72 | ||
55 | /* Get the MIPS IRQ assignment for a specified device. | 73 | /* Get the MIPS IRQ assignment for a specified device. |
56 | * If unassigned, 0 is returned. | 74 | * If unassigned, 0 is returned. |
75 | * If disabled, 5 is returned. | ||
76 | * If not supported, 6 is returned. | ||
57 | */ | 77 | */ |
58 | unsigned int ssb_mips_irq(struct ssb_device *dev) | 78 | unsigned int ssb_mips_irq(struct ssb_device *dev) |
59 | { | 79 | { |
60 | struct ssb_bus *bus = dev->bus; | 80 | struct ssb_bus *bus = dev->bus; |
81 | struct ssb_device *mdev = bus->mipscore.dev; | ||
61 | u32 irqflag; | 82 | u32 irqflag; |
62 | u32 ipsflag; | 83 | u32 ipsflag; |
63 | u32 tmp; | 84 | u32 tmp; |
64 | unsigned int irq; | 85 | unsigned int irq; |
65 | 86 | ||
66 | irqflag = ssb_irqflag(dev); | 87 | irqflag = ssb_irqflag(dev); |
88 | if (irqflag == 0x3f) | ||
89 | return 6; | ||
67 | ipsflag = ssb_read32(bus->mipscore.dev, SSB_IPSFLAG); | 90 | ipsflag = ssb_read32(bus->mipscore.dev, SSB_IPSFLAG); |
68 | for (irq = 1; irq <= 4; irq++) { | 91 | for (irq = 1; irq <= 4; irq++) { |
69 | tmp = ((ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]); | 92 | tmp = ((ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]); |
70 | if (tmp == irqflag) | 93 | if (tmp == irqflag) |
71 | break; | 94 | break; |
72 | } | 95 | } |
73 | if (irq == 5) | 96 | if (irq == 5) { |
74 | irq = 0; | 97 | if ((1 << irqflag) & ssb_read32(mdev, SSB_INTVEC)) |
98 | irq = 0; | ||
99 | } | ||
75 | 100 | ||
76 | return irq; | 101 | return irq; |
77 | } | 102 | } |
@@ -97,25 +122,56 @@ static void set_irq(struct ssb_device *dev, unsigned int irq) | |||
97 | struct ssb_device *mdev = bus->mipscore.dev; | 122 | struct ssb_device *mdev = bus->mipscore.dev; |
98 | u32 irqflag = ssb_irqflag(dev); | 123 | u32 irqflag = ssb_irqflag(dev); |
99 | 124 | ||
125 | BUG_ON(oldirq == 6); | ||
126 | |||
100 | dev->irq = irq + 2; | 127 | dev->irq = irq + 2; |
101 | 128 | ||
102 | ssb_dprintk(KERN_INFO PFX | ||
103 | "set_irq: core 0x%04x, irq %d => %d\n", | ||
104 | dev->id.coreid, oldirq, irq); | ||
105 | /* clear the old irq */ | 129 | /* clear the old irq */ |
106 | if (oldirq == 0) | 130 | if (oldirq == 0) |
107 | ssb_write32(mdev, SSB_INTVEC, (~(1 << irqflag) & ssb_read32(mdev, SSB_INTVEC))); | 131 | ssb_write32(mdev, SSB_INTVEC, (~(1 << irqflag) & ssb_read32(mdev, SSB_INTVEC))); |
108 | else | 132 | else if (oldirq != 5) |
109 | clear_irq(bus, oldirq); | 133 | clear_irq(bus, oldirq); |
110 | 134 | ||
111 | /* assign the new one */ | 135 | /* assign the new one */ |
112 | if (irq == 0) { | 136 | if (irq == 0) { |
113 | ssb_write32(mdev, SSB_INTVEC, ((1 << irqflag) | ssb_read32(mdev, SSB_INTVEC))); | 137 | ssb_write32(mdev, SSB_INTVEC, ((1 << irqflag) | ssb_read32(mdev, SSB_INTVEC))); |
114 | } else { | 138 | } else { |
139 | u32 ipsflag = ssb_read32(mdev, SSB_IPSFLAG); | ||
140 | if ((ipsflag & ipsflag_irq_mask[irq]) != ipsflag_irq_mask[irq]) { | ||
141 | u32 oldipsflag = (ipsflag & ipsflag_irq_mask[irq]) >> ipsflag_irq_shift[irq]; | ||
142 | struct ssb_device *olddev = find_device(dev, oldipsflag); | ||
143 | if (olddev) | ||
144 | set_irq(olddev, 0); | ||
145 | } | ||
115 | irqflag <<= ipsflag_irq_shift[irq]; | 146 | irqflag <<= ipsflag_irq_shift[irq]; |
116 | irqflag |= (ssb_read32(mdev, SSB_IPSFLAG) & ~ipsflag_irq_mask[irq]); | 147 | irqflag |= (ipsflag & ~ipsflag_irq_mask[irq]); |
117 | ssb_write32(mdev, SSB_IPSFLAG, irqflag); | 148 | ssb_write32(mdev, SSB_IPSFLAG, irqflag); |
118 | } | 149 | } |
150 | ssb_dprintk(KERN_INFO PFX | ||
151 | "set_irq: core 0x%04x, irq %d => %d\n", | ||
152 | dev->id.coreid, oldirq+2, irq+2); | ||
153 | } | ||
154 | |||
155 | static void print_irq(struct ssb_device *dev, unsigned int irq) | ||
156 | { | ||
157 | int i; | ||
158 | static const char *irq_name[] = {"2(S)", "3", "4", "5", "6", "D", "I"}; | ||
159 | ssb_dprintk(KERN_INFO PFX | ||
160 | "core 0x%04x, irq :", dev->id.coreid); | ||
161 | for (i = 0; i <= 6; i++) { | ||
162 | ssb_dprintk(" %s%s", irq_name[i], i==irq?"*":" "); | ||
163 | } | ||
164 | ssb_dprintk("\n"); | ||
165 | } | ||
166 | |||
167 | static void dump_irq(struct ssb_bus *bus) | ||
168 | { | ||
169 | int i; | ||
170 | for (i = 0; i < bus->nr_devices; i++) { | ||
171 | struct ssb_device *dev; | ||
172 | dev = &(bus->devices[i]); | ||
173 | print_irq(dev, ssb_mips_irq(dev)); | ||
174 | } | ||
119 | } | 175 | } |
120 | 176 | ||
121 | static void ssb_mips_serial_init(struct ssb_mipscore *mcore) | 177 | static void ssb_mips_serial_init(struct ssb_mipscore *mcore) |
@@ -197,16 +253,23 @@ void ssb_mipscore_init(struct ssb_mipscore *mcore) | |||
197 | 253 | ||
198 | /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */ | 254 | /* Assign IRQs to all cores on the bus, start with irq line 2, because serial usually takes 1 */ |
199 | for (irq = 2, i = 0; i < bus->nr_devices; i++) { | 255 | for (irq = 2, i = 0; i < bus->nr_devices; i++) { |
256 | int mips_irq; | ||
200 | dev = &(bus->devices[i]); | 257 | dev = &(bus->devices[i]); |
201 | dev->irq = ssb_mips_irq(dev) + 2; | 258 | mips_irq = ssb_mips_irq(dev); |
259 | if (mips_irq > 4) | ||
260 | dev->irq = 0; | ||
261 | else | ||
262 | dev->irq = mips_irq + 2; | ||
263 | if (dev->irq > 5) | ||
264 | continue; | ||
202 | switch (dev->id.coreid) { | 265 | switch (dev->id.coreid) { |
203 | case SSB_DEV_USB11_HOST: | 266 | case SSB_DEV_USB11_HOST: |
204 | /* shouldn't need a separate irq line for non-4710, most of them have a proper | 267 | /* shouldn't need a separate irq line for non-4710, most of them have a proper |
205 | * external usb controller on the pci */ | 268 | * external usb controller on the pci */ |
206 | if ((bus->chip_id == 0x4710) && (irq <= 4)) { | 269 | if ((bus->chip_id == 0x4710) && (irq <= 4)) { |
207 | set_irq(dev, irq++); | 270 | set_irq(dev, irq++); |
208 | break; | ||
209 | } | 271 | } |
272 | break; | ||
210 | /* fallthrough */ | 273 | /* fallthrough */ |
211 | case SSB_DEV_PCI: | 274 | case SSB_DEV_PCI: |
212 | case SSB_DEV_ETHERNET: | 275 | case SSB_DEV_ETHERNET: |
@@ -220,6 +283,8 @@ void ssb_mipscore_init(struct ssb_mipscore *mcore) | |||
220 | } | 283 | } |
221 | } | 284 | } |
222 | } | 285 | } |
286 | ssb_dprintk(KERN_INFO PFX "after irq reconfiguration\n"); | ||
287 | dump_irq(bus); | ||
223 | 288 | ||
224 | ssb_mips_serial_init(mcore); | 289 | ssb_mips_serial_init(mcore); |
225 | ssb_mips_flash_detect(mcore); | 290 | ssb_mips_flash_detect(mcore); |
diff --git a/drivers/usb/mon/mon_bin.c b/drivers/usb/mon/mon_bin.c index f8d9045d668a..0f7a30b7d2d1 100644 --- a/drivers/usb/mon/mon_bin.c +++ b/drivers/usb/mon/mon_bin.c | |||
@@ -1261,7 +1261,7 @@ static int mon_alloc_buff(struct mon_pgmap *map, int npages) | |||
1261 | return -ENOMEM; | 1261 | return -ENOMEM; |
1262 | } | 1262 | } |
1263 | map[n].ptr = (unsigned char *) vaddr; | 1263 | map[n].ptr = (unsigned char *) vaddr; |
1264 | map[n].pg = virt_to_page(vaddr); | 1264 | map[n].pg = virt_to_page((void *) vaddr); |
1265 | } | 1265 | } |
1266 | return 0; | 1266 | return 0; |
1267 | } | 1267 | } |
diff --git a/drivers/video/Kconfig b/drivers/video/Kconfig index d6d65ef85f54..8afcf08eba98 100644 --- a/drivers/video/Kconfig +++ b/drivers/video/Kconfig | |||
@@ -616,6 +616,8 @@ config FB_STI | |||
616 | select FB_CFB_FILLRECT | 616 | select FB_CFB_FILLRECT |
617 | select FB_CFB_COPYAREA | 617 | select FB_CFB_COPYAREA |
618 | select FB_CFB_IMAGEBLIT | 618 | select FB_CFB_IMAGEBLIT |
619 | select STI_CONSOLE | ||
620 | select VT | ||
619 | default y | 621 | default y |
620 | ---help--- | 622 | ---help--- |
621 | STI refers to the HP "Standard Text Interface" which is a set of | 623 | STI refers to the HP "Standard Text Interface" which is a set of |
diff --git a/drivers/video/cobalt_lcdfb.c b/drivers/video/cobalt_lcdfb.c index 7bad24ed04ef..108b89e09a80 100644 --- a/drivers/video/cobalt_lcdfb.c +++ b/drivers/video/cobalt_lcdfb.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Cobalt server LCD frame buffer driver. | 2 | * Cobalt server LCD frame buffer driver. |
3 | * | 3 | * |
4 | * Copyright (C) 2008 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> | 4 | * Copyright (C) 2008 Yoichi Yuasa <yuasa@linux-mips.org> |
5 | * | 5 | * |
6 | * This program is free software; you can redistribute it and/or modify | 6 | * This program is free software; you can redistribute it and/or modify |
7 | * it under the terms of the GNU General Public License as published by | 7 | * it under the terms of the GNU General Public License as published by |
diff --git a/drivers/video/fbmem.c b/drivers/video/fbmem.c index 53ea05645ff8..53eb39652791 100644 --- a/drivers/video/fbmem.c +++ b/drivers/video/fbmem.c | |||
@@ -1513,8 +1513,6 @@ register_framebuffer(struct fb_info *fb_info) | |||
1513 | if (!registered_fb[i]) | 1513 | if (!registered_fb[i]) |
1514 | break; | 1514 | break; |
1515 | fb_info->node = i; | 1515 | fb_info->node = i; |
1516 | mutex_init(&fb_info->lock); | ||
1517 | mutex_init(&fb_info->mm_lock); | ||
1518 | 1516 | ||
1519 | fb_info->dev = device_create(fb_class, fb_info->device, | 1517 | fb_info->dev = device_create(fb_class, fb_info->device, |
1520 | MKDEV(FB_MAJOR, i), NULL, "fb%d", i); | 1518 | MKDEV(FB_MAJOR, i), NULL, "fb%d", i); |
diff --git a/drivers/video/fbsysfs.c b/drivers/video/fbsysfs.c index d4a2c11d9809..afc04df39a03 100644 --- a/drivers/video/fbsysfs.c +++ b/drivers/video/fbsysfs.c | |||
@@ -62,6 +62,9 @@ struct fb_info *framebuffer_alloc(size_t size, struct device *dev) | |||
62 | mutex_init(&info->bl_curve_mutex); | 62 | mutex_init(&info->bl_curve_mutex); |
63 | #endif | 63 | #endif |
64 | 64 | ||
65 | mutex_init(&info->lock); | ||
66 | mutex_init(&info->mm_lock); | ||
67 | |||
65 | return info; | 68 | return info; |
66 | #undef PADDING | 69 | #undef PADDING |
67 | #undef BYTES_PER_LONG | 70 | #undef BYTES_PER_LONG |
diff --git a/drivers/video/matrox/matroxfb_base.c b/drivers/video/matrox/matroxfb_base.c index 59c3a2e14913..76bc51b616d1 100644 --- a/drivers/video/matrox/matroxfb_base.c +++ b/drivers/video/matrox/matroxfb_base.c | |||
@@ -2083,6 +2083,7 @@ static int matroxfb_probe(struct pci_dev* pdev, const struct pci_device_id* dumm | |||
2083 | spin_lock_init(&ACCESS_FBINFO(lock.accel)); | 2083 | spin_lock_init(&ACCESS_FBINFO(lock.accel)); |
2084 | init_rwsem(&ACCESS_FBINFO(crtc2.lock)); | 2084 | init_rwsem(&ACCESS_FBINFO(crtc2.lock)); |
2085 | init_rwsem(&ACCESS_FBINFO(altout.lock)); | 2085 | init_rwsem(&ACCESS_FBINFO(altout.lock)); |
2086 | mutex_init(&ACCESS_FBINFO(fbcon).lock); | ||
2086 | mutex_init(&ACCESS_FBINFO(fbcon).mm_lock); | 2087 | mutex_init(&ACCESS_FBINFO(fbcon).mm_lock); |
2087 | ACCESS_FBINFO(irq_flags) = 0; | 2088 | ACCESS_FBINFO(irq_flags) = 0; |
2088 | init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait)); | 2089 | init_waitqueue_head(&ACCESS_FBINFO(crtc1.vsync.wait)); |
diff --git a/drivers/video/s3c-fb.c b/drivers/video/s3c-fb.c index 43680e545427..bb63c07e13de 100644 --- a/drivers/video/s3c-fb.c +++ b/drivers/video/s3c-fb.c | |||
@@ -211,23 +211,21 @@ static int s3c_fb_check_var(struct fb_var_screeninfo *var, | |||
211 | 211 | ||
212 | /** | 212 | /** |
213 | * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock. | 213 | * s3c_fb_calc_pixclk() - calculate the divider to create the pixel clock. |
214 | * @id: window id. | ||
214 | * @sfb: The hardware state. | 215 | * @sfb: The hardware state. |
215 | * @pixclock: The pixel clock wanted, in picoseconds. | 216 | * @pixclock: The pixel clock wanted, in picoseconds. |
216 | * | 217 | * |
217 | * Given the specified pixel clock, work out the necessary divider to get | 218 | * Given the specified pixel clock, work out the necessary divider to get |
218 | * close to the output frequency. | 219 | * close to the output frequency. |
219 | */ | 220 | */ |
220 | static int s3c_fb_calc_pixclk(struct s3c_fb *sfb, unsigned int pixclk) | 221 | static int s3c_fb_calc_pixclk(unsigned char id, struct s3c_fb *sfb, unsigned int pixclk) |
221 | { | 222 | { |
223 | struct s3c_fb_pd_win *win = sfb->pdata->win[id]; | ||
222 | unsigned long clk = clk_get_rate(sfb->bus_clk); | 224 | unsigned long clk = clk_get_rate(sfb->bus_clk); |
223 | unsigned long long tmp; | ||
224 | unsigned int result; | 225 | unsigned int result; |
225 | 226 | ||
226 | tmp = (unsigned long long)clk; | 227 | pixclk *= win->win_mode.refresh; |
227 | tmp *= pixclk; | 228 | result = clk / pixclk; |
228 | |||
229 | do_div(tmp, 1000000000UL); | ||
230 | result = (unsigned int)tmp / 1000; | ||
231 | 229 | ||
232 | dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n", | 230 | dev_dbg(sfb->dev, "pixclk=%u, clk=%lu, div=%d (%lu)\n", |
233 | pixclk, clk, result, clk / result); | 231 | pixclk, clk, result, clk / result); |
@@ -267,6 +265,7 @@ static int s3c_fb_set_par(struct fb_info *info) | |||
267 | struct s3c_fb *sfb = win->parent; | 265 | struct s3c_fb *sfb = win->parent; |
268 | void __iomem *regs = sfb->regs; | 266 | void __iomem *regs = sfb->regs; |
269 | int win_no = win->index; | 267 | int win_no = win->index; |
268 | u32 osdc_data = 0; | ||
270 | u32 data; | 269 | u32 data; |
271 | u32 pagewidth; | 270 | u32 pagewidth; |
272 | int clkdiv; | 271 | int clkdiv; |
@@ -302,7 +301,7 @@ static int s3c_fb_set_par(struct fb_info *info) | |||
302 | /* use window 0 as the basis for the lcd output timings */ | 301 | /* use window 0 as the basis for the lcd output timings */ |
303 | 302 | ||
304 | if (win_no == 0) { | 303 | if (win_no == 0) { |
305 | clkdiv = s3c_fb_calc_pixclk(sfb, var->pixclock); | 304 | clkdiv = s3c_fb_calc_pixclk(win_no, sfb, var->pixclock); |
306 | 305 | ||
307 | data = sfb->pdata->vidcon0; | 306 | data = sfb->pdata->vidcon0; |
308 | data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR); | 307 | data &= ~(VIDCON0_CLKVAL_F_MASK | VIDCON0_CLKDIR); |
@@ -359,8 +358,6 @@ static int s3c_fb_set_par(struct fb_info *info) | |||
359 | 358 | ||
360 | data = var->xres * var->yres; | 359 | data = var->xres * var->yres; |
361 | 360 | ||
362 | u32 osdc_data = 0; | ||
363 | |||
364 | osdc_data = VIDISD14C_ALPHA1_R(0xf) | | 361 | osdc_data = VIDISD14C_ALPHA1_R(0xf) | |
365 | VIDISD14C_ALPHA1_G(0xf) | | 362 | VIDISD14C_ALPHA1_G(0xf) | |
366 | VIDISD14C_ALPHA1_B(0xf); | 363 | VIDISD14C_ALPHA1_B(0xf); |
diff --git a/drivers/video/sis/sis_main.c b/drivers/video/sis/sis_main.c index fd33455389b8..4a067f0d0ceb 100644 --- a/drivers/video/sis/sis_main.c +++ b/drivers/video/sis/sis_main.c | |||
@@ -6367,7 +6367,6 @@ error_3: vfree(ivideo->bios_abase); | |||
6367 | sis_fb_info->fix = ivideo->sisfb_fix; | 6367 | sis_fb_info->fix = ivideo->sisfb_fix; |
6368 | sis_fb_info->screen_base = ivideo->video_vbase + ivideo->video_offset; | 6368 | sis_fb_info->screen_base = ivideo->video_vbase + ivideo->video_offset; |
6369 | sis_fb_info->fbops = &sisfb_ops; | 6369 | sis_fb_info->fbops = &sisfb_ops; |
6370 | sisfb_get_fix(&sis_fb_info->fix, -1, sis_fb_info); | ||
6371 | sis_fb_info->pseudo_palette = ivideo->pseudo_palette; | 6370 | sis_fb_info->pseudo_palette = ivideo->pseudo_palette; |
6372 | 6371 | ||
6373 | fb_alloc_cmap(&sis_fb_info->cmap, 256 , 0); | 6372 | fb_alloc_cmap(&sis_fb_info->cmap, 256 , 0); |
diff --git a/drivers/vlynq/Kconfig b/drivers/vlynq/Kconfig index f6542211db48..a9efb1625321 100644 --- a/drivers/vlynq/Kconfig +++ b/drivers/vlynq/Kconfig | |||
@@ -13,7 +13,7 @@ config VLYNQ | |||
13 | 13 | ||
14 | config VLYNQ_DEBUG | 14 | config VLYNQ_DEBUG |
15 | bool "VLYNQ bus debug" | 15 | bool "VLYNQ bus debug" |
16 | depends on VLYNQ && KERNEL_DEBUG | 16 | depends on VLYNQ && DEBUG_KERNEL |
17 | help | 17 | help |
18 | Turn on VLYNQ bus debugging. | 18 | Turn on VLYNQ bus debugging. |
19 | 19 | ||
diff --git a/drivers/vlynq/vlynq.c b/drivers/vlynq/vlynq.c index 7335433b067b..f05d2a368367 100644 --- a/drivers/vlynq/vlynq.c +++ b/drivers/vlynq/vlynq.c | |||
@@ -76,7 +76,7 @@ struct vlynq_regs { | |||
76 | u32 int_device[8]; | 76 | u32 int_device[8]; |
77 | }; | 77 | }; |
78 | 78 | ||
79 | #ifdef VLYNQ_DEBUG | 79 | #ifdef CONFIG_VLYNQ_DEBUG |
80 | static void vlynq_dump_regs(struct vlynq_device *dev) | 80 | static void vlynq_dump_regs(struct vlynq_device *dev) |
81 | { | 81 | { |
82 | int i; | 82 | int i; |
diff --git a/fs/btrfs/async-thread.c b/fs/btrfs/async-thread.c index 7f88628a1a72..6e4f6c50a120 100644 --- a/fs/btrfs/async-thread.c +++ b/fs/btrfs/async-thread.c | |||
@@ -299,8 +299,8 @@ int btrfs_start_workers(struct btrfs_workers *workers, int num_workers) | |||
299 | "btrfs-%s-%d", workers->name, | 299 | "btrfs-%s-%d", workers->name, |
300 | workers->num_workers + i); | 300 | workers->num_workers + i); |
301 | if (IS_ERR(worker->task)) { | 301 | if (IS_ERR(worker->task)) { |
302 | kfree(worker); | ||
303 | ret = PTR_ERR(worker->task); | 302 | ret = PTR_ERR(worker->task); |
303 | kfree(worker); | ||
304 | goto fail; | 304 | goto fail; |
305 | } | 305 | } |
306 | 306 | ||
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h index 2779c2f5360a..98a873838717 100644 --- a/fs/btrfs/ctree.h +++ b/fs/btrfs/ctree.h | |||
@@ -2074,8 +2074,7 @@ static inline int btrfs_insert_empty_item(struct btrfs_trans_handle *trans, | |||
2074 | int btrfs_next_leaf(struct btrfs_root *root, struct btrfs_path *path); | 2074 | int btrfs_next_leaf(struct btrfs_root *root, struct btrfs_path *path); |
2075 | int btrfs_prev_leaf(struct btrfs_root *root, struct btrfs_path *path); | 2075 | int btrfs_prev_leaf(struct btrfs_root *root, struct btrfs_path *path); |
2076 | int btrfs_leaf_free_space(struct btrfs_root *root, struct extent_buffer *leaf); | 2076 | int btrfs_leaf_free_space(struct btrfs_root *root, struct extent_buffer *leaf); |
2077 | int btrfs_drop_snapshot(struct btrfs_trans_handle *trans, struct btrfs_root | 2077 | int btrfs_drop_snapshot(struct btrfs_root *root, int update_ref); |
2078 | *root); | ||
2079 | int btrfs_drop_subtree(struct btrfs_trans_handle *trans, | 2078 | int btrfs_drop_subtree(struct btrfs_trans_handle *trans, |
2080 | struct btrfs_root *root, | 2079 | struct btrfs_root *root, |
2081 | struct extent_buffer *node, | 2080 | struct extent_buffer *node, |
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c index edc7d208c5ce..a5aca3997d42 100644 --- a/fs/btrfs/extent-tree.c +++ b/fs/btrfs/extent-tree.c | |||
@@ -990,15 +990,13 @@ static inline int extent_ref_type(u64 parent, u64 owner) | |||
990 | return type; | 990 | return type; |
991 | } | 991 | } |
992 | 992 | ||
993 | static int find_next_key(struct btrfs_path *path, struct btrfs_key *key) | 993 | static int find_next_key(struct btrfs_path *path, int level, |
994 | struct btrfs_key *key) | ||
994 | 995 | ||
995 | { | 996 | { |
996 | int level; | 997 | for (; level < BTRFS_MAX_LEVEL; level++) { |
997 | BUG_ON(!path->keep_locks); | ||
998 | for (level = 0; level < BTRFS_MAX_LEVEL; level++) { | ||
999 | if (!path->nodes[level]) | 998 | if (!path->nodes[level]) |
1000 | break; | 999 | break; |
1001 | btrfs_assert_tree_locked(path->nodes[level]); | ||
1002 | if (path->slots[level] + 1 >= | 1000 | if (path->slots[level] + 1 >= |
1003 | btrfs_header_nritems(path->nodes[level])) | 1001 | btrfs_header_nritems(path->nodes[level])) |
1004 | continue; | 1002 | continue; |
@@ -1158,7 +1156,8 @@ int lookup_inline_extent_backref(struct btrfs_trans_handle *trans, | |||
1158 | * For simplicity, we just do not add new inline back | 1156 | * For simplicity, we just do not add new inline back |
1159 | * ref if there is any kind of item for this block | 1157 | * ref if there is any kind of item for this block |
1160 | */ | 1158 | */ |
1161 | if (find_next_key(path, &key) == 0 && key.objectid == bytenr && | 1159 | if (find_next_key(path, 0, &key) == 0 && |
1160 | key.objectid == bytenr && | ||
1162 | key.type < BTRFS_BLOCK_GROUP_ITEM_KEY) { | 1161 | key.type < BTRFS_BLOCK_GROUP_ITEM_KEY) { |
1163 | err = -EAGAIN; | 1162 | err = -EAGAIN; |
1164 | goto out; | 1163 | goto out; |
@@ -2697,7 +2696,7 @@ again: | |||
2697 | 2696 | ||
2698 | printk(KERN_ERR "no space left, need %llu, %llu delalloc bytes" | 2697 | printk(KERN_ERR "no space left, need %llu, %llu delalloc bytes" |
2699 | ", %llu bytes_used, %llu bytes_reserved, " | 2698 | ", %llu bytes_used, %llu bytes_reserved, " |
2700 | "%llu bytes_pinned, %llu bytes_readonly, %llu may use" | 2699 | "%llu bytes_pinned, %llu bytes_readonly, %llu may use " |
2701 | "%llu total\n", (unsigned long long)bytes, | 2700 | "%llu total\n", (unsigned long long)bytes, |
2702 | (unsigned long long)data_sinfo->bytes_delalloc, | 2701 | (unsigned long long)data_sinfo->bytes_delalloc, |
2703 | (unsigned long long)data_sinfo->bytes_used, | 2702 | (unsigned long long)data_sinfo->bytes_used, |
@@ -4128,6 +4127,7 @@ struct extent_buffer *btrfs_alloc_free_block(struct btrfs_trans_handle *trans, | |||
4128 | return buf; | 4127 | return buf; |
4129 | } | 4128 | } |
4130 | 4129 | ||
4130 | #if 0 | ||
4131 | int btrfs_drop_leaf_ref(struct btrfs_trans_handle *trans, | 4131 | int btrfs_drop_leaf_ref(struct btrfs_trans_handle *trans, |
4132 | struct btrfs_root *root, struct extent_buffer *leaf) | 4132 | struct btrfs_root *root, struct extent_buffer *leaf) |
4133 | { | 4133 | { |
@@ -4171,8 +4171,6 @@ int btrfs_drop_leaf_ref(struct btrfs_trans_handle *trans, | |||
4171 | return 0; | 4171 | return 0; |
4172 | } | 4172 | } |
4173 | 4173 | ||
4174 | #if 0 | ||
4175 | |||
4176 | static noinline int cache_drop_leaf_ref(struct btrfs_trans_handle *trans, | 4174 | static noinline int cache_drop_leaf_ref(struct btrfs_trans_handle *trans, |
4177 | struct btrfs_root *root, | 4175 | struct btrfs_root *root, |
4178 | struct btrfs_leaf_ref *ref) | 4176 | struct btrfs_leaf_ref *ref) |
@@ -4553,262 +4551,471 @@ out: | |||
4553 | } | 4551 | } |
4554 | #endif | 4552 | #endif |
4555 | 4553 | ||
4554 | struct walk_control { | ||
4555 | u64 refs[BTRFS_MAX_LEVEL]; | ||
4556 | u64 flags[BTRFS_MAX_LEVEL]; | ||
4557 | struct btrfs_key update_progress; | ||
4558 | int stage; | ||
4559 | int level; | ||
4560 | int shared_level; | ||
4561 | int update_ref; | ||
4562 | int keep_locks; | ||
4563 | }; | ||
4564 | |||
4565 | #define DROP_REFERENCE 1 | ||
4566 | #define UPDATE_BACKREF 2 | ||
4567 | |||
4556 | /* | 4568 | /* |
4557 | * helper function for drop_subtree, this function is similar to | 4569 | * hepler to process tree block while walking down the tree. |
4558 | * walk_down_tree. The main difference is that it checks reference | 4570 | * |
4559 | * counts while tree blocks are locked. | 4571 | * when wc->stage == DROP_REFERENCE, this function checks |
4572 | * reference count of the block. if the block is shared and | ||
4573 | * we need update back refs for the subtree rooted at the | ||
4574 | * block, this function changes wc->stage to UPDATE_BACKREF | ||
4575 | * | ||
4576 | * when wc->stage == UPDATE_BACKREF, this function updates | ||
4577 | * back refs for pointers in the block. | ||
4578 | * | ||
4579 | * NOTE: return value 1 means we should stop walking down. | ||
4560 | */ | 4580 | */ |
4561 | static noinline int walk_down_tree(struct btrfs_trans_handle *trans, | 4581 | static noinline int walk_down_proc(struct btrfs_trans_handle *trans, |
4562 | struct btrfs_root *root, | 4582 | struct btrfs_root *root, |
4563 | struct btrfs_path *path, int *level) | 4583 | struct btrfs_path *path, |
4584 | struct walk_control *wc) | ||
4564 | { | 4585 | { |
4565 | struct extent_buffer *next; | 4586 | int level = wc->level; |
4566 | struct extent_buffer *cur; | 4587 | struct extent_buffer *eb = path->nodes[level]; |
4567 | struct extent_buffer *parent; | 4588 | struct btrfs_key key; |
4568 | u64 bytenr; | 4589 | u64 flag = BTRFS_BLOCK_FLAG_FULL_BACKREF; |
4569 | u64 ptr_gen; | ||
4570 | u64 refs; | ||
4571 | u64 flags; | ||
4572 | u32 blocksize; | ||
4573 | int ret; | 4590 | int ret; |
4574 | 4591 | ||
4575 | cur = path->nodes[*level]; | 4592 | if (wc->stage == UPDATE_BACKREF && |
4576 | ret = btrfs_lookup_extent_info(trans, root, cur->start, cur->len, | 4593 | btrfs_header_owner(eb) != root->root_key.objectid) |
4577 | &refs, &flags); | 4594 | return 1; |
4578 | BUG_ON(ret); | ||
4579 | if (refs > 1) | ||
4580 | goto out; | ||
4581 | 4595 | ||
4582 | BUG_ON(!(flags & BTRFS_BLOCK_FLAG_FULL_BACKREF)); | 4596 | /* |
4597 | * when reference count of tree block is 1, it won't increase | ||
4598 | * again. once full backref flag is set, we never clear it. | ||
4599 | */ | ||
4600 | if ((wc->stage == DROP_REFERENCE && wc->refs[level] != 1) || | ||
4601 | (wc->stage == UPDATE_BACKREF && !(wc->flags[level] & flag))) { | ||
4602 | BUG_ON(!path->locks[level]); | ||
4603 | ret = btrfs_lookup_extent_info(trans, root, | ||
4604 | eb->start, eb->len, | ||
4605 | &wc->refs[level], | ||
4606 | &wc->flags[level]); | ||
4607 | BUG_ON(ret); | ||
4608 | BUG_ON(wc->refs[level] == 0); | ||
4609 | } | ||
4583 | 4610 | ||
4584 | while (*level >= 0) { | 4611 | if (wc->stage == DROP_REFERENCE && |
4585 | cur = path->nodes[*level]; | 4612 | wc->update_ref && wc->refs[level] > 1) { |
4586 | if (*level == 0) { | 4613 | BUG_ON(eb == root->node); |
4587 | ret = btrfs_drop_leaf_ref(trans, root, cur); | 4614 | BUG_ON(path->slots[level] > 0); |
4588 | BUG_ON(ret); | 4615 | if (level == 0) |
4589 | clean_tree_block(trans, root, cur); | 4616 | btrfs_item_key_to_cpu(eb, &key, path->slots[level]); |
4590 | break; | 4617 | else |
4591 | } | 4618 | btrfs_node_key_to_cpu(eb, &key, path->slots[level]); |
4592 | if (path->slots[*level] >= btrfs_header_nritems(cur)) { | 4619 | if (btrfs_header_owner(eb) == root->root_key.objectid && |
4593 | clean_tree_block(trans, root, cur); | 4620 | btrfs_comp_cpu_keys(&key, &wc->update_progress) >= 0) { |
4594 | break; | 4621 | wc->stage = UPDATE_BACKREF; |
4622 | wc->shared_level = level; | ||
4595 | } | 4623 | } |
4624 | } | ||
4596 | 4625 | ||
4597 | bytenr = btrfs_node_blockptr(cur, path->slots[*level]); | 4626 | if (wc->stage == DROP_REFERENCE) { |
4598 | blocksize = btrfs_level_size(root, *level - 1); | 4627 | if (wc->refs[level] > 1) |
4599 | ptr_gen = btrfs_node_ptr_generation(cur, path->slots[*level]); | 4628 | return 1; |
4600 | 4629 | ||
4601 | next = read_tree_block(root, bytenr, blocksize, ptr_gen); | 4630 | if (path->locks[level] && !wc->keep_locks) { |
4602 | btrfs_tree_lock(next); | 4631 | btrfs_tree_unlock(eb); |
4603 | btrfs_set_lock_blocking(next); | 4632 | path->locks[level] = 0; |
4633 | } | ||
4634 | return 0; | ||
4635 | } | ||
4604 | 4636 | ||
4605 | ret = btrfs_lookup_extent_info(trans, root, bytenr, blocksize, | 4637 | /* wc->stage == UPDATE_BACKREF */ |
4606 | &refs, &flags); | 4638 | if (!(wc->flags[level] & flag)) { |
4639 | BUG_ON(!path->locks[level]); | ||
4640 | ret = btrfs_inc_ref(trans, root, eb, 1); | ||
4607 | BUG_ON(ret); | 4641 | BUG_ON(ret); |
4608 | if (refs > 1) { | 4642 | ret = btrfs_dec_ref(trans, root, eb, 0); |
4609 | parent = path->nodes[*level]; | 4643 | BUG_ON(ret); |
4610 | ret = btrfs_free_extent(trans, root, bytenr, | 4644 | ret = btrfs_set_disk_extent_flags(trans, root, eb->start, |
4611 | blocksize, parent->start, | 4645 | eb->len, flag, 0); |
4612 | btrfs_header_owner(parent), | 4646 | BUG_ON(ret); |
4613 | *level - 1, 0); | 4647 | wc->flags[level] |= flag; |
4648 | } | ||
4649 | |||
4650 | /* | ||
4651 | * the block is shared by multiple trees, so it's not good to | ||
4652 | * keep the tree lock | ||
4653 | */ | ||
4654 | if (path->locks[level] && level > 0) { | ||
4655 | btrfs_tree_unlock(eb); | ||
4656 | path->locks[level] = 0; | ||
4657 | } | ||
4658 | return 0; | ||
4659 | } | ||
4660 | |||
4661 | /* | ||
4662 | * hepler to process tree block while walking up the tree. | ||
4663 | * | ||
4664 | * when wc->stage == DROP_REFERENCE, this function drops | ||
4665 | * reference count on the block. | ||
4666 | * | ||
4667 | * when wc->stage == UPDATE_BACKREF, this function changes | ||
4668 | * wc->stage back to DROP_REFERENCE if we changed wc->stage | ||
4669 | * to UPDATE_BACKREF previously while processing the block. | ||
4670 | * | ||
4671 | * NOTE: return value 1 means we should stop walking up. | ||
4672 | */ | ||
4673 | static noinline int walk_up_proc(struct btrfs_trans_handle *trans, | ||
4674 | struct btrfs_root *root, | ||
4675 | struct btrfs_path *path, | ||
4676 | struct walk_control *wc) | ||
4677 | { | ||
4678 | int ret = 0; | ||
4679 | int level = wc->level; | ||
4680 | struct extent_buffer *eb = path->nodes[level]; | ||
4681 | u64 parent = 0; | ||
4682 | |||
4683 | if (wc->stage == UPDATE_BACKREF) { | ||
4684 | BUG_ON(wc->shared_level < level); | ||
4685 | if (level < wc->shared_level) | ||
4686 | goto out; | ||
4687 | |||
4688 | BUG_ON(wc->refs[level] <= 1); | ||
4689 | ret = find_next_key(path, level + 1, &wc->update_progress); | ||
4690 | if (ret > 0) | ||
4691 | wc->update_ref = 0; | ||
4692 | |||
4693 | wc->stage = DROP_REFERENCE; | ||
4694 | wc->shared_level = -1; | ||
4695 | path->slots[level] = 0; | ||
4696 | |||
4697 | /* | ||
4698 | * check reference count again if the block isn't locked. | ||
4699 | * we should start walking down the tree again if reference | ||
4700 | * count is one. | ||
4701 | */ | ||
4702 | if (!path->locks[level]) { | ||
4703 | BUG_ON(level == 0); | ||
4704 | btrfs_tree_lock(eb); | ||
4705 | btrfs_set_lock_blocking(eb); | ||
4706 | path->locks[level] = 1; | ||
4707 | |||
4708 | ret = btrfs_lookup_extent_info(trans, root, | ||
4709 | eb->start, eb->len, | ||
4710 | &wc->refs[level], | ||
4711 | &wc->flags[level]); | ||
4614 | BUG_ON(ret); | 4712 | BUG_ON(ret); |
4615 | path->slots[*level]++; | 4713 | BUG_ON(wc->refs[level] == 0); |
4616 | btrfs_tree_unlock(next); | 4714 | if (wc->refs[level] == 1) { |
4617 | free_extent_buffer(next); | 4715 | btrfs_tree_unlock(eb); |
4618 | continue; | 4716 | path->locks[level] = 0; |
4717 | return 1; | ||
4718 | } | ||
4719 | } else { | ||
4720 | BUG_ON(level != 0); | ||
4619 | } | 4721 | } |
4722 | } | ||
4620 | 4723 | ||
4621 | BUG_ON(!(flags & BTRFS_BLOCK_FLAG_FULL_BACKREF)); | 4724 | /* wc->stage == DROP_REFERENCE */ |
4725 | BUG_ON(wc->refs[level] > 1 && !path->locks[level]); | ||
4622 | 4726 | ||
4623 | *level = btrfs_header_level(next); | 4727 | if (wc->refs[level] == 1) { |
4624 | path->nodes[*level] = next; | 4728 | if (level == 0) { |
4625 | path->slots[*level] = 0; | 4729 | if (wc->flags[level] & BTRFS_BLOCK_FLAG_FULL_BACKREF) |
4626 | path->locks[*level] = 1; | 4730 | ret = btrfs_dec_ref(trans, root, eb, 1); |
4627 | cond_resched(); | 4731 | else |
4732 | ret = btrfs_dec_ref(trans, root, eb, 0); | ||
4733 | BUG_ON(ret); | ||
4734 | } | ||
4735 | /* make block locked assertion in clean_tree_block happy */ | ||
4736 | if (!path->locks[level] && | ||
4737 | btrfs_header_generation(eb) == trans->transid) { | ||
4738 | btrfs_tree_lock(eb); | ||
4739 | btrfs_set_lock_blocking(eb); | ||
4740 | path->locks[level] = 1; | ||
4741 | } | ||
4742 | clean_tree_block(trans, root, eb); | ||
4743 | } | ||
4744 | |||
4745 | if (eb == root->node) { | ||
4746 | if (wc->flags[level] & BTRFS_BLOCK_FLAG_FULL_BACKREF) | ||
4747 | parent = eb->start; | ||
4748 | else | ||
4749 | BUG_ON(root->root_key.objectid != | ||
4750 | btrfs_header_owner(eb)); | ||
4751 | } else { | ||
4752 | if (wc->flags[level + 1] & BTRFS_BLOCK_FLAG_FULL_BACKREF) | ||
4753 | parent = path->nodes[level + 1]->start; | ||
4754 | else | ||
4755 | BUG_ON(root->root_key.objectid != | ||
4756 | btrfs_header_owner(path->nodes[level + 1])); | ||
4628 | } | 4757 | } |
4629 | out: | ||
4630 | if (path->nodes[*level] == root->node) | ||
4631 | parent = path->nodes[*level]; | ||
4632 | else | ||
4633 | parent = path->nodes[*level + 1]; | ||
4634 | bytenr = path->nodes[*level]->start; | ||
4635 | blocksize = path->nodes[*level]->len; | ||
4636 | 4758 | ||
4637 | ret = btrfs_free_extent(trans, root, bytenr, blocksize, parent->start, | 4759 | ret = btrfs_free_extent(trans, root, eb->start, eb->len, parent, |
4638 | btrfs_header_owner(parent), *level, 0); | 4760 | root->root_key.objectid, level, 0); |
4639 | BUG_ON(ret); | 4761 | BUG_ON(ret); |
4762 | out: | ||
4763 | wc->refs[level] = 0; | ||
4764 | wc->flags[level] = 0; | ||
4765 | return ret; | ||
4766 | } | ||
4767 | |||
4768 | static noinline int walk_down_tree(struct btrfs_trans_handle *trans, | ||
4769 | struct btrfs_root *root, | ||
4770 | struct btrfs_path *path, | ||
4771 | struct walk_control *wc) | ||
4772 | { | ||
4773 | struct extent_buffer *next; | ||
4774 | struct extent_buffer *cur; | ||
4775 | u64 bytenr; | ||
4776 | u64 ptr_gen; | ||
4777 | u32 blocksize; | ||
4778 | int level = wc->level; | ||
4779 | int ret; | ||
4780 | |||
4781 | while (level >= 0) { | ||
4782 | cur = path->nodes[level]; | ||
4783 | BUG_ON(path->slots[level] >= btrfs_header_nritems(cur)); | ||
4640 | 4784 | ||
4641 | if (path->locks[*level]) { | 4785 | ret = walk_down_proc(trans, root, path, wc); |
4642 | btrfs_tree_unlock(path->nodes[*level]); | 4786 | if (ret > 0) |
4643 | path->locks[*level] = 0; | 4787 | break; |
4788 | |||
4789 | if (level == 0) | ||
4790 | break; | ||
4791 | |||
4792 | bytenr = btrfs_node_blockptr(cur, path->slots[level]); | ||
4793 | blocksize = btrfs_level_size(root, level - 1); | ||
4794 | ptr_gen = btrfs_node_ptr_generation(cur, path->slots[level]); | ||
4795 | |||
4796 | next = read_tree_block(root, bytenr, blocksize, ptr_gen); | ||
4797 | btrfs_tree_lock(next); | ||
4798 | btrfs_set_lock_blocking(next); | ||
4799 | |||
4800 | level--; | ||
4801 | BUG_ON(level != btrfs_header_level(next)); | ||
4802 | path->nodes[level] = next; | ||
4803 | path->slots[level] = 0; | ||
4804 | path->locks[level] = 1; | ||
4805 | wc->level = level; | ||
4644 | } | 4806 | } |
4645 | free_extent_buffer(path->nodes[*level]); | ||
4646 | path->nodes[*level] = NULL; | ||
4647 | *level += 1; | ||
4648 | cond_resched(); | ||
4649 | return 0; | 4807 | return 0; |
4650 | } | 4808 | } |
4651 | 4809 | ||
4652 | /* | ||
4653 | * helper for dropping snapshots. This walks back up the tree in the path | ||
4654 | * to find the first node higher up where we haven't yet gone through | ||
4655 | * all the slots | ||
4656 | */ | ||
4657 | static noinline int walk_up_tree(struct btrfs_trans_handle *trans, | 4810 | static noinline int walk_up_tree(struct btrfs_trans_handle *trans, |
4658 | struct btrfs_root *root, | 4811 | struct btrfs_root *root, |
4659 | struct btrfs_path *path, | 4812 | struct btrfs_path *path, |
4660 | int *level, int max_level) | 4813 | struct walk_control *wc, int max_level) |
4661 | { | 4814 | { |
4662 | struct btrfs_root_item *root_item = &root->root_item; | 4815 | int level = wc->level; |
4663 | int i; | ||
4664 | int slot; | ||
4665 | int ret; | 4816 | int ret; |
4666 | 4817 | ||
4667 | for (i = *level; i < max_level && path->nodes[i]; i++) { | 4818 | path->slots[level] = btrfs_header_nritems(path->nodes[level]); |
4668 | slot = path->slots[i]; | 4819 | while (level < max_level && path->nodes[level]) { |
4669 | if (slot + 1 < btrfs_header_nritems(path->nodes[i])) { | 4820 | wc->level = level; |
4670 | /* | 4821 | if (path->slots[level] + 1 < |
4671 | * there is more work to do in this level. | 4822 | btrfs_header_nritems(path->nodes[level])) { |
4672 | * Update the drop_progress marker to reflect | 4823 | path->slots[level]++; |
4673 | * the work we've done so far, and then bump | ||
4674 | * the slot number | ||
4675 | */ | ||
4676 | path->slots[i]++; | ||
4677 | WARN_ON(*level == 0); | ||
4678 | if (max_level == BTRFS_MAX_LEVEL) { | ||
4679 | btrfs_node_key(path->nodes[i], | ||
4680 | &root_item->drop_progress, | ||
4681 | path->slots[i]); | ||
4682 | root_item->drop_level = i; | ||
4683 | } | ||
4684 | *level = i; | ||
4685 | return 0; | 4824 | return 0; |
4686 | } else { | 4825 | } else { |
4687 | struct extent_buffer *parent; | 4826 | ret = walk_up_proc(trans, root, path, wc); |
4688 | 4827 | if (ret > 0) | |
4689 | /* | 4828 | return 0; |
4690 | * this whole node is done, free our reference | ||
4691 | * on it and go up one level | ||
4692 | */ | ||
4693 | if (path->nodes[*level] == root->node) | ||
4694 | parent = path->nodes[*level]; | ||
4695 | else | ||
4696 | parent = path->nodes[*level + 1]; | ||
4697 | 4829 | ||
4698 | clean_tree_block(trans, root, path->nodes[i]); | 4830 | if (path->locks[level]) { |
4699 | ret = btrfs_free_extent(trans, root, | 4831 | btrfs_tree_unlock(path->nodes[level]); |
4700 | path->nodes[i]->start, | 4832 | path->locks[level] = 0; |
4701 | path->nodes[i]->len, | ||
4702 | parent->start, | ||
4703 | btrfs_header_owner(parent), | ||
4704 | *level, 0); | ||
4705 | BUG_ON(ret); | ||
4706 | if (path->locks[*level]) { | ||
4707 | btrfs_tree_unlock(path->nodes[i]); | ||
4708 | path->locks[i] = 0; | ||
4709 | } | 4833 | } |
4710 | free_extent_buffer(path->nodes[i]); | 4834 | free_extent_buffer(path->nodes[level]); |
4711 | path->nodes[i] = NULL; | 4835 | path->nodes[level] = NULL; |
4712 | *level = i + 1; | 4836 | level++; |
4713 | } | 4837 | } |
4714 | } | 4838 | } |
4715 | return 1; | 4839 | return 1; |
4716 | } | 4840 | } |
4717 | 4841 | ||
4718 | /* | 4842 | /* |
4719 | * drop the reference count on the tree rooted at 'snap'. This traverses | 4843 | * drop a subvolume tree. |
4720 | * the tree freeing any blocks that have a ref count of zero after being | 4844 | * |
4721 | * decremented. | 4845 | * this function traverses the tree freeing any blocks that only |
4846 | * referenced by the tree. | ||
4847 | * | ||
4848 | * when a shared tree block is found. this function decreases its | ||
4849 | * reference count by one. if update_ref is true, this function | ||
4850 | * also make sure backrefs for the shared block and all lower level | ||
4851 | * blocks are properly updated. | ||
4722 | */ | 4852 | */ |
4723 | int btrfs_drop_snapshot(struct btrfs_trans_handle *trans, struct btrfs_root | 4853 | int btrfs_drop_snapshot(struct btrfs_root *root, int update_ref) |
4724 | *root) | ||
4725 | { | 4854 | { |
4726 | int ret = 0; | ||
4727 | int wret; | ||
4728 | int level; | ||
4729 | struct btrfs_path *path; | 4855 | struct btrfs_path *path; |
4730 | int update_count; | 4856 | struct btrfs_trans_handle *trans; |
4857 | struct btrfs_root *tree_root = root->fs_info->tree_root; | ||
4731 | struct btrfs_root_item *root_item = &root->root_item; | 4858 | struct btrfs_root_item *root_item = &root->root_item; |
4859 | struct walk_control *wc; | ||
4860 | struct btrfs_key key; | ||
4861 | int err = 0; | ||
4862 | int ret; | ||
4863 | int level; | ||
4732 | 4864 | ||
4733 | path = btrfs_alloc_path(); | 4865 | path = btrfs_alloc_path(); |
4734 | BUG_ON(!path); | 4866 | BUG_ON(!path); |
4735 | 4867 | ||
4736 | level = btrfs_header_level(root->node); | 4868 | wc = kzalloc(sizeof(*wc), GFP_NOFS); |
4869 | BUG_ON(!wc); | ||
4870 | |||
4871 | trans = btrfs_start_transaction(tree_root, 1); | ||
4872 | |||
4737 | if (btrfs_disk_key_objectid(&root_item->drop_progress) == 0) { | 4873 | if (btrfs_disk_key_objectid(&root_item->drop_progress) == 0) { |
4874 | level = btrfs_header_level(root->node); | ||
4738 | path->nodes[level] = btrfs_lock_root_node(root); | 4875 | path->nodes[level] = btrfs_lock_root_node(root); |
4739 | btrfs_set_lock_blocking(path->nodes[level]); | 4876 | btrfs_set_lock_blocking(path->nodes[level]); |
4740 | path->slots[level] = 0; | 4877 | path->slots[level] = 0; |
4741 | path->locks[level] = 1; | 4878 | path->locks[level] = 1; |
4879 | memset(&wc->update_progress, 0, | ||
4880 | sizeof(wc->update_progress)); | ||
4742 | } else { | 4881 | } else { |
4743 | struct btrfs_key key; | ||
4744 | struct btrfs_disk_key found_key; | ||
4745 | struct extent_buffer *node; | ||
4746 | |||
4747 | btrfs_disk_key_to_cpu(&key, &root_item->drop_progress); | 4882 | btrfs_disk_key_to_cpu(&key, &root_item->drop_progress); |
4883 | memcpy(&wc->update_progress, &key, | ||
4884 | sizeof(wc->update_progress)); | ||
4885 | |||
4748 | level = root_item->drop_level; | 4886 | level = root_item->drop_level; |
4887 | BUG_ON(level == 0); | ||
4749 | path->lowest_level = level; | 4888 | path->lowest_level = level; |
4750 | wret = btrfs_search_slot(NULL, root, &key, path, 0, 0); | 4889 | ret = btrfs_search_slot(NULL, root, &key, path, 0, 0); |
4751 | if (wret < 0) { | 4890 | path->lowest_level = 0; |
4752 | ret = wret; | 4891 | if (ret < 0) { |
4892 | err = ret; | ||
4753 | goto out; | 4893 | goto out; |
4754 | } | 4894 | } |
4755 | node = path->nodes[level]; | 4895 | btrfs_node_key_to_cpu(path->nodes[level], &key, |
4756 | btrfs_node_key(node, &found_key, path->slots[level]); | 4896 | path->slots[level]); |
4757 | WARN_ON(memcmp(&found_key, &root_item->drop_progress, | 4897 | WARN_ON(memcmp(&key, &wc->update_progress, sizeof(key))); |
4758 | sizeof(found_key))); | 4898 | |
4759 | /* | 4899 | /* |
4760 | * unlock our path, this is safe because only this | 4900 | * unlock our path, this is safe because only this |
4761 | * function is allowed to delete this snapshot | 4901 | * function is allowed to delete this snapshot |
4762 | */ | 4902 | */ |
4763 | btrfs_unlock_up_safe(path, 0); | 4903 | btrfs_unlock_up_safe(path, 0); |
4904 | |||
4905 | level = btrfs_header_level(root->node); | ||
4906 | while (1) { | ||
4907 | btrfs_tree_lock(path->nodes[level]); | ||
4908 | btrfs_set_lock_blocking(path->nodes[level]); | ||
4909 | |||
4910 | ret = btrfs_lookup_extent_info(trans, root, | ||
4911 | path->nodes[level]->start, | ||
4912 | path->nodes[level]->len, | ||
4913 | &wc->refs[level], | ||
4914 | &wc->flags[level]); | ||
4915 | BUG_ON(ret); | ||
4916 | BUG_ON(wc->refs[level] == 0); | ||
4917 | |||
4918 | if (level == root_item->drop_level) | ||
4919 | break; | ||
4920 | |||
4921 | btrfs_tree_unlock(path->nodes[level]); | ||
4922 | WARN_ON(wc->refs[level] != 1); | ||
4923 | level--; | ||
4924 | } | ||
4764 | } | 4925 | } |
4926 | |||
4927 | wc->level = level; | ||
4928 | wc->shared_level = -1; | ||
4929 | wc->stage = DROP_REFERENCE; | ||
4930 | wc->update_ref = update_ref; | ||
4931 | wc->keep_locks = 0; | ||
4932 | |||
4765 | while (1) { | 4933 | while (1) { |
4766 | unsigned long update; | 4934 | ret = walk_down_tree(trans, root, path, wc); |
4767 | wret = walk_down_tree(trans, root, path, &level); | 4935 | if (ret < 0) { |
4768 | if (wret > 0) | 4936 | err = ret; |
4769 | break; | 4937 | break; |
4770 | if (wret < 0) | 4938 | } |
4771 | ret = wret; | ||
4772 | 4939 | ||
4773 | wret = walk_up_tree(trans, root, path, &level, | 4940 | ret = walk_up_tree(trans, root, path, wc, BTRFS_MAX_LEVEL); |
4774 | BTRFS_MAX_LEVEL); | 4941 | if (ret < 0) { |
4775 | if (wret > 0) | 4942 | err = ret; |
4776 | break; | 4943 | break; |
4777 | if (wret < 0) | 4944 | } |
4778 | ret = wret; | 4945 | |
4779 | if (trans->transaction->in_commit || | 4946 | if (ret > 0) { |
4780 | trans->transaction->delayed_refs.flushing) { | 4947 | BUG_ON(wc->stage != DROP_REFERENCE); |
4781 | ret = -EAGAIN; | ||
4782 | break; | 4948 | break; |
4783 | } | 4949 | } |
4784 | for (update_count = 0; update_count < 16; update_count++) { | 4950 | |
4951 | if (wc->stage == DROP_REFERENCE) { | ||
4952 | level = wc->level; | ||
4953 | btrfs_node_key(path->nodes[level], | ||
4954 | &root_item->drop_progress, | ||
4955 | path->slots[level]); | ||
4956 | root_item->drop_level = level; | ||
4957 | } | ||
4958 | |||
4959 | BUG_ON(wc->level == 0); | ||
4960 | if (trans->transaction->in_commit || | ||
4961 | trans->transaction->delayed_refs.flushing) { | ||
4962 | ret = btrfs_update_root(trans, tree_root, | ||
4963 | &root->root_key, | ||
4964 | root_item); | ||
4965 | BUG_ON(ret); | ||
4966 | |||
4967 | btrfs_end_transaction(trans, tree_root); | ||
4968 | trans = btrfs_start_transaction(tree_root, 1); | ||
4969 | } else { | ||
4970 | unsigned long update; | ||
4785 | update = trans->delayed_ref_updates; | 4971 | update = trans->delayed_ref_updates; |
4786 | trans->delayed_ref_updates = 0; | 4972 | trans->delayed_ref_updates = 0; |
4787 | if (update) | 4973 | if (update) |
4788 | btrfs_run_delayed_refs(trans, root, update); | 4974 | btrfs_run_delayed_refs(trans, tree_root, |
4789 | else | 4975 | update); |
4790 | break; | ||
4791 | } | 4976 | } |
4792 | } | 4977 | } |
4978 | btrfs_release_path(root, path); | ||
4979 | BUG_ON(err); | ||
4980 | |||
4981 | ret = btrfs_del_root(trans, tree_root, &root->root_key); | ||
4982 | BUG_ON(ret); | ||
4983 | |||
4984 | free_extent_buffer(root->node); | ||
4985 | free_extent_buffer(root->commit_root); | ||
4986 | kfree(root); | ||
4793 | out: | 4987 | out: |
4988 | btrfs_end_transaction(trans, tree_root); | ||
4989 | kfree(wc); | ||
4794 | btrfs_free_path(path); | 4990 | btrfs_free_path(path); |
4795 | return ret; | 4991 | return err; |
4796 | } | 4992 | } |
4797 | 4993 | ||
4994 | /* | ||
4995 | * drop subtree rooted at tree block 'node'. | ||
4996 | * | ||
4997 | * NOTE: this function will unlock and release tree block 'node' | ||
4998 | */ | ||
4798 | int btrfs_drop_subtree(struct btrfs_trans_handle *trans, | 4999 | int btrfs_drop_subtree(struct btrfs_trans_handle *trans, |
4799 | struct btrfs_root *root, | 5000 | struct btrfs_root *root, |
4800 | struct extent_buffer *node, | 5001 | struct extent_buffer *node, |
4801 | struct extent_buffer *parent) | 5002 | struct extent_buffer *parent) |
4802 | { | 5003 | { |
4803 | struct btrfs_path *path; | 5004 | struct btrfs_path *path; |
5005 | struct walk_control *wc; | ||
4804 | int level; | 5006 | int level; |
4805 | int parent_level; | 5007 | int parent_level; |
4806 | int ret = 0; | 5008 | int ret = 0; |
4807 | int wret; | 5009 | int wret; |
4808 | 5010 | ||
5011 | BUG_ON(root->root_key.objectid != BTRFS_TREE_RELOC_OBJECTID); | ||
5012 | |||
4809 | path = btrfs_alloc_path(); | 5013 | path = btrfs_alloc_path(); |
4810 | BUG_ON(!path); | 5014 | BUG_ON(!path); |
4811 | 5015 | ||
5016 | wc = kzalloc(sizeof(*wc), GFP_NOFS); | ||
5017 | BUG_ON(!wc); | ||
5018 | |||
4812 | btrfs_assert_tree_locked(parent); | 5019 | btrfs_assert_tree_locked(parent); |
4813 | parent_level = btrfs_header_level(parent); | 5020 | parent_level = btrfs_header_level(parent); |
4814 | extent_buffer_get(parent); | 5021 | extent_buffer_get(parent); |
@@ -4817,24 +5024,33 @@ int btrfs_drop_subtree(struct btrfs_trans_handle *trans, | |||
4817 | 5024 | ||
4818 | btrfs_assert_tree_locked(node); | 5025 | btrfs_assert_tree_locked(node); |
4819 | level = btrfs_header_level(node); | 5026 | level = btrfs_header_level(node); |
4820 | extent_buffer_get(node); | ||
4821 | path->nodes[level] = node; | 5027 | path->nodes[level] = node; |
4822 | path->slots[level] = 0; | 5028 | path->slots[level] = 0; |
5029 | path->locks[level] = 1; | ||
5030 | |||
5031 | wc->refs[parent_level] = 1; | ||
5032 | wc->flags[parent_level] = BTRFS_BLOCK_FLAG_FULL_BACKREF; | ||
5033 | wc->level = level; | ||
5034 | wc->shared_level = -1; | ||
5035 | wc->stage = DROP_REFERENCE; | ||
5036 | wc->update_ref = 0; | ||
5037 | wc->keep_locks = 1; | ||
4823 | 5038 | ||
4824 | while (1) { | 5039 | while (1) { |
4825 | wret = walk_down_tree(trans, root, path, &level); | 5040 | wret = walk_down_tree(trans, root, path, wc); |
4826 | if (wret < 0) | 5041 | if (wret < 0) { |
4827 | ret = wret; | 5042 | ret = wret; |
4828 | if (wret != 0) | ||
4829 | break; | 5043 | break; |
5044 | } | ||
4830 | 5045 | ||
4831 | wret = walk_up_tree(trans, root, path, &level, parent_level); | 5046 | wret = walk_up_tree(trans, root, path, wc, parent_level); |
4832 | if (wret < 0) | 5047 | if (wret < 0) |
4833 | ret = wret; | 5048 | ret = wret; |
4834 | if (wret != 0) | 5049 | if (wret != 0) |
4835 | break; | 5050 | break; |
4836 | } | 5051 | } |
4837 | 5052 | ||
5053 | kfree(wc); | ||
4838 | btrfs_free_path(path); | 5054 | btrfs_free_path(path); |
4839 | return ret; | 5055 | return ret; |
4840 | } | 5056 | } |
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c index 126477eaecf5..7c3cd248d8d6 100644 --- a/fs/btrfs/file.c +++ b/fs/btrfs/file.c | |||
@@ -151,7 +151,10 @@ static noinline int dirty_and_release_pages(struct btrfs_trans_handle *trans, | |||
151 | } | 151 | } |
152 | if (end_pos > isize) { | 152 | if (end_pos > isize) { |
153 | i_size_write(inode, end_pos); | 153 | i_size_write(inode, end_pos); |
154 | btrfs_update_inode(trans, root, inode); | 154 | /* we've only changed i_size in ram, and we haven't updated |
155 | * the disk i_size. There is no need to log the inode | ||
156 | * at this time. | ||
157 | */ | ||
155 | } | 158 | } |
156 | err = btrfs_end_transaction(trans, root); | 159 | err = btrfs_end_transaction(trans, root); |
157 | out_unlock: | 160 | out_unlock: |
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index dbe1aabf96cd..7ffa3d34ea19 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c | |||
@@ -3580,12 +3580,6 @@ static struct inode *btrfs_new_inode(struct btrfs_trans_handle *trans, | |||
3580 | owner = 1; | 3580 | owner = 1; |
3581 | BTRFS_I(inode)->block_group = | 3581 | BTRFS_I(inode)->block_group = |
3582 | btrfs_find_block_group(root, 0, alloc_hint, owner); | 3582 | btrfs_find_block_group(root, 0, alloc_hint, owner); |
3583 | if ((mode & S_IFREG)) { | ||
3584 | if (btrfs_test_opt(root, NODATASUM)) | ||
3585 | BTRFS_I(inode)->flags |= BTRFS_INODE_NODATASUM; | ||
3586 | if (btrfs_test_opt(root, NODATACOW)) | ||
3587 | BTRFS_I(inode)->flags |= BTRFS_INODE_NODATACOW; | ||
3588 | } | ||
3589 | 3583 | ||
3590 | key[0].objectid = objectid; | 3584 | key[0].objectid = objectid; |
3591 | btrfs_set_key_type(&key[0], BTRFS_INODE_ITEM_KEY); | 3585 | btrfs_set_key_type(&key[0], BTRFS_INODE_ITEM_KEY); |
@@ -3640,6 +3634,13 @@ static struct inode *btrfs_new_inode(struct btrfs_trans_handle *trans, | |||
3640 | 3634 | ||
3641 | btrfs_inherit_iflags(inode, dir); | 3635 | btrfs_inherit_iflags(inode, dir); |
3642 | 3636 | ||
3637 | if ((mode & S_IFREG)) { | ||
3638 | if (btrfs_test_opt(root, NODATASUM)) | ||
3639 | BTRFS_I(inode)->flags |= BTRFS_INODE_NODATASUM; | ||
3640 | if (btrfs_test_opt(root, NODATACOW)) | ||
3641 | BTRFS_I(inode)->flags |= BTRFS_INODE_NODATACOW; | ||
3642 | } | ||
3643 | |||
3643 | insert_inode_hash(inode); | 3644 | insert_inode_hash(inode); |
3644 | inode_tree_add(inode); | 3645 | inode_tree_add(inode); |
3645 | return inode; | 3646 | return inode; |
@@ -5082,6 +5083,7 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5082 | u64 mask = BTRFS_I(inode)->root->sectorsize - 1; | 5083 | u64 mask = BTRFS_I(inode)->root->sectorsize - 1; |
5083 | struct extent_map *em; | 5084 | struct extent_map *em; |
5084 | struct btrfs_trans_handle *trans; | 5085 | struct btrfs_trans_handle *trans; |
5086 | struct btrfs_root *root; | ||
5085 | int ret; | 5087 | int ret; |
5086 | 5088 | ||
5087 | alloc_start = offset & ~mask; | 5089 | alloc_start = offset & ~mask; |
@@ -5100,6 +5102,13 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5100 | goto out; | 5102 | goto out; |
5101 | } | 5103 | } |
5102 | 5104 | ||
5105 | root = BTRFS_I(inode)->root; | ||
5106 | |||
5107 | ret = btrfs_check_data_free_space(root, inode, | ||
5108 | alloc_end - alloc_start); | ||
5109 | if (ret) | ||
5110 | goto out; | ||
5111 | |||
5103 | locked_end = alloc_end - 1; | 5112 | locked_end = alloc_end - 1; |
5104 | while (1) { | 5113 | while (1) { |
5105 | struct btrfs_ordered_extent *ordered; | 5114 | struct btrfs_ordered_extent *ordered; |
@@ -5107,7 +5116,7 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5107 | trans = btrfs_start_transaction(BTRFS_I(inode)->root, 1); | 5116 | trans = btrfs_start_transaction(BTRFS_I(inode)->root, 1); |
5108 | if (!trans) { | 5117 | if (!trans) { |
5109 | ret = -EIO; | 5118 | ret = -EIO; |
5110 | goto out; | 5119 | goto out_free; |
5111 | } | 5120 | } |
5112 | 5121 | ||
5113 | /* the extent lock is ordered inside the running | 5122 | /* the extent lock is ordered inside the running |
@@ -5168,6 +5177,8 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5168 | GFP_NOFS); | 5177 | GFP_NOFS); |
5169 | 5178 | ||
5170 | btrfs_end_transaction(trans, BTRFS_I(inode)->root); | 5179 | btrfs_end_transaction(trans, BTRFS_I(inode)->root); |
5180 | out_free: | ||
5181 | btrfs_free_reserved_data_space(root, inode, alloc_end - alloc_start); | ||
5171 | out: | 5182 | out: |
5172 | mutex_unlock(&inode->i_mutex); | 5183 | mutex_unlock(&inode->i_mutex); |
5173 | return ret; | 5184 | return ret; |
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c index eff18f5b5362..9f4db848db10 100644 --- a/fs/btrfs/ioctl.c +++ b/fs/btrfs/ioctl.c | |||
@@ -1028,7 +1028,8 @@ static long btrfs_ioctl_clone(struct file *file, unsigned long srcfd, | |||
1028 | struct btrfs_file_extent_item); | 1028 | struct btrfs_file_extent_item); |
1029 | comp = btrfs_file_extent_compression(leaf, extent); | 1029 | comp = btrfs_file_extent_compression(leaf, extent); |
1030 | type = btrfs_file_extent_type(leaf, extent); | 1030 | type = btrfs_file_extent_type(leaf, extent); |
1031 | if (type == BTRFS_FILE_EXTENT_REG) { | 1031 | if (type == BTRFS_FILE_EXTENT_REG || |
1032 | type == BTRFS_FILE_EXTENT_PREALLOC) { | ||
1032 | disko = btrfs_file_extent_disk_bytenr(leaf, | 1033 | disko = btrfs_file_extent_disk_bytenr(leaf, |
1033 | extent); | 1034 | extent); |
1034 | diskl = btrfs_file_extent_disk_num_bytes(leaf, | 1035 | diskl = btrfs_file_extent_disk_num_bytes(leaf, |
@@ -1051,7 +1052,8 @@ static long btrfs_ioctl_clone(struct file *file, unsigned long srcfd, | |||
1051 | new_key.objectid = inode->i_ino; | 1052 | new_key.objectid = inode->i_ino; |
1052 | new_key.offset = key.offset + destoff - off; | 1053 | new_key.offset = key.offset + destoff - off; |
1053 | 1054 | ||
1054 | if (type == BTRFS_FILE_EXTENT_REG) { | 1055 | if (type == BTRFS_FILE_EXTENT_REG || |
1056 | type == BTRFS_FILE_EXTENT_PREALLOC) { | ||
1055 | ret = btrfs_insert_empty_item(trans, root, path, | 1057 | ret = btrfs_insert_empty_item(trans, root, path, |
1056 | &new_key, size); | 1058 | &new_key, size); |
1057 | if (ret) | 1059 | if (ret) |
diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c index b23dc209ae10..008397934778 100644 --- a/fs/btrfs/relocation.c +++ b/fs/btrfs/relocation.c | |||
@@ -1788,7 +1788,7 @@ static void merge_func(struct btrfs_work *work) | |||
1788 | btrfs_end_transaction(trans, root); | 1788 | btrfs_end_transaction(trans, root); |
1789 | } | 1789 | } |
1790 | 1790 | ||
1791 | btrfs_drop_dead_root(reloc_root); | 1791 | btrfs_drop_snapshot(reloc_root, 0); |
1792 | 1792 | ||
1793 | if (atomic_dec_and_test(async->num_pending)) | 1793 | if (atomic_dec_and_test(async->num_pending)) |
1794 | complete(async->done); | 1794 | complete(async->done); |
@@ -2075,9 +2075,6 @@ static int do_relocation(struct btrfs_trans_handle *trans, | |||
2075 | 2075 | ||
2076 | ret = btrfs_drop_subtree(trans, root, eb, upper->eb); | 2076 | ret = btrfs_drop_subtree(trans, root, eb, upper->eb); |
2077 | BUG_ON(ret); | 2077 | BUG_ON(ret); |
2078 | |||
2079 | btrfs_tree_unlock(eb); | ||
2080 | free_extent_buffer(eb); | ||
2081 | } | 2078 | } |
2082 | if (!lowest) { | 2079 | if (!lowest) { |
2083 | btrfs_tree_unlock(upper->eb); | 2080 | btrfs_tree_unlock(upper->eb); |
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c index 4e83457ea253..2dbf1c1f56ee 100644 --- a/fs/btrfs/transaction.c +++ b/fs/btrfs/transaction.c | |||
@@ -593,6 +593,7 @@ int btrfs_defrag_root(struct btrfs_root *root, int cacheonly) | |||
593 | return 0; | 593 | return 0; |
594 | } | 594 | } |
595 | 595 | ||
596 | #if 0 | ||
596 | /* | 597 | /* |
597 | * when dropping snapshots, we generate a ton of delayed refs, and it makes | 598 | * when dropping snapshots, we generate a ton of delayed refs, and it makes |
598 | * sense not to join the transaction while it is trying to flush the current | 599 | * sense not to join the transaction while it is trying to flush the current |
@@ -681,6 +682,7 @@ int btrfs_drop_dead_root(struct btrfs_root *root) | |||
681 | btrfs_btree_balance_dirty(tree_root, nr); | 682 | btrfs_btree_balance_dirty(tree_root, nr); |
682 | return ret; | 683 | return ret; |
683 | } | 684 | } |
685 | #endif | ||
684 | 686 | ||
685 | /* | 687 | /* |
686 | * new snapshots need to be created at a very specific time in the | 688 | * new snapshots need to be created at a very specific time in the |
@@ -1081,7 +1083,7 @@ int btrfs_clean_old_snapshots(struct btrfs_root *root) | |||
1081 | while (!list_empty(&list)) { | 1083 | while (!list_empty(&list)) { |
1082 | root = list_entry(list.next, struct btrfs_root, root_list); | 1084 | root = list_entry(list.next, struct btrfs_root, root_list); |
1083 | list_del_init(&root->root_list); | 1085 | list_del_init(&root->root_list); |
1084 | btrfs_drop_dead_root(root); | 1086 | btrfs_drop_snapshot(root, 0); |
1085 | } | 1087 | } |
1086 | return 0; | 1088 | return 0; |
1087 | } | 1089 | } |
diff --git a/fs/compat.c b/fs/compat.c index cdd51a3a7c53..fbadb947727b 100644 --- a/fs/compat.c +++ b/fs/compat.c | |||
@@ -1486,8 +1486,8 @@ int compat_do_execve(char * filename, | |||
1486 | if (!bprm) | 1486 | if (!bprm) |
1487 | goto out_files; | 1487 | goto out_files; |
1488 | 1488 | ||
1489 | retval = mutex_lock_interruptible(¤t->cred_guard_mutex); | 1489 | retval = -ERESTARTNOINTR; |
1490 | if (retval < 0) | 1490 | if (mutex_lock_interruptible(¤t->cred_guard_mutex)) |
1491 | goto out_free; | 1491 | goto out_free; |
1492 | current->in_execve = 1; | 1492 | current->in_execve = 1; |
1493 | 1493 | ||
@@ -1277,8 +1277,8 @@ int do_execve(char * filename, | |||
1277 | if (!bprm) | 1277 | if (!bprm) |
1278 | goto out_files; | 1278 | goto out_files; |
1279 | 1279 | ||
1280 | retval = mutex_lock_interruptible(¤t->cred_guard_mutex); | 1280 | retval = -ERESTARTNOINTR; |
1281 | if (retval < 0) | 1281 | if (mutex_lock_interruptible(¤t->cred_guard_mutex)) |
1282 | goto out_free; | 1282 | goto out_free; |
1283 | current->in_execve = 1; | 1283 | current->in_execve = 1; |
1284 | 1284 | ||
diff --git a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c index 4145083dcf88..23341c1063bc 100644 --- a/fs/nfsd/vfs.c +++ b/fs/nfsd/vfs.c | |||
@@ -678,7 +678,6 @@ __be32 | |||
678 | nfsd_open(struct svc_rqst *rqstp, struct svc_fh *fhp, int type, | 678 | nfsd_open(struct svc_rqst *rqstp, struct svc_fh *fhp, int type, |
679 | int access, struct file **filp) | 679 | int access, struct file **filp) |
680 | { | 680 | { |
681 | const struct cred *cred = current_cred(); | ||
682 | struct dentry *dentry; | 681 | struct dentry *dentry; |
683 | struct inode *inode; | 682 | struct inode *inode; |
684 | int flags = O_RDONLY|O_LARGEFILE; | 683 | int flags = O_RDONLY|O_LARGEFILE; |
@@ -733,7 +732,7 @@ nfsd_open(struct svc_rqst *rqstp, struct svc_fh *fhp, int type, | |||
733 | vfs_dq_init(inode); | 732 | vfs_dq_init(inode); |
734 | } | 733 | } |
735 | *filp = dentry_open(dget(dentry), mntget(fhp->fh_export->ex_path.mnt), | 734 | *filp = dentry_open(dget(dentry), mntget(fhp->fh_export->ex_path.mnt), |
736 | flags, cred); | 735 | flags, current_cred()); |
737 | if (IS_ERR(*filp)) | 736 | if (IS_ERR(*filp)) |
738 | host_err = PTR_ERR(*filp); | 737 | host_err = PTR_ERR(*filp); |
739 | else | 738 | else |
diff --git a/fs/notify/inotify/inotify_user.c b/fs/notify/inotify/inotify_user.c index ff231ad23895..ff27a2965844 100644 --- a/fs/notify/inotify/inotify_user.c +++ b/fs/notify/inotify/inotify_user.c | |||
@@ -296,12 +296,15 @@ static int inotify_fasync(int fd, struct file *file, int on) | |||
296 | static int inotify_release(struct inode *ignored, struct file *file) | 296 | static int inotify_release(struct inode *ignored, struct file *file) |
297 | { | 297 | { |
298 | struct fsnotify_group *group = file->private_data; | 298 | struct fsnotify_group *group = file->private_data; |
299 | struct user_struct *user = group->inotify_data.user; | ||
299 | 300 | ||
300 | fsnotify_clear_marks_by_group(group); | 301 | fsnotify_clear_marks_by_group(group); |
301 | 302 | ||
302 | /* free this group, matching get was inotify_init->fsnotify_obtain_group */ | 303 | /* free this group, matching get was inotify_init->fsnotify_obtain_group */ |
303 | fsnotify_put_group(group); | 304 | fsnotify_put_group(group); |
304 | 305 | ||
306 | atomic_dec(&user->inotify_devs); | ||
307 | |||
305 | return 0; | 308 | return 0; |
306 | } | 309 | } |
307 | 310 | ||
@@ -112,8 +112,13 @@ restart: | |||
112 | mutex_unlock(&mutex); | 112 | mutex_unlock(&mutex); |
113 | } | 113 | } |
114 | 114 | ||
115 | /* | ||
116 | * sync everything. Start out by waking pdflush, because that writes back | ||
117 | * all queues in parallel. | ||
118 | */ | ||
115 | SYSCALL_DEFINE0(sync) | 119 | SYSCALL_DEFINE0(sync) |
116 | { | 120 | { |
121 | wakeup_pdflush(0); | ||
117 | sync_filesystems(0); | 122 | sync_filesystems(0); |
118 | sync_filesystems(1); | 123 | sync_filesystems(1); |
119 | if (unlikely(laptop_mode)) | 124 | if (unlikely(laptop_mode)) |
diff --git a/include/asm-generic/vmlinux.lds.h b/include/asm-generic/vmlinux.lds.h index dccdbed05848..a553f1041cf1 100644 --- a/include/asm-generic/vmlinux.lds.h +++ b/include/asm-generic/vmlinux.lds.h | |||
@@ -191,7 +191,7 @@ | |||
191 | . = ALIGN(align); \ | 191 | . = ALIGN(align); \ |
192 | *(.data.cacheline_aligned) | 192 | *(.data.cacheline_aligned) |
193 | 193 | ||
194 | #define INIT_TASK(align) \ | 194 | #define INIT_TASK_DATA(align) \ |
195 | . = ALIGN(align); \ | 195 | . = ALIGN(align); \ |
196 | *(.data.init_task) | 196 | *(.data.init_task) |
197 | 197 | ||
@@ -434,10 +434,10 @@ | |||
434 | /* | 434 | /* |
435 | * Init task | 435 | * Init task |
436 | */ | 436 | */ |
437 | #define INIT_TASK_DATA(align) \ | 437 | #define INIT_TASK_DATA_SECTION(align) \ |
438 | . = ALIGN(align); \ | 438 | . = ALIGN(align); \ |
439 | .data.init_task : { \ | 439 | .data.init_task : { \ |
440 | INIT_TASK \ | 440 | INIT_TASK_DATA(align) \ |
441 | } | 441 | } |
442 | 442 | ||
443 | #ifdef CONFIG_CONSTRUCTORS | 443 | #ifdef CONFIG_CONSTRUCTORS |
@@ -705,15 +705,15 @@ | |||
705 | * matches the requirment of PAGE_ALIGNED_DATA. | 705 | * matches the requirment of PAGE_ALIGNED_DATA. |
706 | * | 706 | * |
707 | * use 0 as page_align if page_aligned data is not used */ | 707 | * use 0 as page_align if page_aligned data is not used */ |
708 | #define RW_DATA_SECTION(cacheline, nosave, pagealigned, inittask) \ | 708 | #define RW_DATA_SECTION(cacheline, pagealigned, inittask) \ |
709 | . = ALIGN(PAGE_SIZE); \ | 709 | . = ALIGN(PAGE_SIZE); \ |
710 | .data : AT(ADDR(.data) - LOAD_OFFSET) { \ | 710 | .data : AT(ADDR(.data) - LOAD_OFFSET) { \ |
711 | INIT_TASK(inittask) \ | 711 | INIT_TASK_DATA(inittask) \ |
712 | CACHELINE_ALIGNED_DATA(cacheline) \ | 712 | CACHELINE_ALIGNED_DATA(cacheline) \ |
713 | READ_MOSTLY_DATA(cacheline) \ | 713 | READ_MOSTLY_DATA(cacheline) \ |
714 | DATA_DATA \ | 714 | DATA_DATA \ |
715 | CONSTRUCTORS \ | 715 | CONSTRUCTORS \ |
716 | NOSAVE_DATA(nosave) \ | 716 | NOSAVE_DATA \ |
717 | PAGE_ALIGNED_DATA(pagealigned) \ | 717 | PAGE_ALIGNED_DATA(pagealigned) \ |
718 | } | 718 | } |
719 | 719 | ||
diff --git a/include/linux/elfcore.h b/include/linux/elfcore.h index 7605c5e9589f..03ec16779802 100644 --- a/include/linux/elfcore.h +++ b/include/linux/elfcore.h | |||
@@ -125,6 +125,8 @@ static inline int elf_core_copy_task_regs(struct task_struct *t, elf_gregset_t* | |||
125 | #ifdef ELF_CORE_COPY_TASK_REGS | 125 | #ifdef ELF_CORE_COPY_TASK_REGS |
126 | 126 | ||
127 | return ELF_CORE_COPY_TASK_REGS(t, elfregs); | 127 | return ELF_CORE_COPY_TASK_REGS(t, elfregs); |
128 | #else | ||
129 | elf_core_copy_regs(elfregs, task_pt_regs(t)); | ||
128 | #endif | 130 | #endif |
129 | return 0; | 131 | return 0; |
130 | } | 132 | } |
diff --git a/include/linux/firewire.h b/include/linux/firewire.h index 9823946adbc5..192d1e43c43c 100644 --- a/include/linux/firewire.h +++ b/include/linux/firewire.h | |||
@@ -127,6 +127,7 @@ struct fw_card { | |||
127 | struct delayed_work work; | 127 | struct delayed_work work; |
128 | int bm_retries; | 128 | int bm_retries; |
129 | int bm_generation; | 129 | int bm_generation; |
130 | __be32 bm_transaction_data[2]; | ||
130 | 131 | ||
131 | bool broadcast_channel_allocated; | 132 | bool broadcast_channel_allocated; |
132 | u32 broadcast_channel; | 133 | u32 broadcast_channel; |
diff --git a/include/linux/init_task.h b/include/linux/init_task.h index 5368fbdc7801..7fc01b13be43 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h | |||
@@ -183,5 +183,8 @@ extern struct cred init_cred; | |||
183 | LIST_HEAD_INIT(cpu_timers[2]), \ | 183 | LIST_HEAD_INIT(cpu_timers[2]), \ |
184 | } | 184 | } |
185 | 185 | ||
186 | /* Attach to the init_task data structure for proper alignment */ | ||
187 | #define __init_task_data __attribute__((__section__(".data.init_task"))) | ||
188 | |||
186 | 189 | ||
187 | #endif | 190 | #endif |
diff --git a/include/linux/linkage.h b/include/linux/linkage.h index fee9e59649c1..691f59171c6c 100644 --- a/include/linux/linkage.h +++ b/include/linux/linkage.h | |||
@@ -22,6 +22,15 @@ | |||
22 | #define __page_aligned_bss __section(.bss.page_aligned) __aligned(PAGE_SIZE) | 22 | #define __page_aligned_bss __section(.bss.page_aligned) __aligned(PAGE_SIZE) |
23 | 23 | ||
24 | /* | 24 | /* |
25 | * For assembly routines. | ||
26 | * | ||
27 | * Note when using these that you must specify the appropriate | ||
28 | * alignment directives yourself | ||
29 | */ | ||
30 | #define __PAGE_ALIGNED_DATA .section ".data.page_aligned", "aw" | ||
31 | #define __PAGE_ALIGNED_BSS .section ".bss.page_aligned", "aw" | ||
32 | |||
33 | /* | ||
25 | * This is used by architectures to keep arguments on the stack | 34 | * This is used by architectures to keep arguments on the stack |
26 | * untouched by the compiler by keeping them live until the end. | 35 | * untouched by the compiler by keeping them live until the end. |
27 | * The argument stack may be owned by the assembly-language | 36 | * The argument stack may be owned by the assembly-language |
diff --git a/include/linux/pci.h b/include/linux/pci.h index d304ddf412d0..115fb7ba5089 100644 --- a/include/linux/pci.h +++ b/include/linux/pci.h | |||
@@ -1145,7 +1145,7 @@ static inline void pci_set_drvdata(struct pci_dev *pdev, void *data) | |||
1145 | /* If you want to know what to call your pci_dev, ask this function. | 1145 | /* If you want to know what to call your pci_dev, ask this function. |
1146 | * Again, it's a wrapper around the generic device. | 1146 | * Again, it's a wrapper around the generic device. |
1147 | */ | 1147 | */ |
1148 | static inline const char *pci_name(struct pci_dev *pdev) | 1148 | static inline const char *pci_name(const struct pci_dev *pdev) |
1149 | { | 1149 | { |
1150 | return dev_name(&pdev->dev); | 1150 | return dev_name(&pdev->dev); |
1151 | } | 1151 | } |
diff --git a/include/linux/sysrq.h b/include/linux/sysrq.h index 98a1d8cfb73d..99adcdc0d3ca 100644 --- a/include/linux/sysrq.h +++ b/include/linux/sysrq.h | |||
@@ -14,6 +14,8 @@ | |||
14 | #ifndef _LINUX_SYSRQ_H | 14 | #ifndef _LINUX_SYSRQ_H |
15 | #define _LINUX_SYSRQ_H | 15 | #define _LINUX_SYSRQ_H |
16 | 16 | ||
17 | #include <linux/errno.h> | ||
18 | |||
17 | struct pt_regs; | 19 | struct pt_regs; |
18 | struct tty_struct; | 20 | struct tty_struct; |
19 | 21 | ||
diff --git a/include/linux/videodev2.h b/include/linux/videodev2.h index 8a025d510904..95846d988011 100644 --- a/include/linux/videodev2.h +++ b/include/linux/videodev2.h | |||
@@ -318,6 +318,8 @@ struct v4l2_pix_format { | |||
318 | /* see http://www.siliconimaging.com/RGB%20Bayer.htm */ | 318 | /* see http://www.siliconimaging.com/RGB%20Bayer.htm */ |
319 | #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ | 319 | #define V4L2_PIX_FMT_SBGGR8 v4l2_fourcc('B', 'A', '8', '1') /* 8 BGBG.. GRGR.. */ |
320 | #define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */ | 320 | #define V4L2_PIX_FMT_SGBRG8 v4l2_fourcc('G', 'B', 'R', 'G') /* 8 GBGB.. RGRG.. */ |
321 | #define V4L2_PIX_FMT_SGRBG8 v4l2_fourcc('G', 'R', 'B', 'G') /* 8 GRGR.. BGBG.. */ | ||
322 | |||
321 | /* | 323 | /* |
322 | * 10bit raw bayer, expanded to 16 bits | 324 | * 10bit raw bayer, expanded to 16 bits |
323 | * xxxxrrrrrrrrrrxxxxgggggggggg xxxxggggggggggxxxxbbbbbbbbbb... | 325 | * xxxxrrrrrrrrrrxxxxgggggggggg xxxxggggggggggxxxxbbbbbbbbbb... |
diff --git a/include/media/v4l2-chip-ident.h b/include/media/v4l2-chip-ident.h index 4d7e2272c42f..11a4a2d3e364 100644 --- a/include/media/v4l2-chip-ident.h +++ b/include/media/v4l2-chip-ident.h | |||
@@ -155,6 +155,9 @@ enum { | |||
155 | /* module cafe_ccic, just ident 8801 */ | 155 | /* module cafe_ccic, just ident 8801 */ |
156 | V4L2_IDENT_CAFE = 8801, | 156 | V4L2_IDENT_CAFE = 8801, |
157 | 157 | ||
158 | /* module mt9v011, just ident 8243 */ | ||
159 | V4L2_IDENT_MT9V011 = 8243, | ||
160 | |||
158 | /* module tw9910: just ident 9910 */ | 161 | /* module tw9910: just ident 9910 */ |
159 | V4L2_IDENT_TW9910 = 9910, | 162 | V4L2_IDENT_TW9910 = 9910, |
160 | 163 | ||
diff --git a/kernel/perf_counter.c b/kernel/perf_counter.c index d55a50da2347..a641eb753b8c 100644 --- a/kernel/perf_counter.c +++ b/kernel/perf_counter.c | |||
@@ -2020,7 +2020,7 @@ fail: | |||
2020 | 2020 | ||
2021 | static void perf_mmap_free_page(unsigned long addr) | 2021 | static void perf_mmap_free_page(unsigned long addr) |
2022 | { | 2022 | { |
2023 | struct page *page = virt_to_page(addr); | 2023 | struct page *page = virt_to_page((void *)addr); |
2024 | 2024 | ||
2025 | page->mapping = NULL; | 2025 | page->mapping = NULL; |
2026 | __free_page(page); | 2026 | __free_page(page); |
diff --git a/kernel/ptrace.c b/kernel/ptrace.c index 61c78b2c07ba..082c320e4dbf 100644 --- a/kernel/ptrace.c +++ b/kernel/ptrace.c | |||
@@ -181,8 +181,8 @@ int ptrace_attach(struct task_struct *task) | |||
181 | * interference; SUID, SGID and LSM creds get determined differently | 181 | * interference; SUID, SGID and LSM creds get determined differently |
182 | * under ptrace. | 182 | * under ptrace. |
183 | */ | 183 | */ |
184 | retval = mutex_lock_interruptible(&task->cred_guard_mutex); | 184 | retval = -ERESTARTNOINTR; |
185 | if (retval < 0) | 185 | if (mutex_lock_interruptible(&task->cred_guard_mutex)) |
186 | goto out; | 186 | goto out; |
187 | 187 | ||
188 | task_lock(task); | 188 | task_lock(task); |
diff --git a/mm/filemap.c b/mm/filemap.c index 22396713feb9..ccea3b665c12 100644 --- a/mm/filemap.c +++ b/mm/filemap.c | |||
@@ -2272,6 +2272,7 @@ again: | |||
2272 | pagefault_enable(); | 2272 | pagefault_enable(); |
2273 | flush_dcache_page(page); | 2273 | flush_dcache_page(page); |
2274 | 2274 | ||
2275 | mark_page_accessed(page); | ||
2275 | status = a_ops->write_end(file, mapping, pos, bytes, copied, | 2276 | status = a_ops->write_end(file, mapping, pos, bytes, copied, |
2276 | page, fsdata); | 2277 | page, fsdata); |
2277 | if (unlikely(status < 0)) | 2278 | if (unlikely(status < 0)) |
diff --git a/mm/page_alloc.c b/mm/page_alloc.c index e0f2cdf9d8b1..ad7cd1c56b07 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c | |||
@@ -1983,7 +1983,7 @@ void *alloc_pages_exact(size_t size, gfp_t gfp_mask) | |||
1983 | unsigned long alloc_end = addr + (PAGE_SIZE << order); | 1983 | unsigned long alloc_end = addr + (PAGE_SIZE << order); |
1984 | unsigned long used = addr + PAGE_ALIGN(size); | 1984 | unsigned long used = addr + PAGE_ALIGN(size); |
1985 | 1985 | ||
1986 | split_page(virt_to_page(addr), order); | 1986 | split_page(virt_to_page((void *)addr), order); |
1987 | while (used < alloc_end) { | 1987 | while (used < alloc_end) { |
1988 | free_page(used); | 1988 | free_page(used); |
1989 | used += PAGE_SIZE; | 1989 | used += PAGE_SIZE; |
@@ -1544,9 +1544,6 @@ void __init kmem_cache_init(void) | |||
1544 | } | 1544 | } |
1545 | 1545 | ||
1546 | g_cpucache_up = EARLY; | 1546 | g_cpucache_up = EARLY; |
1547 | |||
1548 | /* Annotate slab for lockdep -- annotate the malloc caches */ | ||
1549 | init_lock_keys(); | ||
1550 | } | 1547 | } |
1551 | 1548 | ||
1552 | void __init kmem_cache_init_late(void) | 1549 | void __init kmem_cache_init_late(void) |
@@ -1563,6 +1560,9 @@ void __init kmem_cache_init_late(void) | |||
1563 | /* Done! */ | 1560 | /* Done! */ |
1564 | g_cpucache_up = FULL; | 1561 | g_cpucache_up = FULL; |
1565 | 1562 | ||
1563 | /* Annotate slab for lockdep -- annotate the malloc caches */ | ||
1564 | init_lock_keys(); | ||
1565 | |||
1566 | /* | 1566 | /* |
1567 | * Register a cpu startup notifier callback that initializes | 1567 | * Register a cpu startup notifier callback that initializes |
1568 | * cpu_cache_get for all new cpus | 1568 | * cpu_cache_get for all new cpus |
@@ -2547,7 +2547,7 @@ void kmem_cache_destroy(struct kmem_cache *cachep) | |||
2547 | } | 2547 | } |
2548 | 2548 | ||
2549 | if (unlikely(cachep->flags & SLAB_DESTROY_BY_RCU)) | 2549 | if (unlikely(cachep->flags & SLAB_DESTROY_BY_RCU)) |
2550 | synchronize_rcu(); | 2550 | rcu_barrier(); |
2551 | 2551 | ||
2552 | __kmem_cache_destroy(cachep); | 2552 | __kmem_cache_destroy(cachep); |
2553 | mutex_unlock(&cache_chain_mutex); | 2553 | mutex_unlock(&cache_chain_mutex); |
@@ -595,6 +595,8 @@ EXPORT_SYMBOL(kmem_cache_create); | |||
595 | void kmem_cache_destroy(struct kmem_cache *c) | 595 | void kmem_cache_destroy(struct kmem_cache *c) |
596 | { | 596 | { |
597 | kmemleak_free(c); | 597 | kmemleak_free(c); |
598 | if (c->flags & SLAB_DESTROY_BY_RCU) | ||
599 | rcu_barrier(); | ||
598 | slob_free(c, sizeof(struct kmem_cache)); | 600 | slob_free(c, sizeof(struct kmem_cache)); |
599 | } | 601 | } |
600 | EXPORT_SYMBOL(kmem_cache_destroy); | 602 | EXPORT_SYMBOL(kmem_cache_destroy); |
@@ -2595,6 +2595,8 @@ static inline int kmem_cache_close(struct kmem_cache *s) | |||
2595 | */ | 2595 | */ |
2596 | void kmem_cache_destroy(struct kmem_cache *s) | 2596 | void kmem_cache_destroy(struct kmem_cache *s) |
2597 | { | 2597 | { |
2598 | if (s->flags & SLAB_DESTROY_BY_RCU) | ||
2599 | rcu_barrier(); | ||
2598 | down_write(&slub_lock); | 2600 | down_write(&slub_lock); |
2599 | s->refcount--; | 2601 | s->refcount--; |
2600 | if (!s->refcount) { | 2602 | if (!s->refcount) { |
diff --git a/scripts/.gitignore b/scripts/.gitignore index b939fbd01195..52cab46ae35a 100644 --- a/scripts/.gitignore +++ b/scripts/.gitignore | |||
@@ -7,3 +7,4 @@ pnmtologo | |||
7 | bin2c | 7 | bin2c |
8 | unifdef | 8 | unifdef |
9 | binoffset | 9 | binoffset |
10 | ihex2fw | ||
diff --git a/scripts/package/builddeb b/scripts/package/builddeb index 01c2d13dd020..b19f1f4962e3 100644 --- a/scripts/package/builddeb +++ b/scripts/package/builddeb | |||
@@ -16,6 +16,8 @@ create_package() { | |||
16 | local pname="$1" pdir="$2" | 16 | local pname="$1" pdir="$2" |
17 | 17 | ||
18 | cp debian/copyright "$pdir/usr/share/doc/$pname/" | 18 | cp debian/copyright "$pdir/usr/share/doc/$pname/" |
19 | cp debian/changelog "$pdir/usr/share/doc/$pname/changelog.Debian" | ||
20 | gzip -9 "$pdir/usr/share/doc/$pname/changelog.Debian" | ||
19 | 21 | ||
20 | # Fix ownership and permissions | 22 | # Fix ownership and permissions |
21 | chown -R root:root "$pdir" | 23 | chown -R root:root "$pdir" |
diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 462e2cedaa6a..26d255de6beb 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c | |||
@@ -3470,10 +3470,16 @@ int snd_hda_multi_out_analog_open(struct hda_codec *codec, | |||
3470 | } | 3470 | } |
3471 | mutex_lock(&codec->spdif_mutex); | 3471 | mutex_lock(&codec->spdif_mutex); |
3472 | if (mout->share_spdif) { | 3472 | if (mout->share_spdif) { |
3473 | runtime->hw.rates &= mout->spdif_rates; | 3473 | if ((runtime->hw.rates & mout->spdif_rates) && |
3474 | runtime->hw.formats &= mout->spdif_formats; | 3474 | (runtime->hw.formats & mout->spdif_formats)) { |
3475 | if (mout->spdif_maxbps < hinfo->maxbps) | 3475 | runtime->hw.rates &= mout->spdif_rates; |
3476 | hinfo->maxbps = mout->spdif_maxbps; | 3476 | runtime->hw.formats &= mout->spdif_formats; |
3477 | if (mout->spdif_maxbps < hinfo->maxbps) | ||
3478 | hinfo->maxbps = mout->spdif_maxbps; | ||
3479 | } else { | ||
3480 | mout->share_spdif = 0; | ||
3481 | /* FIXME: need notify? */ | ||
3482 | } | ||
3477 | } | 3483 | } |
3478 | mutex_unlock(&codec->spdif_mutex); | 3484 | mutex_unlock(&codec->spdif_mutex); |
3479 | } | 3485 | } |
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 4e9ea7080270..1877d95d4aa6 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c | |||
@@ -1454,6 +1454,7 @@ static int azx_pcm_open(struct snd_pcm_substream *substream) | |||
1454 | mutex_unlock(&chip->open_mutex); | 1454 | mutex_unlock(&chip->open_mutex); |
1455 | return err; | 1455 | return err; |
1456 | } | 1456 | } |
1457 | snd_pcm_limit_hw_rates(runtime); | ||
1457 | spin_lock_irqsave(&chip->reg_lock, flags); | 1458 | spin_lock_irqsave(&chip->reg_lock, flags); |
1458 | azx_dev->substream = substream; | 1459 | azx_dev->substream = substream; |
1459 | azx_dev->running = 0; | 1460 | azx_dev->running = 0; |
@@ -1463,6 +1464,12 @@ static int azx_pcm_open(struct snd_pcm_substream *substream) | |||
1463 | snd_pcm_set_sync(substream); | 1464 | snd_pcm_set_sync(substream); |
1464 | mutex_unlock(&chip->open_mutex); | 1465 | mutex_unlock(&chip->open_mutex); |
1465 | 1466 | ||
1467 | if (snd_BUG_ON(!runtime->hw.channels_min || !runtime->hw.channels_max)) | ||
1468 | return -EINVAL; | ||
1469 | if (snd_BUG_ON(!runtime->hw.formats)) | ||
1470 | return -EINVAL; | ||
1471 | if (snd_BUG_ON(!runtime->hw.rates)) | ||
1472 | return -EINVAL; | ||
1466 | return 0; | 1473 | return 0; |
1467 | } | 1474 | } |
1468 | 1475 | ||
diff --git a/sound/pci/hda/patch_analog.c b/sound/pci/hda/patch_analog.c index 1988582d1ab8..be7d25fa7f35 100644 --- a/sound/pci/hda/patch_analog.c +++ b/sound/pci/hda/patch_analog.c | |||
@@ -3746,9 +3746,30 @@ static struct snd_kcontrol_new ad1884a_laptop_mixers[] = { | |||
3746 | { } /* end */ | 3746 | { } /* end */ |
3747 | }; | 3747 | }; |
3748 | 3748 | ||
3749 | static int ad1884a_mobile_master_sw_put(struct snd_kcontrol *kcontrol, | ||
3750 | struct snd_ctl_elem_value *ucontrol) | ||
3751 | { | ||
3752 | struct hda_codec *codec = snd_kcontrol_chip(kcontrol); | ||
3753 | int ret = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol); | ||
3754 | int mute = (!ucontrol->value.integer.value[0] && | ||
3755 | !ucontrol->value.integer.value[1]); | ||
3756 | /* toggle GPIO1 according to the mute state */ | ||
3757 | snd_hda_codec_write(codec, 0x01, 0, AC_VERB_SET_GPIO_DATA, | ||
3758 | mute ? 0x02 : 0x0); | ||
3759 | return ret; | ||
3760 | } | ||
3761 | |||
3749 | static struct snd_kcontrol_new ad1884a_mobile_mixers[] = { | 3762 | static struct snd_kcontrol_new ad1884a_mobile_mixers[] = { |
3750 | HDA_CODEC_VOLUME("Master Playback Volume", 0x21, 0x0, HDA_OUTPUT), | 3763 | HDA_CODEC_VOLUME("Master Playback Volume", 0x21, 0x0, HDA_OUTPUT), |
3751 | HDA_CODEC_MUTE("Master Playback Switch", 0x21, 0x0, HDA_OUTPUT), | 3764 | /*HDA_CODEC_MUTE("Master Playback Switch", 0x21, 0x0, HDA_OUTPUT),*/ |
3765 | { | ||
3766 | .iface = SNDRV_CTL_ELEM_IFACE_MIXER, | ||
3767 | .name = "Master Playback Switch", | ||
3768 | .info = snd_hda_mixer_amp_switch_info, | ||
3769 | .get = snd_hda_mixer_amp_switch_get, | ||
3770 | .put = ad1884a_mobile_master_sw_put, | ||
3771 | .private_value = HDA_COMPOSE_AMP_VAL(0x21, 3, 0, HDA_OUTPUT), | ||
3772 | }, | ||
3752 | HDA_CODEC_VOLUME("PCM Playback Volume", 0x20, 0x5, HDA_INPUT), | 3773 | HDA_CODEC_VOLUME("PCM Playback Volume", 0x20, 0x5, HDA_INPUT), |
3753 | HDA_CODEC_MUTE("PCM Playback Switch", 0x20, 0x5, HDA_INPUT), | 3774 | HDA_CODEC_MUTE("PCM Playback Switch", 0x20, 0x5, HDA_INPUT), |
3754 | HDA_CODEC_VOLUME("Mic Capture Volume", 0x14, 0x0, HDA_INPUT), | 3775 | HDA_CODEC_VOLUME("Mic Capture Volume", 0x14, 0x0, HDA_INPUT), |
@@ -3869,6 +3890,10 @@ static struct hda_verb ad1884a_mobile_verbs[] = { | |||
3869 | /* unsolicited event for pin-sense */ | 3890 | /* unsolicited event for pin-sense */ |
3870 | {0x11, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | AD1884A_HP_EVENT}, | 3891 | {0x11, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | AD1884A_HP_EVENT}, |
3871 | {0x14, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | AD1884A_MIC_EVENT}, | 3892 | {0x14, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | AD1884A_MIC_EVENT}, |
3893 | /* allow to touch GPIO1 (for mute control) */ | ||
3894 | {0x01, AC_VERB_SET_GPIO_MASK, 0x02}, | ||
3895 | {0x01, AC_VERB_SET_GPIO_DIRECTION, 0x02}, | ||
3896 | {0x01, AC_VERB_SET_GPIO_DATA, 0x02}, /* first muted */ | ||
3872 | { } /* end */ | 3897 | { } /* end */ |
3873 | }; | 3898 | }; |
3874 | 3899 | ||
@@ -3978,6 +4003,7 @@ static struct snd_pci_quirk ad1884a_cfg_tbl[] = { | |||
3978 | SND_PCI_QUIRK(0x103c, 0x3037, "HP 2230s", AD1884A_LAPTOP), | 4003 | SND_PCI_QUIRK(0x103c, 0x3037, "HP 2230s", AD1884A_LAPTOP), |
3979 | SND_PCI_QUIRK(0x103c, 0x3056, "HP", AD1884A_MOBILE), | 4004 | SND_PCI_QUIRK(0x103c, 0x3056, "HP", AD1884A_MOBILE), |
3980 | SND_PCI_QUIRK_MASK(0x103c, 0xfff0, 0x3070, "HP", AD1884A_MOBILE), | 4005 | SND_PCI_QUIRK_MASK(0x103c, 0xfff0, 0x3070, "HP", AD1884A_MOBILE), |
4006 | SND_PCI_QUIRK_MASK(0x103c, 0xfff0, 0x30d0, "HP laptop", AD1884A_LAPTOP), | ||
3981 | SND_PCI_QUIRK_MASK(0x103c, 0xfff0, 0x30e0, "HP laptop", AD1884A_LAPTOP), | 4007 | SND_PCI_QUIRK_MASK(0x103c, 0xfff0, 0x30e0, "HP laptop", AD1884A_LAPTOP), |
3982 | SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x3600, "HP laptop", AD1884A_LAPTOP), | 4008 | SND_PCI_QUIRK_MASK(0x103c, 0xff00, 0x3600, "HP laptop", AD1884A_LAPTOP), |
3983 | SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X300", AD1884A_THINKPAD), | 4009 | SND_PCI_QUIRK(0x17aa, 0x20ac, "Thinkpad X300", AD1884A_THINKPAD), |
diff --git a/sound/pci/hda/patch_ca0110.c b/sound/pci/hda/patch_ca0110.c index 392d108c3558..019ca7cb56d7 100644 --- a/sound/pci/hda/patch_ca0110.c +++ b/sound/pci/hda/patch_ca0110.c | |||
@@ -510,7 +510,7 @@ static int ca0110_parse_auto_config(struct hda_codec *codec) | |||
510 | } | 510 | } |
511 | 511 | ||
512 | 512 | ||
513 | int patch_ca0110(struct hda_codec *codec) | 513 | static int patch_ca0110(struct hda_codec *codec) |
514 | { | 514 | { |
515 | struct ca0110_spec *spec; | 515 | struct ca0110_spec *spec; |
516 | int err; | 516 | int err; |
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c index 3a8e58c483df..e661b21354be 100644 --- a/sound/pci/hda/patch_realtek.c +++ b/sound/pci/hda/patch_realtek.c | |||
@@ -12876,20 +12876,11 @@ static struct snd_kcontrol_new alc269_lifebook_mixer[] = { | |||
12876 | { } | 12876 | { } |
12877 | }; | 12877 | }; |
12878 | 12878 | ||
12879 | /* bind volumes of both NID 0x0c and 0x0d */ | ||
12880 | static struct hda_bind_ctls alc269_epc_bind_vol = { | ||
12881 | .ops = &snd_hda_bind_vol, | ||
12882 | .values = { | ||
12883 | HDA_COMPOSE_AMP_VAL(0x02, 3, 0, HDA_OUTPUT), | ||
12884 | HDA_COMPOSE_AMP_VAL(0x03, 3, 0, HDA_OUTPUT), | ||
12885 | 0 | ||
12886 | }, | ||
12887 | }; | ||
12888 | |||
12889 | static struct snd_kcontrol_new alc269_eeepc_mixer[] = { | 12879 | static struct snd_kcontrol_new alc269_eeepc_mixer[] = { |
12890 | HDA_CODEC_MUTE("iSpeaker Playback Switch", 0x14, 0x0, HDA_OUTPUT), | 12880 | HDA_CODEC_MUTE("Speaker Playback Switch", 0x14, 0x0, HDA_OUTPUT), |
12891 | HDA_BIND_VOL("LineOut Playback Volume", &alc269_epc_bind_vol), | 12881 | HDA_CODEC_MUTE("Speaker Playback Volume", 0x02, 0x0, HDA_OUTPUT), |
12892 | HDA_CODEC_MUTE("LineOut Playback Switch", 0x15, 0x0, HDA_OUTPUT), | 12882 | HDA_CODEC_MUTE("Headphone Playback Switch", 0x15, 0x0, HDA_OUTPUT), |
12883 | HDA_CODEC_MUTE("Headphone Playback Volume", 0x03, 0x0, HDA_OUTPUT), | ||
12893 | { } /* end */ | 12884 | { } /* end */ |
12894 | }; | 12885 | }; |
12895 | 12886 | ||
@@ -12902,12 +12893,7 @@ static struct snd_kcontrol_new alc269_epc_capture_mixer[] = { | |||
12902 | }; | 12893 | }; |
12903 | 12894 | ||
12904 | /* FSC amilo */ | 12895 | /* FSC amilo */ |
12905 | static struct snd_kcontrol_new alc269_fujitsu_mixer[] = { | 12896 | #define alc269_fujitsu_mixer alc269_eeepc_mixer |
12906 | HDA_CODEC_MUTE("Speaker Playback Switch", 0x14, 0x0, HDA_OUTPUT), | ||
12907 | HDA_CODEC_MUTE("Headphone Playback Switch", 0x15, 0x0, HDA_OUTPUT), | ||
12908 | HDA_BIND_VOL("PCM Playback Volume", &alc269_epc_bind_vol), | ||
12909 | { } /* end */ | ||
12910 | }; | ||
12911 | 12897 | ||
12912 | static struct hda_verb alc269_quanta_fl1_verbs[] = { | 12898 | static struct hda_verb alc269_quanta_fl1_verbs[] = { |
12913 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x01}, | 12899 | {0x15, AC_VERB_SET_CONNECT_SEL, 0x01}, |
diff --git a/sound/pci/oxygen/virtuoso.c b/sound/pci/oxygen/virtuoso.c index bf971f7cfdc6..6ebcb6bdd712 100644 --- a/sound/pci/oxygen/virtuoso.c +++ b/sound/pci/oxygen/virtuoso.c | |||
@@ -635,6 +635,8 @@ static void xonar_d2_resume(struct oxygen *chip) | |||
635 | 635 | ||
636 | static void xonar_d1_resume(struct oxygen *chip) | 636 | static void xonar_d1_resume(struct oxygen *chip) |
637 | { | 637 | { |
638 | oxygen_set_bits8(chip, OXYGEN_FUNCTION, OXYGEN_FUNCTION_RESET_CODEC); | ||
639 | msleep(1); | ||
638 | cs43xx_init(chip); | 640 | cs43xx_init(chip); |
639 | xonar_enable_output(chip); | 641 | xonar_enable_output(chip); |
640 | } | 642 | } |
diff --git a/sound/soc/fsl/Kconfig b/sound/soc/fsl/Kconfig index 5dbebf82249c..8cb65ccad35f 100644 --- a/sound/soc/fsl/Kconfig +++ b/sound/soc/fsl/Kconfig | |||
@@ -33,7 +33,7 @@ config SND_SOC_MPC5200_I2S | |||
33 | config SND_SOC_MPC5200_AC97 | 33 | config SND_SOC_MPC5200_AC97 |
34 | tristate "Freescale MPC5200 PSC in AC97 mode driver" | 34 | tristate "Freescale MPC5200 PSC in AC97 mode driver" |
35 | depends on PPC_MPC52xx && PPC_BESTCOMM | 35 | depends on PPC_MPC52xx && PPC_BESTCOMM |
36 | select AC97_BUS | 36 | select SND_SOC_AC97_BUS |
37 | select SND_MPC52xx_DMA | 37 | select SND_MPC52xx_DMA |
38 | select PPC_BESTCOMM_GEN_BD | 38 | select PPC_BESTCOMM_GEN_BD |
39 | help | 39 | help |
@@ -41,7 +41,7 @@ config SND_SOC_MPC5200_AC97 | |||
41 | 41 | ||
42 | config SND_MPC52xx_SOC_PCM030 | 42 | config SND_MPC52xx_SOC_PCM030 |
43 | tristate "SoC AC97 Audio support for Phytec pcm030 and WM9712" | 43 | tristate "SoC AC97 Audio support for Phytec pcm030 and WM9712" |
44 | depends on PPC_MPC5200_SIMPLE && BROKEN | 44 | depends on PPC_MPC5200_SIMPLE |
45 | select SND_SOC_MPC5200_AC97 | 45 | select SND_SOC_MPC5200_AC97 |
46 | select SND_SOC_WM9712 | 46 | select SND_SOC_WM9712 |
47 | help | 47 | help |
@@ -50,7 +50,7 @@ config SND_MPC52xx_SOC_PCM030 | |||
50 | 50 | ||
51 | config SND_MPC52xx_SOC_EFIKA | 51 | config SND_MPC52xx_SOC_EFIKA |
52 | tristate "SoC AC97 Audio support for bbplan Efika and STAC9766" | 52 | tristate "SoC AC97 Audio support for bbplan Efika and STAC9766" |
53 | depends on PPC_EFIKA && BROKEN | 53 | depends on PPC_EFIKA |
54 | select SND_SOC_MPC5200_AC97 | 54 | select SND_SOC_MPC5200_AC97 |
55 | select SND_SOC_STAC9766 | 55 | select SND_SOC_STAC9766 |
56 | help | 56 | help |
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c index 6454e15f7d28..84a1950880eb 100644 --- a/sound/soc/omap/omap-pcm.c +++ b/sound/soc/omap/omap-pcm.c | |||
@@ -216,12 +216,15 @@ static snd_pcm_uframes_t omap_pcm_pointer(struct snd_pcm_substream *substream) | |||
216 | dma_addr_t ptr; | 216 | dma_addr_t ptr; |
217 | snd_pcm_uframes_t offset; | 217 | snd_pcm_uframes_t offset; |
218 | 218 | ||
219 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 219 | if (substream->stream == SNDRV_PCM_STREAM_CAPTURE) { |
220 | ptr = omap_get_dma_src_pos(prtd->dma_ch); | ||
221 | else | ||
222 | ptr = omap_get_dma_dst_pos(prtd->dma_ch); | 220 | ptr = omap_get_dma_dst_pos(prtd->dma_ch); |
221 | offset = bytes_to_frames(runtime, ptr - runtime->dma_addr); | ||
222 | } else if (!(cpu_is_omap1510())) { | ||
223 | ptr = omap_get_dma_src_pos(prtd->dma_ch); | ||
224 | offset = bytes_to_frames(runtime, ptr - runtime->dma_addr); | ||
225 | } else | ||
226 | offset = prtd->period_index * runtime->period_size; | ||
223 | 227 | ||
224 | offset = bytes_to_frames(runtime, ptr - runtime->dma_addr); | ||
225 | if (offset >= runtime->buffer_size) | 228 | if (offset >= runtime->buffer_size) |
226 | offset = 0; | 229 | offset = 0; |
227 | 230 | ||
diff --git a/sound/soc/pxa/pxa2xx-i2s.c b/sound/soc/pxa/pxa2xx-i2s.c index 4743e262895d..6b8f655d1ad8 100644 --- a/sound/soc/pxa/pxa2xx-i2s.c +++ b/sound/soc/pxa/pxa2xx-i2s.c | |||
@@ -167,6 +167,7 @@ static int pxa2xx_i2s_hw_params(struct snd_pcm_substream *substream, | |||
167 | 167 | ||
168 | BUG_ON(IS_ERR(clk_i2s)); | 168 | BUG_ON(IS_ERR(clk_i2s)); |
169 | clk_enable(clk_i2s); | 169 | clk_enable(clk_i2s); |
170 | dai->private_data = dai; | ||
170 | pxa_i2s_wait(); | 171 | pxa_i2s_wait(); |
171 | 172 | ||
172 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) | 173 | if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) |
@@ -255,7 +256,10 @@ static void pxa2xx_i2s_shutdown(struct snd_pcm_substream *substream, | |||
255 | if ((SACR1 & (SACR1_DREC | SACR1_DRPL)) == (SACR1_DREC | SACR1_DRPL)) { | 256 | if ((SACR1 & (SACR1_DREC | SACR1_DRPL)) == (SACR1_DREC | SACR1_DRPL)) { |
256 | SACR0 &= ~SACR0_ENB; | 257 | SACR0 &= ~SACR0_ENB; |
257 | pxa_i2s_wait(); | 258 | pxa_i2s_wait(); |
258 | clk_disable(clk_i2s); | 259 | if (dai->private_data != NULL) { |
260 | clk_disable(clk_i2s); | ||
261 | dai->private_data = NULL; | ||
262 | } | ||
259 | } | 263 | } |
260 | } | 264 | } |
261 | 265 | ||
@@ -336,6 +340,7 @@ static int pxa2xx_i2s_probe(struct platform_device *dev) | |||
336 | return PTR_ERR(clk_i2s); | 340 | return PTR_ERR(clk_i2s); |
337 | 341 | ||
338 | pxa_i2s_dai.dev = &dev->dev; | 342 | pxa_i2s_dai.dev = &dev->dev; |
343 | pxa_i2s_dai.private_data = NULL; | ||
339 | ret = snd_soc_register_dai(&pxa_i2s_dai); | 344 | ret = snd_soc_register_dai(&pxa_i2s_dai); |
340 | if (ret != 0) | 345 | if (ret != 0) |
341 | clk_put(clk_i2s); | 346 | clk_put(clk_i2s); |
diff --git a/sound/sound_core.c b/sound/sound_core.c index 12522e6913d9..a41f8b127f49 100644 --- a/sound/sound_core.c +++ b/sound/sound_core.c | |||
@@ -10,6 +10,8 @@ | |||
10 | #include <linux/module.h> | 10 | #include <linux/module.h> |
11 | #include <linux/device.h> | 11 | #include <linux/device.h> |
12 | #include <linux/err.h> | 12 | #include <linux/err.h> |
13 | #include <linux/kdev_t.h> | ||
14 | #include <linux/major.h> | ||
13 | #include <sound/core.h> | 15 | #include <sound/core.h> |
14 | 16 | ||
15 | #ifdef CONFIG_SOUND_OSS_CORE | 17 | #ifdef CONFIG_SOUND_OSS_CORE |
@@ -29,6 +31,8 @@ MODULE_LICENSE("GPL"); | |||
29 | 31 | ||
30 | static char *sound_nodename(struct device *dev) | 32 | static char *sound_nodename(struct device *dev) |
31 | { | 33 | { |
34 | if (MAJOR(dev->devt) == SOUND_MAJOR) | ||
35 | return NULL; | ||
32 | return kasprintf(GFP_KERNEL, "snd/%s", dev_name(dev)); | 36 | return kasprintf(GFP_KERNEL, "snd/%s", dev_name(dev)); |
33 | } | 37 | } |
34 | 38 | ||
@@ -104,7 +108,6 @@ module_exit(cleanup_soundcore); | |||
104 | #include <linux/types.h> | 108 | #include <linux/types.h> |
105 | #include <linux/kernel.h> | 109 | #include <linux/kernel.h> |
106 | #include <linux/sound.h> | 110 | #include <linux/sound.h> |
107 | #include <linux/major.h> | ||
108 | #include <linux/kmod.h> | 111 | #include <linux/kmod.h> |
109 | 112 | ||
110 | #define SOUND_STEP 16 | 113 | #define SOUND_STEP 16 |
diff --git a/sound/usb/caiaq/device.c b/sound/usb/caiaq/device.c index 0e5db719de24..de38108f0b28 100644 --- a/sound/usb/caiaq/device.c +++ b/sound/usb/caiaq/device.c | |||
@@ -35,7 +35,7 @@ | |||
35 | #include "input.h" | 35 | #include "input.h" |
36 | 36 | ||
37 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); | 37 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); |
38 | MODULE_DESCRIPTION("caiaq USB audio, version 1.3.17"); | 38 | MODULE_DESCRIPTION("caiaq USB audio, version 1.3.18"); |
39 | MODULE_LICENSE("GPL"); | 39 | MODULE_LICENSE("GPL"); |
40 | MODULE_SUPPORTED_DEVICE("{{Native Instruments, RigKontrol2}," | 40 | MODULE_SUPPORTED_DEVICE("{{Native Instruments, RigKontrol2}," |
41 | "{Native Instruments, RigKontrol3}," | 41 | "{Native Instruments, RigKontrol3}," |
@@ -349,7 +349,9 @@ static void __devinit setup_card(struct snd_usb_caiaqdev *dev) | |||
349 | log("Unable to set up control system (ret=%d)\n", ret); | 349 | log("Unable to set up control system (ret=%d)\n", ret); |
350 | } | 350 | } |
351 | 351 | ||
352 | static int create_card(struct usb_device* usb_dev, struct snd_card **cardp) | 352 | static int create_card(struct usb_device *usb_dev, |
353 | struct usb_interface *intf, | ||
354 | struct snd_card **cardp) | ||
353 | { | 355 | { |
354 | int devnum; | 356 | int devnum; |
355 | int err; | 357 | int err; |
@@ -374,7 +376,7 @@ static int create_card(struct usb_device* usb_dev, struct snd_card **cardp) | |||
374 | dev->chip.usb_id = USB_ID(le16_to_cpu(usb_dev->descriptor.idVendor), | 376 | dev->chip.usb_id = USB_ID(le16_to_cpu(usb_dev->descriptor.idVendor), |
375 | le16_to_cpu(usb_dev->descriptor.idProduct)); | 377 | le16_to_cpu(usb_dev->descriptor.idProduct)); |
376 | spin_lock_init(&dev->spinlock); | 378 | spin_lock_init(&dev->spinlock); |
377 | snd_card_set_dev(card, &usb_dev->dev); | 379 | snd_card_set_dev(card, &intf->dev); |
378 | 380 | ||
379 | *cardp = card; | 381 | *cardp = card; |
380 | return 0; | 382 | return 0; |
@@ -461,7 +463,7 @@ static int __devinit snd_probe(struct usb_interface *intf, | |||
461 | struct snd_card *card; | 463 | struct snd_card *card; |
462 | struct usb_device *device = interface_to_usbdev(intf); | 464 | struct usb_device *device = interface_to_usbdev(intf); |
463 | 465 | ||
464 | ret = create_card(device, &card); | 466 | ret = create_card(device, intf, &card); |
465 | 467 | ||
466 | if (ret < 0) | 468 | if (ret < 0) |
467 | return ret; | 469 | return ret; |
diff --git a/sound/usb/usx2y/us122l.c b/sound/usb/usx2y/us122l.c index a5aae9d67f31..fd44946ce4b3 100644 --- a/sound/usb/usx2y/us122l.c +++ b/sound/usb/usx2y/us122l.c | |||
@@ -514,7 +514,6 @@ static int usx2y_create_card(struct usb_device *device, struct snd_card **cardp) | |||
514 | US122L(card)->chip.dev->bus->busnum, | 514 | US122L(card)->chip.dev->bus->busnum, |
515 | US122L(card)->chip.dev->devnum | 515 | US122L(card)->chip.dev->devnum |
516 | ); | 516 | ); |
517 | snd_card_set_dev(card, &device->dev); | ||
518 | *cardp = card; | 517 | *cardp = card; |
519 | return 0; | 518 | return 0; |
520 | } | 519 | } |
@@ -531,6 +530,7 @@ static int us122l_usb_probe(struct usb_interface *intf, | |||
531 | if (err < 0) | 530 | if (err < 0) |
532 | return err; | 531 | return err; |
533 | 532 | ||
533 | snd_card_set_dev(card, &intf->dev); | ||
534 | if (!us122l_create_card(card)) { | 534 | if (!us122l_create_card(card)) { |
535 | snd_card_free(card); | 535 | snd_card_free(card); |
536 | return -EINVAL; | 536 | return -EINVAL; |
diff --git a/sound/usb/usx2y/usbusx2y.c b/sound/usb/usx2y/usbusx2y.c index 5ce0da23ee96..cb4bb8373ca2 100644 --- a/sound/usb/usx2y/usbusx2y.c +++ b/sound/usb/usx2y/usbusx2y.c | |||
@@ -364,7 +364,6 @@ static int usX2Y_create_card(struct usb_device *device, struct snd_card **cardp) | |||
364 | 0,//us428(card)->usbmidi.ifnum, | 364 | 0,//us428(card)->usbmidi.ifnum, |
365 | usX2Y(card)->chip.dev->bus->busnum, usX2Y(card)->chip.dev->devnum | 365 | usX2Y(card)->chip.dev->bus->busnum, usX2Y(card)->chip.dev->devnum |
366 | ); | 366 | ); |
367 | snd_card_set_dev(card, &device->dev); | ||
368 | *cardp = card; | 367 | *cardp = card; |
369 | return 0; | 368 | return 0; |
370 | } | 369 | } |
@@ -388,6 +387,7 @@ static int usX2Y_usb_probe(struct usb_device *device, | |||
388 | err = usX2Y_create_card(device, &card); | 387 | err = usX2Y_create_card(device, &card); |
389 | if (err < 0) | 388 | if (err < 0) |
390 | return err; | 389 | return err; |
390 | snd_card_set_dev(card, &intf->dev); | ||
391 | if ((err = usX2Y_hwdep_new(card, device)) < 0 || | 391 | if ((err = usX2Y_hwdep_new(card, device)) < 0 || |
392 | (err = snd_card_register(card)) < 0) { | 392 | (err = snd_card_register(card)) < 0) { |
393 | snd_card_free(card); | 393 | snd_card_free(card); |
diff --git a/tools/perf/perf.h b/tools/perf/perf.h index 8f729aedc1a3..d3042a6ba03d 100644 --- a/tools/perf/perf.h +++ b/tools/perf/perf.h | |||
@@ -29,6 +29,12 @@ | |||
29 | #define cpu_relax() asm volatile("" ::: "memory") | 29 | #define cpu_relax() asm volatile("" ::: "memory") |
30 | #endif | 30 | #endif |
31 | 31 | ||
32 | #ifdef __hppa__ | ||
33 | #include "../../arch/parisc/include/asm/unistd.h" | ||
34 | #define rmb() asm volatile("" ::: "memory") | ||
35 | #define cpu_relax() asm volatile("" ::: "memory"); | ||
36 | #endif | ||
37 | |||
32 | #include <time.h> | 38 | #include <time.h> |
33 | #include <unistd.h> | 39 | #include <unistd.h> |
34 | #include <sys/types.h> | 40 | #include <sys/types.h> |