diff options
-rw-r--r-- | MAINTAINERS | 14 | ||||
-rw-r--r-- | arch/x86/boot/compressed/eboot.c | 2 | ||||
-rw-r--r-- | arch/x86/boot/header.S | 3 | ||||
-rw-r--r-- | arch/x86/include/asm/ptrace.h | 15 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/amd.c | 14 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_amd.c | 2 | ||||
-rw-r--r-- | arch/x86/kernel/cpu/mcheck/mce_intel.c | 31 | ||||
-rw-r--r-- | arch/x86/kernel/entry_64.S | 14 | ||||
-rw-r--r-- | arch/x86/kernel/microcode_amd.c | 8 | ||||
-rw-r--r-- | arch/x86/kernel/ptrace.c | 30 | ||||
-rw-r--r-- | arch/x86/mm/tlb.c | 2 | ||||
-rw-r--r-- | arch/x86/pci/ce4100.c | 13 | ||||
-rw-r--r-- | arch/x86/platform/ce4100/ce4100.c | 24 | ||||
-rw-r--r-- | drivers/edac/amd64_edac.h | 2 | ||||
-rw-r--r-- | drivers/edac/edac_stub.c | 2 | ||||
-rw-r--r-- | drivers/edac/mce_amd_inj.c | 4 |
16 files changed, 131 insertions, 49 deletions
diff --git a/MAINTAINERS b/MAINTAINERS index 244b2f229e5c..9386a63ea8f6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -534,9 +534,9 @@ F: drivers/iommu/amd_iommu*.[ch] | |||
534 | F: include/linux/amd-iommu.h | 534 | F: include/linux/amd-iommu.h |
535 | 535 | ||
536 | AMD MICROCODE UPDATE SUPPORT | 536 | AMD MICROCODE UPDATE SUPPORT |
537 | M: Andreas Herrmann <andreas.herrmann3@amd.com> | 537 | M: Andreas Herrmann <herrmann.der.user@googlemail.com> |
538 | L: amd64-microcode@amd64.org | 538 | L: amd64-microcode@amd64.org |
539 | S: Supported | 539 | S: Maintained |
540 | F: arch/x86/kernel/microcode_amd.c | 540 | F: arch/x86/kernel/microcode_amd.c |
541 | 541 | ||
542 | AMS (Apple Motion Sensor) DRIVER | 542 | AMS (Apple Motion Sensor) DRIVER |
@@ -2716,10 +2716,10 @@ F: include/linux/edac.h | |||
2716 | 2716 | ||
2717 | EDAC-AMD64 | 2717 | EDAC-AMD64 |
2718 | M: Doug Thompson <dougthompson@xmission.com> | 2718 | M: Doug Thompson <dougthompson@xmission.com> |
2719 | M: Borislav Petkov <borislav.petkov@amd.com> | 2719 | M: Borislav Petkov <bp@alien8.de> |
2720 | L: linux-edac@vger.kernel.org | 2720 | L: linux-edac@vger.kernel.org |
2721 | W: bluesmoke.sourceforge.net | 2721 | W: bluesmoke.sourceforge.net |
2722 | S: Supported | 2722 | S: Maintained |
2723 | F: drivers/edac/amd64_edac* | 2723 | F: drivers/edac/amd64_edac* |
2724 | 2724 | ||
2725 | EDAC-E752X | 2725 | EDAC-E752X |
@@ -3761,7 +3761,7 @@ S: Maintained | |||
3761 | F: drivers/platform/x86/ideapad-laptop.c | 3761 | F: drivers/platform/x86/ideapad-laptop.c |
3762 | 3762 | ||
3763 | IDE/ATAPI DRIVERS | 3763 | IDE/ATAPI DRIVERS |
3764 | M: Borislav Petkov <petkovbb@gmail.com> | 3764 | M: Borislav Petkov <bp@alien8.de> |
3765 | L: linux-ide@vger.kernel.org | 3765 | L: linux-ide@vger.kernel.org |
3766 | S: Maintained | 3766 | S: Maintained |
3767 | F: Documentation/cdrom/ide-cd | 3767 | F: Documentation/cdrom/ide-cd |
@@ -5421,7 +5421,7 @@ S: Maintained | |||
5421 | F: sound/drivers/opl4/ | 5421 | F: sound/drivers/opl4/ |
5422 | 5422 | ||
5423 | OPROFILE | 5423 | OPROFILE |
5424 | M: Robert Richter <robert.richter@amd.com> | 5424 | M: Robert Richter <rric@kernel.org> |
5425 | L: oprofile-list@lists.sf.net | 5425 | L: oprofile-list@lists.sf.net |
5426 | S: Maintained | 5426 | S: Maintained |
5427 | F: arch/*/include/asm/oprofile*.h | 5427 | F: arch/*/include/asm/oprofile*.h |
@@ -8206,7 +8206,7 @@ F: drivers/platform/x86 | |||
8206 | 8206 | ||
8207 | X86 MCE INFRASTRUCTURE | 8207 | X86 MCE INFRASTRUCTURE |
8208 | M: Tony Luck <tony.luck@intel.com> | 8208 | M: Tony Luck <tony.luck@intel.com> |
8209 | M: Borislav Petkov <bp@amd64.org> | 8209 | M: Borislav Petkov <bp@alien8.de> |
8210 | L: linux-edac@vger.kernel.org | 8210 | L: linux-edac@vger.kernel.org |
8211 | S: Maintained | 8211 | S: Maintained |
8212 | F: arch/x86/kernel/cpu/mcheck/* | 8212 | F: arch/x86/kernel/cpu/mcheck/* |
diff --git a/arch/x86/boot/compressed/eboot.c b/arch/x86/boot/compressed/eboot.c index c760e073963e..e87b0cac14b5 100644 --- a/arch/x86/boot/compressed/eboot.c +++ b/arch/x86/boot/compressed/eboot.c | |||
@@ -12,6 +12,8 @@ | |||
12 | #include <asm/setup.h> | 12 | #include <asm/setup.h> |
13 | #include <asm/desc.h> | 13 | #include <asm/desc.h> |
14 | 14 | ||
15 | #undef memcpy /* Use memcpy from misc.c */ | ||
16 | |||
15 | #include "eboot.h" | 17 | #include "eboot.h" |
16 | 18 | ||
17 | static efi_system_table_t *sys_table; | 19 | static efi_system_table_t *sys_table; |
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S index 2a017441b8b2..8c132a625b94 100644 --- a/arch/x86/boot/header.S +++ b/arch/x86/boot/header.S | |||
@@ -476,6 +476,3 @@ die: | |||
476 | setup_corrupt: | 476 | setup_corrupt: |
477 | .byte 7 | 477 | .byte 7 |
478 | .string "No setup signature found...\n" | 478 | .string "No setup signature found...\n" |
479 | |||
480 | .data | ||
481 | dummy: .long 0 | ||
diff --git a/arch/x86/include/asm/ptrace.h b/arch/x86/include/asm/ptrace.h index dcfde52979c3..19f16ebaf4fa 100644 --- a/arch/x86/include/asm/ptrace.h +++ b/arch/x86/include/asm/ptrace.h | |||
@@ -205,21 +205,14 @@ static inline bool user_64bit_mode(struct pt_regs *regs) | |||
205 | } | 205 | } |
206 | #endif | 206 | #endif |
207 | 207 | ||
208 | /* | ||
209 | * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode | ||
210 | * when it traps. The previous stack will be directly underneath the saved | ||
211 | * registers, and 'sp/ss' won't even have been saved. Thus the '®s->sp'. | ||
212 | * | ||
213 | * This is valid only for kernel mode traps. | ||
214 | */ | ||
215 | static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) | ||
216 | { | ||
217 | #ifdef CONFIG_X86_32 | 208 | #ifdef CONFIG_X86_32 |
218 | return (unsigned long)(®s->sp); | 209 | extern unsigned long kernel_stack_pointer(struct pt_regs *regs); |
219 | #else | 210 | #else |
211 | static inline unsigned long kernel_stack_pointer(struct pt_regs *regs) | ||
212 | { | ||
220 | return regs->sp; | 213 | return regs->sp; |
221 | #endif | ||
222 | } | 214 | } |
215 | #endif | ||
223 | 216 | ||
224 | #define GET_IP(regs) ((regs)->ip) | 217 | #define GET_IP(regs) ((regs)->ip) |
225 | #define GET_FP(regs) ((regs)->bp) | 218 | #define GET_FP(regs) ((regs)->bp) |
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index f7e98a2c0d12..1b7d1656a042 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -631,6 +631,20 @@ static void __cpuinit init_amd(struct cpuinfo_x86 *c) | |||
631 | } | 631 | } |
632 | } | 632 | } |
633 | 633 | ||
634 | /* | ||
635 | * The way access filter has a performance penalty on some workloads. | ||
636 | * Disable it on the affected CPUs. | ||
637 | */ | ||
638 | if ((c->x86 == 0x15) && | ||
639 | (c->x86_model >= 0x02) && (c->x86_model < 0x20)) { | ||
640 | u64 val; | ||
641 | |||
642 | if (!rdmsrl_safe(0xc0011021, &val) && !(val & 0x1E)) { | ||
643 | val |= 0x1E; | ||
644 | wrmsrl_safe(0xc0011021, val); | ||
645 | } | ||
646 | } | ||
647 | |||
634 | cpu_detect_cache_sizes(c); | 648 | cpu_detect_cache_sizes(c); |
635 | 649 | ||
636 | /* Multi core CPU? */ | 650 | /* Multi core CPU? */ |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_amd.c b/arch/x86/kernel/cpu/mcheck/mce_amd.c index 698b6ec12e0f..1ac581f38dfa 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_amd.c +++ b/arch/x86/kernel/cpu/mcheck/mce_amd.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * | 6 | * |
7 | * Written by Jacob Shin - AMD, Inc. | 7 | * Written by Jacob Shin - AMD, Inc. |
8 | * | 8 | * |
9 | * Support: borislav.petkov@amd.com | 9 | * Maintained by: Borislav Petkov <bp@alien8.de> |
10 | * | 10 | * |
11 | * April 2006 | 11 | * April 2006 |
12 | * - added support for AMD Family 0x10 processors | 12 | * - added support for AMD Family 0x10 processors |
diff --git a/arch/x86/kernel/cpu/mcheck/mce_intel.c b/arch/x86/kernel/cpu/mcheck/mce_intel.c index 5f88abf07e9c..4f9a3cbfc4a3 100644 --- a/arch/x86/kernel/cpu/mcheck/mce_intel.c +++ b/arch/x86/kernel/cpu/mcheck/mce_intel.c | |||
@@ -285,34 +285,39 @@ void cmci_clear(void) | |||
285 | raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); | 285 | raw_spin_unlock_irqrestore(&cmci_discover_lock, flags); |
286 | } | 286 | } |
287 | 287 | ||
288 | static long cmci_rediscover_work_func(void *arg) | ||
289 | { | ||
290 | int banks; | ||
291 | |||
292 | /* Recheck banks in case CPUs don't all have the same */ | ||
293 | if (cmci_supported(&banks)) | ||
294 | cmci_discover(banks); | ||
295 | |||
296 | return 0; | ||
297 | } | ||
298 | |||
288 | /* | 299 | /* |
289 | * After a CPU went down cycle through all the others and rediscover | 300 | * After a CPU went down cycle through all the others and rediscover |
290 | * Must run in process context. | 301 | * Must run in process context. |
291 | */ | 302 | */ |
292 | void cmci_rediscover(int dying) | 303 | void cmci_rediscover(int dying) |
293 | { | 304 | { |
294 | int banks; | 305 | int cpu, banks; |
295 | int cpu; | ||
296 | cpumask_var_t old; | ||
297 | 306 | ||
298 | if (!cmci_supported(&banks)) | 307 | if (!cmci_supported(&banks)) |
299 | return; | 308 | return; |
300 | if (!alloc_cpumask_var(&old, GFP_KERNEL)) | ||
301 | return; | ||
302 | cpumask_copy(old, ¤t->cpus_allowed); | ||
303 | 309 | ||
304 | for_each_online_cpu(cpu) { | 310 | for_each_online_cpu(cpu) { |
305 | if (cpu == dying) | 311 | if (cpu == dying) |
306 | continue; | 312 | continue; |
307 | if (set_cpus_allowed_ptr(current, cpumask_of(cpu))) | 313 | |
314 | if (cpu == smp_processor_id()) { | ||
315 | cmci_rediscover_work_func(NULL); | ||
308 | continue; | 316 | continue; |
309 | /* Recheck banks in case CPUs don't all have the same */ | 317 | } |
310 | if (cmci_supported(&banks)) | ||
311 | cmci_discover(banks); | ||
312 | } | ||
313 | 318 | ||
314 | set_cpus_allowed_ptr(current, old); | 319 | work_on_cpu(cpu, cmci_rediscover_work_func, NULL); |
315 | free_cpumask_var(old); | 320 | } |
316 | } | 321 | } |
317 | 322 | ||
318 | /* | 323 | /* |
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S index b51b2c7ee51f..1328fe49a3f1 100644 --- a/arch/x86/kernel/entry_64.S +++ b/arch/x86/kernel/entry_64.S | |||
@@ -995,8 +995,8 @@ END(interrupt) | |||
995 | */ | 995 | */ |
996 | .p2align CONFIG_X86_L1_CACHE_SHIFT | 996 | .p2align CONFIG_X86_L1_CACHE_SHIFT |
997 | common_interrupt: | 997 | common_interrupt: |
998 | ASM_CLAC | ||
999 | XCPT_FRAME | 998 | XCPT_FRAME |
999 | ASM_CLAC | ||
1000 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ | 1000 | addq $-0x80,(%rsp) /* Adjust vector to [-256,-1] range */ |
1001 | interrupt do_IRQ | 1001 | interrupt do_IRQ |
1002 | /* 0(%rsp): old_rsp-ARGOFFSET */ | 1002 | /* 0(%rsp): old_rsp-ARGOFFSET */ |
@@ -1135,8 +1135,8 @@ END(common_interrupt) | |||
1135 | */ | 1135 | */ |
1136 | .macro apicinterrupt num sym do_sym | 1136 | .macro apicinterrupt num sym do_sym |
1137 | ENTRY(\sym) | 1137 | ENTRY(\sym) |
1138 | ASM_CLAC | ||
1139 | INTR_FRAME | 1138 | INTR_FRAME |
1139 | ASM_CLAC | ||
1140 | pushq_cfi $~(\num) | 1140 | pushq_cfi $~(\num) |
1141 | .Lcommon_\sym: | 1141 | .Lcommon_\sym: |
1142 | interrupt \do_sym | 1142 | interrupt \do_sym |
@@ -1190,8 +1190,8 @@ apicinterrupt IRQ_WORK_VECTOR \ | |||
1190 | */ | 1190 | */ |
1191 | .macro zeroentry sym do_sym | 1191 | .macro zeroentry sym do_sym |
1192 | ENTRY(\sym) | 1192 | ENTRY(\sym) |
1193 | ASM_CLAC | ||
1194 | INTR_FRAME | 1193 | INTR_FRAME |
1194 | ASM_CLAC | ||
1195 | PARAVIRT_ADJUST_EXCEPTION_FRAME | 1195 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
1196 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | 1196 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
1197 | subq $ORIG_RAX-R15, %rsp | 1197 | subq $ORIG_RAX-R15, %rsp |
@@ -1208,8 +1208,8 @@ END(\sym) | |||
1208 | 1208 | ||
1209 | .macro paranoidzeroentry sym do_sym | 1209 | .macro paranoidzeroentry sym do_sym |
1210 | ENTRY(\sym) | 1210 | ENTRY(\sym) |
1211 | ASM_CLAC | ||
1212 | INTR_FRAME | 1211 | INTR_FRAME |
1212 | ASM_CLAC | ||
1213 | PARAVIRT_ADJUST_EXCEPTION_FRAME | 1213 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
1214 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | 1214 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
1215 | subq $ORIG_RAX-R15, %rsp | 1215 | subq $ORIG_RAX-R15, %rsp |
@@ -1227,8 +1227,8 @@ END(\sym) | |||
1227 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) | 1227 | #define INIT_TSS_IST(x) PER_CPU_VAR(init_tss) + (TSS_ist + ((x) - 1) * 8) |
1228 | .macro paranoidzeroentry_ist sym do_sym ist | 1228 | .macro paranoidzeroentry_ist sym do_sym ist |
1229 | ENTRY(\sym) | 1229 | ENTRY(\sym) |
1230 | ASM_CLAC | ||
1231 | INTR_FRAME | 1230 | INTR_FRAME |
1231 | ASM_CLAC | ||
1232 | PARAVIRT_ADJUST_EXCEPTION_FRAME | 1232 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
1233 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ | 1233 | pushq_cfi $-1 /* ORIG_RAX: no syscall to restart */ |
1234 | subq $ORIG_RAX-R15, %rsp | 1234 | subq $ORIG_RAX-R15, %rsp |
@@ -1247,8 +1247,8 @@ END(\sym) | |||
1247 | 1247 | ||
1248 | .macro errorentry sym do_sym | 1248 | .macro errorentry sym do_sym |
1249 | ENTRY(\sym) | 1249 | ENTRY(\sym) |
1250 | ASM_CLAC | ||
1251 | XCPT_FRAME | 1250 | XCPT_FRAME |
1251 | ASM_CLAC | ||
1252 | PARAVIRT_ADJUST_EXCEPTION_FRAME | 1252 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
1253 | subq $ORIG_RAX-R15, %rsp | 1253 | subq $ORIG_RAX-R15, %rsp |
1254 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | 1254 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 |
@@ -1266,8 +1266,8 @@ END(\sym) | |||
1266 | /* error code is on the stack already */ | 1266 | /* error code is on the stack already */ |
1267 | .macro paranoiderrorentry sym do_sym | 1267 | .macro paranoiderrorentry sym do_sym |
1268 | ENTRY(\sym) | 1268 | ENTRY(\sym) |
1269 | ASM_CLAC | ||
1270 | XCPT_FRAME | 1269 | XCPT_FRAME |
1270 | ASM_CLAC | ||
1271 | PARAVIRT_ADJUST_EXCEPTION_FRAME | 1271 | PARAVIRT_ADJUST_EXCEPTION_FRAME |
1272 | subq $ORIG_RAX-R15, %rsp | 1272 | subq $ORIG_RAX-R15, %rsp |
1273 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 | 1273 | CFI_ADJUST_CFA_OFFSET ORIG_RAX-R15 |
diff --git a/arch/x86/kernel/microcode_amd.c b/arch/x86/kernel/microcode_amd.c index 7720ff5a9ee2..efdec7cd8e01 100644 --- a/arch/x86/kernel/microcode_amd.c +++ b/arch/x86/kernel/microcode_amd.c | |||
@@ -8,8 +8,8 @@ | |||
8 | * Tigran Aivazian <tigran@aivazian.fsnet.co.uk> | 8 | * Tigran Aivazian <tigran@aivazian.fsnet.co.uk> |
9 | * | 9 | * |
10 | * Maintainers: | 10 | * Maintainers: |
11 | * Andreas Herrmann <andreas.herrmann3@amd.com> | 11 | * Andreas Herrmann <herrmann.der.user@googlemail.com> |
12 | * Borislav Petkov <borislav.petkov@amd.com> | 12 | * Borislav Petkov <bp@alien8.de> |
13 | * | 13 | * |
14 | * This driver allows to upgrade microcode on F10h AMD | 14 | * This driver allows to upgrade microcode on F10h AMD |
15 | * CPUs and later. | 15 | * CPUs and later. |
@@ -190,6 +190,7 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size, | |||
190 | #define F1XH_MPB_MAX_SIZE 2048 | 190 | #define F1XH_MPB_MAX_SIZE 2048 |
191 | #define F14H_MPB_MAX_SIZE 1824 | 191 | #define F14H_MPB_MAX_SIZE 1824 |
192 | #define F15H_MPB_MAX_SIZE 4096 | 192 | #define F15H_MPB_MAX_SIZE 4096 |
193 | #define F16H_MPB_MAX_SIZE 3458 | ||
193 | 194 | ||
194 | switch (c->x86) { | 195 | switch (c->x86) { |
195 | case 0x14: | 196 | case 0x14: |
@@ -198,6 +199,9 @@ static unsigned int verify_patch_size(int cpu, u32 patch_size, | |||
198 | case 0x15: | 199 | case 0x15: |
199 | max_size = F15H_MPB_MAX_SIZE; | 200 | max_size = F15H_MPB_MAX_SIZE; |
200 | break; | 201 | break; |
202 | case 0x16: | ||
203 | max_size = F16H_MPB_MAX_SIZE; | ||
204 | break; | ||
201 | default: | 205 | default: |
202 | max_size = F1XH_MPB_MAX_SIZE; | 206 | max_size = F1XH_MPB_MAX_SIZE; |
203 | break; | 207 | break; |
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index b00b33a18390..5e0596b0632e 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/perf_event.h> | 22 | #include <linux/perf_event.h> |
23 | #include <linux/hw_breakpoint.h> | 23 | #include <linux/hw_breakpoint.h> |
24 | #include <linux/rcupdate.h> | 24 | #include <linux/rcupdate.h> |
25 | #include <linux/module.h> | ||
25 | 26 | ||
26 | #include <asm/uaccess.h> | 27 | #include <asm/uaccess.h> |
27 | #include <asm/pgtable.h> | 28 | #include <asm/pgtable.h> |
@@ -166,6 +167,35 @@ static inline bool invalid_selector(u16 value) | |||
166 | 167 | ||
167 | #define FLAG_MASK FLAG_MASK_32 | 168 | #define FLAG_MASK FLAG_MASK_32 |
168 | 169 | ||
170 | /* | ||
171 | * X86_32 CPUs don't save ss and esp if the CPU is already in kernel mode | ||
172 | * when it traps. The previous stack will be directly underneath the saved | ||
173 | * registers, and 'sp/ss' won't even have been saved. Thus the '®s->sp'. | ||
174 | * | ||
175 | * Now, if the stack is empty, '®s->sp' is out of range. In this | ||
176 | * case we try to take the previous stack. To always return a non-null | ||
177 | * stack pointer we fall back to regs as stack if no previous stack | ||
178 | * exists. | ||
179 | * | ||
180 | * This is valid only for kernel mode traps. | ||
181 | */ | ||
182 | unsigned long kernel_stack_pointer(struct pt_regs *regs) | ||
183 | { | ||
184 | unsigned long context = (unsigned long)regs & ~(THREAD_SIZE - 1); | ||
185 | unsigned long sp = (unsigned long)®s->sp; | ||
186 | struct thread_info *tinfo; | ||
187 | |||
188 | if (context == (sp & ~(THREAD_SIZE - 1))) | ||
189 | return sp; | ||
190 | |||
191 | tinfo = (struct thread_info *)context; | ||
192 | if (tinfo->previous_esp) | ||
193 | return tinfo->previous_esp; | ||
194 | |||
195 | return (unsigned long)regs; | ||
196 | } | ||
197 | EXPORT_SYMBOL_GPL(kernel_stack_pointer); | ||
198 | |||
169 | static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) | 199 | static unsigned long *pt_regs_access(struct pt_regs *regs, unsigned long regno) |
170 | { | 200 | { |
171 | BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); | 201 | BUILD_BUG_ON(offsetof(struct pt_regs, bx) != 0); |
diff --git a/arch/x86/mm/tlb.c b/arch/x86/mm/tlb.c index 0777f042e400..60f926cd8b0e 100644 --- a/arch/x86/mm/tlb.c +++ b/arch/x86/mm/tlb.c | |||
@@ -197,7 +197,7 @@ void flush_tlb_mm_range(struct mm_struct *mm, unsigned long start, | |||
197 | } | 197 | } |
198 | 198 | ||
199 | if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 | 199 | if (end == TLB_FLUSH_ALL || tlb_flushall_shift == -1 |
200 | || vmflag == VM_HUGETLB) { | 200 | || vmflag & VM_HUGETLB) { |
201 | local_flush_tlb(); | 201 | local_flush_tlb(); |
202 | goto flush_all; | 202 | goto flush_all; |
203 | } | 203 | } |
diff --git a/arch/x86/pci/ce4100.c b/arch/x86/pci/ce4100.c index 41bd2a2d2c50..b914e20b5a00 100644 --- a/arch/x86/pci/ce4100.c +++ b/arch/x86/pci/ce4100.c | |||
@@ -115,6 +115,16 @@ static void sata_revid_read(struct sim_dev_reg *reg, u32 *value) | |||
115 | reg_read(reg, value); | 115 | reg_read(reg, value); |
116 | } | 116 | } |
117 | 117 | ||
118 | static void reg_noirq_read(struct sim_dev_reg *reg, u32 *value) | ||
119 | { | ||
120 | unsigned long flags; | ||
121 | |||
122 | raw_spin_lock_irqsave(&pci_config_lock, flags); | ||
123 | /* force interrupt pin value to 0 */ | ||
124 | *value = reg->sim_reg.value & 0xfff00ff; | ||
125 | raw_spin_unlock_irqrestore(&pci_config_lock, flags); | ||
126 | } | ||
127 | |||
118 | static struct sim_dev_reg bus1_fixups[] = { | 128 | static struct sim_dev_reg bus1_fixups[] = { |
119 | DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) | 129 | DEFINE_REG(2, 0, 0x10, (16*MB), reg_init, reg_read, reg_write) |
120 | DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) | 130 | DEFINE_REG(2, 0, 0x14, (256), reg_init, reg_read, reg_write) |
@@ -144,6 +154,7 @@ static struct sim_dev_reg bus1_fixups[] = { | |||
144 | DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write) | 154 | DEFINE_REG(11, 5, 0x10, (64*KB), reg_init, reg_read, reg_write) |
145 | DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write) | 155 | DEFINE_REG(11, 6, 0x10, (256), reg_init, reg_read, reg_write) |
146 | DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write) | 156 | DEFINE_REG(11, 7, 0x10, (64*KB), reg_init, reg_read, reg_write) |
157 | DEFINE_REG(11, 7, 0x3c, 256, reg_init, reg_noirq_read, reg_write) | ||
147 | DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) | 158 | DEFINE_REG(12, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) |
148 | DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write) | 159 | DEFINE_REG(12, 0, 0x14, (256), reg_init, reg_read, reg_write) |
149 | DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write) | 160 | DEFINE_REG(12, 1, 0x10, (1024), reg_init, reg_read, reg_write) |
@@ -161,8 +172,10 @@ static struct sim_dev_reg bus1_fixups[] = { | |||
161 | DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) | 172 | DEFINE_REG(16, 0, 0x10, (64*KB), reg_init, reg_read, reg_write) |
162 | DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write) | 173 | DEFINE_REG(16, 0, 0x14, (64*MB), reg_init, reg_read, reg_write) |
163 | DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write) | 174 | DEFINE_REG(16, 0, 0x18, (64*MB), reg_init, reg_read, reg_write) |
175 | DEFINE_REG(16, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write) | ||
164 | DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) | 176 | DEFINE_REG(17, 0, 0x10, (128*KB), reg_init, reg_read, reg_write) |
165 | DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write) | 177 | DEFINE_REG(18, 0, 0x10, (1*KB), reg_init, reg_read, reg_write) |
178 | DEFINE_REG(18, 0, 0x3c, 256, reg_init, reg_noirq_read, reg_write) | ||
166 | }; | 179 | }; |
167 | 180 | ||
168 | static void __init init_sim_regs(void) | 181 | static void __init init_sim_regs(void) |
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c index 4c61b52191eb..92525cb8e54c 100644 --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c | |||
@@ -21,12 +21,25 @@ | |||
21 | #include <asm/i8259.h> | 21 | #include <asm/i8259.h> |
22 | #include <asm/io.h> | 22 | #include <asm/io.h> |
23 | #include <asm/io_apic.h> | 23 | #include <asm/io_apic.h> |
24 | #include <asm/emergency-restart.h> | ||
24 | 25 | ||
25 | static int ce4100_i8042_detect(void) | 26 | static int ce4100_i8042_detect(void) |
26 | { | 27 | { |
27 | return 0; | 28 | return 0; |
28 | } | 29 | } |
29 | 30 | ||
31 | /* | ||
32 | * The CE4100 platform has an internal 8051 Microcontroller which is | ||
33 | * responsible for signaling to the external Power Management Unit the | ||
34 | * intention to reset, reboot or power off the system. This 8051 device has | ||
35 | * its command register mapped at I/O port 0xcf9 and the value 0x4 is used | ||
36 | * to power off the system. | ||
37 | */ | ||
38 | static void ce4100_power_off(void) | ||
39 | { | ||
40 | outb(0x4, 0xcf9); | ||
41 | } | ||
42 | |||
30 | #ifdef CONFIG_SERIAL_8250 | 43 | #ifdef CONFIG_SERIAL_8250 |
31 | 44 | ||
32 | static unsigned int mem_serial_in(struct uart_port *p, int offset) | 45 | static unsigned int mem_serial_in(struct uart_port *p, int offset) |
@@ -139,8 +152,19 @@ void __init x86_ce4100_early_setup(void) | |||
139 | x86_init.mpparse.find_smp_config = x86_init_noop; | 152 | x86_init.mpparse.find_smp_config = x86_init_noop; |
140 | x86_init.pci.init = ce4100_pci_init; | 153 | x86_init.pci.init = ce4100_pci_init; |
141 | 154 | ||
155 | /* | ||
156 | * By default, the reboot method is ACPI which is supported by the | ||
157 | * CE4100 bootloader CEFDK using FADT.ResetReg Address and ResetValue | ||
158 | * the bootloader will however issue a system power off instead of | ||
159 | * reboot. By using BOOT_KBD we ensure proper system reboot as | ||
160 | * expected. | ||
161 | */ | ||
162 | reboot_type = BOOT_KBD; | ||
163 | |||
142 | #ifdef CONFIG_X86_IO_APIC | 164 | #ifdef CONFIG_X86_IO_APIC |
143 | x86_init.pci.init_irq = sdv_pci_init; | 165 | x86_init.pci.init_irq = sdv_pci_init; |
144 | x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; | 166 | x86_init.mpparse.setup_ioapic_ids = setup_ioapic_ids_from_mpc_nocheck; |
145 | #endif | 167 | #endif |
168 | |||
169 | pm_power_off = ce4100_power_off; | ||
146 | } | 170 | } |
diff --git a/drivers/edac/amd64_edac.h b/drivers/edac/amd64_edac.h index 8d4804732bac..8c4139647efc 100644 --- a/drivers/edac/amd64_edac.h +++ b/drivers/edac/amd64_edac.h | |||
@@ -33,7 +33,7 @@ | |||
33 | * detection. The mods to Rev F required more family | 33 | * detection. The mods to Rev F required more family |
34 | * information detection. | 34 | * information detection. |
35 | * | 35 | * |
36 | * Changes/Fixes by Borislav Petkov <borislav.petkov@amd.com>: | 36 | * Changes/Fixes by Borislav Petkov <bp@alien8.de>: |
37 | * - misc fixes and code cleanups | 37 | * - misc fixes and code cleanups |
38 | * | 38 | * |
39 | * This module is based on the following documents | 39 | * This module is based on the following documents |
diff --git a/drivers/edac/edac_stub.c b/drivers/edac/edac_stub.c index 6c86f6e54558..351945fa2ecd 100644 --- a/drivers/edac/edac_stub.c +++ b/drivers/edac/edac_stub.c | |||
@@ -5,7 +5,7 @@ | |||
5 | * | 5 | * |
6 | * 2007 (c) MontaVista Software, Inc. | 6 | * 2007 (c) MontaVista Software, Inc. |
7 | * 2010 (c) Advanced Micro Devices Inc. | 7 | * 2010 (c) Advanced Micro Devices Inc. |
8 | * Borislav Petkov <borislav.petkov@amd.com> | 8 | * Borislav Petkov <bp@alien8.de> |
9 | * | 9 | * |
10 | * This file is licensed under the terms of the GNU General Public | 10 | * This file is licensed under the terms of the GNU General Public |
11 | * License version 2. This program is licensed "as is" without any | 11 | * License version 2. This program is licensed "as is" without any |
diff --git a/drivers/edac/mce_amd_inj.c b/drivers/edac/mce_amd_inj.c index 66b5151c1080..2ae78f20cc28 100644 --- a/drivers/edac/mce_amd_inj.c +++ b/drivers/edac/mce_amd_inj.c | |||
@@ -6,7 +6,7 @@ | |||
6 | * This file may be distributed under the terms of the GNU General Public | 6 | * This file may be distributed under the terms of the GNU General Public |
7 | * License version 2. | 7 | * License version 2. |
8 | * | 8 | * |
9 | * Copyright (c) 2010: Borislav Petkov <borislav.petkov@amd.com> | 9 | * Copyright (c) 2010: Borislav Petkov <bp@alien8.de> |
10 | * Advanced Micro Devices Inc. | 10 | * Advanced Micro Devices Inc. |
11 | */ | 11 | */ |
12 | 12 | ||
@@ -168,6 +168,6 @@ module_init(edac_init_mce_inject); | |||
168 | module_exit(edac_exit_mce_inject); | 168 | module_exit(edac_exit_mce_inject); |
169 | 169 | ||
170 | MODULE_LICENSE("GPL"); | 170 | MODULE_LICENSE("GPL"); |
171 | MODULE_AUTHOR("Borislav Petkov <borislav.petkov@amd.com>"); | 171 | MODULE_AUTHOR("Borislav Petkov <bp@alien8.de>"); |
172 | MODULE_AUTHOR("AMD Inc."); | 172 | MODULE_AUTHOR("AMD Inc."); |
173 | MODULE_DESCRIPTION("MCE injection facility for testing MCE decoding"); | 173 | MODULE_DESCRIPTION("MCE injection facility for testing MCE decoding"); |