diff options
125 files changed, 1732 insertions, 732 deletions
diff --git a/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt b/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt new file mode 100644 index 000000000000..36f82dbdd14d --- /dev/null +++ b/Documentation/devicetree/bindings/pinmux/pinmux_nvidia.txt | |||
@@ -0,0 +1,5 @@ | |||
1 | NVIDIA Tegra 2 pinmux controller | ||
2 | |||
3 | Required properties: | ||
4 | - compatible : "nvidia,tegra20-pinmux" | ||
5 | |||
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 611c98dab681..bcc067006342 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig | |||
@@ -417,6 +417,7 @@ config ARCH_MXC | |||
417 | select CLKSRC_MMIO | 417 | select CLKSRC_MMIO |
418 | select GENERIC_IRQ_CHIP | 418 | select GENERIC_IRQ_CHIP |
419 | select HAVE_SCHED_CLOCK | 419 | select HAVE_SCHED_CLOCK |
420 | select MULTI_IRQ_HANDLER | ||
420 | help | 421 | help |
421 | Support for Freescale MXC/iMX-based family of processors | 422 | Support for Freescale MXC/iMX-based family of processors |
422 | 423 | ||
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index a5aac169af2a..30b920148202 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -157,9 +157,7 @@ machine-$(CONFIG_ARCH_LPC32XX) := lpc32xx | |||
157 | machine-$(CONFIG_ARCH_MMP) := mmp | 157 | machine-$(CONFIG_ARCH_MMP) := mmp |
158 | machine-$(CONFIG_ARCH_MSM) := msm | 158 | machine-$(CONFIG_ARCH_MSM) := msm |
159 | machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 | 159 | machine-$(CONFIG_ARCH_MV78XX0) := mv78xx0 |
160 | machine-$(CONFIG_ARCH_MX1) := imx | 160 | machine-$(CONFIG_ARCH_IMX_V4_V5) := imx |
161 | machine-$(CONFIG_ARCH_MX2) := imx | ||
162 | machine-$(CONFIG_ARCH_MX25) := imx | ||
163 | machine-$(CONFIG_ARCH_MX3) := imx | 161 | machine-$(CONFIG_ARCH_MX3) := imx |
164 | machine-$(CONFIG_ARCH_MX5) := mx5 | 162 | machine-$(CONFIG_ARCH_MX5) := mx5 |
165 | machine-$(CONFIG_ARCH_MXS) := mxs | 163 | machine-$(CONFIG_ARCH_MXS) := mxs |
diff --git a/arch/arm/boot/dts/tegra-ventana.dts b/arch/arm/boot/dts/tegra-ventana.dts new file mode 100644 index 000000000000..9b29a623aaf1 --- /dev/null +++ b/arch/arm/boot/dts/tegra-ventana.dts | |||
@@ -0,0 +1,32 @@ | |||
1 | /dts-v1/; | ||
2 | |||
3 | /memreserve/ 0x1c000000 0x04000000; | ||
4 | /include/ "tegra20.dtsi" | ||
5 | |||
6 | / { | ||
7 | model = "NVIDIA Tegra2 Ventana evaluation board"; | ||
8 | compatible = "nvidia,ventana", "nvidia,tegra20"; | ||
9 | |||
10 | chosen { | ||
11 | bootargs = "vmalloc=192M video=tegrafb console=ttyS0,115200n8 root=/dev/ram rdinit=/sbin/init"; | ||
12 | }; | ||
13 | |||
14 | memory { | ||
15 | reg = < 0x00000000 0x40000000 >; | ||
16 | }; | ||
17 | |||
18 | serial@70006300 { | ||
19 | clock-frequency = < 216000000 >; | ||
20 | }; | ||
21 | |||
22 | sdhci@c8000400 { | ||
23 | cd-gpios = <&gpio 69 0>; /* gpio PI5 */ | ||
24 | wp-gpios = <&gpio 57 0>; /* gpio PH1 */ | ||
25 | power-gpios = <&gpio 155 0>; /* gpio PT3 */ | ||
26 | }; | ||
27 | |||
28 | sdhci@c8000600 { | ||
29 | power-gpios = <&gpio 70 0>; /* gpio PI6 */ | ||
30 | support-8bit; | ||
31 | }; | ||
32 | }; | ||
diff --git a/arch/arm/boot/dts/tegra20.dtsi b/arch/arm/boot/dts/tegra20.dtsi index 5727595cde61..65d7e6a333eb 100644 --- a/arch/arm/boot/dts/tegra20.dtsi +++ b/arch/arm/boot/dts/tegra20.dtsi | |||
@@ -77,6 +77,14 @@ | |||
77 | gpio-controller; | 77 | gpio-controller; |
78 | }; | 78 | }; |
79 | 79 | ||
80 | pinmux: pinmux@70000000 { | ||
81 | compatible = "nvidia,tegra20-pinmux"; | ||
82 | reg = < 0x70000014 0x10 /* Tri-state registers */ | ||
83 | 0x70000080 0x20 /* Mux registers */ | ||
84 | 0x700000a0 0x14 /* Pull-up/down registers */ | ||
85 | 0x70000868 0xa8 >; /* Pad control registers */ | ||
86 | }; | ||
87 | |||
80 | serial@70006000 { | 88 | serial@70006000 { |
81 | compatible = "nvidia,tegra20-uart"; | 89 | compatible = "nvidia,tegra20-uart"; |
82 | reg = <0x70006000 0x40>; | 90 | reg = <0x70006000 0x40>; |
diff --git a/arch/arm/configs/mx27_defconfig b/arch/arm/configs/imx_v4_v5_defconfig index 9ad4c656c9bd..11a4192197c8 100644 --- a/arch/arm/configs/mx27_defconfig +++ b/arch/arm/configs/imx_v4_v5_defconfig | |||
@@ -3,9 +3,7 @@ CONFIG_EXPERIMENTAL=y | |||
3 | CONFIG_SYSVIPC=y | 3 | CONFIG_SYSVIPC=y |
4 | CONFIG_POSIX_MQUEUE=y | 4 | CONFIG_POSIX_MQUEUE=y |
5 | CONFIG_LOG_BUF_SHIFT=14 | 5 | CONFIG_LOG_BUF_SHIFT=14 |
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | 6 | CONFIG_EXPERT=y |
8 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
9 | # CONFIG_COMPAT_BRK is not set | 7 | # CONFIG_COMPAT_BRK is not set |
10 | CONFIG_SLAB=y | 8 | CONFIG_SLAB=y |
11 | CONFIG_PROFILING=y | 9 | CONFIG_PROFILING=y |
@@ -17,8 +15,12 @@ CONFIG_MODULE_UNLOAD=y | |||
17 | # CONFIG_IOSCHED_DEADLINE is not set | 15 | # CONFIG_IOSCHED_DEADLINE is not set |
18 | # CONFIG_IOSCHED_CFQ is not set | 16 | # CONFIG_IOSCHED_CFQ is not set |
19 | CONFIG_ARCH_MXC=y | 17 | CONFIG_ARCH_MXC=y |
20 | CONFIG_ARCH_MX2=y | 18 | CONFIG_ARCH_IMX_V4_V5=y |
21 | CONFIG_MACH_MX27=y | 19 | CONFIG_ARCH_MX1ADS=y |
20 | CONFIG_MACH_SCB9328=y | ||
21 | CONFIG_MACH_MX21ADS=y | ||
22 | CONFIG_MACH_MX25_3DS=y | ||
23 | CONFIG_MACH_EUKREA_CPUIMX25=y | ||
22 | CONFIG_MACH_MX27ADS=y | 24 | CONFIG_MACH_MX27ADS=y |
23 | CONFIG_MACH_PCM038=y | 25 | CONFIG_MACH_PCM038=y |
24 | CONFIG_MACH_CPUIMX27=y | 26 | CONFIG_MACH_CPUIMX27=y |
@@ -29,6 +31,7 @@ CONFIG_MACH_IMX27_VISSTRIM_M10=y | |||
29 | CONFIG_MACH_IMX27LITE=y | 31 | CONFIG_MACH_IMX27LITE=y |
30 | CONFIG_MACH_PCA100=y | 32 | CONFIG_MACH_PCA100=y |
31 | CONFIG_MACH_MXT_TD60=y | 33 | CONFIG_MACH_MXT_TD60=y |
34 | CONFIG_MACH_IMX27IPCAM=y | ||
32 | CONFIG_MXC_IRQ_PRIOR=y | 35 | CONFIG_MXC_IRQ_PRIOR=y |
33 | CONFIG_MXC_PWM=y | 36 | CONFIG_MXC_PWM=y |
34 | CONFIG_NO_HZ=y | 37 | CONFIG_NO_HZ=y |
@@ -39,7 +42,6 @@ CONFIG_ZBOOT_ROM_TEXT=0x0 | |||
39 | CONFIG_ZBOOT_ROM_BSS=0x0 | 42 | CONFIG_ZBOOT_ROM_BSS=0x0 |
40 | CONFIG_FPE_NWFPE=y | 43 | CONFIG_FPE_NWFPE=y |
41 | CONFIG_FPE_NWFPE_XP=y | 44 | CONFIG_FPE_NWFPE_XP=y |
42 | CONFIG_PM=y | ||
43 | CONFIG_PM_DEBUG=y | 45 | CONFIG_PM_DEBUG=y |
44 | CONFIG_NET=y | 46 | CONFIG_NET=y |
45 | CONFIG_PACKET=y | 47 | CONFIG_PACKET=y |
@@ -55,8 +57,9 @@ CONFIG_IP_PNP_DHCP=y | |||
55 | # CONFIG_INET_DIAG is not set | 57 | # CONFIG_INET_DIAG is not set |
56 | # CONFIG_IPV6 is not set | 58 | # CONFIG_IPV6 is not set |
57 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 59 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
60 | CONFIG_DEVTMPFS=y | ||
61 | CONFIG_DEVTMPFS_MOUNT=y | ||
58 | CONFIG_MTD=y | 62 | CONFIG_MTD=y |
59 | CONFIG_MTD_PARTITIONS=y | ||
60 | CONFIG_MTD_CMDLINE_PARTS=y | 63 | CONFIG_MTD_CMDLINE_PARTS=y |
61 | CONFIG_MTD_CHAR=y | 64 | CONFIG_MTD_CHAR=y |
62 | CONFIG_MTD_BLOCK=y | 65 | CONFIG_MTD_BLOCK=y |
@@ -69,12 +72,15 @@ CONFIG_MTD_CFI_GEOMETRY=y | |||
69 | CONFIG_MTD_CFI_INTELEXT=y | 72 | CONFIG_MTD_CFI_INTELEXT=y |
70 | CONFIG_MTD_PHYSMAP=y | 73 | CONFIG_MTD_PHYSMAP=y |
71 | CONFIG_MTD_NAND=y | 74 | CONFIG_MTD_NAND=y |
72 | CONFIG_MTD_NAND_MXC=y | ||
73 | CONFIG_MTD_UBI=y | 75 | CONFIG_MTD_UBI=y |
76 | CONFIG_MISC_DEVICES=y | ||
74 | CONFIG_EEPROM_AT24=y | 77 | CONFIG_EEPROM_AT24=y |
78 | CONFIG_EEPROM_AT25=y | ||
75 | CONFIG_NETDEVICES=y | 79 | CONFIG_NETDEVICES=y |
76 | CONFIG_NET_ETHERNET=y | 80 | CONFIG_NET_ETHERNET=y |
77 | CONFIG_FEC=y | 81 | CONFIG_SMC91X=y |
82 | CONFIG_DM9000=y | ||
83 | CONFIG_SMC911X=y | ||
78 | # CONFIG_NETDEV_1000 is not set | 84 | # CONFIG_NETDEV_1000 is not set |
79 | # CONFIG_NETDEV_10000 is not set | 85 | # CONFIG_NETDEV_10000 is not set |
80 | # CONFIG_INPUT_MOUSEDEV is not set | 86 | # CONFIG_INPUT_MOUSEDEV is not set |
@@ -84,10 +90,10 @@ CONFIG_INPUT_EVDEV=y | |||
84 | CONFIG_INPUT_TOUCHSCREEN=y | 90 | CONFIG_INPUT_TOUCHSCREEN=y |
85 | CONFIG_TOUCHSCREEN_ADS7846=m | 91 | CONFIG_TOUCHSCREEN_ADS7846=m |
86 | # CONFIG_SERIO is not set | 92 | # CONFIG_SERIO is not set |
93 | # CONFIG_LEGACY_PTYS is not set | ||
87 | CONFIG_SERIAL_8250=m | 94 | CONFIG_SERIAL_8250=m |
88 | CONFIG_SERIAL_IMX=y | 95 | CONFIG_SERIAL_IMX=y |
89 | CONFIG_SERIAL_IMX_CONSOLE=y | 96 | CONFIG_SERIAL_IMX_CONSOLE=y |
90 | # CONFIG_LEGACY_PTYS is not set | ||
91 | # CONFIG_HW_RANDOM is not set | 97 | # CONFIG_HW_RANDOM is not set |
92 | CONFIG_I2C=y | 98 | CONFIG_I2C=y |
93 | CONFIG_I2C_CHARDEV=y | 99 | CONFIG_I2C_CHARDEV=y |
@@ -98,19 +104,56 @@ CONFIG_W1=y | |||
98 | CONFIG_W1_MASTER_MXC=y | 104 | CONFIG_W1_MASTER_MXC=y |
99 | CONFIG_W1_SLAVE_THERM=y | 105 | CONFIG_W1_SLAVE_THERM=y |
100 | # CONFIG_HWMON is not set | 106 | # CONFIG_HWMON is not set |
107 | CONFIG_WATCHDOG=y | ||
108 | CONFIG_IMX2_WDT=y | ||
109 | CONFIG_MFD_MC13XXX=y | ||
110 | CONFIG_REGULATOR=y | ||
111 | CONFIG_REGULATOR_MC13783=y | ||
112 | CONFIG_REGULATOR_MC13892=y | ||
101 | CONFIG_FB=y | 113 | CONFIG_FB=y |
102 | CONFIG_FB_IMX=y | 114 | CONFIG_FB_IMX=y |
115 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
116 | CONFIG_LCD_CLASS_DEVICE=y | ||
117 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
118 | CONFIG_BACKLIGHT_PWM=y | ||
103 | CONFIG_FRAMEBUFFER_CONSOLE=y | 119 | CONFIG_FRAMEBUFFER_CONSOLE=y |
104 | CONFIG_FONTS=y | 120 | CONFIG_FONTS=y |
105 | CONFIG_FONT_8x8=y | 121 | CONFIG_FONT_8x8=y |
106 | # CONFIG_HID_SUPPORT is not set | 122 | CONFIG_LOGO=y |
107 | CONFIG_USB=m | 123 | CONFIG_SOUND=y |
124 | CONFIG_SND=y | ||
125 | # CONFIG_SND_ARM is not set | ||
126 | # CONFIG_SND_SPI is not set | ||
127 | CONFIG_SND_SOC=y | ||
128 | CONFIG_SND_IMX_SOC=y | ||
129 | CONFIG_SND_SOC_MX27VIS_AIC32X4=y | ||
130 | CONFIG_SND_SOC_PHYCORE_AC97=y | ||
131 | CONFIG_SND_SOC_EUKREA_TLV320=y | ||
132 | CONFIG_USB_HID=m | ||
133 | CONFIG_USB=y | ||
108 | # CONFIG_USB_DEVICE_CLASS is not set | 134 | # CONFIG_USB_DEVICE_CLASS is not set |
135 | CONFIG_USB_EHCI_HCD=y | ||
136 | CONFIG_USB_EHCI_MXC=y | ||
109 | CONFIG_USB_ULPI=y | 137 | CONFIG_USB_ULPI=y |
110 | CONFIG_MMC=y | 138 | CONFIG_MMC=y |
111 | CONFIG_MMC_MXC=y | 139 | CONFIG_MMC_MXC=y |
140 | CONFIG_NEW_LEDS=y | ||
141 | CONFIG_LEDS_CLASS=y | ||
142 | CONFIG_LEDS_MC13783=y | ||
143 | CONFIG_LEDS_TRIGGERS=y | ||
144 | CONFIG_LEDS_TRIGGER_TIMER=y | ||
145 | CONFIG_LEDS_TRIGGER_HEARTBEAT=y | ||
146 | CONFIG_LEDS_TRIGGER_BACKLIGHT=y | ||
147 | CONFIG_LEDS_TRIGGER_GPIO=y | ||
148 | CONFIG_LEDS_TRIGGER_DEFAULT_ON=y | ||
112 | CONFIG_RTC_CLASS=y | 149 | CONFIG_RTC_CLASS=y |
113 | CONFIG_RTC_DRV_PCF8563=y | 150 | CONFIG_RTC_DRV_PCF8563=y |
151 | CONFIG_RTC_DRV_IMXDI=y | ||
152 | CONFIG_RTC_MXC=y | ||
153 | CONFIG_DMADEVICES=y | ||
154 | CONFIG_IMX_SDMA=y | ||
155 | CONFIG_IMX_DMA=y | ||
156 | # CONFIG_IOMMU_SUPPORT is not set | ||
114 | # CONFIG_DNOTIFY is not set | 157 | # CONFIG_DNOTIFY is not set |
115 | # CONFIG_PROC_PAGE_MONITOR is not set | 158 | # CONFIG_PROC_PAGE_MONITOR is not set |
116 | CONFIG_TMPFS=y | 159 | CONFIG_TMPFS=y |
@@ -119,12 +162,9 @@ CONFIG_UBIFS_FS=y | |||
119 | CONFIG_NFS_FS=y | 162 | CONFIG_NFS_FS=y |
120 | CONFIG_NFS_V3=y | 163 | CONFIG_NFS_V3=y |
121 | CONFIG_ROOT_NFS=y | 164 | CONFIG_ROOT_NFS=y |
122 | CONFIG_NLS=y | ||
123 | CONFIG_NLS_CODEPAGE_437=m | 165 | CONFIG_NLS_CODEPAGE_437=m |
124 | CONFIG_NLS_CODEPAGE_850=m | 166 | CONFIG_NLS_CODEPAGE_850=m |
125 | CONFIG_NLS_ISO8859_1=y | 167 | CONFIG_NLS_ISO8859_1=y |
126 | CONFIG_NLS_ISO8859_15=m | 168 | CONFIG_NLS_ISO8859_15=m |
127 | CONFIG_DEBUG_FS=y | ||
128 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
129 | CONFIG_SYSCTL_SYSCALL_CHECK=y | 169 | CONFIG_SYSCTL_SYSCALL_CHECK=y |
130 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 170 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
diff --git a/arch/arm/configs/mx1_defconfig b/arch/arm/configs/mx1_defconfig deleted file mode 100644 index c9436d0bf593..000000000000 --- a/arch/arm/configs/mx1_defconfig +++ /dev/null | |||
@@ -1,91 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | CONFIG_SYSVIPC=y | ||
3 | CONFIG_IKCONFIG=y | ||
4 | CONFIG_IKCONFIG_PROC=y | ||
5 | CONFIG_LOG_BUF_SHIFT=14 | ||
6 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
7 | CONFIG_EXPERT=y | ||
8 | CONFIG_SLAB=y | ||
9 | CONFIG_MODULES=y | ||
10 | CONFIG_MODULE_UNLOAD=y | ||
11 | CONFIG_MODULE_FORCE_UNLOAD=y | ||
12 | CONFIG_MODVERSIONS=y | ||
13 | # CONFIG_BLK_DEV_BSG is not set | ||
14 | CONFIG_ARCH_MXC=y | ||
15 | CONFIG_ARCH_MX1=y | ||
16 | CONFIG_ARCH_MX1ADS=y | ||
17 | CONFIG_MACH_SCB9328=y | ||
18 | CONFIG_MACH_APF9328=y | ||
19 | CONFIG_MXC_IRQ_PRIOR=y | ||
20 | CONFIG_NO_HZ=y | ||
21 | CONFIG_HIGH_RES_TIMERS=y | ||
22 | CONFIG_PREEMPT=y | ||
23 | CONFIG_AEABI=y | ||
24 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
25 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
26 | CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/mtdblock2 rw ip=off" | ||
27 | CONFIG_PM=y | ||
28 | CONFIG_PM_DEBUG=y | ||
29 | CONFIG_NET=y | ||
30 | CONFIG_PACKET=y | ||
31 | CONFIG_UNIX=y | ||
32 | CONFIG_INET=y | ||
33 | CONFIG_IP_PNP=y | ||
34 | CONFIG_IP_PNP_DHCP=y | ||
35 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
36 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
37 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
38 | # CONFIG_INET_LRO is not set | ||
39 | # CONFIG_INET_DIAG is not set | ||
40 | # CONFIG_IPV6 is not set | ||
41 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
42 | CONFIG_FW_LOADER=m | ||
43 | CONFIG_MTD=y | ||
44 | CONFIG_MTD_PARTITIONS=y | ||
45 | CONFIG_MTD_CMDLINE_PARTS=y | ||
46 | CONFIG_MTD_CHAR=y | ||
47 | CONFIG_MTD_BLOCK=y | ||
48 | CONFIG_MTD_CFI=y | ||
49 | CONFIG_MTD_PHYSMAP=y | ||
50 | # CONFIG_BLK_DEV is not set | ||
51 | # CONFIG_MISC_DEVICES is not set | ||
52 | CONFIG_NETDEVICES=y | ||
53 | CONFIG_PHYLIB=y | ||
54 | CONFIG_SMSC_PHY=y | ||
55 | CONFIG_NET_ETHERNET=y | ||
56 | CONFIG_DM9000=y | ||
57 | # CONFIG_NETDEV_1000 is not set | ||
58 | # CONFIG_NETDEV_10000 is not set | ||
59 | # CONFIG_INPUT is not set | ||
60 | # CONFIG_SERIO is not set | ||
61 | # CONFIG_VT is not set | ||
62 | CONFIG_SERIAL_IMX=y | ||
63 | CONFIG_SERIAL_IMX_CONSOLE=y | ||
64 | # CONFIG_LEGACY_PTYS is not set | ||
65 | # CONFIG_HW_RANDOM is not set | ||
66 | CONFIG_I2C=y | ||
67 | CONFIG_I2C_CHARDEV=y | ||
68 | CONFIG_I2C_IMX=y | ||
69 | CONFIG_W1=y | ||
70 | CONFIG_W1_MASTER_MXC=y | ||
71 | CONFIG_W1_SLAVE_THERM=y | ||
72 | # CONFIG_HWMON is not set | ||
73 | CONFIG_FB=y | ||
74 | CONFIG_USB_GADGET=y | ||
75 | CONFIG_USB_GADGET_IMX=y | ||
76 | CONFIG_USB_ETH=m | ||
77 | CONFIG_MMC=y | ||
78 | CONFIG_MMC_MXC=y | ||
79 | # CONFIG_DNOTIFY is not set | ||
80 | CONFIG_INOTIFY=y | ||
81 | CONFIG_TMPFS=y | ||
82 | CONFIG_JFFS2_FS=y | ||
83 | CONFIG_NFS_FS=y | ||
84 | CONFIG_NFS_V3=y | ||
85 | CONFIG_NFS_V4=y | ||
86 | CONFIG_ROOT_NFS=y | ||
87 | # CONFIG_ENABLE_WARN_DEPRECATED is not set | ||
88 | # CONFIG_ENABLE_MUST_CHECK is not set | ||
89 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
90 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
91 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
diff --git a/arch/arm/configs/mx21_defconfig b/arch/arm/configs/mx21_defconfig deleted file mode 100644 index 411f88dd4402..000000000000 --- a/arch/arm/configs/mx21_defconfig +++ /dev/null | |||
@@ -1,97 +0,0 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | ||
2 | # CONFIG_SWAP is not set | ||
3 | CONFIG_SYSVIPC=y | ||
4 | CONFIG_LOG_BUF_SHIFT=14 | ||
5 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
6 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
7 | CONFIG_EXPERT=y | ||
8 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
9 | CONFIG_SLAB=y | ||
10 | CONFIG_MODULES=y | ||
11 | CONFIG_MODULE_UNLOAD=y | ||
12 | # CONFIG_BLK_DEV_BSG is not set | ||
13 | # CONFIG_IOSCHED_DEADLINE is not set | ||
14 | # CONFIG_IOSCHED_CFQ is not set | ||
15 | CONFIG_ARCH_MXC=y | ||
16 | CONFIG_ARCH_MX2=y | ||
17 | CONFIG_MACH_MX21ADS=y | ||
18 | CONFIG_MXC_PWM=y | ||
19 | CONFIG_NO_HZ=y | ||
20 | CONFIG_HIGH_RES_TIMERS=y | ||
21 | CONFIG_PREEMPT=y | ||
22 | CONFIG_AEABI=y | ||
23 | CONFIG_ZBOOT_ROM_TEXT=0x0 | ||
24 | CONFIG_ZBOOT_ROM_BSS=0x0 | ||
25 | CONFIG_NET=y | ||
26 | CONFIG_INET=y | ||
27 | CONFIG_IP_PNP=y | ||
28 | CONFIG_IP_PNP_DHCP=y | ||
29 | CONFIG_IP_PNP_BOOTP=y | ||
30 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
31 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
32 | # CONFIG_INET_LRO is not set | ||
33 | # CONFIG_INET_DIAG is not set | ||
34 | # CONFIG_IPV6 is not set | ||
35 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
36 | # CONFIG_FW_LOADER is not set | ||
37 | CONFIG_MTD=y | ||
38 | CONFIG_MTD_DEBUG=y | ||
39 | CONFIG_MTD_DEBUG_VERBOSE=3 | ||
40 | CONFIG_MTD_PARTITIONS=y | ||
41 | CONFIG_MTD_REDBOOT_PARTS=y | ||
42 | CONFIG_MTD_CMDLINE_PARTS=y | ||
43 | CONFIG_MTD_CHAR=y | ||
44 | CONFIG_MTD_BLOCK=y | ||
45 | CONFIG_MTD_CFI=y | ||
46 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
47 | CONFIG_MTD_CFI_GEOMETRY=y | ||
48 | # CONFIG_MTD_MAP_BANK_WIDTH_1 is not set | ||
49 | CONFIG_MTD_CFI_AMDSTD=y | ||
50 | CONFIG_MTD_PHYSMAP=y | ||
51 | CONFIG_MTD_NAND=y | ||
52 | CONFIG_MTD_NAND_MXC=y | ||
53 | CONFIG_NETDEVICES=y | ||
54 | CONFIG_NET_ETHERNET=y | ||
55 | CONFIG_MII=y | ||
56 | # CONFIG_NETDEV_1000 is not set | ||
57 | # CONFIG_NETDEV_10000 is not set | ||
58 | # CONFIG_INPUT_MOUSEDEV is not set | ||
59 | CONFIG_INPUT_EVDEV=y | ||
60 | # CONFIG_INPUT_KEYBOARD is not set | ||
61 | # CONFIG_INPUT_MOUSE is not set | ||
62 | CONFIG_INPUT_TOUCHSCREEN=y | ||
63 | # CONFIG_SERIO is not set | ||
64 | # CONFIG_CONSOLE_TRANSLATIONS is not set | ||
65 | CONFIG_SERIAL_8250=y | ||
66 | CONFIG_SERIAL_8250_CONSOLE=y | ||
67 | CONFIG_SERIAL_8250_NR_UARTS=1 | ||
68 | CONFIG_SERIAL_IMX=y | ||
69 | CONFIG_SERIAL_IMX_CONSOLE=y | ||
70 | # CONFIG_LEGACY_PTYS is not set | ||
71 | # CONFIG_HW_RANDOM is not set | ||
72 | CONFIG_I2C=y | ||
73 | CONFIG_I2C_CHARDEV=y | ||
74 | CONFIG_I2C_IMX=y | ||
75 | CONFIG_SPI=y | ||
76 | # CONFIG_HWMON is not set | ||
77 | CONFIG_FB=y | ||
78 | CONFIG_FB_IMX=y | ||
79 | # CONFIG_VGA_CONSOLE is not set | ||
80 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
81 | CONFIG_FONTS=y | ||
82 | CONFIG_FONT_8x8=y | ||
83 | CONFIG_LOGO=y | ||
84 | # CONFIG_HID_SUPPORT is not set | ||
85 | # CONFIG_USB_SUPPORT is not set | ||
86 | CONFIG_MMC=y | ||
87 | CONFIG_MMC_MXC=y | ||
88 | # CONFIG_DNOTIFY is not set | ||
89 | CONFIG_MSDOS_FS=y | ||
90 | CONFIG_TMPFS=y | ||
91 | CONFIG_JFFS2_FS=y | ||
92 | CONFIG_NFS_FS=y | ||
93 | CONFIG_NFS_V3=y | ||
94 | CONFIG_ROOT_NFS=y | ||
95 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
96 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
97 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
diff --git a/arch/arm/configs/mx51_defconfig b/arch/arm/configs/mx5_defconfig index 88c5802a2351..d0d8dfece37e 100644 --- a/arch/arm/configs/mx51_defconfig +++ b/arch/arm/configs/mx5_defconfig | |||
@@ -1,5 +1,6 @@ | |||
1 | CONFIG_EXPERIMENTAL=y | 1 | CONFIG_EXPERIMENTAL=y |
2 | # CONFIG_LOCALVERSION_AUTO is not set | 2 | # CONFIG_LOCALVERSION_AUTO is not set |
3 | CONFIG_KERNEL_LZO=y | ||
3 | CONFIG_SYSVIPC=y | 4 | CONFIG_SYSVIPC=y |
4 | CONFIG_LOG_BUF_SHIFT=18 | 5 | CONFIG_LOG_BUF_SHIFT=18 |
5 | CONFIG_RELAY=y | 6 | CONFIG_RELAY=y |
@@ -13,21 +14,29 @@ CONFIG_MODULE_SRCVERSION_ALL=y | |||
13 | # CONFIG_LBDAF is not set | 14 | # CONFIG_LBDAF is not set |
14 | # CONFIG_BLK_DEV_BSG is not set | 15 | # CONFIG_BLK_DEV_BSG is not set |
15 | CONFIG_ARCH_MXC=y | 16 | CONFIG_ARCH_MXC=y |
16 | CONFIG_ARCH_MX51=y | 17 | CONFIG_ARCH_MX5=y |
17 | CONFIG_MACH_MX51_BABBAGE=y | 18 | CONFIG_MACH_MX51_BABBAGE=y |
18 | CONFIG_MACH_MX51_3DS=y | 19 | CONFIG_MACH_MX51_3DS=y |
19 | CONFIG_MACH_EUKREA_CPUIMX51=y | 20 | CONFIG_MACH_EUKREA_CPUIMX51=y |
21 | CONFIG_MACH_EUKREA_CPUIMX51SD=y | ||
22 | CONFIG_MACH_MX51_EFIKAMX=y | ||
23 | CONFIG_MACH_MX51_EFIKASB=y | ||
24 | CONFIG_MACH_MX53_EVK=y | ||
25 | CONFIG_MACH_MX53_SMD=y | ||
26 | CONFIG_MACH_MX53_LOCO=y | ||
27 | CONFIG_MACH_MX53_ARD=y | ||
28 | CONFIG_MXC_PWM=y | ||
20 | CONFIG_NO_HZ=y | 29 | CONFIG_NO_HZ=y |
21 | CONFIG_HIGH_RES_TIMERS=y | 30 | CONFIG_HIGH_RES_TIMERS=y |
31 | CONFIG_VMSPLIT_2G=y | ||
22 | CONFIG_PREEMPT_VOLUNTARY=y | 32 | CONFIG_PREEMPT_VOLUNTARY=y |
23 | CONFIG_AEABI=y | 33 | CONFIG_AEABI=y |
24 | # CONFIG_OABI_COMPAT is not set | 34 | # CONFIG_OABI_COMPAT is not set |
25 | CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 | 35 | CONFIG_DEFAULT_MMAP_MIN_ADDR=32768 |
26 | CONFIG_CMDLINE="noinitrd console=ttymxc0,115200 root=/dev/nfs nfsroot=192.168.0.101:/shared/nfs ip=dhcp" | 36 | CONFIG_CMDLINE="noinitrd console=ttymxc0,115200" |
27 | CONFIG_VFP=y | 37 | CONFIG_VFP=y |
28 | CONFIG_NEON=y | 38 | CONFIG_NEON=y |
29 | CONFIG_BINFMT_MISC=m | 39 | CONFIG_BINFMT_MISC=m |
30 | CONFIG_PM=y | ||
31 | CONFIG_PM_DEBUG=y | 40 | CONFIG_PM_DEBUG=y |
32 | CONFIG_PM_TEST_SUSPEND=y | 41 | CONFIG_PM_TEST_SUSPEND=y |
33 | CONFIG_NET=y | 42 | CONFIG_NET=y |
@@ -42,13 +51,13 @@ CONFIG_IP_PNP_DHCP=y | |||
42 | # CONFIG_INET_LRO is not set | 51 | # CONFIG_INET_LRO is not set |
43 | # CONFIG_IPV6 is not set | 52 | # CONFIG_IPV6 is not set |
44 | # CONFIG_WIRELESS is not set | 53 | # CONFIG_WIRELESS is not set |
54 | CONFIG_DEVTMPFS=y | ||
55 | CONFIG_DEVTMPFS_MOUNT=y | ||
45 | # CONFIG_STANDALONE is not set | 56 | # CONFIG_STANDALONE is not set |
46 | CONFIG_CONNECTOR=y | 57 | CONFIG_CONNECTOR=y |
47 | CONFIG_BLK_DEV_LOOP=y | 58 | CONFIG_BLK_DEV_LOOP=y |
48 | CONFIG_BLK_DEV_RAM=y | 59 | CONFIG_BLK_DEV_RAM=y |
49 | CONFIG_BLK_DEV_RAM_SIZE=65536 | 60 | CONFIG_BLK_DEV_RAM_SIZE=65536 |
50 | # CONFIG_MISC_DEVICES is not set | ||
51 | CONFIG_SCSI=y | ||
52 | # CONFIG_SCSI_PROC_FS is not set | 61 | # CONFIG_SCSI_PROC_FS is not set |
53 | CONFIG_BLK_DEV_SD=y | 62 | CONFIG_BLK_DEV_SD=y |
54 | CONFIG_SCSI_MULTI_LUN=y | 63 | CONFIG_SCSI_MULTI_LUN=y |
@@ -56,8 +65,10 @@ CONFIG_SCSI_CONSTANTS=y | |||
56 | CONFIG_SCSI_LOGGING=y | 65 | CONFIG_SCSI_LOGGING=y |
57 | CONFIG_SCSI_SCAN_ASYNC=y | 66 | CONFIG_SCSI_SCAN_ASYNC=y |
58 | # CONFIG_SCSI_LOWLEVEL is not set | 67 | # CONFIG_SCSI_LOWLEVEL is not set |
59 | CONFIG_ATA=m | 68 | CONFIG_ATA=y |
69 | CONFIG_PATA_IMX=y | ||
60 | CONFIG_NETDEVICES=y | 70 | CONFIG_NETDEVICES=y |
71 | CONFIG_MII=m | ||
61 | CONFIG_MARVELL_PHY=y | 72 | CONFIG_MARVELL_PHY=y |
62 | CONFIG_DAVICOM_PHY=y | 73 | CONFIG_DAVICOM_PHY=y |
63 | CONFIG_QSEMI_PHY=y | 74 | CONFIG_QSEMI_PHY=y |
@@ -71,49 +82,57 @@ CONFIG_REALTEK_PHY=y | |||
71 | CONFIG_NATIONAL_PHY=y | 82 | CONFIG_NATIONAL_PHY=y |
72 | CONFIG_STE10XP=y | 83 | CONFIG_STE10XP=y |
73 | CONFIG_LSI_ET1011C_PHY=y | 84 | CONFIG_LSI_ET1011C_PHY=y |
74 | CONFIG_MDIO_BITBANG=y | 85 | CONFIG_MICREL_PHY=y |
75 | CONFIG_MDIO_GPIO=y | ||
76 | CONFIG_NET_ETHERNET=y | 86 | CONFIG_NET_ETHERNET=y |
77 | CONFIG_MII=m | ||
78 | CONFIG_FEC=y | ||
79 | # CONFIG_NETDEV_1000 is not set | 87 | # CONFIG_NETDEV_1000 is not set |
80 | # CONFIG_NETDEV_10000 is not set | 88 | # CONFIG_NETDEV_10000 is not set |
81 | # CONFIG_WLAN is not set | 89 | # CONFIG_WLAN is not set |
82 | CONFIG_INPUT_FF_MEMLESS=m | ||
83 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | 90 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set |
84 | CONFIG_INPUT_EVDEV=y | 91 | CONFIG_INPUT_EVDEV=y |
85 | CONFIG_KEYBOARD_GPIO=y | ||
86 | CONFIG_INPUT_EVBUG=m | 92 | CONFIG_INPUT_EVBUG=m |
93 | CONFIG_KEYBOARD_GPIO=y | ||
87 | CONFIG_MOUSE_PS2=m | 94 | CONFIG_MOUSE_PS2=m |
88 | CONFIG_MOUSE_PS2_ELANTECH=y | 95 | CONFIG_MOUSE_PS2_ELANTECH=y |
96 | CONFIG_INPUT_MISC=y | ||
97 | CONFIG_INPUT_MMA8450=y | ||
89 | CONFIG_SERIO_SERPORT=m | 98 | CONFIG_SERIO_SERPORT=m |
90 | CONFIG_VT_HW_CONSOLE_BINDING=y | 99 | CONFIG_VT_HW_CONSOLE_BINDING=y |
100 | # CONFIG_LEGACY_PTYS is not set | ||
91 | # CONFIG_DEVKMEM is not set | 101 | # CONFIG_DEVKMEM is not set |
92 | CONFIG_SERIAL_IMX=y | 102 | CONFIG_SERIAL_IMX=y |
93 | CONFIG_SERIAL_IMX_CONSOLE=y | 103 | CONFIG_SERIAL_IMX_CONSOLE=y |
94 | # CONFIG_LEGACY_PTYS is not set | ||
95 | CONFIG_HW_RANDOM=y | 104 | CONFIG_HW_RANDOM=y |
96 | CONFIG_I2C=y | 105 | CONFIG_I2C=y |
97 | # CONFIG_I2C_COMPAT is not set | 106 | # CONFIG_I2C_COMPAT is not set |
98 | CONFIG_I2C_CHARDEV=m | 107 | CONFIG_I2C_CHARDEV=y |
99 | # CONFIG_I2C_HELPER_AUTO is not set | 108 | # CONFIG_I2C_HELPER_AUTO is not set |
100 | CONFIG_I2C_ALGOBIT=m | 109 | CONFIG_I2C_ALGOBIT=m |
101 | CONFIG_I2C_ALGOPCF=m | 110 | CONFIG_I2C_ALGOPCF=m |
102 | CONFIG_I2C_ALGOPCA=m | 111 | CONFIG_I2C_ALGOPCA=m |
112 | CONFIG_I2C_IMX=y | ||
113 | CONFIG_SPI=y | ||
114 | CONFIG_SPI_IMX=y | ||
103 | CONFIG_GPIO_SYSFS=y | 115 | CONFIG_GPIO_SYSFS=y |
104 | # CONFIG_HWMON is not set | 116 | # CONFIG_HWMON is not set |
105 | # CONFIG_HID_SUPPORT is not set | 117 | CONFIG_WATCHDOG=y |
118 | CONFIG_IMX2_WDT=y | ||
119 | CONFIG_MFD_MC13XXX=y | ||
120 | CONFIG_REGULATOR=y | ||
121 | CONFIG_REGULATOR_MC13892=y | ||
106 | CONFIG_USB=y | 122 | CONFIG_USB=y |
107 | CONFIG_USB_EHCI_HCD=y | 123 | CONFIG_USB_EHCI_HCD=y |
108 | CONFIG_USB_EHCI_MXC=y | 124 | CONFIG_USB_EHCI_MXC=y |
109 | CONFIG_USB_STORAGE=y | 125 | CONFIG_USB_STORAGE=y |
110 | CONFIG_MMC=y | 126 | CONFIG_MMC=y |
111 | CONFIG_MMC_BLOCK=m | 127 | CONFIG_MMC_BLOCK=m |
112 | CONFIG_MMC_SDHCI=m | 128 | CONFIG_MMC_SDHCI=y |
129 | CONFIG_MMC_SDHCI_PLTFM=y | ||
130 | CONFIG_MMC_SDHCI_ESDHC_IMX=y | ||
113 | CONFIG_NEW_LEDS=y | 131 | CONFIG_NEW_LEDS=y |
114 | CONFIG_LEDS_CLASS=y | 132 | CONFIG_LEDS_CLASS=y |
115 | CONFIG_RTC_CLASS=y | 133 | CONFIG_RTC_CLASS=y |
116 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y | 134 | CONFIG_RTC_INTF_DEV_UIE_EMUL=y |
135 | CONFIG_RTC_MXC=y | ||
117 | CONFIG_EXT2_FS=y | 136 | CONFIG_EXT2_FS=y |
118 | CONFIG_EXT2_FS_XATTR=y | 137 | CONFIG_EXT2_FS_XATTR=y |
119 | CONFIG_EXT2_FS_POSIX_ACL=y | 138 | CONFIG_EXT2_FS_POSIX_ACL=y |
@@ -127,7 +146,6 @@ CONFIG_EXT4_FS_SECURITY=y | |||
127 | CONFIG_QUOTA=y | 146 | CONFIG_QUOTA=y |
128 | CONFIG_QUOTA_NETLINK_INTERFACE=y | 147 | CONFIG_QUOTA_NETLINK_INTERFACE=y |
129 | # CONFIG_PRINT_QUOTA_WARNING is not set | 148 | # CONFIG_PRINT_QUOTA_WARNING is not set |
130 | CONFIG_AUTOFS_FS=y | ||
131 | CONFIG_AUTOFS4_FS=y | 149 | CONFIG_AUTOFS4_FS=y |
132 | CONFIG_FUSE_FS=y | 150 | CONFIG_FUSE_FS=y |
133 | CONFIG_ISO9660_FS=m | 151 | CONFIG_ISO9660_FS=m |
@@ -151,17 +169,13 @@ CONFIG_NLS_ISO8859_15=m | |||
151 | CONFIG_NLS_UTF8=y | 169 | CONFIG_NLS_UTF8=y |
152 | CONFIG_MAGIC_SYSRQ=y | 170 | CONFIG_MAGIC_SYSRQ=y |
153 | CONFIG_DEBUG_FS=y | 171 | CONFIG_DEBUG_FS=y |
154 | CONFIG_DEBUG_KERNEL=y | ||
155 | # CONFIG_SCHED_DEBUG is not set | 172 | # CONFIG_SCHED_DEBUG is not set |
156 | # CONFIG_DEBUG_BUGVERBOSE is not set | 173 | # CONFIG_DEBUG_BUGVERBOSE is not set |
157 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
158 | # CONFIG_FTRACE is not set | 174 | # CONFIG_FTRACE is not set |
159 | # CONFIG_ARM_UNWIND is not set | 175 | # CONFIG_ARM_UNWIND is not set |
160 | CONFIG_DEBUG_LL=y | ||
161 | CONFIG_EARLY_PRINTK=y | ||
162 | CONFIG_SECURITYFS=y | 176 | CONFIG_SECURITYFS=y |
163 | CONFIG_CRYPTO_DEFLATE=y | 177 | CONFIG_CRYPTO_DEFLATE=m |
164 | CONFIG_CRYPTO_LZO=y | 178 | CONFIG_CRYPTO_LZO=m |
165 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | 179 | # CONFIG_CRYPTO_ANSI_CPRNG is not set |
166 | # CONFIG_CRYPTO_HW is not set | 180 | # CONFIG_CRYPTO_HW is not set |
167 | CONFIG_CRC_CCITT=m | 181 | CONFIG_CRC_CCITT=m |
diff --git a/arch/arm/configs/tegra_defconfig b/arch/arm/configs/tegra_defconfig index 8845f1c9925d..195729760aeb 100644 --- a/arch/arm/configs/tegra_defconfig +++ b/arch/arm/configs/tegra_defconfig | |||
@@ -25,6 +25,7 @@ CONFIG_MACH_KAEN=y | |||
25 | CONFIG_MACH_PAZ00=y | 25 | CONFIG_MACH_PAZ00=y |
26 | CONFIG_MACH_TRIMSLICE=y | 26 | CONFIG_MACH_TRIMSLICE=y |
27 | CONFIG_MACH_WARIO=y | 27 | CONFIG_MACH_WARIO=y |
28 | CONFIG_MACH_VENTANA=y | ||
28 | CONFIG_TEGRA_DEBUG_UARTD=y | 29 | CONFIG_TEGRA_DEBUG_UARTD=y |
29 | CONFIG_ARM_ERRATA_742230=y | 30 | CONFIG_ARM_ERRATA_742230=y |
30 | CONFIG_NO_HZ=y | 31 | CONFIG_NO_HZ=y |
@@ -38,7 +39,6 @@ CONFIG_HIGHMEM=y | |||
38 | CONFIG_ZBOOT_ROM_TEXT=0x0 | 39 | CONFIG_ZBOOT_ROM_TEXT=0x0 |
39 | CONFIG_ZBOOT_ROM_BSS=0x0 | 40 | CONFIG_ZBOOT_ROM_BSS=0x0 |
40 | CONFIG_VFP=y | 41 | CONFIG_VFP=y |
41 | CONFIG_PM=y | ||
42 | CONFIG_NET=y | 42 | CONFIG_NET=y |
43 | CONFIG_PACKET=y | 43 | CONFIG_PACKET=y |
44 | CONFIG_UNIX=y | 44 | CONFIG_UNIX=y |
@@ -65,6 +65,7 @@ CONFIG_IPV6_TUNNEL=y | |||
65 | CONFIG_IPV6_MULTIPLE_TABLES=y | 65 | CONFIG_IPV6_MULTIPLE_TABLES=y |
66 | # CONFIG_WIRELESS is not set | 66 | # CONFIG_WIRELESS is not set |
67 | # CONFIG_FIRMWARE_IN_KERNEL is not set | 67 | # CONFIG_FIRMWARE_IN_KERNEL is not set |
68 | CONFIG_PROC_DEVICETREE=y | ||
68 | CONFIG_BLK_DEV_LOOP=y | 69 | CONFIG_BLK_DEV_LOOP=y |
69 | CONFIG_MISC_DEVICES=y | 70 | CONFIG_MISC_DEVICES=y |
70 | CONFIG_AD525X_DPOT=y | 71 | CONFIG_AD525X_DPOT=y |
@@ -72,34 +73,61 @@ CONFIG_AD525X_DPOT_I2C=y | |||
72 | CONFIG_ICS932S401=y | 73 | CONFIG_ICS932S401=y |
73 | CONFIG_APDS9802ALS=y | 74 | CONFIG_APDS9802ALS=y |
74 | CONFIG_ISL29003=y | 75 | CONFIG_ISL29003=y |
76 | CONFIG_SCSI=y | ||
77 | CONFIG_BLK_DEV_SD=y | ||
78 | # CONFIG_SCSI_LOWLEVEL is not set | ||
75 | CONFIG_NETDEVICES=y | 79 | CONFIG_NETDEVICES=y |
76 | CONFIG_DUMMY=y | 80 | CONFIG_DUMMY=y |
81 | CONFIG_NET_ETHERNET=y | ||
77 | CONFIG_R8169=y | 82 | CONFIG_R8169=y |
78 | # CONFIG_NETDEV_10000 is not set | 83 | # CONFIG_NETDEV_10000 is not set |
79 | # CONFIG_WLAN is not set | 84 | # CONFIG_WLAN is not set |
85 | CONFIG_USB_PEGASUS=y | ||
86 | CONFIG_USB_USBNET=y | ||
87 | CONFIG_USB_NET_SMSC75XX=y | ||
88 | CONFIG_USB_NET_SMSC95XX=y | ||
80 | # CONFIG_INPUT is not set | 89 | # CONFIG_INPUT is not set |
81 | # CONFIG_SERIO is not set | 90 | # CONFIG_SERIO is not set |
82 | # CONFIG_VT is not set | 91 | # CONFIG_VT is not set |
92 | # CONFIG_LEGACY_PTYS is not set | ||
83 | # CONFIG_DEVKMEM is not set | 93 | # CONFIG_DEVKMEM is not set |
84 | CONFIG_SERIAL_8250=y | 94 | CONFIG_SERIAL_8250=y |
85 | CONFIG_SERIAL_8250_CONSOLE=y | 95 | CONFIG_SERIAL_8250_CONSOLE=y |
86 | # CONFIG_LEGACY_PTYS is not set | 96 | CONFIG_SERIAL_OF_PLATFORM=y |
87 | # CONFIG_HW_RANDOM is not set | 97 | # CONFIG_HW_RANDOM is not set |
88 | CONFIG_I2C=y | 98 | CONFIG_I2C=y |
89 | # CONFIG_I2C_COMPAT is not set | 99 | # CONFIG_I2C_COMPAT is not set |
90 | # CONFIG_I2C_HELPER_AUTO is not set | 100 | # CONFIG_I2C_HELPER_AUTO is not set |
91 | CONFIG_I2C_TEGRA=y | 101 | CONFIG_I2C_TEGRA=y |
102 | CONFIG_SPI=y | ||
103 | CONFIG_SPI_TEGRA=y | ||
92 | CONFIG_SENSORS_LM90=y | 104 | CONFIG_SENSORS_LM90=y |
93 | CONFIG_MFD_TPS6586X=y | 105 | CONFIG_MFD_TPS6586X=y |
94 | CONFIG_REGULATOR=y | 106 | CONFIG_REGULATOR=y |
95 | CONFIG_REGULATOR_TPS6586X=y | 107 | CONFIG_REGULATOR_TPS6586X=y |
96 | # CONFIG_USB_SUPPORT is not set | 108 | CONFIG_SOUND=y |
109 | CONFIG_SND=y | ||
110 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
111 | # CONFIG_SND_DRIVERS is not set | ||
112 | # CONFIG_SND_PCI is not set | ||
113 | # CONFIG_SND_ARM is not set | ||
114 | # CONFIG_SND_SPI is not set | ||
115 | # CONFIG_SND_USB is not set | ||
116 | CONFIG_SND_SOC=y | ||
117 | CONFIG_SND_SOC_TEGRA=y | ||
118 | CONFIG_SND_SOC_TEGRA_WM8903=y | ||
119 | CONFIG_SND_SOC_TEGRA_TRIMSLICE=y | ||
120 | CONFIG_USB=y | ||
121 | CONFIG_USB_EHCI_HCD=y | ||
122 | CONFIG_USB_EHCI_TEGRA=y | ||
123 | CONFIG_USB_STORAGE=y | ||
97 | CONFIG_MMC=y | 124 | CONFIG_MMC=y |
98 | CONFIG_MMC_SDHCI=y | 125 | CONFIG_MMC_SDHCI=y |
99 | CONFIG_MMC_SDHCI_PLTFM=y | 126 | CONFIG_MMC_SDHCI_PLTFM=y |
100 | CONFIG_MMC_SDHCI_TEGRA=y | 127 | CONFIG_MMC_SDHCI_TEGRA=y |
128 | CONFIG_RTC_CLASS=y | ||
129 | CONFIG_RTC_DRV_TEGRA=y | ||
101 | CONFIG_STAGING=y | 130 | CONFIG_STAGING=y |
102 | # CONFIG_STAGING_EXCLUDE_BUILD is not set | ||
103 | CONFIG_IIO=y | 131 | CONFIG_IIO=y |
104 | CONFIG_SENSORS_ISL29018=y | 132 | CONFIG_SENSORS_ISL29018=y |
105 | CONFIG_SENSORS_AK8975=y | 133 | CONFIG_SENSORS_AK8975=y |
@@ -123,18 +151,15 @@ CONFIG_NLS_ISO8859_1=y | |||
123 | CONFIG_PRINTK_TIME=y | 151 | CONFIG_PRINTK_TIME=y |
124 | CONFIG_MAGIC_SYSRQ=y | 152 | CONFIG_MAGIC_SYSRQ=y |
125 | CONFIG_DEBUG_FS=y | 153 | CONFIG_DEBUG_FS=y |
126 | CONFIG_DEBUG_KERNEL=y | ||
127 | CONFIG_DETECT_HUNG_TASK=y | 154 | CONFIG_DETECT_HUNG_TASK=y |
128 | CONFIG_SCHEDSTATS=y | 155 | CONFIG_SCHEDSTATS=y |
129 | CONFIG_TIMER_STATS=y | 156 | CONFIG_TIMER_STATS=y |
130 | CONFIG_DEBUG_SLAB=y | 157 | CONFIG_DEBUG_SLAB=y |
131 | # CONFIG_DEBUG_PREEMPT is not set | 158 | # CONFIG_DEBUG_PREEMPT is not set |
132 | CONFIG_DEBUG_MUTEXES=y | 159 | CONFIG_DEBUG_MUTEXES=y |
133 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
134 | CONFIG_DEBUG_INFO=y | 160 | CONFIG_DEBUG_INFO=y |
135 | CONFIG_DEBUG_VM=y | 161 | CONFIG_DEBUG_VM=y |
136 | CONFIG_DEBUG_SG=y | 162 | CONFIG_DEBUG_SG=y |
137 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
138 | CONFIG_DEBUG_LL=y | 163 | CONFIG_DEBUG_LL=y |
139 | CONFIG_EARLY_PRINTK=y | 164 | CONFIG_EARLY_PRINTK=y |
140 | CONFIG_CRYPTO_ECB=y | 165 | CONFIG_CRYPTO_ECB=y |
diff --git a/arch/arm/mach-at91/at91cap9.c b/arch/arm/mach-at91/at91cap9.c index bfc684441ef8..ecdd54dd68c6 100644 --- a/arch/arm/mach-at91/at91cap9.c +++ b/arch/arm/mach-at91/at91cap9.c | |||
@@ -219,6 +219,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
219 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | 219 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), |
220 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 220 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
221 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 221 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
222 | /* fake hclk clock */ | ||
223 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | ||
222 | }; | 224 | }; |
223 | 225 | ||
224 | static struct clk_lookup usart_clocks_lookups[] = { | 226 | static struct clk_lookup usart_clocks_lookups[] = { |
diff --git a/arch/arm/mach-at91/at91cap9_devices.c b/arch/arm/mach-at91/at91cap9_devices.c index f87f5040e78e..a4401d6b5b07 100644 --- a/arch/arm/mach-at91/at91cap9_devices.c +++ b/arch/arm/mach-at91/at91cap9_devices.c | |||
@@ -80,6 +80,12 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
80 | at91_set_gpio_output(data->vbus_pin[i], 0); | 80 | at91_set_gpio_output(data->vbus_pin[i], 0); |
81 | } | 81 | } |
82 | 82 | ||
83 | /* Enable overcurrent notification */ | ||
84 | for (i = 0; i < data->ports; i++) { | ||
85 | if (data->overcurrent_pin[i]) | ||
86 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | ||
87 | } | ||
88 | |||
83 | usbh_data = *data; | 89 | usbh_data = *data; |
84 | platform_device_register(&at91_usbh_device); | 90 | platform_device_register(&at91_usbh_device); |
85 | } | 91 | } |
diff --git a/arch/arm/mach-at91/at91rm9200.c b/arch/arm/mach-at91/at91rm9200.c index f73302dbc6a5..713d3bdbd284 100644 --- a/arch/arm/mach-at91/at91rm9200.c +++ b/arch/arm/mach-at91/at91rm9200.c | |||
@@ -193,6 +193,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
193 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 193 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
194 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 194 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
195 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), | 195 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
196 | /* fake hclk clock */ | ||
197 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | ||
196 | }; | 198 | }; |
197 | 199 | ||
198 | static struct clk_lookup usart_clocks_lookups[] = { | 200 | static struct clk_lookup usart_clocks_lookups[] = { |
diff --git a/arch/arm/mach-at91/at91rm9200_devices.c b/arch/arm/mach-at91/at91rm9200_devices.c index 978be950035a..01d8bbd1468b 100644 --- a/arch/arm/mach-at91/at91rm9200_devices.c +++ b/arch/arm/mach-at91/at91rm9200_devices.c | |||
@@ -60,9 +60,17 @@ static struct platform_device at91rm9200_usbh_device = { | |||
60 | 60 | ||
61 | void __init at91_add_device_usbh(struct at91_usbh_data *data) | 61 | void __init at91_add_device_usbh(struct at91_usbh_data *data) |
62 | { | 62 | { |
63 | int i; | ||
64 | |||
63 | if (!data) | 65 | if (!data) |
64 | return; | 66 | return; |
65 | 67 | ||
68 | /* Enable overcurrent notification */ | ||
69 | for (i = 0; i < data->ports; i++) { | ||
70 | if (data->overcurrent_pin[i]) | ||
71 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | ||
72 | } | ||
73 | |||
66 | usbh_data = *data; | 74 | usbh_data = *data; |
67 | platform_device_register(&at91rm9200_usbh_device); | 75 | platform_device_register(&at91rm9200_usbh_device); |
68 | } | 76 | } |
diff --git a/arch/arm/mach-at91/at91sam9260.c b/arch/arm/mach-at91/at91sam9260.c index cb397be14448..a9be75825e34 100644 --- a/arch/arm/mach-at91/at91sam9260.c +++ b/arch/arm/mach-at91/at91sam9260.c | |||
@@ -199,6 +199,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
199 | CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk), | 199 | CLKDEV_CON_DEV_ID("t4_clk", "atmel_tcb.1", &tc4_clk), |
200 | CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk), | 200 | CLKDEV_CON_DEV_ID("t5_clk", "atmel_tcb.1", &tc5_clk), |
201 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), | 201 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc_clk), |
202 | /* fake hclk clock */ | ||
203 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | ||
202 | }; | 204 | }; |
203 | 205 | ||
204 | static struct clk_lookup usart_clocks_lookups[] = { | 206 | static struct clk_lookup usart_clocks_lookups[] = { |
diff --git a/arch/arm/mach-at91/at91sam9260_devices.c b/arch/arm/mach-at91/at91sam9260_devices.c index 3c2b580b9d75..24b6f8c0440d 100644 --- a/arch/arm/mach-at91/at91sam9260_devices.c +++ b/arch/arm/mach-at91/at91sam9260_devices.c | |||
@@ -61,9 +61,17 @@ static struct platform_device at91_usbh_device = { | |||
61 | 61 | ||
62 | void __init at91_add_device_usbh(struct at91_usbh_data *data) | 62 | void __init at91_add_device_usbh(struct at91_usbh_data *data) |
63 | { | 63 | { |
64 | int i; | ||
65 | |||
64 | if (!data) | 66 | if (!data) |
65 | return; | 67 | return; |
66 | 68 | ||
69 | /* Enable overcurrent notification */ | ||
70 | for (i = 0; i < data->ports; i++) { | ||
71 | if (data->overcurrent_pin[i]) | ||
72 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | ||
73 | } | ||
74 | |||
67 | usbh_data = *data; | 75 | usbh_data = *data; |
68 | platform_device_register(&at91_usbh_device); | 76 | platform_device_register(&at91_usbh_device); |
69 | } | 77 | } |
diff --git a/arch/arm/mach-at91/at91sam9261.c b/arch/arm/mach-at91/at91sam9261.c index 6c8e3b5f669f..658a5185abfd 100644 --- a/arch/arm/mach-at91/at91sam9261.c +++ b/arch/arm/mach-at91/at91sam9261.c | |||
@@ -129,6 +129,20 @@ static struct clk lcdc_clk = { | |||
129 | .type = CLK_TYPE_PERIPHERAL, | 129 | .type = CLK_TYPE_PERIPHERAL, |
130 | }; | 130 | }; |
131 | 131 | ||
132 | /* HClocks */ | ||
133 | static struct clk hck0 = { | ||
134 | .name = "hck0", | ||
135 | .pmc_mask = AT91_PMC_HCK0, | ||
136 | .type = CLK_TYPE_SYSTEM, | ||
137 | .id = 0, | ||
138 | }; | ||
139 | static struct clk hck1 = { | ||
140 | .name = "hck1", | ||
141 | .pmc_mask = AT91_PMC_HCK1, | ||
142 | .type = CLK_TYPE_SYSTEM, | ||
143 | .id = 1, | ||
144 | }; | ||
145 | |||
132 | static struct clk *periph_clocks[] __initdata = { | 146 | static struct clk *periph_clocks[] __initdata = { |
133 | &pioA_clk, | 147 | &pioA_clk, |
134 | &pioB_clk, | 148 | &pioB_clk, |
@@ -161,6 +175,7 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
161 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 175 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
162 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 176 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
163 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), | 177 | CLKDEV_CON_DEV_ID("pclk", "ssc.2", &ssc2_clk), |
178 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &hck0), | ||
164 | }; | 179 | }; |
165 | 180 | ||
166 | static struct clk_lookup usart_clocks_lookups[] = { | 181 | static struct clk_lookup usart_clocks_lookups[] = { |
@@ -199,20 +214,6 @@ static struct clk pck3 = { | |||
199 | .id = 3, | 214 | .id = 3, |
200 | }; | 215 | }; |
201 | 216 | ||
202 | /* HClocks */ | ||
203 | static struct clk hck0 = { | ||
204 | .name = "hck0", | ||
205 | .pmc_mask = AT91_PMC_HCK0, | ||
206 | .type = CLK_TYPE_SYSTEM, | ||
207 | .id = 0, | ||
208 | }; | ||
209 | static struct clk hck1 = { | ||
210 | .name = "hck1", | ||
211 | .pmc_mask = AT91_PMC_HCK1, | ||
212 | .type = CLK_TYPE_SYSTEM, | ||
213 | .id = 1, | ||
214 | }; | ||
215 | |||
216 | static void __init at91sam9261_register_clocks(void) | 217 | static void __init at91sam9261_register_clocks(void) |
217 | { | 218 | { |
218 | int i; | 219 | int i; |
diff --git a/arch/arm/mach-at91/at91sam9261_devices.c b/arch/arm/mach-at91/at91sam9261_devices.c index 4e647b653339..3b70b3897d95 100644 --- a/arch/arm/mach-at91/at91sam9261_devices.c +++ b/arch/arm/mach-at91/at91sam9261_devices.c | |||
@@ -64,9 +64,17 @@ static struct platform_device at91sam9261_usbh_device = { | |||
64 | 64 | ||
65 | void __init at91_add_device_usbh(struct at91_usbh_data *data) | 65 | void __init at91_add_device_usbh(struct at91_usbh_data *data) |
66 | { | 66 | { |
67 | int i; | ||
68 | |||
67 | if (!data) | 69 | if (!data) |
68 | return; | 70 | return; |
69 | 71 | ||
72 | /* Enable overcurrent notification */ | ||
73 | for (i = 0; i < data->ports; i++) { | ||
74 | if (data->overcurrent_pin[i]) | ||
75 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | ||
76 | } | ||
77 | |||
70 | usbh_data = *data; | 78 | usbh_data = *data; |
71 | platform_device_register(&at91sam9261_usbh_device); | 79 | platform_device_register(&at91sam9261_usbh_device); |
72 | } | 80 | } |
diff --git a/arch/arm/mach-at91/at91sam9263.c b/arch/arm/mach-at91/at91sam9263.c index 044f3c927e64..f83fbb0ee0c5 100644 --- a/arch/arm/mach-at91/at91sam9263.c +++ b/arch/arm/mach-at91/at91sam9263.c | |||
@@ -189,6 +189,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
189 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), | 189 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.0", &spi0_clk), |
190 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), | 190 | CLKDEV_CON_DEV_ID("spi_clk", "atmel_spi.1", &spi1_clk), |
191 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), | 191 | CLKDEV_CON_DEV_ID("t0_clk", "atmel_tcb.0", &tcb_clk), |
192 | /* fake hclk clock */ | ||
193 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &ohci_clk), | ||
192 | }; | 194 | }; |
193 | 195 | ||
194 | static struct clk_lookup usart_clocks_lookups[] = { | 196 | static struct clk_lookup usart_clocks_lookups[] = { |
diff --git a/arch/arm/mach-at91/at91sam9263_devices.c b/arch/arm/mach-at91/at91sam9263_devices.c index dd7662bc395f..3faa1fde9ad9 100644 --- a/arch/arm/mach-at91/at91sam9263_devices.c +++ b/arch/arm/mach-at91/at91sam9263_devices.c | |||
@@ -74,6 +74,12 @@ void __init at91_add_device_usbh(struct at91_usbh_data *data) | |||
74 | at91_set_gpio_output(data->vbus_pin[i], 0); | 74 | at91_set_gpio_output(data->vbus_pin[i], 0); |
75 | } | 75 | } |
76 | 76 | ||
77 | /* Enable overcurrent notification */ | ||
78 | for (i = 0; i < data->ports; i++) { | ||
79 | if (data->overcurrent_pin[i]) | ||
80 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | ||
81 | } | ||
82 | |||
77 | usbh_data = *data; | 83 | usbh_data = *data; |
78 | platform_device_register(&at91_usbh_device); | 84 | platform_device_register(&at91_usbh_device); |
79 | } | 85 | } |
diff --git a/arch/arm/mach-at91/at91sam9g45.c b/arch/arm/mach-at91/at91sam9g45.c index 00c0a78fc12c..29def9095ab1 100644 --- a/arch/arm/mach-at91/at91sam9g45.c +++ b/arch/arm/mach-at91/at91sam9g45.c | |||
@@ -223,6 +223,8 @@ static struct clk_lookup periph_clocks_lookups[] = { | |||
223 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), | 223 | CLKDEV_CON_DEV_ID("pclk", "ssc.0", &ssc0_clk), |
224 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), | 224 | CLKDEV_CON_DEV_ID("pclk", "ssc.1", &ssc1_clk), |
225 | CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk), | 225 | CLKDEV_CON_DEV_ID(NULL, "atmel-trng", &trng_clk), |
226 | /* fake hclk clock */ | ||
227 | CLKDEV_CON_DEV_ID("hclk", "at91_ohci", &uhphs_clk), | ||
226 | }; | 228 | }; |
227 | 229 | ||
228 | static struct clk_lookup usart_clocks_lookups[] = { | 230 | static struct clk_lookup usart_clocks_lookups[] = { |
diff --git a/arch/arm/mach-at91/at91sam9g45_devices.c b/arch/arm/mach-at91/at91sam9g45_devices.c index 2d6d57f7ba8a..000b5e1da965 100644 --- a/arch/arm/mach-at91/at91sam9g45_devices.c +++ b/arch/arm/mach-at91/at91sam9g45_devices.c | |||
@@ -124,6 +124,12 @@ void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data) | |||
124 | at91_set_gpio_output(data->vbus_pin[i], 0); | 124 | at91_set_gpio_output(data->vbus_pin[i], 0); |
125 | } | 125 | } |
126 | 126 | ||
127 | /* Enable overcurrent notification */ | ||
128 | for (i = 0; i < data->ports; i++) { | ||
129 | if (data->overcurrent_pin[i]) | ||
130 | at91_set_gpio_input(data->overcurrent_pin[i], 1); | ||
131 | } | ||
132 | |||
127 | usbh_ohci_data = *data; | 133 | usbh_ohci_data = *data; |
128 | platform_device_register(&at91_usbh_ohci_device); | 134 | platform_device_register(&at91_usbh_ohci_device); |
129 | } | 135 | } |
diff --git a/arch/arm/mach-at91/include/mach/board.h b/arch/arm/mach-at91/include/mach/board.h index ed544a0d5a1d..d07767f4052e 100644 --- a/arch/arm/mach-at91/include/mach/board.h +++ b/arch/arm/mach-at91/include/mach/board.h | |||
@@ -98,6 +98,11 @@ extern void __init at91_add_device_eth(struct at91_eth_data *data); | |||
98 | struct at91_usbh_data { | 98 | struct at91_usbh_data { |
99 | u8 ports; /* number of ports on root hub */ | 99 | u8 ports; /* number of ports on root hub */ |
100 | u8 vbus_pin[2]; /* port power-control pin */ | 100 | u8 vbus_pin[2]; /* port power-control pin */ |
101 | u8 vbus_pin_inverted; | ||
102 | u8 overcurrent_supported; | ||
103 | u8 overcurrent_pin[2]; | ||
104 | u8 overcurrent_status[2]; | ||
105 | u8 overcurrent_changed[2]; | ||
101 | }; | 106 | }; |
102 | extern void __init at91_add_device_usbh(struct at91_usbh_data *data); | 107 | extern void __init at91_add_device_usbh(struct at91_usbh_data *data); |
103 | extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); | 108 | extern void __init at91_add_device_usbh_ohci(struct at91_usbh_data *data); |
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig index c0deacae778d..32d837d8eab9 100644 --- a/arch/arm/mach-davinci/Kconfig +++ b/arch/arm/mach-davinci/Kconfig | |||
@@ -192,6 +192,16 @@ config DA850_UI_RMII | |||
192 | 192 | ||
193 | endchoice | 193 | endchoice |
194 | 194 | ||
195 | config DA850_WL12XX | ||
196 | bool "AM18x wl1271 daughter board" | ||
197 | depends on MACH_DAVINCI_DA850_EVM | ||
198 | help | ||
199 | The wl1271 daughter card for AM18x EVMs is a combo wireless | ||
200 | connectivity add-on card, based on the LS Research TiWi module with | ||
201 | Texas Instruments' wl1271 solution. | ||
202 | Say Y if you want to use a wl1271 expansion card connected to the | ||
203 | AM18x EVM. | ||
204 | |||
195 | config GPIO_PCA953X | 205 | config GPIO_PCA953X |
196 | default MACH_DAVINCI_DA850_EVM | 206 | default MACH_DAVINCI_DA850_EVM |
197 | 207 | ||
diff --git a/arch/arm/mach-davinci/board-da850-evm.c b/arch/arm/mach-davinci/board-da850-evm.c index 6e41cb5baeb4..ec21663f8ddc 100644 --- a/arch/arm/mach-davinci/board-da850-evm.c +++ b/arch/arm/mach-davinci/board-da850-evm.c | |||
@@ -31,6 +31,8 @@ | |||
31 | #include <linux/input/tps6507x-ts.h> | 31 | #include <linux/input/tps6507x-ts.h> |
32 | #include <linux/spi/spi.h> | 32 | #include <linux/spi/spi.h> |
33 | #include <linux/spi/flash.h> | 33 | #include <linux/spi/flash.h> |
34 | #include <linux/delay.h> | ||
35 | #include <linux/wl12xx.h> | ||
34 | 36 | ||
35 | #include <asm/mach-types.h> | 37 | #include <asm/mach-types.h> |
36 | #include <asm/mach/arch.h> | 38 | #include <asm/mach/arch.h> |
@@ -49,6 +51,9 @@ | |||
49 | #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) | 51 | #define DA850_MMCSD_CD_PIN GPIO_TO_PIN(4, 0) |
50 | #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) | 52 | #define DA850_MMCSD_WP_PIN GPIO_TO_PIN(4, 1) |
51 | 53 | ||
54 | #define DA850_WLAN_EN GPIO_TO_PIN(6, 9) | ||
55 | #define DA850_WLAN_IRQ GPIO_TO_PIN(6, 10) | ||
56 | |||
52 | #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) | 57 | #define DA850_MII_MDIO_CLKEN_PIN GPIO_TO_PIN(2, 6) |
53 | 58 | ||
54 | static struct mtd_partition da850evm_spiflash_part[] = { | 59 | static struct mtd_partition da850evm_spiflash_part[] = { |
@@ -1143,6 +1148,110 @@ static __init int da850_evm_init_cpufreq(void) | |||
1143 | static __init int da850_evm_init_cpufreq(void) { return 0; } | 1148 | static __init int da850_evm_init_cpufreq(void) { return 0; } |
1144 | #endif | 1149 | #endif |
1145 | 1150 | ||
1151 | #ifdef CONFIG_DA850_WL12XX | ||
1152 | |||
1153 | static void wl12xx_set_power(int index, bool power_on) | ||
1154 | { | ||
1155 | static bool power_state; | ||
1156 | |||
1157 | pr_debug("Powering %s wl12xx", power_on ? "on" : "off"); | ||
1158 | |||
1159 | if (power_on == power_state) | ||
1160 | return; | ||
1161 | power_state = power_on; | ||
1162 | |||
1163 | if (power_on) { | ||
1164 | /* Power up sequence required for wl127x devices */ | ||
1165 | gpio_set_value(DA850_WLAN_EN, 1); | ||
1166 | usleep_range(15000, 15000); | ||
1167 | gpio_set_value(DA850_WLAN_EN, 0); | ||
1168 | usleep_range(1000, 1000); | ||
1169 | gpio_set_value(DA850_WLAN_EN, 1); | ||
1170 | msleep(70); | ||
1171 | } else { | ||
1172 | gpio_set_value(DA850_WLAN_EN, 0); | ||
1173 | } | ||
1174 | } | ||
1175 | |||
1176 | static struct davinci_mmc_config da850_wl12xx_mmc_config = { | ||
1177 | .set_power = wl12xx_set_power, | ||
1178 | .wires = 4, | ||
1179 | .max_freq = 25000000, | ||
1180 | .caps = MMC_CAP_4_BIT_DATA | MMC_CAP_NONREMOVABLE | | ||
1181 | MMC_CAP_POWER_OFF_CARD, | ||
1182 | .version = MMC_CTLR_VERSION_2, | ||
1183 | }; | ||
1184 | |||
1185 | static const short da850_wl12xx_pins[] __initconst = { | ||
1186 | DA850_MMCSD1_DAT_0, DA850_MMCSD1_DAT_1, DA850_MMCSD1_DAT_2, | ||
1187 | DA850_MMCSD1_DAT_3, DA850_MMCSD1_CLK, DA850_MMCSD1_CMD, | ||
1188 | DA850_GPIO6_9, DA850_GPIO6_10, | ||
1189 | -1 | ||
1190 | }; | ||
1191 | |||
1192 | static struct wl12xx_platform_data da850_wl12xx_wlan_data __initdata = { | ||
1193 | .irq = -1, | ||
1194 | .board_ref_clock = WL12XX_REFCLOCK_38, | ||
1195 | .platform_quirks = WL12XX_PLATFORM_QUIRK_EDGE_IRQ, | ||
1196 | }; | ||
1197 | |||
1198 | static __init int da850_wl12xx_init(void) | ||
1199 | { | ||
1200 | int ret; | ||
1201 | |||
1202 | ret = davinci_cfg_reg_list(da850_wl12xx_pins); | ||
1203 | if (ret) { | ||
1204 | pr_err("wl12xx/mmc mux setup failed: %d\n", ret); | ||
1205 | goto exit; | ||
1206 | } | ||
1207 | |||
1208 | ret = da850_register_mmcsd1(&da850_wl12xx_mmc_config); | ||
1209 | if (ret) { | ||
1210 | pr_err("wl12xx/mmc registration failed: %d\n", ret); | ||
1211 | goto exit; | ||
1212 | } | ||
1213 | |||
1214 | ret = gpio_request_one(DA850_WLAN_EN, GPIOF_OUT_INIT_LOW, "wl12xx_en"); | ||
1215 | if (ret) { | ||
1216 | pr_err("Could not request wl12xx enable gpio: %d\n", ret); | ||
1217 | goto exit; | ||
1218 | } | ||
1219 | |||
1220 | ret = gpio_request_one(DA850_WLAN_IRQ, GPIOF_IN, "wl12xx_irq"); | ||
1221 | if (ret) { | ||
1222 | pr_err("Could not request wl12xx irq gpio: %d\n", ret); | ||
1223 | goto free_wlan_en; | ||
1224 | } | ||
1225 | |||
1226 | da850_wl12xx_wlan_data.irq = gpio_to_irq(DA850_WLAN_IRQ); | ||
1227 | |||
1228 | ret = wl12xx_set_platform_data(&da850_wl12xx_wlan_data); | ||
1229 | if (ret) { | ||
1230 | pr_err("Could not set wl12xx data: %d\n", ret); | ||
1231 | goto free_wlan_irq; | ||
1232 | } | ||
1233 | |||
1234 | return 0; | ||
1235 | |||
1236 | free_wlan_irq: | ||
1237 | gpio_free(DA850_WLAN_IRQ); | ||
1238 | |||
1239 | free_wlan_en: | ||
1240 | gpio_free(DA850_WLAN_EN); | ||
1241 | |||
1242 | exit: | ||
1243 | return ret; | ||
1244 | } | ||
1245 | |||
1246 | #else /* CONFIG_DA850_WL12XX */ | ||
1247 | |||
1248 | static __init int da850_wl12xx_init(void) | ||
1249 | { | ||
1250 | return 0; | ||
1251 | } | ||
1252 | |||
1253 | #endif /* CONFIG_DA850_WL12XX */ | ||
1254 | |||
1146 | #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) | 1255 | #define DA850EVM_SATA_REFCLKPN_RATE (100 * 1000 * 1000) |
1147 | 1256 | ||
1148 | static __init void da850_evm_init(void) | 1257 | static __init void da850_evm_init(void) |
@@ -1197,6 +1306,11 @@ static __init void da850_evm_init(void) | |||
1197 | if (ret) | 1306 | if (ret) |
1198 | pr_warning("da850_evm_init: mmcsd0 registration failed:" | 1307 | pr_warning("da850_evm_init: mmcsd0 registration failed:" |
1199 | " %d\n", ret); | 1308 | " %d\n", ret); |
1309 | |||
1310 | ret = da850_wl12xx_init(); | ||
1311 | if (ret) | ||
1312 | pr_warning("da850_evm_init: wl12xx initialization" | ||
1313 | " failed: %d\n", ret); | ||
1200 | } | 1314 | } |
1201 | 1315 | ||
1202 | davinci_serial_init(&da850_evm_uart_config); | 1316 | davinci_serial_init(&da850_evm_uart_config); |
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c index 4aae01576aab..b047f8702278 100644 --- a/arch/arm/mach-davinci/da850.c +++ b/arch/arm/mach-davinci/da850.c | |||
@@ -536,6 +536,13 @@ static const struct mux_config da850_pins[] = { | |||
536 | MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false) | 536 | MUX_CFG(DA850, MMCSD0_DAT_3, 10, 20, 15, 2, false) |
537 | MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false) | 537 | MUX_CFG(DA850, MMCSD0_CLK, 10, 0, 15, 2, false) |
538 | MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false) | 538 | MUX_CFG(DA850, MMCSD0_CMD, 10, 4, 15, 2, false) |
539 | /* MMC/SD1 function */ | ||
540 | MUX_CFG(DA850, MMCSD1_DAT_0, 18, 8, 15, 2, false) | ||
541 | MUX_CFG(DA850, MMCSD1_DAT_1, 19, 16, 15, 2, false) | ||
542 | MUX_CFG(DA850, MMCSD1_DAT_2, 19, 12, 15, 2, false) | ||
543 | MUX_CFG(DA850, MMCSD1_DAT_3, 19, 8, 15, 2, false) | ||
544 | MUX_CFG(DA850, MMCSD1_CLK, 18, 12, 15, 2, false) | ||
545 | MUX_CFG(DA850, MMCSD1_CMD, 18, 16, 15, 2, false) | ||
539 | /* EMIF2.5/EMIFA function */ | 546 | /* EMIF2.5/EMIFA function */ |
540 | MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false) | 547 | MUX_CFG(DA850, EMA_D_7, 9, 0, 15, 1, false) |
541 | MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false) | 548 | MUX_CFG(DA850, EMA_D_6, 9, 4, 15, 1, false) |
@@ -594,6 +601,8 @@ static const struct mux_config da850_pins[] = { | |||
594 | MUX_CFG(DA850, GPIO3_13, 7, 8, 15, 8, false) | 601 | MUX_CFG(DA850, GPIO3_13, 7, 8, 15, 8, false) |
595 | MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) | 602 | MUX_CFG(DA850, GPIO4_0, 10, 28, 15, 8, false) |
596 | MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) | 603 | MUX_CFG(DA850, GPIO4_1, 10, 24, 15, 8, false) |
604 | MUX_CFG(DA850, GPIO6_9, 13, 24, 15, 8, false) | ||
605 | MUX_CFG(DA850, GPIO6_10, 13, 20, 15, 8, false) | ||
597 | MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false) | 606 | MUX_CFG(DA850, GPIO6_13, 13, 8, 15, 8, false) |
598 | MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) | 607 | MUX_CFG(DA850, RTC_ALARM, 0, 28, 15, 2, false) |
599 | #endif | 608 | #endif |
diff --git a/arch/arm/mach-davinci/include/mach/mmc.h b/arch/arm/mach-davinci/include/mach/mmc.h index d4f1e9675069..5ba6b22ce338 100644 --- a/arch/arm/mach-davinci/include/mach/mmc.h +++ b/arch/arm/mach-davinci/include/mach/mmc.h | |||
@@ -12,6 +12,9 @@ struct davinci_mmc_config { | |||
12 | /* get_cd()/get_wp() may sleep */ | 12 | /* get_cd()/get_wp() may sleep */ |
13 | int (*get_cd)(int module); | 13 | int (*get_cd)(int module); |
14 | int (*get_ro)(int module); | 14 | int (*get_ro)(int module); |
15 | |||
16 | void (*set_power)(int module, bool on); | ||
17 | |||
15 | /* wires == 0 is equivalent to wires == 4 (4-bit parallel) */ | 18 | /* wires == 0 is equivalent to wires == 4 (4-bit parallel) */ |
16 | u8 wires; | 19 | u8 wires; |
17 | 20 | ||
diff --git a/arch/arm/mach-davinci/include/mach/mux.h b/arch/arm/mach-davinci/include/mach/mux.h index 5d4e0fed828a..a7e92fca32e6 100644 --- a/arch/arm/mach-davinci/include/mach/mux.h +++ b/arch/arm/mach-davinci/include/mach/mux.h | |||
@@ -857,6 +857,14 @@ enum davinci_da850_index { | |||
857 | DA850_MMCSD0_CLK, | 857 | DA850_MMCSD0_CLK, |
858 | DA850_MMCSD0_CMD, | 858 | DA850_MMCSD0_CMD, |
859 | 859 | ||
860 | /* MMC/SD1 function */ | ||
861 | DA850_MMCSD1_DAT_0, | ||
862 | DA850_MMCSD1_DAT_1, | ||
863 | DA850_MMCSD1_DAT_2, | ||
864 | DA850_MMCSD1_DAT_3, | ||
865 | DA850_MMCSD1_CLK, | ||
866 | DA850_MMCSD1_CMD, | ||
867 | |||
860 | /* EMIF2.5/EMIFA function */ | 868 | /* EMIF2.5/EMIFA function */ |
861 | DA850_EMA_D_7, | 869 | DA850_EMA_D_7, |
862 | DA850_EMA_D_6, | 870 | DA850_EMA_D_6, |
@@ -916,6 +924,8 @@ enum davinci_da850_index { | |||
916 | DA850_GPIO3_13, | 924 | DA850_GPIO3_13, |
917 | DA850_GPIO4_0, | 925 | DA850_GPIO4_0, |
918 | DA850_GPIO4_1, | 926 | DA850_GPIO4_1, |
927 | DA850_GPIO6_9, | ||
928 | DA850_GPIO6_10, | ||
919 | DA850_GPIO6_13, | 929 | DA850_GPIO6_13, |
920 | DA850_RTC_ALARM, | 930 | DA850_RTC_ALARM, |
921 | }; | 931 | }; |
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig index e9c2968005dc..e605900ffe1d 100644 --- a/arch/arm/mach-imx/Kconfig +++ b/arch/arm/mach-imx/Kconfig | |||
@@ -5,6 +5,18 @@ config IMX_HAVE_DMA_V1 | |||
5 | # Some usages assume that having one of them implies not having (e.g.) ARCH_MX2. | 5 | # Some usages assume that having one of them implies not having (e.g.) ARCH_MX2. |
6 | # To easily distinguish good and reviewed from unreviewed usages new (and IMHO | 6 | # To easily distinguish good and reviewed from unreviewed usages new (and IMHO |
7 | # more sensible) names are used: SOC_IMX31 and SOC_IMX35 | 7 | # more sensible) names are used: SOC_IMX31 and SOC_IMX35 |
8 | config ARCH_MX1 | ||
9 | bool | ||
10 | |||
11 | config MACH_MX21 | ||
12 | bool | ||
13 | |||
14 | config ARCH_MX25 | ||
15 | bool | ||
16 | |||
17 | config MACH_MX27 | ||
18 | bool | ||
19 | |||
8 | config ARCH_MX31 | 20 | config ARCH_MX31 |
9 | bool | 21 | bool |
10 | 22 | ||
@@ -13,6 +25,7 @@ config ARCH_MX35 | |||
13 | 25 | ||
14 | config SOC_IMX1 | 26 | config SOC_IMX1 |
15 | bool | 27 | bool |
28 | select ARCH_MX1 | ||
16 | select CPU_ARM920T | 29 | select CPU_ARM920T |
17 | select IMX_HAVE_DMA_V1 | 30 | select IMX_HAVE_DMA_V1 |
18 | select IMX_HAVE_IOMUX_V1 | 31 | select IMX_HAVE_IOMUX_V1 |
@@ -20,6 +33,7 @@ config SOC_IMX1 | |||
20 | 33 | ||
21 | config SOC_IMX21 | 34 | config SOC_IMX21 |
22 | bool | 35 | bool |
36 | select MACH_MX21 | ||
23 | select CPU_ARM926T | 37 | select CPU_ARM926T |
24 | select ARCH_MXC_AUDMUX_V1 | 38 | select ARCH_MXC_AUDMUX_V1 |
25 | select IMX_HAVE_DMA_V1 | 39 | select IMX_HAVE_DMA_V1 |
@@ -28,6 +42,7 @@ config SOC_IMX21 | |||
28 | 42 | ||
29 | config SOC_IMX25 | 43 | config SOC_IMX25 |
30 | bool | 44 | bool |
45 | select ARCH_MX25 | ||
31 | select CPU_ARM926T | 46 | select CPU_ARM926T |
32 | select ARCH_MXC_AUDMUX_V2 | 47 | select ARCH_MXC_AUDMUX_V2 |
33 | select ARCH_MXC_IOMUX_V3 | 48 | select ARCH_MXC_IOMUX_V3 |
@@ -35,6 +50,7 @@ config SOC_IMX25 | |||
35 | 50 | ||
36 | config SOC_IMX27 | 51 | config SOC_IMX27 |
37 | bool | 52 | bool |
53 | select MACH_MX27 | ||
38 | select CPU_ARM926T | 54 | select CPU_ARM926T |
39 | select ARCH_MXC_AUDMUX_V1 | 55 | select ARCH_MXC_AUDMUX_V1 |
40 | select IMX_HAVE_DMA_V1 | 56 | select IMX_HAVE_DMA_V1 |
@@ -59,7 +75,7 @@ config SOC_IMX35 | |||
59 | select MXC_AVIC | 75 | select MXC_AVIC |
60 | 76 | ||
61 | 77 | ||
62 | if ARCH_MX1 | 78 | if ARCH_IMX_V4_V5 |
63 | 79 | ||
64 | comment "MX1 platforms:" | 80 | comment "MX1 platforms:" |
65 | config MACH_MXLADS | 81 | config MACH_MXLADS |
@@ -87,30 +103,6 @@ config MACH_APF9328 | |||
87 | help | 103 | help |
88 | Say Yes here if you are using the Armadeus APF9328 development board | 104 | Say Yes here if you are using the Armadeus APF9328 development board |
89 | 105 | ||
90 | endif | ||
91 | |||
92 | if ARCH_MX2 | ||
93 | |||
94 | choice | ||
95 | prompt "CPUs:" | ||
96 | default MACH_MX21 | ||
97 | |||
98 | config MACH_MX21 | ||
99 | bool "i.MX21 support" | ||
100 | help | ||
101 | This enables support for Freescale's MX2 based i.MX21 processor. | ||
102 | |||
103 | config MACH_MX27 | ||
104 | bool "i.MX27 support" | ||
105 | help | ||
106 | This enables support for Freescale's MX2 based i.MX27 processor. | ||
107 | |||
108 | endchoice | ||
109 | |||
110 | endif | ||
111 | |||
112 | if MACH_MX21 | ||
113 | |||
114 | comment "MX21 platforms:" | 106 | comment "MX21 platforms:" |
115 | 107 | ||
116 | config MACH_MX21ADS | 108 | config MACH_MX21ADS |
@@ -124,15 +116,12 @@ config MACH_MX21ADS | |||
124 | Include support for MX21ADS platform. This includes specific | 116 | Include support for MX21ADS platform. This includes specific |
125 | configurations for the board and its peripherals. | 117 | configurations for the board and its peripherals. |
126 | 118 | ||
127 | endif | ||
128 | |||
129 | if ARCH_MX25 | ||
130 | |||
131 | comment "MX25 platforms:" | 119 | comment "MX25 platforms:" |
132 | 120 | ||
133 | config MACH_MX25_3DS | 121 | config MACH_MX25_3DS |
134 | bool "Support MX25PDK (3DS) Platform" | 122 | bool "Support MX25PDK (3DS) Platform" |
135 | select SOC_IMX25 | 123 | select SOC_IMX25 |
124 | select IMX_HAVE_PLATFORM_FLEXCAN | ||
136 | select IMX_HAVE_PLATFORM_FSL_USB2_UDC | 125 | select IMX_HAVE_PLATFORM_FSL_USB2_UDC |
137 | select IMX_HAVE_PLATFORM_IMX2_WDT | 126 | select IMX_HAVE_PLATFORM_IMX2_WDT |
138 | select IMX_HAVE_PLATFORM_IMXDI_RTC | 127 | select IMX_HAVE_PLATFORM_IMXDI_RTC |
@@ -174,10 +163,6 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD | |||
174 | 163 | ||
175 | endchoice | 164 | endchoice |
176 | 165 | ||
177 | endif | ||
178 | |||
179 | if MACH_MX27 | ||
180 | |||
181 | comment "MX27 platforms:" | 166 | comment "MX27 platforms:" |
182 | 167 | ||
183 | config MACH_MX27ADS | 168 | config MACH_MX27ADS |
@@ -486,6 +471,7 @@ config MACH_QONG | |||
486 | bool "Support Dave/DENX QongEVB-LITE platform" | 471 | bool "Support Dave/DENX QongEVB-LITE platform" |
487 | select SOC_IMX31 | 472 | select SOC_IMX31 |
488 | select IMX_HAVE_PLATFORM_IMX_UART | 473 | select IMX_HAVE_PLATFORM_IMX_UART |
474 | select IMX_HAVE_PLATFORM_IMX2_WDT | ||
489 | help | 475 | help |
490 | Include support for Dave/DENX QongEVB-LITE platform. This includes | 476 | Include support for Dave/DENX QongEVB-LITE platform. This includes |
491 | specific configurations for the board and its peripherals. | 477 | specific configurations for the board and its peripherals. |
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile index 6cc821384ccd..116d4b2d2817 100644 --- a/arch/arm/mach-imx/Makefile +++ b/arch/arm/mach-imx/Makefile | |||
@@ -3,7 +3,7 @@ obj-$(CONFIG_IMX_HAVE_DMA_V1) += dma-v1.o | |||
3 | obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o | 3 | obj-$(CONFIG_SOC_IMX1) += clock-imx1.o mm-imx1.o |
4 | obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o | 4 | obj-$(CONFIG_SOC_IMX21) += clock-imx21.o mm-imx21.o |
5 | 5 | ||
6 | obj-$(CONFIG_SOC_IMX25) += clock-imx25.o mm-imx25.o ehci-imx25.o | 6 | obj-$(CONFIG_SOC_IMX25) += clock-imx25.o mm-imx25.o ehci-imx25.o cpu-imx25.o |
7 | 7 | ||
8 | obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o | 8 | obj-$(CONFIG_SOC_IMX27) += cpu-imx27.o pm-imx27.o |
9 | obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o | 9 | obj-$(CONFIG_SOC_IMX27) += clock-imx27.o mm-imx27.o ehci-imx27.o |
diff --git a/arch/arm/mach-imx/clock-imx25.c b/arch/arm/mach-imx/clock-imx25.c index e63e23504fe5..b0fec74c8c91 100644 --- a/arch/arm/mach-imx/clock-imx25.c +++ b/arch/arm/mach-imx/clock-imx25.c | |||
@@ -263,6 +263,7 @@ DEFINE_CLOCK(audmux_clk, 0, CCM_CGCR1, 0, NULL, NULL, NULL); | |||
263 | DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); | 263 | DEFINE_CLOCK(csi_clk, 0, CCM_CGCR1, 4, get_rate_csi, NULL, &csi_per_clk); |
264 | DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); | 264 | DEFINE_CLOCK(can1_clk, 0, CCM_CGCR1, 2, get_rate_ipg, NULL, NULL); |
265 | DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL); | 265 | DEFINE_CLOCK(can2_clk, 1, CCM_CGCR1, 3, get_rate_ipg, NULL, NULL); |
266 | DEFINE_CLOCK(iim_clk, 0, CCM_CGCR1, 26, NULL, NULL, NULL); | ||
266 | 267 | ||
267 | #define _REGISTER_CLOCK(d, n, c) \ | 268 | #define _REGISTER_CLOCK(d, n, c) \ |
268 | { \ | 269 | { \ |
@@ -310,6 +311,7 @@ static struct clk_lookup lookups[] = { | |||
310 | _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) | 311 | _REGISTER_CLOCK("flexcan.1", NULL, can2_clk) |
311 | /* i.mx25 has the i.mx35 type sdma */ | 312 | /* i.mx25 has the i.mx35 type sdma */ |
312 | _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk) | 313 | _REGISTER_CLOCK("imx35-sdma", NULL, sdma_clk) |
314 | _REGISTER_CLOCK(NULL, "iim", iim_clk) | ||
313 | }; | 315 | }; |
314 | 316 | ||
315 | int __init mx25_clocks_init(void) | 317 | int __init mx25_clocks_init(void) |
@@ -334,6 +336,10 @@ int __init mx25_clocks_init(void) | |||
334 | /* Clock source for gpt is ahb_div */ | 336 | /* Clock source for gpt is ahb_div */ |
335 | __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64); | 337 | __raw_writel(__raw_readl(CRM_BASE+0x64) & ~(1 << 5), CRM_BASE + 0x64); |
336 | 338 | ||
339 | clk_enable(&iim_clk); | ||
340 | imx_print_silicon_rev("i.MX25", mx25_revision()); | ||
341 | clk_disable(&iim_clk); | ||
342 | |||
337 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); | 343 | mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54); |
338 | 344 | ||
339 | return 0; | 345 | return 0; |
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c index becc92e0b95d..88fe00a146e3 100644 --- a/arch/arm/mach-imx/clock-imx27.c +++ b/arch/arm/mach-imx/clock-imx27.c | |||
@@ -751,6 +751,8 @@ int __init mx27_clocks_init(unsigned long fref) | |||
751 | clk_enable(&gpio_clk); | 751 | clk_enable(&gpio_clk); |
752 | clk_enable(&emi_clk); | 752 | clk_enable(&emi_clk); |
753 | clk_enable(&iim_clk); | 753 | clk_enable(&iim_clk); |
754 | imx_print_silicon_rev("i.MX27", mx27_revision()); | ||
755 | clk_disable(&iim_clk); | ||
754 | 756 | ||
755 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) | 757 | #if defined(CONFIG_DEBUG_LL) && !defined(CONFIG_DEBUG_ICEDCC) |
756 | clk_enable(&uart1_clk); | 758 | clk_enable(&uart1_clk); |
diff --git a/arch/arm/mach-imx/clock-imx31.c b/arch/arm/mach-imx/clock-imx31.c index 58ea0a857ef4..988a28178d4c 100644 --- a/arch/arm/mach-imx/clock-imx31.c +++ b/arch/arm/mach-imx/clock-imx31.c | |||
@@ -611,11 +611,11 @@ int __init mx31_clocks_init(unsigned long fref) | |||
611 | clk_enable(&gpt_clk); | 611 | clk_enable(&gpt_clk); |
612 | clk_enable(&emi_clk); | 612 | clk_enable(&emi_clk); |
613 | clk_enable(&iim_clk); | 613 | clk_enable(&iim_clk); |
614 | mx31_revision(); | ||
615 | clk_disable(&iim_clk); | ||
614 | 616 | ||
615 | clk_enable(&serial_pll_clk); | 617 | clk_enable(&serial_pll_clk); |
616 | 618 | ||
617 | mx31_read_cpu_rev(); | ||
618 | |||
619 | if (mx31_revision() >= IMX_CHIP_REVISION_2_0) { | 619 | if (mx31_revision() >= IMX_CHIP_REVISION_2_0) { |
620 | reg = __raw_readl(MXC_CCM_PMCR1); | 620 | reg = __raw_readl(MXC_CCM_PMCR1); |
621 | /* No PLL restart on DVFS switch; enable auto EMI handshake */ | 621 | /* No PLL restart on DVFS switch; enable auto EMI handshake */ |
diff --git a/arch/arm/mach-imx/clock-imx35.c b/arch/arm/mach-imx/clock-imx35.c index c39f5c3e20b4..8116f119517d 100644 --- a/arch/arm/mach-imx/clock-imx35.c +++ b/arch/arm/mach-imx/clock-imx35.c | |||
@@ -537,7 +537,8 @@ int __init mx35_clocks_init() | |||
537 | __raw_writel(cgr3, CCM_BASE + CCM_CGR3); | 537 | __raw_writel(cgr3, CCM_BASE + CCM_CGR3); |
538 | 538 | ||
539 | clk_enable(&iim_clk); | 539 | clk_enable(&iim_clk); |
540 | mx35_read_cpu_rev(); | 540 | imx_print_silicon_rev("i.MX35", mx35_revision()); |
541 | clk_disable(&iim_clk); | ||
541 | 542 | ||
542 | #ifdef CONFIG_MXC_USE_EPIT | 543 | #ifdef CONFIG_MXC_USE_EPIT |
543 | epit_timer_init(&epit1_clk, | 544 | epit_timer_init(&epit1_clk, |
diff --git a/arch/arm/mach-imx/cpu-imx25.c b/arch/arm/mach-imx/cpu-imx25.c new file mode 100644 index 000000000000..6914bcbf84e4 --- /dev/null +++ b/arch/arm/mach-imx/cpu-imx25.c | |||
@@ -0,0 +1,41 @@ | |||
1 | /* | ||
2 | * MX25 CPU type detection | ||
3 | * | ||
4 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | ||
5 | * Copyright (C) 2011 Freescale Semiconductor, Inc. All Rights Reserved | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | #include <linux/module.h> | ||
13 | #include <linux/io.h> | ||
14 | #include <mach/hardware.h> | ||
15 | #include <mach/iim.h> | ||
16 | |||
17 | static int mx25_cpu_rev = -1; | ||
18 | |||
19 | static int mx25_read_cpu_rev(void) | ||
20 | { | ||
21 | u32 rev; | ||
22 | |||
23 | rev = __raw_readl(MX25_IO_ADDRESS(MX25_IIM_BASE_ADDR + MXC_IIMSREV)); | ||
24 | switch (rev) { | ||
25 | case 0x00: | ||
26 | return IMX_CHIP_REVISION_1_0; | ||
27 | case 0x01: | ||
28 | return IMX_CHIP_REVISION_1_1; | ||
29 | default: | ||
30 | return IMX_CHIP_REVISION_UNKNOWN; | ||
31 | } | ||
32 | } | ||
33 | |||
34 | int mx25_revision(void) | ||
35 | { | ||
36 | if (mx25_cpu_rev == -1) | ||
37 | mx25_cpu_rev = mx25_read_cpu_rev(); | ||
38 | |||
39 | return mx25_cpu_rev; | ||
40 | } | ||
41 | EXPORT_SYMBOL(mx25_revision); | ||
diff --git a/arch/arm/mach-imx/cpu-imx27.c b/arch/arm/mach-imx/cpu-imx27.c index 3b117be37bd2..ff38e1505f67 100644 --- a/arch/arm/mach-imx/cpu-imx27.c +++ b/arch/arm/mach-imx/cpu-imx27.c | |||
@@ -26,12 +26,12 @@ | |||
26 | 26 | ||
27 | #include <mach/hardware.h> | 27 | #include <mach/hardware.h> |
28 | 28 | ||
29 | static int cpu_silicon_rev = -1; | 29 | static int mx27_cpu_rev = -1; |
30 | static int cpu_partnumber; | 30 | static int mx27_cpu_partnumber; |
31 | 31 | ||
32 | #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ | 32 | #define SYS_CHIP_ID 0x00 /* The offset of CHIP ID register */ |
33 | 33 | ||
34 | static void query_silicon_parameter(void) | 34 | static int mx27_read_cpu_rev(void) |
35 | { | 35 | { |
36 | u32 val; | 36 | u32 val; |
37 | /* | 37 | /* |
@@ -42,20 +42,18 @@ static void query_silicon_parameter(void) | |||
42 | val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR | 42 | val = __raw_readl(MX27_IO_ADDRESS(MX27_SYSCTRL_BASE_ADDR |
43 | + SYS_CHIP_ID)); | 43 | + SYS_CHIP_ID)); |
44 | 44 | ||
45 | mx27_cpu_partnumber = (int)((val >> 12) & 0xFFFF); | ||
46 | |||
45 | switch (val >> 28) { | 47 | switch (val >> 28) { |
46 | case 0: | 48 | case 0: |
47 | cpu_silicon_rev = IMX_CHIP_REVISION_1_0; | 49 | return IMX_CHIP_REVISION_1_0; |
48 | break; | ||
49 | case 1: | 50 | case 1: |
50 | cpu_silicon_rev = IMX_CHIP_REVISION_2_0; | 51 | return IMX_CHIP_REVISION_2_0; |
51 | break; | ||
52 | case 2: | 52 | case 2: |
53 | cpu_silicon_rev = IMX_CHIP_REVISION_2_1; | 53 | return IMX_CHIP_REVISION_2_1; |
54 | break; | ||
55 | default: | 54 | default: |
56 | cpu_silicon_rev = IMX_CHIP_REVISION_UNKNOWN; | 55 | return IMX_CHIP_REVISION_UNKNOWN; |
57 | } | 56 | } |
58 | cpu_partnumber = (int)((val >> 12) & 0xFFFF); | ||
59 | } | 57 | } |
60 | 58 | ||
61 | /* | 59 | /* |
@@ -65,12 +63,12 @@ static void query_silicon_parameter(void) | |||
65 | */ | 63 | */ |
66 | int mx27_revision(void) | 64 | int mx27_revision(void) |
67 | { | 65 | { |
68 | if (cpu_silicon_rev == -1) | 66 | if (mx27_cpu_rev == -1) |
69 | query_silicon_parameter(); | 67 | mx27_cpu_rev = mx27_read_cpu_rev(); |
70 | 68 | ||
71 | if (cpu_partnumber != 0x8821) | 69 | if (mx27_cpu_partnumber != 0x8821) |
72 | return -EINVAL; | 70 | return -EINVAL; |
73 | 71 | ||
74 | return cpu_silicon_rev; | 72 | return mx27_cpu_rev; |
75 | } | 73 | } |
76 | EXPORT_SYMBOL(mx27_revision); | 74 | EXPORT_SYMBOL(mx27_revision); |
diff --git a/arch/arm/mach-imx/cpu-imx31.c b/arch/arm/mach-imx/cpu-imx31.c index a3780700a882..3f2345f0cdaf 100644 --- a/arch/arm/mach-imx/cpu-imx31.c +++ b/arch/arm/mach-imx/cpu-imx31.c | |||
@@ -13,45 +13,50 @@ | |||
13 | #include <linux/io.h> | 13 | #include <linux/io.h> |
14 | #include <mach/hardware.h> | 14 | #include <mach/hardware.h> |
15 | #include <mach/iim.h> | 15 | #include <mach/iim.h> |
16 | #include <mach/common.h> | ||
16 | 17 | ||
17 | unsigned int mx31_cpu_rev; | 18 | static int mx31_cpu_rev = -1; |
18 | EXPORT_SYMBOL(mx31_cpu_rev); | ||
19 | 19 | ||
20 | static struct { | 20 | static struct { |
21 | u8 srev; | 21 | u8 srev; |
22 | const char *name; | 22 | const char *name; |
23 | const char *v; | ||
24 | unsigned int rev; | 23 | unsigned int rev; |
25 | } mx31_cpu_type[] __initdata = { | 24 | } mx31_cpu_type[] = { |
26 | { .srev = 0x00, .name = "i.MX31(L)", .v = "1.0", .rev = IMX_CHIP_REVISION_1_0 }, | 25 | { .srev = 0x00, .name = "i.MX31(L)", .rev = IMX_CHIP_REVISION_1_0 }, |
27 | { .srev = 0x10, .name = "i.MX31", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, | 26 | { .srev = 0x10, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 }, |
28 | { .srev = 0x11, .name = "i.MX31L", .v = "1.1", .rev = IMX_CHIP_REVISION_1_1 }, | 27 | { .srev = 0x11, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 }, |
29 | { .srev = 0x12, .name = "i.MX31", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, | 28 | { .srev = 0x12, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_1 }, |
30 | { .srev = 0x13, .name = "i.MX31L", .v = "1.15", .rev = IMX_CHIP_REVISION_1_1 }, | 29 | { .srev = 0x13, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_1 }, |
31 | { .srev = 0x14, .name = "i.MX31", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, | 30 | { .srev = 0x14, .name = "i.MX31", .rev = IMX_CHIP_REVISION_1_2 }, |
32 | { .srev = 0x15, .name = "i.MX31L", .v = "1.2", .rev = IMX_CHIP_REVISION_1_2 }, | 31 | { .srev = 0x15, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_1_2 }, |
33 | { .srev = 0x28, .name = "i.MX31", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, | 32 | { .srev = 0x28, .name = "i.MX31", .rev = IMX_CHIP_REVISION_2_0 }, |
34 | { .srev = 0x29, .name = "i.MX31L", .v = "2.0", .rev = IMX_CHIP_REVISION_2_0 }, | 33 | { .srev = 0x29, .name = "i.MX31L", .rev = IMX_CHIP_REVISION_2_0 }, |
35 | }; | 34 | }; |
36 | 35 | ||
37 | void __init mx31_read_cpu_rev(void) | 36 | static int mx31_read_cpu_rev(void) |
38 | { | 37 | { |
39 | u32 i, srev; | 38 | u32 i, srev; |
40 | 39 | ||
41 | /* read SREV register from IIM module */ | 40 | /* read SREV register from IIM module */ |
42 | srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV)); | 41 | srev = __raw_readl(MX31_IO_ADDRESS(MX31_IIM_BASE_ADDR + MXC_IIMSREV)); |
42 | srev &= 0xff; | ||
43 | 43 | ||
44 | for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) | 44 | for (i = 0; i < ARRAY_SIZE(mx31_cpu_type); i++) |
45 | if (srev == mx31_cpu_type[i].srev) { | 45 | if (srev == mx31_cpu_type[i].srev) { |
46 | printk(KERN_INFO | 46 | imx_print_silicon_rev(mx31_cpu_type[i].name, |
47 | "CPU identified as %s, silicon rev %s\n", | 47 | mx31_cpu_type[i].rev); |
48 | mx31_cpu_type[i].name, mx31_cpu_type[i].v); | 48 | return mx31_cpu_type[i].rev; |
49 | |||
50 | mx31_cpu_rev = mx31_cpu_type[i].rev; | ||
51 | return; | ||
52 | } | 49 | } |
53 | 50 | ||
54 | mx31_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; | 51 | imx_print_silicon_rev("i.MX31", IMX_CHIP_REVISION_UNKNOWN); |
52 | return IMX_CHIP_REVISION_UNKNOWN; | ||
53 | } | ||
54 | |||
55 | int mx31_revision(void) | ||
56 | { | ||
57 | if (mx31_cpu_rev == -1) | ||
58 | mx31_cpu_rev = mx31_read_cpu_rev(); | ||
55 | 59 | ||
56 | printk(KERN_WARNING "Unknown CPU identifier. srev = %02x\n", srev); | 60 | return mx31_cpu_rev; |
57 | } | 61 | } |
62 | EXPORT_SYMBOL(mx31_revision); | ||
diff --git a/arch/arm/mach-imx/cpu-imx35.c b/arch/arm/mach-imx/cpu-imx35.c index 6637cd819ecb..846e46eb8cbf 100644 --- a/arch/arm/mach-imx/cpu-imx35.c +++ b/arch/arm/mach-imx/cpu-imx35.c | |||
@@ -13,32 +13,30 @@ | |||
13 | #include <mach/hardware.h> | 13 | #include <mach/hardware.h> |
14 | #include <mach/iim.h> | 14 | #include <mach/iim.h> |
15 | 15 | ||
16 | unsigned int mx35_cpu_rev; | 16 | static int mx35_cpu_rev = -1; |
17 | EXPORT_SYMBOL(mx35_cpu_rev); | ||
18 | 17 | ||
19 | void __init mx35_read_cpu_rev(void) | 18 | static int mx35_read_cpu_rev(void) |
20 | { | 19 | { |
21 | u32 rev; | 20 | u32 rev; |
22 | char *srev; | ||
23 | 21 | ||
24 | rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); | 22 | rev = __raw_readl(MX35_IO_ADDRESS(MX35_IIM_BASE_ADDR + MXC_IIMSREV)); |
25 | switch (rev) { | 23 | switch (rev) { |
26 | case 0x00: | 24 | case 0x00: |
27 | mx35_cpu_rev = IMX_CHIP_REVISION_1_0; | 25 | return IMX_CHIP_REVISION_1_0; |
28 | srev = "1.0"; | ||
29 | break; | ||
30 | case 0x10: | 26 | case 0x10: |
31 | mx35_cpu_rev = IMX_CHIP_REVISION_2_0; | 27 | return IMX_CHIP_REVISION_2_0; |
32 | srev = "2.0"; | ||
33 | break; | ||
34 | case 0x11: | 28 | case 0x11: |
35 | mx35_cpu_rev = IMX_CHIP_REVISION_2_1; | 29 | return IMX_CHIP_REVISION_2_1; |
36 | srev = "2.1"; | ||
37 | break; | ||
38 | default: | 30 | default: |
39 | mx35_cpu_rev = IMX_CHIP_REVISION_UNKNOWN; | 31 | return IMX_CHIP_REVISION_UNKNOWN; |
40 | srev = "unknown"; | ||
41 | } | 32 | } |
33 | } | ||
34 | |||
35 | int mx35_revision(void) | ||
36 | { | ||
37 | if (mx35_cpu_rev == -1) | ||
38 | mx35_cpu_rev = mx35_read_cpu_rev(); | ||
42 | 39 | ||
43 | printk(KERN_INFO "CPU identified as i.MX35, silicon rev %s\n", srev); | 40 | return mx35_cpu_rev; |
44 | } | 41 | } |
42 | EXPORT_SYMBOL(mx35_revision); | ||
diff --git a/arch/arm/mach-imx/mach-apf9328.c b/arch/arm/mach-imx/mach-apf9328.c index a404c89485ca..1e486e67dabb 100644 --- a/arch/arm/mach-imx/mach-apf9328.c +++ b/arch/arm/mach-imx/mach-apf9328.c | |||
@@ -136,6 +136,7 @@ MACHINE_START(APF9328, "Armadeus APF9328") | |||
136 | .map_io = mx1_map_io, | 136 | .map_io = mx1_map_io, |
137 | .init_early = imx1_init_early, | 137 | .init_early = imx1_init_early, |
138 | .init_irq = mx1_init_irq, | 138 | .init_irq = mx1_init_irq, |
139 | .handle_irq = imx1_handle_irq, | ||
139 | .timer = &apf9328_timer, | 140 | .timer = &apf9328_timer, |
140 | .init_machine = apf9328_init, | 141 | .init_machine = apf9328_init, |
141 | MACHINE_END | 142 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-armadillo5x0.c b/arch/arm/mach-imx/mach-armadillo5x0.c index fa2b97df5846..c9a9cf67755e 100644 --- a/arch/arm/mach-imx/mach-armadillo5x0.c +++ b/arch/arm/mach-imx/mach-armadillo5x0.c | |||
@@ -558,6 +558,7 @@ MACHINE_START(ARMADILLO5X0, "Armadillo-500") | |||
558 | .map_io = mx31_map_io, | 558 | .map_io = mx31_map_io, |
559 | .init_early = imx31_init_early, | 559 | .init_early = imx31_init_early, |
560 | .init_irq = mx31_init_irq, | 560 | .init_irq = mx31_init_irq, |
561 | .handle_irq = imx31_handle_irq, | ||
561 | .timer = &armadillo5x0_timer, | 562 | .timer = &armadillo5x0_timer, |
562 | .init_machine = armadillo5x0_init, | 563 | .init_machine = armadillo5x0_init, |
563 | MACHINE_END | 564 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-bug.c b/arch/arm/mach-imx/mach-bug.c index f49470553bdf..313f62ddc1ef 100644 --- a/arch/arm/mach-imx/mach-bug.c +++ b/arch/arm/mach-imx/mach-bug.c | |||
@@ -62,6 +62,7 @@ MACHINE_START(BUG, "BugLabs BUGBase") | |||
62 | .map_io = mx31_map_io, | 62 | .map_io = mx31_map_io, |
63 | .init_early = imx31_init_early, | 63 | .init_early = imx31_init_early, |
64 | .init_irq = mx31_init_irq, | 64 | .init_irq = mx31_init_irq, |
65 | .handle_irq = imx31_handle_irq, | ||
65 | .timer = &bug_timer, | 66 | .timer = &bug_timer, |
66 | .init_machine = bug_board_init, | 67 | .init_machine = bug_board_init, |
67 | MACHINE_END | 68 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-cpuimx27.c b/arch/arm/mach-imx/mach-cpuimx27.c index b1ec2cf53bb0..edb373052576 100644 --- a/arch/arm/mach-imx/mach-cpuimx27.c +++ b/arch/arm/mach-imx/mach-cpuimx27.c | |||
@@ -315,6 +315,7 @@ MACHINE_START(EUKREA_CPUIMX27, "EUKREA CPUIMX27") | |||
315 | .map_io = mx27_map_io, | 315 | .map_io = mx27_map_io, |
316 | .init_early = imx27_init_early, | 316 | .init_early = imx27_init_early, |
317 | .init_irq = mx27_init_irq, | 317 | .init_irq = mx27_init_irq, |
318 | .handle_irq = imx27_handle_irq, | ||
318 | .timer = &eukrea_cpuimx27_timer, | 319 | .timer = &eukrea_cpuimx27_timer, |
319 | .init_machine = eukrea_cpuimx27_init, | 320 | .init_machine = eukrea_cpuimx27_init, |
320 | MACHINE_END | 321 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-cpuimx35.c b/arch/arm/mach-imx/mach-cpuimx35.c index ea6c9c3468a6..66af2e8f7e57 100644 --- a/arch/arm/mach-imx/mach-cpuimx35.c +++ b/arch/arm/mach-imx/mach-cpuimx35.c | |||
@@ -198,6 +198,7 @@ MACHINE_START(EUKREA_CPUIMX35SD, "Eukrea CPUIMX35") | |||
198 | .map_io = mx35_map_io, | 198 | .map_io = mx35_map_io, |
199 | .init_early = imx35_init_early, | 199 | .init_early = imx35_init_early, |
200 | .init_irq = mx35_init_irq, | 200 | .init_irq = mx35_init_irq, |
201 | .handle_irq = imx35_handle_irq, | ||
201 | .timer = &eukrea_cpuimx35_timer, | 202 | .timer = &eukrea_cpuimx35_timer, |
202 | .init_machine = eukrea_cpuimx35_init, | 203 | .init_machine = eukrea_cpuimx35_init, |
203 | MACHINE_END | 204 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c index 9163318e95a2..ab8fbcc472b5 100644 --- a/arch/arm/mach-imx/mach-eukrea_cpuimx25.c +++ b/arch/arm/mach-imx/mach-eukrea_cpuimx25.c | |||
@@ -167,6 +167,7 @@ MACHINE_START(EUKREA_CPUIMX25SD, "Eukrea CPUIMX25") | |||
167 | .map_io = mx25_map_io, | 167 | .map_io = mx25_map_io, |
168 | .init_early = imx25_init_early, | 168 | .init_early = imx25_init_early, |
169 | .init_irq = mx25_init_irq, | 169 | .init_irq = mx25_init_irq, |
170 | .handle_irq = imx25_handle_irq, | ||
170 | .timer = &eukrea_cpuimx25_timer, | 171 | .timer = &eukrea_cpuimx25_timer, |
171 | .init_machine = eukrea_cpuimx25_init, | 172 | .init_machine = eukrea_cpuimx25_init, |
172 | MACHINE_END | 173 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c index 22306ce28658..38eb9e45110b 100644 --- a/arch/arm/mach-imx/mach-imx27_visstrim_m10.c +++ b/arch/arm/mach-imx/mach-imx27_visstrim_m10.c | |||
@@ -279,6 +279,7 @@ MACHINE_START(IMX27_VISSTRIM_M10, "Vista Silicon Visstrim_M10") | |||
279 | .map_io = mx27_map_io, | 279 | .map_io = mx27_map_io, |
280 | .init_early = imx27_init_early, | 280 | .init_early = imx27_init_early, |
281 | .init_irq = mx27_init_irq, | 281 | .init_irq = mx27_init_irq, |
282 | .handle_irq = imx27_handle_irq, | ||
282 | .timer = &visstrim_m10_timer, | 283 | .timer = &visstrim_m10_timer, |
283 | .init_machine = visstrim_m10_board_init, | 284 | .init_machine = visstrim_m10_board_init, |
284 | MACHINE_END | 285 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-imx27ipcam.c b/arch/arm/mach-imx/mach-imx27ipcam.c index 8da48b33fc53..7052155d0557 100644 --- a/arch/arm/mach-imx/mach-imx27ipcam.c +++ b/arch/arm/mach-imx/mach-imx27ipcam.c | |||
@@ -75,6 +75,7 @@ MACHINE_START(IMX27IPCAM, "Freescale IMX27IPCAM") | |||
75 | .map_io = mx27_map_io, | 75 | .map_io = mx27_map_io, |
76 | .init_early = imx27_init_early, | 76 | .init_early = imx27_init_early, |
77 | .init_irq = mx27_init_irq, | 77 | .init_irq = mx27_init_irq, |
78 | .handle_irq = imx27_handle_irq, | ||
78 | .timer = &mx27ipcam_timer, | 79 | .timer = &mx27ipcam_timer, |
79 | .init_machine = mx27ipcam_init, | 80 | .init_machine = mx27ipcam_init, |
80 | MACHINE_END | 81 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-imx27lite.c b/arch/arm/mach-imx/mach-imx27lite.c index 21a14a20e2c3..8d6a63521f17 100644 --- a/arch/arm/mach-imx/mach-imx27lite.c +++ b/arch/arm/mach-imx/mach-imx27lite.c | |||
@@ -81,6 +81,7 @@ MACHINE_START(IMX27LITE, "LogicPD i.MX27LITE") | |||
81 | .map_io = mx27_map_io, | 81 | .map_io = mx27_map_io, |
82 | .init_early = imx27_init_early, | 82 | .init_early = imx27_init_early, |
83 | .init_irq = mx27_init_irq, | 83 | .init_irq = mx27_init_irq, |
84 | .handle_irq = imx27_handle_irq, | ||
84 | .timer = &mx27lite_timer, | 85 | .timer = &mx27lite_timer, |
85 | .init_machine = mx27lite_init, | 86 | .init_machine = mx27lite_init, |
86 | MACHINE_END | 87 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-kzm_arm11_01.c b/arch/arm/mach-imx/mach-kzm_arm11_01.c index 4e030ac58847..5f37f89e40fa 100644 --- a/arch/arm/mach-imx/mach-kzm_arm11_01.c +++ b/arch/arm/mach-imx/mach-kzm_arm11_01.c | |||
@@ -276,6 +276,7 @@ MACHINE_START(KZM_ARM11_01, "Kyoto Microcomputer Co., Ltd. KZM-ARM11-01") | |||
276 | .map_io = kzm_map_io, | 276 | .map_io = kzm_map_io, |
277 | .init_early = imx31_init_early, | 277 | .init_early = imx31_init_early, |
278 | .init_irq = mx31_init_irq, | 278 | .init_irq = mx31_init_irq, |
279 | .handle_irq = imx31_handle_irq, | ||
279 | .timer = &kzm_timer, | 280 | .timer = &kzm_timer, |
280 | .init_machine = kzm_board_init, | 281 | .init_machine = kzm_board_init, |
281 | MACHINE_END | 282 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx1ads.c b/arch/arm/mach-imx/mach-mx1ads.c index b4a5e0382634..fc49785e7340 100644 --- a/arch/arm/mach-imx/mach-mx1ads.c +++ b/arch/arm/mach-imx/mach-mx1ads.c | |||
@@ -144,6 +144,7 @@ MACHINE_START(MX1ADS, "Freescale MX1ADS") | |||
144 | .map_io = mx1_map_io, | 144 | .map_io = mx1_map_io, |
145 | .init_early = imx1_init_early, | 145 | .init_early = imx1_init_early, |
146 | .init_irq = mx1_init_irq, | 146 | .init_irq = mx1_init_irq, |
147 | .handle_irq = imx1_handle_irq, | ||
147 | .timer = &mx1ads_timer, | 148 | .timer = &mx1ads_timer, |
148 | .init_machine = mx1ads_init, | 149 | .init_machine = mx1ads_init, |
149 | MACHINE_END | 150 | MACHINE_END |
@@ -153,6 +154,7 @@ MACHINE_START(MXLADS, "Freescale MXLADS") | |||
153 | .map_io = mx1_map_io, | 154 | .map_io = mx1_map_io, |
154 | .init_early = imx1_init_early, | 155 | .init_early = imx1_init_early, |
155 | .init_irq = mx1_init_irq, | 156 | .init_irq = mx1_init_irq, |
157 | .handle_irq = imx1_handle_irq, | ||
156 | .timer = &mx1ads_timer, | 158 | .timer = &mx1ads_timer, |
157 | .init_machine = mx1ads_init, | 159 | .init_machine = mx1ads_init, |
158 | MACHINE_END | 160 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx21ads.c b/arch/arm/mach-imx/mach-mx21ads.c index e56828da26b2..25f84028d055 100644 --- a/arch/arm/mach-imx/mach-mx21ads.c +++ b/arch/arm/mach-imx/mach-mx21ads.c | |||
@@ -309,6 +309,7 @@ MACHINE_START(MX21ADS, "Freescale i.MX21ADS") | |||
309 | .map_io = mx21ads_map_io, | 309 | .map_io = mx21ads_map_io, |
310 | .init_early = imx21_init_early, | 310 | .init_early = imx21_init_early, |
311 | .init_irq = mx21_init_irq, | 311 | .init_irq = mx21_init_irq, |
312 | .handle_irq = imx21_handle_irq, | ||
312 | .timer = &mx21ads_timer, | 313 | .timer = &mx21ads_timer, |
313 | .init_machine = mx21ads_board_init, | 314 | .init_machine = mx21ads_board_init, |
314 | MACHINE_END | 315 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx25_3ds.c b/arch/arm/mach-imx/mach-mx25_3ds.c index dd25ee82e70a..88dccf122243 100644 --- a/arch/arm/mach-imx/mach-mx25_3ds.c +++ b/arch/arm/mach-imx/mach-mx25_3ds.c | |||
@@ -43,6 +43,8 @@ | |||
43 | 43 | ||
44 | #include "devices-imx25.h" | 44 | #include "devices-imx25.h" |
45 | 45 | ||
46 | #define MX25PDK_CAN_PWDN IMX_GPIO_NR(4, 6) | ||
47 | |||
46 | static const struct imxuart_platform_data uart_pdata __initconst = { | 48 | static const struct imxuart_platform_data uart_pdata __initconst = { |
47 | .flags = IMXUART_HAVE_RTSCTS, | 49 | .flags = IMXUART_HAVE_RTSCTS, |
48 | }; | 50 | }; |
@@ -108,6 +110,11 @@ static iomux_v3_cfg_t mx25pdk_pads[] = { | |||
108 | /* I2C1 */ | 110 | /* I2C1 */ |
109 | MX25_PAD_I2C1_CLK__I2C1_CLK, | 111 | MX25_PAD_I2C1_CLK__I2C1_CLK, |
110 | MX25_PAD_I2C1_DAT__I2C1_DAT, | 112 | MX25_PAD_I2C1_DAT__I2C1_DAT, |
113 | |||
114 | /* CAN1 */ | ||
115 | MX25_PAD_GPIO_A__CAN1_TX, | ||
116 | MX25_PAD_GPIO_B__CAN1_RX, | ||
117 | MX25_PAD_D14__GPIO_4_6, /* CAN_PWDN */ | ||
111 | }; | 118 | }; |
112 | 119 | ||
113 | static const struct fec_platform_data mx25_fec_pdata __initconst = { | 120 | static const struct fec_platform_data mx25_fec_pdata __initconst = { |
@@ -240,6 +247,9 @@ static void __init mx25pdk_init(void) | |||
240 | 247 | ||
241 | imx25_add_sdhci_esdhc_imx(0, &mx25pdk_esdhc_pdata); | 248 | imx25_add_sdhci_esdhc_imx(0, &mx25pdk_esdhc_pdata); |
242 | imx25_add_imx_i2c0(&mx25_3ds_i2c0_data); | 249 | imx25_add_imx_i2c0(&mx25_3ds_i2c0_data); |
250 | |||
251 | gpio_request_one(MX25PDK_CAN_PWDN, GPIOF_OUT_INIT_LOW, "can-pwdn"); | ||
252 | imx25_add_flexcan0(NULL); | ||
243 | } | 253 | } |
244 | 254 | ||
245 | static void __init mx25pdk_timer_init(void) | 255 | static void __init mx25pdk_timer_init(void) |
@@ -257,6 +267,7 @@ MACHINE_START(MX25_3DS, "Freescale MX25PDK (3DS)") | |||
257 | .map_io = mx25_map_io, | 267 | .map_io = mx25_map_io, |
258 | .init_early = imx25_init_early, | 268 | .init_early = imx25_init_early, |
259 | .init_irq = mx25_init_irq, | 269 | .init_irq = mx25_init_irq, |
270 | .handle_irq = imx25_handle_irq, | ||
260 | .timer = &mx25pdk_timer, | 271 | .timer = &mx25pdk_timer, |
261 | .init_machine = mx25pdk_init, | 272 | .init_machine = mx25pdk_init, |
262 | MACHINE_END | 273 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx27_3ds.c b/arch/arm/mach-imx/mach-mx27_3ds.c index 04bc86de2c57..cfa84178eb26 100644 --- a/arch/arm/mach-imx/mach-mx27_3ds.c +++ b/arch/arm/mach-imx/mach-mx27_3ds.c | |||
@@ -423,6 +423,7 @@ MACHINE_START(MX27_3DS, "Freescale MX27PDK") | |||
423 | .map_io = mx27_map_io, | 423 | .map_io = mx27_map_io, |
424 | .init_early = imx27_init_early, | 424 | .init_early = imx27_init_early, |
425 | .init_irq = mx27_init_irq, | 425 | .init_irq = mx27_init_irq, |
426 | .handle_irq = imx27_handle_irq, | ||
426 | .timer = &mx27pdk_timer, | 427 | .timer = &mx27pdk_timer, |
427 | .init_machine = mx27pdk_init, | 428 | .init_machine = mx27pdk_init, |
428 | MACHINE_END | 429 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx27ads.c b/arch/arm/mach-imx/mach-mx27ads.c index 635b0509068b..74dd5731eb61 100644 --- a/arch/arm/mach-imx/mach-mx27ads.c +++ b/arch/arm/mach-imx/mach-mx27ads.c | |||
@@ -348,6 +348,7 @@ MACHINE_START(MX27ADS, "Freescale i.MX27ADS") | |||
348 | .map_io = mx27ads_map_io, | 348 | .map_io = mx27ads_map_io, |
349 | .init_early = imx27_init_early, | 349 | .init_early = imx27_init_early, |
350 | .init_irq = mx27_init_irq, | 350 | .init_irq = mx27_init_irq, |
351 | .handle_irq = imx27_handle_irq, | ||
351 | .timer = &mx27ads_timer, | 352 | .timer = &mx27ads_timer, |
352 | .init_machine = mx27ads_board_init, | 353 | .init_machine = mx27ads_board_init, |
353 | MACHINE_END | 354 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31_3ds.c b/arch/arm/mach-imx/mach-mx31_3ds.c index 0de4d1835ea4..60f1fda6ce97 100644 --- a/arch/arm/mach-imx/mach-mx31_3ds.c +++ b/arch/arm/mach-imx/mach-mx31_3ds.c | |||
@@ -766,6 +766,7 @@ MACHINE_START(MX31_3DS, "Freescale MX31PDK (3DS)") | |||
766 | .map_io = mx31_map_io, | 766 | .map_io = mx31_map_io, |
767 | .init_early = imx31_init_early, | 767 | .init_early = imx31_init_early, |
768 | .init_irq = mx31_init_irq, | 768 | .init_irq = mx31_init_irq, |
769 | .handle_irq = imx31_handle_irq, | ||
769 | .timer = &mx31_3ds_timer, | 770 | .timer = &mx31_3ds_timer, |
770 | .init_machine = mx31_3ds_init, | 771 | .init_machine = mx31_3ds_init, |
771 | .reserve = mx31_3ds_reserve, | 772 | .reserve = mx31_3ds_reserve, |
diff --git a/arch/arm/mach-imx/mach-mx31ads.c b/arch/arm/mach-imx/mach-mx31ads.c index 910c4561d35f..9cc1a49053bb 100644 --- a/arch/arm/mach-imx/mach-mx31ads.c +++ b/arch/arm/mach-imx/mach-mx31ads.c | |||
@@ -539,6 +539,7 @@ MACHINE_START(MX31ADS, "Freescale MX31ADS") | |||
539 | .map_io = mx31ads_map_io, | 539 | .map_io = mx31ads_map_io, |
540 | .init_early = imx31_init_early, | 540 | .init_early = imx31_init_early, |
541 | .init_irq = mx31ads_init_irq, | 541 | .init_irq = mx31ads_init_irq, |
542 | .handle_irq = imx31_handle_irq, | ||
542 | .timer = &mx31ads_timer, | 543 | .timer = &mx31ads_timer, |
543 | .init_machine = mx31ads_init, | 544 | .init_machine = mx31ads_init, |
544 | MACHINE_END | 545 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31lilly.c b/arch/arm/mach-imx/mach-mx31lilly.c index e92eaf91a7be..5defd8e70fc4 100644 --- a/arch/arm/mach-imx/mach-mx31lilly.c +++ b/arch/arm/mach-imx/mach-mx31lilly.c | |||
@@ -299,6 +299,7 @@ MACHINE_START(LILLY1131, "INCO startec LILLY-1131") | |||
299 | .map_io = mx31_map_io, | 299 | .map_io = mx31_map_io, |
300 | .init_early = imx31_init_early, | 300 | .init_early = imx31_init_early, |
301 | .init_irq = mx31_init_irq, | 301 | .init_irq = mx31_init_irq, |
302 | .handle_irq = imx31_handle_irq, | ||
302 | .timer = &mx31lilly_timer, | 303 | .timer = &mx31lilly_timer, |
303 | .init_machine = mx31lilly_board_init, | 304 | .init_machine = mx31lilly_board_init, |
304 | MACHINE_END | 305 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31lite.c b/arch/arm/mach-imx/mach-mx31lite.c index 5242cb78b563..c97c26d814ed 100644 --- a/arch/arm/mach-imx/mach-mx31lite.c +++ b/arch/arm/mach-imx/mach-mx31lite.c | |||
@@ -284,6 +284,7 @@ MACHINE_START(MX31LITE, "LogicPD i.MX31 SOM") | |||
284 | .map_io = mx31lite_map_io, | 284 | .map_io = mx31lite_map_io, |
285 | .init_early = imx31_init_early, | 285 | .init_early = imx31_init_early, |
286 | .init_irq = mx31_init_irq, | 286 | .init_irq = mx31_init_irq, |
287 | .handle_irq = imx31_handle_irq, | ||
287 | .timer = &mx31lite_timer, | 288 | .timer = &mx31lite_timer, |
288 | .init_machine = mx31lite_init, | 289 | .init_machine = mx31lite_init, |
289 | MACHINE_END | 290 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx31moboard.c b/arch/arm/mach-imx/mach-mx31moboard.c index 1d01ef28f25d..fff7791b7e7c 100644 --- a/arch/arm/mach-imx/mach-mx31moboard.c +++ b/arch/arm/mach-imx/mach-mx31moboard.c | |||
@@ -28,6 +28,9 @@ | |||
28 | #include <linux/spi/spi.h> | 28 | #include <linux/spi/spi.h> |
29 | #include <linux/types.h> | 29 | #include <linux/types.h> |
30 | #include <linux/memblock.h> | 30 | #include <linux/memblock.h> |
31 | #include <linux/clk.h> | ||
32 | #include <linux/io.h> | ||
33 | #include <linux/err.h> | ||
31 | 34 | ||
32 | #include <linux/usb/otg.h> | 35 | #include <linux/usb/otg.h> |
33 | #include <linux/usb/ulpi.h> | 36 | #include <linux/usb/ulpi.h> |
@@ -490,6 +493,18 @@ err: | |||
490 | 493 | ||
491 | } | 494 | } |
492 | 495 | ||
496 | static void mx31moboard_poweroff(void) | ||
497 | { | ||
498 | struct clk *clk = clk_get_sys("imx2-wdt.0", NULL); | ||
499 | |||
500 | if (!IS_ERR(clk)) | ||
501 | clk_enable(clk); | ||
502 | |||
503 | mxc_iomux_mode(MX31_PIN_WATCHDOG_RST__WATCHDOG_RST); | ||
504 | |||
505 | __raw_writew(1 << 6 | 1 << 2, MX31_IO_ADDRESS(MX31_WDOG_BASE_ADDR)); | ||
506 | } | ||
507 | |||
493 | static int mx31moboard_baseboard; | 508 | static int mx31moboard_baseboard; |
494 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); | 509 | core_param(mx31moboard_baseboard, mx31moboard_baseboard, int, 0444); |
495 | 510 | ||
@@ -528,6 +543,8 @@ static void __init mx31moboard_init(void) | |||
528 | 543 | ||
529 | moboard_usbh2_init(); | 544 | moboard_usbh2_init(); |
530 | 545 | ||
546 | pm_power_off = mx31moboard_poweroff; | ||
547 | |||
531 | switch (mx31moboard_baseboard) { | 548 | switch (mx31moboard_baseboard) { |
532 | case MX31NOBOARD: | 549 | case MX31NOBOARD: |
533 | break; | 550 | break; |
@@ -572,6 +589,7 @@ MACHINE_START(MX31MOBOARD, "EPFL Mobots mx31moboard") | |||
572 | .map_io = mx31_map_io, | 589 | .map_io = mx31_map_io, |
573 | .init_early = imx31_init_early, | 590 | .init_early = imx31_init_early, |
574 | .init_irq = mx31_init_irq, | 591 | .init_irq = mx31_init_irq, |
592 | .handle_irq = imx31_handle_irq, | ||
575 | .timer = &mx31moboard_timer, | 593 | .timer = &mx31moboard_timer, |
576 | .init_machine = mx31moboard_init, | 594 | .init_machine = mx31moboard_init, |
577 | MACHINE_END | 595 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mx35_3ds.c b/arch/arm/mach-imx/mach-mx35_3ds.c index f2a873dc08ce..7a462025a0f7 100644 --- a/arch/arm/mach-imx/mach-mx35_3ds.c +++ b/arch/arm/mach-imx/mach-mx35_3ds.c | |||
@@ -221,6 +221,7 @@ MACHINE_START(MX35_3DS, "Freescale MX35PDK") | |||
221 | .map_io = mx35_map_io, | 221 | .map_io = mx35_map_io, |
222 | .init_early = imx35_init_early, | 222 | .init_early = imx35_init_early, |
223 | .init_irq = mx35_init_irq, | 223 | .init_irq = mx35_init_irq, |
224 | .handle_irq = imx35_handle_irq, | ||
224 | .timer = &mx35pdk_timer, | 225 | .timer = &mx35pdk_timer, |
225 | .init_machine = mx35_3ds_init, | 226 | .init_machine = mx35_3ds_init, |
226 | MACHINE_END | 227 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-mxt_td60.c b/arch/arm/mach-imx/mach-mxt_td60.c index 5ec3989704fd..125c19643b0f 100644 --- a/arch/arm/mach-imx/mach-mxt_td60.c +++ b/arch/arm/mach-imx/mach-mxt_td60.c | |||
@@ -271,6 +271,7 @@ MACHINE_START(MXT_TD60, "Maxtrack i-MXT TD60") | |||
271 | .map_io = mx27_map_io, | 271 | .map_io = mx27_map_io, |
272 | .init_early = imx27_init_early, | 272 | .init_early = imx27_init_early, |
273 | .init_irq = mx27_init_irq, | 273 | .init_irq = mx27_init_irq, |
274 | .handle_irq = imx27_handle_irq, | ||
274 | .timer = &mxt_td60_timer, | 275 | .timer = &mxt_td60_timer, |
275 | .init_machine = mxt_td60_board_init, | 276 | .init_machine = mxt_td60_board_init, |
276 | MACHINE_END | 277 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pca100.c b/arch/arm/mach-imx/mach-pca100.c index 0f6bd1199038..26072f4b02e3 100644 --- a/arch/arm/mach-imx/mach-pca100.c +++ b/arch/arm/mach-imx/mach-pca100.c | |||
@@ -439,6 +439,7 @@ MACHINE_START(PCA100, "phyCARD-i.MX27") | |||
439 | .map_io = mx27_map_io, | 439 | .map_io = mx27_map_io, |
440 | .init_early = imx27_init_early, | 440 | .init_early = imx27_init_early, |
441 | .init_irq = mx27_init_irq, | 441 | .init_irq = mx27_init_irq, |
442 | .handle_irq = imx27_handle_irq, | ||
442 | .init_machine = pca100_init, | 443 | .init_machine = pca100_init, |
443 | .timer = &pca100_timer, | 444 | .timer = &pca100_timer, |
444 | MACHINE_END | 445 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pcm037.c b/arch/arm/mach-imx/mach-pcm037.c index 186d4eb90796..efd6b536ef6a 100644 --- a/arch/arm/mach-imx/mach-pcm037.c +++ b/arch/arm/mach-imx/mach-pcm037.c | |||
@@ -693,6 +693,7 @@ MACHINE_START(PCM037, "Phytec Phycore pcm037") | |||
693 | .map_io = mx31_map_io, | 693 | .map_io = mx31_map_io, |
694 | .init_early = imx31_init_early, | 694 | .init_early = imx31_init_early, |
695 | .init_irq = mx31_init_irq, | 695 | .init_irq = mx31_init_irq, |
696 | .handle_irq = imx31_handle_irq, | ||
696 | .timer = &pcm037_timer, | 697 | .timer = &pcm037_timer, |
697 | .init_machine = pcm037_init, | 698 | .init_machine = pcm037_init, |
698 | MACHINE_END | 699 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pcm038.c b/arch/arm/mach-imx/mach-pcm038.c index a497a2997002..100bc733ce93 100644 --- a/arch/arm/mach-imx/mach-pcm038.c +++ b/arch/arm/mach-imx/mach-pcm038.c | |||
@@ -355,6 +355,7 @@ MACHINE_START(PCM038, "phyCORE-i.MX27") | |||
355 | .map_io = mx27_map_io, | 355 | .map_io = mx27_map_io, |
356 | .init_early = imx27_init_early, | 356 | .init_early = imx27_init_early, |
357 | .init_irq = mx27_init_irq, | 357 | .init_irq = mx27_init_irq, |
358 | .handle_irq = imx27_handle_irq, | ||
358 | .timer = &pcm038_timer, | 359 | .timer = &pcm038_timer, |
359 | .init_machine = pcm038_init, | 360 | .init_machine = pcm038_init, |
360 | MACHINE_END | 361 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-pcm043.c b/arch/arm/mach-imx/mach-pcm043.c index 0a4d31de7738..7366c2ae3ea5 100644 --- a/arch/arm/mach-imx/mach-pcm043.c +++ b/arch/arm/mach-imx/mach-pcm043.c | |||
@@ -422,6 +422,7 @@ MACHINE_START(PCM043, "Phytec Phycore pcm043") | |||
422 | .map_io = mx35_map_io, | 422 | .map_io = mx35_map_io, |
423 | .init_early = imx35_init_early, | 423 | .init_early = imx35_init_early, |
424 | .init_irq = mx35_init_irq, | 424 | .init_irq = mx35_init_irq, |
425 | .handle_irq = imx35_handle_irq, | ||
425 | .timer = &pcm043_timer, | 426 | .timer = &pcm043_timer, |
426 | .init_machine = pcm043_init, | 427 | .init_machine = pcm043_init, |
427 | MACHINE_END | 428 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-qong.c b/arch/arm/mach-imx/mach-qong.c index c33ab00845f6..4ff5faf102a8 100644 --- a/arch/arm/mach-imx/mach-qong.c +++ b/arch/arm/mach-imx/mach-qong.c | |||
@@ -252,6 +252,7 @@ static void __init qong_init(void) | |||
252 | mxc_init_imx_uart(); | 252 | mxc_init_imx_uart(); |
253 | qong_init_nor_mtd(); | 253 | qong_init_nor_mtd(); |
254 | qong_init_fpga(); | 254 | qong_init_fpga(); |
255 | imx31_add_imx2_wdt(NULL); | ||
255 | } | 256 | } |
256 | 257 | ||
257 | static void __init qong_timer_init(void) | 258 | static void __init qong_timer_init(void) |
@@ -269,6 +270,7 @@ MACHINE_START(QONG, "Dave/DENX QongEVB-LITE") | |||
269 | .map_io = mx31_map_io, | 270 | .map_io = mx31_map_io, |
270 | .init_early = imx31_init_early, | 271 | .init_early = imx31_init_early, |
271 | .init_irq = mx31_init_irq, | 272 | .init_irq = mx31_init_irq, |
273 | .handle_irq = imx31_handle_irq, | ||
272 | .timer = &qong_timer, | 274 | .timer = &qong_timer, |
273 | .init_machine = qong_init, | 275 | .init_machine = qong_init, |
274 | MACHINE_END | 276 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-scb9328.c b/arch/arm/mach-imx/mach-scb9328.c index 85d32845ee1e..bb6e5b25d8d0 100644 --- a/arch/arm/mach-imx/mach-scb9328.c +++ b/arch/arm/mach-imx/mach-scb9328.c | |||
@@ -141,6 +141,7 @@ MACHINE_START(SCB9328, "Synertronixx scb9328") | |||
141 | .map_io = mx1_map_io, | 141 | .map_io = mx1_map_io, |
142 | .init_early = imx1_init_early, | 142 | .init_early = imx1_init_early, |
143 | .init_irq = mx1_init_irq, | 143 | .init_irq = mx1_init_irq, |
144 | .handle_irq = imx1_handle_irq, | ||
144 | .timer = &scb9328_timer, | 145 | .timer = &scb9328_timer, |
145 | .init_machine = scb9328_init, | 146 | .init_machine = scb9328_init, |
146 | MACHINE_END | 147 | MACHINE_END |
diff --git a/arch/arm/mach-imx/mach-vpr200.c b/arch/arm/mach-imx/mach-vpr200.c index 5250283479e7..69092458f2d9 100644 --- a/arch/arm/mach-imx/mach-vpr200.c +++ b/arch/arm/mach-imx/mach-vpr200.c | |||
@@ -319,6 +319,7 @@ MACHINE_START(VPR200, "VPR200") | |||
319 | .map_io = mx35_map_io, | 319 | .map_io = mx35_map_io, |
320 | .init_early = imx35_init_early, | 320 | .init_early = imx35_init_early, |
321 | .init_irq = mx35_init_irq, | 321 | .init_irq = mx35_init_irq, |
322 | .handle_irq = imx35_handle_irq, | ||
322 | .timer = &vpr200_timer, | 323 | .timer = &vpr200_timer, |
323 | .init_machine = vpr200_board_init, | 324 | .init_machine = vpr200_board_init, |
324 | MACHINE_END | 325 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig index 5e42c73881a5..3d4c31306ca7 100644 --- a/arch/arm/mach-mx5/Kconfig +++ b/arch/arm/mach-mx5/Kconfig | |||
@@ -1,8 +1,9 @@ | |||
1 | if ARCH_MX503 || ARCH_MX51 | 1 | if ARCH_MX5 |
2 | |||
2 | # ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single | 3 | # ARCH_MX5/50/53 are left to mark places where prevent multi-soc in single |
3 | # image. So for most time, SOC_IMX50/51/53 should be used. | 4 | # image. So for most time, SOC_IMX50/51/53 should be used. |
4 | 5 | ||
5 | config ARCH_MX5 | 6 | config ARCH_MX51 |
6 | bool | 7 | bool |
7 | 8 | ||
8 | config ARCH_MX50 | 9 | config ARCH_MX50 |
@@ -19,7 +20,6 @@ config SOC_IMX50 | |||
19 | select ARCH_MXC_IOMUX_V3 | 20 | select ARCH_MXC_IOMUX_V3 |
20 | select ARCH_MXC_AUDMUX_V2 | 21 | select ARCH_MXC_AUDMUX_V2 |
21 | select ARCH_HAS_CPUFREQ | 22 | select ARCH_HAS_CPUFREQ |
22 | select ARCH_MX5 | ||
23 | select ARCH_MX50 | 23 | select ARCH_MX50 |
24 | 24 | ||
25 | config SOC_IMX51 | 25 | config SOC_IMX51 |
@@ -30,7 +30,7 @@ config SOC_IMX51 | |||
30 | select ARCH_MXC_IOMUX_V3 | 30 | select ARCH_MXC_IOMUX_V3 |
31 | select ARCH_MXC_AUDMUX_V2 | 31 | select ARCH_MXC_AUDMUX_V2 |
32 | select ARCH_HAS_CPUFREQ | 32 | select ARCH_HAS_CPUFREQ |
33 | select ARCH_MX5 | 33 | select ARCH_MX51 |
34 | 34 | ||
35 | config SOC_IMX53 | 35 | config SOC_IMX53 |
36 | bool | 36 | bool |
@@ -38,10 +38,8 @@ config SOC_IMX53 | |||
38 | select ARM_L1_CACHE_SHIFT_6 | 38 | select ARM_L1_CACHE_SHIFT_6 |
39 | select MXC_TZIC | 39 | select MXC_TZIC |
40 | select ARCH_MXC_IOMUX_V3 | 40 | select ARCH_MXC_IOMUX_V3 |
41 | select ARCH_MX5 | ||
42 | select ARCH_MX53 | 41 | select ARCH_MX53 |
43 | 42 | ||
44 | if ARCH_MX50_SUPPORTED | ||
45 | #comment "i.MX50 machines:" | 43 | #comment "i.MX50 machines:" |
46 | 44 | ||
47 | config MACH_MX50_RDP | 45 | config MACH_MX50_RDP |
@@ -56,9 +54,6 @@ config MACH_MX50_RDP | |||
56 | Include support for MX50 reference design platform (RDP) board. This | 54 | Include support for MX50 reference design platform (RDP) board. This |
57 | includes specific configurations for the board and its peripherals. | 55 | includes specific configurations for the board and its peripherals. |
58 | 56 | ||
59 | endif # ARCH_MX50_SUPPORTED | ||
60 | |||
61 | if ARCH_MX51 | ||
62 | comment "i.MX51 machines:" | 57 | comment "i.MX51 machines:" |
63 | 58 | ||
64 | config MACH_MX51_BABBAGE | 59 | config MACH_MX51_BABBAGE |
@@ -174,9 +169,6 @@ config MACH_MX51_EFIKASB | |||
174 | Include support for Genesi Efika Smartbook. This includes specific | 169 | Include support for Genesi Efika Smartbook. This includes specific |
175 | configurations for the board and its peripherals. | 170 | configurations for the board and its peripherals. |
176 | 171 | ||
177 | endif # ARCH_MX51 | ||
178 | |||
179 | if ARCH_MX53_SUPPORTED | ||
180 | comment "i.MX53 machines:" | 172 | comment "i.MX53 machines:" |
181 | 173 | ||
182 | config MACH_MX53_EVK | 174 | config MACH_MX53_EVK |
@@ -228,6 +220,4 @@ config MACH_MX53_ARD | |||
228 | Include support for MX53 ARD platform. This includes specific | 220 | Include support for MX53 ARD platform. This includes specific |
229 | configurations for the board and its peripherals. | 221 | configurations for the board and its peripherals. |
230 | 222 | ||
231 | endif # ARCH_MX53_SUPPORTED | ||
232 | |||
233 | endif | 223 | endif |
diff --git a/arch/arm/mach-mx5/board-cpuimx51.c b/arch/arm/mach-mx5/board-cpuimx51.c index 190a6e73ec7b..1fc110348040 100644 --- a/arch/arm/mach-mx5/board-cpuimx51.c +++ b/arch/arm/mach-mx5/board-cpuimx51.c | |||
@@ -294,6 +294,7 @@ MACHINE_START(EUKREA_CPUIMX51, "Eukrea CPUIMX51 Module") | |||
294 | .map_io = mx51_map_io, | 294 | .map_io = mx51_map_io, |
295 | .init_early = imx51_init_early, | 295 | .init_early = imx51_init_early, |
296 | .init_irq = mx51_init_irq, | 296 | .init_irq = mx51_init_irq, |
297 | .handle_irq = imx51_handle_irq, | ||
297 | .timer = &mxc_timer, | 298 | .timer = &mxc_timer, |
298 | .init_machine = eukrea_cpuimx51_init, | 299 | .init_machine = eukrea_cpuimx51_init, |
299 | MACHINE_END | 300 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-cpuimx51sd.c b/arch/arm/mach-mx5/board-cpuimx51sd.c index 72410d201f88..52a11c1898e6 100644 --- a/arch/arm/mach-mx5/board-cpuimx51sd.c +++ b/arch/arm/mach-mx5/board-cpuimx51sd.c | |||
@@ -332,6 +332,7 @@ MACHINE_START(EUKREA_CPUIMX51SD, "Eukrea CPUIMX51SD") | |||
332 | .map_io = mx51_map_io, | 332 | .map_io = mx51_map_io, |
333 | .init_early = imx51_init_early, | 333 | .init_early = imx51_init_early, |
334 | .init_irq = mx51_init_irq, | 334 | .init_irq = mx51_init_irq, |
335 | .handle_irq = imx51_handle_irq, | ||
335 | .timer = &mxc_timer, | 336 | .timer = &mxc_timer, |
336 | .init_machine = eukrea_cpuimx51sd_init, | 337 | .init_machine = eukrea_cpuimx51sd_init, |
337 | MACHINE_END | 338 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx50_rdp.c b/arch/arm/mach-mx5/board-mx50_rdp.c index 7de25c6712eb..fc3621d90bde 100644 --- a/arch/arm/mach-mx5/board-mx50_rdp.c +++ b/arch/arm/mach-mx5/board-mx50_rdp.c | |||
@@ -219,6 +219,7 @@ MACHINE_START(MX50_RDP, "Freescale MX50 Reference Design Platform") | |||
219 | .map_io = mx50_map_io, | 219 | .map_io = mx50_map_io, |
220 | .init_early = imx50_init_early, | 220 | .init_early = imx50_init_early, |
221 | .init_irq = mx50_init_irq, | 221 | .init_irq = mx50_init_irq, |
222 | .handle_irq = imx50_handle_irq, | ||
222 | .timer = &mx50_rdp_timer, | 223 | .timer = &mx50_rdp_timer, |
223 | .init_machine = mx50_rdp_board_init, | 224 | .init_machine = mx50_rdp_board_init, |
224 | MACHINE_END | 225 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_3ds.c b/arch/arm/mach-mx5/board-mx51_3ds.c index f988be7324fb..05783906db2b 100644 --- a/arch/arm/mach-mx5/board-mx51_3ds.c +++ b/arch/arm/mach-mx5/board-mx51_3ds.c | |||
@@ -172,6 +172,7 @@ MACHINE_START(MX51_3DS, "Freescale MX51 3-Stack Board") | |||
172 | .map_io = mx51_map_io, | 172 | .map_io = mx51_map_io, |
173 | .init_early = imx51_init_early, | 173 | .init_early = imx51_init_early, |
174 | .init_irq = mx51_init_irq, | 174 | .init_irq = mx51_init_irq, |
175 | .handle_irq = imx51_handle_irq, | ||
175 | .timer = &mx51_3ds_timer, | 176 | .timer = &mx51_3ds_timer, |
176 | .init_machine = mx51_3ds_init, | 177 | .init_machine = mx51_3ds_init, |
177 | MACHINE_END | 178 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c index 622b2de7d0e8..5993208a8f00 100644 --- a/arch/arm/mach-mx5/board-mx51_babbage.c +++ b/arch/arm/mach-mx5/board-mx51_babbage.c | |||
@@ -418,6 +418,7 @@ MACHINE_START(MX51_BABBAGE, "Freescale MX51 Babbage Board") | |||
418 | .map_io = mx51_map_io, | 418 | .map_io = mx51_map_io, |
419 | .init_early = imx51_init_early, | 419 | .init_early = imx51_init_early, |
420 | .init_irq = mx51_init_irq, | 420 | .init_irq = mx51_init_irq, |
421 | .handle_irq = imx51_handle_irq, | ||
421 | .timer = &mx51_babbage_timer, | 422 | .timer = &mx51_babbage_timer, |
422 | .init_machine = mx51_babbage_init, | 423 | .init_machine = mx51_babbage_init, |
423 | MACHINE_END | 424 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_efikamx.c b/arch/arm/mach-mx5/board-mx51_efikamx.c index d231b3e1e522..a9e48662cf75 100644 --- a/arch/arm/mach-mx5/board-mx51_efikamx.c +++ b/arch/arm/mach-mx5/board-mx51_efikamx.c | |||
@@ -161,6 +161,11 @@ static const struct gpio_led_platform_data | |||
161 | .num_leds = ARRAY_SIZE(mx51_efikamx_leds), | 161 | .num_leds = ARRAY_SIZE(mx51_efikamx_leds), |
162 | }; | 162 | }; |
163 | 163 | ||
164 | static struct esdhc_platform_data sd_pdata = { | ||
165 | .cd_type = ESDHC_CD_CONTROLLER, | ||
166 | .wp_type = ESDHC_WP_CONTROLLER, | ||
167 | }; | ||
168 | |||
164 | static struct gpio_keys_button mx51_efikamx_powerkey[] = { | 169 | static struct gpio_keys_button mx51_efikamx_powerkey[] = { |
165 | { | 170 | { |
166 | .code = KEY_POWER, | 171 | .code = KEY_POWER, |
@@ -237,9 +242,11 @@ static void __init mx51_efikamx_init(void) | |||
237 | 242 | ||
238 | /* on < 1.2 boards both SD controllers are used */ | 243 | /* on < 1.2 boards both SD controllers are used */ |
239 | if (system_rev < 0x12) { | 244 | if (system_rev < 0x12) { |
240 | imx51_add_sdhci_esdhc_imx(1, NULL); | 245 | imx51_add_sdhci_esdhc_imx(0, NULL); |
246 | imx51_add_sdhci_esdhc_imx(1, &sd_pdata); | ||
241 | mx51_efikamx_leds[2].default_trigger = "mmc1"; | 247 | mx51_efikamx_leds[2].default_trigger = "mmc1"; |
242 | } | 248 | } else |
249 | imx51_add_sdhci_esdhc_imx(0, &sd_pdata); | ||
243 | 250 | ||
244 | gpio_led_register_device(-1, &mx51_efikamx_leds_data); | 251 | gpio_led_register_device(-1, &mx51_efikamx_leds_data); |
245 | imx_add_gpio_keys(&mx51_efikamx_powerkey_data); | 252 | imx_add_gpio_keys(&mx51_efikamx_powerkey_data); |
@@ -282,6 +289,7 @@ MACHINE_START(MX51_EFIKAMX, "Genesi EfikaMX nettop") | |||
282 | .map_io = mx51_map_io, | 289 | .map_io = mx51_map_io, |
283 | .init_early = imx51_init_early, | 290 | .init_early = imx51_init_early, |
284 | .init_irq = mx51_init_irq, | 291 | .init_irq = mx51_init_irq, |
292 | .handle_irq = imx51_handle_irq, | ||
285 | .timer = &mx51_efikamx_timer, | 293 | .timer = &mx51_efikamx_timer, |
286 | .init_machine = mx51_efikamx_init, | 294 | .init_machine = mx51_efikamx_init, |
287 | MACHINE_END | 295 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx51_efikasb.c b/arch/arm/mach-mx5/board-mx51_efikasb.c index d4e98f0e33f5..38c4a3e28d3c 100644 --- a/arch/arm/mach-mx5/board-mx51_efikasb.c +++ b/arch/arm/mach-mx5/board-mx51_efikasb.c | |||
@@ -54,6 +54,7 @@ | |||
54 | #define EFIKASB_RFKILL IMX_GPIO_NR(3, 1) | 54 | #define EFIKASB_RFKILL IMX_GPIO_NR(3, 1) |
55 | 55 | ||
56 | #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE) | 56 | #define MX51_PAD_PWRKEY IOMUX_PAD(0x48c, 0x0f8, 1, 0x0, 0, PAD_CTL_PUS_100K_UP | PAD_CTL_PKE) |
57 | #define MX51_PAD_SD1_CD IOMUX_PAD(0x47c, 0x0e8, 1, __NA_, 0, MX51_ESDHC_PAD_CTRL) | ||
57 | 58 | ||
58 | static iomux_v3_cfg_t mx51efikasb_pads[] = { | 59 | static iomux_v3_cfg_t mx51efikasb_pads[] = { |
59 | /* USB HOST2 */ | 60 | /* USB HOST2 */ |
@@ -95,6 +96,8 @@ static iomux_v3_cfg_t mx51efikasb_pads[] = { | |||
95 | 96 | ||
96 | /* BT */ | 97 | /* BT */ |
97 | MX51_PAD_EIM_A17__GPIO2_11, | 98 | MX51_PAD_EIM_A17__GPIO2_11, |
99 | |||
100 | MX51_PAD_SD1_CD, | ||
98 | }; | 101 | }; |
99 | 102 | ||
100 | static int initialize_usbh2_port(struct platform_device *pdev) | 103 | static int initialize_usbh2_port(struct platform_device *pdev) |
@@ -180,6 +183,18 @@ static const struct gpio_keys_platform_data mx51_efikasb_keys_data __initconst = | |||
180 | .nbuttons = ARRAY_SIZE(mx51_efikasb_keys), | 183 | .nbuttons = ARRAY_SIZE(mx51_efikasb_keys), |
181 | }; | 184 | }; |
182 | 185 | ||
186 | static struct esdhc_platform_data sd0_pdata = { | ||
187 | #define EFIKASB_SD1_CD IMX_GPIO_NR(2, 27) | ||
188 | .cd_gpio = EFIKASB_SD1_CD, | ||
189 | .cd_type = ESDHC_CD_GPIO, | ||
190 | .wp_type = ESDHC_WP_CONTROLLER, | ||
191 | }; | ||
192 | |||
193 | static struct esdhc_platform_data sd1_pdata = { | ||
194 | .cd_type = ESDHC_CD_CONTROLLER, | ||
195 | .wp_type = ESDHC_WP_CONTROLLER, | ||
196 | }; | ||
197 | |||
183 | static struct regulator *pwgt1, *pwgt2; | 198 | static struct regulator *pwgt1, *pwgt2; |
184 | 199 | ||
185 | static void mx51_efikasb_power_off(void) | 200 | static void mx51_efikasb_power_off(void) |
@@ -248,7 +263,8 @@ static void __init efikasb_board_init(void) | |||
248 | 263 | ||
249 | mx51_efikasb_board_id(); | 264 | mx51_efikasb_board_id(); |
250 | mx51_efikasb_usb(); | 265 | mx51_efikasb_usb(); |
251 | imx51_add_sdhci_esdhc_imx(1, NULL); | 266 | imx51_add_sdhci_esdhc_imx(0, &sd0_pdata); |
267 | imx51_add_sdhci_esdhc_imx(1, &sd1_pdata); | ||
252 | 268 | ||
253 | gpio_led_register_device(-1, &mx51_efikasb_leds_data); | 269 | gpio_led_register_device(-1, &mx51_efikasb_leds_data); |
254 | imx_add_gpio_keys(&mx51_efikasb_keys_data); | 270 | imx_add_gpio_keys(&mx51_efikasb_keys_data); |
@@ -268,6 +284,7 @@ MACHINE_START(MX51_EFIKASB, "Genesi Efika Smartbook") | |||
268 | .map_io = mx51_map_io, | 284 | .map_io = mx51_map_io, |
269 | .init_early = imx51_init_early, | 285 | .init_early = imx51_init_early, |
270 | .init_irq = mx51_init_irq, | 286 | .init_irq = mx51_init_irq, |
287 | .handle_irq = imx51_handle_irq, | ||
271 | .init_machine = efikasb_board_init, | 288 | .init_machine = efikasb_board_init, |
272 | .timer = &mx51_efikasb_timer, | 289 | .timer = &mx51_efikasb_timer, |
273 | MACHINE_END | 290 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c index 9d844f102382..614edcb0aa7e 100644 --- a/arch/arm/mach-mx5/board-mx53_ard.c +++ b/arch/arm/mach-mx5/board-mx53_ard.c | |||
@@ -250,6 +250,7 @@ MACHINE_START(MX53_ARD, "Freescale MX53 ARD Board") | |||
250 | .map_io = mx53_map_io, | 250 | .map_io = mx53_map_io, |
251 | .init_early = imx53_init_early, | 251 | .init_early = imx53_init_early, |
252 | .init_irq = mx53_init_irq, | 252 | .init_irq = mx53_init_irq, |
253 | .handle_irq = imx53_handle_irq, | ||
253 | .timer = &mx53_ard_timer, | 254 | .timer = &mx53_ard_timer, |
254 | .init_machine = mx53_ard_board_init, | 255 | .init_machine = mx53_ard_board_init, |
255 | MACHINE_END | 256 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c index 1b417b06b736..6a3e6168e322 100644 --- a/arch/arm/mach-mx5/board-mx53_evk.c +++ b/arch/arm/mach-mx5/board-mx53_evk.c | |||
@@ -167,6 +167,7 @@ MACHINE_START(MX53_EVK, "Freescale MX53 EVK Board") | |||
167 | .map_io = mx53_map_io, | 167 | .map_io = mx53_map_io, |
168 | .init_early = imx53_init_early, | 168 | .init_early = imx53_init_early, |
169 | .init_irq = mx53_init_irq, | 169 | .init_irq = mx53_init_irq, |
170 | .handle_irq = imx53_handle_irq, | ||
170 | .timer = &mx53_evk_timer, | 171 | .timer = &mx53_evk_timer, |
171 | .init_machine = mx53_evk_board_init, | 172 | .init_machine = mx53_evk_board_init, |
172 | MACHINE_END | 173 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c index 940aac932fa3..0af2766f8610 100644 --- a/arch/arm/mach-mx5/board-mx53_loco.c +++ b/arch/arm/mach-mx5/board-mx53_loco.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/clk.h> | 22 | #include <linux/clk.h> |
23 | #include <linux/delay.h> | 23 | #include <linux/delay.h> |
24 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
25 | #include <linux/i2c.h> | ||
25 | 26 | ||
26 | #include <mach/common.h> | 27 | #include <mach/common.h> |
27 | #include <mach/hardware.h> | 28 | #include <mach/hardware.h> |
@@ -42,6 +43,7 @@ | |||
42 | #define LOCO_SD3_CD IMX_GPIO_NR(3, 11) | 43 | #define LOCO_SD3_CD IMX_GPIO_NR(3, 11) |
43 | #define LOCO_SD3_WP IMX_GPIO_NR(3, 12) | 44 | #define LOCO_SD3_WP IMX_GPIO_NR(3, 12) |
44 | #define LOCO_SD1_CD IMX_GPIO_NR(3, 13) | 45 | #define LOCO_SD1_CD IMX_GPIO_NR(3, 13) |
46 | #define LOCO_ACCEL_EN IMX_GPIO_NR(6, 14) | ||
45 | 47 | ||
46 | static iomux_v3_cfg_t mx53_loco_pads[] = { | 48 | static iomux_v3_cfg_t mx53_loco_pads[] = { |
47 | /* FEC */ | 49 | /* FEC */ |
@@ -64,6 +66,10 @@ static iomux_v3_cfg_t mx53_loco_pads[] = { | |||
64 | MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD, | 66 | MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD, |
65 | MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS, | 67 | MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS, |
66 | MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD, | 68 | MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD, |
69 | /* I2C1 */ | ||
70 | MX53_PAD_CSI0_DAT8__I2C1_SDA, | ||
71 | MX53_PAD_CSI0_DAT9__I2C1_SCL, | ||
72 | MX53_PAD_NANDF_CS1__GPIO6_14, /* Accelerometer Enable */ | ||
67 | /* I2C2 */ | 73 | /* I2C2 */ |
68 | MX53_PAD_KEY_COL3__I2C2_SCL, | 74 | MX53_PAD_KEY_COL3__I2C2_SCL, |
69 | MX53_PAD_KEY_ROW3__I2C2_SDA, | 75 | MX53_PAD_KEY_ROW3__I2C2_SDA, |
@@ -257,8 +263,15 @@ static const struct gpio_led_platform_data mx53loco_leds_data __initconst = { | |||
257 | .num_leds = ARRAY_SIZE(mx53loco_leds), | 263 | .num_leds = ARRAY_SIZE(mx53loco_leds), |
258 | }; | 264 | }; |
259 | 265 | ||
266 | static struct i2c_board_info mx53loco_i2c_devices[] = { | ||
267 | { | ||
268 | I2C_BOARD_INFO("mma8450", 0x1C), | ||
269 | }, | ||
270 | }; | ||
271 | |||
260 | static void __init mx53_loco_board_init(void) | 272 | static void __init mx53_loco_board_init(void) |
261 | { | 273 | { |
274 | int ret; | ||
262 | imx53_soc_init(); | 275 | imx53_soc_init(); |
263 | 276 | ||
264 | mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, | 277 | mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads, |
@@ -267,6 +280,13 @@ static void __init mx53_loco_board_init(void) | |||
267 | mx53_loco_fec_reset(); | 280 | mx53_loco_fec_reset(); |
268 | imx53_add_fec(&mx53_loco_fec_data); | 281 | imx53_add_fec(&mx53_loco_fec_data); |
269 | imx53_add_imx2_wdt(0, NULL); | 282 | imx53_add_imx2_wdt(0, NULL); |
283 | |||
284 | ret = gpio_request_one(LOCO_ACCEL_EN, GPIOF_OUT_INIT_HIGH, "accel_en"); | ||
285 | if (ret) | ||
286 | pr_err("Cannot request ACCEL_EN pin: %d\n", ret); | ||
287 | |||
288 | i2c_register_board_info(0, mx53loco_i2c_devices, | ||
289 | ARRAY_SIZE(mx53loco_i2c_devices)); | ||
270 | imx53_add_imx_i2c(0, &mx53_loco_i2c_data); | 290 | imx53_add_imx_i2c(0, &mx53_loco_i2c_data); |
271 | imx53_add_imx_i2c(1, &mx53_loco_i2c_data); | 291 | imx53_add_imx_i2c(1, &mx53_loco_i2c_data); |
272 | imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data); | 292 | imx53_add_sdhci_esdhc_imx(0, &mx53_loco_sd1_data); |
@@ -289,6 +309,7 @@ MACHINE_START(MX53_LOCO, "Freescale MX53 LOCO Board") | |||
289 | .map_io = mx53_map_io, | 309 | .map_io = mx53_map_io, |
290 | .init_early = imx53_init_early, | 310 | .init_early = imx53_init_early, |
291 | .init_irq = mx53_init_irq, | 311 | .init_irq = mx53_init_irq, |
312 | .handle_irq = imx53_handle_irq, | ||
292 | .timer = &mx53_loco_timer, | 313 | .timer = &mx53_loco_timer, |
293 | .init_machine = mx53_loco_board_init, | 314 | .init_machine = mx53_loco_board_init, |
294 | MACHINE_END | 315 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c index efcab68840ae..d12fd3043ba6 100644 --- a/arch/arm/mach-mx5/board-mx53_smd.c +++ b/arch/arm/mach-mx5/board-mx53_smd.c | |||
@@ -156,6 +156,7 @@ MACHINE_START(MX53_SMD, "Freescale MX53 SMD Board") | |||
156 | .map_io = mx53_map_io, | 156 | .map_io = mx53_map_io, |
157 | .init_early = imx53_init_early, | 157 | .init_early = imx53_init_early, |
158 | .init_irq = mx53_init_irq, | 158 | .init_irq = mx53_init_irq, |
159 | .handle_irq = imx53_handle_irq, | ||
159 | .timer = &mx53_smd_timer, | 160 | .timer = &mx53_smd_timer, |
160 | .init_machine = mx53_smd_board_init, | 161 | .init_machine = mx53_smd_board_init, |
161 | MACHINE_END | 162 | MACHINE_END |
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c index c2dafe406304..b94879e8679f 100644 --- a/arch/arm/mach-mx5/clock-mx51-mx53.c +++ b/arch/arm/mach-mx5/clock-mx51-mx53.c | |||
@@ -1573,9 +1573,8 @@ int __init mx51_clocks_init(unsigned long ckil, unsigned long osc, | |||
1573 | clk_enable(&main_bus_clk); | 1573 | clk_enable(&main_bus_clk); |
1574 | 1574 | ||
1575 | clk_enable(&iim_clk); | 1575 | clk_enable(&iim_clk); |
1576 | mx51_revision(); | 1576 | imx_print_silicon_rev("i.MX51", mx51_revision()); |
1577 | clk_disable(&iim_clk); | 1577 | clk_disable(&iim_clk); |
1578 | mx51_display_revision(); | ||
1579 | 1578 | ||
1580 | /* move usb_phy_clk to 24MHz */ | 1579 | /* move usb_phy_clk to 24MHz */ |
1581 | clk_set_parent(&usb_phy1_clk, &osc_clk); | 1580 | clk_set_parent(&usb_phy1_clk, &osc_clk); |
@@ -1617,9 +1616,8 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc, | |||
1617 | clk_enable(&main_bus_clk); | 1616 | clk_enable(&main_bus_clk); |
1618 | 1617 | ||
1619 | clk_enable(&iim_clk); | 1618 | clk_enable(&iim_clk); |
1620 | mx53_revision(); | 1619 | imx_print_silicon_rev("i.MX53", mx53_revision()); |
1621 | clk_disable(&iim_clk); | 1620 | clk_disable(&iim_clk); |
1622 | mx53_display_revision(); | ||
1623 | 1621 | ||
1624 | /* Set SDHC parents to be PLL2 */ | 1622 | /* Set SDHC parents to be PLL2 */ |
1625 | clk_set_parent(&esdhc1_clk, &pll2_sw_clk); | 1623 | clk_set_parent(&esdhc1_clk, &pll2_sw_clk); |
diff --git a/arch/arm/mach-mx5/cpu.c b/arch/arm/mach-mx5/cpu.c index 86f87da59c64..5c5328257dca 100644 --- a/arch/arm/mach-mx5/cpu.c +++ b/arch/arm/mach-mx5/cpu.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <mach/hardware.h> | 18 | #include <mach/hardware.h> |
19 | #include <asm/io.h> | 19 | #include <asm/io.h> |
20 | 20 | ||
21 | static int cpu_silicon_rev = -1; | 21 | static int mx5_cpu_rev = -1; |
22 | 22 | ||
23 | #define IIM_SREV 0x24 | 23 | #define IIM_SREV 0x24 |
24 | #define MX50_HW_ADADIG_DIGPROG 0xB0 | 24 | #define MX50_HW_ADADIG_DIGPROG 0xB0 |
@@ -28,11 +28,14 @@ static int get_mx51_srev(void) | |||
28 | void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR); | 28 | void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR); |
29 | u32 rev = readl(iim_base + IIM_SREV) & 0xff; | 29 | u32 rev = readl(iim_base + IIM_SREV) & 0xff; |
30 | 30 | ||
31 | if (rev == 0x0) | 31 | switch (rev) { |
32 | case 0x0: | ||
32 | return IMX_CHIP_REVISION_2_0; | 33 | return IMX_CHIP_REVISION_2_0; |
33 | else if (rev == 0x10) | 34 | case 0x10: |
34 | return IMX_CHIP_REVISION_3_0; | 35 | return IMX_CHIP_REVISION_3_0; |
35 | return 0; | 36 | default: |
37 | return IMX_CHIP_REVISION_UNKNOWN; | ||
38 | } | ||
36 | } | 39 | } |
37 | 40 | ||
38 | /* | 41 | /* |
@@ -45,33 +48,13 @@ int mx51_revision(void) | |||
45 | if (!cpu_is_mx51()) | 48 | if (!cpu_is_mx51()) |
46 | return -EINVAL; | 49 | return -EINVAL; |
47 | 50 | ||
48 | if (cpu_silicon_rev == -1) | 51 | if (mx5_cpu_rev == -1) |
49 | cpu_silicon_rev = get_mx51_srev(); | 52 | mx5_cpu_rev = get_mx51_srev(); |
50 | 53 | ||
51 | return cpu_silicon_rev; | 54 | return mx5_cpu_rev; |
52 | } | 55 | } |
53 | EXPORT_SYMBOL(mx51_revision); | 56 | EXPORT_SYMBOL(mx51_revision); |
54 | 57 | ||
55 | void mx51_display_revision(void) | ||
56 | { | ||
57 | int rev; | ||
58 | char *srev; | ||
59 | rev = mx51_revision(); | ||
60 | |||
61 | switch (rev) { | ||
62 | case IMX_CHIP_REVISION_2_0: | ||
63 | srev = IMX_CHIP_REVISION_2_0_STRING; | ||
64 | break; | ||
65 | case IMX_CHIP_REVISION_3_0: | ||
66 | srev = IMX_CHIP_REVISION_3_0_STRING; | ||
67 | break; | ||
68 | default: | ||
69 | srev = IMX_CHIP_REVISION_UNKNOWN_STRING; | ||
70 | } | ||
71 | printk(KERN_INFO "CPU identified as i.MX51, silicon rev %s\n", srev); | ||
72 | } | ||
73 | EXPORT_SYMBOL(mx51_display_revision); | ||
74 | |||
75 | #ifdef CONFIG_NEON | 58 | #ifdef CONFIG_NEON |
76 | 59 | ||
77 | /* | 60 | /* |
@@ -121,10 +104,10 @@ int mx53_revision(void) | |||
121 | if (!cpu_is_mx53()) | 104 | if (!cpu_is_mx53()) |
122 | return -EINVAL; | 105 | return -EINVAL; |
123 | 106 | ||
124 | if (cpu_silicon_rev == -1) | 107 | if (mx5_cpu_rev == -1) |
125 | cpu_silicon_rev = get_mx53_srev(); | 108 | mx5_cpu_rev = get_mx53_srev(); |
126 | 109 | ||
127 | return cpu_silicon_rev; | 110 | return mx5_cpu_rev; |
128 | } | 111 | } |
129 | EXPORT_SYMBOL(mx53_revision); | 112 | EXPORT_SYMBOL(mx53_revision); |
130 | 113 | ||
@@ -134,7 +117,7 @@ static int get_mx50_srev(void) | |||
134 | u32 rev; | 117 | u32 rev; |
135 | 118 | ||
136 | if (!anatop) { | 119 | if (!anatop) { |
137 | cpu_silicon_rev = -EINVAL; | 120 | mx5_cpu_rev = -EINVAL; |
138 | return 0; | 121 | return 0; |
139 | } | 122 | } |
140 | 123 | ||
@@ -159,36 +142,13 @@ int mx50_revision(void) | |||
159 | if (!cpu_is_mx50()) | 142 | if (!cpu_is_mx50()) |
160 | return -EINVAL; | 143 | return -EINVAL; |
161 | 144 | ||
162 | if (cpu_silicon_rev == -1) | 145 | if (mx5_cpu_rev == -1) |
163 | cpu_silicon_rev = get_mx50_srev(); | 146 | mx5_cpu_rev = get_mx50_srev(); |
164 | 147 | ||
165 | return cpu_silicon_rev; | 148 | return mx5_cpu_rev; |
166 | } | 149 | } |
167 | EXPORT_SYMBOL(mx50_revision); | 150 | EXPORT_SYMBOL(mx50_revision); |
168 | 151 | ||
169 | void mx53_display_revision(void) | ||
170 | { | ||
171 | int rev; | ||
172 | char *srev; | ||
173 | rev = mx53_revision(); | ||
174 | |||
175 | switch (rev) { | ||
176 | case IMX_CHIP_REVISION_1_0: | ||
177 | srev = IMX_CHIP_REVISION_1_0_STRING; | ||
178 | break; | ||
179 | case IMX_CHIP_REVISION_2_0: | ||
180 | srev = IMX_CHIP_REVISION_2_0_STRING; | ||
181 | break; | ||
182 | case IMX_CHIP_REVISION_2_1: | ||
183 | srev = IMX_CHIP_REVISION_2_1_STRING; | ||
184 | break; | ||
185 | default: | ||
186 | srev = IMX_CHIP_REVISION_UNKNOWN_STRING; | ||
187 | } | ||
188 | printk(KERN_INFO "CPU identified as i.MX53, silicon rev %s\n", srev); | ||
189 | } | ||
190 | EXPORT_SYMBOL(mx53_display_revision); | ||
191 | |||
192 | static int __init post_cpu_init(void) | 152 | static int __init post_cpu_init(void) |
193 | { | 153 | { |
194 | unsigned int reg; | 154 | unsigned int reg; |
diff --git a/arch/arm/mach-mx5/devices-imx53.h b/arch/arm/mach-mx5/devices-imx53.h index 7fe5e462fdca..6e1e5d1f8c3a 100644 --- a/arch/arm/mach-mx5/devices-imx53.h +++ b/arch/arm/mach-mx5/devices-imx53.h | |||
@@ -44,4 +44,5 @@ extern const struct imx_imx_keypad_data imx53_imx_keypad_data; | |||
44 | extern const struct imx_pata_imx_data imx53_pata_imx_data; | 44 | extern const struct imx_pata_imx_data imx53_pata_imx_data; |
45 | #define imx53_add_pata_imx() \ | 45 | #define imx53_add_pata_imx() \ |
46 | imx_add_pata_imx(&imx53_pata_imx_data) | 46 | imx_add_pata_imx(&imx53_pata_imx_data) |
47 | |||
47 | extern struct platform_device *__init imx53_add_ahci_imx(void); | 48 | extern struct platform_device *__init imx53_add_ahci_imx(void); |
diff --git a/arch/arm/mach-mx5/mx51_efika.c b/arch/arm/mach-mx5/mx51_efika.c index 83c57027de75..b004e178417d 100644 --- a/arch/arm/mach-mx5/mx51_efika.c +++ b/arch/arm/mach-mx5/mx51_efika.c | |||
@@ -607,7 +607,6 @@ void __init efika_board_common_init(void) | |||
607 | ARRAY_SIZE(mx51efika_pads)); | 607 | ARRAY_SIZE(mx51efika_pads)); |
608 | imx51_add_imx_uart(0, &uart_pdata); | 608 | imx51_add_imx_uart(0, &uart_pdata); |
609 | mx51_efika_usb(); | 609 | mx51_efika_usb(); |
610 | imx51_add_sdhci_esdhc_imx(0, NULL); | ||
611 | 610 | ||
612 | /* FIXME: comes from original code. check this. */ | 611 | /* FIXME: comes from original code. check this. */ |
613 | if (mx51_revision() < IMX_CHIP_REVISION_2_0) | 612 | if (mx51_revision() < IMX_CHIP_REVISION_2_0) |
diff --git a/arch/arm/mach-mxs/Kconfig b/arch/arm/mach-mxs/Kconfig index ea5ec0f3b5b1..cf00b3e3be85 100644 --- a/arch/arm/mach-mxs/Kconfig +++ b/arch/arm/mach-mxs/Kconfig | |||
@@ -23,6 +23,7 @@ config MACH_STMP378X_DEVB | |||
23 | select MXS_HAVE_AMBA_DUART | 23 | select MXS_HAVE_AMBA_DUART |
24 | select MXS_HAVE_PLATFORM_AUART | 24 | select MXS_HAVE_PLATFORM_AUART |
25 | select MXS_HAVE_PLATFORM_MXS_MMC | 25 | select MXS_HAVE_PLATFORM_MXS_MMC |
26 | select MXS_HAVE_PLATFORM_RTC_STMP3XXX | ||
26 | help | 27 | help |
27 | Include support for STMP378x-devb platform. This includes specific | 28 | Include support for STMP378x-devb platform. This includes specific |
28 | configurations for the board and its peripherals. | 29 | configurations for the board and its peripherals. |
@@ -34,6 +35,7 @@ config MACH_MX23EVK | |||
34 | select MXS_HAVE_PLATFORM_AUART | 35 | select MXS_HAVE_PLATFORM_AUART |
35 | select MXS_HAVE_PLATFORM_MXS_MMC | 36 | select MXS_HAVE_PLATFORM_MXS_MMC |
36 | select MXS_HAVE_PLATFORM_MXSFB | 37 | select MXS_HAVE_PLATFORM_MXSFB |
38 | select MXS_HAVE_PLATFORM_RTC_STMP3XXX | ||
37 | help | 39 | help |
38 | Include support for MX23EVK platform. This includes specific | 40 | Include support for MX23EVK platform. This includes specific |
39 | configurations for the board and its peripherals. | 41 | configurations for the board and its peripherals. |
@@ -48,6 +50,9 @@ config MACH_MX28EVK | |||
48 | select MXS_HAVE_PLATFORM_FLEXCAN | 50 | select MXS_HAVE_PLATFORM_FLEXCAN |
49 | select MXS_HAVE_PLATFORM_MXS_MMC | 51 | select MXS_HAVE_PLATFORM_MXS_MMC |
50 | select MXS_HAVE_PLATFORM_MXSFB | 52 | select MXS_HAVE_PLATFORM_MXSFB |
53 | select MXS_HAVE_PLATFORM_MXS_SAIF | ||
54 | select MXS_HAVE_PLATFORM_MXS_I2C | ||
55 | select MXS_HAVE_PLATFORM_RTC_STMP3XXX | ||
51 | select MXS_OCOTP | 56 | select MXS_OCOTP |
52 | help | 57 | help |
53 | Include support for MX28EVK platform. This includes specific | 58 | Include support for MX28EVK platform. This includes specific |
@@ -63,6 +68,7 @@ config MODULE_TX28 | |||
63 | select MXS_HAVE_PLATFORM_MXS_I2C | 68 | select MXS_HAVE_PLATFORM_MXS_I2C |
64 | select MXS_HAVE_PLATFORM_MXS_MMC | 69 | select MXS_HAVE_PLATFORM_MXS_MMC |
65 | select MXS_HAVE_PLATFORM_MXS_PWM | 70 | select MXS_HAVE_PLATFORM_MXS_PWM |
71 | select MXS_HAVE_PLATFORM_RTC_STMP3XXX | ||
66 | 72 | ||
67 | config MODULE_M28 | 73 | config MODULE_M28 |
68 | bool | 74 | bool |
diff --git a/arch/arm/mach-mxs/clock-mx28.c b/arch/arm/mach-mxs/clock-mx28.c index 7fa1ac4de7d8..229ae3494216 100644 --- a/arch/arm/mach-mxs/clock-mx28.c +++ b/arch/arm/mach-mxs/clock-mx28.c | |||
@@ -640,6 +640,8 @@ static struct clk_lookup lookups[] = { | |||
640 | _REGISTER_CLOCK(NULL, "lradc", lradc_clk) | 640 | _REGISTER_CLOCK(NULL, "lradc", lradc_clk) |
641 | _REGISTER_CLOCK(NULL, "spdif", spdif_clk) | 641 | _REGISTER_CLOCK(NULL, "spdif", spdif_clk) |
642 | _REGISTER_CLOCK("imx28-fb", NULL, lcdif_clk) | 642 | _REGISTER_CLOCK("imx28-fb", NULL, lcdif_clk) |
643 | _REGISTER_CLOCK("mxs-saif.0", NULL, saif0_clk) | ||
644 | _REGISTER_CLOCK("mxs-saif.1", NULL, saif1_clk) | ||
643 | }; | 645 | }; |
644 | 646 | ||
645 | static int clk_misc_init(void) | 647 | static int clk_misc_init(void) |
@@ -708,11 +710,11 @@ static int clk_misc_init(void) | |||
708 | 710 | ||
709 | /* SAIF has to use frac div for functional operation */ | 711 | /* SAIF has to use frac div for functional operation */ |
710 | reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0); | 712 | reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0); |
711 | reg &= ~BM_CLKCTRL_SAIF0_DIV_FRAC_EN; | 713 | reg |= BM_CLKCTRL_SAIF0_DIV_FRAC_EN; |
712 | __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0); | 714 | __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF0); |
713 | 715 | ||
714 | reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1); | 716 | reg = __raw_readl(CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1); |
715 | reg &= ~BM_CLKCTRL_SAIF1_DIV_FRAC_EN; | 717 | reg |= BM_CLKCTRL_SAIF1_DIV_FRAC_EN; |
716 | __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1); | 718 | __raw_writel(reg, CLKCTRL_BASE_ADDR + HW_CLKCTRL_SAIF1); |
717 | 719 | ||
718 | /* | 720 | /* |
@@ -780,6 +782,8 @@ int __init mx28_clocks_init(void) | |||
780 | clk_enable(&uart_clk); | 782 | clk_enable(&uart_clk); |
781 | 783 | ||
782 | clk_set_parent(&lcdif_clk, &ref_pix_clk); | 784 | clk_set_parent(&lcdif_clk, &ref_pix_clk); |
785 | clk_set_parent(&saif0_clk, &pll0_clk); | ||
786 | clk_set_parent(&saif1_clk, &pll0_clk); | ||
783 | 787 | ||
784 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); | 788 | clkdev_add_table(lookups, ARRAY_SIZE(lookups)); |
785 | 789 | ||
diff --git a/arch/arm/mach-mxs/devices-mx23.h b/arch/arm/mach-mxs/devices-mx23.h index c6f345febd39..3fa651d2c994 100644 --- a/arch/arm/mach-mxs/devices-mx23.h +++ b/arch/arm/mach-mxs/devices-mx23.h | |||
@@ -29,3 +29,5 @@ extern const struct mxs_mxs_mmc_data mx23_mxs_mmc_data[] __initconst; | |||
29 | 29 | ||
30 | struct platform_device *__init mx23_add_mxsfb( | 30 | struct platform_device *__init mx23_add_mxsfb( |
31 | const struct mxsfb_platform_data *pdata); | 31 | const struct mxsfb_platform_data *pdata); |
32 | |||
33 | struct platform_device *__init mx23_add_rtc_stmp3xxx(void); | ||
diff --git a/arch/arm/mach-mxs/devices-mx28.h b/arch/arm/mach-mxs/devices-mx28.h index 79b94523954a..c8887103f0e3 100644 --- a/arch/arm/mach-mxs/devices-mx28.h +++ b/arch/arm/mach-mxs/devices-mx28.h | |||
@@ -45,3 +45,8 @@ extern const struct mxs_mxs_mmc_data mx28_mxs_mmc_data[] __initconst; | |||
45 | 45 | ||
46 | struct platform_device *__init mx28_add_mxsfb( | 46 | struct platform_device *__init mx28_add_mxsfb( |
47 | const struct mxsfb_platform_data *pdata); | 47 | const struct mxsfb_platform_data *pdata); |
48 | |||
49 | extern const struct mxs_saif_data mx28_saif_data[] __initconst; | ||
50 | #define mx28_add_saif(id) mxs_add_saif(&mx28_saif_data[id]) | ||
51 | |||
52 | struct platform_device *__init mx28_add_rtc_stmp3xxx(void); | ||
diff --git a/arch/arm/mach-mxs/devices/Kconfig b/arch/arm/mach-mxs/devices/Kconfig index acf9eea124c0..18b6bf526a27 100644 --- a/arch/arm/mach-mxs/devices/Kconfig +++ b/arch/arm/mach-mxs/devices/Kconfig | |||
@@ -23,3 +23,9 @@ config MXS_HAVE_PLATFORM_MXS_PWM | |||
23 | 23 | ||
24 | config MXS_HAVE_PLATFORM_MXSFB | 24 | config MXS_HAVE_PLATFORM_MXSFB |
25 | bool | 25 | bool |
26 | |||
27 | config MXS_HAVE_PLATFORM_MXS_SAIF | ||
28 | bool | ||
29 | |||
30 | config MXS_HAVE_PLATFORM_RTC_STMP3XXX | ||
31 | bool | ||
diff --git a/arch/arm/mach-mxs/devices/Makefile b/arch/arm/mach-mxs/devices/Makefile index 351915c683ff..f52e3e53baec 100644 --- a/arch/arm/mach-mxs/devices/Makefile +++ b/arch/arm/mach-mxs/devices/Makefile | |||
@@ -8,3 +8,5 @@ obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_MMC) += platform-mxs-mmc.o | |||
8 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o | 8 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_PWM) += platform-mxs-pwm.o |
9 | obj-y += platform-gpio-mxs.o | 9 | obj-y += platform-gpio-mxs.o |
10 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o | 10 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXSFB) += platform-mxsfb.o |
11 | obj-$(CONFIG_MXS_HAVE_PLATFORM_MXS_SAIF) += platform-mxs-saif.o | ||
12 | obj-$(CONFIG_MXS_HAVE_PLATFORM_RTC_STMP3XXX) += platform-rtc-stmp3xxx.o | ||
diff --git a/arch/arm/mach-mxs/devices/platform-mxs-saif.c b/arch/arm/mach-mxs/devices/platform-mxs-saif.c new file mode 100644 index 000000000000..1ec965e9fe92 --- /dev/null +++ b/arch/arm/mach-mxs/devices/platform-mxs-saif.c | |||
@@ -0,0 +1,60 @@ | |||
1 | /* | ||
2 | * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it under | ||
5 | * the terms of the GNU General Public License version 2 as published by the | ||
6 | * Free Software Foundation. | ||
7 | */ | ||
8 | #include <linux/compiler.h> | ||
9 | #include <linux/err.h> | ||
10 | #include <linux/init.h> | ||
11 | |||
12 | #include <mach/mx23.h> | ||
13 | #include <mach/mx28.h> | ||
14 | #include <mach/devices-common.h> | ||
15 | |||
16 | #define mxs_saif_data_entry_single(soc, _id) \ | ||
17 | { \ | ||
18 | .id = _id, \ | ||
19 | .iobase = soc ## _SAIF ## _id ## _BASE_ADDR, \ | ||
20 | .irq = soc ## _INT_SAIF ## _id, \ | ||
21 | .dma = soc ## _DMA_SAIF ## _id, \ | ||
22 | .dmairq = soc ## _INT_SAIF ## _id ##_DMA, \ | ||
23 | } | ||
24 | |||
25 | #define mxs_saif_data_entry(soc, _id) \ | ||
26 | [_id] = mxs_saif_data_entry_single(soc, _id) | ||
27 | |||
28 | #ifdef CONFIG_SOC_IMX28 | ||
29 | const struct mxs_saif_data mx28_saif_data[] __initconst = { | ||
30 | mxs_saif_data_entry(MX28, 0), | ||
31 | mxs_saif_data_entry(MX28, 1), | ||
32 | }; | ||
33 | #endif | ||
34 | |||
35 | struct platform_device *__init mxs_add_saif(const struct mxs_saif_data *data) | ||
36 | { | ||
37 | struct resource res[] = { | ||
38 | { | ||
39 | .start = data->iobase, | ||
40 | .end = data->iobase + SZ_4K - 1, | ||
41 | .flags = IORESOURCE_MEM, | ||
42 | }, { | ||
43 | .start = data->irq, | ||
44 | .end = data->irq, | ||
45 | .flags = IORESOURCE_IRQ, | ||
46 | }, { | ||
47 | .start = data->dma, | ||
48 | .end = data->dma, | ||
49 | .flags = IORESOURCE_DMA, | ||
50 | }, { | ||
51 | .start = data->dmairq, | ||
52 | .end = data->dmairq, | ||
53 | .flags = IORESOURCE_IRQ, | ||
54 | }, | ||
55 | |||
56 | }; | ||
57 | |||
58 | return mxs_add_platform_device("mxs-saif", data->id, res, | ||
59 | ARRAY_SIZE(res), NULL, 0); | ||
60 | } | ||
diff --git a/arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c b/arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c new file mode 100644 index 000000000000..639eaee15553 --- /dev/null +++ b/arch/arm/mach-mxs/devices/platform-rtc-stmp3xxx.c | |||
@@ -0,0 +1,51 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2011 Pengutronix, Wolfram Sang <w.sang@pengutronix.de> | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify it under | ||
5 | * the terms of the GNU General Public License version 2 as published by the | ||
6 | * Free Software Foundation. | ||
7 | */ | ||
8 | #include <asm/sizes.h> | ||
9 | #include <mach/mx23.h> | ||
10 | #include <mach/mx28.h> | ||
11 | #include <mach/devices-common.h> | ||
12 | |||
13 | #ifdef CONFIG_SOC_IMX23 | ||
14 | struct platform_device *__init mx23_add_rtc_stmp3xxx(void) | ||
15 | { | ||
16 | struct resource res[] = { | ||
17 | { | ||
18 | .start = MX23_RTC_BASE_ADDR, | ||
19 | .end = MX23_RTC_BASE_ADDR + SZ_8K - 1, | ||
20 | .flags = IORESOURCE_MEM, | ||
21 | }, { | ||
22 | .start = MX23_INT_RTC_ALARM, | ||
23 | .end = MX23_INT_RTC_ALARM, | ||
24 | .flags = IORESOURCE_IRQ, | ||
25 | }, | ||
26 | }; | ||
27 | |||
28 | return mxs_add_platform_device("stmp3xxx-rtc", 0, res, ARRAY_SIZE(res), | ||
29 | NULL, 0); | ||
30 | } | ||
31 | #endif /* CONFIG_SOC_IMX23 */ | ||
32 | |||
33 | #ifdef CONFIG_SOC_IMX28 | ||
34 | struct platform_device *__init mx28_add_rtc_stmp3xxx(void) | ||
35 | { | ||
36 | struct resource res[] = { | ||
37 | { | ||
38 | .start = MX28_RTC_BASE_ADDR, | ||
39 | .end = MX28_RTC_BASE_ADDR + SZ_8K - 1, | ||
40 | .flags = IORESOURCE_MEM, | ||
41 | }, { | ||
42 | .start = MX28_INT_RTC_ALARM, | ||
43 | .end = MX28_INT_RTC_ALARM, | ||
44 | .flags = IORESOURCE_IRQ, | ||
45 | }, | ||
46 | }; | ||
47 | |||
48 | return mxs_add_platform_device("stmp3xxx-rtc", 0, res, ARRAY_SIZE(res), | ||
49 | NULL, 0); | ||
50 | } | ||
51 | #endif /* CONFIG_SOC_IMX28 */ | ||
diff --git a/arch/arm/mach-mxs/include/mach/devices-common.h b/arch/arm/mach-mxs/include/mach/devices-common.h index 812d7a813a78..a8080f44c03d 100644 --- a/arch/arm/mach-mxs/include/mach/devices-common.h +++ b/arch/arm/mach-mxs/include/mach/devices-common.h | |||
@@ -92,3 +92,15 @@ struct platform_device *__init mxs_add_mxs_mmc( | |||
92 | /* pwm */ | 92 | /* pwm */ |
93 | struct platform_device *__init mxs_add_mxs_pwm( | 93 | struct platform_device *__init mxs_add_mxs_pwm( |
94 | resource_size_t iobase, int id); | 94 | resource_size_t iobase, int id); |
95 | |||
96 | /* saif */ | ||
97 | struct mxs_saif_data { | ||
98 | int id; | ||
99 | resource_size_t iobase; | ||
100 | resource_size_t irq; | ||
101 | resource_size_t dma; | ||
102 | resource_size_t dmairq; | ||
103 | }; | ||
104 | |||
105 | struct platform_device *__init mxs_add_saif( | ||
106 | const struct mxs_saif_data *data); | ||
diff --git a/arch/arm/mach-mxs/mach-mx23evk.c b/arch/arm/mach-mxs/mach-mx23evk.c index 69e218de536e..c325fbe4e4c6 100644 --- a/arch/arm/mach-mxs/mach-mx23evk.c +++ b/arch/arm/mach-mxs/mach-mx23evk.c | |||
@@ -166,6 +166,7 @@ static void __init mx23evk_init(void) | |||
166 | gpio_set_value(MX23EVK_BL_ENABLE, 1); | 166 | gpio_set_value(MX23EVK_BL_ENABLE, 1); |
167 | 167 | ||
168 | mx23_add_mxsfb(&mx23evk_mxsfb_pdata); | 168 | mx23_add_mxsfb(&mx23evk_mxsfb_pdata); |
169 | mx23_add_rtc_stmp3xxx(); | ||
169 | } | 170 | } |
170 | 171 | ||
171 | static void __init mx23evk_timer_init(void) | 172 | static void __init mx23evk_timer_init(void) |
diff --git a/arch/arm/mach-mxs/mach-mx28evk.c b/arch/arm/mach-mxs/mach-mx28evk.c index 0173c3bce4ef..ac2316d53d3c 100644 --- a/arch/arm/mach-mxs/mach-mx28evk.c +++ b/arch/arm/mach-mxs/mach-mx28evk.c | |||
@@ -17,6 +17,9 @@ | |||
17 | #include <linux/gpio.h> | 17 | #include <linux/gpio.h> |
18 | #include <linux/leds.h> | 18 | #include <linux/leds.h> |
19 | #include <linux/clk.h> | 19 | #include <linux/clk.h> |
20 | #include <linux/i2c.h> | ||
21 | #include <linux/regulator/machine.h> | ||
22 | #include <linux/regulator/fixed.h> | ||
20 | 23 | ||
21 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
22 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
@@ -182,6 +185,24 @@ static const iomux_cfg_t mx28evk_pads[] __initconst = { | |||
182 | 185 | ||
183 | /* led */ | 186 | /* led */ |
184 | MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL, | 187 | MX28_PAD_AUART1_TX__GPIO_3_5 | MXS_PAD_CTRL, |
188 | |||
189 | /* I2C */ | ||
190 | MX28_PAD_I2C0_SCL__I2C0_SCL | | ||
191 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
192 | MX28_PAD_I2C0_SDA__I2C0_SDA | | ||
193 | (MXS_PAD_8MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
194 | |||
195 | /* saif0 & saif1 */ | ||
196 | MX28_PAD_SAIF0_MCLK__SAIF0_MCLK | | ||
197 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
198 | MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK | | ||
199 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
200 | MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK | | ||
201 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
202 | MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 | | ||
203 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
204 | MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 | | ||
205 | (MXS_PAD_12MA | MXS_PAD_3V3 | MXS_PAD_PULLUP), | ||
185 | }; | 206 | }; |
186 | 207 | ||
187 | /* led */ | 208 | /* led */ |
@@ -351,6 +372,50 @@ static struct mxs_mmc_platform_data mx28evk_mmc_pdata[] __initdata = { | |||
351 | }, | 372 | }, |
352 | }; | 373 | }; |
353 | 374 | ||
375 | static struct i2c_board_info mxs_i2c0_board_info[] __initdata = { | ||
376 | { | ||
377 | I2C_BOARD_INFO("sgtl5000", 0x0a), | ||
378 | }, | ||
379 | }; | ||
380 | |||
381 | #if defined(CONFIG_REGULATOR_FIXED_VOLTAGE) || defined(CONFIG_REGULATOR_FIXED_VOLTAGE_MODULE) | ||
382 | static struct regulator_consumer_supply mx28evk_audio_consumer_supplies[] = { | ||
383 | REGULATOR_SUPPLY("VDDA", "0-000a"), | ||
384 | REGULATOR_SUPPLY("VDDIO", "0-000a"), | ||
385 | }; | ||
386 | |||
387 | static struct regulator_init_data mx28evk_vdd_reg_init_data = { | ||
388 | .constraints = { | ||
389 | .name = "3V3", | ||
390 | .always_on = 1, | ||
391 | }, | ||
392 | .consumer_supplies = mx28evk_audio_consumer_supplies, | ||
393 | .num_consumer_supplies = ARRAY_SIZE(mx28evk_audio_consumer_supplies), | ||
394 | }; | ||
395 | |||
396 | static struct fixed_voltage_config mx28evk_vdd_pdata = { | ||
397 | .supply_name = "board-3V3", | ||
398 | .microvolts = 3300000, | ||
399 | .gpio = -EINVAL, | ||
400 | .enabled_at_boot = 1, | ||
401 | .init_data = &mx28evk_vdd_reg_init_data, | ||
402 | }; | ||
403 | static struct platform_device mx28evk_voltage_regulator = { | ||
404 | .name = "reg-fixed-voltage", | ||
405 | .id = -1, | ||
406 | .num_resources = 0, | ||
407 | .dev = { | ||
408 | .platform_data = &mx28evk_vdd_pdata, | ||
409 | }, | ||
410 | }; | ||
411 | static void __init mx28evk_add_regulators(void) | ||
412 | { | ||
413 | platform_device_register(&mx28evk_voltage_regulator); | ||
414 | } | ||
415 | #else | ||
416 | static void __init mx28evk_add_regulators(void) {} | ||
417 | #endif | ||
418 | |||
354 | static struct gpio mx28evk_lcd_gpios[] = { | 419 | static struct gpio mx28evk_lcd_gpios[] = { |
355 | { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" }, | 420 | { MX28EVK_LCD_ENABLE, GPIOF_OUT_INIT_HIGH, "lcd-enable" }, |
356 | { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, | 421 | { MX28EVK_BL_ENABLE, GPIOF_OUT_INIT_HIGH, "bl-enable" }, |
@@ -389,6 +454,18 @@ static void __init mx28evk_init(void) | |||
389 | else | 454 | else |
390 | mx28_add_mxsfb(&mx28evk_mxsfb_pdata); | 455 | mx28_add_mxsfb(&mx28evk_mxsfb_pdata); |
391 | 456 | ||
457 | mx28_add_saif(0); | ||
458 | mx28_add_saif(1); | ||
459 | |||
460 | mx28_add_mxs_i2c(0); | ||
461 | i2c_register_board_info(0, mxs_i2c0_board_info, | ||
462 | ARRAY_SIZE(mxs_i2c0_board_info)); | ||
463 | |||
464 | mx28evk_add_regulators(); | ||
465 | |||
466 | mxs_add_platform_device("mxs-sgtl5000", 0, NULL, 0, | ||
467 | NULL, 0); | ||
468 | |||
392 | /* power on mmc slot by writing 0 to the gpio */ | 469 | /* power on mmc slot by writing 0 to the gpio */ |
393 | ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, | 470 | ret = gpio_request_one(MX28EVK_MMC0_SLOT_POWER, GPIOF_OUT_INIT_LOW, |
394 | "mmc0-slot-power"); | 471 | "mmc0-slot-power"); |
@@ -403,6 +480,9 @@ static void __init mx28evk_init(void) | |||
403 | else | 480 | else |
404 | mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); | 481 | mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); |
405 | 482 | ||
483 | mx28_add_mxs_mmc(1, &mx28evk_mmc_pdata[1]); | ||
484 | mx28_add_rtc_stmp3xxx(); | ||
485 | |||
406 | gpio_led_register_device(0, &mx28evk_led_data); | 486 | gpio_led_register_device(0, &mx28evk_led_data); |
407 | } | 487 | } |
408 | 488 | ||
diff --git a/arch/arm/mach-mxs/mach-stmp378x_devb.c b/arch/arm/mach-mxs/mach-stmp378x_devb.c index 3fe5dd532145..177e53123a02 100644 --- a/arch/arm/mach-mxs/mach-stmp378x_devb.c +++ b/arch/arm/mach-mxs/mach-stmp378x_devb.c | |||
@@ -90,6 +90,7 @@ static void __init stmp378x_dvb_init(void) | |||
90 | 90 | ||
91 | mx23_add_duart(); | 91 | mx23_add_duart(); |
92 | mx23_add_auart0(); | 92 | mx23_add_auart0(); |
93 | mx23_add_rtc_stmp3xxx(); | ||
93 | 94 | ||
94 | /* power on mmc slot */ | 95 | /* power on mmc slot */ |
95 | ret = gpio_request_one(STMP378X_DEVB_MMC0_SLOT_POWER, | 96 | ret = gpio_request_one(STMP378X_DEVB_MMC0_SLOT_POWER, |
diff --git a/arch/arm/mach-mxs/mach-tx28.c b/arch/arm/mach-mxs/mach-tx28.c index 955593806fd2..9a1f0e7a338e 100644 --- a/arch/arm/mach-mxs/mach-tx28.c +++ b/arch/arm/mach-mxs/mach-tx28.c | |||
@@ -161,6 +161,7 @@ static void __init tx28_stk5v3_init(void) | |||
161 | i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, | 161 | i2c_register_board_info(0, tx28_stk5v3_i2c_boardinfo, |
162 | ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); | 162 | ARRAY_SIZE(tx28_stk5v3_i2c_boardinfo)); |
163 | mx28_add_mxs_mmc(0, &tx28_mmc0_pdata); | 163 | mx28_add_mxs_mmc(0, &tx28_mmc0_pdata); |
164 | mx28_add_rtc_stmp3xxx(); | ||
164 | } | 165 | } |
165 | 166 | ||
166 | static void __init tx28_timer_init(void) | 167 | static void __init tx28_timer_init(void) |
diff --git a/arch/arm/mach-tegra/Kconfig b/arch/arm/mach-tegra/Kconfig index d82ebab50e11..91aff7cb8284 100644 --- a/arch/arm/mach-tegra/Kconfig +++ b/arch/arm/mach-tegra/Kconfig | |||
@@ -69,6 +69,12 @@ config MACH_WARIO | |||
69 | help | 69 | help |
70 | Support for the Wario version of Seaboard | 70 | Support for the Wario version of Seaboard |
71 | 71 | ||
72 | config MACH_VENTANA | ||
73 | bool "Ventana board" | ||
74 | select MACH_TEGRA_DT | ||
75 | help | ||
76 | Support for the nVidia Ventana development platform | ||
77 | |||
72 | choice | 78 | choice |
73 | prompt "Low-level debug console UART" | 79 | prompt "Low-level debug console UART" |
74 | default TEGRA_DEBUG_UART_NONE | 80 | default TEGRA_DEBUG_UART_NONE |
diff --git a/arch/arm/mach-tegra/Makefile b/arch/arm/mach-tegra/Makefile index f11b9100114a..91a07e187208 100644 --- a/arch/arm/mach-tegra/Makefile +++ b/arch/arm/mach-tegra/Makefile | |||
@@ -31,6 +31,7 @@ obj-${CONFIG_MACH_SEABOARD} += board-seaboard-pinmux.o | |||
31 | 31 | ||
32 | obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o | 32 | obj-${CONFIG_MACH_TEGRA_DT} += board-dt.o |
33 | obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o | 33 | obj-${CONFIG_MACH_TEGRA_DT} += board-harmony-pinmux.o |
34 | obj-${CONFIG_MACH_TEGRA_DT} += board-seaboard-pinmux.o | ||
34 | 35 | ||
35 | obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o | 36 | obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice.o |
36 | obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o | 37 | obj-${CONFIG_MACH_TRIMSLICE} += board-trimslice-pinmux.o |
diff --git a/arch/arm/mach-tegra/Makefile.boot b/arch/arm/mach-tegra/Makefile.boot index 5e870d29eca1..bd12c9fb81e8 100644 --- a/arch/arm/mach-tegra/Makefile.boot +++ b/arch/arm/mach-tegra/Makefile.boot | |||
@@ -4,3 +4,4 @@ initrd_phys-$(CONFIG_ARCH_TEGRA_2x_SOC) := 0x00800000 | |||
4 | 4 | ||
5 | dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb | 5 | dtb-$(CONFIG_MACH_HARMONY) += tegra-harmony.dtb |
6 | dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb | 6 | dtb-$(CONFIG_MACH_SEABOARD) += tegra-seaboard.dtb |
7 | dtb-$(CONFIG_MACH_VENTANA) += tegra-ventana.dtb | ||
diff --git a/arch/arm/mach-tegra/board-dt.c b/arch/arm/mach-tegra/board-dt.c index 9f47e04446f3..d368f8dafcfd 100644 --- a/arch/arm/mach-tegra/board-dt.c +++ b/arch/arm/mach-tegra/board-dt.c | |||
@@ -47,7 +47,7 @@ | |||
47 | 47 | ||
48 | void harmony_pinmux_init(void); | 48 | void harmony_pinmux_init(void); |
49 | void seaboard_pinmux_init(void); | 49 | void seaboard_pinmux_init(void); |
50 | 50 | void ventana_pinmux_init(void); | |
51 | 51 | ||
52 | struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { | 52 | struct of_dev_auxdata tegra20_auxdata_lookup[] __initdata = { |
53 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), | 53 | OF_DEV_AUXDATA("nvidia,tegra20-sdhci", TEGRA_SDMMC1_BASE, "sdhci-tegra.0", NULL), |
@@ -80,9 +80,19 @@ static struct of_device_id tegra_dt_gic_match[] __initdata = { | |||
80 | {} | 80 | {} |
81 | }; | 81 | }; |
82 | 82 | ||
83 | static struct { | ||
84 | char *machine; | ||
85 | void (*init)(void); | ||
86 | } pinmux_configs[] = { | ||
87 | { "nvidia,harmony", harmony_pinmux_init }, | ||
88 | { "nvidia,seaboard", seaboard_pinmux_init }, | ||
89 | { "nvidia,ventana", ventana_pinmux_init }, | ||
90 | }; | ||
91 | |||
83 | static void __init tegra_dt_init(void) | 92 | static void __init tegra_dt_init(void) |
84 | { | 93 | { |
85 | struct device_node *node; | 94 | struct device_node *node; |
95 | int i; | ||
86 | 96 | ||
87 | node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match, | 97 | node = of_find_matching_node_by_address(NULL, tegra_dt_gic_match, |
88 | TEGRA_ARM_INT_DIST_BASE); | 98 | TEGRA_ARM_INT_DIST_BASE); |
@@ -91,10 +101,15 @@ static void __init tegra_dt_init(void) | |||
91 | 101 | ||
92 | tegra_clk_init_from_table(tegra_dt_clk_init_table); | 102 | tegra_clk_init_from_table(tegra_dt_clk_init_table); |
93 | 103 | ||
94 | if (of_machine_is_compatible("nvidia,harmony")) | 104 | for (i = 0; i < ARRAY_SIZE(pinmux_configs); i++) { |
95 | harmony_pinmux_init(); | 105 | if (of_machine_is_compatible(pinmux_configs[i].machine)) { |
96 | else if (of_machine_is_compatible("nvidia,seaboard")) | 106 | pinmux_configs[i].init(); |
97 | seaboard_pinmux_init(); | 107 | break; |
108 | } | ||
109 | } | ||
110 | |||
111 | WARN(i == ARRAY_SIZE(pinmux_configs), | ||
112 | "Unknown platform! Pinmuxing not initialized\n"); | ||
98 | 113 | ||
99 | /* | 114 | /* |
100 | * Finished with the static registrations now; fill in the missing | 115 | * Finished with the static registrations now; fill in the missing |
@@ -106,6 +121,7 @@ static void __init tegra_dt_init(void) | |||
106 | static const char * tegra_dt_board_compat[] = { | 121 | static const char * tegra_dt_board_compat[] = { |
107 | "nvidia,harmony", | 122 | "nvidia,harmony", |
108 | "nvidia,seaboard", | 123 | "nvidia,seaboard", |
124 | "nvidia,ventana", | ||
109 | NULL | 125 | NULL |
110 | }; | 126 | }; |
111 | 127 | ||
diff --git a/arch/arm/mach-tegra/board-harmony-pinmux.c b/arch/arm/mach-tegra/board-harmony-pinmux.c index 4d63e2e97a8d..e99b45618cd0 100644 --- a/arch/arm/mach-tegra/board-harmony-pinmux.c +++ b/arch/arm/mach-tegra/board-harmony-pinmux.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include "gpio-names.h" | 21 | #include "gpio-names.h" |
22 | #include "board-harmony.h" | 22 | #include "board-harmony.h" |
23 | #include "devices.h" | ||
23 | 24 | ||
24 | static struct tegra_pingroup_config harmony_pinmux[] = { | 25 | static struct tegra_pingroup_config harmony_pinmux[] = { |
25 | {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 26 | {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
@@ -140,6 +141,11 @@ static struct tegra_pingroup_config harmony_pinmux[] = { | |||
140 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 141 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
141 | }; | 142 | }; |
142 | 143 | ||
144 | static struct platform_device *pinmux_devices[] = { | ||
145 | &tegra_gpio_device, | ||
146 | &tegra_pinmux_device, | ||
147 | }; | ||
148 | |||
143 | static struct tegra_gpio_table gpio_table[] = { | 149 | static struct tegra_gpio_table gpio_table[] = { |
144 | { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, | 150 | { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, |
145 | { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, | 151 | { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, |
@@ -155,6 +161,8 @@ static struct tegra_gpio_table gpio_table[] = { | |||
155 | 161 | ||
156 | void harmony_pinmux_init(void) | 162 | void harmony_pinmux_init(void) |
157 | { | 163 | { |
164 | platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); | ||
165 | |||
158 | tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); | 166 | tegra_pinmux_config_table(harmony_pinmux, ARRAY_SIZE(harmony_pinmux)); |
159 | 167 | ||
160 | tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); | 168 | tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); |
diff --git a/arch/arm/mach-tegra/board-harmony-power.c b/arch/arm/mach-tegra/board-harmony-power.c index 5ad8b2f94f8d..21d1285731b3 100644 --- a/arch/arm/mach-tegra/board-harmony-power.c +++ b/arch/arm/mach-tegra/board-harmony-power.c | |||
@@ -18,10 +18,11 @@ | |||
18 | #include <linux/i2c.h> | 18 | #include <linux/i2c.h> |
19 | #include <linux/platform_device.h> | 19 | #include <linux/platform_device.h> |
20 | #include <linux/gpio.h> | 20 | #include <linux/gpio.h> |
21 | 21 | #include <linux/io.h> | |
22 | #include <linux/regulator/machine.h> | 22 | #include <linux/regulator/machine.h> |
23 | #include <linux/mfd/tps6586x.h> | 23 | #include <linux/mfd/tps6586x.h> |
24 | 24 | ||
25 | #include <mach/iomap.h> | ||
25 | #include <mach/irqs.h> | 26 | #include <mach/irqs.h> |
26 | 27 | ||
27 | #include "board-harmony.h" | 28 | #include "board-harmony.h" |
@@ -113,6 +114,16 @@ static struct i2c_board_info __initdata harmony_regulators[] = { | |||
113 | 114 | ||
114 | int __init harmony_regulator_init(void) | 115 | int __init harmony_regulator_init(void) |
115 | { | 116 | { |
117 | void __iomem *pmc = IO_ADDRESS(TEGRA_PMC_BASE); | ||
118 | u32 pmc_ctrl; | ||
119 | |||
120 | /* | ||
121 | * Configure the power management controller to trigger PMU | ||
122 | * interrupts when low | ||
123 | */ | ||
124 | pmc_ctrl = readl(pmc + PMC_CTRL); | ||
125 | writel(pmc_ctrl | PMC_CTRL_INTR_LOW, pmc + PMC_CTRL); | ||
126 | |||
116 | i2c_register_board_info(3, harmony_regulators, 1); | 127 | i2c_register_board_info(3, harmony_regulators, 1); |
117 | 128 | ||
118 | return 0; | 129 | return 0; |
diff --git a/arch/arm/mach-tegra/board-paz00-pinmux.c b/arch/arm/mach-tegra/board-paz00-pinmux.c index 22257697d3ee..fb20894862b0 100644 --- a/arch/arm/mach-tegra/board-paz00-pinmux.c +++ b/arch/arm/mach-tegra/board-paz00-pinmux.c | |||
@@ -20,6 +20,7 @@ | |||
20 | 20 | ||
21 | #include "gpio-names.h" | 21 | #include "gpio-names.h" |
22 | #include "board-paz00.h" | 22 | #include "board-paz00.h" |
23 | #include "devices.h" | ||
23 | 24 | ||
24 | static struct tegra_pingroup_config paz00_pinmux[] = { | 25 | static struct tegra_pingroup_config paz00_pinmux[] = { |
25 | {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 26 | {TEGRA_PINGROUP_ATA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
@@ -140,6 +141,11 @@ static struct tegra_pingroup_config paz00_pinmux[] = { | |||
140 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 141 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
141 | }; | 142 | }; |
142 | 143 | ||
144 | static struct platform_device *pinmux_devices[] = { | ||
145 | &tegra_gpio_device, | ||
146 | &tegra_pinmux_device, | ||
147 | }; | ||
148 | |||
143 | static struct tegra_gpio_table gpio_table[] = { | 149 | static struct tegra_gpio_table gpio_table[] = { |
144 | { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, | 150 | { .gpio = TEGRA_GPIO_SD1_CD, .enable = true }, |
145 | { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, | 151 | { .gpio = TEGRA_GPIO_SD1_WP, .enable = true }, |
@@ -152,6 +158,8 @@ static struct tegra_gpio_table gpio_table[] = { | |||
152 | 158 | ||
153 | void paz00_pinmux_init(void) | 159 | void paz00_pinmux_init(void) |
154 | { | 160 | { |
161 | platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); | ||
162 | |||
155 | tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); | 163 | tegra_pinmux_config_table(paz00_pinmux, ARRAY_SIZE(paz00_pinmux)); |
156 | 164 | ||
157 | tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); | 165 | tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); |
diff --git a/arch/arm/mach-tegra/board-seaboard-pinmux.c b/arch/arm/mach-tegra/board-seaboard-pinmux.c index 74f78b7e3f19..fbce31daa3c9 100644 --- a/arch/arm/mach-tegra/board-seaboard-pinmux.c +++ b/arch/arm/mach-tegra/board-seaboard-pinmux.c | |||
@@ -1,5 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2010 NVIDIA Corporation | 2 | * Copyright (C) 2010,2011 NVIDIA Corporation |
3 | * Copyright (C) 2011 Google, Inc. | ||
3 | * | 4 | * |
4 | * This software is licensed under the terms of the GNU General Public | 5 | * This software is licensed under the terms of the GNU General Public |
5 | * License version 2, as published by the Free Software Foundation, and | 6 | * License version 2, as published by the Free Software Foundation, and |
@@ -21,6 +22,7 @@ | |||
21 | 22 | ||
22 | #include "gpio-names.h" | 23 | #include "gpio-names.h" |
23 | #include "board-seaboard.h" | 24 | #include "board-seaboard.h" |
25 | #include "devices.h" | ||
24 | 26 | ||
25 | #define DEFAULT_DRIVE(_name) \ | 27 | #define DEFAULT_DRIVE(_name) \ |
26 | { \ | 28 | { \ |
@@ -157,10 +159,33 @@ static __initdata struct tegra_pingroup_config seaboard_pinmux[] = { | |||
157 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 159 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
158 | }; | 160 | }; |
159 | 161 | ||
162 | static __initdata struct tegra_pingroup_config ventana_pinmux[] = { | ||
163 | {TEGRA_PINGROUP_DAP3, TEGRA_MUX_DAP3, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | ||
164 | {TEGRA_PINGROUP_DDC, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | ||
165 | {TEGRA_PINGROUP_DTA, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, | ||
166 | {TEGRA_PINGROUP_DTB, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, | ||
167 | {TEGRA_PINGROUP_DTC, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, | ||
168 | {TEGRA_PINGROUP_DTD, TEGRA_MUX_VI, TEGRA_PUPD_PULL_DOWN, TEGRA_TRI_NORMAL}, | ||
169 | {TEGRA_PINGROUP_GMD, TEGRA_MUX_SFLASH, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | ||
170 | {TEGRA_PINGROUP_LPW0, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | ||
171 | {TEGRA_PINGROUP_LPW2, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | ||
172 | {TEGRA_PINGROUP_LSC1, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | ||
173 | {TEGRA_PINGROUP_LSCK, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | ||
174 | {TEGRA_PINGROUP_LSDA, TEGRA_MUX_RSVD4, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | ||
175 | {TEGRA_PINGROUP_PTA, TEGRA_MUX_RSVD2, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | ||
176 | {TEGRA_PINGROUP_SLXC, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | ||
177 | {TEGRA_PINGROUP_SLXK, TEGRA_MUX_SDIO3, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | ||
178 | {TEGRA_PINGROUP_SPIA, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | ||
179 | {TEGRA_PINGROUP_SPIC, TEGRA_MUX_GMI, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | ||
180 | {TEGRA_PINGROUP_SPIG, TEGRA_MUX_SPI2_ALT, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | ||
181 | }; | ||
160 | 182 | ||
183 | static struct platform_device *pinmux_devices[] = { | ||
184 | &tegra_gpio_device, | ||
185 | &tegra_pinmux_device, | ||
186 | }; | ||
161 | 187 | ||
162 | 188 | static struct tegra_gpio_table common_gpio_table[] = { | |
163 | static struct tegra_gpio_table gpio_table[] = { | ||
164 | { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, | 189 | { .gpio = TEGRA_GPIO_SD2_CD, .enable = true }, |
165 | { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, | 190 | { .gpio = TEGRA_GPIO_SD2_WP, .enable = true }, |
166 | { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, | 191 | { .gpio = TEGRA_GPIO_SD2_POWER, .enable = true }, |
@@ -171,12 +196,46 @@ static struct tegra_gpio_table gpio_table[] = { | |||
171 | { .gpio = TEGRA_GPIO_USB1, .enable = true }, | 196 | { .gpio = TEGRA_GPIO_USB1, .enable = true }, |
172 | }; | 197 | }; |
173 | 198 | ||
174 | void __init seaboard_pinmux_init(void) | 199 | static void __init update_pinmux(struct tegra_pingroup_config *newtbl, int size) |
200 | { | ||
201 | int i, j; | ||
202 | struct tegra_pingroup_config *new_pingroup, *base_pingroup; | ||
203 | |||
204 | /* Update base seaboard pinmux table with secondary board | ||
205 | * specific pinmux table table. | ||
206 | */ | ||
207 | for (i = 0; i < size; i++) { | ||
208 | new_pingroup = &newtbl[i]; | ||
209 | for (j = 0; j < ARRAY_SIZE(seaboard_pinmux); j++) { | ||
210 | base_pingroup = &seaboard_pinmux[j]; | ||
211 | if (new_pingroup->pingroup == base_pingroup->pingroup) { | ||
212 | *base_pingroup = *new_pingroup; | ||
213 | break; | ||
214 | } | ||
215 | } | ||
216 | } | ||
217 | } | ||
218 | |||
219 | void __init seaboard_common_pinmux_init(void) | ||
175 | { | 220 | { |
221 | platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); | ||
222 | |||
176 | tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); | 223 | tegra_pinmux_config_table(seaboard_pinmux, ARRAY_SIZE(seaboard_pinmux)); |
177 | 224 | ||
178 | tegra_drive_pinmux_config_table(seaboard_drive_pinmux, | 225 | tegra_drive_pinmux_config_table(seaboard_drive_pinmux, |
179 | ARRAY_SIZE(seaboard_drive_pinmux)); | 226 | ARRAY_SIZE(seaboard_drive_pinmux)); |
180 | 227 | ||
181 | tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); | 228 | tegra_gpio_config(common_gpio_table, ARRAY_SIZE(common_gpio_table)); |
229 | } | ||
230 | |||
231 | void __init seaboard_pinmux_init(void) | ||
232 | { | ||
233 | seaboard_common_pinmux_init(); | ||
182 | } | 234 | } |
235 | |||
236 | void __init ventana_pinmux_init(void) | ||
237 | { | ||
238 | update_pinmux(ventana_pinmux, ARRAY_SIZE(ventana_pinmux)); | ||
239 | seaboard_common_pinmux_init(); | ||
240 | } | ||
241 | |||
diff --git a/arch/arm/mach-tegra/board-trimslice-pinmux.c b/arch/arm/mach-tegra/board-trimslice-pinmux.c index bcb1916e68b9..4969dd28a04c 100644 --- a/arch/arm/mach-tegra/board-trimslice-pinmux.c +++ b/arch/arm/mach-tegra/board-trimslice-pinmux.c | |||
@@ -21,6 +21,7 @@ | |||
21 | 21 | ||
22 | #include "gpio-names.h" | 22 | #include "gpio-names.h" |
23 | #include "board-trimslice.h" | 23 | #include "board-trimslice.h" |
24 | #include "devices.h" | ||
24 | 25 | ||
25 | static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { | 26 | static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { |
26 | {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, | 27 | {TEGRA_PINGROUP_ATA, TEGRA_MUX_IDE, TEGRA_PUPD_NORMAL, TEGRA_TRI_TRISTATE}, |
@@ -141,6 +142,11 @@ static __initdata struct tegra_pingroup_config trimslice_pinmux[] = { | |||
141 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, | 142 | {TEGRA_PINGROUP_XM2D, TEGRA_MUX_NONE, TEGRA_PUPD_NORMAL, TEGRA_TRI_NORMAL}, |
142 | }; | 143 | }; |
143 | 144 | ||
145 | static struct platform_device *pinmux_devices[] = { | ||
146 | &tegra_gpio_device, | ||
147 | &tegra_pinmux_device, | ||
148 | }; | ||
149 | |||
144 | static struct tegra_gpio_table gpio_table[] = { | 150 | static struct tegra_gpio_table gpio_table[] = { |
145 | { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ | 151 | { .gpio = TRIMSLICE_GPIO_SD4_CD, .enable = true }, /* mmc4 cd */ |
146 | { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ | 152 | { .gpio = TRIMSLICE_GPIO_SD4_WP, .enable = true }, /* mmc4 wp */ |
@@ -151,6 +157,7 @@ static struct tegra_gpio_table gpio_table[] = { | |||
151 | 157 | ||
152 | void __init trimslice_pinmux_init(void) | 158 | void __init trimslice_pinmux_init(void) |
153 | { | 159 | { |
160 | platform_add_devices(pinmux_devices, ARRAY_SIZE(pinmux_devices)); | ||
154 | tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); | 161 | tegra_pinmux_config_table(trimslice_pinmux, ARRAY_SIZE(trimslice_pinmux)); |
155 | tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); | 162 | tegra_gpio_config(gpio_table, ARRAY_SIZE(gpio_table)); |
156 | } | 163 | } |
diff --git a/arch/arm/mach-tegra/devices.c b/arch/arm/mach-tegra/devices.c index 489e82b5282a..7a2a02dbd632 100644 --- a/arch/arm/mach-tegra/devices.c +++ b/arch/arm/mach-tegra/devices.c | |||
@@ -33,6 +33,90 @@ | |||
33 | #include "gpio-names.h" | 33 | #include "gpio-names.h" |
34 | #include "devices.h" | 34 | #include "devices.h" |
35 | 35 | ||
36 | static struct resource gpio_resource[] = { | ||
37 | [0] = { | ||
38 | .start = TEGRA_GPIO_BASE, | ||
39 | .end = TEGRA_GPIO_BASE + TEGRA_GPIO_SIZE-1, | ||
40 | .flags = IORESOURCE_MEM, | ||
41 | }, | ||
42 | [1] = { | ||
43 | .start = INT_GPIO1, | ||
44 | .end = INT_GPIO1, | ||
45 | .flags = IORESOURCE_IRQ, | ||
46 | }, | ||
47 | [2] = { | ||
48 | .start = INT_GPIO2, | ||
49 | .end = INT_GPIO2, | ||
50 | .flags = IORESOURCE_IRQ, | ||
51 | }, | ||
52 | [3] = { | ||
53 | .start = INT_GPIO3, | ||
54 | .end = INT_GPIO3, | ||
55 | .flags = IORESOURCE_IRQ, | ||
56 | }, | ||
57 | [4] = { | ||
58 | .start = INT_GPIO4, | ||
59 | .end = INT_GPIO4, | ||
60 | .flags = IORESOURCE_IRQ, | ||
61 | }, | ||
62 | [5] = { | ||
63 | .start = INT_GPIO5, | ||
64 | .end = INT_GPIO5, | ||
65 | .flags = IORESOURCE_IRQ, | ||
66 | }, | ||
67 | [6] = { | ||
68 | .start = INT_GPIO6, | ||
69 | .end = INT_GPIO6, | ||
70 | .flags = IORESOURCE_IRQ, | ||
71 | }, | ||
72 | [7] = { | ||
73 | .start = INT_GPIO7, | ||
74 | .end = INT_GPIO7, | ||
75 | .flags = IORESOURCE_IRQ, | ||
76 | }, | ||
77 | }; | ||
78 | |||
79 | struct platform_device tegra_gpio_device = { | ||
80 | .name = "tegra-gpio", | ||
81 | .id = -1, | ||
82 | .resource = gpio_resource, | ||
83 | .num_resources = ARRAY_SIZE(gpio_resource), | ||
84 | }; | ||
85 | |||
86 | static struct resource pinmux_resource[] = { | ||
87 | [0] = { | ||
88 | /* Tri-state registers */ | ||
89 | .start = TEGRA_APB_MISC_BASE + 0x14, | ||
90 | .end = TEGRA_APB_MISC_BASE + 0x20 + 3, | ||
91 | .flags = IORESOURCE_MEM, | ||
92 | }, | ||
93 | [1] = { | ||
94 | /* Mux registers */ | ||
95 | .start = TEGRA_APB_MISC_BASE + 0x80, | ||
96 | .end = TEGRA_APB_MISC_BASE + 0x9c + 3, | ||
97 | .flags = IORESOURCE_MEM, | ||
98 | }, | ||
99 | [2] = { | ||
100 | /* Pull-up/down registers */ | ||
101 | .start = TEGRA_APB_MISC_BASE + 0xa0, | ||
102 | .end = TEGRA_APB_MISC_BASE + 0xb0 + 3, | ||
103 | .flags = IORESOURCE_MEM, | ||
104 | }, | ||
105 | [3] = { | ||
106 | /* Pad control registers */ | ||
107 | .start = TEGRA_APB_MISC_BASE + 0x868, | ||
108 | .end = TEGRA_APB_MISC_BASE + 0x90c + 3, | ||
109 | .flags = IORESOURCE_MEM, | ||
110 | }, | ||
111 | }; | ||
112 | |||
113 | struct platform_device tegra_pinmux_device = { | ||
114 | .name = "tegra-pinmux", | ||
115 | .id = -1, | ||
116 | .resource = pinmux_resource, | ||
117 | .num_resources = ARRAY_SIZE(pinmux_resource), | ||
118 | }; | ||
119 | |||
36 | static struct resource i2c_resource1[] = { | 120 | static struct resource i2c_resource1[] = { |
37 | [0] = { | 121 | [0] = { |
38 | .start = INT_I2C, | 122 | .start = INT_I2C, |
diff --git a/arch/arm/mach-tegra/devices.h b/arch/arm/mach-tegra/devices.h index 4a7dc0a097d6..873ecb2f8ae6 100644 --- a/arch/arm/mach-tegra/devices.h +++ b/arch/arm/mach-tegra/devices.h | |||
@@ -21,6 +21,8 @@ | |||
21 | 21 | ||
22 | #include <linux/platform_device.h> | 22 | #include <linux/platform_device.h> |
23 | 23 | ||
24 | extern struct platform_device tegra_gpio_device; | ||
25 | extern struct platform_device tegra_pinmux_device; | ||
24 | extern struct platform_device tegra_sdhci_device1; | 26 | extern struct platform_device tegra_sdhci_device1; |
25 | extern struct platform_device tegra_sdhci_device2; | 27 | extern struct platform_device tegra_sdhci_device2; |
26 | extern struct platform_device tegra_sdhci_device3; | 28 | extern struct platform_device tegra_sdhci_device3; |
diff --git a/arch/arm/mach-tegra/include/mach/pinmux.h b/arch/arm/mach-tegra/include/mach/pinmux.h index defd8775defa..bb7dfdb61205 100644 --- a/arch/arm/mach-tegra/include/mach/pinmux.h +++ b/arch/arm/mach-tegra/include/mach/pinmux.h | |||
@@ -199,6 +199,7 @@ struct tegra_drive_pingroup_config { | |||
199 | 199 | ||
200 | struct tegra_drive_pingroup_desc { | 200 | struct tegra_drive_pingroup_desc { |
201 | const char *name; | 201 | const char *name; |
202 | s16 reg_bank; | ||
202 | s16 reg; | 203 | s16 reg; |
203 | }; | 204 | }; |
204 | 205 | ||
@@ -207,6 +208,9 @@ struct tegra_pingroup_desc { | |||
207 | int funcs[4]; | 208 | int funcs[4]; |
208 | int func_safe; | 209 | int func_safe; |
209 | int vddio; | 210 | int vddio; |
211 | s16 tri_bank; /* Register bank the tri_reg exists within */ | ||
212 | s16 mux_bank; /* Register bank the mux_reg exists within */ | ||
213 | s16 pupd_bank; /* Register bank the pupd_reg exists within */ | ||
210 | s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */ | 214 | s16 tri_reg; /* offset into the TRISTATE_REG_* register bank */ |
211 | s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ | 215 | s16 mux_reg; /* offset into the PIN_MUX_CTL_* register bank */ |
212 | s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */ | 216 | s16 pupd_reg; /* offset into the PULL_UPDOWN_REG_* register bank */ |
diff --git a/arch/arm/mach-tegra/pinmux-t2-tables.c b/arch/arm/mach-tegra/pinmux-t2-tables.c index a475367befa3..a0dc2bc28ed3 100644 --- a/arch/arm/mach-tegra/pinmux-t2-tables.c +++ b/arch/arm/mach-tegra/pinmux-t2-tables.c | |||
@@ -31,10 +31,16 @@ | |||
31 | #include <mach/pinmux.h> | 31 | #include <mach/pinmux.h> |
32 | #include <mach/suspend.h> | 32 | #include <mach/suspend.h> |
33 | 33 | ||
34 | #define TRISTATE_REG_A 0x14 | ||
35 | #define PIN_MUX_CTL_REG_A 0x80 | ||
36 | #define PULLUPDOWN_REG_A 0xa0 | ||
37 | #define PINGROUP_REG_A 0x868 | ||
38 | |||
34 | #define DRIVE_PINGROUP(pg_name, r) \ | 39 | #define DRIVE_PINGROUP(pg_name, r) \ |
35 | [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \ | 40 | [TEGRA_DRIVE_PINGROUP_ ## pg_name] = { \ |
36 | .name = #pg_name, \ | 41 | .name = #pg_name, \ |
37 | .reg = r \ | 42 | .reg_bank = 3, \ |
43 | .reg = ((r) - PINGROUP_REG_A) \ | ||
38 | } | 44 | } |
39 | 45 | ||
40 | const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = { | 46 | const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE_PINGROUP] = { |
@@ -90,11 +96,14 @@ const struct tegra_drive_pingroup_desc tegra_soc_drive_pingroups[TEGRA_MAX_DRIVE | |||
90 | TEGRA_MUX_ ## f3, \ | 96 | TEGRA_MUX_ ## f3, \ |
91 | }, \ | 97 | }, \ |
92 | .func_safe = TEGRA_MUX_ ## f_safe, \ | 98 | .func_safe = TEGRA_MUX_ ## f_safe, \ |
93 | .tri_reg = tri_r, \ | 99 | .tri_bank = 0, \ |
100 | .tri_reg = ((tri_r) - TRISTATE_REG_A), \ | ||
94 | .tri_bit = tri_b, \ | 101 | .tri_bit = tri_b, \ |
95 | .mux_reg = mux_r, \ | 102 | .mux_bank = 1, \ |
103 | .mux_reg = ((mux_r) - PIN_MUX_CTL_REG_A), \ | ||
96 | .mux_bit = mux_b, \ | 104 | .mux_bit = mux_b, \ |
97 | .pupd_reg = pupd_r, \ | 105 | .pupd_bank = 2, \ |
106 | .pupd_reg = ((pupd_r) - PULLUPDOWN_REG_A), \ | ||
98 | .pupd_bit = pupd_b, \ | 107 | .pupd_bit = pupd_b, \ |
99 | } | 108 | } |
100 | 109 | ||
@@ -217,62 +226,3 @@ const struct tegra_pingroup_desc tegra_soc_pingroups[TEGRA_MAX_PINGROUP] = { | |||
217 | PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30), | 226 | PINGROUP(XM2C, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 30), |
218 | PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28), | 227 | PINGROUP(XM2D, DDR, RSVD, RSVD, RSVD, RSVD, RSVD, -1, -1, -1, -1, 0xA8, 28), |
219 | }; | 228 | }; |
220 | |||
221 | #ifdef CONFIG_PM | ||
222 | #define TRISTATE_REG_A 0x14 | ||
223 | #define TRISTATE_REG_NUM 4 | ||
224 | #define PIN_MUX_CTL_REG_A 0x80 | ||
225 | #define PIN_MUX_CTL_REG_NUM 8 | ||
226 | #define PULLUPDOWN_REG_A 0xa0 | ||
227 | #define PULLUPDOWN_REG_NUM 5 | ||
228 | |||
229 | static u32 pinmux_reg[TRISTATE_REG_NUM + PIN_MUX_CTL_REG_NUM + | ||
230 | PULLUPDOWN_REG_NUM + | ||
231 | ARRAY_SIZE(tegra_soc_drive_pingroups)]; | ||
232 | |||
233 | static inline unsigned long pg_readl(unsigned long offset) | ||
234 | { | ||
235 | return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); | ||
236 | } | ||
237 | |||
238 | static inline void pg_writel(unsigned long value, unsigned long offset) | ||
239 | { | ||
240 | writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); | ||
241 | } | ||
242 | |||
243 | void tegra_pinmux_suspend(void) | ||
244 | { | ||
245 | unsigned int i; | ||
246 | u32 *ctx = pinmux_reg; | ||
247 | |||
248 | for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) | ||
249 | *ctx++ = pg_readl(PIN_MUX_CTL_REG_A + i*4); | ||
250 | |||
251 | for (i = 0; i < PULLUPDOWN_REG_NUM; i++) | ||
252 | *ctx++ = pg_readl(PULLUPDOWN_REG_A + i*4); | ||
253 | |||
254 | for (i = 0; i < TRISTATE_REG_NUM; i++) | ||
255 | *ctx++ = pg_readl(TRISTATE_REG_A + i*4); | ||
256 | |||
257 | for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) | ||
258 | *ctx++ = pg_readl(tegra_soc_drive_pingroups[i].reg); | ||
259 | } | ||
260 | |||
261 | void tegra_pinmux_resume(void) | ||
262 | { | ||
263 | unsigned int i; | ||
264 | u32 *ctx = pinmux_reg; | ||
265 | |||
266 | for (i = 0; i < PIN_MUX_CTL_REG_NUM; i++) | ||
267 | pg_writel(*ctx++, PIN_MUX_CTL_REG_A + i*4); | ||
268 | |||
269 | for (i = 0; i < PULLUPDOWN_REG_NUM; i++) | ||
270 | pg_writel(*ctx++, PULLUPDOWN_REG_A + i*4); | ||
271 | |||
272 | for (i = 0; i < TRISTATE_REG_NUM; i++) | ||
273 | pg_writel(*ctx++, TRISTATE_REG_A + i*4); | ||
274 | |||
275 | for (i = 0; i < ARRAY_SIZE(tegra_soc_drive_pingroups); i++) | ||
276 | pg_writel(*ctx++, tegra_soc_drive_pingroups[i].reg); | ||
277 | } | ||
278 | #endif | ||
diff --git a/arch/arm/mach-tegra/pinmux.c b/arch/arm/mach-tegra/pinmux.c index f80d507671bc..1d201650d7a4 100644 --- a/arch/arm/mach-tegra/pinmux.c +++ b/arch/arm/mach-tegra/pinmux.c | |||
@@ -20,6 +20,7 @@ | |||
20 | #include <linux/errno.h> | 20 | #include <linux/errno.h> |
21 | #include <linux/spinlock.h> | 21 | #include <linux/spinlock.h> |
22 | #include <linux/io.h> | 22 | #include <linux/io.h> |
23 | #include <linux/platform_device.h> | ||
23 | 24 | ||
24 | #include <mach/iomap.h> | 25 | #include <mach/iomap.h> |
25 | #include <mach/pinmux.h> | 26 | #include <mach/pinmux.h> |
@@ -169,15 +170,17 @@ static const char *pupd_name(unsigned long val) | |||
169 | } | 170 | } |
170 | } | 171 | } |
171 | 172 | ||
173 | static int nbanks; | ||
174 | static void __iomem **regs; | ||
172 | 175 | ||
173 | static inline unsigned long pg_readl(unsigned long offset) | 176 | static inline u32 pg_readl(u32 bank, u32 reg) |
174 | { | 177 | { |
175 | return readl(IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); | 178 | return readl(regs[bank] + reg); |
176 | } | 179 | } |
177 | 180 | ||
178 | static inline void pg_writel(unsigned long value, unsigned long offset) | 181 | static inline void pg_writel(u32 val, u32 bank, u32 reg) |
179 | { | 182 | { |
180 | writel(value, IO_TO_VIRT(TEGRA_APB_MISC_BASE + offset)); | 183 | writel(val, regs[bank] + reg); |
181 | } | 184 | } |
182 | 185 | ||
183 | static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config) | 186 | static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config) |
@@ -217,10 +220,10 @@ static int tegra_pinmux_set_func(const struct tegra_pingroup_config *config) | |||
217 | 220 | ||
218 | spin_lock_irqsave(&mux_lock, flags); | 221 | spin_lock_irqsave(&mux_lock, flags); |
219 | 222 | ||
220 | reg = pg_readl(pingroups[pg].mux_reg); | 223 | reg = pg_readl(pingroups[pg].mux_bank, pingroups[pg].mux_reg); |
221 | reg &= ~(0x3 << pingroups[pg].mux_bit); | 224 | reg &= ~(0x3 << pingroups[pg].mux_bit); |
222 | reg |= mux << pingroups[pg].mux_bit; | 225 | reg |= mux << pingroups[pg].mux_bit; |
223 | pg_writel(reg, pingroups[pg].mux_reg); | 226 | pg_writel(reg, pingroups[pg].mux_bank, pingroups[pg].mux_reg); |
224 | 227 | ||
225 | spin_unlock_irqrestore(&mux_lock, flags); | 228 | spin_unlock_irqrestore(&mux_lock, flags); |
226 | 229 | ||
@@ -241,11 +244,11 @@ int tegra_pinmux_set_tristate(enum tegra_pingroup pg, | |||
241 | 244 | ||
242 | spin_lock_irqsave(&mux_lock, flags); | 245 | spin_lock_irqsave(&mux_lock, flags); |
243 | 246 | ||
244 | reg = pg_readl(pingroups[pg].tri_reg); | 247 | reg = pg_readl(pingroups[pg].tri_bank, pingroups[pg].tri_reg); |
245 | reg &= ~(0x1 << pingroups[pg].tri_bit); | 248 | reg &= ~(0x1 << pingroups[pg].tri_bit); |
246 | if (tristate) | 249 | if (tristate) |
247 | reg |= 1 << pingroups[pg].tri_bit; | 250 | reg |= 1 << pingroups[pg].tri_bit; |
248 | pg_writel(reg, pingroups[pg].tri_reg); | 251 | pg_writel(reg, pingroups[pg].tri_bank, pingroups[pg].tri_reg); |
249 | 252 | ||
250 | spin_unlock_irqrestore(&mux_lock, flags); | 253 | spin_unlock_irqrestore(&mux_lock, flags); |
251 | 254 | ||
@@ -272,10 +275,10 @@ int tegra_pinmux_set_pullupdown(enum tegra_pingroup pg, | |||
272 | 275 | ||
273 | spin_lock_irqsave(&mux_lock, flags); | 276 | spin_lock_irqsave(&mux_lock, flags); |
274 | 277 | ||
275 | reg = pg_readl(pingroups[pg].pupd_reg); | 278 | reg = pg_readl(pingroups[pg].pupd_bank, pingroups[pg].pupd_reg); |
276 | reg &= ~(0x3 << pingroups[pg].pupd_bit); | 279 | reg &= ~(0x3 << pingroups[pg].pupd_bit); |
277 | reg |= pupd << pingroups[pg].pupd_bit; | 280 | reg |= pupd << pingroups[pg].pupd_bit; |
278 | pg_writel(reg, pingroups[pg].pupd_reg); | 281 | pg_writel(reg, pingroups[pg].pupd_bank, pingroups[pg].pupd_reg); |
279 | 282 | ||
280 | spin_unlock_irqrestore(&mux_lock, flags); | 283 | spin_unlock_irqrestore(&mux_lock, flags); |
281 | 284 | ||
@@ -362,12 +365,12 @@ static int tegra_drive_pinmux_set_hsm(enum tegra_drive_pingroup pg, | |||
362 | 365 | ||
363 | spin_lock_irqsave(&mux_lock, flags); | 366 | spin_lock_irqsave(&mux_lock, flags); |
364 | 367 | ||
365 | reg = pg_readl(drive_pingroups[pg].reg); | 368 | reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
366 | if (hsm == TEGRA_HSM_ENABLE) | 369 | if (hsm == TEGRA_HSM_ENABLE) |
367 | reg |= (1 << 2); | 370 | reg |= (1 << 2); |
368 | else | 371 | else |
369 | reg &= ~(1 << 2); | 372 | reg &= ~(1 << 2); |
370 | pg_writel(reg, drive_pingroups[pg].reg); | 373 | pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
371 | 374 | ||
372 | spin_unlock_irqrestore(&mux_lock, flags); | 375 | spin_unlock_irqrestore(&mux_lock, flags); |
373 | 376 | ||
@@ -387,12 +390,12 @@ static int tegra_drive_pinmux_set_schmitt(enum tegra_drive_pingroup pg, | |||
387 | 390 | ||
388 | spin_lock_irqsave(&mux_lock, flags); | 391 | spin_lock_irqsave(&mux_lock, flags); |
389 | 392 | ||
390 | reg = pg_readl(drive_pingroups[pg].reg); | 393 | reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
391 | if (schmitt == TEGRA_SCHMITT_ENABLE) | 394 | if (schmitt == TEGRA_SCHMITT_ENABLE) |
392 | reg |= (1 << 3); | 395 | reg |= (1 << 3); |
393 | else | 396 | else |
394 | reg &= ~(1 << 3); | 397 | reg &= ~(1 << 3); |
395 | pg_writel(reg, drive_pingroups[pg].reg); | 398 | pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
396 | 399 | ||
397 | spin_unlock_irqrestore(&mux_lock, flags); | 400 | spin_unlock_irqrestore(&mux_lock, flags); |
398 | 401 | ||
@@ -412,10 +415,10 @@ static int tegra_drive_pinmux_set_drive(enum tegra_drive_pingroup pg, | |||
412 | 415 | ||
413 | spin_lock_irqsave(&mux_lock, flags); | 416 | spin_lock_irqsave(&mux_lock, flags); |
414 | 417 | ||
415 | reg = pg_readl(drive_pingroups[pg].reg); | 418 | reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
416 | reg &= ~(0x3 << 4); | 419 | reg &= ~(0x3 << 4); |
417 | reg |= drive << 4; | 420 | reg |= drive << 4; |
418 | pg_writel(reg, drive_pingroups[pg].reg); | 421 | pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
419 | 422 | ||
420 | spin_unlock_irqrestore(&mux_lock, flags); | 423 | spin_unlock_irqrestore(&mux_lock, flags); |
421 | 424 | ||
@@ -435,10 +438,10 @@ static int tegra_drive_pinmux_set_pull_down(enum tegra_drive_pingroup pg, | |||
435 | 438 | ||
436 | spin_lock_irqsave(&mux_lock, flags); | 439 | spin_lock_irqsave(&mux_lock, flags); |
437 | 440 | ||
438 | reg = pg_readl(drive_pingroups[pg].reg); | 441 | reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
439 | reg &= ~(0x1f << 12); | 442 | reg &= ~(0x1f << 12); |
440 | reg |= pull_down << 12; | 443 | reg |= pull_down << 12; |
441 | pg_writel(reg, drive_pingroups[pg].reg); | 444 | pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
442 | 445 | ||
443 | spin_unlock_irqrestore(&mux_lock, flags); | 446 | spin_unlock_irqrestore(&mux_lock, flags); |
444 | 447 | ||
@@ -458,10 +461,10 @@ static int tegra_drive_pinmux_set_pull_up(enum tegra_drive_pingroup pg, | |||
458 | 461 | ||
459 | spin_lock_irqsave(&mux_lock, flags); | 462 | spin_lock_irqsave(&mux_lock, flags); |
460 | 463 | ||
461 | reg = pg_readl(drive_pingroups[pg].reg); | 464 | reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
462 | reg &= ~(0x1f << 12); | 465 | reg &= ~(0x1f << 12); |
463 | reg |= pull_up << 12; | 466 | reg |= pull_up << 12; |
464 | pg_writel(reg, drive_pingroups[pg].reg); | 467 | pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
465 | 468 | ||
466 | spin_unlock_irqrestore(&mux_lock, flags); | 469 | spin_unlock_irqrestore(&mux_lock, flags); |
467 | 470 | ||
@@ -481,10 +484,10 @@ static int tegra_drive_pinmux_set_slew_rising(enum tegra_drive_pingroup pg, | |||
481 | 484 | ||
482 | spin_lock_irqsave(&mux_lock, flags); | 485 | spin_lock_irqsave(&mux_lock, flags); |
483 | 486 | ||
484 | reg = pg_readl(drive_pingroups[pg].reg); | 487 | reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
485 | reg &= ~(0x3 << 28); | 488 | reg &= ~(0x3 << 28); |
486 | reg |= slew_rising << 28; | 489 | reg |= slew_rising << 28; |
487 | pg_writel(reg, drive_pingroups[pg].reg); | 490 | pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
488 | 491 | ||
489 | spin_unlock_irqrestore(&mux_lock, flags); | 492 | spin_unlock_irqrestore(&mux_lock, flags); |
490 | 493 | ||
@@ -504,10 +507,10 @@ static int tegra_drive_pinmux_set_slew_falling(enum tegra_drive_pingroup pg, | |||
504 | 507 | ||
505 | spin_lock_irqsave(&mux_lock, flags); | 508 | spin_lock_irqsave(&mux_lock, flags); |
506 | 509 | ||
507 | reg = pg_readl(drive_pingroups[pg].reg); | 510 | reg = pg_readl(drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
508 | reg &= ~(0x3 << 30); | 511 | reg &= ~(0x3 << 30); |
509 | reg |= slew_falling << 30; | 512 | reg |= slew_falling << 30; |
510 | pg_writel(reg, drive_pingroups[pg].reg); | 513 | pg_writel(reg, drive_pingroups[pg].reg_bank, drive_pingroups[pg].reg); |
511 | 514 | ||
512 | spin_unlock_irqrestore(&mux_lock, flags); | 515 | spin_unlock_irqrestore(&mux_lock, flags); |
513 | 516 | ||
@@ -665,6 +668,99 @@ void tegra_pinmux_config_pullupdown_table(const struct tegra_pingroup_config *co | |||
665 | } | 668 | } |
666 | } | 669 | } |
667 | 670 | ||
671 | static int __devinit tegra_pinmux_probe(struct platform_device *pdev) | ||
672 | { | ||
673 | struct resource *res; | ||
674 | int i; | ||
675 | int config_bad = 0; | ||
676 | |||
677 | for (i = 0; ; i++) { | ||
678 | res = platform_get_resource(pdev, IORESOURCE_MEM, i); | ||
679 | if (!res) | ||
680 | break; | ||
681 | } | ||
682 | nbanks = i; | ||
683 | |||
684 | for (i = 0; i < TEGRA_MAX_PINGROUP; i++) { | ||
685 | if (pingroups[i].tri_bank >= nbanks) { | ||
686 | dev_err(&pdev->dev, "pingroup %d: bad tri_bank\n", i); | ||
687 | config_bad = 1; | ||
688 | } | ||
689 | |||
690 | if (pingroups[i].mux_bank >= nbanks) { | ||
691 | dev_err(&pdev->dev, "pingroup %d: bad mux_bank\n", i); | ||
692 | config_bad = 1; | ||
693 | } | ||
694 | |||
695 | if (pingroups[i].pupd_bank >= nbanks) { | ||
696 | dev_err(&pdev->dev, "pingroup %d: bad pupd_bank\n", i); | ||
697 | config_bad = 1; | ||
698 | } | ||
699 | } | ||
700 | |||
701 | for (i = 0; i < TEGRA_MAX_DRIVE_PINGROUP; i++) { | ||
702 | if (drive_pingroups[i].reg_bank >= nbanks) { | ||
703 | dev_err(&pdev->dev, | ||
704 | "drive pingroup %d: bad reg_bank\n", i); | ||
705 | config_bad = 1; | ||
706 | } | ||
707 | } | ||
708 | |||
709 | if (config_bad) | ||
710 | return -ENODEV; | ||
711 | |||
712 | regs = devm_kzalloc(&pdev->dev, nbanks * sizeof(*regs), GFP_KERNEL); | ||
713 | if (!regs) { | ||
714 | dev_err(&pdev->dev, "Can't alloc regs pointer\n"); | ||
715 | return -ENODEV; | ||
716 | } | ||
717 | |||
718 | for (i = 0; i < nbanks; i++) { | ||
719 | res = platform_get_resource(pdev, IORESOURCE_MEM, i); | ||
720 | if (!res) { | ||
721 | dev_err(&pdev->dev, "Missing MEM resource\n"); | ||
722 | return -ENODEV; | ||
723 | } | ||
724 | |||
725 | if (!devm_request_mem_region(&pdev->dev, res->start, | ||
726 | resource_size(res), | ||
727 | dev_name(&pdev->dev))) { | ||
728 | dev_err(&pdev->dev, | ||
729 | "Couldn't request MEM resource %d\n", i); | ||
730 | return -ENODEV; | ||
731 | } | ||
732 | |||
733 | regs[i] = devm_ioremap(&pdev->dev, res->start, | ||
734 | resource_size(res)); | ||
735 | if (!regs) { | ||
736 | dev_err(&pdev->dev, "Couldn't ioremap regs %d\n", i); | ||
737 | return -ENODEV; | ||
738 | } | ||
739 | } | ||
740 | |||
741 | return 0; | ||
742 | } | ||
743 | |||
744 | static struct of_device_id tegra_pinmux_of_match[] __devinitdata = { | ||
745 | { .compatible = "nvidia,tegra20-pinmux", }, | ||
746 | { }, | ||
747 | }; | ||
748 | |||
749 | static struct platform_driver tegra_pinmux_driver = { | ||
750 | .driver = { | ||
751 | .name = "tegra-pinmux", | ||
752 | .owner = THIS_MODULE, | ||
753 | .of_match_table = tegra_pinmux_of_match, | ||
754 | }, | ||
755 | .probe = tegra_pinmux_probe, | ||
756 | }; | ||
757 | |||
758 | static int __init tegra_pinmux_init(void) | ||
759 | { | ||
760 | return platform_driver_register(&tegra_pinmux_driver); | ||
761 | } | ||
762 | postcore_initcall(tegra_pinmux_init); | ||
763 | |||
668 | #ifdef CONFIG_DEBUG_FS | 764 | #ifdef CONFIG_DEBUG_FS |
669 | 765 | ||
670 | #include <linux/debugfs.h> | 766 | #include <linux/debugfs.h> |
@@ -684,6 +780,7 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) | |||
684 | int len; | 780 | int len; |
685 | 781 | ||
686 | for (i = 0; i < TEGRA_MAX_PINGROUP; i++) { | 782 | for (i = 0; i < TEGRA_MAX_PINGROUP; i++) { |
783 | unsigned long reg; | ||
687 | unsigned long tri; | 784 | unsigned long tri; |
688 | unsigned long mux; | 785 | unsigned long mux; |
689 | unsigned long pupd; | 786 | unsigned long pupd; |
@@ -696,8 +793,9 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) | |||
696 | seq_printf(s, "TEGRA_MUX_NONE"); | 793 | seq_printf(s, "TEGRA_MUX_NONE"); |
697 | len = strlen("NONE"); | 794 | len = strlen("NONE"); |
698 | } else { | 795 | } else { |
699 | mux = (pg_readl(pingroups[i].mux_reg) >> | 796 | reg = pg_readl(pingroups[i].mux_bank, |
700 | pingroups[i].mux_bit) & 0x3; | 797 | pingroups[i].mux_reg); |
798 | mux = (reg >> pingroups[i].mux_bit) & 0x3; | ||
701 | if (pingroups[i].funcs[mux] == TEGRA_MUX_RSVD) { | 799 | if (pingroups[i].funcs[mux] == TEGRA_MUX_RSVD) { |
702 | seq_printf(s, "TEGRA_MUX_RSVD%1lu", mux+1); | 800 | seq_printf(s, "TEGRA_MUX_RSVD%1lu", mux+1); |
703 | len = 5; | 801 | len = 5; |
@@ -713,8 +811,9 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) | |||
713 | seq_printf(s, "TEGRA_PUPD_NORMAL"); | 811 | seq_printf(s, "TEGRA_PUPD_NORMAL"); |
714 | len = strlen("NORMAL"); | 812 | len = strlen("NORMAL"); |
715 | } else { | 813 | } else { |
716 | pupd = (pg_readl(pingroups[i].pupd_reg) >> | 814 | reg = pg_readl(pingroups[i].pupd_bank, |
717 | pingroups[i].pupd_bit) & 0x3; | 815 | pingroups[i].pupd_reg); |
816 | pupd = (reg >> pingroups[i].pupd_bit) & 0x3; | ||
718 | seq_printf(s, "TEGRA_PUPD_%s", pupd_name(pupd)); | 817 | seq_printf(s, "TEGRA_PUPD_%s", pupd_name(pupd)); |
719 | len = strlen(pupd_name(pupd)); | 818 | len = strlen(pupd_name(pupd)); |
720 | } | 819 | } |
@@ -723,8 +822,9 @@ static int dbg_pinmux_show(struct seq_file *s, void *unused) | |||
723 | if (pingroups[i].tri_reg < 0) { | 822 | if (pingroups[i].tri_reg < 0) { |
724 | seq_printf(s, "TEGRA_TRI_NORMAL"); | 823 | seq_printf(s, "TEGRA_TRI_NORMAL"); |
725 | } else { | 824 | } else { |
726 | tri = (pg_readl(pingroups[i].tri_reg) >> | 825 | reg = pg_readl(pingroups[i].tri_bank, |
727 | pingroups[i].tri_bit) & 0x1; | 826 | pingroups[i].tri_reg); |
827 | tri = (reg >> pingroups[i].tri_bit) & 0x1; | ||
728 | 828 | ||
729 | seq_printf(s, "TEGRA_TRI_%s", tri_name(tri)); | 829 | seq_printf(s, "TEGRA_TRI_%s", tri_name(tri)); |
730 | } | 830 | } |
@@ -759,7 +859,8 @@ static int dbg_drive_pinmux_show(struct seq_file *s, void *unused) | |||
759 | dbg_pad_field(s, 7 - len); | 859 | dbg_pad_field(s, 7 - len); |
760 | 860 | ||
761 | 861 | ||
762 | reg = pg_readl(drive_pingroups[i].reg); | 862 | reg = pg_readl(drive_pingroups[i].reg_bank, |
863 | drive_pingroups[i].reg); | ||
763 | if (HSM_EN(reg)) { | 864 | if (HSM_EN(reg)) { |
764 | seq_printf(s, "TEGRA_HSM_ENABLE"); | 865 | seq_printf(s, "TEGRA_HSM_ENABLE"); |
765 | len = 16; | 866 | len = 16; |
diff --git a/arch/arm/plat-mxc/Kconfig b/arch/arm/plat-mxc/Kconfig index 4c8fdbcc9467..4bdc975581eb 100644 --- a/arch/arm/plat-mxc/Kconfig +++ b/arch/arm/plat-mxc/Kconfig | |||
@@ -4,50 +4,31 @@ source "arch/arm/plat-mxc/devices/Kconfig" | |||
4 | 4 | ||
5 | menu "Freescale MXC Implementations" | 5 | menu "Freescale MXC Implementations" |
6 | 6 | ||
7 | config ARCH_MX50_SUPPORTED | ||
8 | bool | ||
9 | |||
10 | config ARCH_MX53_SUPPORTED | ||
11 | bool | ||
12 | |||
13 | choice | 7 | choice |
14 | prompt "Freescale CPU family:" | 8 | prompt "Freescale CPU family:" |
15 | default ARCH_MX3 | 9 | default ARCH_MX3 |
16 | 10 | ||
17 | config ARCH_MX1 | 11 | config ARCH_IMX_V4_V5 |
18 | bool "MX1-based" | 12 | bool "i.MX1, i.MX21, i.MX25, i.MX27" |
19 | help | 13 | select AUTO_ZRELADDR |
20 | This enables support for systems based on the Freescale i.MX1 family | 14 | select ARM_PATCH_PHYS_VIRT |
21 | |||
22 | config ARCH_MX2 | ||
23 | bool "MX2-based" | ||
24 | help | ||
25 | This enables support for systems based on the Freescale i.MX2 family | ||
26 | |||
27 | config ARCH_MX25 | ||
28 | bool "MX25-based" | ||
29 | help | 15 | help |
30 | This enables support for systems based on the Freescale i.MX25 family | 16 | This enables support for systems based on the Freescale i.MX ARMv4 |
17 | and ARMv5 SoCs | ||
31 | 18 | ||
32 | config ARCH_MX3 | 19 | config ARCH_MX3 |
33 | bool "MX3-based" | 20 | bool "MX3-based" |
34 | help | 21 | help |
35 | This enables support for systems based on the Freescale i.MX3 family | 22 | This enables support for systems based on the Freescale i.MX3 family |
36 | 23 | ||
37 | config ARCH_MX503 | 24 | config ARCH_MX5 |
38 | bool "i.MX50 + i.MX53" | 25 | bool "i.MX50, i.MX51, i.MX53" |
39 | select ARCH_MX50_SUPPORTED | 26 | select AUTO_ZRELADDR |
40 | select ARCH_MX53_SUPPORTED | 27 | select ARM_PATCH_PHYS_VIRT |
41 | help | 28 | help |
42 | This enables support for machines using Freescale's i.MX50 and i.MX53 | 29 | This enables support for machines using Freescale's i.MX50 and i.MX53 |
43 | processors. | 30 | processors. |
44 | 31 | ||
45 | config ARCH_MX51 | ||
46 | bool "i.MX51" | ||
47 | select ARCH_MX51_SUPPORTED | ||
48 | help | ||
49 | This enables support for systems based on the Freescale i.MX51 family | ||
50 | |||
51 | endchoice | 32 | endchoice |
52 | 33 | ||
53 | source "arch/arm/mach-imx/Kconfig" | 34 | source "arch/arm/mach-imx/Kconfig" |
diff --git a/arch/arm/plat-mxc/avic.c b/arch/arm/plat-mxc/avic.c index 55d2534ec727..8875fb415f68 100644 --- a/arch/arm/plat-mxc/avic.c +++ b/arch/arm/plat-mxc/avic.c | |||
@@ -50,6 +50,8 @@ | |||
50 | 50 | ||
51 | void __iomem *avic_base; | 51 | void __iomem *avic_base; |
52 | 52 | ||
53 | static u32 avic_saved_mask_reg[2]; | ||
54 | |||
53 | #ifdef CONFIG_MXC_IRQ_PRIOR | 55 | #ifdef CONFIG_MXC_IRQ_PRIOR |
54 | static int avic_irq_set_priority(unsigned char irq, unsigned char prio) | 56 | static int avic_irq_set_priority(unsigned char irq, unsigned char prio) |
55 | { | 57 | { |
@@ -90,24 +92,8 @@ static int avic_set_irq_fiq(unsigned int irq, unsigned int type) | |||
90 | } | 92 | } |
91 | #endif /* CONFIG_FIQ */ | 93 | #endif /* CONFIG_FIQ */ |
92 | 94 | ||
93 | /* Disable interrupt number "irq" in the AVIC */ | ||
94 | static void mxc_mask_irq(struct irq_data *d) | ||
95 | { | ||
96 | __raw_writel(d->irq, avic_base + AVIC_INTDISNUM); | ||
97 | } | ||
98 | 95 | ||
99 | /* Enable interrupt number "irq" in the AVIC */ | 96 | static struct mxc_extra_irq avic_extra_irq = { |
100 | static void mxc_unmask_irq(struct irq_data *d) | ||
101 | { | ||
102 | __raw_writel(d->irq, avic_base + AVIC_INTENNUM); | ||
103 | } | ||
104 | |||
105 | static struct mxc_irq_chip mxc_avic_chip = { | ||
106 | .base = { | ||
107 | .irq_ack = mxc_mask_irq, | ||
108 | .irq_mask = mxc_mask_irq, | ||
109 | .irq_unmask = mxc_unmask_irq, | ||
110 | }, | ||
111 | #ifdef CONFIG_MXC_IRQ_PRIOR | 97 | #ifdef CONFIG_MXC_IRQ_PRIOR |
112 | .set_priority = avic_irq_set_priority, | 98 | .set_priority = avic_irq_set_priority, |
113 | #endif | 99 | #endif |
@@ -116,6 +102,68 @@ static struct mxc_irq_chip mxc_avic_chip = { | |||
116 | #endif | 102 | #endif |
117 | }; | 103 | }; |
118 | 104 | ||
105 | #ifdef CONFIG_PM | ||
106 | static void avic_irq_suspend(struct irq_data *d) | ||
107 | { | ||
108 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); | ||
109 | struct irq_chip_type *ct = gc->chip_types; | ||
110 | int idx = gc->irq_base >> 5; | ||
111 | |||
112 | avic_saved_mask_reg[idx] = __raw_readl(avic_base + ct->regs.mask); | ||
113 | __raw_writel(gc->wake_active, avic_base + ct->regs.mask); | ||
114 | } | ||
115 | |||
116 | static void avic_irq_resume(struct irq_data *d) | ||
117 | { | ||
118 | struct irq_chip_generic *gc = irq_data_get_irq_chip_data(d); | ||
119 | struct irq_chip_type *ct = gc->chip_types; | ||
120 | int idx = gc->irq_base >> 5; | ||
121 | |||
122 | __raw_writel(avic_saved_mask_reg[idx], avic_base + ct->regs.mask); | ||
123 | } | ||
124 | |||
125 | #else | ||
126 | #define avic_irq_suspend NULL | ||
127 | #define avic_irq_resume NULL | ||
128 | #endif | ||
129 | |||
130 | static __init void avic_init_gc(unsigned int irq_start) | ||
131 | { | ||
132 | struct irq_chip_generic *gc; | ||
133 | struct irq_chip_type *ct; | ||
134 | int idx = irq_start >> 5; | ||
135 | |||
136 | gc = irq_alloc_generic_chip("mxc-avic", 1, irq_start, avic_base, | ||
137 | handle_level_irq); | ||
138 | gc->private = &avic_extra_irq; | ||
139 | gc->wake_enabled = IRQ_MSK(32); | ||
140 | |||
141 | ct = gc->chip_types; | ||
142 | ct->chip.irq_mask = irq_gc_mask_clr_bit; | ||
143 | ct->chip.irq_unmask = irq_gc_mask_set_bit; | ||
144 | ct->chip.irq_ack = irq_gc_mask_clr_bit; | ||
145 | ct->chip.irq_set_wake = irq_gc_set_wake; | ||
146 | ct->chip.irq_suspend = avic_irq_suspend; | ||
147 | ct->chip.irq_resume = avic_irq_resume; | ||
148 | ct->regs.mask = !idx ? AVIC_INTENABLEL : AVIC_INTENABLEH; | ||
149 | ct->regs.ack = ct->regs.mask; | ||
150 | |||
151 | irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); | ||
152 | } | ||
153 | |||
154 | asmlinkage void __exception_irq_entry avic_handle_irq(struct pt_regs *regs) | ||
155 | { | ||
156 | u32 nivector; | ||
157 | |||
158 | do { | ||
159 | nivector = __raw_readl(avic_base + AVIC_NIVECSR) >> 16; | ||
160 | if (nivector == 0xffff) | ||
161 | break; | ||
162 | |||
163 | handle_IRQ(nivector, regs); | ||
164 | } while (1); | ||
165 | } | ||
166 | |||
119 | /* | 167 | /* |
120 | * This function initializes the AVIC hardware and disables all the | 168 | * This function initializes the AVIC hardware and disables all the |
121 | * interrupts. It registers the interrupt enable and disable functions | 169 | * interrupts. It registers the interrupt enable and disable functions |
@@ -140,11 +188,9 @@ void __init mxc_init_irq(void __iomem *irqbase) | |||
140 | /* all IRQ no FIQ */ | 188 | /* all IRQ no FIQ */ |
141 | __raw_writel(0, avic_base + AVIC_INTTYPEH); | 189 | __raw_writel(0, avic_base + AVIC_INTTYPEH); |
142 | __raw_writel(0, avic_base + AVIC_INTTYPEL); | 190 | __raw_writel(0, avic_base + AVIC_INTTYPEL); |
143 | for (i = 0; i < AVIC_NUM_IRQS; i++) { | 191 | |
144 | irq_set_chip_and_handler(i, &mxc_avic_chip.base, | 192 | for (i = 0; i < AVIC_NUM_IRQS; i += 32) |
145 | handle_level_irq); | 193 | avic_init_gc(i); |
146 | set_irq_flags(i, IRQF_VALID); | ||
147 | } | ||
148 | 194 | ||
149 | /* Set default priority value (0) for all IRQ's */ | 195 | /* Set default priority value (0) for all IRQ's */ |
150 | for (i = 0; i < 8; i++) | 196 | for (i = 0; i < 8; i++) |
@@ -157,4 +203,3 @@ void __init mxc_init_irq(void __iomem *irqbase) | |||
157 | 203 | ||
158 | printk(KERN_INFO "MXC IRQ initialized\n"); | 204 | printk(KERN_INFO "MXC IRQ initialized\n"); |
159 | } | 205 | } |
160 | |||
diff --git a/arch/arm/plat-mxc/cpu.c b/arch/arm/plat-mxc/cpu.c index 386e0d52cf58..f5b7e0fa237f 100644 --- a/arch/arm/plat-mxc/cpu.c +++ b/arch/arm/plat-mxc/cpu.c | |||
@@ -1,5 +1,6 @@ | |||
1 | 1 | ||
2 | #include <linux/module.h> | 2 | #include <linux/module.h> |
3 | #include <mach/hardware.h> | ||
3 | 4 | ||
4 | unsigned int __mxc_cpu_type; | 5 | unsigned int __mxc_cpu_type; |
5 | EXPORT_SYMBOL(__mxc_cpu_type); | 6 | EXPORT_SYMBOL(__mxc_cpu_type); |
@@ -9,3 +10,11 @@ void mxc_set_cpu_type(unsigned int type) | |||
9 | __mxc_cpu_type = type; | 10 | __mxc_cpu_type = type; |
10 | } | 11 | } |
11 | 12 | ||
13 | void imx_print_silicon_rev(const char *cpu, int srev) | ||
14 | { | ||
15 | if (srev == IMX_CHIP_REVISION_UNKNOWN) | ||
16 | pr_info("CPU identified as %s, unknown revision\n", cpu); | ||
17 | else | ||
18 | pr_info("CPU identified as %s, silicon rev %d.%d\n", | ||
19 | cpu, (srev >> 4) & 0xf, srev & 0xf); | ||
20 | } | ||
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h index d7149d1bd32c..ace4bb550edc 100644 --- a/arch/arm/plat-mxc/include/mach/common.h +++ b/arch/arm/plat-mxc/include/mach/common.h | |||
@@ -82,4 +82,19 @@ enum mxc_cpu_pwr_mode { | |||
82 | 82 | ||
83 | extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); | 83 | extern void mx5_cpu_lp_set(enum mxc_cpu_pwr_mode mode); |
84 | extern void (*imx_idle)(void); | 84 | extern void (*imx_idle)(void); |
85 | extern void imx_print_silicon_rev(const char *cpu, int srev); | ||
86 | |||
87 | void avic_handle_irq(struct pt_regs *); | ||
88 | void tzic_handle_irq(struct pt_regs *); | ||
89 | |||
90 | #define imx1_handle_irq avic_handle_irq | ||
91 | #define imx21_handle_irq avic_handle_irq | ||
92 | #define imx25_handle_irq avic_handle_irq | ||
93 | #define imx27_handle_irq avic_handle_irq | ||
94 | #define imx31_handle_irq avic_handle_irq | ||
95 | #define imx35_handle_irq avic_handle_irq | ||
96 | #define imx50_handle_irq tzic_handle_irq | ||
97 | #define imx51_handle_irq tzic_handle_irq | ||
98 | #define imx53_handle_irq tzic_handle_irq | ||
99 | |||
85 | #endif | 100 | #endif |
diff --git a/arch/arm/plat-mxc/include/mach/entry-macro.S b/arch/arm/plat-mxc/include/mach/entry-macro.S index 066d464d322d..842fbcb0d6cc 100644 --- a/arch/arm/plat-mxc/include/mach/entry-macro.S +++ b/arch/arm/plat-mxc/include/mach/entry-macro.S | |||
@@ -9,72 +9,16 @@ | |||
9 | * published by the Free Software Foundation. | 9 | * published by the Free Software Foundation. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <mach/hardware.h> | 12 | /* Unused, we use CONFIG_MULTI_IRQ_HANDLER */ |
13 | 13 | ||
14 | #define AVIC_NIMASK 0x04 | ||
15 | |||
16 | @ this macro disables fast irq (not implemented) | ||
17 | .macro disable_fiq | 14 | .macro disable_fiq |
18 | .endm | 15 | .endm |
19 | 16 | ||
20 | .macro get_irqnr_preamble, base, tmp | 17 | .macro get_irqnr_preamble, base, tmp |
21 | #ifndef CONFIG_MXC_TZIC | ||
22 | ldr \base, =avic_base | ||
23 | ldr \base, [\base] | ||
24 | #ifdef CONFIG_MXC_IRQ_PRIOR | ||
25 | ldr r4, [\base, #AVIC_NIMASK] | ||
26 | #endif | ||
27 | #elif defined CONFIG_MXC_TZIC | ||
28 | ldr \base, =tzic_base | ||
29 | ldr \base, [\base] | ||
30 | #endif /* CONFIG_MXC_TZIC */ | ||
31 | .endm | 18 | .endm |
32 | 19 | ||
33 | .macro arch_ret_to_user, tmp1, tmp2 | 20 | .macro arch_ret_to_user, tmp1, tmp2 |
34 | .endm | 21 | .endm |
35 | 22 | ||
36 | @ this macro checks which interrupt occurred | ||
37 | @ and returns its number in irqnr | ||
38 | @ and returns if an interrupt occurred in irqstat | ||
39 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp | 23 | .macro get_irqnr_and_base, irqnr, irqstat, base, tmp |
40 | #ifndef CONFIG_MXC_TZIC | ||
41 | @ Load offset & priority of the highest priority | ||
42 | @ interrupt pending from AVIC_NIVECSR | ||
43 | ldr \irqstat, [\base, #0x40] | ||
44 | @ Shift to get the decoded IRQ number, using ASR so | ||
45 | @ 'no interrupt pending' becomes 0xffffffff | ||
46 | mov \irqnr, \irqstat, asr #16 | ||
47 | @ set zero flag if IRQ + 1 == 0 | ||
48 | adds \tmp, \irqnr, #1 | ||
49 | #ifdef CONFIG_MXC_IRQ_PRIOR | ||
50 | bicne \tmp, \irqstat, #0xFFFFFFE0 | ||
51 | strne \tmp, [\base, #AVIC_NIMASK] | ||
52 | streq r4, [\base, #AVIC_NIMASK] | ||
53 | #endif | ||
54 | #elif defined CONFIG_MXC_TZIC | ||
55 | @ Load offset & priority of the highest priority | ||
56 | @ interrupt pending. | ||
57 | @ 0x080 is INTSEC0 register | ||
58 | @ 0xD80 is HIPND0 register | ||
59 | mov \irqnr, #0 | ||
60 | 1000: add \irqstat, \base, \irqnr, lsr #3 | ||
61 | ldr \tmp, [\irqstat, #0xd80] | ||
62 | ldr \irqstat, [\irqstat, #0x080] | ||
63 | ands \tmp, \tmp, \irqstat | ||
64 | bne 1001f | ||
65 | add \irqnr, \irqnr, #32 | ||
66 | cmp \irqnr, #128 | ||
67 | blo 1000b | ||
68 | b 2001f | ||
69 | 1001: mov \irqstat, #1 | ||
70 | 1002: tst \tmp, \irqstat | ||
71 | bne 2002f | ||
72 | movs \tmp, \tmp, lsr #1 | ||
73 | addne \irqnr, \irqnr, #1 | ||
74 | bne 1002b | ||
75 | 2001: | ||
76 | mov \irqnr, #0 | ||
77 | 2002: | ||
78 | movs \irqnr, \irqnr | ||
79 | #endif | ||
80 | .endm | 24 | .endm |
diff --git a/arch/arm/plat-mxc/include/mach/iomux-mx3.h b/arch/arm/plat-mxc/include/mach/iomux-mx3.h index c92f0b1f216f..63f22a009a65 100644 --- a/arch/arm/plat-mxc/include/mach/iomux-mx3.h +++ b/arch/arm/plat-mxc/include/mach/iomux-mx3.h | |||
@@ -735,6 +735,7 @@ enum iomux_pins { | |||
735 | #define MX31_PIN_KEY_COL5_KEY_COL5 IOMUX_MODE(MX31_PIN_KEY_COL5, IOMUX_CONFIG_FUNC) | 735 | #define MX31_PIN_KEY_COL5_KEY_COL5 IOMUX_MODE(MX31_PIN_KEY_COL5, IOMUX_CONFIG_FUNC) |
736 | #define MX31_PIN_KEY_COL6_KEY_COL6 IOMUX_MODE(MX31_PIN_KEY_COL6, IOMUX_CONFIG_FUNC) | 736 | #define MX31_PIN_KEY_COL6_KEY_COL6 IOMUX_MODE(MX31_PIN_KEY_COL6, IOMUX_CONFIG_FUNC) |
737 | #define MX31_PIN_KEY_COL7_KEY_COL7 IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_FUNC) | 737 | #define MX31_PIN_KEY_COL7_KEY_COL7 IOMUX_MODE(MX31_PIN_KEY_COL7, IOMUX_CONFIG_FUNC) |
738 | #define MX31_PIN_WATCHDOG_RST__WATCHDOG_RST IOMUX_MODE(MX31_PIN_WATCHDOG_RST, IOMUX_CONFIG_FUNC) | ||
738 | 739 | ||
739 | 740 | ||
740 | /* | 741 | /* |
diff --git a/arch/arm/plat-mxc/include/mach/mx25.h b/arch/arm/plat-mxc/include/mach/mx25.h index 087cd7ac8d52..ccebf5ba12f0 100644 --- a/arch/arm/plat-mxc/include/mach/mx25.h +++ b/arch/arm/plat-mxc/include/mach/mx25.h | |||
@@ -41,6 +41,7 @@ | |||
41 | #define MX25_SSI2_BASE_ADDR 0x50014000 | 41 | #define MX25_SSI2_BASE_ADDR 0x50014000 |
42 | #define MX25_SSI1_BASE_ADDR 0x50034000 | 42 | #define MX25_SSI1_BASE_ADDR 0x50034000 |
43 | #define MX25_NFC_BASE_ADDR 0xbb000000 | 43 | #define MX25_NFC_BASE_ADDR 0xbb000000 |
44 | #define MX25_IIM_BASE_ADDR 0x53ff0000 | ||
44 | #define MX25_DRYICE_BASE_ADDR 0x53ffc000 | 45 | #define MX25_DRYICE_BASE_ADDR 0x53ffc000 |
45 | #define MX25_ESDHC1_BASE_ADDR 0x53fb4000 | 46 | #define MX25_ESDHC1_BASE_ADDR 0x53fb4000 |
46 | #define MX25_ESDHC2_BASE_ADDR 0x53fb8000 | 47 | #define MX25_ESDHC2_BASE_ADDR 0x53fb8000 |
@@ -104,4 +105,8 @@ | |||
104 | #define MX25_DMA_REQ_SSI1_RX0 28 | 105 | #define MX25_DMA_REQ_SSI1_RX0 28 |
105 | #define MX25_DMA_REQ_SSI1_TX0 29 | 106 | #define MX25_DMA_REQ_SSI1_TX0 29 |
106 | 107 | ||
108 | #ifndef __ASSEMBLY__ | ||
109 | extern int mx25_revision(void); | ||
110 | #endif | ||
111 | |||
107 | #endif /* ifndef __MACH_MX25_H__ */ | 112 | #endif /* ifndef __MACH_MX25_H__ */ |
diff --git a/arch/arm/plat-mxc/include/mach/mx3x.h b/arch/arm/plat-mxc/include/mach/mx3x.h index 388a407d72d6..30dbf424583e 100644 --- a/arch/arm/plat-mxc/include/mach/mx3x.h +++ b/arch/arm/plat-mxc/include/mach/mx3x.h | |||
@@ -187,22 +187,8 @@ | |||
187 | /* Mandatory defines used globally */ | 187 | /* Mandatory defines used globally */ |
188 | 188 | ||
189 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) | 189 | #if !defined(__ASSEMBLY__) && !defined(__MXC_BOOT_UNCOMPRESS) |
190 | 190 | extern int mx35_revision(void); | |
191 | extern unsigned int mx31_cpu_rev; | 191 | extern int mx31_revision(void); |
192 | extern void mx31_read_cpu_rev(void); | ||
193 | |||
194 | static inline int mx31_revision(void) | ||
195 | { | ||
196 | return mx31_cpu_rev; | ||
197 | } | ||
198 | |||
199 | extern unsigned int mx35_cpu_rev; | ||
200 | extern void mx35_read_cpu_rev(void); | ||
201 | |||
202 | static inline int mx35_revision(void) | ||
203 | { | ||
204 | return mx35_cpu_rev; | ||
205 | } | ||
206 | #endif | 192 | #endif |
207 | 193 | ||
208 | #endif /* ifndef __MACH_MX3x_H__ */ | 194 | #endif /* ifndef __MACH_MX3x_H__ */ |
diff --git a/arch/arm/plat-mxc/irq-common.c b/arch/arm/plat-mxc/irq-common.c index 96953e2e4f11..b6e11458e5ae 100644 --- a/arch/arm/plat-mxc/irq-common.c +++ b/arch/arm/plat-mxc/irq-common.c | |||
@@ -23,17 +23,17 @@ | |||
23 | 23 | ||
24 | int imx_irq_set_priority(unsigned char irq, unsigned char prio) | 24 | int imx_irq_set_priority(unsigned char irq, unsigned char prio) |
25 | { | 25 | { |
26 | struct mxc_irq_chip *chip; | 26 | struct irq_chip_generic *gc; |
27 | struct irq_chip *base; | 27 | struct mxc_extra_irq *exirq; |
28 | int ret; | 28 | int ret; |
29 | 29 | ||
30 | ret = -ENOSYS; | 30 | ret = -ENOSYS; |
31 | 31 | ||
32 | base = irq_get_chip(irq); | 32 | gc = irq_get_chip_data(irq); |
33 | if (base) { | 33 | if (gc && gc->private) { |
34 | chip = container_of(base, struct mxc_irq_chip, base); | 34 | exirq = gc->private; |
35 | if (chip->set_priority) | 35 | if (exirq->set_priority) |
36 | ret = chip->set_priority(irq, prio); | 36 | ret = exirq->set_priority(irq, prio); |
37 | } | 37 | } |
38 | 38 | ||
39 | return ret; | 39 | return ret; |
@@ -43,15 +43,16 @@ EXPORT_SYMBOL(imx_irq_set_priority); | |||
43 | int mxc_set_irq_fiq(unsigned int irq, unsigned int type) | 43 | int mxc_set_irq_fiq(unsigned int irq, unsigned int type) |
44 | { | 44 | { |
45 | struct irq_chip_generic *gc; | 45 | struct irq_chip_generic *gc; |
46 | int (*set_irq_fiq)(unsigned int, unsigned int); | 46 | struct mxc_extra_irq *exirq; |
47 | int ret; | 47 | int ret; |
48 | 48 | ||
49 | ret = -ENOSYS; | 49 | ret = -ENOSYS; |
50 | 50 | ||
51 | gc = irq_get_chip_data(irq); | 51 | gc = irq_get_chip_data(irq); |
52 | if (gc && gc->private) { | 52 | if (gc && gc->private) { |
53 | set_irq_fiq = gc->private; | 53 | exirq = gc->private; |
54 | ret = set_irq_fiq(irq, type); | 54 | if (exirq->set_irq_fiq) |
55 | ret = exirq->set_irq_fiq(irq, type); | ||
55 | } | 56 | } |
56 | 57 | ||
57 | return ret; | 58 | return ret; |
diff --git a/arch/arm/plat-mxc/irq-common.h b/arch/arm/plat-mxc/irq-common.h index 7203543fb1b3..6ccb3a14c693 100644 --- a/arch/arm/plat-mxc/irq-common.h +++ b/arch/arm/plat-mxc/irq-common.h | |||
@@ -19,9 +19,8 @@ | |||
19 | #ifndef __PLAT_MXC_IRQ_COMMON_H__ | 19 | #ifndef __PLAT_MXC_IRQ_COMMON_H__ |
20 | #define __PLAT_MXC_IRQ_COMMON_H__ | 20 | #define __PLAT_MXC_IRQ_COMMON_H__ |
21 | 21 | ||
22 | struct mxc_irq_chip | 22 | struct mxc_extra_irq |
23 | { | 23 | { |
24 | struct irq_chip base; | ||
25 | int (*set_priority)(unsigned char irq, unsigned char prio); | 24 | int (*set_priority)(unsigned char irq, unsigned char prio); |
26 | int (*set_irq_fiq)(unsigned int irq, unsigned int type); | 25 | int (*set_irq_fiq)(unsigned int irq, unsigned int type); |
27 | }; | 26 | }; |
diff --git a/arch/arm/plat-mxc/pwm.c b/arch/arm/plat-mxc/pwm.c index 761c3c940a68..42d74ea59084 100644 --- a/arch/arm/plat-mxc/pwm.c +++ b/arch/arm/plat-mxc/pwm.c | |||
@@ -57,7 +57,7 @@ int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | |||
57 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) | 57 | if (pwm == NULL || period_ns == 0 || duty_ns > period_ns) |
58 | return -EINVAL; | 58 | return -EINVAL; |
59 | 59 | ||
60 | if (cpu_is_mx27() || cpu_is_mx3() || cpu_is_mx25() || cpu_is_mx51()) { | 60 | if (!(cpu_is_mx1() || cpu_is_mx21())) { |
61 | unsigned long long c; | 61 | unsigned long long c; |
62 | unsigned long period_cycles, duty_cycles, prescale; | 62 | unsigned long period_cycles, duty_cycles, prescale; |
63 | u32 cr; | 63 | u32 cr; |
diff --git a/arch/arm/plat-mxc/tzic.c b/arch/arm/plat-mxc/tzic.c index f257fccdc394..e993a184189a 100644 --- a/arch/arm/plat-mxc/tzic.c +++ b/arch/arm/plat-mxc/tzic.c | |||
@@ -42,7 +42,7 @@ | |||
42 | #define TZIC_SRCCLAR0 0x0280 /* Source Clear Register 0 */ | 42 | #define TZIC_SRCCLAR0 0x0280 /* Source Clear Register 0 */ |
43 | #define TZIC_PRIORITY0 0x0400 /* Priority Register 0 */ | 43 | #define TZIC_PRIORITY0 0x0400 /* Priority Register 0 */ |
44 | #define TZIC_PND0 0x0D00 /* Pending Register 0 */ | 44 | #define TZIC_PND0 0x0D00 /* Pending Register 0 */ |
45 | #define TZIC_HIPND0 0x0D80 /* High Priority Pending Register */ | 45 | #define TZIC_HIPND(i) (0x0D80+ ((i) << 2)) /* High Priority Pending Register */ |
46 | #define TZIC_WAKEUP0(i) (0x0E00 + ((i) << 2)) /* Wakeup Config Register */ | 46 | #define TZIC_WAKEUP0(i) (0x0E00 + ((i) << 2)) /* Wakeup Config Register */ |
47 | #define TZIC_SWINT 0x0F00 /* Software Interrupt Rigger Register */ | 47 | #define TZIC_SWINT 0x0F00 /* Software Interrupt Rigger Register */ |
48 | #define TZIC_ID0 0x0FD0 /* Indentification Register 0 */ | 48 | #define TZIC_ID0 0x0FD0 /* Indentification Register 0 */ |
@@ -74,6 +74,12 @@ static int tzic_set_irq_fiq(unsigned int irq, unsigned int type) | |||
74 | 74 | ||
75 | static unsigned int *wakeup_intr[4]; | 75 | static unsigned int *wakeup_intr[4]; |
76 | 76 | ||
77 | static struct mxc_extra_irq tzic_extra_irq = { | ||
78 | #ifdef CONFIG_FIQ | ||
79 | .set_irq_fiq = tzic_set_irq_fiq, | ||
80 | #endif | ||
81 | }; | ||
82 | |||
77 | static __init void tzic_init_gc(unsigned int irq_start) | 83 | static __init void tzic_init_gc(unsigned int irq_start) |
78 | { | 84 | { |
79 | struct irq_chip_generic *gc; | 85 | struct irq_chip_generic *gc; |
@@ -82,7 +88,7 @@ static __init void tzic_init_gc(unsigned int irq_start) | |||
82 | 88 | ||
83 | gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, | 89 | gc = irq_alloc_generic_chip("tzic", 1, irq_start, tzic_base, |
84 | handle_level_irq); | 90 | handle_level_irq); |
85 | gc->private = tzic_set_irq_fiq; | 91 | gc->private = &tzic_extra_irq; |
86 | gc->wake_enabled = IRQ_MSK(32); | 92 | gc->wake_enabled = IRQ_MSK(32); |
87 | wakeup_intr[idx] = &gc->wake_active; | 93 | wakeup_intr[idx] = &gc->wake_active; |
88 | 94 | ||
@@ -96,6 +102,28 @@ static __init void tzic_init_gc(unsigned int irq_start) | |||
96 | irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); | 102 | irq_setup_generic_chip(gc, IRQ_MSK(32), 0, IRQ_NOREQUEST, 0); |
97 | } | 103 | } |
98 | 104 | ||
105 | asmlinkage void __exception_irq_entry tzic_handle_irq(struct pt_regs *regs) | ||
106 | { | ||
107 | u32 stat; | ||
108 | int i, irqofs, handled; | ||
109 | |||
110 | do { | ||
111 | handled = 0; | ||
112 | |||
113 | for (i = 0; i < 4; i++) { | ||
114 | stat = __raw_readl(tzic_base + TZIC_HIPND(i)) & | ||
115 | __raw_readl(tzic_base + TZIC_INTSEC0(i)); | ||
116 | |||
117 | while (stat) { | ||
118 | handled = 1; | ||
119 | irqofs = fls(stat) - 1; | ||
120 | handle_IRQ(irqofs + i * 32, regs); | ||
121 | stat &= ~(1 << irqofs); | ||
122 | } | ||
123 | } | ||
124 | } while (handled); | ||
125 | } | ||
126 | |||
99 | /* | 127 | /* |
100 | * This function initializes the TZIC hardware and disables all the | 128 | * This function initializes the TZIC hardware and disables all the |
101 | * interrupts. It registers the interrupt enable and disable functions | 129 | * interrupts. It registers the interrupt enable and disable functions |
diff --git a/drivers/gpio/gpio-tegra.c b/drivers/gpio/gpio-tegra.c index 6b65207c8106..61044c889f7f 100644 --- a/drivers/gpio/gpio-tegra.c +++ b/drivers/gpio/gpio-tegra.c | |||
@@ -20,10 +20,11 @@ | |||
20 | #include <linux/init.h> | 20 | #include <linux/init.h> |
21 | #include <linux/irq.h> | 21 | #include <linux/irq.h> |
22 | #include <linux/interrupt.h> | 22 | #include <linux/interrupt.h> |
23 | |||
24 | #include <linux/io.h> | 23 | #include <linux/io.h> |
25 | #include <linux/gpio.h> | 24 | #include <linux/gpio.h> |
26 | #include <linux/of.h> | 25 | #include <linux/of.h> |
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/module.h> | ||
27 | 28 | ||
28 | #include <asm/mach/irq.h> | 29 | #include <asm/mach/irq.h> |
29 | 30 | ||
@@ -35,9 +36,7 @@ | |||
35 | #define GPIO_PORT(x) (((x) >> 3) & 0x3) | 36 | #define GPIO_PORT(x) (((x) >> 3) & 0x3) |
36 | #define GPIO_BIT(x) ((x) & 0x7) | 37 | #define GPIO_BIT(x) ((x) & 0x7) |
37 | 38 | ||
38 | #define GPIO_REG(x) (IO_TO_VIRT(TEGRA_GPIO_BASE) + \ | 39 | #define GPIO_REG(x) (GPIO_BANK(x) * 0x80 + GPIO_PORT(x) * 4) |
39 | GPIO_BANK(x) * 0x80 + \ | ||
40 | GPIO_PORT(x) * 4) | ||
41 | 40 | ||
42 | #define GPIO_CNF(x) (GPIO_REG(x) + 0x00) | 41 | #define GPIO_CNF(x) (GPIO_REG(x) + 0x00) |
43 | #define GPIO_OE(x) (GPIO_REG(x) + 0x10) | 42 | #define GPIO_OE(x) (GPIO_REG(x) + 0x10) |
@@ -76,15 +75,18 @@ struct tegra_gpio_bank { | |||
76 | }; | 75 | }; |
77 | 76 | ||
78 | 77 | ||
79 | static struct tegra_gpio_bank tegra_gpio_banks[] = { | 78 | static void __iomem *regs; |
80 | {.bank = 0, .irq = INT_GPIO1}, | 79 | static struct tegra_gpio_bank tegra_gpio_banks[7]; |
81 | {.bank = 1, .irq = INT_GPIO2}, | 80 | |
82 | {.bank = 2, .irq = INT_GPIO3}, | 81 | static inline void tegra_gpio_writel(u32 val, u32 reg) |
83 | {.bank = 3, .irq = INT_GPIO4}, | 82 | { |
84 | {.bank = 4, .irq = INT_GPIO5}, | 83 | __raw_writel(val, regs + reg); |
85 | {.bank = 5, .irq = INT_GPIO6}, | 84 | } |
86 | {.bank = 6, .irq = INT_GPIO7}, | 85 | |
87 | }; | 86 | static inline u32 tegra_gpio_readl(u32 reg) |
87 | { | ||
88 | return __raw_readl(regs + reg); | ||
89 | } | ||
88 | 90 | ||
89 | static int tegra_gpio_compose(int bank, int port, int bit) | 91 | static int tegra_gpio_compose(int bank, int port, int bit) |
90 | { | 92 | { |
@@ -98,7 +100,7 @@ static void tegra_gpio_mask_write(u32 reg, int gpio, int value) | |||
98 | val = 0x100 << GPIO_BIT(gpio); | 100 | val = 0x100 << GPIO_BIT(gpio); |
99 | if (value) | 101 | if (value) |
100 | val |= 1 << GPIO_BIT(gpio); | 102 | val |= 1 << GPIO_BIT(gpio); |
101 | __raw_writel(val, reg); | 103 | tegra_gpio_writel(val, reg); |
102 | } | 104 | } |
103 | 105 | ||
104 | void tegra_gpio_enable(int gpio) | 106 | void tegra_gpio_enable(int gpio) |
@@ -118,7 +120,7 @@ static void tegra_gpio_set(struct gpio_chip *chip, unsigned offset, int value) | |||
118 | 120 | ||
119 | static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset) | 121 | static int tegra_gpio_get(struct gpio_chip *chip, unsigned offset) |
120 | { | 122 | { |
121 | return (__raw_readl(GPIO_IN(offset)) >> GPIO_BIT(offset)) & 0x1; | 123 | return (tegra_gpio_readl(GPIO_IN(offset)) >> GPIO_BIT(offset)) & 0x1; |
122 | } | 124 | } |
123 | 125 | ||
124 | static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset) | 126 | static int tegra_gpio_direction_input(struct gpio_chip *chip, unsigned offset) |
@@ -155,7 +157,7 @@ static void tegra_gpio_irq_ack(struct irq_data *d) | |||
155 | { | 157 | { |
156 | int gpio = d->irq - INT_GPIO_BASE; | 158 | int gpio = d->irq - INT_GPIO_BASE; |
157 | 159 | ||
158 | __raw_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio)); | 160 | tegra_gpio_writel(1 << GPIO_BIT(gpio), GPIO_INT_CLR(gpio)); |
159 | } | 161 | } |
160 | 162 | ||
161 | static void tegra_gpio_irq_mask(struct irq_data *d) | 163 | static void tegra_gpio_irq_mask(struct irq_data *d) |
@@ -208,10 +210,10 @@ static int tegra_gpio_irq_set_type(struct irq_data *d, unsigned int type) | |||
208 | 210 | ||
209 | spin_lock_irqsave(&bank->lvl_lock[port], flags); | 211 | spin_lock_irqsave(&bank->lvl_lock[port], flags); |
210 | 212 | ||
211 | val = __raw_readl(GPIO_INT_LVL(gpio)); | 213 | val = tegra_gpio_readl(GPIO_INT_LVL(gpio)); |
212 | val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio)); | 214 | val &= ~(GPIO_INT_LVL_MASK << GPIO_BIT(gpio)); |
213 | val |= lvl_type << GPIO_BIT(gpio); | 215 | val |= lvl_type << GPIO_BIT(gpio); |
214 | __raw_writel(val, GPIO_INT_LVL(gpio)); | 216 | tegra_gpio_writel(val, GPIO_INT_LVL(gpio)); |
215 | 217 | ||
216 | spin_unlock_irqrestore(&bank->lvl_lock[port], flags); | 218 | spin_unlock_irqrestore(&bank->lvl_lock[port], flags); |
217 | 219 | ||
@@ -237,12 +239,12 @@ static void tegra_gpio_irq_handler(unsigned int irq, struct irq_desc *desc) | |||
237 | 239 | ||
238 | for (port = 0; port < 4; port++) { | 240 | for (port = 0; port < 4; port++) { |
239 | int gpio = tegra_gpio_compose(bank->bank, port, 0); | 241 | int gpio = tegra_gpio_compose(bank->bank, port, 0); |
240 | unsigned long sta = __raw_readl(GPIO_INT_STA(gpio)) & | 242 | unsigned long sta = tegra_gpio_readl(GPIO_INT_STA(gpio)) & |
241 | __raw_readl(GPIO_INT_ENB(gpio)); | 243 | tegra_gpio_readl(GPIO_INT_ENB(gpio)); |
242 | u32 lvl = __raw_readl(GPIO_INT_LVL(gpio)); | 244 | u32 lvl = tegra_gpio_readl(GPIO_INT_LVL(gpio)); |
243 | 245 | ||
244 | for_each_set_bit(pin, &sta, 8) { | 246 | for_each_set_bit(pin, &sta, 8) { |
245 | __raw_writel(1 << pin, GPIO_INT_CLR(gpio)); | 247 | tegra_gpio_writel(1 << pin, GPIO_INT_CLR(gpio)); |
246 | 248 | ||
247 | /* if gpio is edge triggered, clear condition | 249 | /* if gpio is edge triggered, clear condition |
248 | * before executing the hander so that we don't | 250 | * before executing the hander so that we don't |
@@ -276,11 +278,11 @@ void tegra_gpio_resume(void) | |||
276 | 278 | ||
277 | for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { | 279 | for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { |
278 | unsigned int gpio = (b<<5) | (p<<3); | 280 | unsigned int gpio = (b<<5) | (p<<3); |
279 | __raw_writel(bank->cnf[p], GPIO_CNF(gpio)); | 281 | tegra_gpio_writel(bank->cnf[p], GPIO_CNF(gpio)); |
280 | __raw_writel(bank->out[p], GPIO_OUT(gpio)); | 282 | tegra_gpio_writel(bank->out[p], GPIO_OUT(gpio)); |
281 | __raw_writel(bank->oe[p], GPIO_OE(gpio)); | 283 | tegra_gpio_writel(bank->oe[p], GPIO_OE(gpio)); |
282 | __raw_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio)); | 284 | tegra_gpio_writel(bank->int_lvl[p], GPIO_INT_LVL(gpio)); |
283 | __raw_writel(bank->int_enb[p], GPIO_INT_ENB(gpio)); | 285 | tegra_gpio_writel(bank->int_enb[p], GPIO_INT_ENB(gpio)); |
284 | } | 286 | } |
285 | } | 287 | } |
286 | 288 | ||
@@ -299,11 +301,11 @@ void tegra_gpio_suspend(void) | |||
299 | 301 | ||
300 | for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { | 302 | for (p = 0; p < ARRAY_SIZE(bank->oe); p++) { |
301 | unsigned int gpio = (b<<5) | (p<<3); | 303 | unsigned int gpio = (b<<5) | (p<<3); |
302 | bank->cnf[p] = __raw_readl(GPIO_CNF(gpio)); | 304 | bank->cnf[p] = tegra_gpio_readl(GPIO_CNF(gpio)); |
303 | bank->out[p] = __raw_readl(GPIO_OUT(gpio)); | 305 | bank->out[p] = tegra_gpio_readl(GPIO_OUT(gpio)); |
304 | bank->oe[p] = __raw_readl(GPIO_OE(gpio)); | 306 | bank->oe[p] = tegra_gpio_readl(GPIO_OE(gpio)); |
305 | bank->int_enb[p] = __raw_readl(GPIO_INT_ENB(gpio)); | 307 | bank->int_enb[p] = tegra_gpio_readl(GPIO_INT_ENB(gpio)); |
306 | bank->int_lvl[p] = __raw_readl(GPIO_INT_LVL(gpio)); | 308 | bank->int_lvl[p] = tegra_gpio_readl(GPIO_INT_LVL(gpio)); |
307 | } | 309 | } |
308 | } | 310 | } |
309 | local_irq_restore(flags); | 311 | local_irq_restore(flags); |
@@ -333,28 +335,55 @@ static struct irq_chip tegra_gpio_irq_chip = { | |||
333 | */ | 335 | */ |
334 | static struct lock_class_key gpio_lock_class; | 336 | static struct lock_class_key gpio_lock_class; |
335 | 337 | ||
336 | static int __init tegra_gpio_init(void) | 338 | static int __devinit tegra_gpio_probe(struct platform_device *pdev) |
337 | { | 339 | { |
340 | struct resource *res; | ||
338 | struct tegra_gpio_bank *bank; | 341 | struct tegra_gpio_bank *bank; |
339 | int gpio; | 342 | int gpio; |
340 | int i; | 343 | int i; |
341 | int j; | 344 | int j; |
342 | 345 | ||
346 | for (i = 0; i < ARRAY_SIZE(tegra_gpio_banks); i++) { | ||
347 | res = platform_get_resource(pdev, IORESOURCE_IRQ, i); | ||
348 | if (!res) { | ||
349 | dev_err(&pdev->dev, "Missing IRQ resource\n"); | ||
350 | return -ENODEV; | ||
351 | } | ||
352 | |||
353 | bank = &tegra_gpio_banks[i]; | ||
354 | bank->bank = i; | ||
355 | bank->irq = res->start; | ||
356 | } | ||
357 | |||
358 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
359 | if (!res) { | ||
360 | dev_err(&pdev->dev, "Missing MEM resource\n"); | ||
361 | return -ENODEV; | ||
362 | } | ||
363 | |||
364 | if (!devm_request_mem_region(&pdev->dev, res->start, | ||
365 | resource_size(res), | ||
366 | dev_name(&pdev->dev))) { | ||
367 | dev_err(&pdev->dev, "Couldn't request MEM resource\n"); | ||
368 | return -ENODEV; | ||
369 | } | ||
370 | |||
371 | regs = devm_ioremap(&pdev->dev, res->start, resource_size(res)); | ||
372 | if (!regs) { | ||
373 | dev_err(&pdev->dev, "Couldn't ioremap regs\n"); | ||
374 | return -ENODEV; | ||
375 | } | ||
376 | |||
343 | for (i = 0; i < 7; i++) { | 377 | for (i = 0; i < 7; i++) { |
344 | for (j = 0; j < 4; j++) { | 378 | for (j = 0; j < 4; j++) { |
345 | int gpio = tegra_gpio_compose(i, j, 0); | 379 | int gpio = tegra_gpio_compose(i, j, 0); |
346 | __raw_writel(0x00, GPIO_INT_ENB(gpio)); | 380 | tegra_gpio_writel(0x00, GPIO_INT_ENB(gpio)); |
347 | } | 381 | } |
348 | } | 382 | } |
349 | 383 | ||
350 | #ifdef CONFIG_OF_GPIO | 384 | #ifdef CONFIG_OF_GPIO |
351 | /* | 385 | tegra_gpio_chip.of_node = pdev->dev.of_node; |
352 | * This isn't ideal, but it gets things hooked up until this | 386 | #endif |
353 | * driver is converted into a platform_device | ||
354 | */ | ||
355 | tegra_gpio_chip.of_node = of_find_compatible_node(NULL, NULL, | ||
356 | "nvidia,tegra20-gpio"); | ||
357 | #endif /* CONFIG_OF_GPIO */ | ||
358 | 387 | ||
359 | gpiochip_add(&tegra_gpio_chip); | 388 | gpiochip_add(&tegra_gpio_chip); |
360 | 389 | ||
@@ -384,6 +413,24 @@ static int __init tegra_gpio_init(void) | |||
384 | return 0; | 413 | return 0; |
385 | } | 414 | } |
386 | 415 | ||
416 | static struct of_device_id tegra_gpio_of_match[] __devinitdata = { | ||
417 | { .compatible = "nvidia,tegra20-gpio", }, | ||
418 | { }, | ||
419 | }; | ||
420 | |||
421 | static struct platform_driver tegra_gpio_driver = { | ||
422 | .driver = { | ||
423 | .name = "tegra-gpio", | ||
424 | .owner = THIS_MODULE, | ||
425 | .of_match_table = tegra_gpio_of_match, | ||
426 | }, | ||
427 | .probe = tegra_gpio_probe, | ||
428 | }; | ||
429 | |||
430 | static int __init tegra_gpio_init(void) | ||
431 | { | ||
432 | return platform_driver_register(&tegra_gpio_driver); | ||
433 | } | ||
387 | postcore_initcall(tegra_gpio_init); | 434 | postcore_initcall(tegra_gpio_init); |
388 | 435 | ||
389 | void __init tegra_gpio_config(struct tegra_gpio_table *table, int num) | 436 | void __init tegra_gpio_config(struct tegra_gpio_table *table, int num) |
@@ -416,13 +463,13 @@ static int dbg_gpio_show(struct seq_file *s, void *unused) | |||
416 | seq_printf(s, | 463 | seq_printf(s, |
417 | "%d:%d %02x %02x %02x %02x %02x %02x %06x\n", | 464 | "%d:%d %02x %02x %02x %02x %02x %02x %06x\n", |
418 | i, j, | 465 | i, j, |
419 | __raw_readl(GPIO_CNF(gpio)), | 466 | tegra_gpio_readl(GPIO_CNF(gpio)), |
420 | __raw_readl(GPIO_OE(gpio)), | 467 | tegra_gpio_readl(GPIO_OE(gpio)), |
421 | __raw_readl(GPIO_OUT(gpio)), | 468 | tegra_gpio_readl(GPIO_OUT(gpio)), |
422 | __raw_readl(GPIO_IN(gpio)), | 469 | tegra_gpio_readl(GPIO_IN(gpio)), |
423 | __raw_readl(GPIO_INT_STA(gpio)), | 470 | tegra_gpio_readl(GPIO_INT_STA(gpio)), |
424 | __raw_readl(GPIO_INT_ENB(gpio)), | 471 | tegra_gpio_readl(GPIO_INT_ENB(gpio)), |
425 | __raw_readl(GPIO_INT_LVL(gpio))); | 472 | tegra_gpio_readl(GPIO_INT_LVL(gpio))); |
426 | } | 473 | } |
427 | } | 474 | } |
428 | return 0; | 475 | return 0; |
diff --git a/drivers/mmc/host/davinci_mmc.c b/drivers/mmc/host/davinci_mmc.c index 0076c7448fe6..64a8325a4a8a 100644 --- a/drivers/mmc/host/davinci_mmc.c +++ b/drivers/mmc/host/davinci_mmc.c | |||
@@ -807,12 +807,25 @@ static void calculate_clk_divider(struct mmc_host *mmc, struct mmc_ios *ios) | |||
807 | static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) | 807 | static void mmc_davinci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) |
808 | { | 808 | { |
809 | struct mmc_davinci_host *host = mmc_priv(mmc); | 809 | struct mmc_davinci_host *host = mmc_priv(mmc); |
810 | struct platform_device *pdev = to_platform_device(mmc->parent); | ||
811 | struct davinci_mmc_config *config = pdev->dev.platform_data; | ||
810 | 812 | ||
811 | dev_dbg(mmc_dev(host->mmc), | 813 | dev_dbg(mmc_dev(host->mmc), |
812 | "clock %dHz busmode %d powermode %d Vdd %04x\n", | 814 | "clock %dHz busmode %d powermode %d Vdd %04x\n", |
813 | ios->clock, ios->bus_mode, ios->power_mode, | 815 | ios->clock, ios->bus_mode, ios->power_mode, |
814 | ios->vdd); | 816 | ios->vdd); |
815 | 817 | ||
818 | switch (ios->power_mode) { | ||
819 | case MMC_POWER_OFF: | ||
820 | if (config && config->set_power) | ||
821 | config->set_power(pdev->id, false); | ||
822 | break; | ||
823 | case MMC_POWER_UP: | ||
824 | if (config && config->set_power) | ||
825 | config->set_power(pdev->id, true); | ||
826 | break; | ||
827 | } | ||
828 | |||
816 | switch (ios->bus_width) { | 829 | switch (ios->bus_width) { |
817 | case MMC_BUS_WIDTH_8: | 830 | case MMC_BUS_WIDTH_8: |
818 | dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n"); | 831 | dev_dbg(mmc_dev(host->mmc), "Enabling 8 bit mode\n"); |
diff --git a/drivers/usb/host/ohci-at91.c b/drivers/usb/host/ohci-at91.c index 944291e10f97..ba3a46b78b75 100644 --- a/drivers/usb/host/ohci-at91.c +++ b/drivers/usb/host/ohci-at91.c | |||
@@ -35,8 +35,7 @@ extern int usb_disabled(void); | |||
35 | 35 | ||
36 | static void at91_start_clock(void) | 36 | static void at91_start_clock(void) |
37 | { | 37 | { |
38 | if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) | 38 | clk_enable(hclk); |
39 | clk_enable(hclk); | ||
40 | clk_enable(iclk); | 39 | clk_enable(iclk); |
41 | clk_enable(fclk); | 40 | clk_enable(fclk); |
42 | clocked = 1; | 41 | clocked = 1; |
@@ -46,8 +45,7 @@ static void at91_stop_clock(void) | |||
46 | { | 45 | { |
47 | clk_disable(fclk); | 46 | clk_disable(fclk); |
48 | clk_disable(iclk); | 47 | clk_disable(iclk); |
49 | if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) | 48 | clk_disable(hclk); |
50 | clk_disable(hclk); | ||
51 | clocked = 0; | 49 | clocked = 0; |
52 | } | 50 | } |
53 | 51 | ||
@@ -142,8 +140,7 @@ static int usb_hcd_at91_probe(const struct hc_driver *driver, | |||
142 | 140 | ||
143 | iclk = clk_get(&pdev->dev, "ohci_clk"); | 141 | iclk = clk_get(&pdev->dev, "ohci_clk"); |
144 | fclk = clk_get(&pdev->dev, "uhpck"); | 142 | fclk = clk_get(&pdev->dev, "uhpck"); |
145 | if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) | 143 | hclk = clk_get(&pdev->dev, "hclk"); |
146 | hclk = clk_get(&pdev->dev, "hck0"); | ||
147 | 144 | ||
148 | at91_start_hc(pdev); | 145 | at91_start_hc(pdev); |
149 | ohci_hcd_init(hcd_to_ohci(hcd)); | 146 | ohci_hcd_init(hcd_to_ohci(hcd)); |
@@ -155,8 +152,7 @@ static int usb_hcd_at91_probe(const struct hc_driver *driver, | |||
155 | /* Error handling */ | 152 | /* Error handling */ |
156 | at91_stop_hc(pdev); | 153 | at91_stop_hc(pdev); |
157 | 154 | ||
158 | if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) | 155 | clk_put(hclk); |
159 | clk_put(hclk); | ||
160 | clk_put(fclk); | 156 | clk_put(fclk); |
161 | clk_put(iclk); | 157 | clk_put(iclk); |
162 | 158 | ||
@@ -192,8 +188,7 @@ static void usb_hcd_at91_remove(struct usb_hcd *hcd, | |||
192 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); | 188 | release_mem_region(hcd->rsrc_start, hcd->rsrc_len); |
193 | usb_put_hcd(hcd); | 189 | usb_put_hcd(hcd); |
194 | 190 | ||
195 | if (cpu_is_at91sam9261() || cpu_is_at91sam9g10()) | 191 | clk_put(hclk); |
196 | clk_put(hclk); | ||
197 | clk_put(fclk); | 192 | clk_put(fclk); |
198 | clk_put(iclk); | 193 | clk_put(iclk); |
199 | fclk = iclk = hclk = NULL; | 194 | fclk = iclk = hclk = NULL; |
@@ -223,6 +218,156 @@ ohci_at91_start (struct usb_hcd *hcd) | |||
223 | return 0; | 218 | return 0; |
224 | } | 219 | } |
225 | 220 | ||
221 | static void ohci_at91_usb_set_power(struct at91_usbh_data *pdata, int port, int enable) | ||
222 | { | ||
223 | if (port < 0 || port >= 2) | ||
224 | return; | ||
225 | |||
226 | gpio_set_value(pdata->vbus_pin[port], !pdata->vbus_pin_inverted ^ enable); | ||
227 | } | ||
228 | |||
229 | static int ohci_at91_usb_get_power(struct at91_usbh_data *pdata, int port) | ||
230 | { | ||
231 | if (port < 0 || port >= 2) | ||
232 | return -EINVAL; | ||
233 | |||
234 | return gpio_get_value(pdata->vbus_pin[port]) ^ !pdata->vbus_pin_inverted; | ||
235 | } | ||
236 | |||
237 | /* | ||
238 | * Update the status data from the hub with the over-current indicator change. | ||
239 | */ | ||
240 | static int ohci_at91_hub_status_data(struct usb_hcd *hcd, char *buf) | ||
241 | { | ||
242 | struct at91_usbh_data *pdata = hcd->self.controller->platform_data; | ||
243 | int length = ohci_hub_status_data(hcd, buf); | ||
244 | int port; | ||
245 | |||
246 | for (port = 0; port < ARRAY_SIZE(pdata->overcurrent_pin); port++) { | ||
247 | if (pdata->overcurrent_changed[port]) { | ||
248 | if (! length) | ||
249 | length = 1; | ||
250 | buf[0] |= 1 << (port + 1); | ||
251 | } | ||
252 | } | ||
253 | |||
254 | return length; | ||
255 | } | ||
256 | |||
257 | /* | ||
258 | * Look at the control requests to the root hub and see if we need to override. | ||
259 | */ | ||
260 | static int ohci_at91_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, | ||
261 | u16 wIndex, char *buf, u16 wLength) | ||
262 | { | ||
263 | struct at91_usbh_data *pdata = hcd->self.controller->platform_data; | ||
264 | struct usb_hub_descriptor *desc; | ||
265 | int ret = -EINVAL; | ||
266 | u32 *data = (u32 *)buf; | ||
267 | |||
268 | dev_dbg(hcd->self.controller, | ||
269 | "ohci_at91_hub_control(%p,0x%04x,0x%04x,0x%04x,%p,%04x)\n", | ||
270 | hcd, typeReq, wValue, wIndex, buf, wLength); | ||
271 | |||
272 | switch (typeReq) { | ||
273 | case SetPortFeature: | ||
274 | if (wValue == USB_PORT_FEAT_POWER) { | ||
275 | dev_dbg(hcd->self.controller, "SetPortFeat: POWER\n"); | ||
276 | ohci_at91_usb_set_power(pdata, wIndex - 1, 1); | ||
277 | goto out; | ||
278 | } | ||
279 | break; | ||
280 | |||
281 | case ClearPortFeature: | ||
282 | switch (wValue) { | ||
283 | case USB_PORT_FEAT_C_OVER_CURRENT: | ||
284 | dev_dbg(hcd->self.controller, | ||
285 | "ClearPortFeature: C_OVER_CURRENT\n"); | ||
286 | |||
287 | if (wIndex == 1 || wIndex == 2) { | ||
288 | pdata->overcurrent_changed[wIndex-1] = 0; | ||
289 | pdata->overcurrent_status[wIndex-1] = 0; | ||
290 | } | ||
291 | |||
292 | goto out; | ||
293 | |||
294 | case USB_PORT_FEAT_OVER_CURRENT: | ||
295 | dev_dbg(hcd->self.controller, | ||
296 | "ClearPortFeature: OVER_CURRENT\n"); | ||
297 | |||
298 | if (wIndex == 1 || wIndex == 2) { | ||
299 | pdata->overcurrent_status[wIndex-1] = 0; | ||
300 | } | ||
301 | |||
302 | goto out; | ||
303 | |||
304 | case USB_PORT_FEAT_POWER: | ||
305 | dev_dbg(hcd->self.controller, | ||
306 | "ClearPortFeature: POWER\n"); | ||
307 | |||
308 | if (wIndex == 1 || wIndex == 2) { | ||
309 | ohci_at91_usb_set_power(pdata, wIndex - 1, 0); | ||
310 | return 0; | ||
311 | } | ||
312 | } | ||
313 | break; | ||
314 | } | ||
315 | |||
316 | ret = ohci_hub_control(hcd, typeReq, wValue, wIndex, buf, wLength); | ||
317 | if (ret) | ||
318 | goto out; | ||
319 | |||
320 | switch (typeReq) { | ||
321 | case GetHubDescriptor: | ||
322 | |||
323 | /* update the hub's descriptor */ | ||
324 | |||
325 | desc = (struct usb_hub_descriptor *)buf; | ||
326 | |||
327 | dev_dbg(hcd->self.controller, "wHubCharacteristics 0x%04x\n", | ||
328 | desc->wHubCharacteristics); | ||
329 | |||
330 | /* remove the old configurations for power-switching, and | ||
331 | * over-current protection, and insert our new configuration | ||
332 | */ | ||
333 | |||
334 | desc->wHubCharacteristics &= ~cpu_to_le16(HUB_CHAR_LPSM); | ||
335 | desc->wHubCharacteristics |= cpu_to_le16(0x0001); | ||
336 | |||
337 | if (pdata->overcurrent_supported) { | ||
338 | desc->wHubCharacteristics &= ~cpu_to_le16(HUB_CHAR_OCPM); | ||
339 | desc->wHubCharacteristics |= cpu_to_le16(0x0008|0x0001); | ||
340 | } | ||
341 | |||
342 | dev_dbg(hcd->self.controller, "wHubCharacteristics after 0x%04x\n", | ||
343 | desc->wHubCharacteristics); | ||
344 | |||
345 | return ret; | ||
346 | |||
347 | case GetPortStatus: | ||
348 | /* check port status */ | ||
349 | |||
350 | dev_dbg(hcd->self.controller, "GetPortStatus(%d)\n", wIndex); | ||
351 | |||
352 | if (wIndex == 1 || wIndex == 2) { | ||
353 | if (! ohci_at91_usb_get_power(pdata, wIndex-1)) { | ||
354 | *data &= ~cpu_to_le32(RH_PS_PPS); | ||
355 | } | ||
356 | |||
357 | if (pdata->overcurrent_changed[wIndex-1]) { | ||
358 | *data |= cpu_to_le32(RH_PS_OCIC); | ||
359 | } | ||
360 | |||
361 | if (pdata->overcurrent_status[wIndex-1]) { | ||
362 | *data |= cpu_to_le32(RH_PS_POCI); | ||
363 | } | ||
364 | } | ||
365 | } | ||
366 | |||
367 | out: | ||
368 | return ret; | ||
369 | } | ||
370 | |||
226 | /*-------------------------------------------------------------------------*/ | 371 | /*-------------------------------------------------------------------------*/ |
227 | 372 | ||
228 | static const struct hc_driver ohci_at91_hc_driver = { | 373 | static const struct hc_driver ohci_at91_hc_driver = { |
@@ -258,8 +403,8 @@ static const struct hc_driver ohci_at91_hc_driver = { | |||
258 | /* | 403 | /* |
259 | * root hub support | 404 | * root hub support |
260 | */ | 405 | */ |
261 | .hub_status_data = ohci_hub_status_data, | 406 | .hub_status_data = ohci_at91_hub_status_data, |
262 | .hub_control = ohci_hub_control, | 407 | .hub_control = ohci_at91_hub_control, |
263 | #ifdef CONFIG_PM | 408 | #ifdef CONFIG_PM |
264 | .bus_suspend = ohci_bus_suspend, | 409 | .bus_suspend = ohci_bus_suspend, |
265 | .bus_resume = ohci_bus_resume, | 410 | .bus_resume = ohci_bus_resume, |
@@ -269,22 +414,71 @@ static const struct hc_driver ohci_at91_hc_driver = { | |||
269 | 414 | ||
270 | /*-------------------------------------------------------------------------*/ | 415 | /*-------------------------------------------------------------------------*/ |
271 | 416 | ||
417 | static irqreturn_t ohci_hcd_at91_overcurrent_irq(int irq, void *data) | ||
418 | { | ||
419 | struct platform_device *pdev = data; | ||
420 | struct at91_usbh_data *pdata = pdev->dev.platform_data; | ||
421 | int val, gpio, port; | ||
422 | |||
423 | /* From the GPIO notifying the over-current situation, find | ||
424 | * out the corresponding port */ | ||
425 | gpio = irq_to_gpio(irq); | ||
426 | for (port = 0; port < ARRAY_SIZE(pdata->overcurrent_pin); port++) { | ||
427 | if (pdata->overcurrent_pin[port] == gpio) | ||
428 | break; | ||
429 | } | ||
430 | |||
431 | if (port == ARRAY_SIZE(pdata->overcurrent_pin)) { | ||
432 | dev_err(& pdev->dev, "overcurrent interrupt from unknown GPIO\n"); | ||
433 | return IRQ_HANDLED; | ||
434 | } | ||
435 | |||
436 | val = gpio_get_value(gpio); | ||
437 | |||
438 | /* When notified of an over-current situation, disable power | ||
439 | on the corresponding port, and mark this port in | ||
440 | over-current. */ | ||
441 | if (! val) { | ||
442 | ohci_at91_usb_set_power(pdata, port, 0); | ||
443 | pdata->overcurrent_status[port] = 1; | ||
444 | pdata->overcurrent_changed[port] = 1; | ||
445 | } | ||
446 | |||
447 | dev_dbg(& pdev->dev, "overcurrent situation %s\n", | ||
448 | val ? "exited" : "notified"); | ||
449 | |||
450 | return IRQ_HANDLED; | ||
451 | } | ||
452 | |||
453 | /*-------------------------------------------------------------------------*/ | ||
454 | |||
272 | static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) | 455 | static int ohci_hcd_at91_drv_probe(struct platform_device *pdev) |
273 | { | 456 | { |
274 | struct at91_usbh_data *pdata = pdev->dev.platform_data; | 457 | struct at91_usbh_data *pdata = pdev->dev.platform_data; |
275 | int i; | 458 | int i; |
276 | 459 | ||
277 | if (pdata) { | 460 | if (pdata) { |
278 | /* REVISIT make the driver support per-port power switching, | ||
279 | * and also overcurrent detection. Here we assume the ports | ||
280 | * are always powered while this driver is active, and use | ||
281 | * active-low power switches. | ||
282 | */ | ||
283 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { | 461 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { |
284 | if (pdata->vbus_pin[i] <= 0) | 462 | if (pdata->vbus_pin[i] <= 0) |
285 | continue; | 463 | continue; |
286 | gpio_request(pdata->vbus_pin[i], "ohci_vbus"); | 464 | gpio_request(pdata->vbus_pin[i], "ohci_vbus"); |
287 | gpio_direction_output(pdata->vbus_pin[i], 0); | 465 | ohci_at91_usb_set_power(pdata, i, 1); |
466 | } | ||
467 | |||
468 | for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { | ||
469 | int ret; | ||
470 | |||
471 | if (pdata->overcurrent_pin[i] <= 0) | ||
472 | continue; | ||
473 | gpio_request(pdata->overcurrent_pin[i], "ohci_overcurrent"); | ||
474 | |||
475 | ret = request_irq(gpio_to_irq(pdata->overcurrent_pin[i]), | ||
476 | ohci_hcd_at91_overcurrent_irq, | ||
477 | IRQF_SHARED, "ohci_overcurrent", pdev); | ||
478 | if (ret) { | ||
479 | gpio_free(pdata->overcurrent_pin[i]); | ||
480 | dev_warn(& pdev->dev, "cannot get GPIO IRQ for overcurrent\n"); | ||
481 | } | ||
288 | } | 482 | } |
289 | } | 483 | } |
290 | 484 | ||
@@ -301,9 +495,16 @@ static int ohci_hcd_at91_drv_remove(struct platform_device *pdev) | |||
301 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { | 495 | for (i = 0; i < ARRAY_SIZE(pdata->vbus_pin); i++) { |
302 | if (pdata->vbus_pin[i] <= 0) | 496 | if (pdata->vbus_pin[i] <= 0) |
303 | continue; | 497 | continue; |
304 | gpio_direction_output(pdata->vbus_pin[i], 1); | 498 | ohci_at91_usb_set_power(pdata, i, 0); |
305 | gpio_free(pdata->vbus_pin[i]); | 499 | gpio_free(pdata->vbus_pin[i]); |
306 | } | 500 | } |
501 | |||
502 | for (i = 0; i < ARRAY_SIZE(pdata->overcurrent_pin); i++) { | ||
503 | if (pdata->overcurrent_pin[i] <= 0) | ||
504 | continue; | ||
505 | free_irq(gpio_to_irq(pdata->overcurrent_pin[i]), pdev); | ||
506 | gpio_free(pdata->overcurrent_pin[i]); | ||
507 | } | ||
307 | } | 508 | } |
308 | 509 | ||
309 | device_init_wakeup(&pdev->dev, 0); | 510 | device_init_wakeup(&pdev->dev, 0); |