diff options
-rw-r--r-- | drivers/dma/sh/shdma.c | 22 | ||||
-rw-r--r-- | drivers/dma/sh/shdma.h | 6 |
2 files changed, 14 insertions, 14 deletions
diff --git a/drivers/dma/sh/shdma.c b/drivers/dma/sh/shdma.c index fca7a0cdfd28..9ee1272604b4 100644 --- a/drivers/dma/sh/shdma.c +++ b/drivers/dma/sh/shdma.c | |||
@@ -54,22 +54,22 @@ static void channel_clear(struct sh_dmae_chan *sh_dc) | |||
54 | struct sh_dmae_device *shdev = to_sh_dev(sh_dc); | 54 | struct sh_dmae_device *shdev = to_sh_dev(sh_dc); |
55 | 55 | ||
56 | __raw_writel(0, shdev->chan_reg + | 56 | __raw_writel(0, shdev->chan_reg + |
57 | shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset / sizeof(u32)); | 57 | shdev->pdata->channel[sh_dc->shdma_chan.id].chclr_offset); |
58 | } | 58 | } |
59 | 59 | ||
60 | static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg) | 60 | static void sh_dmae_writel(struct sh_dmae_chan *sh_dc, u32 data, u32 reg) |
61 | { | 61 | { |
62 | __raw_writel(data, sh_dc->base + reg / sizeof(u32)); | 62 | __raw_writel(data, sh_dc->base + reg); |
63 | } | 63 | } |
64 | 64 | ||
65 | static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg) | 65 | static u32 sh_dmae_readl(struct sh_dmae_chan *sh_dc, u32 reg) |
66 | { | 66 | { |
67 | return __raw_readl(sh_dc->base + reg / sizeof(u32)); | 67 | return __raw_readl(sh_dc->base + reg); |
68 | } | 68 | } |
69 | 69 | ||
70 | static u16 dmaor_read(struct sh_dmae_device *shdev) | 70 | static u16 dmaor_read(struct sh_dmae_device *shdev) |
71 | { | 71 | { |
72 | u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32); | 72 | void __iomem *addr = shdev->chan_reg + DMAOR; |
73 | 73 | ||
74 | if (shdev->pdata->dmaor_is_32bit) | 74 | if (shdev->pdata->dmaor_is_32bit) |
75 | return __raw_readl(addr); | 75 | return __raw_readl(addr); |
@@ -79,7 +79,7 @@ static u16 dmaor_read(struct sh_dmae_device *shdev) | |||
79 | 79 | ||
80 | static void dmaor_write(struct sh_dmae_device *shdev, u16 data) | 80 | static void dmaor_write(struct sh_dmae_device *shdev, u16 data) |
81 | { | 81 | { |
82 | u32 __iomem *addr = shdev->chan_reg + DMAOR / sizeof(u32); | 82 | void __iomem *addr = shdev->chan_reg + DMAOR; |
83 | 83 | ||
84 | if (shdev->pdata->dmaor_is_32bit) | 84 | if (shdev->pdata->dmaor_is_32bit) |
85 | __raw_writel(data, addr); | 85 | __raw_writel(data, addr); |
@@ -91,14 +91,14 @@ static void chcr_write(struct sh_dmae_chan *sh_dc, u32 data) | |||
91 | { | 91 | { |
92 | struct sh_dmae_device *shdev = to_sh_dev(sh_dc); | 92 | struct sh_dmae_device *shdev = to_sh_dev(sh_dc); |
93 | 93 | ||
94 | __raw_writel(data, sh_dc->base + shdev->chcr_offset / sizeof(u32)); | 94 | __raw_writel(data, sh_dc->base + shdev->chcr_offset); |
95 | } | 95 | } |
96 | 96 | ||
97 | static u32 chcr_read(struct sh_dmae_chan *sh_dc) | 97 | static u32 chcr_read(struct sh_dmae_chan *sh_dc) |
98 | { | 98 | { |
99 | struct sh_dmae_device *shdev = to_sh_dev(sh_dc); | 99 | struct sh_dmae_device *shdev = to_sh_dev(sh_dc); |
100 | 100 | ||
101 | return __raw_readl(sh_dc->base + shdev->chcr_offset / sizeof(u32)); | 101 | return __raw_readl(sh_dc->base + shdev->chcr_offset); |
102 | } | 102 | } |
103 | 103 | ||
104 | /* | 104 | /* |
@@ -242,7 +242,7 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) | |||
242 | struct sh_dmae_device *shdev = to_sh_dev(sh_chan); | 242 | struct sh_dmae_device *shdev = to_sh_dev(sh_chan); |
243 | struct sh_dmae_pdata *pdata = shdev->pdata; | 243 | struct sh_dmae_pdata *pdata = shdev->pdata; |
244 | const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->shdma_chan.id]; | 244 | const struct sh_dmae_channel *chan_pdata = &pdata->channel[sh_chan->shdma_chan.id]; |
245 | u16 __iomem *addr = shdev->dmars; | 245 | void __iomem *addr = shdev->dmars; |
246 | unsigned int shift = chan_pdata->dmars_bit; | 246 | unsigned int shift = chan_pdata->dmars_bit; |
247 | 247 | ||
248 | if (dmae_is_busy(sh_chan)) | 248 | if (dmae_is_busy(sh_chan)) |
@@ -253,8 +253,8 @@ static int dmae_set_dmars(struct sh_dmae_chan *sh_chan, u16 val) | |||
253 | 253 | ||
254 | /* in the case of a missing DMARS resource use first memory window */ | 254 | /* in the case of a missing DMARS resource use first memory window */ |
255 | if (!addr) | 255 | if (!addr) |
256 | addr = (u16 __iomem *)shdev->chan_reg; | 256 | addr = shdev->chan_reg; |
257 | addr += chan_pdata->dmars / sizeof(u16); | 257 | addr += chan_pdata->dmars; |
258 | 258 | ||
259 | __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift), | 259 | __raw_writew((__raw_readw(addr) & (0xff00 >> shift)) | (val << shift), |
260 | addr); | 260 | addr); |
@@ -517,7 +517,7 @@ static int sh_dmae_chan_probe(struct sh_dmae_device *shdev, int id, | |||
517 | 517 | ||
518 | shdma_chan_probe(sdev, schan, id); | 518 | shdma_chan_probe(sdev, schan, id); |
519 | 519 | ||
520 | sh_chan->base = shdev->chan_reg + chan_pdata->offset / sizeof(u32); | 520 | sh_chan->base = shdev->chan_reg + chan_pdata->offset; |
521 | 521 | ||
522 | /* set up channel irq */ | 522 | /* set up channel irq */ |
523 | if (pdev->id >= 0) | 523 | if (pdev->id >= 0) |
diff --git a/drivers/dma/sh/shdma.h b/drivers/dma/sh/shdma.h index 9314e93225db..06aae6ebc82b 100644 --- a/drivers/dma/sh/shdma.h +++ b/drivers/dma/sh/shdma.h | |||
@@ -28,7 +28,7 @@ struct sh_dmae_chan { | |||
28 | struct shdma_chan shdma_chan; | 28 | struct shdma_chan shdma_chan; |
29 | const struct sh_dmae_slave_config *config; /* Slave DMA configuration */ | 29 | const struct sh_dmae_slave_config *config; /* Slave DMA configuration */ |
30 | int xmit_shift; /* log_2(bytes_per_xfer) */ | 30 | int xmit_shift; /* log_2(bytes_per_xfer) */ |
31 | u32 __iomem *base; | 31 | void __iomem *base; |
32 | char dev_id[16]; /* unique name per DMAC of channel */ | 32 | char dev_id[16]; /* unique name per DMAC of channel */ |
33 | int pm_error; | 33 | int pm_error; |
34 | }; | 34 | }; |
@@ -38,8 +38,8 @@ struct sh_dmae_device { | |||
38 | struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS]; | 38 | struct sh_dmae_chan *chan[SH_DMAE_MAX_CHANNELS]; |
39 | struct sh_dmae_pdata *pdata; | 39 | struct sh_dmae_pdata *pdata; |
40 | struct list_head node; | 40 | struct list_head node; |
41 | u32 __iomem *chan_reg; | 41 | void __iomem *chan_reg; |
42 | u16 __iomem *dmars; | 42 | void __iomem *dmars; |
43 | unsigned int chcr_offset; | 43 | unsigned int chcr_offset; |
44 | u32 chcr_ie_bit; | 44 | u32 chcr_ie_bit; |
45 | }; | 45 | }; |