diff options
-rw-r--r-- | drivers/media/video/Kconfig | 6 | ||||
-rw-r--r-- | drivers/media/video/Makefile | 1 | ||||
-rw-r--r-- | drivers/media/video/noon010pc30.c | 792 | ||||
-rw-r--r-- | include/media/noon010pc30.h | 28 |
4 files changed, 827 insertions, 0 deletions
diff --git a/drivers/media/video/Kconfig b/drivers/media/video/Kconfig index 9f20fc5903c2..f86e407c2218 100644 --- a/drivers/media/video/Kconfig +++ b/drivers/media/video/Kconfig | |||
@@ -740,6 +740,12 @@ config VIDEO_VIA_CAMERA | |||
740 | Chrome9 chipsets. Currently only tested on OLPC xo-1.5 systems | 740 | Chrome9 chipsets. Currently only tested on OLPC xo-1.5 systems |
741 | with ov7670 sensors. | 741 | with ov7670 sensors. |
742 | 742 | ||
743 | config VIDEO_NOON010PC30 | ||
744 | tristate "NOON010PC30 CIF camera sensor support" | ||
745 | depends on I2C && VIDEO_V4L2 | ||
746 | ---help--- | ||
747 | This driver supports NOON010PC30 CIF camera from Siliconfile | ||
748 | |||
743 | config SOC_CAMERA | 749 | config SOC_CAMERA |
744 | tristate "SoC camera support" | 750 | tristate "SoC camera support" |
745 | depends on VIDEO_V4L2 && HAS_DMA && I2C | 751 | depends on VIDEO_V4L2 && HAS_DMA && I2C |
diff --git a/drivers/media/video/Makefile b/drivers/media/video/Makefile index 40833fec34dc..251b7cac3f91 100644 --- a/drivers/media/video/Makefile +++ b/drivers/media/video/Makefile | |||
@@ -67,6 +67,7 @@ obj-$(CONFIG_VIDEO_TCM825X) += tcm825x.o | |||
67 | obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o | 67 | obj-$(CONFIG_VIDEO_TVEEPROM) += tveeprom.o |
68 | obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o | 68 | obj-$(CONFIG_VIDEO_MT9V011) += mt9v011.o |
69 | obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o | 69 | obj-$(CONFIG_VIDEO_SR030PC30) += sr030pc30.o |
70 | obj-$(CONFIG_VIDEO_NOON010PC30) += noon010pc30.o | ||
70 | 71 | ||
71 | obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o | 72 | obj-$(CONFIG_SOC_CAMERA_IMX074) += imx074.o |
72 | obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o | 73 | obj-$(CONFIG_SOC_CAMERA_MT9M001) += mt9m001.o |
diff --git a/drivers/media/video/noon010pc30.c b/drivers/media/video/noon010pc30.c new file mode 100644 index 000000000000..35f722a88f76 --- /dev/null +++ b/drivers/media/video/noon010pc30.c | |||
@@ -0,0 +1,792 @@ | |||
1 | /* | ||
2 | * Driver for SiliconFile NOON010PC30 CIF (1/11") Image Sensor with ISP | ||
3 | * | ||
4 | * Copyright (C) 2010 Samsung Electronics | ||
5 | * Contact: Sylwester Nawrocki, <s.nawrocki@samsung.com> | ||
6 | * | ||
7 | * Initial register configuration based on a driver authored by | ||
8 | * HeungJun Kim <riverful.kim@samsung.com>. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or | ||
13 | * (at your option) any later vergsion. | ||
14 | */ | ||
15 | |||
16 | #include <linux/delay.h> | ||
17 | #include <linux/gpio.h> | ||
18 | #include <linux/i2c.h> | ||
19 | #include <linux/slab.h> | ||
20 | #include <linux/regulator/consumer.h> | ||
21 | #include <media/noon010pc30.h> | ||
22 | #include <media/v4l2-chip-ident.h> | ||
23 | #include <linux/videodev2.h> | ||
24 | #include <media/v4l2-ctrls.h> | ||
25 | #include <media/v4l2-device.h> | ||
26 | #include <media/v4l2-mediabus.h> | ||
27 | #include <media/v4l2-subdev.h> | ||
28 | |||
29 | static int debug; | ||
30 | module_param(debug, int, 0644); | ||
31 | MODULE_PARM_DESC(debug, "Enable module debug trace. Set to 1 to enable."); | ||
32 | |||
33 | #define MODULE_NAME "NOON010PC30" | ||
34 | |||
35 | /* | ||
36 | * Register offsets within a page | ||
37 | * b15..b8 - page id, b7..b0 - register address | ||
38 | */ | ||
39 | #define POWER_CTRL_REG 0x0001 | ||
40 | #define PAGEMODE_REG 0x03 | ||
41 | #define DEVICE_ID_REG 0x0004 | ||
42 | #define NOON010PC30_ID 0x86 | ||
43 | #define VDO_CTL_REG(n) (0x0010 + (n)) | ||
44 | #define SYNC_CTL_REG 0x0012 | ||
45 | /* Window size and position */ | ||
46 | #define WIN_ROWH_REG 0x0013 | ||
47 | #define WIN_ROWL_REG 0x0014 | ||
48 | #define WIN_COLH_REG 0x0015 | ||
49 | #define WIN_COLL_REG 0x0016 | ||
50 | #define WIN_HEIGHTH_REG 0x0017 | ||
51 | #define WIN_HEIGHTL_REG 0x0018 | ||
52 | #define WIN_WIDTHH_REG 0x0019 | ||
53 | #define WIN_WIDTHL_REG 0x001A | ||
54 | #define HBLANKH_REG 0x001B | ||
55 | #define HBLANKL_REG 0x001C | ||
56 | #define VSYNCH_REG 0x001D | ||
57 | #define VSYNCL_REG 0x001E | ||
58 | /* VSYNC control */ | ||
59 | #define VS_CTL_REG(n) (0x00A1 + (n)) | ||
60 | /* page 1 */ | ||
61 | #define ISP_CTL_REG(n) (0x0110 + (n)) | ||
62 | #define YOFS_REG 0x0119 | ||
63 | #define DARK_YOFS_REG 0x011A | ||
64 | #define SAT_CTL_REG 0x0120 | ||
65 | #define BSAT_REG 0x0121 | ||
66 | #define RSAT_REG 0x0122 | ||
67 | /* Color correction */ | ||
68 | #define CMC_CTL_REG 0x0130 | ||
69 | #define CMC_OFSGH_REG 0x0133 | ||
70 | #define CMC_OFSGL_REG 0x0135 | ||
71 | #define CMC_SIGN_REG 0x0136 | ||
72 | #define CMC_GOFS_REG 0x0137 | ||
73 | #define CMC_COEF_REG(n) (0x0138 + (n)) | ||
74 | #define CMC_OFS_REG(n) (0x0141 + (n)) | ||
75 | /* Gamma correction */ | ||
76 | #define GMA_CTL_REG 0x0160 | ||
77 | #define GMA_COEF_REG(n) (0x0161 + (n)) | ||
78 | /* Lens Shading */ | ||
79 | #define LENS_CTRL_REG 0x01D0 | ||
80 | #define LENS_XCEN_REG 0x01D1 | ||
81 | #define LENS_YCEN_REG 0x01D2 | ||
82 | #define LENS_RC_REG 0x01D3 | ||
83 | #define LENS_GC_REG 0x01D4 | ||
84 | #define LENS_BC_REG 0x01D5 | ||
85 | #define L_AGON_REG 0x01D6 | ||
86 | #define L_AGOFF_REG 0x01D7 | ||
87 | /* Page 3 - Auto Exposure */ | ||
88 | #define AE_CTL_REG(n) (0x0310 + (n)) | ||
89 | #define AE_CTL9_REG 0x032C | ||
90 | #define AE_CTL10_REG 0x032D | ||
91 | #define AE_YLVL_REG 0x031C | ||
92 | #define AE_YTH_REG(n) (0x031D + (n)) | ||
93 | #define AE_WGT_REG 0x0326 | ||
94 | #define EXP_TIMEH_REG 0x0333 | ||
95 | #define EXP_TIMEM_REG 0x0334 | ||
96 | #define EXP_TIMEL_REG 0x0335 | ||
97 | #define EXP_MMINH_REG 0x0336 | ||
98 | #define EXP_MMINL_REG 0x0337 | ||
99 | #define EXP_MMAXH_REG 0x0338 | ||
100 | #define EXP_MMAXM_REG 0x0339 | ||
101 | #define EXP_MMAXL_REG 0x033A | ||
102 | /* Page 4 - Auto White Balance */ | ||
103 | #define AWB_CTL_REG(n) (0x0410 + (n)) | ||
104 | #define AWB_ENABE 0x80 | ||
105 | #define AWB_WGHT_REG 0x0419 | ||
106 | #define BGAIN_PAR_REG(n) (0x044F + (n)) | ||
107 | /* Manual white balance, when AWB_CTL2[0]=1 */ | ||
108 | #define MWB_RGAIN_REG 0x0466 | ||
109 | #define MWB_BGAIN_REG 0x0467 | ||
110 | |||
111 | /* The token to mark an array end */ | ||
112 | #define REG_TERM 0xFFFF | ||
113 | |||
114 | struct noon010_format { | ||
115 | enum v4l2_mbus_pixelcode code; | ||
116 | enum v4l2_colorspace colorspace; | ||
117 | u16 ispctl1_reg; | ||
118 | }; | ||
119 | |||
120 | struct noon010_frmsize { | ||
121 | u16 width; | ||
122 | u16 height; | ||
123 | int vid_ctl1; | ||
124 | }; | ||
125 | |||
126 | static const char * const noon010_supply_name[] = { | ||
127 | "vdd_core", "vddio", "vdda" | ||
128 | }; | ||
129 | |||
130 | #define NOON010_NUM_SUPPLIES ARRAY_SIZE(noon010_supply_name) | ||
131 | |||
132 | struct noon010_info { | ||
133 | struct v4l2_subdev sd; | ||
134 | struct v4l2_ctrl_handler hdl; | ||
135 | const struct noon010pc30_platform_data *pdata; | ||
136 | const struct noon010_format *curr_fmt; | ||
137 | const struct noon010_frmsize *curr_win; | ||
138 | unsigned int hflip:1; | ||
139 | unsigned int vflip:1; | ||
140 | unsigned int power:1; | ||
141 | u8 i2c_reg_page; | ||
142 | struct regulator_bulk_data supply[NOON010_NUM_SUPPLIES]; | ||
143 | u32 gpio_nreset; | ||
144 | u32 gpio_nstby; | ||
145 | }; | ||
146 | |||
147 | struct i2c_regval { | ||
148 | u16 addr; | ||
149 | u16 val; | ||
150 | }; | ||
151 | |||
152 | /* Supported resolutions. */ | ||
153 | static const struct noon010_frmsize noon010_sizes[] = { | ||
154 | { | ||
155 | .width = 352, | ||
156 | .height = 288, | ||
157 | .vid_ctl1 = 0, | ||
158 | }, { | ||
159 | .width = 176, | ||
160 | .height = 144, | ||
161 | .vid_ctl1 = 0x10, | ||
162 | }, { | ||
163 | .width = 88, | ||
164 | .height = 72, | ||
165 | .vid_ctl1 = 0x20, | ||
166 | }, | ||
167 | }; | ||
168 | |||
169 | /* Supported pixel formats. */ | ||
170 | static const struct noon010_format noon010_formats[] = { | ||
171 | { | ||
172 | .code = V4L2_MBUS_FMT_YUYV8_2X8, | ||
173 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
174 | .ispctl1_reg = 0x03, | ||
175 | }, { | ||
176 | .code = V4L2_MBUS_FMT_YVYU8_2X8, | ||
177 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
178 | .ispctl1_reg = 0x02, | ||
179 | }, { | ||
180 | .code = V4L2_MBUS_FMT_VYUY8_2X8, | ||
181 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
182 | .ispctl1_reg = 0, | ||
183 | }, { | ||
184 | .code = V4L2_MBUS_FMT_UYVY8_2X8, | ||
185 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
186 | .ispctl1_reg = 0x01, | ||
187 | }, { | ||
188 | .code = V4L2_MBUS_FMT_RGB565_2X8_BE, | ||
189 | .colorspace = V4L2_COLORSPACE_JPEG, | ||
190 | .ispctl1_reg = 0x40, | ||
191 | }, | ||
192 | }; | ||
193 | |||
194 | static const struct i2c_regval noon010_base_regs[] = { | ||
195 | { WIN_COLL_REG, 0x06 }, { HBLANKL_REG, 0x7C }, | ||
196 | /* Color corection and saturation */ | ||
197 | { ISP_CTL_REG(0), 0x30 }, { ISP_CTL_REG(2), 0x30 }, | ||
198 | { YOFS_REG, 0x80 }, { DARK_YOFS_REG, 0x04 }, | ||
199 | { SAT_CTL_REG, 0x1F }, { BSAT_REG, 0x90 }, | ||
200 | { CMC_CTL_REG, 0x0F }, { CMC_OFSGH_REG, 0x3C }, | ||
201 | { CMC_OFSGL_REG, 0x2C }, { CMC_SIGN_REG, 0x3F }, | ||
202 | { CMC_COEF_REG(0), 0x79 }, { CMC_OFS_REG(0), 0x00 }, | ||
203 | { CMC_COEF_REG(1), 0x39 }, { CMC_OFS_REG(1), 0x00 }, | ||
204 | { CMC_COEF_REG(2), 0x00 }, { CMC_OFS_REG(2), 0x00 }, | ||
205 | { CMC_COEF_REG(3), 0x11 }, { CMC_OFS_REG(3), 0x8B }, | ||
206 | { CMC_COEF_REG(4), 0x65 }, { CMC_OFS_REG(4), 0x07 }, | ||
207 | { CMC_COEF_REG(5), 0x14 }, { CMC_OFS_REG(5), 0x04 }, | ||
208 | { CMC_COEF_REG(6), 0x01 }, { CMC_OFS_REG(6), 0x9C }, | ||
209 | { CMC_COEF_REG(7), 0x33 }, { CMC_OFS_REG(7), 0x89 }, | ||
210 | { CMC_COEF_REG(8), 0x74 }, { CMC_OFS_REG(8), 0x25 }, | ||
211 | /* Automatic white balance */ | ||
212 | { AWB_CTL_REG(0), 0x78 }, { AWB_CTL_REG(1), 0x2E }, | ||
213 | { AWB_CTL_REG(2), 0x20 }, { AWB_CTL_REG(3), 0x85 }, | ||
214 | /* Auto exposure */ | ||
215 | { AE_CTL_REG(0), 0xDC }, { AE_CTL_REG(1), 0x81 }, | ||
216 | { AE_CTL_REG(2), 0x30 }, { AE_CTL_REG(3), 0xA5 }, | ||
217 | { AE_CTL_REG(4), 0x40 }, { AE_CTL_REG(5), 0x51 }, | ||
218 | { AE_CTL_REG(6), 0x33 }, { AE_CTL_REG(7), 0x7E }, | ||
219 | { AE_CTL9_REG, 0x00 }, { AE_CTL10_REG, 0x02 }, | ||
220 | { AE_YLVL_REG, 0x44 }, { AE_YTH_REG(0), 0x34 }, | ||
221 | { AE_YTH_REG(1), 0x30 }, { AE_WGT_REG, 0xD5 }, | ||
222 | /* Lens shading compensation */ | ||
223 | { LENS_CTRL_REG, 0x01 }, { LENS_XCEN_REG, 0x80 }, | ||
224 | { LENS_YCEN_REG, 0x70 }, { LENS_RC_REG, 0x53 }, | ||
225 | { LENS_GC_REG, 0x40 }, { LENS_BC_REG, 0x3E }, | ||
226 | { REG_TERM, 0 }, | ||
227 | }; | ||
228 | |||
229 | static inline struct noon010_info *to_noon010(struct v4l2_subdev *sd) | ||
230 | { | ||
231 | return container_of(sd, struct noon010_info, sd); | ||
232 | } | ||
233 | |||
234 | static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl) | ||
235 | { | ||
236 | return &container_of(ctrl->handler, struct noon010_info, hdl)->sd; | ||
237 | } | ||
238 | |||
239 | static inline int set_i2c_page(struct noon010_info *info, | ||
240 | struct i2c_client *client, unsigned int reg) | ||
241 | { | ||
242 | u32 page = reg >> 8 & 0xFF; | ||
243 | int ret = 0; | ||
244 | |||
245 | if (info->i2c_reg_page != page && (reg & 0xFF) != 0x03) { | ||
246 | ret = i2c_smbus_write_byte_data(client, PAGEMODE_REG, page); | ||
247 | if (!ret) | ||
248 | info->i2c_reg_page = page; | ||
249 | } | ||
250 | return ret; | ||
251 | } | ||
252 | |||
253 | static int cam_i2c_read(struct v4l2_subdev *sd, u32 reg_addr) | ||
254 | { | ||
255 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
256 | struct noon010_info *info = to_noon010(sd); | ||
257 | int ret = set_i2c_page(info, client, reg_addr); | ||
258 | |||
259 | if (ret) | ||
260 | return ret; | ||
261 | return i2c_smbus_read_byte_data(client, reg_addr & 0xFF); | ||
262 | } | ||
263 | |||
264 | static int cam_i2c_write(struct v4l2_subdev *sd, u32 reg_addr, u32 val) | ||
265 | { | ||
266 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
267 | struct noon010_info *info = to_noon010(sd); | ||
268 | int ret = set_i2c_page(info, client, reg_addr); | ||
269 | |||
270 | if (ret) | ||
271 | return ret; | ||
272 | return i2c_smbus_write_byte_data(client, reg_addr & 0xFF, val); | ||
273 | } | ||
274 | |||
275 | static inline int noon010_bulk_write_reg(struct v4l2_subdev *sd, | ||
276 | const struct i2c_regval *msg) | ||
277 | { | ||
278 | while (msg->addr != REG_TERM) { | ||
279 | int ret = cam_i2c_write(sd, msg->addr, msg->val); | ||
280 | |||
281 | if (ret) | ||
282 | return ret; | ||
283 | msg++; | ||
284 | } | ||
285 | return 0; | ||
286 | } | ||
287 | |||
288 | /* Device reset and sleep mode control */ | ||
289 | static int noon010_power_ctrl(struct v4l2_subdev *sd, bool reset, bool sleep) | ||
290 | { | ||
291 | struct noon010_info *info = to_noon010(sd); | ||
292 | u8 reg = sleep ? 0xF1 : 0xF0; | ||
293 | int ret = 0; | ||
294 | |||
295 | if (reset) | ||
296 | ret = cam_i2c_write(sd, POWER_CTRL_REG, reg | 0x02); | ||
297 | if (!ret) { | ||
298 | ret = cam_i2c_write(sd, POWER_CTRL_REG, reg); | ||
299 | if (reset && !ret) | ||
300 | info->i2c_reg_page = -1; | ||
301 | } | ||
302 | return ret; | ||
303 | } | ||
304 | |||
305 | /* Automatic white balance control */ | ||
306 | static int noon010_enable_autowhitebalance(struct v4l2_subdev *sd, int on) | ||
307 | { | ||
308 | int ret; | ||
309 | |||
310 | ret = cam_i2c_write(sd, AWB_CTL_REG(1), on ? 0x2E : 0x2F); | ||
311 | if (!ret) | ||
312 | ret = cam_i2c_write(sd, AWB_CTL_REG(0), on ? 0xFB : 0x7B); | ||
313 | return ret; | ||
314 | } | ||
315 | |||
316 | static int noon010_set_flip(struct v4l2_subdev *sd, int hflip, int vflip) | ||
317 | { | ||
318 | struct noon010_info *info = to_noon010(sd); | ||
319 | int reg, ret; | ||
320 | |||
321 | reg = cam_i2c_read(sd, VDO_CTL_REG(1)); | ||
322 | if (reg < 0) | ||
323 | return reg; | ||
324 | |||
325 | reg &= 0x7C; | ||
326 | if (hflip) | ||
327 | reg |= 0x01; | ||
328 | if (vflip) | ||
329 | reg |= 0x02; | ||
330 | |||
331 | ret = cam_i2c_write(sd, VDO_CTL_REG(1), reg | 0x80); | ||
332 | if (!ret) { | ||
333 | info->hflip = hflip; | ||
334 | info->vflip = vflip; | ||
335 | } | ||
336 | return ret; | ||
337 | } | ||
338 | |||
339 | /* Configure resolution and color format */ | ||
340 | static int noon010_set_params(struct v4l2_subdev *sd) | ||
341 | { | ||
342 | struct noon010_info *info = to_noon010(sd); | ||
343 | int ret; | ||
344 | |||
345 | if (!info->curr_win) | ||
346 | return -EINVAL; | ||
347 | |||
348 | ret = cam_i2c_write(sd, VDO_CTL_REG(0), info->curr_win->vid_ctl1); | ||
349 | |||
350 | if (!ret && info->curr_fmt) | ||
351 | ret = cam_i2c_write(sd, ISP_CTL_REG(0), | ||
352 | info->curr_fmt->ispctl1_reg); | ||
353 | return ret; | ||
354 | } | ||
355 | |||
356 | /* Find nearest matching image pixel size. */ | ||
357 | static int noon010_try_frame_size(struct v4l2_mbus_framefmt *mf) | ||
358 | { | ||
359 | unsigned int min_err = ~0; | ||
360 | int i = ARRAY_SIZE(noon010_sizes); | ||
361 | const struct noon010_frmsize *fsize = &noon010_sizes[0], | ||
362 | *match = NULL; | ||
363 | |||
364 | while (i--) { | ||
365 | int err = abs(fsize->width - mf->width) | ||
366 | + abs(fsize->height - mf->height); | ||
367 | |||
368 | if (err < min_err) { | ||
369 | min_err = err; | ||
370 | match = fsize; | ||
371 | } | ||
372 | fsize++; | ||
373 | } | ||
374 | if (match) { | ||
375 | mf->width = match->width; | ||
376 | mf->height = match->height; | ||
377 | return 0; | ||
378 | } | ||
379 | return -EINVAL; | ||
380 | } | ||
381 | |||
382 | static int power_enable(struct noon010_info *info) | ||
383 | { | ||
384 | int ret; | ||
385 | |||
386 | if (info->power) { | ||
387 | v4l2_info(&info->sd, "%s: sensor is already on\n", __func__); | ||
388 | return 0; | ||
389 | } | ||
390 | |||
391 | if (gpio_is_valid(info->gpio_nstby)) | ||
392 | gpio_set_value(info->gpio_nstby, 0); | ||
393 | |||
394 | if (gpio_is_valid(info->gpio_nreset)) | ||
395 | gpio_set_value(info->gpio_nreset, 0); | ||
396 | |||
397 | ret = regulator_bulk_enable(NOON010_NUM_SUPPLIES, info->supply); | ||
398 | if (ret) | ||
399 | return ret; | ||
400 | |||
401 | if (gpio_is_valid(info->gpio_nreset)) { | ||
402 | msleep(50); | ||
403 | gpio_set_value(info->gpio_nreset, 1); | ||
404 | } | ||
405 | if (gpio_is_valid(info->gpio_nstby)) { | ||
406 | udelay(1000); | ||
407 | gpio_set_value(info->gpio_nstby, 1); | ||
408 | } | ||
409 | if (gpio_is_valid(info->gpio_nreset)) { | ||
410 | udelay(1000); | ||
411 | gpio_set_value(info->gpio_nreset, 0); | ||
412 | msleep(100); | ||
413 | gpio_set_value(info->gpio_nreset, 1); | ||
414 | msleep(20); | ||
415 | } | ||
416 | info->power = 1; | ||
417 | |||
418 | v4l2_dbg(1, debug, &info->sd, "%s: sensor is on\n", __func__); | ||
419 | return 0; | ||
420 | } | ||
421 | |||
422 | static int power_disable(struct noon010_info *info) | ||
423 | { | ||
424 | int ret; | ||
425 | |||
426 | if (!info->power) { | ||
427 | v4l2_info(&info->sd, "%s: sensor is already off\n", __func__); | ||
428 | return 0; | ||
429 | } | ||
430 | |||
431 | ret = regulator_bulk_disable(NOON010_NUM_SUPPLIES, info->supply); | ||
432 | if (ret) | ||
433 | return ret; | ||
434 | |||
435 | if (gpio_is_valid(info->gpio_nstby)) | ||
436 | gpio_set_value(info->gpio_nstby, 0); | ||
437 | |||
438 | if (gpio_is_valid(info->gpio_nreset)) | ||
439 | gpio_set_value(info->gpio_nreset, 0); | ||
440 | |||
441 | info->power = 0; | ||
442 | |||
443 | v4l2_dbg(1, debug, &info->sd, "%s: sensor is off\n", __func__); | ||
444 | |||
445 | return 0; | ||
446 | } | ||
447 | |||
448 | static int noon010_s_ctrl(struct v4l2_ctrl *ctrl) | ||
449 | { | ||
450 | struct v4l2_subdev *sd = to_sd(ctrl); | ||
451 | |||
452 | v4l2_dbg(1, debug, sd, "%s: ctrl_id: %d, value: %d\n", | ||
453 | __func__, ctrl->id, ctrl->val); | ||
454 | |||
455 | switch (ctrl->id) { | ||
456 | case V4L2_CID_AUTO_WHITE_BALANCE: | ||
457 | return noon010_enable_autowhitebalance(sd, ctrl->val); | ||
458 | case V4L2_CID_BLUE_BALANCE: | ||
459 | return cam_i2c_write(sd, MWB_BGAIN_REG, ctrl->val); | ||
460 | case V4L2_CID_RED_BALANCE: | ||
461 | return cam_i2c_write(sd, MWB_RGAIN_REG, ctrl->val); | ||
462 | default: | ||
463 | return -EINVAL; | ||
464 | } | ||
465 | } | ||
466 | |||
467 | static int noon010_enum_fmt(struct v4l2_subdev *sd, unsigned int index, | ||
468 | enum v4l2_mbus_pixelcode *code) | ||
469 | { | ||
470 | if (!code || index >= ARRAY_SIZE(noon010_formats)) | ||
471 | return -EINVAL; | ||
472 | |||
473 | *code = noon010_formats[index].code; | ||
474 | return 0; | ||
475 | } | ||
476 | |||
477 | static int noon010_g_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *mf) | ||
478 | { | ||
479 | struct noon010_info *info = to_noon010(sd); | ||
480 | int ret; | ||
481 | |||
482 | if (!mf) | ||
483 | return -EINVAL; | ||
484 | |||
485 | if (!info->curr_win || !info->curr_fmt) { | ||
486 | ret = noon010_set_params(sd); | ||
487 | if (ret) | ||
488 | return ret; | ||
489 | } | ||
490 | |||
491 | mf->width = info->curr_win->width; | ||
492 | mf->height = info->curr_win->height; | ||
493 | mf->code = info->curr_fmt->code; | ||
494 | mf->colorspace = info->curr_fmt->colorspace; | ||
495 | mf->field = V4L2_FIELD_NONE; | ||
496 | |||
497 | return 0; | ||
498 | } | ||
499 | |||
500 | /* Return nearest media bus frame format. */ | ||
501 | static const struct noon010_format *try_fmt(struct v4l2_subdev *sd, | ||
502 | struct v4l2_mbus_framefmt *mf) | ||
503 | { | ||
504 | int i = ARRAY_SIZE(noon010_formats); | ||
505 | |||
506 | noon010_try_frame_size(mf); | ||
507 | |||
508 | while (i--) | ||
509 | if (mf->code == noon010_formats[i].code) | ||
510 | break; | ||
511 | |||
512 | mf->code = noon010_formats[i].code; | ||
513 | |||
514 | return &noon010_formats[i]; | ||
515 | } | ||
516 | |||
517 | static int noon010_try_fmt(struct v4l2_subdev *sd, | ||
518 | struct v4l2_mbus_framefmt *mf) | ||
519 | { | ||
520 | if (!sd || !mf) | ||
521 | return -EINVAL; | ||
522 | |||
523 | try_fmt(sd, mf); | ||
524 | return 0; | ||
525 | } | ||
526 | |||
527 | static int noon010_s_fmt(struct v4l2_subdev *sd, | ||
528 | struct v4l2_mbus_framefmt *mf) | ||
529 | { | ||
530 | struct noon010_info *info = to_noon010(sd); | ||
531 | |||
532 | if (!sd || !mf) | ||
533 | return -EINVAL; | ||
534 | |||
535 | info->curr_fmt = try_fmt(sd, mf); | ||
536 | |||
537 | return noon010_set_params(sd); | ||
538 | } | ||
539 | |||
540 | static int noon010_base_config(struct v4l2_subdev *sd) | ||
541 | { | ||
542 | struct noon010_info *info = to_noon010(sd); | ||
543 | int ret; | ||
544 | |||
545 | ret = noon010_bulk_write_reg(sd, noon010_base_regs); | ||
546 | if (!ret) { | ||
547 | info->curr_fmt = &noon010_formats[0]; | ||
548 | info->curr_win = &noon010_sizes[0]; | ||
549 | ret = noon010_set_params(sd); | ||
550 | } | ||
551 | if (!ret) | ||
552 | ret = noon010_set_flip(sd, 1, 0); | ||
553 | if (!ret) | ||
554 | ret = noon010_power_ctrl(sd, false, false); | ||
555 | |||
556 | /* sync the handler and the registers state */ | ||
557 | v4l2_ctrl_handler_setup(&to_noon010(sd)->hdl); | ||
558 | return ret; | ||
559 | } | ||
560 | |||
561 | static int noon010_s_power(struct v4l2_subdev *sd, int on) | ||
562 | { | ||
563 | struct noon010_info *info = to_noon010(sd); | ||
564 | const struct noon010pc30_platform_data *pdata = info->pdata; | ||
565 | int ret = 0; | ||
566 | |||
567 | if (WARN(pdata == NULL, "No platform data!\n")) | ||
568 | return -ENOMEM; | ||
569 | |||
570 | if (on) { | ||
571 | ret = power_enable(info); | ||
572 | if (ret) | ||
573 | return ret; | ||
574 | ret = noon010_base_config(sd); | ||
575 | } else { | ||
576 | noon010_power_ctrl(sd, false, true); | ||
577 | ret = power_disable(info); | ||
578 | info->curr_win = NULL; | ||
579 | info->curr_fmt = NULL; | ||
580 | } | ||
581 | |||
582 | return ret; | ||
583 | } | ||
584 | |||
585 | static int noon010_g_chip_ident(struct v4l2_subdev *sd, | ||
586 | struct v4l2_dbg_chip_ident *chip) | ||
587 | { | ||
588 | struct i2c_client *client = v4l2_get_subdevdata(sd); | ||
589 | |||
590 | return v4l2_chip_ident_i2c_client(client, chip, | ||
591 | V4L2_IDENT_NOON010PC30, 0); | ||
592 | } | ||
593 | |||
594 | static int noon010_log_status(struct v4l2_subdev *sd) | ||
595 | { | ||
596 | struct noon010_info *info = to_noon010(sd); | ||
597 | |||
598 | v4l2_ctrl_handler_log_status(&info->hdl, sd->name); | ||
599 | return 0; | ||
600 | } | ||
601 | |||
602 | static const struct v4l2_ctrl_ops noon010_ctrl_ops = { | ||
603 | .s_ctrl = noon010_s_ctrl, | ||
604 | }; | ||
605 | |||
606 | static const struct v4l2_subdev_core_ops noon010_core_ops = { | ||
607 | .g_chip_ident = noon010_g_chip_ident, | ||
608 | .s_power = noon010_s_power, | ||
609 | .g_ctrl = v4l2_subdev_g_ctrl, | ||
610 | .s_ctrl = v4l2_subdev_s_ctrl, | ||
611 | .queryctrl = v4l2_subdev_queryctrl, | ||
612 | .querymenu = v4l2_subdev_querymenu, | ||
613 | .g_ext_ctrls = v4l2_subdev_g_ext_ctrls, | ||
614 | .try_ext_ctrls = v4l2_subdev_try_ext_ctrls, | ||
615 | .s_ext_ctrls = v4l2_subdev_s_ext_ctrls, | ||
616 | .log_status = noon010_log_status, | ||
617 | }; | ||
618 | |||
619 | static const struct v4l2_subdev_video_ops noon010_video_ops = { | ||
620 | .g_mbus_fmt = noon010_g_fmt, | ||
621 | .s_mbus_fmt = noon010_s_fmt, | ||
622 | .try_mbus_fmt = noon010_try_fmt, | ||
623 | .enum_mbus_fmt = noon010_enum_fmt, | ||
624 | }; | ||
625 | |||
626 | static const struct v4l2_subdev_ops noon010_ops = { | ||
627 | .core = &noon010_core_ops, | ||
628 | .video = &noon010_video_ops, | ||
629 | }; | ||
630 | |||
631 | /* Return 0 if NOON010PC30L sensor type was detected or -ENODEV otherwise. */ | ||
632 | static int noon010_detect(struct i2c_client *client, struct noon010_info *info) | ||
633 | { | ||
634 | int ret; | ||
635 | |||
636 | ret = power_enable(info); | ||
637 | if (ret) | ||
638 | return ret; | ||
639 | |||
640 | ret = i2c_smbus_read_byte_data(client, DEVICE_ID_REG); | ||
641 | if (ret < 0) | ||
642 | dev_err(&client->dev, "I2C read failed: 0x%X\n", ret); | ||
643 | |||
644 | power_disable(info); | ||
645 | |||
646 | return ret == NOON010PC30_ID ? 0 : -ENODEV; | ||
647 | } | ||
648 | |||
649 | static int noon010_probe(struct i2c_client *client, | ||
650 | const struct i2c_device_id *id) | ||
651 | { | ||
652 | struct noon010_info *info; | ||
653 | struct v4l2_subdev *sd; | ||
654 | const struct noon010pc30_platform_data *pdata | ||
655 | = client->dev.platform_data; | ||
656 | int ret; | ||
657 | int i; | ||
658 | |||
659 | if (!pdata) { | ||
660 | dev_err(&client->dev, "No platform data!\n"); | ||
661 | return -EIO; | ||
662 | } | ||
663 | |||
664 | info = kzalloc(sizeof(*info), GFP_KERNEL); | ||
665 | if (!info) | ||
666 | return -ENOMEM; | ||
667 | |||
668 | sd = &info->sd; | ||
669 | strlcpy(sd->name, MODULE_NAME, sizeof(sd->name)); | ||
670 | v4l2_i2c_subdev_init(sd, client, &noon010_ops); | ||
671 | |||
672 | v4l2_ctrl_handler_init(&info->hdl, 3); | ||
673 | |||
674 | v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops, | ||
675 | V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1); | ||
676 | v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops, | ||
677 | V4L2_CID_RED_BALANCE, 0, 127, 1, 64); | ||
678 | v4l2_ctrl_new_std(&info->hdl, &noon010_ctrl_ops, | ||
679 | V4L2_CID_BLUE_BALANCE, 0, 127, 1, 64); | ||
680 | |||
681 | sd->ctrl_handler = &info->hdl; | ||
682 | |||
683 | ret = info->hdl.error; | ||
684 | if (ret) | ||
685 | goto np_err; | ||
686 | |||
687 | info->pdata = client->dev.platform_data; | ||
688 | info->i2c_reg_page = -1; | ||
689 | info->gpio_nreset = -EINVAL; | ||
690 | info->gpio_nstby = -EINVAL; | ||
691 | |||
692 | if (gpio_is_valid(pdata->gpio_nreset)) { | ||
693 | ret = gpio_request(pdata->gpio_nreset, "NOON010PC30 NRST"); | ||
694 | if (ret) { | ||
695 | dev_err(&client->dev, "GPIO request error: %d\n", ret); | ||
696 | goto np_err; | ||
697 | } | ||
698 | info->gpio_nreset = pdata->gpio_nreset; | ||
699 | gpio_direction_output(info->gpio_nreset, 0); | ||
700 | gpio_export(info->gpio_nreset, 0); | ||
701 | } | ||
702 | |||
703 | if (gpio_is_valid(pdata->gpio_nstby)) { | ||
704 | ret = gpio_request(pdata->gpio_nstby, "NOON010PC30 NSTBY"); | ||
705 | if (ret) { | ||
706 | dev_err(&client->dev, "GPIO request error: %d\n", ret); | ||
707 | goto np_gpio_err; | ||
708 | } | ||
709 | info->gpio_nstby = pdata->gpio_nstby; | ||
710 | gpio_direction_output(info->gpio_nstby, 0); | ||
711 | gpio_export(info->gpio_nstby, 0); | ||
712 | } | ||
713 | |||
714 | for (i = 0; i < NOON010_NUM_SUPPLIES; i++) | ||
715 | info->supply[i].supply = noon010_supply_name[i]; | ||
716 | |||
717 | ret = regulator_bulk_get(&client->dev, NOON010_NUM_SUPPLIES, | ||
718 | info->supply); | ||
719 | if (ret) | ||
720 | goto np_reg_err; | ||
721 | |||
722 | ret = noon010_detect(client, info); | ||
723 | if (!ret) | ||
724 | return 0; | ||
725 | |||
726 | /* the sensor detection failed */ | ||
727 | regulator_bulk_free(NOON010_NUM_SUPPLIES, info->supply); | ||
728 | np_reg_err: | ||
729 | if (gpio_is_valid(info->gpio_nstby)) | ||
730 | gpio_free(info->gpio_nstby); | ||
731 | np_gpio_err: | ||
732 | if (gpio_is_valid(info->gpio_nreset)) | ||
733 | gpio_free(info->gpio_nreset); | ||
734 | np_err: | ||
735 | v4l2_ctrl_handler_free(&info->hdl); | ||
736 | v4l2_device_unregister_subdev(sd); | ||
737 | kfree(info); | ||
738 | return ret; | ||
739 | } | ||
740 | |||
741 | static int noon010_remove(struct i2c_client *client) | ||
742 | { | ||
743 | struct v4l2_subdev *sd = i2c_get_clientdata(client); | ||
744 | struct noon010_info *info = to_noon010(sd); | ||
745 | |||
746 | v4l2_device_unregister_subdev(sd); | ||
747 | v4l2_ctrl_handler_free(&info->hdl); | ||
748 | |||
749 | regulator_bulk_free(NOON010_NUM_SUPPLIES, info->supply); | ||
750 | |||
751 | if (gpio_is_valid(info->gpio_nreset)) | ||
752 | gpio_free(info->gpio_nreset); | ||
753 | |||
754 | if (gpio_is_valid(info->gpio_nstby)) | ||
755 | gpio_free(info->gpio_nstby); | ||
756 | |||
757 | kfree(info); | ||
758 | return 0; | ||
759 | } | ||
760 | |||
761 | static const struct i2c_device_id noon010_id[] = { | ||
762 | { MODULE_NAME, 0 }, | ||
763 | { }, | ||
764 | }; | ||
765 | MODULE_DEVICE_TABLE(i2c, noon010_id); | ||
766 | |||
767 | |||
768 | static struct i2c_driver noon010_i2c_driver = { | ||
769 | .driver = { | ||
770 | .name = MODULE_NAME | ||
771 | }, | ||
772 | .probe = noon010_probe, | ||
773 | .remove = noon010_remove, | ||
774 | .id_table = noon010_id, | ||
775 | }; | ||
776 | |||
777 | static int __init noon010_init(void) | ||
778 | { | ||
779 | return i2c_add_driver(&noon010_i2c_driver); | ||
780 | } | ||
781 | |||
782 | static void __exit noon010_exit(void) | ||
783 | { | ||
784 | i2c_del_driver(&noon010_i2c_driver); | ||
785 | } | ||
786 | |||
787 | module_init(noon010_init); | ||
788 | module_exit(noon010_exit); | ||
789 | |||
790 | MODULE_DESCRIPTION("Siliconfile NOON010PC30 camera driver"); | ||
791 | MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>"); | ||
792 | MODULE_LICENSE("GPL"); | ||
diff --git a/include/media/noon010pc30.h b/include/media/noon010pc30.h new file mode 100644 index 000000000000..58eafee36b30 --- /dev/null +++ b/include/media/noon010pc30.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Driver header for NOON010PC30L camera sensor chip. | ||
3 | * | ||
4 | * Copyright (c) 2010 Samsung Electronics, Co. Ltd | ||
5 | * Contact: Sylwester Nawrocki <s.nawrocki@samsung.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef NOON010PC30_H | ||
14 | #define NOON010PC30_H | ||
15 | |||
16 | /** | ||
17 | * @clk_rate: the clock frequency in Hz | ||
18 | * @gpio_nreset: GPIO driving nRESET pin | ||
19 | * @gpio_nstby: GPIO driving nSTBY pin | ||
20 | */ | ||
21 | |||
22 | struct noon010pc30_platform_data { | ||
23 | unsigned long clk_rate; | ||
24 | int gpio_nreset; | ||
25 | int gpio_nstby; | ||
26 | }; | ||
27 | |||
28 | #endif /* NOON010PC30_H */ | ||