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-rw-r--r--drivers/ssb/pci.c75
-rw-r--r--include/linux/ssb/ssb.h74
-rw-r--r--include/linux/ssb/ssb_regs.h49
3 files changed, 43 insertions, 155 deletions
diff --git a/drivers/ssb/pci.c b/drivers/ssb/pci.c
index 8f600fcd2430..9777dcb5bfe5 100644
--- a/drivers/ssb/pci.c
+++ b/drivers/ssb/pci.c
@@ -297,62 +297,6 @@ err_ctlreg:
297 return err; 297 return err;
298} 298}
299 299
300static void sprom_extract_r1(struct ssb_sprom_r1 *out, const u16 *in)
301{
302 int i;
303 u16 v;
304
305 SPEX(pci_spid, SSB_SPROM1_SPID, 0xFFFF, 0);
306 SPEX(pci_svid, SSB_SPROM1_SVID, 0xFFFF, 0);
307 SPEX(pci_pid, SSB_SPROM1_PID, 0xFFFF, 0);
308 for (i = 0; i < 3; i++) {
309 v = in[SPOFF(SSB_SPROM1_IL0MAC) + i];
310 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
311 }
312 for (i = 0; i < 3; i++) {
313 v = in[SPOFF(SSB_SPROM1_ET0MAC) + i];
314 *(((__be16 *)out->et0mac) + i) = cpu_to_be16(v);
315 }
316 for (i = 0; i < 3; i++) {
317 v = in[SPOFF(SSB_SPROM1_ET1MAC) + i];
318 *(((__be16 *)out->et1mac) + i) = cpu_to_be16(v);
319 }
320 SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
321 SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
322 SSB_SPROM1_ETHPHY_ET1A_SHIFT);
323 SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
324 SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
325 SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
326 SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
327 SSB_SPROM1_BINF_CCODE_SHIFT);
328 SPEX(antenna_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
329 SSB_SPROM1_BINF_ANTA_SHIFT);
330 SPEX(antenna_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
331 SSB_SPROM1_BINF_ANTBG_SHIFT);
332 SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
333 SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
334 SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
335 SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
336 SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
337 SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
338 SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
339 SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
340 SSB_SPROM1_GPIOA_P1_SHIFT);
341 SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
342 SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
343 SSB_SPROM1_GPIOB_P3_SHIFT);
344 SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
345 SSB_SPROM1_MAXPWR_A_SHIFT);
346 SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
347 SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
348 SSB_SPROM1_ITSSI_A_SHIFT);
349 SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
350 SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
351 SPEX(antenna_gain_a, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_A, 0);
352 SPEX(antenna_gain_bg, SSB_SPROM1_AGAIN, SSB_SPROM1_AGAIN_BG,
353 SSB_SPROM1_AGAIN_BG_SHIFT);
354}
355
356static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in) 300static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
357{ 301{
358 int i; 302 int i;
@@ -414,7 +358,7 @@ static void sprom_extract_r4(struct ssb_sprom *out, const u16 *in)
414 int i; 358 int i;
415 u16 v; 359 u16 v;
416 360
417 /* extract the r1 variables */ 361 /* extract the equivalent of the r1 variables */
418 for (i = 0; i < 3; i++) { 362 for (i = 0; i < 3; i++) {
419 v = in[SPOFF(SSB_SPROM4_IL0MAC) + i]; 363 v = in[SPOFF(SSB_SPROM4_IL0MAC) + i];
420 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v); 364 *(((__be16 *)out->il0mac) + i) = cpu_to_be16(v);
@@ -435,6 +379,18 @@ static void sprom_extract_r4(struct ssb_sprom *out, const u16 *in)
435 SPEX(antenna_gain_a, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_0, 0); 379 SPEX(antenna_gain_a, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_0, 0);
436 SPEX(antenna_gain_bg, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_1, 380 SPEX(antenna_gain_bg, SSB_SPROM4_AGAIN, SSB_SPROM4_AGAIN_1,
437 SSB_SPROM4_AGAIN_1_SHIFT); 381 SSB_SPROM4_AGAIN_1_SHIFT);
382 SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
383 SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
384 SSB_SPROM4_ITSSI_BG_SHIFT);
385 SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
386 SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
387 SSB_SPROM4_ITSSI_A_SHIFT);
388 SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
389 SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
390 SSB_SPROM4_GPIOA_P1_SHIFT);
391 SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
392 SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
393 SSB_SPROM4_GPIOB_P3_SHIFT);
438 /* TODO - get remaining rev 4 stuff needed */ 394 /* TODO - get remaining rev 4 stuff needed */
439} 395}
440 396
@@ -444,13 +400,13 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
444 memset(out, 0, sizeof(*out)); 400 memset(out, 0, sizeof(*out));
445 401
446 out->revision = in[size - 1] & 0x00FF; 402 out->revision = in[size - 1] & 0x00FF;
403 ssb_printk(KERN_INFO PFX "SPROM revision %d detected.\n", out->revision);
447 if ((bus->chip_id & 0xFF00) == 0x4400) { 404 if ((bus->chip_id & 0xFF00) == 0x4400) {
448 /* Workaround: The BCM44XX chip has a stupid revision 405 /* Workaround: The BCM44XX chip has a stupid revision
449 * number stored in the SPROM. 406 * number stored in the SPROM.
450 * Always extract r1. */ 407 * Always extract r1. */
451 out->revision = 1; 408 out->revision = 1;
452 sprom_extract_r123(out, in); 409 sprom_extract_r123(out, in);
453 sprom_extract_r1(&out->r1, in);
454 } else if (bus->chip_id == 0x4321) { 410 } else if (bus->chip_id == 0x4321) {
455 /* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */ 411 /* the BCM4328 has a chipid == 0x4321 and a rev 4 SPROM */
456 out->revision = 4; 412 out->revision = 4;
@@ -460,7 +416,6 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
460 goto unsupported; 416 goto unsupported;
461 if (out->revision >= 1 && out->revision <= 3) { 417 if (out->revision >= 1 && out->revision <= 3) {
462 sprom_extract_r123(out, in); 418 sprom_extract_r123(out, in);
463 sprom_extract_r1(&out->r1, in);
464 } 419 }
465 if (out->revision == 4) 420 if (out->revision == 4)
466 sprom_extract_r4(out, in); 421 sprom_extract_r4(out, in);
@@ -472,7 +427,7 @@ static int sprom_extract(struct ssb_bus *bus, struct ssb_sprom *out,
472unsupported: 427unsupported:
473 ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d " 428 ssb_printk(KERN_WARNING PFX "Unsupported SPROM revision %d "
474 "detected. Will extract v1\n", out->revision); 429 "detected. Will extract v1\n", out->revision);
475 sprom_extract_r1(&out->r1, in); 430 sprom_extract_r123(out, in);
476 return 0; 431 return 0;
477} 432}
478 433
diff --git a/include/linux/ssb/ssb.h b/include/linux/ssb/ssb.h
index 745de2aac85f..a21ab29ff363 100644
--- a/include/linux/ssb/ssb.h
+++ b/include/linux/ssb/ssb.h
@@ -15,72 +15,8 @@ struct pcmcia_device;
15struct ssb_bus; 15struct ssb_bus;
16struct ssb_driver; 16struct ssb_driver;
17 17
18
19struct ssb_sprom_r1 {
20 u16 pci_spid; /* Subsystem Product ID for PCI */
21 u16 pci_svid; /* Subsystem Vendor ID for PCI */
22 u16 pci_pid; /* Product ID for PCI */
23 u8 il0mac[6]; /* MAC address for 802.11b/g */
24 u8 et0mac[6]; /* MAC address for Ethernet */
25 u8 et1mac[6]; /* MAC address for 802.11a */
26 u8 et0phyaddr:5; /* MII address for enet0 */
27 u8 et1phyaddr:5; /* MII address for enet1 */
28 u8 et0mdcport:1; /* MDIO for enet0 */
29 u8 et1mdcport:1; /* MDIO for enet1 */
30 u8 board_rev; /* Board revision */
31 u8 country_code:4; /* Country Code */
32 u8 antenna_a:2; /* Antenna 0/1 available for A-PHY */
33 u8 antenna_bg:2; /* Antenna 0/1 available for B-PHY and G-PHY */
34 u16 pa0b0;
35 u16 pa0b1;
36 u16 pa0b2;
37 u16 pa1b0;
38 u16 pa1b1;
39 u16 pa1b2;
40 u8 gpio0; /* GPIO pin 0 */
41 u8 gpio1; /* GPIO pin 1 */
42 u8 gpio2; /* GPIO pin 2 */
43 u8 gpio3; /* GPIO pin 3 */
44 u16 maxpwr_a; /* A-PHY Power Amplifier Max Power (in dBm Q5.2) */
45 u16 maxpwr_bg; /* B/G-PHY Power Amplifier Max Power (in dBm Q5.2) */
46 u8 itssi_a; /* Idle TSSI Target for A-PHY */
47 u8 itssi_bg; /* Idle TSSI Target for B/G-PHY */
48 u16 boardflags_lo; /* Boardflags (low 16 bits) */
49 u8 antenna_gain_a; /* A-PHY Antenna gain (in dBm Q5.2) */
50 u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */
51 u8 oem[8]; /* OEM string (rev 1 only) */
52};
53
54struct ssb_sprom_r2 {
55 u16 boardflags_hi; /* Boardflags (high 16 bits) */
56 u8 maxpwr_a_lo; /* A-PHY Max Power Low */
57 u8 maxpwr_a_hi; /* A-PHY Max Power High */
58 u16 pa1lob0; /* A-PHY PA Low Settings */
59 u16 pa1lob1; /* A-PHY PA Low Settings */
60 u16 pa1lob2; /* A-PHY PA Low Settings */
61 u16 pa1hib0; /* A-PHY PA High Settings */
62 u16 pa1hib1; /* A-PHY PA High Settings */
63 u16 pa1hib2; /* A-PHY PA High Settings */
64 u8 ofdm_pwr_off; /* OFDM Power Offset from CCK Level */
65 u8 country_str[2]; /* Two char Country Code */
66};
67
68struct ssb_sprom_r3 {
69 u32 ofdmapo; /* A-PHY OFDM Mid Power Offset */
70 u32 ofdmalpo; /* A-PHY OFDM Low Power Offset */
71 u32 ofdmahpo; /* A-PHY OFDM High Power Offset */
72 u8 gpioldc_on_cnt; /* GPIO LED Powersave Duty Cycle ON count */
73 u8 gpioldc_off_cnt; /* GPIO LED Powersave Duty Cycle OFF count */
74 u8 cckpo_1M:4; /* CCK Power Offset for Rate 1M */
75 u8 cckpo_2M:4; /* CCK Power Offset for Rate 2M */
76 u8 cckpo_55M:4; /* CCK Power Offset for Rate 5.5M */
77 u8 cckpo_11M:4; /* CCK Power Offset for Rate 11M */
78 u32 ofdmgpo; /* G-PHY OFDM Power Offset */
79};
80
81struct ssb_sprom { 18struct ssb_sprom {
82 u8 revision; 19 u8 revision;
83 u8 temp_fill[2 * sizeof(struct ssb_sprom_r1)];
84 u8 il0mac[6]; /* MAC address for 802.11b/g */ 20 u8 il0mac[6]; /* MAC address for 802.11b/g */
85 u8 et0mac[6]; /* MAC address for Ethernet */ 21 u8 et0mac[6]; /* MAC address for Ethernet */
86 u8 et1mac[6]; /* MAC address for 802.11a */ 22 u8 et1mac[6]; /* MAC address for 802.11a */
@@ -106,16 +42,6 @@ struct ssb_sprom {
106 u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */ 42 u8 antenna_gain_bg; /* B/G-PHY Antenna gain (in dBm Q5.2) */
107 43
108 /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */ 44 /* TODO - add any parameters needed from rev 2, 3, or 4 SPROMs */
109 /* The valid r# fields are selected by the "revision".
110 * Revision 3 and lower inherit from lower revisions.
111 */
112 union {
113 struct {
114 struct ssb_sprom_r1 r1;
115 struct ssb_sprom_r2 r2;
116 struct ssb_sprom_r3 r3;
117 };
118 };
119}; 45};
120 46
121/* Information about the PCB the circuitry is soldered on. */ 47/* Information about the PCB the circuitry is soldered on. */
diff --git a/include/linux/ssb/ssb_regs.h b/include/linux/ssb/ssb_regs.h
index 96bba69b1271..30222e89ad16 100644
--- a/include/linux/ssb/ssb_regs.h
+++ b/include/linux/ssb/ssb_regs.h
@@ -175,6 +175,7 @@
175#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */ 175#define SSB_SPROM_REVISION_REV 0x00FF /* SPROM Revision number */
176#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */ 176#define SSB_SPROM_REVISION_CRC 0xFF00 /* SPROM CRC8 value */
177#define SSB_SPROM_REVISION_CRC_SHIFT 8 177#define SSB_SPROM_REVISION_CRC_SHIFT 8
178
178/* SPROM Revision 1 */ 179/* SPROM Revision 1 */
179#define SSB_SPROM1_SPID 0x1004 /* Subsystem Product ID for PCI */ 180#define SSB_SPROM1_SPID 0x1004 /* Subsystem Product ID for PCI */
180#define SSB_SPROM1_SVID 0x1006 /* Subsystem Vendor ID for PCI */ 181#define SSB_SPROM1_SVID 0x1006 /* Subsystem Vendor ID for PCI */
@@ -223,7 +224,7 @@
223#define SSB_SPROM1_AGAIN_A 0x00FF /* A-PHY */ 224#define SSB_SPROM1_AGAIN_A 0x00FF /* A-PHY */
224#define SSB_SPROM1_AGAIN_BG 0xFF00 /* B-PHY and G-PHY */ 225#define SSB_SPROM1_AGAIN_BG 0xFF00 /* B-PHY and G-PHY */
225#define SSB_SPROM1_AGAIN_BG_SHIFT 8 226#define SSB_SPROM1_AGAIN_BG_SHIFT 8
226#define SSB_SPROM1_OEM 0x1076 /* 8 bytes OEM string (rev 1 only) */ 227
227/* SPROM Revision 2 (inherits from rev 1) */ 228/* SPROM Revision 2 (inherits from rev 1) */
228#define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */ 229#define SSB_SPROM2_BFLHI 0x1038 /* Boardflags (high 16 bits) */
229#define SSB_SPROM2_MAXP_A 0x103A /* A-PHY Max Power */ 230#define SSB_SPROM2_MAXP_A 0x103A /* A-PHY Max Power */
@@ -240,6 +241,7 @@
240#define SSB_SPROM2_OPO_VALUE 0x00FF 241#define SSB_SPROM2_OPO_VALUE 0x00FF
241#define SSB_SPROM2_OPO_UNUSED 0xFF00 242#define SSB_SPROM2_OPO_UNUSED 0xFF00
242#define SSB_SPROM2_CCODE 0x107C /* Two char Country Code */ 243#define SSB_SPROM2_CCODE 0x107C /* Two char Country Code */
244
243/* SPROM Revision 3 (inherits most data from rev 2) */ 245/* SPROM Revision 3 (inherits most data from rev 2) */
244#define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */ 246#define SSB_SPROM3_IL0MAC 0x104A /* 6 bytes MAC address for 802.11b/g */
245#define SSB_SPROM3_ET0MAC 0x1050 /* 6 bytes MAC address for Ethernet ?? */ 247#define SSB_SPROM3_ET0MAC 0x1050 /* 6 bytes MAC address for Ethernet ?? */
@@ -261,11 +263,12 @@
261#define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */ 263#define SSB_SPROM3_CCKPO_11M 0xF000 /* 11M Rate PO */
262#define SSB_SPROM3_CCKPO_11M_SHIFT 12 264#define SSB_SPROM3_CCKPO_11M_SHIFT 12
263#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */ 265#define SSB_SPROM3_OFDMGPO 0x107A /* G-PHY OFDM Power Offset (4 bytes, BigEndian) */
266
264/* SPROM Revision 4 entries with ?? in comment are unknown */ 267/* SPROM Revision 4 entries with ?? in comment are unknown */
265#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for b/g */ 268#define SSB_SPROM4_IL0MAC 0x104C /* 6 byte MAC address for a/b/g/n */
266#define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */ 269#define SSB_SPROM4_ET0MAC 0x1018 /* 6 bytes MAC address for Ethernet ?? */
267#define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */ 270#define SSB_SPROM4_ET1MAC 0x1018 /* 6 bytes MAC address for 802.11a ?? */
268#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings */ 271#define SSB_SPROM4_ETHPHY 0x105A /* Ethernet PHY settings ?? */
269#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */ 272#define SSB_SPROM4_ETHPHY_ET0A 0x001F /* MII Address for enet0 */
270#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */ 273#define SSB_SPROM4_ETHPHY_ET1A 0x03E0 /* MII Address for enet1 */
271#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5 274#define SSB_SPROM4_ETHPHY_ET1A_SHIFT 5
@@ -280,24 +283,28 @@
280#define SSB_SPROM4_AGAIN_1 0xFF00 /* Antenna 1 */ 283#define SSB_SPROM4_AGAIN_1 0xFF00 /* Antenna 1 */
281#define SSB_SPROM4_AGAIN_1_SHIFT 8 284#define SSB_SPROM4_AGAIN_1_SHIFT 8
282#define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */ 285#define SSB_SPROM4_BFLHI 0x1046 /* Board Flags Hi */
283#define SSB_SPROM4_MAXP_A 0x1000 /* Max Power A ?? */ 286#define SSB_SPROM4_MAXP_BG 0x1080 /* Max Power BG in path 1 */
284#define SSB_SPROM4_MAXP_A_HI 0x00FF /* Mask for Hi */ 287#define SSB_SPROM4_MAXP_BG_MASK 0x00FF /* Mask for Max Power BG */
285#define SSB_SPROM4_MAXP_A_LO 0xFF00 /* Mask for Lo */ 288#define SSB_SPROM4_ITSSI_BG 0xFF00 /* Mask for path 1 itssi_bg */
286#define SSB_SPROM4_MAXP_A_LO_SHIFT 16 /* Shift for Lo */ 289#define SSB_SPROM4_ITSSI_BG_SHIFT 8
287#define SSB_SPROM4_PA1LOB0 0x1000 /* ?? */ 290#define SSB_SPROM4_MAXP_A 0x108A /* Max Power A in path 1 */
288#define SSB_SPROM4_PA1LOB1 0x1000 /* ?? */ 291#define SSB_SPROM4_MAXP_A_MASK 0x00FF /* Mask for Max Power A */
289#define SSB_SPROM4_PA1LOB2 0x1000 /* ?? */ 292#define SSB_SPROM4_ITSSI_A 0xFF00 /* Mask for path 1 itssi_a */
290#define SSB_SPROM4_PA1HIB0 0x1000 /* ?? */ 293#define SSB_SPROM4_ITSSI_A_SHIFT 8
291#define SSB_SPROM4_PA1HIB1 0x1000 /* ?? */ 294#define SSB_SPROM4_GPIOA 0x1056 /* Gen. Purpose IO # 0 and 1 */
292#define SSB_SPROM4_PA1HIB2 0x1000 /* ?? */ 295#define SSB_SPROM4_GPIOA_P0 0x00FF /* Pin 0 */
293#define SSB_SPROM4_OPO 0x1000 /* ?? */ 296#define SSB_SPROM4_GPIOA_P1 0xFF00 /* Pin 1 */
294#define SSB_SPROM4_OPO_VALUE 0x0000 /* ?? */ 297#define SSB_SPROM4_GPIOA_P1_SHIFT 8
295#define SSB_SPROM4_GPIOLDC 0x105A /* LED Powersave Duty Cycle */ 298#define SSB_SPROM4_GPIOB 0x1058 /* Gen. Purpose IO # 2 and 3 */
296#define SSB_SPROM4_GPIOLDC_OFF 0x0000FF00 /* Off Count */ 299#define SSB_SPROM4_GPIOB_P2 0x00FF /* Pin 2 */
297#define SSB_SPROM4_GPIOLDC_OFF_SHIFT 8 300#define SSB_SPROM4_GPIOB_P3 0xFF00 /* Pin 3 */
298#define SSB_SPROM4_GPIOLDC_ON 0x00FF0000 /* On Count */ 301#define SSB_SPROM4_GPIOB_P3_SHIFT 8
299#define SSB_SPROM4_GPIOLDC_ON_SHIFT 16 302#define SSB_SPROM4_PA0B0 0x1082 /* The paXbY locations are */
300 303#define SSB_SPROM4_PA0B1 0x1084 /* only guesses */
304#define SSB_SPROM4_PA0B2 0x1086
305#define SSB_SPROM4_PA1B0 0x108E
306#define SSB_SPROM4_PA1B1 0x1090
307#define SSB_SPROM4_PA1B2 0x1092
301 308
302/* Values for SSB_SPROM1_BINF_CCODE */ 309/* Values for SSB_SPROM1_BINF_CCODE */
303enum { 310enum {