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-rw-r--r--include/asm-mips/mach-au1x00/au1xxx_psc.h8
-rw-r--r--sound/soc/Kconfig1
-rw-r--r--sound/soc/Makefile2
-rw-r--r--sound/soc/au1x/Kconfig32
-rw-r--r--sound/soc/au1x/Makefile13
-rw-r--r--sound/soc/au1x/dbdma2.c421
-rw-r--r--sound/soc/au1x/psc-ac97.c387
-rw-r--r--sound/soc/au1x/psc-i2s.c414
-rw-r--r--sound/soc/au1x/psc.h53
-rw-r--r--sound/soc/au1x/sample-ac97.c144
10 files changed, 1474 insertions, 1 deletions
diff --git a/include/asm-mips/mach-au1x00/au1xxx_psc.h b/include/asm-mips/mach-au1x00/au1xxx_psc.h
index dae4eca2417e..892b7f168eb4 100644
--- a/include/asm-mips/mach-au1x00/au1xxx_psc.h
+++ b/include/asm-mips/mach-au1x00/au1xxx_psc.h
@@ -204,6 +204,14 @@ typedef struct psc_i2s {
204 u32 psc_i2sudf; 204 u32 psc_i2sudf;
205} psc_i2s_t; 205} psc_i2s_t;
206 206
207#define PSC_I2SCFG_OFFSET 0x08
208#define PSC_I2SMASK_OFFSET 0x0C
209#define PSC_I2SPCR_OFFSET 0x10
210#define PSC_I2SSTAT_OFFSET 0x14
211#define PSC_I2SEVENT_OFFSET 0x18
212#define PSC_I2SRXTX_OFFSET 0x1C
213#define PSC_I2SUDF_OFFSET 0x20
214
207/* I2S Config Register. */ 215/* I2S Config Register. */
208#define PSC_I2SCFG_RT_MASK (3 << 30) 216#define PSC_I2SCFG_RT_MASK (3 << 30)
209#define PSC_I2SCFG_RT_FIFO1 (0 << 30) 217#define PSC_I2SCFG_RT_FIFO1 (0 << 30)
diff --git a/sound/soc/Kconfig b/sound/soc/Kconfig
index b939e22db7b4..f743530add8f 100644
--- a/sound/soc/Kconfig
+++ b/sound/soc/Kconfig
@@ -24,6 +24,7 @@ config SND_SOC_AC97_BUS
24# All the supported Soc's 24# All the supported Soc's
25source "sound/soc/at32/Kconfig" 25source "sound/soc/at32/Kconfig"
26source "sound/soc/at91/Kconfig" 26source "sound/soc/at91/Kconfig"
27source "sound/soc/au1x/Kconfig"
27source "sound/soc/pxa/Kconfig" 28source "sound/soc/pxa/Kconfig"
28source "sound/soc/s3c24xx/Kconfig" 29source "sound/soc/s3c24xx/Kconfig"
29source "sound/soc/sh/Kconfig" 30source "sound/soc/sh/Kconfig"
diff --git a/sound/soc/Makefile b/sound/soc/Makefile
index 3645f959c264..933a66d30804 100644
--- a/sound/soc/Makefile
+++ b/sound/soc/Makefile
@@ -2,4 +2,4 @@ snd-soc-core-objs := soc-core.o soc-dapm.o
2 2
3obj-$(CONFIG_SND_SOC) += snd-soc-core.o 3obj-$(CONFIG_SND_SOC) += snd-soc-core.o
4obj-$(CONFIG_SND_SOC) += codecs/ at32/ at91/ pxa/ s3c24xx/ sh/ fsl/ davinci/ 4obj-$(CONFIG_SND_SOC) += codecs/ at32/ at91/ pxa/ s3c24xx/ sh/ fsl/ davinci/
5obj-$(CONFIG_SND_SOC) += omap/ 5obj-$(CONFIG_SND_SOC) += omap/ au1x/
diff --git a/sound/soc/au1x/Kconfig b/sound/soc/au1x/Kconfig
new file mode 100644
index 000000000000..410a893aa66b
--- /dev/null
+++ b/sound/soc/au1x/Kconfig
@@ -0,0 +1,32 @@
1##
2## Au1200/Au1550 PSC + DBDMA
3##
4config SND_SOC_AU1XPSC
5 tristate "SoC Audio for Au1200/Au1250/Au1550"
6 depends on SOC_AU1200 || SOC_AU1550
7 help
8 This option enables support for the Programmable Serial
9 Controllers in AC97 and I2S mode, and the Descriptor-Based DMA
10 Controller (DBDMA) as found on the Au1200/Au1250/Au1550 SoC.
11
12config SND_SOC_AU1XPSC_I2S
13 tristate
14
15config SND_SOC_AU1XPSC_AC97
16 tristate
17 select AC97_BUS
18 select SND_AC97_CODEC
19 select SND_SOC_AC97_BUS
20
21
22##
23## Boards
24##
25config SND_SOC_SAMPLE_PSC_AC97
26 tristate "Sample Au12x0/Au1550 PSC AC97 sound machine"
27 depends on SND_SOC_AU1XPSC
28 select SND_SOC_AU1XPSC_AC97
29 select SND_SOC_AC97_CODEC
30 help
31 This is a sample AC97 sound machine for use in Au12x0/Au1550
32 based systems which have audio on PSC1 (e.g. Db1200 demoboard).
diff --git a/sound/soc/au1x/Makefile b/sound/soc/au1x/Makefile
new file mode 100644
index 000000000000..6c6950b8003a
--- /dev/null
+++ b/sound/soc/au1x/Makefile
@@ -0,0 +1,13 @@
1# Au1200/Au1550 PSC audio
2snd-soc-au1xpsc-dbdma-objs := dbdma2.o
3snd-soc-au1xpsc-i2s-objs := psc-i2s.o
4snd-soc-au1xpsc-ac97-objs := psc-ac97.o
5
6obj-$(CONFIG_SND_SOC_AU1XPSC) += snd-soc-au1xpsc-dbdma.o
7obj-$(CONFIG_SND_SOC_AU1XPSC_I2S) += snd-soc-au1xpsc-i2s.o
8obj-$(CONFIG_SND_SOC_AU1XPSC_AC97) += snd-soc-au1xpsc-ac97.o
9
10# Boards
11snd-soc-sample-ac97-objs := sample-ac97.o
12
13obj-$(CONFIG_SND_SOC_SAMPLE_PSC_AC97) += snd-soc-sample-ac97.o
diff --git a/sound/soc/au1x/dbdma2.c b/sound/soc/au1x/dbdma2.c
new file mode 100644
index 000000000000..1466d9328800
--- /dev/null
+++ b/sound/soc/au1x/dbdma2.c
@@ -0,0 +1,421 @@
1/*
2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
3 *
4 * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <mano@roarinelk.homelinux.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * DMA glue for Au1x-PSC audio.
12 *
13 * NOTE: all of these drivers can only work with a SINGLE instance
14 * of a PSC. Multiple independent audio devices are impossible
15 * with ASoC v1.
16 */
17
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/platform_device.h>
22#include <linux/slab.h>
23#include <linux/dma-mapping.h>
24
25#include <sound/core.h>
26#include <sound/pcm.h>
27#include <sound/pcm_params.h>
28#include <sound/soc.h>
29
30#include <asm/mach-au1x00/au1000.h>
31#include <asm/mach-au1x00/au1xxx_dbdma.h>
32#include <asm/mach-au1x00/au1xxx_psc.h>
33
34#include "psc.h"
35
36/*#define PCM_DEBUG*/
37
38#define MSG(x...) printk(KERN_INFO "au1xpsc_pcm: " x)
39#ifdef PCM_DEBUG
40#define DBG MSG
41#else
42#define DBG(x...) do {} while (0)
43#endif
44
45struct au1xpsc_audio_dmadata {
46 /* DDMA control data */
47 unsigned int ddma_id; /* DDMA direction ID for this PSC */
48 u32 ddma_chan; /* DDMA context */
49
50 /* PCM context (for irq handlers) */
51 struct snd_pcm_substream *substream;
52 unsigned long curr_period; /* current segment DDMA is working on */
53 unsigned long q_period; /* queue period(s) */
54 unsigned long dma_area; /* address of queued DMA area */
55 unsigned long dma_area_s; /* start address of DMA area */
56 unsigned long pos; /* current byte position being played */
57 unsigned long periods; /* number of SG segments in total */
58 unsigned long period_bytes; /* size in bytes of one SG segment */
59
60 /* runtime data */
61 int msbits;
62};
63
64/* instance data. There can be only one, MacLeod!!!! */
65static struct au1xpsc_audio_dmadata *au1xpsc_audio_pcmdma[2];
66
67/*
68 * These settings are somewhat okay, at least on my machine audio plays
69 * almost skip-free. Especially the 64kB buffer seems to help a LOT.
70 */
71#define AU1XPSC_PERIOD_MIN_BYTES 1024
72#define AU1XPSC_BUFFER_MIN_BYTES 65536
73
74#define AU1XPSC_PCM_FMTS \
75 (SNDRV_PCM_FMTBIT_S8 | SNDRV_PCM_FMTBIT_U8 | \
76 SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S16_BE | \
77 SNDRV_PCM_FMTBIT_U16_LE | SNDRV_PCM_FMTBIT_U16_BE | \
78 SNDRV_PCM_FMTBIT_S32_LE | SNDRV_PCM_FMTBIT_S32_BE | \
79 SNDRV_PCM_FMTBIT_U32_LE | SNDRV_PCM_FMTBIT_U32_BE | \
80 0)
81
82/* PCM hardware DMA capabilities - platform specific */
83static const struct snd_pcm_hardware au1xpsc_pcm_hardware = {
84 .info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_MMAP_VALID |
85 SNDRV_PCM_INFO_INTERLEAVED,
86 .formats = AU1XPSC_PCM_FMTS,
87 .period_bytes_min = AU1XPSC_PERIOD_MIN_BYTES,
88 .period_bytes_max = 4096 * 1024 - 1,
89 .periods_min = 2,
90 .periods_max = 4096, /* 2 to as-much-as-you-like */
91 .buffer_bytes_max = 4096 * 1024 - 1,
92 .fifo_size = 16, /* fifo entries of AC97/I2S PSC */
93};
94
95static void au1x_pcm_queue_tx(struct au1xpsc_audio_dmadata *cd)
96{
97 au1xxx_dbdma_put_source_flags(cd->ddma_chan,
98 (void *)phys_to_virt(cd->dma_area),
99 cd->period_bytes, DDMA_FLAGS_IE);
100
101 /* update next-to-queue period */
102 ++cd->q_period;
103 cd->dma_area += cd->period_bytes;
104 if (cd->q_period >= cd->periods) {
105 cd->q_period = 0;
106 cd->dma_area = cd->dma_area_s;
107 }
108}
109
110static void au1x_pcm_queue_rx(struct au1xpsc_audio_dmadata *cd)
111{
112 au1xxx_dbdma_put_dest_flags(cd->ddma_chan,
113 (void *)phys_to_virt(cd->dma_area),
114 cd->period_bytes, DDMA_FLAGS_IE);
115
116 /* update next-to-queue period */
117 ++cd->q_period;
118 cd->dma_area += cd->period_bytes;
119 if (cd->q_period >= cd->periods) {
120 cd->q_period = 0;
121 cd->dma_area = cd->dma_area_s;
122 }
123}
124
125static void au1x_pcm_dmatx_cb(int irq, void *dev_id)
126{
127 struct au1xpsc_audio_dmadata *cd = dev_id;
128
129 cd->pos += cd->period_bytes;
130 if (++cd->curr_period >= cd->periods) {
131 cd->pos = 0;
132 cd->curr_period = 0;
133 }
134 snd_pcm_period_elapsed(cd->substream);
135 au1x_pcm_queue_tx(cd);
136}
137
138static void au1x_pcm_dmarx_cb(int irq, void *dev_id)
139{
140 struct au1xpsc_audio_dmadata *cd = dev_id;
141
142 cd->pos += cd->period_bytes;
143 if (++cd->curr_period >= cd->periods) {
144 cd->pos = 0;
145 cd->curr_period = 0;
146 }
147 snd_pcm_period_elapsed(cd->substream);
148 au1x_pcm_queue_rx(cd);
149}
150
151static void au1x_pcm_dbdma_free(struct au1xpsc_audio_dmadata *pcd)
152{
153 if (pcd->ddma_chan) {
154 au1xxx_dbdma_stop(pcd->ddma_chan);
155 au1xxx_dbdma_reset(pcd->ddma_chan);
156 au1xxx_dbdma_chan_free(pcd->ddma_chan);
157 pcd->ddma_chan = 0;
158 pcd->msbits = 0;
159 }
160}
161
162/* in case of missing DMA ring or changed TX-source / RX-dest bit widths,
163 * allocate (or reallocate) a 2-descriptor DMA ring with bit depth according
164 * to ALSA-supplied sample depth. This is due to limitations in the dbdma api
165 * (cannot adjust source/dest widths of already allocated descriptor ring).
166 */
167static int au1x_pcm_dbdma_realloc(struct au1xpsc_audio_dmadata *pcd,
168 int stype, int msbits)
169{
170 /* DMA only in 8/16/32 bit widths */
171 if (msbits == 24)
172 msbits = 32;
173
174 /* check current config: correct bits and descriptors allocated? */
175 if ((pcd->ddma_chan) && (msbits == pcd->msbits))
176 goto out; /* all ok! */
177
178 au1x_pcm_dbdma_free(pcd);
179
180 if (stype == PCM_RX)
181 pcd->ddma_chan = au1xxx_dbdma_chan_alloc(pcd->ddma_id,
182 DSCR_CMD0_ALWAYS,
183 au1x_pcm_dmarx_cb, (void *)pcd);
184 else
185 pcd->ddma_chan = au1xxx_dbdma_chan_alloc(DSCR_CMD0_ALWAYS,
186 pcd->ddma_id,
187 au1x_pcm_dmatx_cb, (void *)pcd);
188
189 if (!pcd->ddma_chan)
190 return -ENOMEM;;
191
192 au1xxx_dbdma_set_devwidth(pcd->ddma_chan, msbits);
193 au1xxx_dbdma_ring_alloc(pcd->ddma_chan, 2);
194
195 pcd->msbits = msbits;
196
197 au1xxx_dbdma_stop(pcd->ddma_chan);
198 au1xxx_dbdma_reset(pcd->ddma_chan);
199
200out:
201 return 0;
202}
203
204static int au1xpsc_pcm_hw_params(struct snd_pcm_substream *substream,
205 struct snd_pcm_hw_params *params)
206{
207 struct snd_pcm_runtime *runtime = substream->runtime;
208 struct au1xpsc_audio_dmadata *pcd;
209 int stype, ret;
210
211 ret = snd_pcm_lib_malloc_pages(substream, params_buffer_bytes(params));
212 if (ret < 0)
213 goto out;
214
215 stype = SUBSTREAM_TYPE(substream);
216 pcd = au1xpsc_audio_pcmdma[stype];
217
218 DBG("runtime->dma_area = 0x%08lx dma_addr_t = 0x%08lx dma_size = %d "
219 "runtime->min_align %d\n",
220 (unsigned long)runtime->dma_area,
221 (unsigned long)runtime->dma_addr, runtime->dma_bytes,
222 runtime->min_align);
223
224 DBG("bits %d frags %d frag_bytes %d is_rx %d\n", params->msbits,
225 params_periods(params), params_period_bytes(params), stype);
226
227 ret = au1x_pcm_dbdma_realloc(pcd, stype, params->msbits);
228 if (ret) {
229 MSG("DDMA channel (re)alloc failed!\n");
230 goto out;
231 }
232
233 pcd->substream = substream;
234 pcd->period_bytes = params_period_bytes(params);
235 pcd->periods = params_periods(params);
236 pcd->dma_area_s = pcd->dma_area = (unsigned long)runtime->dma_addr;
237 pcd->q_period = 0;
238 pcd->curr_period = 0;
239 pcd->pos = 0;
240
241 ret = 0;
242out:
243 return ret;
244}
245
246static int au1xpsc_pcm_hw_free(struct snd_pcm_substream *substream)
247{
248 snd_pcm_lib_free_pages(substream);
249 return 0;
250}
251
252static int au1xpsc_pcm_prepare(struct snd_pcm_substream *substream)
253{
254 struct au1xpsc_audio_dmadata *pcd =
255 au1xpsc_audio_pcmdma[SUBSTREAM_TYPE(substream)];
256
257 au1xxx_dbdma_reset(pcd->ddma_chan);
258
259 if (SUBSTREAM_TYPE(substream) == PCM_RX) {
260 au1x_pcm_queue_rx(pcd);
261 au1x_pcm_queue_rx(pcd);
262 } else {
263 au1x_pcm_queue_tx(pcd);
264 au1x_pcm_queue_tx(pcd);
265 }
266
267 return 0;
268}
269
270static int au1xpsc_pcm_trigger(struct snd_pcm_substream *substream, int cmd)
271{
272 u32 c = au1xpsc_audio_pcmdma[SUBSTREAM_TYPE(substream)]->ddma_chan;
273
274 switch (cmd) {
275 case SNDRV_PCM_TRIGGER_START:
276 case SNDRV_PCM_TRIGGER_RESUME:
277 au1xxx_dbdma_start(c);
278 break;
279 case SNDRV_PCM_TRIGGER_STOP:
280 case SNDRV_PCM_TRIGGER_SUSPEND:
281 au1xxx_dbdma_stop(c);
282 break;
283 default:
284 return -EINVAL;
285 }
286 return 0;
287}
288
289static snd_pcm_uframes_t
290au1xpsc_pcm_pointer(struct snd_pcm_substream *substream)
291{
292 return bytes_to_frames(substream->runtime,
293 au1xpsc_audio_pcmdma[SUBSTREAM_TYPE(substream)]->pos);
294}
295
296static int au1xpsc_pcm_open(struct snd_pcm_substream *substream)
297{
298 snd_soc_set_runtime_hwparams(substream, &au1xpsc_pcm_hardware);
299 return 0;
300}
301
302static int au1xpsc_pcm_close(struct snd_pcm_substream *substream)
303{
304 au1x_pcm_dbdma_free(au1xpsc_audio_pcmdma[SUBSTREAM_TYPE(substream)]);
305 return 0;
306}
307
308struct snd_pcm_ops au1xpsc_pcm_ops = {
309 .open = au1xpsc_pcm_open,
310 .close = au1xpsc_pcm_close,
311 .ioctl = snd_pcm_lib_ioctl,
312 .hw_params = au1xpsc_pcm_hw_params,
313 .hw_free = au1xpsc_pcm_hw_free,
314 .prepare = au1xpsc_pcm_prepare,
315 .trigger = au1xpsc_pcm_trigger,
316 .pointer = au1xpsc_pcm_pointer,
317};
318
319static void au1xpsc_pcm_free_dma_buffers(struct snd_pcm *pcm)
320{
321 snd_pcm_lib_preallocate_free_for_all(pcm);
322}
323
324static int au1xpsc_pcm_new(struct snd_card *card,
325 struct snd_soc_dai *dai,
326 struct snd_pcm *pcm)
327{
328 snd_pcm_lib_preallocate_pages_for_all(pcm, SNDRV_DMA_TYPE_DEV,
329 card->dev, AU1XPSC_BUFFER_MIN_BYTES, (4096 * 1024) - 1);
330
331 return 0;
332}
333
334static int au1xpsc_pcm_probe(struct platform_device *pdev)
335{
336 struct resource *r;
337 int ret;
338
339 if (au1xpsc_audio_pcmdma[PCM_TX] || au1xpsc_audio_pcmdma[PCM_RX])
340 return -EBUSY;
341
342 /* TX DMA */
343 au1xpsc_audio_pcmdma[PCM_TX]
344 = kzalloc(sizeof(struct au1xpsc_audio_dmadata), GFP_KERNEL);
345 if (!au1xpsc_audio_pcmdma[PCM_TX])
346 return -ENOMEM;
347
348 r = platform_get_resource(pdev, IORESOURCE_DMA, 0);
349 if (!r) {
350 ret = -ENODEV;
351 goto out1;
352 }
353 (au1xpsc_audio_pcmdma[PCM_TX])->ddma_id = r->start;
354
355 /* RX DMA */
356 au1xpsc_audio_pcmdma[PCM_RX]
357 = kzalloc(sizeof(struct au1xpsc_audio_dmadata), GFP_KERNEL);
358 if (!au1xpsc_audio_pcmdma[PCM_RX])
359 return -ENOMEM;
360
361 r = platform_get_resource(pdev, IORESOURCE_DMA, 1);
362 if (!r) {
363 ret = -ENODEV;
364 goto out2;
365 }
366 (au1xpsc_audio_pcmdma[PCM_RX])->ddma_id = r->start;
367
368 return 0;
369
370out2:
371 kfree(au1xpsc_audio_pcmdma[PCM_RX]);
372 au1xpsc_audio_pcmdma[PCM_RX] = NULL;
373out1:
374 kfree(au1xpsc_audio_pcmdma[PCM_TX]);
375 au1xpsc_audio_pcmdma[PCM_TX] = NULL;
376 return ret;
377}
378
379static int au1xpsc_pcm_remove(struct platform_device *pdev)
380{
381 int i;
382
383 for (i = 0; i < 2; i++) {
384 if (au1xpsc_audio_pcmdma[i]) {
385 au1x_pcm_dbdma_free(au1xpsc_audio_pcmdma[i]);
386 kfree(au1xpsc_audio_pcmdma[i]);
387 au1xpsc_audio_pcmdma[i] = NULL;
388 }
389 }
390
391 return 0;
392}
393
394/* au1xpsc audio platform */
395struct snd_soc_platform au1xpsc_soc_platform = {
396 .name = "au1xpsc-pcm-dbdma",
397 .probe = au1xpsc_pcm_probe,
398 .remove = au1xpsc_pcm_remove,
399 .pcm_ops = &au1xpsc_pcm_ops,
400 .pcm_new = au1xpsc_pcm_new,
401 .pcm_free = au1xpsc_pcm_free_dma_buffers,
402};
403EXPORT_SYMBOL_GPL(au1xpsc_soc_platform);
404
405static int __init au1xpsc_audio_dbdma_init(void)
406{
407 au1xpsc_audio_pcmdma[PCM_TX] = NULL;
408 au1xpsc_audio_pcmdma[PCM_RX] = NULL;
409 return 0;
410}
411
412static void __exit au1xpsc_audio_dbdma_exit(void)
413{
414}
415
416module_init(au1xpsc_audio_dbdma_init);
417module_exit(au1xpsc_audio_dbdma_exit);
418
419MODULE_LICENSE("GPL");
420MODULE_DESCRIPTION("Au12x0/Au1550 PSC Audio DMA driver");
421MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
diff --git a/sound/soc/au1x/psc-ac97.c b/sound/soc/au1x/psc-ac97.c
new file mode 100644
index 000000000000..57facbad6825
--- /dev/null
+++ b/sound/soc/au1x/psc-ac97.c
@@ -0,0 +1,387 @@
1/*
2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
3 *
4 * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <mano@roarinelk.homelinux.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Au1xxx-PSC AC97 glue.
12 *
13 * NOTE: all of these drivers can only work with a SINGLE instance
14 * of a PSC. Multiple independent audio devices are impossible
15 * with ASoC v1.
16 */
17
18#include <linux/init.h>
19#include <linux/module.h>
20#include <linux/device.h>
21#include <linux/delay.h>
22#include <linux/suspend.h>
23#include <sound/core.h>
24#include <sound/pcm.h>
25#include <sound/initval.h>
26#include <sound/soc.h>
27#include <asm/mach-au1x00/au1000.h>
28#include <asm/mach-au1x00/au1xxx_psc.h>
29
30#include "psc.h"
31
32#define AC97_DIR \
33 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
34
35#define AC97_RATES \
36 SNDRV_PCM_RATE_8000_48000
37
38#define AC97_FMTS \
39 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S20_3BE)
40
41#define AC97PCR_START(stype) \
42 ((stype) == PCM_TX ? PSC_AC97PCR_TS : PSC_AC97PCR_RS)
43#define AC97PCR_STOP(stype) \
44 ((stype) == PCM_TX ? PSC_AC97PCR_TP : PSC_AC97PCR_RP)
45#define AC97PCR_CLRFIFO(stype) \
46 ((stype) == PCM_TX ? PSC_AC97PCR_TC : PSC_AC97PCR_RC)
47
48/* instance data. There can be only one, MacLeod!!!! */
49static struct au1xpsc_audio_data *au1xpsc_ac97_workdata;
50
51/* AC97 controller reads codec register */
52static unsigned short au1xpsc_ac97_read(struct snd_ac97 *ac97,
53 unsigned short reg)
54{
55 /* FIXME */
56 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
57 unsigned short data, tmo;
58
59 au_writel(PSC_AC97CDC_RD | PSC_AC97CDC_INDX(reg), AC97_CDC(pscdata));
60 au_sync();
61
62 tmo = 1000;
63 while ((!(au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)) && --tmo)
64 udelay(2);
65
66 if (!tmo)
67 data = 0xffff;
68 else
69 data = au_readl(AC97_CDC(pscdata)) & 0xffff;
70
71 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
72 au_sync();
73
74 return data;
75}
76
77/* AC97 controller writes to codec register */
78static void au1xpsc_ac97_write(struct snd_ac97 *ac97, unsigned short reg,
79 unsigned short val)
80{
81 /* FIXME */
82 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
83 unsigned int tmo;
84
85 au_writel(PSC_AC97CDC_INDX(reg) | (val & 0xffff), AC97_CDC(pscdata));
86 au_sync();
87 tmo = 1000;
88 while ((!(au_readl(AC97_EVNT(pscdata)) & PSC_AC97EVNT_CD)) && --tmo)
89 au_sync();
90
91 au_writel(PSC_AC97EVNT_CD, AC97_EVNT(pscdata));
92 au_sync();
93}
94
95/* AC97 controller asserts a warm reset */
96static void au1xpsc_ac97_warm_reset(struct snd_ac97 *ac97)
97{
98 /* FIXME */
99 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
100
101 au_writel(PSC_AC97RST_SNC, AC97_RST(pscdata));
102 au_sync();
103 msleep(10);
104 au_writel(0, AC97_RST(pscdata));
105 au_sync();
106}
107
108static void au1xpsc_ac97_cold_reset(struct snd_ac97 *ac97)
109{
110 /* FIXME */
111 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
112 int i;
113
114 /* disable PSC during cold reset */
115 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
116 au_sync();
117 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(pscdata));
118 au_sync();
119
120 /* issue cold reset */
121 au_writel(PSC_AC97RST_RST, AC97_RST(pscdata));
122 au_sync();
123 msleep(500);
124 au_writel(0, AC97_RST(pscdata));
125 au_sync();
126
127 /* enable PSC */
128 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
129 au_sync();
130
131 /* wait for PSC to indicate it's ready */
132 i = 100000;
133 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_SR)) && (--i))
134 au_sync();
135
136 if (i == 0) {
137 printk(KERN_ERR "au1xpsc-ac97: PSC not ready!\n");
138 return;
139 }
140
141 /* enable the ac97 function */
142 au_writel(pscdata->cfg | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
143 au_sync();
144
145 /* wait for AC97 core to become ready */
146 i = 100000;
147 while (!((au_readl(AC97_STAT(pscdata)) & PSC_AC97STAT_DR)) && (--i))
148 au_sync();
149 if (i == 0)
150 printk(KERN_ERR "au1xpsc-ac97: AC97 ctrl not ready\n");
151}
152
153/* AC97 controller operations */
154struct snd_ac97_bus_ops soc_ac97_ops = {
155 .read = au1xpsc_ac97_read,
156 .write = au1xpsc_ac97_write,
157 .reset = au1xpsc_ac97_cold_reset,
158 .warm_reset = au1xpsc_ac97_warm_reset,
159};
160EXPORT_SYMBOL_GPL(soc_ac97_ops);
161
162static int au1xpsc_ac97_hw_params(struct snd_pcm_substream *substream,
163 struct snd_pcm_hw_params *params)
164{
165 /* FIXME */
166 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
167 unsigned long r, stat;
168 int chans, stype = SUBSTREAM_TYPE(substream);
169
170 chans = params_channels(params);
171
172 r = au_readl(AC97_CFG(pscdata));
173 stat = au_readl(AC97_STAT(pscdata));
174
175 /* already active? */
176 if (stat & (PSC_AC97STAT_TB | PSC_AC97STAT_RB)) {
177 /* reject parameters not currently set up */
178 if ((PSC_AC97CFG_GET_LEN(r) != params->msbits) ||
179 (pscdata->rate != params_rate(params)))
180 return -EINVAL;
181 } else {
182 /* disable AC97 device controller first */
183 au_writel(r & ~PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
184 au_sync();
185
186 /* set sample bitdepth: REG[24:21]=(BITS-2)/2 */
187 r &= ~PSC_AC97CFG_LEN_MASK;
188 r |= PSC_AC97CFG_SET_LEN(params->msbits);
189
190 /* channels: enable slots for front L/R channel */
191 if (stype == PCM_TX) {
192 r &= ~PSC_AC97CFG_TXSLOT_MASK;
193 r |= PSC_AC97CFG_TXSLOT_ENA(3);
194 r |= PSC_AC97CFG_TXSLOT_ENA(4);
195 } else {
196 r &= ~PSC_AC97CFG_RXSLOT_MASK;
197 r |= PSC_AC97CFG_RXSLOT_ENA(3);
198 r |= PSC_AC97CFG_RXSLOT_ENA(4);
199 }
200
201 /* finally enable the AC97 controller again */
202 au_writel(r | PSC_AC97CFG_DE_ENABLE, AC97_CFG(pscdata));
203 au_sync();
204
205 pscdata->cfg = r;
206 pscdata->rate = params_rate(params);
207 }
208
209 return 0;
210}
211
212static int au1xpsc_ac97_trigger(struct snd_pcm_substream *substream,
213 int cmd)
214{
215 /* FIXME */
216 struct au1xpsc_audio_data *pscdata = au1xpsc_ac97_workdata;
217 int ret, stype = SUBSTREAM_TYPE(substream);
218
219 ret = 0;
220
221 switch (cmd) {
222 case SNDRV_PCM_TRIGGER_START:
223 case SNDRV_PCM_TRIGGER_RESUME:
224 au_writel(AC97PCR_START(stype), AC97_PCR(pscdata));
225 au_sync();
226 break;
227 case SNDRV_PCM_TRIGGER_STOP:
228 case SNDRV_PCM_TRIGGER_SUSPEND:
229 au_writel(AC97PCR_STOP(stype), AC97_PCR(pscdata));
230 au_sync();
231 break;
232 default:
233 ret = -EINVAL;
234 }
235 return ret;
236}
237
238static int au1xpsc_ac97_probe(struct platform_device *pdev,
239 struct snd_soc_dai *dai)
240{
241 int ret;
242 struct resource *r;
243 unsigned long sel;
244
245 if (au1xpsc_ac97_workdata)
246 return -EBUSY;
247
248 au1xpsc_ac97_workdata =
249 kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
250 if (!au1xpsc_ac97_workdata)
251 return -ENOMEM;
252
253 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
254 if (!r) {
255 ret = -ENODEV;
256 goto out0;
257 }
258
259 ret = -EBUSY;
260 au1xpsc_ac97_workdata->ioarea =
261 request_mem_region(r->start, r->end - r->start + 1,
262 "au1xpsc_ac97");
263 if (!au1xpsc_ac97_workdata->ioarea)
264 goto out0;
265
266 au1xpsc_ac97_workdata->mmio = ioremap(r->start, 0xffff);
267 if (!au1xpsc_ac97_workdata->mmio)
268 goto out1;
269
270 /* configuration: max dma trigger threshold, enable ac97 */
271 au1xpsc_ac97_workdata->cfg = PSC_AC97CFG_RT_FIFO8 |
272 PSC_AC97CFG_TT_FIFO8 |
273 PSC_AC97CFG_DE_ENABLE;
274
275 /* preserve PSC clock source set up by platform (dev.platform_data
276 * is already occupied by soc layer)
277 */
278 sel = au_readl(PSC_SEL(au1xpsc_ac97_workdata)) & PSC_SEL_CLK_MASK;
279 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata));
280 au_sync();
281 au_writel(0, PSC_SEL(au1xpsc_ac97_workdata));
282 au_sync();
283 au_writel(PSC_SEL_PS_AC97MODE | sel, PSC_SEL(au1xpsc_ac97_workdata));
284 au_sync();
285 /* next up: cold reset. Dont check for PSC-ready now since
286 * there may not be any codec clock yet.
287 */
288
289 return 0;
290
291out1:
292 release_resource(au1xpsc_ac97_workdata->ioarea);
293 kfree(au1xpsc_ac97_workdata->ioarea);
294out0:
295 kfree(au1xpsc_ac97_workdata);
296 au1xpsc_ac97_workdata = NULL;
297 return ret;
298}
299
300static void au1xpsc_ac97_remove(struct platform_device *pdev,
301 struct snd_soc_dai *dai)
302{
303 /* disable PSC completely */
304 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
305 au_sync();
306 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata));
307 au_sync();
308
309 iounmap(au1xpsc_ac97_workdata->mmio);
310 release_resource(au1xpsc_ac97_workdata->ioarea);
311 kfree(au1xpsc_ac97_workdata->ioarea);
312 kfree(au1xpsc_ac97_workdata);
313 au1xpsc_ac97_workdata = NULL;
314}
315
316static int au1xpsc_ac97_suspend(struct platform_device *pdev,
317 struct snd_soc_dai *dai)
318{
319 /* save interesting registers and disable PSC */
320 au1xpsc_ac97_workdata->pm[0] =
321 au_readl(PSC_SEL(au1xpsc_ac97_workdata));
322
323 au_writel(0, AC97_CFG(au1xpsc_ac97_workdata));
324 au_sync();
325 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_ac97_workdata));
326 au_sync();
327
328 return 0;
329}
330
331static int au1xpsc_ac97_resume(struct platform_device *pdev,
332 struct snd_soc_dai *dai)
333{
334 /* restore PSC clock config */
335 au_writel(au1xpsc_ac97_workdata->pm[0] | PSC_SEL_PS_AC97MODE,
336 PSC_SEL(au1xpsc_ac97_workdata));
337 au_sync();
338
339 /* after this point the ac97 core will cold-reset the codec.
340 * During cold-reset the PSC is reinitialized and the last
341 * configuration set up in hw_params() is restored.
342 */
343 return 0;
344}
345
346struct snd_soc_dai au1xpsc_ac97_dai = {
347 .name = "au1xpsc_ac97",
348 .type = SND_SOC_DAI_AC97,
349 .probe = au1xpsc_ac97_probe,
350 .remove = au1xpsc_ac97_remove,
351 .suspend = au1xpsc_ac97_suspend,
352 .resume = au1xpsc_ac97_resume,
353 .playback = {
354 .rates = AC97_RATES,
355 .formats = AC97_FMTS,
356 .channels_min = 2,
357 .channels_max = 2,
358 },
359 .capture = {
360 .rates = AC97_RATES,
361 .formats = AC97_FMTS,
362 .channels_min = 2,
363 .channels_max = 2,
364 },
365 .ops = {
366 .trigger = au1xpsc_ac97_trigger,
367 .hw_params = au1xpsc_ac97_hw_params,
368 },
369};
370EXPORT_SYMBOL_GPL(au1xpsc_ac97_dai);
371
372static int __init au1xpsc_ac97_init(void)
373{
374 au1xpsc_ac97_workdata = NULL;
375 return 0;
376}
377
378static void __exit au1xpsc_ac97_exit(void)
379{
380}
381
382module_init(au1xpsc_ac97_init);
383module_exit(au1xpsc_ac97_exit);
384
385MODULE_LICENSE("GPL");
386MODULE_DESCRIPTION("Au12x0/Au1550 PSC AC97 ALSA ASoC audio driver");
387MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
diff --git a/sound/soc/au1x/psc-i2s.c b/sound/soc/au1x/psc-i2s.c
new file mode 100644
index 000000000000..ba4b5c199f21
--- /dev/null
+++ b/sound/soc/au1x/psc-i2s.c
@@ -0,0 +1,414 @@
1/*
2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
3 *
4 * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <mano@roarinelk.homelinux.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * Au1xxx-PSC I2S glue.
12 *
13 * NOTE: all of these drivers can only work with a SINGLE instance
14 * of a PSC. Multiple independent audio devices are impossible
15 * with ASoC v1.
16 * NOTE: so far only PSC slave mode (bit- and frameclock) is supported.
17 */
18
19#include <linux/init.h>
20#include <linux/module.h>
21#include <linux/suspend.h>
22#include <sound/core.h>
23#include <sound/pcm.h>
24#include <sound/initval.h>
25#include <sound/soc.h>
26#include <asm/mach-au1x00/au1000.h>
27#include <asm/mach-au1x00/au1xxx_psc.h>
28
29#include "psc.h"
30
31/* supported I2S DAI hardware formats */
32#define AU1XPSC_I2S_DAIFMT \
33 (SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_LEFT_J | \
34 SND_SOC_DAIFMT_NB_NF)
35
36/* supported I2S direction */
37#define AU1XPSC_I2S_DIR \
38 (SND_SOC_DAIDIR_PLAYBACK | SND_SOC_DAIDIR_CAPTURE)
39
40#define AU1XPSC_I2S_RATES \
41 SNDRV_PCM_RATE_8000_192000
42
43#define AU1XPSC_I2S_FMTS \
44 (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
45
46#define I2SSTAT_BUSY(stype) \
47 ((stype) == PCM_TX ? PSC_I2SSTAT_TB : PSC_I2SSTAT_RB)
48#define I2SPCR_START(stype) \
49 ((stype) == PCM_TX ? PSC_I2SPCR_TS : PSC_I2SPCR_RS)
50#define I2SPCR_STOP(stype) \
51 ((stype) == PCM_TX ? PSC_I2SPCR_TP : PSC_I2SPCR_RP)
52#define I2SPCR_CLRFIFO(stype) \
53 ((stype) == PCM_TX ? PSC_I2SPCR_TC : PSC_I2SPCR_RC)
54
55
56/* instance data. There can be only one, MacLeod!!!! */
57static struct au1xpsc_audio_data *au1xpsc_i2s_workdata;
58
59static int au1xpsc_i2s_set_fmt(struct snd_soc_dai *cpu_dai,
60 unsigned int fmt)
61{
62 struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
63 unsigned long ct;
64 int ret;
65
66 ret = -EINVAL;
67
68 ct = pscdata->cfg;
69
70 ct &= ~(PSC_I2SCFG_XM | PSC_I2SCFG_MLJ); /* left-justified */
71 switch (fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
72 case SND_SOC_DAIFMT_I2S:
73 ct |= PSC_I2SCFG_XM; /* enable I2S mode */
74 break;
75 case SND_SOC_DAIFMT_MSB:
76 break;
77 case SND_SOC_DAIFMT_LSB:
78 ct |= PSC_I2SCFG_MLJ; /* LSB (right-) justified */
79 break;
80 default:
81 goto out;
82 }
83
84 ct &= ~(PSC_I2SCFG_BI | PSC_I2SCFG_WI); /* IB-IF */
85 switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
86 case SND_SOC_DAIFMT_NB_NF:
87 ct |= PSC_I2SCFG_BI | PSC_I2SCFG_WI;
88 break;
89 case SND_SOC_DAIFMT_NB_IF:
90 ct |= PSC_I2SCFG_BI;
91 break;
92 case SND_SOC_DAIFMT_IB_NF:
93 ct |= PSC_I2SCFG_WI;
94 break;
95 case SND_SOC_DAIFMT_IB_IF:
96 break;
97 default:
98 goto out;
99 }
100
101 switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
102 case SND_SOC_DAIFMT_CBM_CFM: /* CODEC master */
103 ct |= PSC_I2SCFG_MS; /* PSC I2S slave mode */
104 break;
105 case SND_SOC_DAIFMT_CBS_CFS: /* CODEC slave */
106 ct &= ~PSC_I2SCFG_MS; /* PSC I2S Master mode */
107 break;
108 default:
109 goto out;
110 }
111
112 pscdata->cfg = ct;
113 ret = 0;
114out:
115 return ret;
116}
117
118static int au1xpsc_i2s_hw_params(struct snd_pcm_substream *substream,
119 struct snd_pcm_hw_params *params)
120{
121 struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
122
123 int cfgbits;
124 unsigned long stat;
125
126 /* check if the PSC is already streaming data */
127 stat = au_readl(I2S_STAT(pscdata));
128 if (stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB)) {
129 /* reject parameters not currently set up in hardware */
130 cfgbits = au_readl(I2S_CFG(pscdata));
131 if ((PSC_I2SCFG_GET_LEN(cfgbits) != params->msbits) ||
132 (params_rate(params) != pscdata->rate))
133 return -EINVAL;
134 } else {
135 /* set sample bitdepth */
136 pscdata->cfg &= ~(0x1f << 4);
137 pscdata->cfg |= PSC_I2SCFG_SET_LEN(params->msbits);
138 /* remember current rate for other stream */
139 pscdata->rate = params_rate(params);
140 }
141 return 0;
142}
143
144/* Configure PSC late: on my devel systems the codec is I2S master and
145 * supplies the i2sbitclock __AND__ i2sMclk (!) to the PSC unit. ASoC
146 * uses aggressive PM and switches the codec off when it is not in use
147 * which also means the PSC unit doesn't get any clocks and is therefore
148 * dead. That's why this chunk here gets called from the trigger callback
149 * because I can be reasonably certain the codec is driving the clocks.
150 */
151static int au1xpsc_i2s_configure(struct au1xpsc_audio_data *pscdata)
152{
153 unsigned long tmo;
154
155 /* bring PSC out of sleep, and configure I2S unit */
156 au_writel(PSC_CTRL_ENABLE, PSC_CTRL(pscdata));
157 au_sync();
158
159 tmo = 1000000;
160 while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_SR) && tmo)
161 tmo--;
162
163 if (!tmo)
164 goto psc_err;
165
166 au_writel(0, I2S_CFG(pscdata));
167 au_sync();
168 au_writel(pscdata->cfg | PSC_I2SCFG_DE_ENABLE, I2S_CFG(pscdata));
169 au_sync();
170
171 /* wait for I2S controller to become ready */
172 tmo = 1000000;
173 while (!(au_readl(I2S_STAT(pscdata)) & PSC_I2SSTAT_DR) && tmo)
174 tmo--;
175
176 if (tmo)
177 return 0;
178
179psc_err:
180 au_writel(0, I2S_CFG(pscdata));
181 au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
182 au_sync();
183 return -ETIMEDOUT;
184}
185
186static int au1xpsc_i2s_start(struct au1xpsc_audio_data *pscdata, int stype)
187{
188 unsigned long tmo, stat;
189 int ret;
190
191 ret = 0;
192
193 /* if both TX and RX are idle, configure the PSC */
194 stat = au_readl(I2S_STAT(pscdata));
195 if (!(stat & (PSC_I2SSTAT_TB | PSC_I2SSTAT_RB))) {
196 ret = au1xpsc_i2s_configure(pscdata);
197 if (ret)
198 goto out;
199 }
200
201 au_writel(I2SPCR_CLRFIFO(stype), I2S_PCR(pscdata));
202 au_sync();
203 au_writel(I2SPCR_START(stype), I2S_PCR(pscdata));
204 au_sync();
205
206 /* wait for start confirmation */
207 tmo = 1000000;
208 while (!(au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
209 tmo--;
210
211 if (!tmo) {
212 au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
213 au_sync();
214 ret = -ETIMEDOUT;
215 }
216out:
217 return ret;
218}
219
220static int au1xpsc_i2s_stop(struct au1xpsc_audio_data *pscdata, int stype)
221{
222 unsigned long tmo, stat;
223
224 au_writel(I2SPCR_STOP(stype), I2S_PCR(pscdata));
225 au_sync();
226
227 /* wait for stop confirmation */
228 tmo = 1000000;
229 while ((au_readl(I2S_STAT(pscdata)) & I2SSTAT_BUSY(stype)) && tmo)
230 tmo--;
231
232 /* if both TX and RX are idle, disable PSC */
233 stat = au_readl(I2S_STAT(pscdata));
234 if (!(stat & (PSC_I2SSTAT_RB | PSC_I2SSTAT_RB))) {
235 au_writel(0, I2S_CFG(pscdata));
236 au_sync();
237 au_writel(PSC_CTRL_SUSPEND, PSC_CTRL(pscdata));
238 au_sync();
239 }
240 return 0;
241}
242
243static int au1xpsc_i2s_trigger(struct snd_pcm_substream *substream, int cmd)
244{
245 struct au1xpsc_audio_data *pscdata = au1xpsc_i2s_workdata;
246 int ret, stype = SUBSTREAM_TYPE(substream);
247
248 switch (cmd) {
249 case SNDRV_PCM_TRIGGER_START:
250 case SNDRV_PCM_TRIGGER_RESUME:
251 ret = au1xpsc_i2s_start(pscdata, stype);
252 break;
253 case SNDRV_PCM_TRIGGER_STOP:
254 case SNDRV_PCM_TRIGGER_SUSPEND:
255 ret = au1xpsc_i2s_stop(pscdata, stype);
256 break;
257 default:
258 ret = -EINVAL;
259 }
260 return ret;
261}
262
263static int au1xpsc_i2s_probe(struct platform_device *pdev,
264 struct snd_soc_dai *dai)
265{
266 struct resource *r;
267 unsigned long sel;
268 int ret;
269
270 if (au1xpsc_i2s_workdata)
271 return -EBUSY;
272
273 au1xpsc_i2s_workdata =
274 kzalloc(sizeof(struct au1xpsc_audio_data), GFP_KERNEL);
275 if (!au1xpsc_i2s_workdata)
276 return -ENOMEM;
277
278 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
279 if (!r) {
280 ret = -ENODEV;
281 goto out0;
282 }
283
284 ret = -EBUSY;
285 au1xpsc_i2s_workdata->ioarea =
286 request_mem_region(r->start, r->end - r->start + 1,
287 "au1xpsc_i2s");
288 if (!au1xpsc_i2s_workdata->ioarea)
289 goto out0;
290
291 au1xpsc_i2s_workdata->mmio = ioremap(r->start, 0xffff);
292 if (!au1xpsc_i2s_workdata->mmio)
293 goto out1;
294
295 /* preserve PSC clock source set up by platform (dev.platform_data
296 * is already occupied by soc layer)
297 */
298 sel = au_readl(PSC_SEL(au1xpsc_i2s_workdata)) & PSC_SEL_CLK_MASK;
299 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata));
300 au_sync();
301 au_writel(PSC_SEL_PS_I2SMODE | sel, PSC_SEL(au1xpsc_i2s_workdata));
302 au_writel(0, I2S_CFG(au1xpsc_i2s_workdata));
303 au_sync();
304
305 /* preconfigure: set max rx/tx fifo depths */
306 au1xpsc_i2s_workdata->cfg |=
307 PSC_I2SCFG_RT_FIFO8 | PSC_I2SCFG_TT_FIFO8;
308
309 /* don't wait for I2S core to become ready now; clocks may not
310 * be running yet; depending on clock input for PSC a wait might
311 * time out.
312 */
313
314 return 0;
315
316out1:
317 release_resource(au1xpsc_i2s_workdata->ioarea);
318 kfree(au1xpsc_i2s_workdata->ioarea);
319out0:
320 kfree(au1xpsc_i2s_workdata);
321 au1xpsc_i2s_workdata = NULL;
322 return ret;
323}
324
325static void au1xpsc_i2s_remove(struct platform_device *pdev,
326 struct snd_soc_dai *dai)
327{
328 au_writel(0, I2S_CFG(au1xpsc_i2s_workdata));
329 au_sync();
330 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata));
331 au_sync();
332
333 iounmap(au1xpsc_i2s_workdata->mmio);
334 release_resource(au1xpsc_i2s_workdata->ioarea);
335 kfree(au1xpsc_i2s_workdata->ioarea);
336 kfree(au1xpsc_i2s_workdata);
337 au1xpsc_i2s_workdata = NULL;
338}
339
340static int au1xpsc_i2s_suspend(struct platform_device *pdev,
341 struct snd_soc_dai *cpu_dai)
342{
343 /* save interesting register and disable PSC */
344 au1xpsc_i2s_workdata->pm[0] =
345 au_readl(PSC_SEL(au1xpsc_i2s_workdata));
346
347 au_writel(0, I2S_CFG(au1xpsc_i2s_workdata));
348 au_sync();
349 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata));
350 au_sync();
351
352 return 0;
353}
354
355static int au1xpsc_i2s_resume(struct platform_device *pdev,
356 struct snd_soc_dai *cpu_dai)
357{
358 /* select I2S mode and PSC clock */
359 au_writel(PSC_CTRL_DISABLE, PSC_CTRL(au1xpsc_i2s_workdata));
360 au_sync();
361 au_writel(0, PSC_SEL(au1xpsc_i2s_workdata));
362 au_sync();
363 au_writel(au1xpsc_i2s_workdata->pm[0],
364 PSC_SEL(au1xpsc_i2s_workdata));
365 au_sync();
366
367 return 0;
368}
369
370struct snd_soc_dai au1xpsc_i2s_dai = {
371 .name = "au1xpsc_i2s",
372 .type = SND_SOC_DAI_I2S,
373 .probe = au1xpsc_i2s_probe,
374 .remove = au1xpsc_i2s_remove,
375 .suspend = au1xpsc_i2s_suspend,
376 .resume = au1xpsc_i2s_resume,
377 .playback = {
378 .rates = AU1XPSC_I2S_RATES,
379 .formats = AU1XPSC_I2S_FMTS,
380 .channels_min = 2,
381 .channels_max = 8, /* 2 without external help */
382 },
383 .capture = {
384 .rates = AU1XPSC_I2S_RATES,
385 .formats = AU1XPSC_I2S_FMTS,
386 .channels_min = 2,
387 .channels_max = 8, /* 2 without external help */
388 },
389 .ops = {
390 .trigger = au1xpsc_i2s_trigger,
391 .hw_params = au1xpsc_i2s_hw_params,
392 },
393 .dai_ops = {
394 .set_fmt = au1xpsc_i2s_set_fmt,
395 },
396};
397EXPORT_SYMBOL(au1xpsc_i2s_dai);
398
399static int __init au1xpsc_i2s_init(void)
400{
401 au1xpsc_i2s_workdata = NULL;
402 return 0;
403}
404
405static void __exit au1xpsc_i2s_exit(void)
406{
407}
408
409module_init(au1xpsc_i2s_init);
410module_exit(au1xpsc_i2s_exit);
411
412MODULE_LICENSE("GPL");
413MODULE_DESCRIPTION("Au12x0/Au1550 PSC I2S ALSA ASoC audio driver");
414MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
diff --git a/sound/soc/au1x/psc.h b/sound/soc/au1x/psc.h
new file mode 100644
index 000000000000..8fdb1a04a07b
--- /dev/null
+++ b/sound/soc/au1x/psc.h
@@ -0,0 +1,53 @@
1/*
2 * Au12x0/Au1550 PSC ALSA ASoC audio support.
3 *
4 * (c) 2007-2008 MSC Vertriebsges.m.b.H.,
5 * Manuel Lauss <mano@roarinelk.homelinux.net>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 *
11 * NOTE: all of these drivers can only work with a SINGLE instance
12 * of a PSC. Multiple independent audio devices are impossible
13 * with ASoC v1.
14 */
15
16#ifndef _AU1X_PCM_H
17#define _AU1X_PCM_H
18
19extern struct snd_soc_dai au1xpsc_ac97_dai;
20extern struct snd_soc_dai au1xpsc_i2s_dai;
21extern struct snd_soc_platform au1xpsc_soc_platform;
22extern struct snd_ac97_bus_ops soc_ac97_ops;
23
24struct au1xpsc_audio_data {
25 void __iomem *mmio;
26
27 unsigned long cfg;
28 unsigned long rate;
29
30 unsigned long pm[2];
31 struct resource *ioarea;
32};
33
34#define PCM_TX 0
35#define PCM_RX 1
36
37#define SUBSTREAM_TYPE(substream) \
38 ((substream)->stream == SNDRV_PCM_STREAM_PLAYBACK ? PCM_TX : PCM_RX)
39
40/* easy access macros */
41#define PSC_CTRL(x) ((unsigned long)((x)->mmio) + PSC_CTRL_OFFSET)
42#define PSC_SEL(x) ((unsigned long)((x)->mmio) + PSC_SEL_OFFSET)
43#define I2S_STAT(x) ((unsigned long)((x)->mmio) + PSC_I2SSTAT_OFFSET)
44#define I2S_CFG(x) ((unsigned long)((x)->mmio) + PSC_I2SCFG_OFFSET)
45#define I2S_PCR(x) ((unsigned long)((x)->mmio) + PSC_I2SPCR_OFFSET)
46#define AC97_CFG(x) ((unsigned long)((x)->mmio) + PSC_AC97CFG_OFFSET)
47#define AC97_CDC(x) ((unsigned long)((x)->mmio) + PSC_AC97CDC_OFFSET)
48#define AC97_EVNT(x) ((unsigned long)((x)->mmio) + PSC_AC97EVNT_OFFSET)
49#define AC97_PCR(x) ((unsigned long)((x)->mmio) + PSC_AC97PCR_OFFSET)
50#define AC97_RST(x) ((unsigned long)((x)->mmio) + PSC_AC97RST_OFFSET)
51#define AC97_STAT(x) ((unsigned long)((x)->mmio) + PSC_AC97STAT_OFFSET)
52
53#endif
diff --git a/sound/soc/au1x/sample-ac97.c b/sound/soc/au1x/sample-ac97.c
new file mode 100644
index 000000000000..f75ae7f62c3d
--- /dev/null
+++ b/sound/soc/au1x/sample-ac97.c
@@ -0,0 +1,144 @@
1/*
2 * Sample Au12x0/Au1550 PSC AC97 sound machine.
3 *
4 * Copyright (c) 2007-2008 Manuel Lauss <mano@roarinelk.homelinux.net>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms outlined in the file COPYING at the root of this
8 * source archive.
9 *
10 * This is a very generic AC97 sound machine driver for boards which
11 * have (AC97) audio at PSC1 (e.g. DB1200 demoboards).
12 */
13
14#include <linux/module.h>
15#include <linux/moduleparam.h>
16#include <linux/timer.h>
17#include <linux/interrupt.h>
18#include <linux/platform_device.h>
19#include <sound/core.h>
20#include <sound/pcm.h>
21#include <sound/soc.h>
22#include <sound/soc-dapm.h>
23#include <asm/mach-au1x00/au1000.h>
24#include <asm/mach-au1x00/au1xxx_psc.h>
25#include <asm/mach-au1x00/au1xxx_dbdma.h>
26
27#include "../codecs/ac97.h"
28#include "psc.h"
29
30static int au1xpsc_sample_ac97_init(struct snd_soc_codec *codec)
31{
32 snd_soc_dapm_sync(codec);
33 return 0;
34}
35
36static struct snd_soc_dai_link au1xpsc_sample_ac97_dai = {
37 .name = "AC97",
38 .stream_name = "AC97 HiFi",
39 .cpu_dai = &au1xpsc_ac97_dai, /* see psc-ac97.c */
40 .codec_dai = &ac97_dai, /* see codecs/ac97.c */
41 .init = au1xpsc_sample_ac97_init,
42 .ops = NULL,
43};
44
45static struct snd_soc_machine au1xpsc_sample_ac97_machine = {
46 .name = "Au1xxx PSC AC97 Audio",
47 .dai_link = &au1xpsc_sample_ac97_dai,
48 .num_links = 1,
49};
50
51static struct snd_soc_device au1xpsc_sample_ac97_devdata = {
52 .machine = &au1xpsc_sample_ac97_machine,
53 .platform = &au1xpsc_soc_platform, /* see dbdma2.c */
54 .codec_dev = &soc_codec_dev_ac97,
55};
56
57static struct resource au1xpsc_psc1_res[] = {
58 [0] = {
59 .start = CPHYSADDR(PSC1_BASE_ADDR),
60 .end = CPHYSADDR(PSC1_BASE_ADDR) + 0x000fffff,
61 .flags = IORESOURCE_MEM,
62 },
63 [1] = {
64#ifdef CONFIG_SOC_AU1200
65 .start = AU1200_PSC1_INT,
66 .end = AU1200_PSC1_INT,
67#elif defined(CONFIG_SOC_AU1550)
68 .start = AU1550_PSC1_INT,
69 .end = AU1550_PSC1_INT,
70#endif
71 .flags = IORESOURCE_IRQ,
72 },
73 [2] = {
74 .start = DSCR_CMD0_PSC1_TX,
75 .end = DSCR_CMD0_PSC1_TX,
76 .flags = IORESOURCE_DMA,
77 },
78 [3] = {
79 .start = DSCR_CMD0_PSC1_RX,
80 .end = DSCR_CMD0_PSC1_RX,
81 .flags = IORESOURCE_DMA,
82 },
83};
84
85static struct platform_device *au1xpsc_sample_ac97_dev;
86
87static int __init au1xpsc_sample_ac97_load(void)
88{
89 int ret;
90
91#ifdef CONFIG_SOC_AU1200
92 unsigned long io;
93
94 /* modify sys_pinfunc for AC97 on PSC1 */
95 io = au_readl(SYS_PINFUNC);
96 io |= SYS_PINFUNC_P1C;
97 io &= ~(SYS_PINFUNC_P1A | SYS_PINFUNC_P1B);
98 au_writel(io, SYS_PINFUNC);
99 au_sync();
100#endif
101
102 ret = -ENOMEM;
103
104 /* setup PSC clock source for AC97 part: external clock provided
105 * by codec. The psc-ac97.c driver depends on this setting!
106 */
107 au_writel(PSC_SEL_CLK_SERCLK, PSC1_BASE_ADDR + PSC_SEL_OFFSET);
108 au_sync();
109
110 au1xpsc_sample_ac97_dev = platform_device_alloc("soc-audio", -1);
111 if (!au1xpsc_sample_ac97_dev)
112 goto out;
113
114 au1xpsc_sample_ac97_dev->resource =
115 kmemdup(au1xpsc_psc1_res, sizeof(struct resource) *
116 ARRAY_SIZE(au1xpsc_psc1_res), GFP_KERNEL);
117 au1xpsc_sample_ac97_dev->num_resources = ARRAY_SIZE(au1xpsc_psc1_res);
118 au1xpsc_sample_ac97_dev->id = 1;
119
120 platform_set_drvdata(au1xpsc_sample_ac97_dev,
121 &au1xpsc_sample_ac97_devdata);
122 au1xpsc_sample_ac97_devdata.dev = &au1xpsc_sample_ac97_dev->dev;
123 ret = platform_device_add(au1xpsc_sample_ac97_dev);
124
125 if (ret) {
126 platform_device_put(au1xpsc_sample_ac97_dev);
127 au1xpsc_sample_ac97_dev = NULL;
128 }
129
130out:
131 return ret;
132}
133
134static void __exit au1xpsc_sample_ac97_exit(void)
135{
136 platform_device_unregister(au1xpsc_sample_ac97_dev);
137}
138
139module_init(au1xpsc_sample_ac97_load);
140module_exit(au1xpsc_sample_ac97_exit);
141
142MODULE_LICENSE("GPL");
143MODULE_DESCRIPTION("Au1xxx PSC sample AC97 machine");
144MODULE_AUTHOR("Manuel Lauss <mano@roarinelk.homelinux.net>");
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-28 11:19:33 -0500