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-rw-r--r--arch/x86_64/kernel/io_apic.c5
-rw-r--r--arch/x86_64/kernel/mpparse.c42
-rw-r--r--include/asm-x86_64/io_apic.h1
3 files changed, 1 insertions, 47 deletions
diff --git a/arch/x86_64/kernel/io_apic.c b/arch/x86_64/kernel/io_apic.c
index e076a8fa3ac3..7cc29b50b0c1 100644
--- a/arch/x86_64/kernel/io_apic.c
+++ b/arch/x86_64/kernel/io_apic.c
@@ -1415,8 +1415,6 @@ static inline void unlock_ExtINT_logic(void)
1415 spin_unlock_irqrestore(&ioapic_lock, flags); 1415 spin_unlock_irqrestore(&ioapic_lock, flags);
1416} 1416}
1417 1417
1418int timer_uses_ioapic_pin_0;
1419
1420/* 1418/*
1421 * This code may look a bit paranoid, but it's supposed to cooperate with 1419 * This code may look a bit paranoid, but it's supposed to cooperate with
1422 * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ 1420 * a wide range of boards and BIOS bugs. Fortunately only the timer IRQ
@@ -1453,9 +1451,6 @@ static inline void check_timer(void)
1453 pin2 = ioapic_i8259.pin; 1451 pin2 = ioapic_i8259.pin;
1454 apic2 = ioapic_i8259.apic; 1452 apic2 = ioapic_i8259.apic;
1455 1453
1456 if (pin1 == 0)
1457 timer_uses_ioapic_pin_0 = 1;
1458
1459 apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n", 1454 apic_printk(APIC_VERBOSE,KERN_INFO "..TIMER: vector=0x%02X apic1=%d pin1=%d apic2=%d pin2=%d\n",
1460 vector, apic1, pin1, apic2, pin2); 1455 vector, apic1, pin1, apic2, pin2);
1461 1456
diff --git a/arch/x86_64/kernel/mpparse.c b/arch/x86_64/kernel/mpparse.c
index b8d53dfa9931..b147ab19fbd4 100644
--- a/arch/x86_64/kernel/mpparse.c
+++ b/arch/x86_64/kernel/mpparse.c
@@ -790,20 +790,11 @@ void __init mp_config_acpi_legacy_irqs(void)
790 } 790 }
791} 791}
792 792
793#define MAX_GSI_NUM 4096
794
795int mp_register_gsi(u32 gsi, int triggering, int polarity) 793int mp_register_gsi(u32 gsi, int triggering, int polarity)
796{ 794{
797 int ioapic = -1; 795 int ioapic = -1;
798 int ioapic_pin = 0; 796 int ioapic_pin = 0;
799 int idx, bit = 0; 797 int idx, bit = 0;
800 static int pci_irq = 16;
801 /*
802 * Mapping between Global System Interrupts, which
803 * represent all possible interrupts, to the IRQs
804 * assigned to actual devices.
805 */
806 static int gsi_to_irq[MAX_GSI_NUM];
807 798
808 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC) 799 if (acpi_irq_model != ACPI_IRQ_MODEL_IOAPIC)
809 return gsi; 800 return gsi;
@@ -836,42 +827,11 @@ int mp_register_gsi(u32 gsi, int triggering, int polarity)
836 if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) { 827 if ((1<<bit) & mp_ioapic_routing[ioapic].pin_programmed[idx]) {
837 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n", 828 Dprintk(KERN_DEBUG "Pin %d-%d already programmed\n",
838 mp_ioapic_routing[ioapic].apic_id, ioapic_pin); 829 mp_ioapic_routing[ioapic].apic_id, ioapic_pin);
839 return gsi_to_irq[gsi]; 830 return gsi;
840 } 831 }
841 832
842 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit); 833 mp_ioapic_routing[ioapic].pin_programmed[idx] |= (1<<bit);
843 834
844 if (triggering == ACPI_LEVEL_SENSITIVE) {
845 /*
846 * For PCI devices assign IRQs in order, avoiding gaps
847 * due to unused I/O APIC pins.
848 */
849 int irq = gsi;
850 if (gsi < MAX_GSI_NUM) {
851 /*
852 * Retain the VIA chipset work-around (gsi > 15), but
853 * avoid a problem where the 8254 timer (IRQ0) is setup
854 * via an override (so it's not on pin 0 of the ioapic),
855 * and at the same time, the pin 0 interrupt is a PCI
856 * type. The gsi > 15 test could cause these two pins
857 * to be shared as IRQ0, and they are not shareable.
858 * So test for this condition, and if necessary, avoid
859 * the pin collision.
860 */
861 if (gsi > 15 || (gsi == 0 && !timer_uses_ioapic_pin_0))
862 gsi = pci_irq++;
863 /*
864 * Don't assign IRQ used by ACPI SCI
865 */
866 if (gsi == acpi_fadt.sci_int)
867 gsi = pci_irq++;
868 gsi_to_irq[irq] = gsi;
869 } else {
870 printk(KERN_ERR "GSI %u is too high\n", gsi);
871 return gsi;
872 }
873 }
874
875 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi, 835 io_apic_set_pci_routing(ioapic, ioapic_pin, gsi,
876 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1, 836 triggering == ACPI_EDGE_SENSITIVE ? 0 : 1,
877 polarity == ACPI_ACTIVE_HIGH ? 0 : 1); 837 polarity == ACPI_ACTIVE_HIGH ? 0 : 1);
diff --git a/include/asm-x86_64/io_apic.h b/include/asm-x86_64/io_apic.h
index b26248b0e373..171ec2dc8c04 100644
--- a/include/asm-x86_64/io_apic.h
+++ b/include/asm-x86_64/io_apic.h
@@ -162,7 +162,6 @@ extern int skip_ioapic_setup;
162extern int io_apic_get_version (int ioapic); 162extern int io_apic_get_version (int ioapic);
163extern int io_apic_get_redir_entries (int ioapic); 163extern int io_apic_get_redir_entries (int ioapic);
164extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int); 164extern int io_apic_set_pci_routing (int ioapic, int pin, int irq, int, int);
165extern int timer_uses_ioapic_pin_0;
166#endif 165#endif
167 166
168extern int sis_apic_bug; /* dummy */ 167extern int sis_apic_bug; /* dummy */