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-rw-r--r--drivers/scsi/53c7xx.c6102
-rw-r--r--drivers/scsi/53c7xx.h1608
-rw-r--r--drivers/scsi/53c7xx.scr1591
-rw-r--r--drivers/scsi/53c7xx_d.h_shipped2874
-rw-r--r--drivers/scsi/53c7xx_u.h_shipped102
-rw-r--r--drivers/scsi/Makefile12
-rw-r--r--drivers/scsi/amiga7xx.c138
-rw-r--r--drivers/scsi/amiga7xx.h23
-rw-r--r--drivers/scsi/bvme6000.c76
-rw-r--r--drivers/scsi/bvme6000.h24
-rw-r--r--drivers/scsi/mvme16x.c78
-rw-r--r--drivers/scsi/mvme16x.h24
12 files changed, 1 insertions, 12651 deletions
diff --git a/drivers/scsi/53c7xx.c b/drivers/scsi/53c7xx.c
deleted file mode 100644
index 93b41f45638a..000000000000
--- a/drivers/scsi/53c7xx.c
+++ /dev/null
@@ -1,6102 +0,0 @@
1/*
2 * 53c710 driver. Modified from Drew Eckhardts driver
3 * for 53c810 by Richard Hirst [richard@sleepie.demon.co.uk]
4 * Check out PERM_OPTIONS and EXPECTED_CLOCK, which may be defined in the
5 * relevant machine specific file (eg. mvme16x.[ch], amiga7xx.[ch]).
6 * There are also currently some defines at the top of 53c7xx.scr.
7 * The chip type is #defined in script_asm.pl, as well as the Makefile.
8 * Host scsi ID expected to be 7 - see NCR53c7x0_init().
9 *
10 * I have removed the PCI code and some of the 53c8xx specific code -
11 * simply to make this file smaller and easier to manage.
12 *
13 * MVME16x issues:
14 * Problems trying to read any chip registers in NCR53c7x0_init(), as they
15 * may never have been set by 16xBug (eg. If kernel has come in over tftp).
16 */
17
18/*
19 * Adapted for Linux/m68k Amiga platforms for the A4000T/A4091 and
20 * WarpEngine SCSI controllers.
21 * By Alan Hourihane <alanh@fairlite.demon.co.uk>
22 * Thanks to Richard Hirst for making it possible with the MVME additions
23 */
24
25/*
26 * 53c710 rev 0 doesn't support add with carry. Rev 1 and 2 does. To
27 * overcome this problem you can define FORCE_DSA_ALIGNMENT, which ensures
28 * that the DSA address is always xxxxxx00. If disconnection is not allowed,
29 * then the script only ever tries to add small (< 256) positive offsets to
30 * DSA, so lack of carry isn't a problem. FORCE_DSA_ALIGNMENT can, of course,
31 * be defined for all chip revisions at a small cost in memory usage.
32 */
33
34#define FORCE_DSA_ALIGNMENT
35
36/*
37 * Selection timer does not always work on the 53c710, depending on the
38 * timing at the last disconnect, if this is a problem for you, try
39 * using validids as detailed below.
40 *
41 * Options for the NCR7xx driver
42 *
43 * noasync:0 - disables sync and asynchronous negotiation
44 * nosync:0 - disables synchronous negotiation (does async)
45 * nodisconnect:0 - disables disconnection
46 * validids:0x?? - Bitmask field that disallows certain ID's.
47 * - e.g. 0x03 allows ID 0,1
48 * - 0x1F allows ID 0,1,2,3,4
49 * opthi:n - replace top word of options with 'n'
50 * optlo:n - replace bottom word of options with 'n'
51 * - ALWAYS SPECIFY opthi THEN optlo <<<<<<<<<<
52 */
53
54/*
55 * PERM_OPTIONS are driver options which will be enabled for all NCR boards
56 * in the system at driver initialization time.
57 *
58 * Don't THINK about touching these in PERM_OPTIONS :
59 * OPTION_MEMORY_MAPPED
60 * 680x0 doesn't have an IO map!
61 *
62 * OPTION_DEBUG_TEST1
63 * Test 1 does bus mastering and interrupt tests, which will help weed
64 * out brain damaged main boards.
65 *
66 * Other PERM_OPTIONS settings are listed below. Note the actual options
67 * required are set in the relevant file (mvme16x.c, amiga7xx.c, etc):
68 *
69 * OPTION_NO_ASYNC
70 * Don't negotiate for asynchronous transfers on the first command
71 * when OPTION_ALWAYS_SYNCHRONOUS is set. Useful for dain bramaged
72 * devices which do something bad rather than sending a MESSAGE
73 * REJECT back to us like they should if they can't cope.
74 *
75 * OPTION_SYNCHRONOUS
76 * Enable support for synchronous transfers. Target negotiated
77 * synchronous transfers will be responded to. To initiate
78 * a synchronous transfer request, call
79 *
80 * request_synchronous (hostno, target)
81 *
82 * from within KGDB.
83 *
84 * OPTION_ALWAYS_SYNCHRONOUS
85 * Negotiate for synchronous transfers with every target after
86 * driver initialization or a SCSI bus reset. This is a bit dangerous,
87 * since there are some dain bramaged SCSI devices which will accept
88 * SDTR messages but keep talking asynchronously.
89 *
90 * OPTION_DISCONNECT
91 * Enable support for disconnect/reconnect. To change the
92 * default setting on a given host adapter, call
93 *
94 * request_disconnect (hostno, allow)
95 *
96 * where allow is non-zero to allow, 0 to disallow.
97 *
98 * If you really want to run 10MHz FAST SCSI-II transfers, you should
99 * know that the NCR driver currently ignores parity information. Most
100 * systems do 5MHz SCSI fine. I've seen a lot that have problems faster
101 * than 8MHz. To play it safe, we only request 5MHz transfers.
102 *
103 * If you'd rather get 10MHz transfers, edit sdtr_message and change
104 * the fourth byte from 50 to 25.
105 */
106
107/*
108 * Sponsored by
109 * iX Multiuser Multitasking Magazine
110 * Hannover, Germany
111 * hm@ix.de
112 *
113 * Copyright 1993, 1994, 1995 Drew Eckhardt
114 * Visionary Computing
115 * (Unix and Linux consulting and custom programming)
116 * drew@PoohSticks.ORG
117 * +1 (303) 786-7975
118 *
119 * TolerANT and SCSI SCRIPTS are registered trademarks of NCR Corporation.
120 *
121 * For more information, please consult
122 *
123 * NCR53C810
124 * SCSI I/O Processor
125 * Programmer's Guide
126 *
127 * NCR 53C810
128 * PCI-SCSI I/O Processor
129 * Data Manual
130 *
131 * NCR 53C810/53C820
132 * PCI-SCSI I/O Processor Design In Guide
133 *
134 * For literature on Symbios Logic Inc. formerly NCR, SCSI,
135 * and Communication products please call (800) 334-5454 or
136 * (719) 536-3300.
137 *
138 * PCI BIOS Specification Revision
139 * PCI Local Bus Specification
140 * PCI System Design Guide
141 *
142 * PCI Special Interest Group
143 * M/S HF3-15A
144 * 5200 N.E. Elam Young Parkway
145 * Hillsboro, Oregon 97124-6497
146 * +1 (503) 696-2000
147 * +1 (800) 433-5177
148 */
149
150/*
151 * Design issues :
152 * The cumulative latency needed to propagate a read/write request
153 * through the file system, buffer cache, driver stacks, SCSI host, and
154 * SCSI device is ultimately the limiting factor in throughput once we
155 * have a sufficiently fast host adapter.
156 *
157 * So, to maximize performance we want to keep the ratio of latency to data
158 * transfer time to a minimum by
159 * 1. Minimizing the total number of commands sent (typical command latency
160 * including drive and bus mastering host overhead is as high as 4.5ms)
161 * to transfer a given amount of data.
162 *
163 * This is accomplished by placing no arbitrary limit on the number
164 * of scatter/gather buffers supported, since we can transfer 1K
165 * per scatter/gather buffer without Eric's cluster patches,
166 * 4K with.
167 *
168 * 2. Minimizing the number of fatal interrupts serviced, since
169 * fatal interrupts halt the SCSI I/O processor. Basically,
170 * this means offloading the practical maximum amount of processing
171 * to the SCSI chip.
172 *
173 * On the NCR53c810/820/720, this is accomplished by using
174 * interrupt-on-the-fly signals when commands complete,
175 * and only handling fatal errors and SDTR / WDTR messages
176 * in the host code.
177 *
178 * On the NCR53c710, interrupts are generated as on the NCR53c8x0,
179 * only the lack of a interrupt-on-the-fly facility complicates
180 * things. Also, SCSI ID registers and commands are
181 * bit fielded rather than binary encoded.
182 *
183 * On the NCR53c700 and NCR53c700-66, operations that are done via
184 * indirect, table mode on the more advanced chips must be
185 * replaced by calls through a jump table which
186 * acts as a surrogate for the DSA. Unfortunately, this
187 * will mean that we must service an interrupt for each
188 * disconnect/reconnect.
189 *
190 * 3. Eliminating latency by pipelining operations at the different levels.
191 *
192 * This driver allows a configurable number of commands to be enqueued
193 * for each target/lun combination (experimentally, I have discovered
194 * that two seems to work best) and will ultimately allow for
195 * SCSI-II tagged queuing.
196 *
197 *
198 * Architecture :
199 * This driver is built around a Linux queue of commands waiting to
200 * be executed, and a shared Linux/NCR array of commands to start. Commands
201 * are transferred to the array by the run_process_issue_queue() function
202 * which is called whenever a command completes.
203 *
204 * As commands are completed, the interrupt routine is triggered,
205 * looks for commands in the linked list of completed commands with
206 * valid status, removes these commands from a list of running commands,
207 * calls the done routine, and flags their target/luns as not busy.
208 *
209 * Due to limitations in the intelligence of the NCR chips, certain
210 * concessions are made. In many cases, it is easier to dynamically
211 * generate/fix-up code rather than calculate on the NCR at run time.
212 * So, code is generated or fixed up for
213 *
214 * - Handling data transfers, using a variable number of MOVE instructions
215 * interspersed with CALL MSG_IN, WHEN MSGIN instructions.
216 *
217 * The DATAIN and DATAOUT routines are separate, so that an incorrect
218 * direction can be trapped, and space isn't wasted.
219 *
220 * It may turn out that we're better off using some sort
221 * of table indirect instruction in a loop with a variable
222 * sized table on the NCR53c710 and newer chips.
223 *
224 * - Checking for reselection (NCR53c710 and better)
225 *
226 * - Handling the details of SCSI context switches (NCR53c710 and better),
227 * such as reprogramming appropriate synchronous parameters,
228 * removing the dsa structure from the NCR's queue of outstanding
229 * commands, etc.
230 *
231 */
232
233#include <linux/module.h>
234
235
236#include <linux/types.h>
237#include <asm/setup.h>
238#include <asm/dma.h>
239#include <asm/io.h>
240#include <asm/system.h>
241#include <linux/delay.h>
242#include <linux/signal.h>
243#include <linux/sched.h>
244#include <linux/errno.h>
245#include <linux/string.h>
246#include <linux/slab.h>
247#include <linux/vmalloc.h>
248#include <linux/mm.h>
249#include <linux/ioport.h>
250#include <linux/time.h>
251#include <linux/blkdev.h>
252#include <linux/spinlock.h>
253#include <linux/interrupt.h>
254#include <asm/pgtable.h>
255
256#ifdef CONFIG_AMIGA
257#include <asm/amigahw.h>
258#include <asm/amigaints.h>
259#include <asm/irq.h>
260
261#define BIG_ENDIAN
262#define NO_IO_SPACE
263#endif
264
265#ifdef CONFIG_MVME16x
266#include <asm/mvme16xhw.h>
267
268#define BIG_ENDIAN
269#define NO_IO_SPACE
270#define VALID_IDS
271#endif
272
273#ifdef CONFIG_BVME6000
274#include <asm/bvme6000hw.h>
275
276#define BIG_ENDIAN
277#define NO_IO_SPACE
278#define VALID_IDS
279#endif
280
281#include "scsi.h"
282#include <scsi/scsi_dbg.h>
283#include <scsi/scsi_host.h>
284#include <scsi/scsi_transport_spi.h>
285#include "53c7xx.h"
286#include <linux/stat.h>
287#include <linux/stddef.h>
288
289#ifdef NO_IO_SPACE
290/*
291 * The following make the definitions in 53c7xx.h (write8, etc) smaller,
292 * we don't have separate i/o space anyway.
293 */
294#undef inb
295#undef outb
296#undef inw
297#undef outw
298#undef inl
299#undef outl
300#define inb(x) 1
301#define inw(x) 1
302#define inl(x) 1
303#define outb(x,y) 1
304#define outw(x,y) 1
305#define outl(x,y) 1
306#endif
307
308static int check_address (unsigned long addr, int size);
309static void dump_events (struct Scsi_Host *host, int count);
310static Scsi_Cmnd * return_outstanding_commands (struct Scsi_Host *host,
311 int free, int issue);
312static void hard_reset (struct Scsi_Host *host);
313static void ncr_scsi_reset (struct Scsi_Host *host);
314static void print_lots (struct Scsi_Host *host);
315static void set_synchronous (struct Scsi_Host *host, int target, int sxfer,
316 int scntl3, int now_connected);
317static int datapath_residual (struct Scsi_Host *host);
318static const char * sbcl_to_phase (int sbcl);
319static void print_progress (Scsi_Cmnd *cmd);
320static void print_queues (struct Scsi_Host *host);
321static void process_issue_queue (unsigned long flags);
322static int shutdown (struct Scsi_Host *host);
323static void abnormal_finished (struct NCR53c7x0_cmd *cmd, int result);
324static int disable (struct Scsi_Host *host);
325static int NCR53c7xx_run_tests (struct Scsi_Host *host);
326static irqreturn_t NCR53c7x0_intr(int irq, void *dev_id);
327static void NCR53c7x0_intfly (struct Scsi_Host *host);
328static int ncr_halt (struct Scsi_Host *host);
329static void intr_phase_mismatch (struct Scsi_Host *host, struct NCR53c7x0_cmd
330 *cmd);
331static void intr_dma (struct Scsi_Host *host, struct NCR53c7x0_cmd *cmd);
332static void print_dsa (struct Scsi_Host *host, u32 *dsa,
333 const char *prefix);
334static int print_insn (struct Scsi_Host *host, const u32 *insn,
335 const char *prefix, int kernel);
336
337static void NCR53c7xx_dsa_fixup (struct NCR53c7x0_cmd *cmd);
338static void NCR53c7x0_init_fixup (struct Scsi_Host *host);
339static int NCR53c7x0_dstat_sir_intr (struct Scsi_Host *host, struct
340 NCR53c7x0_cmd *cmd);
341static void NCR53c7x0_soft_reset (struct Scsi_Host *host);
342
343/* Size of event list (per host adapter) */
344static int track_events = 0;
345static struct Scsi_Host *first_host = NULL; /* Head of list of NCR boards */
346static struct scsi_host_template *the_template = NULL;
347
348/* NCR53c710 script handling code */
349
350#include "53c7xx_d.h"
351#ifdef A_int_debug_sync
352#define DEBUG_SYNC_INTR A_int_debug_sync
353#endif
354int NCR53c7xx_script_len = sizeof (SCRIPT);
355int NCR53c7xx_dsa_len = A_dsa_end + Ent_dsa_zero - Ent_dsa_code_template;
356#ifdef FORCE_DSA_ALIGNMENT
357int CmdPageStart = (0 - Ent_dsa_zero - sizeof(struct NCR53c7x0_cmd)) & 0xff;
358#endif
359
360static char *setup_strings[] =
361 {"","","","","","","",""};
362
363#define MAX_SETUP_STRINGS ARRAY_SIZE(setup_strings)
364#define SETUP_BUFFER_SIZE 200
365static char setup_buffer[SETUP_BUFFER_SIZE];
366static char setup_used[MAX_SETUP_STRINGS];
367
368void ncr53c7xx_setup (char *str, int *ints)
369{
370 int i;
371 char *p1, *p2;
372
373 p1 = setup_buffer;
374 *p1 = '\0';
375 if (str)
376 strncpy(p1, str, SETUP_BUFFER_SIZE - strlen(setup_buffer));
377 setup_buffer[SETUP_BUFFER_SIZE - 1] = '\0';
378 p1 = setup_buffer;
379 i = 0;
380 while (*p1 && (i < MAX_SETUP_STRINGS)) {
381 p2 = strchr(p1, ',');
382 if (p2) {
383 *p2 = '\0';
384 if (p1 != p2)
385 setup_strings[i] = p1;
386 p1 = p2 + 1;
387 i++;
388 }
389 else {
390 setup_strings[i] = p1;
391 break;
392 }
393 }
394 for (i=0; i<MAX_SETUP_STRINGS; i++)
395 setup_used[i] = 0;
396}
397
398
399/* check_setup_strings() returns index if key found, 0 if not
400 */
401
402static int check_setup_strings(char *key, int *flags, int *val, char *buf)
403{
404int x;
405char *cp;
406
407 for (x=0; x<MAX_SETUP_STRINGS; x++) {
408 if (setup_used[x])
409 continue;
410 if (!strncmp(setup_strings[x], key, strlen(key)))
411 break;
412 if (!strncmp(setup_strings[x], "next", strlen("next")))
413 return 0;
414 }
415 if (x == MAX_SETUP_STRINGS)
416 return 0;
417 setup_used[x] = 1;
418 cp = setup_strings[x] + strlen(key);
419 *val = -1;
420 if (*cp != ':')
421 return ++x;
422 cp++;
423 if ((*cp >= '0') && (*cp <= '9')) {
424 *val = simple_strtoul(cp,NULL,0);
425 }
426 return ++x;
427}
428
429
430
431/*
432 * KNOWN BUGS :
433 * - There is some sort of conflict when the PPP driver is compiled with
434 * support for 16 channels?
435 *
436 * - On systems which predate the 1.3.x initialization order change,
437 * the NCR driver will cause Cannot get free page messages to appear.
438 * These are harmless, but I don't know of an easy way to avoid them.
439 *
440 * - With OPTION_DISCONNECT, on two systems under unknown circumstances,
441 * we get a PHASE MISMATCH with DSA set to zero (suggests that we
442 * are occurring somewhere in the reselection code) where
443 * DSP=some value DCMD|DBC=same value.
444 *
445 * Closer inspection suggests that we may be trying to execute
446 * some portion of the DSA?
447 * scsi0 : handling residual transfer (+ 0 bytes from DMA FIFO)
448 * scsi0 : handling residual transfer (+ 0 bytes from DMA FIFO)
449 * scsi0 : no current command : unexpected phase MSGIN.
450 * DSP=0x1c46cc, DCMD|DBC=0x1c46ac, DSA=0x0
451 * DSPS=0x0, TEMP=0x1c3e70, DMODE=0x80
452 * scsi0 : DSP->
453 * 001c46cc : 0x001c46cc 0x00000000
454 * 001c46d4 : 0x001c5ea0 0x000011f8
455 *
456 * Changed the print code in the phase_mismatch handler so
457 * that we call print_lots to try to diagnose this.
458 *
459 */
460
461/*
462 * Possible future direction of architecture for max performance :
463 *
464 * We're using a single start array for the NCR chip. This is
465 * sub-optimal, because we cannot add a command which would conflict with
466 * an executing command to this start queue, and therefore must insert the
467 * next command for a given I/T/L combination after the first has completed;
468 * incurring our interrupt latency between SCSI commands.
469 *
470 * To allow further pipelining of the NCR and host CPU operation, we want
471 * to set things up so that immediately on termination of a command destined
472 * for a given LUN, we get that LUN busy again.
473 *
474 * To do this, we need to add a 32 bit pointer to which is jumped to
475 * on completion of a command. If no new command is available, this
476 * would point to the usual DSA issue queue select routine.
477 *
478 * If one were, it would point to a per-NCR53c7x0_cmd select routine
479 * which starts execution immediately, inserting the command at the head
480 * of the start queue if the NCR chip is selected or reselected.
481 *
482 * We would change so that we keep a list of outstanding commands
483 * for each unit, rather than a single running_list. We'd insert
484 * a new command into the right running list; if the NCR didn't
485 * have something running for that yet, we'd put it in the
486 * start queue as well. Some magic needs to happen to handle the
487 * race condition between the first command terminating before the
488 * new one is written.
489 *
490 * Potential for profiling :
491 * Call do_gettimeofday(struct timeval *tv) to get 800ns resolution.
492 */
493
494
495/*
496 * TODO :
497 * 1. To support WIDE transfers, not much needs to happen. We
498 * should do CHMOVE instructions instead of MOVEs when
499 * we have scatter/gather segments of uneven length. When
500 * we do this, we need to handle the case where we disconnect
501 * between segments.
502 *
503 * 2. Currently, when Icky things happen we do a FATAL(). Instead,
504 * we want to do an integrity check on the parts of the NCR hostdata
505 * structure which were initialized at boot time; FATAL() if that
506 * fails, and otherwise try to recover. Keep track of how many
507 * times this has happened within a single SCSI command; if it
508 * gets excessive, then FATAL().
509 *
510 * 3. Parity checking is currently disabled, and a few things should
511 * happen here now that we support synchronous SCSI transfers :
512 * 1. On soft-reset, we shoould set the EPC (Enable Parity Checking)
513 * and AAP (Assert SATN/ on parity error) bits in SCNTL0.
514 *
515 * 2. We should enable the parity interrupt in the SIEN0 register.
516 *
517 * 3. intr_phase_mismatch() needs to believe that message out is
518 * always an "acceptable" phase to have a mismatch in. If
519 * the old phase was MSG_IN, we should send a MESSAGE PARITY
520 * error. If the old phase was something else, we should send
521 * a INITIATOR_DETECTED_ERROR message. Note that this could
522 * cause a RESTORE POINTERS message; so we should handle that
523 * correctly first. Instead, we should probably do an
524 * initiator_abort.
525 *
526 * 4. MPEE bit of CTEST4 should be set so we get interrupted if
527 * we detect an error.
528 *
529 *
530 * 5. The initial code has been tested on the NCR53c810. I don't
531 * have access to NCR53c700, 700-66 (Forex boards), NCR53c710
532 * (NCR Pentium systems), NCR53c720, NCR53c820, or NCR53c825 boards to
533 * finish development on those platforms.
534 *
535 * NCR53c820/825/720 - need to add wide transfer support, including WDTR
536 * negotiation, programming of wide transfer capabilities
537 * on reselection and table indirect selection.
538 *
539 * NCR53c710 - need to add fatal interrupt or GEN code for
540 * command completion signaling. Need to modify all
541 * SDID, SCID, etc. registers, and table indirect select code
542 * since these use bit fielded (ie 1<<target) instead of
543 * binary encoded target ids. Need to accommodate
544 * different register mappings, probably scan through
545 * the SCRIPT code and change the non SFBR register operand
546 * of all MOVE instructions.
547 *
548 * It is rather worse than this actually, the 710 corrupts
549 * both TEMP and DSA when you do a MOVE MEMORY. This
550 * screws you up all over the place. MOVE MEMORY 4 with a
551 * destination of DSA seems to work OK, which helps some.
552 * Richard Hirst richard@sleepie.demon.co.uk
553 *
554 * NCR53c700/700-66 - need to add code to refix addresses on
555 * every nexus change, eliminate all table indirect code,
556 * very messy.
557 *
558 * 6. The NCR53c7x0 series is very popular on other platforms that
559 * could be running Linux - ie, some high performance AMIGA SCSI
560 * boards use it.
561 *
562 * So, I should include #ifdef'd code so that it is
563 * compatible with these systems.
564 *
565 * Specifically, the little Endian assumptions I made in my
566 * bit fields need to change, and if the NCR doesn't see memory
567 * the right way, we need to provide options to reverse words
568 * when the scripts are relocated.
569 *
570 * 7. Use vremap() to access memory mapped boards.
571 */
572
573/*
574 * Allow for simultaneous existence of multiple SCSI scripts so we
575 * can have a single driver binary for all of the family.
576 *
577 * - one for NCR53c700 and NCR53c700-66 chips (not yet supported)
578 * - one for rest (only the NCR53c810, 815, 820, and 825 are currently
579 * supported)
580 *
581 * So that we only need two SCSI scripts, we need to modify things so
582 * that we fixup register accesses in READ/WRITE instructions, and
583 * we'll also have to accommodate the bit vs. binary encoding of IDs
584 * with the 7xx chips.
585 */
586
587#define ROUNDUP(adr,type) \
588 ((void *) (((long) (adr) + sizeof(type) - 1) & ~(sizeof(type) - 1)))
589
590
591/*
592 * Function: issue_to_cmd
593 *
594 * Purpose: convert jump instruction in issue array to NCR53c7x0_cmd
595 * structure pointer.
596 *
597 * Inputs; issue - pointer to start of NOP or JUMP instruction
598 * in issue array.
599 *
600 * Returns: pointer to command on success; 0 if opcode is NOP.
601 */
602
603static inline struct NCR53c7x0_cmd *
604issue_to_cmd (struct Scsi_Host *host, struct NCR53c7x0_hostdata *hostdata,
605 u32 *issue)
606{
607 return (issue[0] != hostdata->NOP_insn) ?
608 /*
609 * If the IF TRUE bit is set, it's a JUMP instruction. The
610 * operand is a bus pointer to the dsa_begin routine for this DSA. The
611 * dsa field of the NCR53c7x0_cmd structure starts with the
612 * DSA code template. By converting to a virtual address,
613 * subtracting the code template size, and offset of the
614 * dsa field, we end up with a pointer to the start of the
615 * structure (alternatively, we could use the
616 * dsa_cmnd field, an anachronism from when we weren't
617 * sure what the relationship between the NCR structures
618 * and host structures were going to be.
619 */
620 (struct NCR53c7x0_cmd *) ((char *) bus_to_virt (issue[1]) -
621 (hostdata->E_dsa_code_begin - hostdata->E_dsa_code_template) -
622 offsetof(struct NCR53c7x0_cmd, dsa))
623 /* If the IF TRUE bit is not set, it's a NOP */
624 : NULL;
625}
626
627
628/*
629 * FIXME: we should junk these, in favor of synchronous_want and
630 * wide_want in the NCR53c7x0_hostdata structure.
631 */
632
633/* Template for "preferred" synchronous transfer parameters. */
634
635static const unsigned char sdtr_message[] = {
636#ifdef CONFIG_SCSI_NCR53C7xx_FAST
637 EXTENDED_MESSAGE, 3 /* length */, EXTENDED_SDTR, 25 /* *4ns */, 8 /* off */
638#else
639 EXTENDED_MESSAGE, 3 /* length */, EXTENDED_SDTR, 50 /* *4ns */, 8 /* off */
640#endif
641};
642
643/* Template to request asynchronous transfers */
644
645static const unsigned char async_message[] = {
646 EXTENDED_MESSAGE, 3 /* length */, EXTENDED_SDTR, 0, 0 /* asynchronous */
647};
648
649/* Template for "preferred" WIDE transfer parameters */
650
651static const unsigned char wdtr_message[] = {
652 EXTENDED_MESSAGE, 2 /* length */, EXTENDED_WDTR, 1 /* 2^1 bytes */
653};
654
655#if 0
656/*
657 * Function : struct Scsi_Host *find_host (int host)
658 *
659 * Purpose : KGDB support function which translates a host number
660 * to a host structure.
661 *
662 * Inputs : host - number of SCSI host
663 *
664 * Returns : NULL on failure, pointer to host structure on success.
665 */
666
667static struct Scsi_Host *
668find_host (int host) {
669 struct Scsi_Host *h;
670 for (h = first_host; h && h->host_no != host; h = h->next);
671 if (!h) {
672 printk (KERN_ALERT "scsi%d not found\n", host);
673 return NULL;
674 } else if (h->hostt != the_template) {
675 printk (KERN_ALERT "scsi%d is not a NCR board\n", host);
676 return NULL;
677 }
678 return h;
679}
680
681#if 0
682/*
683 * Function : request_synchronous (int host, int target)
684 *
685 * Purpose : KGDB interface which will allow us to negotiate for
686 * synchronous transfers. This ill be replaced with a more
687 * integrated function; perhaps a new entry in the scsi_host
688 * structure, accessible via an ioctl() or perhaps /proc/scsi.
689 *
690 * Inputs : host - number of SCSI host; target - number of target.
691 *
692 * Returns : 0 when negotiation has been setup for next SCSI command,
693 * -1 on failure.
694 */
695
696static int
697request_synchronous (int host, int target) {
698 struct Scsi_Host *h;
699 struct NCR53c7x0_hostdata *hostdata;
700 unsigned long flags;
701 if (target < 0) {
702 printk (KERN_ALERT "target %d is bogus\n", target);
703 return -1;
704 }
705 if (!(h = find_host (host)))
706 return -1;
707 else if (h->this_id == target) {
708 printk (KERN_ALERT "target %d is host ID\n", target);
709 return -1;
710 }
711 else if (target >= h->max_id) {
712 printk (KERN_ALERT "target %d exceeds maximum of %d\n", target,
713 h->max_id);
714 return -1;
715 }
716 hostdata = (struct NCR53c7x0_hostdata *)h->hostdata[0];
717
718 local_irq_save(flags);
719 if (hostdata->initiate_sdtr & (1 << target)) {
720 local_irq_restore(flags);
721 printk (KERN_ALERT "target %d already doing SDTR\n", target);
722 return -1;
723 }
724 hostdata->initiate_sdtr |= (1 << target);
725 local_irq_restore(flags);
726 return 0;
727}
728#endif
729
730/*
731 * Function : request_disconnect (int host, int on_or_off)
732 *
733 * Purpose : KGDB support function, tells us to allow or disallow
734 * disconnections.
735 *
736 * Inputs : host - number of SCSI host; on_or_off - non-zero to allow,
737 * zero to disallow.
738 *
739 * Returns : 0 on success, * -1 on failure.
740 */
741
742static int
743request_disconnect (int host, int on_or_off) {
744 struct Scsi_Host *h;
745 struct NCR53c7x0_hostdata *hostdata;
746 if (!(h = find_host (host)))
747 return -1;
748 hostdata = (struct NCR53c7x0_hostdata *) h->hostdata[0];
749 if (on_or_off)
750 hostdata->options |= OPTION_DISCONNECT;
751 else
752 hostdata->options &= ~OPTION_DISCONNECT;
753 return 0;
754}
755#endif
756
757/*
758 * Function : static void NCR53c7x0_driver_init (struct Scsi_Host *host)
759 *
760 * Purpose : Initialize internal structures, as required on startup, or
761 * after a SCSI bus reset.
762 *
763 * Inputs : host - pointer to this host adapter's structure
764 */
765
766static void
767NCR53c7x0_driver_init (struct Scsi_Host *host) {
768 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
769 host->hostdata[0];
770 int i, j;
771 u32 *ncrcurrent;
772
773 for (i = 0; i < 16; ++i) {
774 hostdata->request_sense[i] = 0;
775 for (j = 0; j < 8; ++j)
776 hostdata->busy[i][j] = 0;
777 set_synchronous (host, i, /* sxfer */ 0, hostdata->saved_scntl3, 0);
778 }
779 hostdata->issue_queue = NULL;
780 hostdata->running_list = hostdata->finished_queue =
781 hostdata->ncrcurrent = NULL;
782 for (i = 0, ncrcurrent = (u32 *) hostdata->schedule;
783 i < host->can_queue; ++i, ncrcurrent += 2) {
784 ncrcurrent[0] = hostdata->NOP_insn;
785 ncrcurrent[1] = 0xdeadbeef;
786 }
787 ncrcurrent[0] = ((DCMD_TYPE_TCI|DCMD_TCI_OP_JUMP) << 24) | DBC_TCI_TRUE;
788 ncrcurrent[1] = (u32) virt_to_bus (hostdata->script) +
789 hostdata->E_wait_reselect;
790 hostdata->reconnect_dsa_head = 0;
791 hostdata->addr_reconnect_dsa_head = (u32)
792 virt_to_bus((void *) &(hostdata->reconnect_dsa_head));
793 hostdata->expecting_iid = 0;
794 hostdata->expecting_sto = 0;
795 if (hostdata->options & OPTION_ALWAYS_SYNCHRONOUS)
796 hostdata->initiate_sdtr = 0xffff;
797 else
798 hostdata->initiate_sdtr = 0;
799 hostdata->talked_to = 0;
800 hostdata->idle = 1;
801}
802
803/*
804 * Function : static int clock_to_ccf_710 (int clock)
805 *
806 * Purpose : Return the clock conversion factor for a given SCSI clock.
807 *
808 * Inputs : clock - SCSI clock expressed in Hz.
809 *
810 * Returns : ccf on success, -1 on failure.
811 */
812
813static int
814clock_to_ccf_710 (int clock) {
815 if (clock <= 16666666)
816 return -1;
817 if (clock <= 25000000)
818 return 2; /* Divide by 1.0 */
819 else if (clock <= 37500000)
820 return 1; /* Divide by 1.5 */
821 else if (clock <= 50000000)
822 return 0; /* Divide by 2.0 */
823 else if (clock <= 66000000)
824 return 3; /* Divide by 3.0 */
825 else
826 return -1;
827}
828
829/*
830 * Function : static int NCR53c7x0_init (struct Scsi_Host *host)
831 *
832 * Purpose : initialize the internal structures for a given SCSI host
833 *
834 * Inputs : host - pointer to this host adapter's structure
835 *
836 * Preconditions : when this function is called, the chip_type
837 * field of the hostdata structure MUST have been set.
838 *
839 * Returns : 0 on success, -1 on failure.
840 */
841
842int
843NCR53c7x0_init (struct Scsi_Host *host) {
844 NCR53c7x0_local_declare();
845 int i, ccf;
846 unsigned char revision;
847 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
848 host->hostdata[0];
849 /*
850 * There are some things which we need to know about in order to provide
851 * a semblance of support. Print 'em if they aren't what we expect,
852 * otherwise don't add to the noise.
853 *
854 * -1 means we don't know what to expect.
855 */
856 int val, flags;
857 char buf[32];
858 int expected_id = -1;
859 int expected_clock = -1;
860 int uninitialized = 0;
861#ifdef NO_IO_SPACE
862 int expected_mapping = OPTION_MEMORY_MAPPED;
863#else
864 int expected_mapping = OPTION_IO_MAPPED;
865#endif
866 for (i=0;i<7;i++)
867 hostdata->valid_ids[i] = 1; /* Default all ID's to scan */
868
869 /* Parse commandline flags */
870 if (check_setup_strings("noasync",&flags,&val,buf))
871 {
872 hostdata->options |= OPTION_NO_ASYNC;
873 hostdata->options &= ~(OPTION_SYNCHRONOUS | OPTION_ALWAYS_SYNCHRONOUS);
874 }
875
876 if (check_setup_strings("nosync",&flags,&val,buf))
877 {
878 hostdata->options &= ~(OPTION_SYNCHRONOUS | OPTION_ALWAYS_SYNCHRONOUS);
879 }
880
881 if (check_setup_strings("nodisconnect",&flags,&val,buf))
882 hostdata->options &= ~OPTION_DISCONNECT;
883
884 if (check_setup_strings("validids",&flags,&val,buf))
885 {
886 for (i=0;i<7;i++)
887 hostdata->valid_ids[i] = val & (1<<i);
888 }
889
890 if ((i = check_setup_strings("next",&flags,&val,buf)))
891 {
892 while (i)
893 setup_used[--i] = 1;
894 }
895
896 if (check_setup_strings("opthi",&flags,&val,buf))
897 hostdata->options = (long long)val << 32;
898 if (check_setup_strings("optlo",&flags,&val,buf))
899 hostdata->options |= val;
900
901 NCR53c7x0_local_setup(host);
902 switch (hostdata->chip) {
903 case 710:
904 case 770:
905 hostdata->dstat_sir_intr = NCR53c7x0_dstat_sir_intr;
906 hostdata->init_save_regs = NULL;
907 hostdata->dsa_fixup = NCR53c7xx_dsa_fixup;
908 hostdata->init_fixup = NCR53c7x0_init_fixup;
909 hostdata->soft_reset = NCR53c7x0_soft_reset;
910 hostdata->run_tests = NCR53c7xx_run_tests;
911 expected_clock = hostdata->scsi_clock;
912 expected_id = 7;
913 break;
914 default:
915 printk ("scsi%d : chip type of %d is not supported yet, detaching.\n",
916 host->host_no, hostdata->chip);
917 scsi_unregister (host);
918 return -1;
919 }
920
921 /* Assign constants accessed by NCR */
922 hostdata->NCR53c7xx_zero = 0;
923 hostdata->NCR53c7xx_msg_reject = MESSAGE_REJECT;
924 hostdata->NCR53c7xx_msg_abort = ABORT;
925 hostdata->NCR53c7xx_msg_nop = NOP;
926 hostdata->NOP_insn = (DCMD_TYPE_TCI|DCMD_TCI_OP_JUMP) << 24;
927 if (expected_mapping == -1 ||
928 (hostdata->options & (OPTION_MEMORY_MAPPED)) !=
929 (expected_mapping & OPTION_MEMORY_MAPPED))
930 printk ("scsi%d : using %s mapped access\n", host->host_no,
931 (hostdata->options & OPTION_MEMORY_MAPPED) ? "memory" :
932 "io");
933
934 hostdata->dmode = (hostdata->chip == 700 || hostdata->chip == 70066) ?
935 DMODE_REG_00 : DMODE_REG_10;
936 hostdata->istat = ((hostdata->chip / 100) == 8) ?
937 ISTAT_REG_800 : ISTAT_REG_700;
938
939/* We have to assume that this may be the first access to the chip, so
940 * we must set EA in DCNTL. */
941
942 NCR53c7x0_write8 (DCNTL_REG, DCNTL_10_EA|DCNTL_10_COM);
943
944
945/* Only the ISTAT register is readable when the NCR is running, so make
946 sure it's halted. */
947 ncr_halt(host);
948
949/*
950 * XXX - the NCR53c700 uses bitfielded registers for SCID, SDID, etc,
951 * as does the 710 with one bit per SCSI ID. Conversely, the NCR
952 * uses a normal, 3 bit binary representation of these values.
953 *
954 * Get the rest of the NCR documentation, and FIND OUT where the change
955 * was.
956 */
957
958#if 0
959 /* May not be able to do this - chip my not have been set up yet */
960 tmp = hostdata->this_id_mask = NCR53c7x0_read8(SCID_REG);
961 for (host->this_id = 0; tmp != 1; tmp >>=1, ++host->this_id);
962#else
963 host->this_id = 7;
964#endif
965
966/*
967 * Note : we should never encounter a board setup for ID0. So,
968 * if we see ID0, assume that it was uninitialized and set it
969 * to the industry standard 7.
970 */
971 if (!host->this_id) {
972 printk("scsi%d : initiator ID was %d, changing to 7\n",
973 host->host_no, host->this_id);
974 host->this_id = 7;
975 hostdata->this_id_mask = 1 << 7;
976 uninitialized = 1;
977 };
978
979 if (expected_id == -1 || host->this_id != expected_id)
980 printk("scsi%d : using initiator ID %d\n", host->host_no,
981 host->this_id);
982
983 /*
984 * Save important registers to allow a soft reset.
985 */
986
987 /*
988 * CTEST7 controls cache snooping, burst mode, and support for
989 * external differential drivers. This isn't currently used - the
990 * default value may not be optimal anyway.
991 * Even worse, it may never have been set up since reset.
992 */
993 hostdata->saved_ctest7 = NCR53c7x0_read8(CTEST7_REG) & CTEST7_SAVE;
994 revision = (NCR53c7x0_read8(CTEST8_REG) & 0xF0) >> 4;
995 switch (revision) {
996 case 1: revision = 0; break;
997 case 2: revision = 1; break;
998 case 4: revision = 2; break;
999 case 8: revision = 3; break;
1000 default: revision = 255; break;
1001 }
1002 printk("scsi%d: Revision 0x%x\n",host->host_no,revision);
1003
1004 if ((revision == 0 || revision == 255) && (hostdata->options & (OPTION_SYNCHRONOUS|OPTION_DISCONNECT|OPTION_ALWAYS_SYNCHRONOUS)))
1005 {
1006 printk ("scsi%d: Disabling sync working and disconnect/reselect\n",
1007 host->host_no);
1008 hostdata->options &= ~(OPTION_SYNCHRONOUS|OPTION_DISCONNECT|OPTION_ALWAYS_SYNCHRONOUS);
1009 }
1010
1011 /*
1012 * On NCR53c700 series chips, DCNTL controls the SCSI clock divisor,
1013 * on 800 series chips, it allows for a totem-pole IRQ driver.
1014 * NOTE saved_dcntl currently overwritten in init function.
1015 * The value read here may be garbage anyway, MVME16x board at least
1016 * does not initialise chip if kernel arrived via tftp.
1017 */
1018
1019 hostdata->saved_dcntl = NCR53c7x0_read8(DCNTL_REG);
1020
1021 /*
1022 * DMODE controls DMA burst length, and on 700 series chips,
1023 * 286 mode and bus width
1024 * NOTE: On MVME16x, chip may have been reset, so this could be a
1025 * power-on/reset default value.
1026 */
1027 hostdata->saved_dmode = NCR53c7x0_read8(hostdata->dmode);
1028
1029 /*
1030 * Now that burst length and enabled/disabled status is known,
1031 * clue the user in on it.
1032 */
1033
1034 ccf = clock_to_ccf_710 (expected_clock);
1035
1036 for (i = 0; i < 16; ++i)
1037 hostdata->cmd_allocated[i] = 0;
1038
1039 if (hostdata->init_save_regs)
1040 hostdata->init_save_regs (host);
1041 if (hostdata->init_fixup)
1042 hostdata->init_fixup (host);
1043
1044 if (!the_template) {
1045 the_template = host->hostt;
1046 first_host = host;
1047 }
1048
1049 /*
1050 * Linux SCSI drivers have always been plagued with initialization
1051 * problems - some didn't work with the BIOS disabled since they expected
1052 * initialization from it, some didn't work when the networking code
1053 * was enabled and registers got scrambled, etc.
1054 *
1055 * To avoid problems like this, in the future, we will do a soft
1056 * reset on the SCSI chip, taking it back to a sane state.
1057 */
1058
1059 hostdata->soft_reset (host);
1060
1061#if 1
1062 hostdata->debug_count_limit = -1;
1063#else
1064 hostdata->debug_count_limit = 1;
1065#endif
1066 hostdata->intrs = -1;
1067 hostdata->resets = -1;
1068 memcpy ((void *) hostdata->synchronous_want, (void *) sdtr_message,
1069 sizeof (hostdata->synchronous_want));
1070
1071 NCR53c7x0_driver_init (host);
1072
1073 if (request_irq(host->irq, NCR53c7x0_intr, IRQF_SHARED, "53c7xx", host))
1074 {
1075 printk("scsi%d : IRQ%d not free, detaching\n",
1076 host->host_no, host->irq);
1077 goto err_unregister;
1078 }
1079
1080 if ((hostdata->run_tests && hostdata->run_tests(host) == -1) ||
1081 (hostdata->options & OPTION_DEBUG_TESTS_ONLY)) {
1082 /* XXX Should disable interrupts, etc. here */
1083 goto err_free_irq;
1084 } else {
1085 if (host->io_port) {
1086 host->n_io_port = 128;
1087 if (!request_region (host->io_port, host->n_io_port, "ncr53c7xx"))
1088 goto err_free_irq;
1089 }
1090 }
1091
1092 if (NCR53c7x0_read8 (SBCL_REG) & SBCL_BSY) {
1093 printk ("scsi%d : bus wedge, doing SCSI reset\n", host->host_no);
1094 hard_reset (host);
1095 }
1096 return 0;
1097
1098 err_free_irq:
1099 free_irq(host->irq, NCR53c7x0_intr);
1100 err_unregister:
1101 scsi_unregister(host);
1102 return -1;
1103}
1104
1105/*
1106 * Function : int ncr53c7xx_init(struct scsi_host_template *tpnt, int board, int chip,
1107 * unsigned long base, int io_port, int irq, int dma, long long options,
1108 * int clock);
1109 *
1110 * Purpose : initializes a NCR53c7,8x0 based on base addresses,
1111 * IRQ, and DMA channel.
1112 *
1113 * Inputs : tpnt - Template for this SCSI adapter, board - board level
1114 * product, chip - 710
1115 *
1116 * Returns : 0 on success, -1 on failure.
1117 *
1118 */
1119
1120int
1121ncr53c7xx_init (struct scsi_host_template *tpnt, int board, int chip,
1122 unsigned long base, int io_port, int irq, int dma,
1123 long long options, int clock)
1124{
1125 struct Scsi_Host *instance;
1126 struct NCR53c7x0_hostdata *hostdata;
1127 char chip_str[80];
1128 int script_len = 0, dsa_len = 0, size = 0, max_cmd_size = 0,
1129 schedule_size = 0, ok = 0;
1130 void *tmp;
1131 unsigned long page;
1132
1133 switch (chip) {
1134 case 710:
1135 case 770:
1136 schedule_size = (tpnt->can_queue + 1) * 8 /* JUMP instruction size */;
1137 script_len = NCR53c7xx_script_len;
1138 dsa_len = NCR53c7xx_dsa_len;
1139 options |= OPTION_INTFLY;
1140 sprintf (chip_str, "NCR53c%d", chip);
1141 break;
1142 default:
1143 printk("scsi-ncr53c7xx : unsupported SCSI chip %d\n", chip);
1144 return -1;
1145 }
1146
1147 printk("scsi-ncr53c7xx : %s at memory 0x%lx, io 0x%x, irq %d",
1148 chip_str, base, io_port, irq);
1149 if (dma == DMA_NONE)
1150 printk("\n");
1151 else
1152 printk(", dma %d\n", dma);
1153
1154 if (options & OPTION_DEBUG_PROBE_ONLY) {
1155 printk ("scsi-ncr53c7xx : probe only enabled, aborting initialization\n");
1156 return -1;
1157 }
1158
1159 max_cmd_size = sizeof(struct NCR53c7x0_cmd) + dsa_len +
1160 /* Size of dynamic part of command structure : */
1161 2 * /* Worst case : we don't know if we need DATA IN or DATA out */
1162 ( 2 * /* Current instructions per scatter/gather segment */
1163 tpnt->sg_tablesize +
1164 3 /* Current startup / termination required per phase */
1165 ) *
1166 8 /* Each instruction is eight bytes */;
1167
1168 /* Allocate fixed part of hostdata, dynamic part to hold appropriate
1169 SCSI SCRIPT(tm) plus a single, maximum-sized NCR53c7x0_cmd structure.
1170
1171 We need a NCR53c7x0_cmd structure for scan_scsis() when we are
1172 not loaded as a module, and when we're loaded as a module, we
1173 can't use a non-dynamically allocated structure because modules
1174 are vmalloc()'d, which can allow structures to cross page
1175 boundaries and breaks our physical/virtual address assumptions
1176 for DMA.
1177
1178 So, we stick it past the end of our hostdata structure.
1179
1180 ASSUMPTION :
1181 Regardless of how many simultaneous SCSI commands we allow,
1182 the probe code only executes a _single_ instruction at a time,
1183 so we only need one here, and don't need to allocate NCR53c7x0_cmd
1184 structures for each target until we are no longer in scan_scsis
1185 and kmalloc() has become functional (memory_init() happens
1186 after all device driver initialization).
1187 */
1188
1189 size = sizeof(struct NCR53c7x0_hostdata) + script_len +
1190 /* Note that alignment will be guaranteed, since we put the command
1191 allocated at probe time after the fixed-up SCSI script, which
1192 consists of 32 bit words, aligned on a 32 bit boundary. But
1193 on a 64bit machine we need 8 byte alignment for hostdata->free, so
1194 we add in another 4 bytes to take care of potential misalignment
1195 */
1196 (sizeof(void *) - sizeof(u32)) + max_cmd_size + schedule_size;
1197
1198 page = __get_free_pages(GFP_ATOMIC,1);
1199 if(page==0)
1200 {
1201 printk(KERN_ERR "53c7xx: out of memory.\n");
1202 return -ENOMEM;
1203 }
1204#ifdef FORCE_DSA_ALIGNMENT
1205 /*
1206 * 53c710 rev.0 doesn't have an add-with-carry instruction.
1207 * Ensure we allocate enough memory to force DSA alignment.
1208 */
1209 size += 256;
1210#endif
1211 /* Size should be < 8K, so we can fit it in two pages. */
1212 if (size > 8192) {
1213 printk(KERN_ERR "53c7xx: hostdata > 8K\n");
1214 return -1;
1215 }
1216
1217 instance = scsi_register (tpnt, 4);
1218 if (!instance)
1219 {
1220 free_page(page);
1221 return -1;
1222 }
1223 instance->hostdata[0] = page;
1224 memset((void *)instance->hostdata[0], 0, 8192);
1225 cache_push(virt_to_phys((void *)(instance->hostdata[0])), 8192);
1226 cache_clear(virt_to_phys((void *)(instance->hostdata[0])), 8192);
1227 kernel_set_cachemode((void *)instance->hostdata[0], 8192, IOMAP_NOCACHE_SER);
1228
1229 /* FIXME : if we ever support an ISA NCR53c7xx based board, we
1230 need to check if the chip is running in a 16 bit mode, and if so
1231 unregister it if it is past the 16M (0x1000000) mark */
1232
1233 hostdata = (struct NCR53c7x0_hostdata *)instance->hostdata[0];
1234 hostdata->size = size;
1235 hostdata->script_count = script_len / sizeof(u32);
1236 hostdata->board = board;
1237 hostdata->chip = chip;
1238
1239 /*
1240 * Being memory mapped is more desirable, since
1241 *
1242 * - Memory accesses may be faster.
1243 *
1244 * - The destination and source address spaces are the same for
1245 * all instructions, meaning we don't have to twiddle dmode or
1246 * any other registers.
1247 *
1248 * So, we try for memory mapped, and if we don't get it,
1249 * we go for port mapped, and that failing we tell the user
1250 * it can't work.
1251 */
1252
1253 if (base) {
1254 instance->base = base;
1255 /* Check for forced I/O mapping */
1256 if (!(options & OPTION_IO_MAPPED)) {
1257 options |= OPTION_MEMORY_MAPPED;
1258 ok = 1;
1259 }
1260 } else {
1261 options &= ~OPTION_MEMORY_MAPPED;
1262 }
1263
1264 if (io_port) {
1265 instance->io_port = io_port;
1266 options |= OPTION_IO_MAPPED;
1267 ok = 1;
1268 } else {
1269 options &= ~OPTION_IO_MAPPED;
1270 }
1271
1272 if (!ok) {
1273 printk ("scsi%d : not initializing, no I/O or memory mapping known \n",
1274 instance->host_no);
1275 scsi_unregister (instance);
1276 return -1;
1277 }
1278 instance->irq = irq;
1279 instance->dma_channel = dma;
1280
1281 hostdata->options = options;
1282 hostdata->dsa_len = dsa_len;
1283 hostdata->max_cmd_size = max_cmd_size;
1284 hostdata->num_cmds = 1;
1285 hostdata->scsi_clock = clock;
1286 /* Initialize single command */
1287 tmp = (hostdata->script + hostdata->script_count);
1288#ifdef FORCE_DSA_ALIGNMENT
1289 {
1290 void *t = ROUNDUP(tmp, void *);
1291 if (((u32)t & 0xff) > CmdPageStart)
1292 t = (void *)((u32)t + 255);
1293 t = (void *)(((u32)t & ~0xff) + CmdPageStart);
1294 hostdata->free = t;
1295#if 0
1296 printk ("scsi: Registered size increased by 256 to %d\n", size);
1297 printk ("scsi: CmdPageStart = 0x%02x\n", CmdPageStart);
1298 printk ("scsi: tmp = 0x%08x, hostdata->free set to 0x%08x\n",
1299 (u32)tmp, (u32)t);
1300#endif
1301 }
1302#else
1303 hostdata->free = ROUNDUP(tmp, void *);
1304#endif
1305 hostdata->free->real = tmp;
1306 hostdata->free->size = max_cmd_size;
1307 hostdata->free->free = NULL;
1308 hostdata->free->next = NULL;
1309 hostdata->extra_allocate = 0;
1310
1311 /* Allocate command start code space */
1312 hostdata->schedule = (chip == 700 || chip == 70066) ?
1313 NULL : (u32 *) ((char *)hostdata->free + max_cmd_size);
1314
1315/*
1316 * For diagnostic purposes, we don't really care how fast things blaze.
1317 * For profiling, we want to access the 800ns resolution system clock,
1318 * using a 'C' call on the host processor.
1319 *
1320 * Therefore, there's no need for the NCR chip to directly manipulate
1321 * this data, and we should put it wherever is most convenient for
1322 * Linux.
1323 */
1324 if (track_events)
1325 hostdata->events = (struct NCR53c7x0_event *) (track_events ?
1326 vmalloc (sizeof (struct NCR53c7x0_event) * track_events) : NULL);
1327 else
1328 hostdata->events = NULL;
1329
1330 if (hostdata->events) {
1331 memset ((void *) hostdata->events, 0, sizeof(struct NCR53c7x0_event) *
1332 track_events);
1333 hostdata->event_size = track_events;
1334 hostdata->event_index = 0;
1335 } else
1336 hostdata->event_size = 0;
1337
1338 return NCR53c7x0_init(instance);
1339}
1340
1341
1342/*
1343 * Function : static void NCR53c7x0_init_fixup (struct Scsi_Host *host)
1344 *
1345 * Purpose : copy and fixup the SCSI SCRIPTS(tm) code for this device.
1346 *
1347 * Inputs : host - pointer to this host adapter's structure
1348 *
1349 */
1350
1351static void
1352NCR53c7x0_init_fixup (struct Scsi_Host *host) {
1353 NCR53c7x0_local_declare();
1354 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
1355 host->hostdata[0];
1356 unsigned char tmp;
1357 int i, ncr_to_memory, memory_to_ncr;
1358 u32 base;
1359 NCR53c7x0_local_setup(host);
1360
1361
1362 /* XXX - NOTE : this code MUST be made endian aware */
1363 /* Copy code into buffer that was allocated at detection time. */
1364 memcpy ((void *) hostdata->script, (void *) SCRIPT,
1365 sizeof(SCRIPT));
1366 /* Fixup labels */
1367 for (i = 0; i < PATCHES; ++i)
1368 hostdata->script[LABELPATCHES[i]] +=
1369 virt_to_bus(hostdata->script);
1370 /* Fixup addresses of constants that used to be EXTERNAL */
1371
1372 patch_abs_32 (hostdata->script, 0, NCR53c7xx_msg_abort,
1373 virt_to_bus(&(hostdata->NCR53c7xx_msg_abort)));
1374 patch_abs_32 (hostdata->script, 0, NCR53c7xx_msg_reject,
1375 virt_to_bus(&(hostdata->NCR53c7xx_msg_reject)));
1376 patch_abs_32 (hostdata->script, 0, NCR53c7xx_zero,
1377 virt_to_bus(&(hostdata->NCR53c7xx_zero)));
1378 patch_abs_32 (hostdata->script, 0, NCR53c7xx_sink,
1379 virt_to_bus(&(hostdata->NCR53c7xx_sink)));
1380 patch_abs_32 (hostdata->script, 0, NOP_insn,
1381 virt_to_bus(&(hostdata->NOP_insn)));
1382 patch_abs_32 (hostdata->script, 0, schedule,
1383 virt_to_bus((void *) hostdata->schedule));
1384
1385 /* Fixup references to external variables: */
1386 for (i = 0; i < EXTERNAL_PATCHES_LEN; ++i)
1387 hostdata->script[EXTERNAL_PATCHES[i].offset] +=
1388 virt_to_bus(EXTERNAL_PATCHES[i].address);
1389
1390 /*
1391 * Fixup absolutes set at boot-time.
1392 *
1393 * All non-code absolute variables suffixed with "dsa_" and "int_"
1394 * are constants, and need no fixup provided the assembler has done
1395 * it for us (I don't know what the "real" NCR assembler does in
1396 * this case, my assembler does the right magic).
1397 */
1398
1399 patch_abs_rwri_data (hostdata->script, 0, dsa_save_data_pointer,
1400 Ent_dsa_code_save_data_pointer - Ent_dsa_zero);
1401 patch_abs_rwri_data (hostdata->script, 0, dsa_restore_pointers,
1402 Ent_dsa_code_restore_pointers - Ent_dsa_zero);
1403 patch_abs_rwri_data (hostdata->script, 0, dsa_check_reselect,
1404 Ent_dsa_code_check_reselect - Ent_dsa_zero);
1405
1406 /*
1407 * Just for the hell of it, preserve the settings of
1408 * Burst Length and Enable Read Line bits from the DMODE
1409 * register. Make sure SCRIPTS start automagically.
1410 */
1411
1412#if defined(CONFIG_MVME16x) || defined(CONFIG_BVME6000)
1413 /* We know better what we want than 16xBug does! */
1414 tmp = DMODE_10_BL_8 | DMODE_10_FC2;
1415#else
1416 tmp = NCR53c7x0_read8(DMODE_REG_10);
1417 tmp &= (DMODE_BL_MASK | DMODE_10_FC2 | DMODE_10_FC1 | DMODE_710_PD |
1418 DMODE_710_UO);
1419#endif
1420
1421 if (!(hostdata->options & OPTION_MEMORY_MAPPED)) {
1422 base = (u32) host->io_port;
1423 memory_to_ncr = tmp|DMODE_800_DIOM;
1424 ncr_to_memory = tmp|DMODE_800_SIOM;
1425 } else {
1426 base = virt_to_bus((void *)host->base);
1427 memory_to_ncr = ncr_to_memory = tmp;
1428 }
1429
1430 /* SCRATCHB_REG_10 == SCRATCHA_REG_800, as it happens */
1431 patch_abs_32 (hostdata->script, 0, addr_scratch, base + SCRATCHA_REG_800);
1432 patch_abs_32 (hostdata->script, 0, addr_temp, base + TEMP_REG);
1433 patch_abs_32 (hostdata->script, 0, addr_dsa, base + DSA_REG);
1434
1435 /*
1436 * I needed some variables in the script to be accessible to
1437 * both the NCR chip and the host processor. For these variables,
1438 * I made the arbitrary decision to store them directly in the
1439 * hostdata structure rather than in the RELATIVE area of the
1440 * SCRIPTS.
1441 */
1442
1443
1444 patch_abs_rwri_data (hostdata->script, 0, dmode_memory_to_memory, tmp);
1445 patch_abs_rwri_data (hostdata->script, 0, dmode_memory_to_ncr, memory_to_ncr);
1446 patch_abs_rwri_data (hostdata->script, 0, dmode_ncr_to_memory, ncr_to_memory);
1447
1448 patch_abs_32 (hostdata->script, 0, msg_buf,
1449 virt_to_bus((void *)&(hostdata->msg_buf)));
1450 patch_abs_32 (hostdata->script, 0, reconnect_dsa_head,
1451 virt_to_bus((void *)&(hostdata->reconnect_dsa_head)));
1452 patch_abs_32 (hostdata->script, 0, addr_reconnect_dsa_head,
1453 virt_to_bus((void *)&(hostdata->addr_reconnect_dsa_head)));
1454 patch_abs_32 (hostdata->script, 0, reselected_identify,
1455 virt_to_bus((void *)&(hostdata->reselected_identify)));
1456/* reselected_tag is currently unused */
1457#if 0
1458 patch_abs_32 (hostdata->script, 0, reselected_tag,
1459 virt_to_bus((void *)&(hostdata->reselected_tag)));
1460#endif
1461
1462 patch_abs_32 (hostdata->script, 0, test_dest,
1463 virt_to_bus((void*)&hostdata->test_dest));
1464 patch_abs_32 (hostdata->script, 0, test_src,
1465 virt_to_bus(&hostdata->test_source));
1466 patch_abs_32 (hostdata->script, 0, saved_dsa,
1467 virt_to_bus((void *)&hostdata->saved2_dsa));
1468 patch_abs_32 (hostdata->script, 0, emulfly,
1469 virt_to_bus((void *)&hostdata->emulated_intfly));
1470
1471 patch_abs_rwri_data (hostdata->script, 0, dsa_check_reselect,
1472 (unsigned char)(Ent_dsa_code_check_reselect - Ent_dsa_zero));
1473
1474/* These are for event logging; the ncr_event enum contains the
1475 actual interrupt numbers. */
1476#ifdef A_int_EVENT_SELECT
1477 patch_abs_32 (hostdata->script, 0, int_EVENT_SELECT, (u32) EVENT_SELECT);
1478#endif
1479#ifdef A_int_EVENT_DISCONNECT
1480 patch_abs_32 (hostdata->script, 0, int_EVENT_DISCONNECT, (u32) EVENT_DISCONNECT);
1481#endif
1482#ifdef A_int_EVENT_RESELECT
1483 patch_abs_32 (hostdata->script, 0, int_EVENT_RESELECT, (u32) EVENT_RESELECT);
1484#endif
1485#ifdef A_int_EVENT_COMPLETE
1486 patch_abs_32 (hostdata->script, 0, int_EVENT_COMPLETE, (u32) EVENT_COMPLETE);
1487#endif
1488#ifdef A_int_EVENT_IDLE
1489 patch_abs_32 (hostdata->script, 0, int_EVENT_IDLE, (u32) EVENT_IDLE);
1490#endif
1491#ifdef A_int_EVENT_SELECT_FAILED
1492 patch_abs_32 (hostdata->script, 0, int_EVENT_SELECT_FAILED,
1493 (u32) EVENT_SELECT_FAILED);
1494#endif
1495#ifdef A_int_EVENT_BEFORE_SELECT
1496 patch_abs_32 (hostdata->script, 0, int_EVENT_BEFORE_SELECT,
1497 (u32) EVENT_BEFORE_SELECT);
1498#endif
1499#ifdef A_int_EVENT_RESELECT_FAILED
1500 patch_abs_32 (hostdata->script, 0, int_EVENT_RESELECT_FAILED,
1501 (u32) EVENT_RESELECT_FAILED);
1502#endif
1503
1504 /*
1505 * Make sure the NCR and Linux code agree on the location of
1506 * certain fields.
1507 */
1508
1509 hostdata->E_accept_message = Ent_accept_message;
1510 hostdata->E_command_complete = Ent_command_complete;
1511 hostdata->E_cmdout_cmdout = Ent_cmdout_cmdout;
1512 hostdata->E_data_transfer = Ent_data_transfer;
1513 hostdata->E_debug_break = Ent_debug_break;
1514 hostdata->E_dsa_code_template = Ent_dsa_code_template;
1515 hostdata->E_dsa_code_template_end = Ent_dsa_code_template_end;
1516 hostdata->E_end_data_transfer = Ent_end_data_transfer;
1517 hostdata->E_initiator_abort = Ent_initiator_abort;
1518 hostdata->E_msg_in = Ent_msg_in;
1519 hostdata->E_other_transfer = Ent_other_transfer;
1520 hostdata->E_other_in = Ent_other_in;
1521 hostdata->E_other_out = Ent_other_out;
1522 hostdata->E_reject_message = Ent_reject_message;
1523 hostdata->E_respond_message = Ent_respond_message;
1524 hostdata->E_select = Ent_select;
1525 hostdata->E_select_msgout = Ent_select_msgout;
1526 hostdata->E_target_abort = Ent_target_abort;
1527#ifdef Ent_test_0
1528 hostdata->E_test_0 = Ent_test_0;
1529#endif
1530 hostdata->E_test_1 = Ent_test_1;
1531 hostdata->E_test_2 = Ent_test_2;
1532#ifdef Ent_test_3
1533 hostdata->E_test_3 = Ent_test_3;
1534#endif
1535 hostdata->E_wait_reselect = Ent_wait_reselect;
1536 hostdata->E_dsa_code_begin = Ent_dsa_code_begin;
1537
1538 hostdata->dsa_cmdout = A_dsa_cmdout;
1539 hostdata->dsa_cmnd = A_dsa_cmnd;
1540 hostdata->dsa_datain = A_dsa_datain;
1541 hostdata->dsa_dataout = A_dsa_dataout;
1542 hostdata->dsa_end = A_dsa_end;
1543 hostdata->dsa_msgin = A_dsa_msgin;
1544 hostdata->dsa_msgout = A_dsa_msgout;
1545 hostdata->dsa_msgout_other = A_dsa_msgout_other;
1546 hostdata->dsa_next = A_dsa_next;
1547 hostdata->dsa_select = A_dsa_select;
1548 hostdata->dsa_start = Ent_dsa_code_template - Ent_dsa_zero;
1549 hostdata->dsa_status = A_dsa_status;
1550 hostdata->dsa_jump_dest = Ent_dsa_code_fix_jump - Ent_dsa_zero +
1551 8 /* destination operand */;
1552
1553 /* sanity check */
1554 if (A_dsa_fields_start != Ent_dsa_code_template_end -
1555 Ent_dsa_zero)
1556 printk("scsi%d : NCR dsa_fields start is %d not %d\n",
1557 host->host_no, A_dsa_fields_start, Ent_dsa_code_template_end -
1558 Ent_dsa_zero);
1559
1560 printk("scsi%d : NCR code relocated to 0x%lx (virt 0x%p)\n", host->host_no,
1561 virt_to_bus(hostdata->script), hostdata->script);
1562}
1563
1564/*
1565 * Function : static int NCR53c7xx_run_tests (struct Scsi_Host *host)
1566 *
1567 * Purpose : run various verification tests on the NCR chip,
1568 * including interrupt generation, and proper bus mastering
1569 * operation.
1570 *
1571 * Inputs : host - a properly initialized Scsi_Host structure
1572 *
1573 * Preconditions : the NCR chip must be in a halted state.
1574 *
1575 * Returns : 0 if all tests were successful, -1 on error.
1576 *
1577 */
1578
1579static int
1580NCR53c7xx_run_tests (struct Scsi_Host *host) {
1581 NCR53c7x0_local_declare();
1582 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
1583 host->hostdata[0];
1584 unsigned long timeout;
1585 u32 start;
1586 int failed, i;
1587 unsigned long flags;
1588 NCR53c7x0_local_setup(host);
1589
1590 /* The NCR chip _must_ be idle to run the test scripts */
1591
1592 local_irq_save(flags);
1593 if (!hostdata->idle) {
1594 printk ("scsi%d : chip not idle, aborting tests\n", host->host_no);
1595 local_irq_restore(flags);
1596 return -1;
1597 }
1598
1599 /*
1600 * Check for functional interrupts, this could work as an
1601 * autoprobe routine.
1602 */
1603
1604 if ((hostdata->options & OPTION_DEBUG_TEST1) &&
1605 hostdata->state != STATE_DISABLED) {
1606 hostdata->idle = 0;
1607 hostdata->test_running = 1;
1608 hostdata->test_completed = -1;
1609 hostdata->test_dest = 0;
1610 hostdata->test_source = 0xdeadbeef;
1611 start = virt_to_bus (hostdata->script) + hostdata->E_test_1;
1612 hostdata->state = STATE_RUNNING;
1613 printk ("scsi%d : test 1", host->host_no);
1614 NCR53c7x0_write32 (DSP_REG, start);
1615 if (hostdata->options & OPTION_DEBUG_TRACE)
1616 NCR53c7x0_write8 (DCNTL_REG, hostdata->saved_dcntl | DCNTL_SSM |
1617 DCNTL_STD);
1618 printk (" started\n");
1619 local_irq_restore(flags);
1620
1621 /*
1622 * This is currently a .5 second timeout, since (in theory) no slow
1623 * board will take that long. In practice, we've seen one
1624 * pentium which occassionally fails with this, but works with
1625 * 10 times as much?
1626 */
1627
1628 timeout = jiffies + 5 * HZ / 10;
1629 while ((hostdata->test_completed == -1) && time_before(jiffies, timeout))
1630 barrier();
1631
1632 failed = 1;
1633 if (hostdata->test_completed == -1)
1634 printk ("scsi%d : driver test 1 timed out%s\n",host->host_no ,
1635 (hostdata->test_dest == 0xdeadbeef) ?
1636 " due to lost interrupt.\n"
1637 " Please verify that the correct IRQ is being used for your board,\n"
1638 : "");
1639 else if (hostdata->test_completed != 1)
1640 printk ("scsi%d : test 1 bad interrupt value (%d)\n",
1641 host->host_no, hostdata->test_completed);
1642 else
1643 failed = (hostdata->test_dest != 0xdeadbeef);
1644
1645 if (hostdata->test_dest != 0xdeadbeef) {
1646 printk ("scsi%d : driver test 1 read 0x%x instead of 0xdeadbeef indicating a\n"
1647 " probable cache invalidation problem. Please configure caching\n"
1648 " as write-through or disabled\n",
1649 host->host_no, hostdata->test_dest);
1650 }
1651
1652 if (failed) {
1653 printk ("scsi%d : DSP = 0x%p (script at 0x%p, start at 0x%x)\n",
1654 host->host_no, bus_to_virt(NCR53c7x0_read32(DSP_REG)),
1655 hostdata->script, start);
1656 printk ("scsi%d : DSPS = 0x%x\n", host->host_no,
1657 NCR53c7x0_read32(DSPS_REG));
1658 local_irq_restore(flags);
1659 return -1;
1660 }
1661 hostdata->test_running = 0;
1662 }
1663
1664 if ((hostdata->options & OPTION_DEBUG_TEST2) &&
1665 hostdata->state != STATE_DISABLED) {
1666 u32 dsa[48];
1667 unsigned char identify = IDENTIFY(0, 0);
1668 unsigned char cmd[6];
1669 unsigned char data[36];
1670 unsigned char status = 0xff;
1671 unsigned char msg = 0xff;
1672
1673 cmd[0] = INQUIRY;
1674 cmd[1] = cmd[2] = cmd[3] = cmd[5] = 0;
1675 cmd[4] = sizeof(data);
1676
1677 dsa[2] = 1;
1678 dsa[3] = virt_to_bus(&identify);
1679 dsa[4] = 6;
1680 dsa[5] = virt_to_bus(&cmd);
1681 dsa[6] = sizeof(data);
1682 dsa[7] = virt_to_bus(&data);
1683 dsa[8] = 1;
1684 dsa[9] = virt_to_bus(&status);
1685 dsa[10] = 1;
1686 dsa[11] = virt_to_bus(&msg);
1687
1688 for (i = 0; i < 6; ++i) {
1689#ifdef VALID_IDS
1690 if (!hostdata->valid_ids[i])
1691 continue;
1692#endif
1693 local_irq_disable();
1694 if (!hostdata->idle) {
1695 printk ("scsi%d : chip not idle, aborting tests\n", host->host_no);
1696 local_irq_restore(flags);
1697 return -1;
1698 }
1699
1700 /* 710: bit mapped scsi ID, async */
1701 dsa[0] = (1 << i) << 16;
1702 hostdata->idle = 0;
1703 hostdata->test_running = 2;
1704 hostdata->test_completed = -1;
1705 start = virt_to_bus(hostdata->script) + hostdata->E_test_2;
1706 hostdata->state = STATE_RUNNING;
1707 NCR53c7x0_write32 (DSA_REG, virt_to_bus(dsa));
1708 NCR53c7x0_write32 (DSP_REG, start);
1709 if (hostdata->options & OPTION_DEBUG_TRACE)
1710 NCR53c7x0_write8 (DCNTL_REG, hostdata->saved_dcntl |
1711 DCNTL_SSM | DCNTL_STD);
1712 local_irq_restore(flags);
1713
1714 timeout = jiffies + 5 * HZ; /* arbitrary */
1715 while ((hostdata->test_completed == -1) && time_before(jiffies, timeout))
1716 barrier();
1717
1718 NCR53c7x0_write32 (DSA_REG, 0);
1719
1720 if (hostdata->test_completed == 2) {
1721 data[35] = 0;
1722 printk ("scsi%d : test 2 INQUIRY to target %d, lun 0 : %s\n",
1723 host->host_no, i, data + 8);
1724 printk ("scsi%d : status ", host->host_no);
1725 scsi_print_status (status);
1726 printk ("\nscsi%d : message ", host->host_no);
1727 spi_print_msg(&msg);
1728 printk ("\n");
1729 } else if (hostdata->test_completed == 3) {
1730 printk("scsi%d : test 2 no connection with target %d\n",
1731 host->host_no, i);
1732 if (!hostdata->idle) {
1733 printk("scsi%d : not idle\n", host->host_no);
1734 local_irq_restore(flags);
1735 return -1;
1736 }
1737 } else if (hostdata->test_completed == -1) {
1738 printk ("scsi%d : test 2 timed out\n", host->host_no);
1739 local_irq_restore(flags);
1740 return -1;
1741 }
1742 hostdata->test_running = 0;
1743 }
1744 }
1745
1746 local_irq_restore(flags);
1747 return 0;
1748}
1749
1750/*
1751 * Function : static void NCR53c7xx_dsa_fixup (struct NCR53c7x0_cmd *cmd)
1752 *
1753 * Purpose : copy the NCR53c8xx dsa structure into cmd's dsa buffer,
1754 * performing all necessary relocation.
1755 *
1756 * Inputs : cmd, a NCR53c7x0_cmd structure with a dsa area large
1757 * enough to hold the NCR53c8xx dsa.
1758 */
1759
1760static void
1761NCR53c7xx_dsa_fixup (struct NCR53c7x0_cmd *cmd) {
1762 Scsi_Cmnd *c = cmd->cmd;
1763 struct Scsi_Host *host = c->device->host;
1764 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
1765 host->hostdata[0];
1766 int i;
1767
1768 memcpy (cmd->dsa, hostdata->script + (hostdata->E_dsa_code_template / 4),
1769 hostdata->E_dsa_code_template_end - hostdata->E_dsa_code_template);
1770
1771 /*
1772 * Note : within the NCR 'C' code, dsa points to the _start_
1773 * of the DSA structure, and _not_ the offset of dsa_zero within
1774 * that structure used to facilitate shorter signed offsets
1775 * for the 8 bit ALU.
1776 *
1777 * The implications of this are that
1778 *
1779 * - 32 bit A_dsa_* absolute values require an additional
1780 * dsa_zero added to their value to be correct, since they are
1781 * relative to dsa_zero which is in essentially a separate
1782 * space from the code symbols.
1783 *
1784 * - All other symbols require no special treatment.
1785 */
1786
1787 patch_abs_tci_data (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1788 dsa_temp_lun, c->device->lun);
1789 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1790 dsa_temp_addr_next, virt_to_bus(&cmd->dsa_next_addr));
1791 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1792 dsa_temp_next, virt_to_bus(cmd->dsa) + Ent_dsa_zero -
1793 Ent_dsa_code_template + A_dsa_next);
1794 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1795 dsa_temp_sync, virt_to_bus((void *)hostdata->sync[c->device->id].script));
1796 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1797 dsa_sscf_710, virt_to_bus((void *)&hostdata->sync[c->device->id].sscf_710));
1798 patch_abs_tci_data (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1799 dsa_temp_target, 1 << c->device->id);
1800 /* XXX - new pointer stuff */
1801 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1802 dsa_temp_addr_saved_pointer, virt_to_bus(&cmd->saved_data_pointer));
1803 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1804 dsa_temp_addr_saved_residual, virt_to_bus(&cmd->saved_residual));
1805 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1806 dsa_temp_addr_residual, virt_to_bus(&cmd->residual));
1807
1808 /* XXX - new start stuff */
1809
1810 patch_abs_32 (cmd->dsa, Ent_dsa_code_template / sizeof(u32),
1811 dsa_temp_addr_dsa_value, virt_to_bus(&cmd->dsa_addr));
1812}
1813
1814/*
1815 * Function : run_process_issue_queue (void)
1816 *
1817 * Purpose : insure that the coroutine is running and will process our
1818 * request. process_issue_queue_running is checked/set here (in an
1819 * inline function) rather than in process_issue_queue itself to reduce
1820 * the chances of stack overflow.
1821 *
1822 */
1823
1824static volatile int process_issue_queue_running = 0;
1825
1826static __inline__ void
1827run_process_issue_queue(void) {
1828 unsigned long flags;
1829 local_irq_save(flags);
1830 if (!process_issue_queue_running) {
1831 process_issue_queue_running = 1;
1832 process_issue_queue(flags);
1833 /*
1834 * process_issue_queue_running is cleared in process_issue_queue
1835 * once it can't do more work, and process_issue_queue exits with
1836 * interrupts disabled.
1837 */
1838 }
1839 local_irq_restore(flags);
1840}
1841
1842/*
1843 * Function : static void abnormal_finished (struct NCR53c7x0_cmd *cmd, int
1844 * result)
1845 *
1846 * Purpose : mark SCSI command as finished, OR'ing the host portion
1847 * of the result word into the result field of the corresponding
1848 * Scsi_Cmnd structure, and removing it from the internal queues.
1849 *
1850 * Inputs : cmd - command, result - entire result field
1851 *
1852 * Preconditions : the NCR chip should be in a halted state when
1853 * abnormal_finished is run, since it modifies structures which
1854 * the NCR expects to have exclusive access to.
1855 */
1856
1857static void
1858abnormal_finished (struct NCR53c7x0_cmd *cmd, int result) {
1859 Scsi_Cmnd *c = cmd->cmd;
1860 struct Scsi_Host *host = c->device->host;
1861 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
1862 host->hostdata[0];
1863 unsigned long flags;
1864 int left, found;
1865 volatile struct NCR53c7x0_cmd * linux_search;
1866 volatile struct NCR53c7x0_cmd * volatile *linux_prev;
1867 volatile u32 *ncr_prev, *ncrcurrent, ncr_search;
1868
1869#if 0
1870 printk ("scsi%d: abnormal finished\n", host->host_no);
1871#endif
1872
1873 local_irq_save(flags);
1874 found = 0;
1875 /*
1876 * Traverse the NCR issue array until we find a match or run out
1877 * of instructions. Instructions in the NCR issue array are
1878 * either JUMP or NOP instructions, which are 2 words in length.
1879 */
1880
1881
1882 for (found = 0, left = host->can_queue, ncrcurrent = hostdata->schedule;
1883 left > 0; --left, ncrcurrent += 2)
1884 {
1885 if (issue_to_cmd (host, hostdata, (u32 *) ncrcurrent) == cmd)
1886 {
1887 ncrcurrent[0] = hostdata->NOP_insn;
1888 ncrcurrent[1] = 0xdeadbeef;
1889 ++found;
1890 break;
1891 }
1892 }
1893
1894 /*
1895 * Traverse the NCR reconnect list of DSA structures until we find
1896 * a pointer to this dsa or have found too many command structures.
1897 * We let prev point at the next field of the previous element or
1898 * head of the list, so we don't do anything different for removing
1899 * the head element.
1900 */
1901
1902 for (left = host->can_queue,
1903 ncr_search = hostdata->reconnect_dsa_head,
1904 ncr_prev = &hostdata->reconnect_dsa_head;
1905 left >= 0 && ncr_search &&
1906 ((char*)bus_to_virt(ncr_search) + hostdata->dsa_start)
1907 != (char *) cmd->dsa;
1908 ncr_prev = (u32*) ((char*)bus_to_virt(ncr_search) +
1909 hostdata->dsa_next), ncr_search = *ncr_prev, --left);
1910
1911 if (left < 0)
1912 printk("scsi%d: loop detected in ncr reconncect list\n",
1913 host->host_no);
1914 else if (ncr_search) {
1915 if (found)
1916 printk("scsi%d: scsi %ld in ncr issue array and reconnect lists\n",
1917 host->host_no, c->pid);
1918 else {
1919 volatile u32 * next = (u32 *)
1920 ((char *)bus_to_virt(ncr_search) + hostdata->dsa_next);
1921 *ncr_prev = *next;
1922/* If we're at the tail end of the issue queue, update that pointer too. */
1923 found = 1;
1924 }
1925 }
1926
1927 /*
1928 * Traverse the host running list until we find this command or discover
1929 * we have too many elements, pointing linux_prev at the next field of the
1930 * linux_previous element or head of the list, search at this element.
1931 */
1932
1933 for (left = host->can_queue, linux_search = hostdata->running_list,
1934 linux_prev = &hostdata->running_list;
1935 left >= 0 && linux_search && linux_search != cmd;
1936 linux_prev = &(linux_search->next),
1937 linux_search = linux_search->next, --left);
1938
1939 if (left < 0)
1940 printk ("scsi%d: loop detected in host running list for scsi pid %ld\n",
1941 host->host_no, c->pid);
1942 else if (linux_search) {
1943 *linux_prev = linux_search->next;
1944 --hostdata->busy[c->device->id][c->device->lun];
1945 }
1946
1947 /* Return the NCR command structure to the free list */
1948 cmd->next = hostdata->free;
1949 hostdata->free = cmd;
1950 c->host_scribble = NULL;
1951
1952 /* And return */
1953 c->result = result;
1954 c->scsi_done(c);
1955
1956 local_irq_restore(flags);
1957 run_process_issue_queue();
1958}
1959
1960/*
1961 * Function : static void intr_break (struct Scsi_Host *host,
1962 * struct NCR53c7x0_cmd *cmd)
1963 *
1964 * Purpose : Handler for breakpoint interrupts from a SCSI script
1965 *
1966 * Inputs : host - pointer to this host adapter's structure,
1967 * cmd - pointer to the command (if any) dsa was pointing
1968 * to.
1969 *
1970 */
1971
1972static void
1973intr_break (struct Scsi_Host *host, struct
1974 NCR53c7x0_cmd *cmd) {
1975 NCR53c7x0_local_declare();
1976 struct NCR53c7x0_break *bp;
1977#if 0
1978 Scsi_Cmnd *c = cmd ? cmd->cmd : NULL;
1979#endif
1980 u32 *dsp;
1981 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
1982 host->hostdata[0];
1983 unsigned long flags;
1984 NCR53c7x0_local_setup(host);
1985
1986 /*
1987 * Find the break point corresponding to this address, and
1988 * dump the appropriate debugging information to standard
1989 * output.
1990 */
1991 local_irq_save(flags);
1992 dsp = (u32 *) bus_to_virt(NCR53c7x0_read32(DSP_REG));
1993 for (bp = hostdata->breakpoints; bp && bp->address != dsp;
1994 bp = bp->next);
1995 if (!bp)
1996 panic("scsi%d : break point interrupt from %p with no breakpoint!",
1997 host->host_no, dsp);
1998
1999 /*
2000 * Configure the NCR chip for manual start mode, so that we can
2001 * point the DSP register at the instruction that follows the
2002 * INT int_debug_break instruction.
2003 */
2004
2005 NCR53c7x0_write8 (hostdata->dmode,
2006 NCR53c7x0_read8(hostdata->dmode)|DMODE_MAN);
2007
2008 /*
2009 * And update the DSP register, using the size of the old
2010 * instruction in bytes.
2011 */
2012
2013 local_irq_restore(flags);
2014}
2015/*
2016 * Function : static void print_synchronous (const char *prefix,
2017 * const unsigned char *msg)
2018 *
2019 * Purpose : print a pretty, user and machine parsable representation
2020 * of a SDTR message, including the "real" parameters, data
2021 * clock so we can tell transfer rate at a glance.
2022 *
2023 * Inputs ; prefix - text to prepend, msg - SDTR message (5 bytes)
2024 */
2025
2026static void
2027print_synchronous (const char *prefix, const unsigned char *msg) {
2028 if (msg[4]) {
2029 int Hz = 1000000000 / (msg[3] * 4);
2030 int integer = Hz / 1000000;
2031 int fraction = (Hz - (integer * 1000000)) / 10000;
2032 printk ("%speriod %dns offset %d %d.%02dMHz %s SCSI%s\n",
2033 prefix, (int) msg[3] * 4, (int) msg[4], integer, fraction,
2034 (((msg[3] * 4) < 200) ? "FAST" : "synchronous"),
2035 (((msg[3] * 4) < 200) ? "-II" : ""));
2036 } else
2037 printk ("%sasynchronous SCSI\n", prefix);
2038}
2039
2040/*
2041 * Function : static void set_synchronous (struct Scsi_Host *host,
2042 * int target, int sxfer, int scntl3, int now_connected)
2043 *
2044 * Purpose : reprogram transfers between the selected SCSI initiator and
2045 * target with the given register values; in the indirect
2046 * select operand, reselection script, and chip registers.
2047 *
2048 * Inputs : host - NCR53c7,8xx SCSI host, target - number SCSI target id,
2049 * sxfer and scntl3 - NCR registers. now_connected - if non-zero,
2050 * we should reprogram the registers now too.
2051 *
2052 * NOTE: For 53c710, scntl3 is actually used for SCF bits from
2053 * SBCL, as we don't have a SCNTL3.
2054 */
2055
2056static void
2057set_synchronous (struct Scsi_Host *host, int target, int sxfer, int scntl3,
2058 int now_connected) {
2059 NCR53c7x0_local_declare();
2060 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
2061 host->hostdata[0];
2062 u32 *script;
2063 NCR53c7x0_local_setup(host);
2064
2065 /* These are eight bit registers */
2066 sxfer &= 0xff;
2067 scntl3 &= 0xff;
2068
2069 hostdata->sync[target].sxfer_sanity = sxfer;
2070 hostdata->sync[target].scntl3_sanity = scntl3;
2071
2072/*
2073 * HARD CODED : synchronous script is EIGHT words long. This
2074 * must agree with 53c7.8xx.h
2075 */
2076
2077 if ((hostdata->chip != 700) && (hostdata->chip != 70066)) {
2078 hostdata->sync[target].select_indirect = (1 << target) << 16 |
2079 (sxfer << 8);
2080 hostdata->sync[target].sscf_710 = scntl3;
2081
2082 script = (u32 *) hostdata->sync[target].script;
2083
2084 /* XXX - add NCR53c7x0 code to reprogram SCF bits if we want to */
2085 script[0] = ((DCMD_TYPE_RWRI | DCMD_RWRI_OPC_MODIFY |
2086 DCMD_RWRI_OP_MOVE) << 24) |
2087 (SBCL_REG << 16) | (scntl3 << 8);
2088 script[1] = 0;
2089 script += 2;
2090
2091 script[0] = ((DCMD_TYPE_RWRI | DCMD_RWRI_OPC_MODIFY |
2092 DCMD_RWRI_OP_MOVE) << 24) |
2093 (SXFER_REG << 16) | (sxfer << 8);
2094 script[1] = 0;
2095 script += 2;
2096
2097#ifdef DEBUG_SYNC_INTR
2098 if (hostdata->options & OPTION_DEBUG_DISCONNECT) {
2099 script[0] = ((DCMD_TYPE_TCI|DCMD_TCI_OP_INT) << 24) | DBC_TCI_TRUE;
2100 script[1] = DEBUG_SYNC_INTR;
2101 script += 2;
2102 }
2103#endif
2104
2105 script[0] = ((DCMD_TYPE_TCI|DCMD_TCI_OP_RETURN) << 24) | DBC_TCI_TRUE;
2106 script[1] = 0;
2107 script += 2;
2108 }
2109
2110 if (hostdata->options & OPTION_DEBUG_SYNCHRONOUS)
2111 printk ("scsi%d : target %d sync parameters are sxfer=0x%x, scntl3=0x%x\n",
2112 host->host_no, target, sxfer, scntl3);
2113
2114 if (now_connected) {
2115 NCR53c7x0_write8(SBCL_REG, scntl3);
2116 NCR53c7x0_write8(SXFER_REG, sxfer);
2117 }
2118}
2119
2120
2121/*
2122 * Function : static int asynchronous (struct Scsi_Host *host, int target)
2123 *
2124 * Purpose : reprogram between the selected SCSI Host adapter and target
2125 * (assumed to be currently connected) for asynchronous transfers.
2126 *
2127 * Inputs : host - SCSI host structure, target - numeric target ID.
2128 *
2129 * Preconditions : the NCR chip should be in one of the halted states
2130 */
2131
2132static void
2133asynchronous (struct Scsi_Host *host, int target) {
2134 NCR53c7x0_local_declare();
2135 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
2136 host->hostdata[0];
2137 NCR53c7x0_local_setup(host);
2138 set_synchronous (host, target, /* no offset */ 0, hostdata->saved_scntl3,
2139 1);
2140 printk ("scsi%d : setting target %d to asynchronous SCSI\n",
2141 host->host_no, target);
2142}
2143
2144/*
2145 * XXX - do we want to go out of our way (ie, add extra code to selection
2146 * in the NCR53c710/NCR53c720 script) to reprogram the synchronous
2147 * conversion bits, or can we be content in just setting the
2148 * sxfer bits? I chose to do so [richard@sleepie.demon.co.uk]
2149 */
2150
2151/* Table for NCR53c8xx synchronous values */
2152
2153/* This table is also correct for 710, allowing that scf=4 is equivalent
2154 * of SSCF=0 (ie use DCNTL, divide by 3) for a 50.01-66.00MHz clock.
2155 * For any other clock values, we cannot use entries with SCF values of
2156 * 4. I guess that for a 66MHz clock, the slowest it will set is 2MHz,
2157 * and for a 50MHz clock, the slowest will be 2.27Mhz. Should check
2158 * that a device doesn't try and negotiate sync below these limits!
2159 */
2160
2161static const struct {
2162 int div; /* Total clock divisor * 10 */
2163 unsigned char scf; /* */
2164 unsigned char tp; /* 4 + tp = xferp divisor */
2165} syncs[] = {
2166/* div scf tp div scf tp div scf tp */
2167 { 40, 1, 0}, { 50, 1, 1}, { 60, 1, 2},
2168 { 70, 1, 3}, { 75, 2, 1}, { 80, 1, 4},
2169 { 90, 1, 5}, { 100, 1, 6}, { 105, 2, 3},
2170 { 110, 1, 7}, { 120, 2, 4}, { 135, 2, 5},
2171 { 140, 3, 3}, { 150, 2, 6}, { 160, 3, 4},
2172 { 165, 2, 7}, { 180, 3, 5}, { 200, 3, 6},
2173 { 210, 4, 3}, { 220, 3, 7}, { 240, 4, 4},
2174 { 270, 4, 5}, { 300, 4, 6}, { 330, 4, 7}
2175};
2176
2177/*
2178 * Function : static void synchronous (struct Scsi_Host *host, int target,
2179 * char *msg)
2180 *
2181 * Purpose : reprogram transfers between the selected SCSI initiator and
2182 * target for synchronous SCSI transfers such that the synchronous
2183 * offset is less than that requested and period at least as long
2184 * as that requested. Also modify *msg such that it contains
2185 * an appropriate response.
2186 *
2187 * Inputs : host - NCR53c7,8xx SCSI host, target - number SCSI target id,
2188 * msg - synchronous transfer request.
2189 */
2190
2191
2192static void
2193synchronous (struct Scsi_Host *host, int target, char *msg) {
2194 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
2195 host->hostdata[0];
2196 int desire, divisor, i, limit;
2197 unsigned char scntl3, sxfer;
2198/* The diagnostic message fits on one line, even with max. width integers */
2199 char buf[80];
2200
2201/* Desired transfer clock in Hz */
2202 desire = 1000000000L / (msg[3] * 4);
2203/* Scale the available SCSI clock by 10 so we get tenths */
2204 divisor = (hostdata->scsi_clock * 10) / desire;
2205
2206/* NCR chips can handle at most an offset of 8 */
2207 if (msg[4] > 8)
2208 msg[4] = 8;
2209
2210 if (hostdata->options & OPTION_DEBUG_SDTR)
2211 printk("scsi%d : optimal synchronous divisor of %d.%01d\n",
2212 host->host_no, divisor / 10, divisor % 10);
2213
2214 limit = ARRAY_SIZE(syncs) - 1;
2215 for (i = 0; (i < limit) && (divisor > syncs[i].div); ++i);
2216
2217 if (hostdata->options & OPTION_DEBUG_SDTR)
2218 printk("scsi%d : selected synchronous divisor of %d.%01d\n",
2219 host->host_no, syncs[i].div / 10, syncs[i].div % 10);
2220
2221 msg[3] = ((1000000000L / hostdata->scsi_clock) * syncs[i].div / 10 / 4);
2222
2223 if (hostdata->options & OPTION_DEBUG_SDTR)
2224 printk("scsi%d : selected synchronous period of %dns\n", host->host_no,
2225 msg[3] * 4);
2226
2227 scntl3 = syncs[i].scf;
2228 sxfer = (msg[4] << SXFER_MO_SHIFT) | (syncs[i].tp << 4);
2229 if (hostdata->options & OPTION_DEBUG_SDTR)
2230 printk ("scsi%d : sxfer=0x%x scntl3=0x%x\n",
2231 host->host_no, (int) sxfer, (int) scntl3);
2232 set_synchronous (host, target, sxfer, scntl3, 1);
2233 sprintf (buf, "scsi%d : setting target %d to ", host->host_no, target);
2234 print_synchronous (buf, msg);
2235}
2236
2237/*
2238 * Function : static int NCR53c7x0_dstat_sir_intr (struct Scsi_Host *host,
2239 * struct NCR53c7x0_cmd *cmd)
2240 *
2241 * Purpose : Handler for INT generated instructions for the
2242 * NCR53c810/820 SCSI SCRIPT
2243 *
2244 * Inputs : host - pointer to this host adapter's structure,
2245 * cmd - pointer to the command (if any) dsa was pointing
2246 * to.
2247 *
2248 */
2249
2250static int
2251NCR53c7x0_dstat_sir_intr (struct Scsi_Host *host, struct
2252 NCR53c7x0_cmd *cmd) {
2253 NCR53c7x0_local_declare();
2254 int print;
2255 Scsi_Cmnd *c = cmd ? cmd->cmd : NULL;
2256 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
2257 host->hostdata[0];
2258 u32 dsps,*dsp; /* Argument of the INT instruction */
2259
2260 NCR53c7x0_local_setup(host);
2261 dsps = NCR53c7x0_read32(DSPS_REG);
2262 dsp = (u32 *) bus_to_virt(NCR53c7x0_read32(DSP_REG));
2263
2264 /* RGH 150597: Frig. Commands which fail with Check Condition are
2265 * Flagged as successful - hack dsps to indicate check condition */
2266#if 0
2267 /* RGH 200597: Need to disable for BVME6000, as it gets Check Conditions
2268 * and then dies. Seems to handle Check Condition at startup, but
2269 * not mid kernel build. */
2270 if (dsps == A_int_norm_emulateintfly && cmd && cmd->result == 2)
2271 dsps = A_int_err_check_condition;
2272#endif
2273
2274 if (hostdata->options & OPTION_DEBUG_INTR)
2275 printk ("scsi%d : DSPS = 0x%x\n", host->host_no, dsps);
2276
2277 switch (dsps) {
2278 case A_int_msg_1:
2279 print = 1;
2280 switch (hostdata->msg_buf[0]) {
2281 /*
2282 * Unless we've initiated synchronous negotiation, I don't
2283 * think that this should happen.
2284 */
2285 case MESSAGE_REJECT:
2286 hostdata->dsp = hostdata->script + hostdata->E_accept_message /
2287 sizeof(u32);
2288 hostdata->dsp_changed = 1;
2289 if (cmd && (cmd->flags & CMD_FLAG_SDTR)) {
2290 printk ("scsi%d : target %d rejected SDTR\n", host->host_no,
2291 c->device->id);
2292 cmd->flags &= ~CMD_FLAG_SDTR;
2293 asynchronous (host, c->device->id);
2294 print = 0;
2295 }
2296 break;
2297 case INITIATE_RECOVERY:
2298 printk ("scsi%d : extended contingent allegiance not supported yet, rejecting\n",
2299 host->host_no);
2300 /* Fall through to default */
2301 hostdata->dsp = hostdata->script + hostdata->E_reject_message /
2302 sizeof(u32);
2303 hostdata->dsp_changed = 1;
2304 break;
2305 default:
2306 printk ("scsi%d : unsupported message, rejecting\n",
2307 host->host_no);
2308 hostdata->dsp = hostdata->script + hostdata->E_reject_message /
2309 sizeof(u32);
2310 hostdata->dsp_changed = 1;
2311 }
2312 if (print) {
2313 printk ("scsi%d : received message", host->host_no);
2314 if (c)
2315 printk (" from target %d lun %d ", c->device->id, c->device->lun);
2316 spi_print_msg((unsigned char *) hostdata->msg_buf);
2317 printk("\n");
2318 }
2319
2320 return SPECIFIC_INT_NOTHING;
2321
2322
2323 case A_int_msg_sdtr:
2324/*
2325 * At this point, hostdata->msg_buf contains
2326 * 0 EXTENDED MESSAGE
2327 * 1 length
2328 * 2 SDTR
2329 * 3 period * 4ns
2330 * 4 offset
2331 */
2332
2333 if (cmd) {
2334 char buf[80];
2335 sprintf (buf, "scsi%d : target %d %s ", host->host_no, c->device->id,
2336 (cmd->flags & CMD_FLAG_SDTR) ? "accepting" : "requesting");
2337 print_synchronous (buf, (unsigned char *) hostdata->msg_buf);
2338
2339 /*
2340 * Initiator initiated, won't happen unless synchronous
2341 * transfers are enabled. If we get a SDTR message in
2342 * response to our SDTR, we should program our parameters
2343 * such that
2344 * offset <= requested offset
2345 * period >= requested period
2346 */
2347 if (cmd->flags & CMD_FLAG_SDTR) {
2348 cmd->flags &= ~CMD_FLAG_SDTR;
2349 if (hostdata->msg_buf[4])
2350 synchronous (host, c->device->id, (unsigned char *)
2351 hostdata->msg_buf);
2352 else
2353 asynchronous (host, c->device->id);
2354 hostdata->dsp = hostdata->script + hostdata->E_accept_message /
2355 sizeof(u32);
2356 hostdata->dsp_changed = 1;
2357 return SPECIFIC_INT_NOTHING;
2358 } else {
2359 if (hostdata->options & OPTION_SYNCHRONOUS) {
2360 cmd->flags |= CMD_FLAG_DID_SDTR;
2361 synchronous (host, c->device->id, (unsigned char *)
2362 hostdata->msg_buf);
2363 } else {
2364 hostdata->msg_buf[4] = 0; /* 0 offset = async */
2365 asynchronous (host, c->device->id);
2366 }
2367 patch_dsa_32 (cmd->dsa, dsa_msgout_other, 0, 5);
2368 patch_dsa_32 (cmd->dsa, dsa_msgout_other, 1, (u32)
2369 virt_to_bus ((void *)&hostdata->msg_buf));
2370 hostdata->dsp = hostdata->script +
2371 hostdata->E_respond_message / sizeof(u32);
2372 hostdata->dsp_changed = 1;
2373 }
2374 return SPECIFIC_INT_NOTHING;
2375 }
2376 /* Fall through to abort if we couldn't find a cmd, and
2377 therefore a dsa structure to twiddle */
2378 case A_int_msg_wdtr:
2379 hostdata->dsp = hostdata->script + hostdata->E_reject_message /
2380 sizeof(u32);
2381 hostdata->dsp_changed = 1;
2382 return SPECIFIC_INT_NOTHING;
2383 case A_int_err_unexpected_phase:
2384 if (hostdata->options & OPTION_DEBUG_INTR)
2385 printk ("scsi%d : unexpected phase\n", host->host_no);
2386 return SPECIFIC_INT_ABORT;
2387 case A_int_err_selected:
2388 if ((hostdata->chip / 100) == 8)
2389 printk ("scsi%d : selected by target %d\n", host->host_no,
2390 (int) NCR53c7x0_read8(SDID_REG_800) &7);
2391 else
2392 printk ("scsi%d : selected by target LCRC=0x%02x\n", host->host_no,
2393 (int) NCR53c7x0_read8(LCRC_REG_10));
2394 hostdata->dsp = hostdata->script + hostdata->E_target_abort /
2395 sizeof(u32);
2396 hostdata->dsp_changed = 1;
2397 return SPECIFIC_INT_NOTHING;
2398 case A_int_err_unexpected_reselect:
2399 if ((hostdata->chip / 100) == 8)
2400 printk ("scsi%d : unexpected reselect by target %d lun %d\n",
2401 host->host_no, (int) NCR53c7x0_read8(SDID_REG_800) & 7,
2402 hostdata->reselected_identify & 7);
2403 else
2404 printk ("scsi%d : unexpected reselect LCRC=0x%02x\n", host->host_no,
2405 (int) NCR53c7x0_read8(LCRC_REG_10));
2406 hostdata->dsp = hostdata->script + hostdata->E_initiator_abort /
2407 sizeof(u32);
2408 hostdata->dsp_changed = 1;
2409 return SPECIFIC_INT_NOTHING;
2410/*
2411 * Since contingent allegiance conditions are cleared by the next
2412 * command issued to a target, we must issue a REQUEST SENSE
2413 * command after receiving a CHECK CONDITION status, before
2414 * another command is issued.
2415 *
2416 * Since this NCR53c7x0_cmd will be freed after use, we don't
2417 * care if we step on the various fields, so modify a few things.
2418 */
2419 case A_int_err_check_condition:
2420#if 0
2421 if (hostdata->options & OPTION_DEBUG_INTR)
2422#endif
2423 printk ("scsi%d : CHECK CONDITION\n", host->host_no);
2424 if (!c) {
2425 printk("scsi%d : CHECK CONDITION with no SCSI command\n",
2426 host->host_no);
2427 return SPECIFIC_INT_PANIC;
2428 }
2429
2430 /*
2431 * FIXME : this uses the normal one-byte selection message.
2432 * We may want to renegotiate for synchronous & WIDE transfers
2433 * since these could be the crux of our problem.
2434 *
2435 hostdata->NOP_insn* FIXME : once SCSI-II tagged queuing is implemented, we'll
2436 * have to set this up so that the rest of the DSA
2437 * agrees with this being an untagged queue'd command.
2438 */
2439
2440 patch_dsa_32 (cmd->dsa, dsa_msgout, 0, 1);
2441
2442 /*
2443 * Modify the table indirect for COMMAND OUT phase, since
2444 * Request Sense is a six byte command.
2445 */
2446
2447 patch_dsa_32 (cmd->dsa, dsa_cmdout, 0, 6);
2448
2449 /*
2450 * The CDB is now mirrored in our local non-cached
2451 * structure, but keep the old structure up to date as well,
2452 * just in case anyone looks at it.
2453 */
2454
2455 /*
2456 * XXX Need to worry about data buffer alignment/cache state
2457 * XXX here, but currently never get A_int_err_check_condition,
2458 * XXX so ignore problem for now.
2459 */
2460 cmd->cmnd[0] = c->cmnd[0] = REQUEST_SENSE;
2461 cmd->cmnd[0] = c->cmnd[1] &= 0xe0; /* Zero all but LUN */
2462 cmd->cmnd[0] = c->cmnd[2] = 0;
2463 cmd->cmnd[0] = c->cmnd[3] = 0;
2464 cmd->cmnd[0] = c->cmnd[4] = sizeof(c->sense_buffer);
2465 cmd->cmnd[0] = c->cmnd[5] = 0;
2466
2467 /*
2468 * Disable dataout phase, and program datain to transfer to the
2469 * sense buffer, and add a jump to other_transfer after the
2470 * command so overflow/underrun conditions are detected.
2471 */
2472
2473 patch_dsa_32 (cmd->dsa, dsa_dataout, 0,
2474 virt_to_bus(hostdata->script) + hostdata->E_other_transfer);
2475 patch_dsa_32 (cmd->dsa, dsa_datain, 0,
2476 virt_to_bus(cmd->data_transfer_start));
2477 cmd->data_transfer_start[0] = (((DCMD_TYPE_BMI | DCMD_BMI_OP_MOVE_I |
2478 DCMD_BMI_IO)) << 24) | sizeof(c->sense_buffer);
2479 cmd->data_transfer_start[1] = (u32) virt_to_bus(c->sense_buffer);
2480
2481 cmd->data_transfer_start[2] = ((DCMD_TYPE_TCI | DCMD_TCI_OP_JUMP)
2482 << 24) | DBC_TCI_TRUE;
2483 cmd->data_transfer_start[3] = (u32) virt_to_bus(hostdata->script) +
2484 hostdata->E_other_transfer;
2485
2486 /*
2487 * Currently, this command is flagged as completed, ie
2488 * it has valid status and message data. Reflag it as
2489 * incomplete. Q - need to do something so that original
2490 * status, etc are used.
2491 */
2492
2493 cmd->result = cmd->cmd->result = 0xffff;
2494
2495 /*
2496 * Restart command as a REQUEST SENSE.
2497 */
2498 hostdata->dsp = (u32 *) hostdata->script + hostdata->E_select /
2499 sizeof(u32);
2500 hostdata->dsp_changed = 1;
2501 return SPECIFIC_INT_NOTHING;
2502 case A_int_debug_break:
2503 return SPECIFIC_INT_BREAK;
2504 case A_int_norm_aborted:
2505 hostdata->dsp = (u32 *) hostdata->schedule;
2506 hostdata->dsp_changed = 1;
2507 if (cmd)
2508 abnormal_finished (cmd, DID_ERROR << 16);
2509 return SPECIFIC_INT_NOTHING;
2510 case A_int_norm_emulateintfly:
2511 NCR53c7x0_intfly(host);
2512 return SPECIFIC_INT_NOTHING;
2513 case A_int_test_1:
2514 case A_int_test_2:
2515 hostdata->idle = 1;
2516 hostdata->test_completed = (dsps - A_int_test_1) / 0x00010000 + 1;
2517 if (hostdata->options & OPTION_DEBUG_INTR)
2518 printk("scsi%d : test%d complete\n", host->host_no,
2519 hostdata->test_completed);
2520 return SPECIFIC_INT_NOTHING;
2521#ifdef A_int_debug_reselected_ok
2522 case A_int_debug_reselected_ok:
2523 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR|
2524 OPTION_DEBUG_DISCONNECT)) {
2525 /*
2526 * Note - this dsa is not based on location relative to
2527 * the command structure, but to location relative to the
2528 * DSA register
2529 */
2530 u32 *dsa;
2531 dsa = (u32 *) bus_to_virt (NCR53c7x0_read32(DSA_REG));
2532
2533 printk("scsi%d : reselected_ok (DSA = 0x%x (virt 0x%p)\n",
2534 host->host_no, NCR53c7x0_read32(DSA_REG), dsa);
2535 printk("scsi%d : resume address is 0x%x (virt 0x%p)\n",
2536 host->host_no, cmd->saved_data_pointer,
2537 bus_to_virt(cmd->saved_data_pointer));
2538 print_insn (host, hostdata->script + Ent_reselected_ok /
2539 sizeof(u32), "", 1);
2540 if ((hostdata->chip / 100) == 8)
2541 printk ("scsi%d : sxfer=0x%x, scntl3=0x%x\n",
2542 host->host_no, NCR53c7x0_read8(SXFER_REG),
2543 NCR53c7x0_read8(SCNTL3_REG_800));
2544 else
2545 printk ("scsi%d : sxfer=0x%x, cannot read SBCL\n",
2546 host->host_no, NCR53c7x0_read8(SXFER_REG));
2547 if (c) {
2548 print_insn (host, (u32 *)
2549 hostdata->sync[c->device->id].script, "", 1);
2550 print_insn (host, (u32 *)
2551 hostdata->sync[c->device->id].script + 2, "", 1);
2552 }
2553 }
2554 return SPECIFIC_INT_RESTART;
2555#endif
2556#ifdef A_int_debug_reselect_check
2557 case A_int_debug_reselect_check:
2558 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR)) {
2559 u32 *dsa;
2560#if 0
2561 u32 *code;
2562#endif
2563 /*
2564 * Note - this dsa is not based on location relative to
2565 * the command structure, but to location relative to the
2566 * DSA register
2567 */
2568 dsa = bus_to_virt (NCR53c7x0_read32(DSA_REG));
2569 printk("scsi%d : reselected_check_next (DSA = 0x%lx (virt 0x%p))\n",
2570 host->host_no, virt_to_bus(dsa), dsa);
2571 if (dsa) {
2572 printk("scsi%d : resume address is 0x%x (virt 0x%p)\n",
2573 host->host_no, cmd->saved_data_pointer,
2574 bus_to_virt (cmd->saved_data_pointer));
2575#if 0
2576 printk("scsi%d : template code :\n", host->host_no);
2577 for (code = dsa + (Ent_dsa_code_check_reselect - Ent_dsa_zero)
2578 / sizeof(u32); code < (dsa + Ent_dsa_zero / sizeof(u32));
2579 code += print_insn (host, code, "", 1));
2580#endif
2581 }
2582 print_insn (host, hostdata->script + Ent_reselected_ok /
2583 sizeof(u32), "", 1);
2584 }
2585 return SPECIFIC_INT_RESTART;
2586#endif
2587#ifdef A_int_debug_dsa_schedule
2588 case A_int_debug_dsa_schedule:
2589 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR)) {
2590 u32 *dsa;
2591 /*
2592 * Note - this dsa is not based on location relative to
2593 * the command structure, but to location relative to the
2594 * DSA register
2595 */
2596 dsa = (u32 *) bus_to_virt (NCR53c7x0_read32(DSA_REG));
2597 printk("scsi%d : dsa_schedule (old DSA = 0x%lx (virt 0x%p))\n",
2598 host->host_no, virt_to_bus(dsa), dsa);
2599 if (dsa)
2600 printk("scsi%d : resume address is 0x%x (virt 0x%p)\n"
2601 " (temp was 0x%x (virt 0x%p))\n",
2602 host->host_no, cmd->saved_data_pointer,
2603 bus_to_virt (cmd->saved_data_pointer),
2604 NCR53c7x0_read32 (TEMP_REG),
2605 bus_to_virt (NCR53c7x0_read32(TEMP_REG)));
2606 }
2607 return SPECIFIC_INT_RESTART;
2608#endif
2609#ifdef A_int_debug_scheduled
2610 case A_int_debug_scheduled:
2611 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR)) {
2612 printk("scsi%d : new I/O 0x%x (virt 0x%p) scheduled\n",
2613 host->host_no, NCR53c7x0_read32(DSA_REG),
2614 bus_to_virt(NCR53c7x0_read32(DSA_REG)));
2615 }
2616 return SPECIFIC_INT_RESTART;
2617#endif
2618#ifdef A_int_debug_idle
2619 case A_int_debug_idle:
2620 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR)) {
2621 printk("scsi%d : idle\n", host->host_no);
2622 }
2623 return SPECIFIC_INT_RESTART;
2624#endif
2625#ifdef A_int_debug_cmd
2626 case A_int_debug_cmd:
2627 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR)) {
2628 printk("scsi%d : command sent\n");
2629 }
2630 return SPECIFIC_INT_RESTART;
2631#endif
2632#ifdef A_int_debug_dsa_loaded
2633 case A_int_debug_dsa_loaded:
2634 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR)) {
2635 printk("scsi%d : DSA loaded with 0x%x (virt 0x%p)\n", host->host_no,
2636 NCR53c7x0_read32(DSA_REG),
2637 bus_to_virt(NCR53c7x0_read32(DSA_REG)));
2638 }
2639 return SPECIFIC_INT_RESTART;
2640#endif
2641#ifdef A_int_debug_reselected
2642 case A_int_debug_reselected:
2643 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR|
2644 OPTION_DEBUG_DISCONNECT)) {
2645 if ((hostdata->chip / 100) == 8)
2646 printk("scsi%d : reselected by target %d lun %d\n",
2647 host->host_no, (int) NCR53c7x0_read8(SDID_REG_800) & ~0x80,
2648 (int) hostdata->reselected_identify & 7);
2649 else
2650 printk("scsi%d : reselected by LCRC=0x%02x lun %d\n",
2651 host->host_no, (int) NCR53c7x0_read8(LCRC_REG_10),
2652 (int) hostdata->reselected_identify & 7);
2653 print_queues(host);
2654 }
2655 return SPECIFIC_INT_RESTART;
2656#endif
2657#ifdef A_int_debug_disconnect_msg
2658 case A_int_debug_disconnect_msg:
2659 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR)) {
2660 if (c)
2661 printk("scsi%d : target %d lun %d disconnecting\n",
2662 host->host_no, c->device->id, c->device->lun);
2663 else
2664 printk("scsi%d : unknown target disconnecting\n",
2665 host->host_no);
2666 }
2667 return SPECIFIC_INT_RESTART;
2668#endif
2669#ifdef A_int_debug_disconnected
2670 case A_int_debug_disconnected:
2671 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR|
2672 OPTION_DEBUG_DISCONNECT)) {
2673 printk ("scsi%d : disconnected, new queues are\n",
2674 host->host_no);
2675 print_queues(host);
2676#if 0
2677 /* Not valid on ncr53c710! */
2678 printk ("scsi%d : sxfer=0x%x, scntl3=0x%x\n",
2679 host->host_no, NCR53c7x0_read8(SXFER_REG),
2680 NCR53c7x0_read8(SCNTL3_REG_800));
2681#endif
2682 if (c) {
2683 print_insn (host, (u32 *)
2684 hostdata->sync[c->device->id].script, "", 1);
2685 print_insn (host, (u32 *)
2686 hostdata->sync[c->device->id].script + 2, "", 1);
2687 }
2688 }
2689 return SPECIFIC_INT_RESTART;
2690#endif
2691#ifdef A_int_debug_panic
2692 case A_int_debug_panic:
2693 printk("scsi%d : int_debug_panic received\n", host->host_no);
2694 print_lots (host);
2695 return SPECIFIC_INT_PANIC;
2696#endif
2697#ifdef A_int_debug_saved
2698 case A_int_debug_saved:
2699 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR|
2700 OPTION_DEBUG_DISCONNECT)) {
2701 printk ("scsi%d : saved data pointer 0x%x (virt 0x%p)\n",
2702 host->host_no, cmd->saved_data_pointer,
2703 bus_to_virt (cmd->saved_data_pointer));
2704 print_progress (c);
2705 }
2706 return SPECIFIC_INT_RESTART;
2707#endif
2708#ifdef A_int_debug_restored
2709 case A_int_debug_restored:
2710 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR|
2711 OPTION_DEBUG_DISCONNECT)) {
2712 if (cmd) {
2713 int size;
2714 printk ("scsi%d : restored data pointer 0x%x (virt 0x%p)\n",
2715 host->host_no, cmd->saved_data_pointer, bus_to_virt (
2716 cmd->saved_data_pointer));
2717 size = print_insn (host, (u32 *)
2718 bus_to_virt(cmd->saved_data_pointer), "", 1);
2719 size = print_insn (host, (u32 *)
2720 bus_to_virt(cmd->saved_data_pointer) + size, "", 1);
2721 print_progress (c);
2722 }
2723#if 0
2724 printk ("scsi%d : datapath residual %d\n",
2725 host->host_no, datapath_residual (host)) ;
2726#endif
2727 }
2728 return SPECIFIC_INT_RESTART;
2729#endif
2730#ifdef A_int_debug_sync
2731 case A_int_debug_sync:
2732 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR|
2733 OPTION_DEBUG_DISCONNECT|OPTION_DEBUG_SDTR)) {
2734 unsigned char sxfer = NCR53c7x0_read8 (SXFER_REG), scntl3;
2735 if ((hostdata->chip / 100) == 8) {
2736 scntl3 = NCR53c7x0_read8 (SCNTL3_REG_800);
2737 if (c) {
2738 if (sxfer != hostdata->sync[c->device->id].sxfer_sanity ||
2739 scntl3 != hostdata->sync[c->device->id].scntl3_sanity) {
2740 printk ("scsi%d : sync sanity check failed sxfer=0x%x, scntl3=0x%x",
2741 host->host_no, sxfer, scntl3);
2742 NCR53c7x0_write8 (SXFER_REG, sxfer);
2743 NCR53c7x0_write8 (SCNTL3_REG_800, scntl3);
2744 }
2745 } else
2746 printk ("scsi%d : unknown command sxfer=0x%x, scntl3=0x%x\n",
2747 host->host_no, (int) sxfer, (int) scntl3);
2748 } else {
2749 if (c) {
2750 if (sxfer != hostdata->sync[c->device->id].sxfer_sanity) {
2751 printk ("scsi%d : sync sanity check failed sxfer=0x%x",
2752 host->host_no, sxfer);
2753 NCR53c7x0_write8 (SXFER_REG, sxfer);
2754 NCR53c7x0_write8 (SBCL_REG,
2755 hostdata->sync[c->device->id].sscf_710);
2756 }
2757 } else
2758 printk ("scsi%d : unknown command sxfer=0x%x\n",
2759 host->host_no, (int) sxfer);
2760 }
2761 }
2762 return SPECIFIC_INT_RESTART;
2763#endif
2764#ifdef A_int_debug_datain
2765 case A_int_debug_datain:
2766 if (hostdata->options & (OPTION_DEBUG_SCRIPT|OPTION_DEBUG_INTR|
2767 OPTION_DEBUG_DISCONNECT|OPTION_DEBUG_SDTR)) {
2768 int size;
2769 if ((hostdata->chip / 100) == 8)
2770 printk ("scsi%d : In do_datain (%s) sxfer=0x%x, scntl3=0x%x\n"
2771 " datapath residual=%d\n",
2772 host->host_no, sbcl_to_phase (NCR53c7x0_read8 (SBCL_REG)),
2773 (int) NCR53c7x0_read8(SXFER_REG),
2774 (int) NCR53c7x0_read8(SCNTL3_REG_800),
2775 datapath_residual (host)) ;
2776 else
2777 printk ("scsi%d : In do_datain (%s) sxfer=0x%x\n"
2778 " datapath residual=%d\n",
2779 host->host_no, sbcl_to_phase (NCR53c7x0_read8 (SBCL_REG)),
2780 (int) NCR53c7x0_read8(SXFER_REG),
2781 datapath_residual (host)) ;
2782 print_insn (host, dsp, "", 1);
2783 size = print_insn (host, (u32 *) bus_to_virt(dsp[1]), "", 1);
2784 print_insn (host, (u32 *) bus_to_virt(dsp[1]) + size, "", 1);
2785 }
2786 return SPECIFIC_INT_RESTART;
2787#endif
2788#ifdef A_int_debug_check_dsa
2789 case A_int_debug_check_dsa:
2790 if (NCR53c7x0_read8 (SCNTL1_REG) & SCNTL1_CON) {
2791 int sdid;
2792 int tmp;
2793 char *where;
2794 if (hostdata->chip / 100 == 8)
2795 sdid = NCR53c7x0_read8 (SDID_REG_800) & 15;
2796 else {
2797 tmp = NCR53c7x0_read8 (SDID_REG_700);
2798 if (!tmp)
2799 panic ("SDID_REG_700 = 0");
2800 tmp >>= 1;
2801 sdid = 0;
2802 while (tmp) {
2803 tmp >>= 1;
2804 sdid++;
2805 }
2806 }
2807 where = dsp - NCR53c7x0_insn_size(NCR53c7x0_read8
2808 (DCMD_REG)) == hostdata->script +
2809 Ent_select_check_dsa / sizeof(u32) ?
2810 "selection" : "reselection";
2811 if (c && sdid != c->device->id) {
2812 printk ("scsi%d : SDID target %d != DSA target %d at %s\n",
2813 host->host_no, sdid, c->device->id, where);
2814 print_lots(host);
2815 dump_events (host, 20);
2816 return SPECIFIC_INT_PANIC;
2817 }
2818 }
2819 return SPECIFIC_INT_RESTART;
2820#endif
2821 default:
2822 if ((dsps & 0xff000000) == 0x03000000) {
2823 printk ("scsi%d : misc debug interrupt 0x%x\n",
2824 host->host_no, dsps);
2825 return SPECIFIC_INT_RESTART;
2826 } else if ((dsps & 0xff000000) == 0x05000000) {
2827 if (hostdata->events) {
2828 struct NCR53c7x0_event *event;
2829 ++hostdata->event_index;
2830 if (hostdata->event_index >= hostdata->event_size)
2831 hostdata->event_index = 0;
2832 event = (struct NCR53c7x0_event *) hostdata->events +
2833 hostdata->event_index;
2834 event->event = (enum ncr_event) dsps;
2835 event->dsa = bus_to_virt(NCR53c7x0_read32(DSA_REG));
2836 if (NCR53c7x0_read8 (SCNTL1_REG) & SCNTL1_CON) {
2837 if (hostdata->chip / 100 == 8)
2838 event->target = NCR53c7x0_read8(SSID_REG_800);
2839 else {
2840 unsigned char tmp, sdid;
2841 tmp = NCR53c7x0_read8 (SDID_REG_700);
2842 if (!tmp)
2843 panic ("SDID_REG_700 = 0");
2844 tmp >>= 1;
2845 sdid = 0;
2846 while (tmp) {
2847 tmp >>= 1;
2848 sdid++;
2849 }
2850 event->target = sdid;
2851 }
2852 }
2853 else
2854 event->target = 255;
2855
2856 if (event->event == EVENT_RESELECT)
2857 event->lun = hostdata->reselected_identify & 0xf;
2858 else if (c)
2859 event->lun = c->device->lun;
2860 else
2861 event->lun = 255;
2862 do_gettimeofday(&(event->time));
2863 if (c) {
2864 event->pid = c->pid;
2865 memcpy ((void *) event->cmnd, (void *) c->cmnd,
2866 sizeof (event->cmnd));
2867 } else {
2868 event->pid = -1;
2869 }
2870 }
2871 return SPECIFIC_INT_RESTART;
2872 }
2873
2874 printk ("scsi%d : unknown user interrupt 0x%x\n",
2875 host->host_no, (unsigned) dsps);
2876 return SPECIFIC_INT_PANIC;
2877 }
2878}
2879
2880/*
2881 * XXX - the stock NCR assembler won't output the scriptu.h file,
2882 * which undefine's all #define'd CPP symbols from the script.h
2883 * file, which will create problems if you use multiple scripts
2884 * with the same symbol names.
2885 *
2886 * If you insist on using NCR's assembler, you could generate
2887 * scriptu.h from script.h using something like
2888 *
2889 * grep #define script.h | \
2890 * sed 's/#define[ ][ ]*\([_a-zA-Z][_a-zA-Z0-9]*\).*$/#undefine \1/' \
2891 * > scriptu.h
2892 */
2893
2894#include "53c7xx_u.h"
2895
2896/* XXX - add alternate script handling code here */
2897
2898
2899/*
2900 * Function : static void NCR537xx_soft_reset (struct Scsi_Host *host)
2901 *
2902 * Purpose : perform a soft reset of the NCR53c7xx chip
2903 *
2904 * Inputs : host - pointer to this host adapter's structure
2905 *
2906 * Preconditions : NCR53c7x0_init must have been called for this
2907 * host.
2908 *
2909 */
2910
2911static void
2912NCR53c7x0_soft_reset (struct Scsi_Host *host) {
2913 NCR53c7x0_local_declare();
2914 unsigned long flags;
2915 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
2916 host->hostdata[0];
2917 NCR53c7x0_local_setup(host);
2918
2919 local_irq_save(flags);
2920
2921 /* Disable scsi chip and s/w level 7 ints */
2922
2923#ifdef CONFIG_MVME16x
2924 if (MACH_IS_MVME16x)
2925 {
2926 volatile unsigned long v;
2927
2928 v = *(volatile unsigned long *)0xfff4006c;
2929 v &= ~0x8000;
2930 *(volatile unsigned long *)0xfff4006c = v;
2931 v = *(volatile unsigned long *)0xfff4202c;
2932 v &= ~0x10;
2933 *(volatile unsigned long *)0xfff4202c = v;
2934 }
2935#endif
2936 /* Anything specific for your hardware? */
2937
2938 /*
2939 * Do a soft reset of the chip so that everything is
2940 * reinitialized to the power-on state.
2941 *
2942 * Basically follow the procedure outlined in the NCR53c700
2943 * data manual under Chapter Six, How to Use, Steps Necessary to
2944 * Start SCRIPTS, with the exception of actually starting the
2945 * script and setting up the synchronous transfer gunk.
2946 */
2947
2948 /* Should we reset the scsi bus here??????????????????? */
2949
2950 NCR53c7x0_write8(ISTAT_REG_700, ISTAT_10_SRST);
2951 NCR53c7x0_write8(ISTAT_REG_700, 0);
2952
2953 /*
2954 * saved_dcntl is set up in NCR53c7x0_init() before it is overwritten
2955 * here. We should have some better way of working out the CF bit
2956 * setting..
2957 */
2958
2959 hostdata->saved_dcntl = DCNTL_10_EA|DCNTL_10_COM;
2960 if (hostdata->scsi_clock > 50000000)
2961 hostdata->saved_dcntl |= DCNTL_700_CF_3;
2962 else
2963 if (hostdata->scsi_clock > 37500000)
2964 hostdata->saved_dcntl |= DCNTL_700_CF_2;
2965#if 0
2966 else
2967 /* Any clocks less than 37.5MHz? */
2968#endif
2969
2970 if (hostdata->options & OPTION_DEBUG_TRACE)
2971 NCR53c7x0_write8(DCNTL_REG, hostdata->saved_dcntl | DCNTL_SSM);
2972 else
2973 NCR53c7x0_write8(DCNTL_REG, hostdata->saved_dcntl);
2974 /* Following disables snooping - snooping is not required, as non-
2975 * cached pages are used for shared data, and appropriate use is
2976 * made of cache_push/cache_clear. Indeed, for 68060
2977 * enabling snooping causes disk corruption of ext2fs free block
2978 * bitmaps and the like. If you have a 68060 with snooping hardwared
2979 * on, then you need to enable CONFIG_060_WRITETHROUGH.
2980 */
2981 NCR53c7x0_write8(CTEST7_REG, CTEST7_10_TT1|CTEST7_STD);
2982 /* Actually burst of eight, according to my 53c710 databook */
2983 NCR53c7x0_write8(hostdata->dmode, DMODE_10_BL_8 | DMODE_10_FC2);
2984 NCR53c7x0_write8(SCID_REG, 1 << host->this_id);
2985 NCR53c7x0_write8(SBCL_REG, 0);
2986 NCR53c7x0_write8(SCNTL1_REG, SCNTL1_ESR_700);
2987 NCR53c7x0_write8(SCNTL0_REG, ((hostdata->options & OPTION_PARITY) ?
2988 SCNTL0_EPC : 0) | SCNTL0_EPG_700 | SCNTL0_ARB1 | SCNTL0_ARB2);
2989
2990 /*
2991 * Enable all interrupts, except parity which we only want when
2992 * the user requests it.
2993 */
2994
2995 NCR53c7x0_write8(DIEN_REG, DIEN_700_BF |
2996 DIEN_ABRT | DIEN_SSI | DIEN_SIR | DIEN_700_OPC);
2997
2998 NCR53c7x0_write8(SIEN_REG_700, ((hostdata->options & OPTION_PARITY) ?
2999 SIEN_PAR : 0) | SIEN_700_STO | SIEN_RST | SIEN_UDC |
3000 SIEN_SGE | SIEN_MA);
3001
3002#ifdef CONFIG_MVME16x
3003 if (MACH_IS_MVME16x)
3004 {
3005 volatile unsigned long v;
3006
3007 /* Enable scsi chip and s/w level 7 ints */
3008 v = *(volatile unsigned long *)0xfff40080;
3009 v = (v & ~(0xf << 28)) | (4 << 28);
3010 *(volatile unsigned long *)0xfff40080 = v;
3011 v = *(volatile unsigned long *)0xfff4006c;
3012 v |= 0x8000;
3013 *(volatile unsigned long *)0xfff4006c = v;
3014 v = *(volatile unsigned long *)0xfff4202c;
3015 v = (v & ~0xff) | 0x10 | 4;
3016 *(volatile unsigned long *)0xfff4202c = v;
3017 }
3018#endif
3019 /* Anything needed for your hardware? */
3020 local_irq_restore(flags);
3021}
3022
3023
3024/*
3025 * Function static struct NCR53c7x0_cmd *allocate_cmd (Scsi_Cmnd *cmd)
3026 *
3027 * Purpose : Return the first free NCR53c7x0_cmd structure (which are
3028 * reused in a LIFO manner to minimize cache thrashing).
3029 *
3030 * Side effects : If we haven't yet scheduled allocation of NCR53c7x0_cmd
3031 * structures for this device, do so. Attempt to complete all scheduled
3032 * allocations using get_zeroed_page(), putting NCR53c7x0_cmd structures on
3033 * the free list. Teach programmers not to drink and hack.
3034 *
3035 * Inputs : cmd - SCSI command
3036 *
3037 * Returns : NCR53c7x0_cmd structure allocated on behalf of cmd;
3038 * NULL on failure.
3039 */
3040
3041static void
3042my_free_page (void *addr, int dummy)
3043{
3044 /* XXX This assumes default cache mode to be IOMAP_FULL_CACHING, which
3045 * XXX may be invalid (CONFIG_060_WRITETHROUGH)
3046 */
3047 kernel_set_cachemode((void *)addr, 4096, IOMAP_FULL_CACHING);
3048 free_page ((u32)addr);
3049}
3050
3051static struct NCR53c7x0_cmd *
3052allocate_cmd (Scsi_Cmnd *cmd) {
3053 struct Scsi_Host *host = cmd->device->host;
3054 struct NCR53c7x0_hostdata *hostdata =
3055 (struct NCR53c7x0_hostdata *) host->hostdata[0];
3056 u32 real; /* Real address */
3057 int size; /* Size of *tmp */
3058 struct NCR53c7x0_cmd *tmp;
3059 unsigned long flags;
3060
3061 if (hostdata->options & OPTION_DEBUG_ALLOCATION)
3062 printk ("scsi%d : num_cmds = %d, can_queue = %d\n"
3063 " target = %d, lun = %d, %s\n",
3064 host->host_no, hostdata->num_cmds, host->can_queue,
3065 cmd->device->id, cmd->device->lun, (hostdata->cmd_allocated[cmd->device->id] &
3066 (1 << cmd->device->lun)) ? "already allocated" : "not allocated");
3067
3068/*
3069 * If we have not yet reserved commands for this I_T_L nexus, and
3070 * the device exists (as indicated by permanent Scsi_Cmnd structures
3071 * being allocated under 1.3.x, or being outside of scan_scsis in
3072 * 1.2.x), do so now.
3073 */
3074 if (!(hostdata->cmd_allocated[cmd->device->id] & (1 << cmd->device->lun)) &&
3075 cmd->device && cmd->device->has_cmdblocks) {
3076 if ((hostdata->extra_allocate + hostdata->num_cmds) < host->can_queue)
3077 hostdata->extra_allocate += host->cmd_per_lun;
3078 hostdata->cmd_allocated[cmd->device->id] |= (1 << cmd->device->lun);
3079 }
3080
3081 for (; hostdata->extra_allocate > 0 ; --hostdata->extra_allocate,
3082 ++hostdata->num_cmds) {
3083 /* historically, kmalloc has returned unaligned addresses; pad so we
3084 have enough room to ROUNDUP */
3085 size = hostdata->max_cmd_size + sizeof (void *);
3086#ifdef FORCE_DSA_ALIGNMENT
3087 /*
3088 * 53c710 rev.0 doesn't have an add-with-carry instruction.
3089 * Ensure we allocate enough memory to force alignment.
3090 */
3091 size += 256;
3092#endif
3093/* FIXME: for ISA bus '7xx chips, we need to or GFP_DMA in here */
3094
3095 if (size > 4096) {
3096 printk (KERN_ERR "53c7xx: allocate_cmd size > 4K\n");
3097 return NULL;
3098 }
3099 real = get_zeroed_page(GFP_ATOMIC);
3100 if (real == 0)
3101 return NULL;
3102 cache_push(virt_to_phys((void *)real), 4096);
3103 cache_clear(virt_to_phys((void *)real), 4096);
3104 kernel_set_cachemode((void *)real, 4096, IOMAP_NOCACHE_SER);
3105 tmp = ROUNDUP(real, void *);
3106#ifdef FORCE_DSA_ALIGNMENT
3107 {
3108 if (((u32)tmp & 0xff) > CmdPageStart)
3109 tmp = (struct NCR53c7x0_cmd *)((u32)tmp + 255);
3110 tmp = (struct NCR53c7x0_cmd *)(((u32)tmp & ~0xff) + CmdPageStart);
3111#if 0
3112 printk ("scsi: size = %d, real = 0x%08x, tmp set to 0x%08x\n",
3113 size, real, (u32)tmp);
3114#endif
3115 }
3116#endif
3117 tmp->real = (void *)real;
3118 tmp->size = size;
3119 tmp->free = ((void (*)(void *, int)) my_free_page);
3120 local_irq_save(flags);
3121 tmp->next = hostdata->free;
3122 hostdata->free = tmp;
3123 local_irq_restore(flags);
3124 }
3125 local_irq_save(flags);
3126 tmp = (struct NCR53c7x0_cmd *) hostdata->free;
3127 if (tmp) {
3128 hostdata->free = tmp->next;
3129 }
3130 local_irq_restore(flags);
3131 if (!tmp)
3132 printk ("scsi%d : can't allocate command for target %d lun %d\n",
3133 host->host_no, cmd->device->id, cmd->device->lun);
3134 return tmp;
3135}
3136
3137/*
3138 * Function static struct NCR53c7x0_cmd *create_cmd (Scsi_Cmnd *cmd)
3139 *
3140 *
3141 * Purpose : allocate a NCR53c7x0_cmd structure, initialize it based on the
3142 * Scsi_Cmnd structure passed in cmd, including dsa and Linux field
3143 * initialization, and dsa code relocation.
3144 *
3145 * Inputs : cmd - SCSI command
3146 *
3147 * Returns : NCR53c7x0_cmd structure corresponding to cmd,
3148 * NULL on failure.
3149 */
3150static struct NCR53c7x0_cmd *
3151create_cmd (Scsi_Cmnd *cmd) {
3152 NCR53c7x0_local_declare();
3153 struct Scsi_Host *host = cmd->device->host;
3154 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
3155 host->hostdata[0];
3156 struct NCR53c7x0_cmd *tmp; /* NCR53c7x0_cmd structure for this command */
3157 int datain, /* Number of instructions per phase */
3158 dataout;
3159 int data_transfer_instructions, /* Count of dynamic instructions */
3160 i; /* Counter */
3161 u32 *cmd_datain, /* Address of datain/dataout code */
3162 *cmd_dataout; /* Incremented as we assemble */
3163#ifdef notyet
3164 unsigned char *msgptr; /* Current byte in select message */
3165 int msglen; /* Length of whole select message */
3166#endif
3167 unsigned long flags;
3168 u32 exp_select_indirect; /* Used in sanity check */
3169 NCR53c7x0_local_setup(cmd->device->host);
3170
3171 if (!(tmp = allocate_cmd (cmd)))
3172 return NULL;
3173
3174 /*
3175 * Copy CDB and initialised result fields from Scsi_Cmnd to NCR53c7x0_cmd.
3176 * We do this because NCR53c7x0_cmd may have a special cache mode
3177 * selected to cope with lack of bus snooping, etc.
3178 */
3179
3180 memcpy(tmp->cmnd, cmd->cmnd, 12);
3181 tmp->result = cmd->result;
3182
3183 /*
3184 * Decide whether we need to generate commands for DATA IN,
3185 * DATA OUT, neither, or both based on the SCSI command
3186 */
3187
3188 switch (cmd->cmnd[0]) {
3189 /* These commands do DATA IN */
3190 case INQUIRY:
3191 case MODE_SENSE:
3192 case READ_6:
3193 case READ_10:
3194 case READ_CAPACITY:
3195 case REQUEST_SENSE:
3196 case READ_BLOCK_LIMITS:
3197 case READ_TOC:
3198 datain = 2 * (cmd->use_sg ? cmd->use_sg : 1) + 3;
3199 dataout = 0;
3200 break;
3201 /* These commands do DATA OUT */
3202 case MODE_SELECT:
3203 case WRITE_6:
3204 case WRITE_10:
3205#if 0
3206 printk("scsi%d : command is ", host->host_no);
3207 __scsi_print_command(cmd->cmnd);
3208#endif
3209#if 0
3210 printk ("scsi%d : %d scatter/gather segments\n", host->host_no,
3211 cmd->use_sg);
3212#endif
3213 datain = 0;
3214 dataout = 2 * (cmd->use_sg ? cmd->use_sg : 1) + 3;
3215#if 0
3216 hostdata->options |= OPTION_DEBUG_INTR;
3217#endif
3218 break;
3219 /*
3220 * These commands do no data transfer, we should force an
3221 * interrupt if a data phase is attempted on them.
3222 */
3223 case TEST_UNIT_READY:
3224 case ALLOW_MEDIUM_REMOVAL:
3225 case START_STOP:
3226 datain = dataout = 0;
3227 break;
3228 /*
3229 * We don't know about these commands, so generate code to handle
3230 * both DATA IN and DATA OUT phases. More efficient to identify them
3231 * and add them to the above cases.
3232 */
3233 default:
3234 printk("scsi%d : datain+dataout for command ", host->host_no);
3235 __scsi_print_command(cmd->cmnd);
3236 datain = dataout = 2 * (cmd->use_sg ? cmd->use_sg : 1) + 3;
3237 }
3238
3239 /*
3240 * New code : so that active pointers work correctly regardless
3241 * of where the saved data pointer is at, we want to immediately
3242 * enter the dynamic code after selection, and on a non-data
3243 * phase perform a CALL to the non-data phase handler, with
3244 * returns back to this address.
3245 *
3246 * If a phase mismatch is encountered in the middle of a
3247 * Block MOVE instruction, we want to _leave_ that instruction
3248 * unchanged as the current case is, modify a temporary buffer,
3249 * and point the active pointer (TEMP) at that.
3250 *
3251 * Furthermore, we want to implement a saved data pointer,
3252 * set by the SAVE_DATA_POINTERs message.
3253 *
3254 * So, the data transfer segments will change to
3255 * CALL data_transfer, WHEN NOT data phase
3256 * MOVE x, x, WHEN data phase
3257 * ( repeat )
3258 * JUMP other_transfer
3259 */
3260
3261 data_transfer_instructions = datain + dataout;
3262
3263 /*
3264 * When we perform a request sense, we overwrite various things,
3265 * including the data transfer code. Make sure we have enough
3266 * space to do that.
3267 */
3268
3269 if (data_transfer_instructions < 2)
3270 data_transfer_instructions = 2;
3271
3272
3273 /*
3274 * The saved data pointer is set up so that a RESTORE POINTERS message
3275 * will start the data transfer over at the beginning.
3276 */
3277
3278 tmp->saved_data_pointer = virt_to_bus (hostdata->script) +
3279 hostdata->E_data_transfer;
3280
3281 /*
3282 * Initialize Linux specific fields.
3283 */
3284
3285 tmp->cmd = cmd;
3286 tmp->next = NULL;
3287 tmp->flags = 0;
3288 tmp->dsa_next_addr = virt_to_bus(tmp->dsa) + hostdata->dsa_next -
3289 hostdata->dsa_start;
3290 tmp->dsa_addr = virt_to_bus(tmp->dsa) - hostdata->dsa_start;
3291
3292 /*
3293 * Calculate addresses of dynamic code to fill in DSA
3294 */
3295
3296 tmp->data_transfer_start = tmp->dsa + (hostdata->dsa_end -
3297 hostdata->dsa_start) / sizeof(u32);
3298 tmp->data_transfer_end = tmp->data_transfer_start +
3299 2 * data_transfer_instructions;
3300
3301 cmd_datain = datain ? tmp->data_transfer_start : NULL;
3302 cmd_dataout = dataout ? (datain ? cmd_datain + 2 * datain : tmp->
3303 data_transfer_start) : NULL;
3304
3305 /*
3306 * Fill in the NCR53c7x0_cmd structure as follows
3307 * dsa, with fixed up DSA code
3308 * datain code
3309 * dataout code
3310 */
3311
3312 /* Copy template code into dsa and perform all necessary fixups */
3313 if (hostdata->dsa_fixup)
3314 hostdata->dsa_fixup(tmp);
3315
3316 patch_dsa_32(tmp->dsa, dsa_next, 0, 0);
3317 /*
3318 * XXX is this giving 53c710 access to the Scsi_Cmnd in some way?
3319 * Do we need to change it for caching reasons?
3320 */
3321 patch_dsa_32(tmp->dsa, dsa_cmnd, 0, virt_to_bus(cmd));
3322
3323 if (hostdata->options & OPTION_DEBUG_SYNCHRONOUS) {
3324
3325 exp_select_indirect = ((1 << cmd->device->id) << 16) |
3326 (hostdata->sync[cmd->device->id].sxfer_sanity << 8);
3327
3328 if (hostdata->sync[cmd->device->id].select_indirect !=
3329 exp_select_indirect) {
3330 printk ("scsi%d : sanity check failed select_indirect=0x%x\n",
3331 host->host_no, hostdata->sync[cmd->device->id].select_indirect);
3332 FATAL(host);
3333
3334 }
3335 }
3336
3337 patch_dsa_32(tmp->dsa, dsa_select, 0,
3338 hostdata->sync[cmd->device->id].select_indirect);
3339
3340 /*
3341 * Right now, we'll do the WIDE and SYNCHRONOUS negotiations on
3342 * different commands; although it should be trivial to do them
3343 * both at the same time.
3344 */
3345 if (hostdata->initiate_wdtr & (1 << cmd->device->id)) {
3346 memcpy ((void *) (tmp->select + 1), (void *) wdtr_message,
3347 sizeof(wdtr_message));
3348 patch_dsa_32(tmp->dsa, dsa_msgout, 0, 1 + sizeof(wdtr_message));
3349 local_irq_save(flags);
3350 hostdata->initiate_wdtr &= ~(1 << cmd->device->id);
3351 local_irq_restore(flags);
3352 } else if (hostdata->initiate_sdtr & (1 << cmd->device->id)) {
3353 memcpy ((void *) (tmp->select + 1), (void *) sdtr_message,
3354 sizeof(sdtr_message));
3355 patch_dsa_32(tmp->dsa, dsa_msgout, 0, 1 + sizeof(sdtr_message));
3356 tmp->flags |= CMD_FLAG_SDTR;
3357 local_irq_save(flags);
3358 hostdata->initiate_sdtr &= ~(1 << cmd->device->id);
3359 local_irq_restore(flags);
3360
3361 }
3362#if 1
3363 else if (!(hostdata->talked_to & (1 << cmd->device->id)) &&
3364 !(hostdata->options & OPTION_NO_ASYNC)) {
3365
3366 memcpy ((void *) (tmp->select + 1), (void *) async_message,
3367 sizeof(async_message));
3368 patch_dsa_32(tmp->dsa, dsa_msgout, 0, 1 + sizeof(async_message));
3369 tmp->flags |= CMD_FLAG_SDTR;
3370 }
3371#endif
3372 else
3373 patch_dsa_32(tmp->dsa, dsa_msgout, 0, 1);
3374
3375 hostdata->talked_to |= (1 << cmd->device->id);
3376 tmp->select[0] = (hostdata->options & OPTION_DISCONNECT) ?
3377 IDENTIFY (1, cmd->device->lun) : IDENTIFY (0, cmd->device->lun);
3378 patch_dsa_32(tmp->dsa, dsa_msgout, 1, virt_to_bus(tmp->select));
3379 patch_dsa_32(tmp->dsa, dsa_cmdout, 0, cmd->cmd_len);
3380 patch_dsa_32(tmp->dsa, dsa_cmdout, 1, virt_to_bus(tmp->cmnd));
3381 patch_dsa_32(tmp->dsa, dsa_dataout, 0, cmd_dataout ?
3382 virt_to_bus (cmd_dataout)
3383 : virt_to_bus (hostdata->script) + hostdata->E_other_transfer);
3384 patch_dsa_32(tmp->dsa, dsa_datain, 0, cmd_datain ?
3385 virt_to_bus (cmd_datain)
3386 : virt_to_bus (hostdata->script) + hostdata->E_other_transfer);
3387 /*
3388 * XXX - need to make endian aware, should use separate variables
3389 * for both status and message bytes.
3390 */
3391 patch_dsa_32(tmp->dsa, dsa_msgin, 0, 1);
3392/*
3393 * FIXME : these only works for little endian. We probably want to
3394 * provide message and status fields in the NCR53c7x0_cmd
3395 * structure, and assign them to cmd->result when we're done.
3396 */
3397#ifdef BIG_ENDIAN
3398 patch_dsa_32(tmp->dsa, dsa_msgin, 1, virt_to_bus(&tmp->result) + 2);
3399 patch_dsa_32(tmp->dsa, dsa_status, 0, 1);
3400 patch_dsa_32(tmp->dsa, dsa_status, 1, virt_to_bus(&tmp->result) + 3);
3401#else
3402 patch_dsa_32(tmp->dsa, dsa_msgin, 1, virt_to_bus(&tmp->result) + 1);
3403 patch_dsa_32(tmp->dsa, dsa_status, 0, 1);
3404 patch_dsa_32(tmp->dsa, dsa_status, 1, virt_to_bus(&tmp->result));
3405#endif
3406 patch_dsa_32(tmp->dsa, dsa_msgout_other, 0, 1);
3407 patch_dsa_32(tmp->dsa, dsa_msgout_other, 1,
3408 virt_to_bus(&(hostdata->NCR53c7xx_msg_nop)));
3409
3410 /*
3411 * Generate code for zero or more of the DATA IN, DATA OUT phases
3412 * in the format
3413 *
3414 * CALL data_transfer, WHEN NOT phase
3415 * MOVE first buffer length, first buffer address, WHEN phase
3416 * ...
3417 * MOVE last buffer length, last buffer address, WHEN phase
3418 * JUMP other_transfer
3419 */
3420
3421/*
3422 * See if we're getting to data transfer by generating an unconditional
3423 * interrupt.
3424 */
3425#if 0
3426 if (datain) {
3427 cmd_datain[0] = 0x98080000;
3428 cmd_datain[1] = 0x03ffd00d;
3429 cmd_datain += 2;
3430 }
3431#endif
3432
3433/*
3434 * XXX - I'm undecided whether all of this nonsense is faster
3435 * in the long run, or whether I should just go and implement a loop
3436 * on the NCR chip using table indirect mode?
3437 *
3438 * In any case, this is how it _must_ be done for 53c700/700-66 chips,
3439 * so this stays even when we come up with something better.
3440 *
3441 * When we're limited to 1 simultaneous command, no overlapping processing,
3442 * we're seeing 630K/sec, with 7% CPU usage on a slow Syquest 45M
3443 * drive.
3444 *
3445 * Not bad, not good. We'll see.
3446 */
3447
3448 tmp->bounce.len = 0; /* Assume aligned buffer */
3449
3450 for (i = 0; cmd->use_sg ? (i < cmd->use_sg) : !i; cmd_datain += 4,
3451 cmd_dataout += 4, ++i) {
3452 u32 vbuf = cmd->use_sg
3453 ? (u32)page_address(((struct scatterlist *)cmd->request_buffer)[i].page)+
3454 ((struct scatterlist *)cmd->request_buffer)[i].offset
3455 : (u32)(cmd->request_buffer);
3456 u32 bbuf = virt_to_bus((void *)vbuf);
3457 u32 count = cmd->use_sg ?
3458 ((struct scatterlist *)cmd->request_buffer)[i].length :
3459 cmd->request_bufflen;
3460
3461 /*
3462 * If we have buffers which are not aligned with 16 byte cache
3463 * lines, then we just hope nothing accesses the other parts of
3464 * those cache lines while the transfer is in progress. That would
3465 * fill the cache, and subsequent reads of the dma data would pick
3466 * up the wrong thing.
3467 * XXX We need a bounce buffer to handle that correctly.
3468 */
3469
3470 if (((bbuf & 15) || (count & 15)) && (datain || dataout))
3471 {
3472 /* Bounce buffer needed */
3473 if (cmd->use_sg)
3474 printk ("53c7xx: Non-aligned buffer with use_sg\n");
3475 else if (datain && dataout)
3476 printk ("53c7xx: Non-aligned buffer with datain && dataout\n");
3477 else if (count > 256)
3478 printk ("53c7xx: Non-aligned transfer > 256 bytes\n");
3479 else
3480 {
3481 if (datain)
3482 {
3483 tmp->bounce.len = count;
3484 tmp->bounce.addr = vbuf;
3485 bbuf = virt_to_bus(tmp->bounce.buf);
3486 tmp->bounce.buf[0] = 0xff;
3487 tmp->bounce.buf[1] = 0xfe;
3488 tmp->bounce.buf[2] = 0xfd;
3489 tmp->bounce.buf[3] = 0xfc;
3490 }
3491 if (dataout)
3492 {
3493 memcpy ((void *)tmp->bounce.buf, (void *)vbuf, count);
3494 bbuf = virt_to_bus(tmp->bounce.buf);
3495 }
3496 }
3497 }
3498
3499 if (datain) {
3500 cache_clear(virt_to_phys((void *)vbuf), count);
3501 /* CALL other_in, WHEN NOT DATA_IN */
3502 cmd_datain[0] = ((DCMD_TYPE_TCI | DCMD_TCI_OP_CALL |
3503 DCMD_TCI_IO) << 24) |
3504 DBC_TCI_WAIT_FOR_VALID | DBC_TCI_COMPARE_PHASE;
3505 cmd_datain[1] = virt_to_bus (hostdata->script) +
3506 hostdata->E_other_in;
3507 /* MOVE count, buf, WHEN DATA_IN */
3508 cmd_datain[2] = ((DCMD_TYPE_BMI | DCMD_BMI_OP_MOVE_I | DCMD_BMI_IO)
3509 << 24) | count;
3510 cmd_datain[3] = bbuf;
3511#if 0
3512 print_insn (host, cmd_datain, "dynamic ", 1);
3513 print_insn (host, cmd_datain + 2, "dynamic ", 1);
3514#endif
3515 }
3516 if (dataout) {
3517 cache_push(virt_to_phys((void *)vbuf), count);
3518 /* CALL other_out, WHEN NOT DATA_OUT */
3519 cmd_dataout[0] = ((DCMD_TYPE_TCI | DCMD_TCI_OP_CALL) << 24) |
3520 DBC_TCI_WAIT_FOR_VALID | DBC_TCI_COMPARE_PHASE;
3521 cmd_dataout[1] = virt_to_bus(hostdata->script) +
3522 hostdata->E_other_out;
3523 /* MOVE count, buf, WHEN DATA+OUT */
3524 cmd_dataout[2] = ((DCMD_TYPE_BMI | DCMD_BMI_OP_MOVE_I) << 24)
3525 | count;
3526 cmd_dataout[3] = bbuf;
3527#if 0
3528 print_insn (host, cmd_dataout, "dynamic ", 1);
3529 print_insn (host, cmd_dataout + 2, "dynamic ", 1);
3530#endif
3531 }
3532 }
3533
3534 /*
3535 * Install JUMP instructions after the data transfer routines to return
3536 * control to the do_other_transfer routines.
3537 */
3538
3539
3540 if (datain) {
3541 cmd_datain[0] = ((DCMD_TYPE_TCI | DCMD_TCI_OP_JUMP) << 24) |
3542 DBC_TCI_TRUE;
3543 cmd_datain[1] = virt_to_bus(hostdata->script) +
3544 hostdata->E_other_transfer;
3545#if 0
3546 print_insn (host, cmd_datain, "dynamic jump ", 1);
3547#endif
3548 cmd_datain += 2;
3549 }
3550#if 0
3551 if (datain) {
3552 cmd_datain[0] = 0x98080000;
3553 cmd_datain[1] = 0x03ffdeed;
3554 cmd_datain += 2;
3555 }
3556#endif
3557 if (dataout) {
3558 cmd_dataout[0] = ((DCMD_TYPE_TCI | DCMD_TCI_OP_JUMP) << 24) |
3559 DBC_TCI_TRUE;
3560 cmd_dataout[1] = virt_to_bus(hostdata->script) +
3561 hostdata->E_other_transfer;
3562#if 0
3563 print_insn (host, cmd_dataout, "dynamic jump ", 1);
3564#endif
3565 cmd_dataout += 2;
3566 }
3567
3568 return tmp;
3569}
3570
3571/*
3572 * Function : int NCR53c7xx_queue_command (Scsi_Cmnd *cmd,
3573 * void (*done)(Scsi_Cmnd *))
3574 *
3575 * Purpose : enqueues a SCSI command
3576 *
3577 * Inputs : cmd - SCSI command, done - function called on completion, with
3578 * a pointer to the command descriptor.
3579 *
3580 * Returns : 0
3581 *
3582 * Side effects :
3583 * cmd is added to the per instance driver issue_queue, with major
3584 * twiddling done to the host specific fields of cmd. If the
3585 * process_issue_queue coroutine isn't running, it is restarted.
3586 *
3587 * NOTE : we use the host_scribble field of the Scsi_Cmnd structure to
3588 * hold our own data, and pervert the ptr field of the SCp field
3589 * to create a linked list.
3590 */
3591
3592int
3593NCR53c7xx_queue_command (Scsi_Cmnd *cmd, void (* done)(Scsi_Cmnd *)) {
3594 struct Scsi_Host *host = cmd->device->host;
3595 struct NCR53c7x0_hostdata *hostdata =
3596 (struct NCR53c7x0_hostdata *) host->hostdata[0];
3597 unsigned long flags;
3598 Scsi_Cmnd *tmp;
3599
3600 cmd->scsi_done = done;
3601 cmd->host_scribble = NULL;
3602 cmd->SCp.ptr = NULL;
3603 cmd->SCp.buffer = NULL;
3604
3605#ifdef VALID_IDS
3606 /* Ignore commands on invalid IDs */
3607 if (!hostdata->valid_ids[cmd->device->id]) {
3608 printk("scsi%d : ignoring target %d lun %d\n", host->host_no,
3609 cmd->device->id, cmd->device->lun);
3610 cmd->result = (DID_BAD_TARGET << 16);
3611 done(cmd);
3612 return 0;
3613 }
3614#endif
3615
3616 local_irq_save(flags);
3617 if ((hostdata->options & (OPTION_DEBUG_INIT_ONLY|OPTION_DEBUG_PROBE_ONLY))
3618 || ((hostdata->options & OPTION_DEBUG_TARGET_LIMIT) &&
3619 !(hostdata->debug_lun_limit[cmd->device->id] & (1 << cmd->device->lun)))
3620#ifdef LINUX_1_2
3621 || cmd->device->id > 7
3622#else
3623 || cmd->device->id >= host->max_id
3624#endif
3625 || cmd->device->id == host->this_id
3626 || hostdata->state == STATE_DISABLED) {
3627 printk("scsi%d : disabled or bad target %d lun %d\n", host->host_no,
3628 cmd->device->id, cmd->device->lun);
3629 cmd->result = (DID_BAD_TARGET << 16);
3630 done(cmd);
3631 local_irq_restore(flags);
3632 return 0;
3633 }
3634
3635 if ((hostdata->options & OPTION_DEBUG_NCOMMANDS_LIMIT) &&
3636 (hostdata->debug_count_limit == 0)) {
3637 printk("scsi%d : maximum commands exceeded\n", host->host_no);
3638 cmd->result = (DID_BAD_TARGET << 16);
3639 done(cmd);
3640 local_irq_restore(flags);
3641 return 0;
3642 }
3643
3644 if (hostdata->options & OPTION_DEBUG_READ_ONLY) {
3645 switch (cmd->cmnd[0]) {
3646 case WRITE_6:
3647 case WRITE_10:
3648 printk("scsi%d : WRITE attempted with NO_WRITE debugging flag set\n",
3649 host->host_no);
3650 cmd->result = (DID_BAD_TARGET << 16);
3651 done(cmd);
3652 local_irq_restore(flags);
3653 return 0;
3654 }
3655 }
3656
3657 if ((hostdata->options & OPTION_DEBUG_TARGET_LIMIT) &&
3658 hostdata->debug_count_limit != -1)
3659 --hostdata->debug_count_limit;
3660
3661 cmd->result = 0xffff; /* The NCR will overwrite message
3662 and status with valid data */
3663 cmd->host_scribble = (unsigned char *) tmp = create_cmd (cmd);
3664
3665 /*
3666 * REQUEST SENSE commands are inserted at the head of the queue
3667 * so that we do not clear the contingent allegiance condition
3668 * they may be looking at.
3669 */
3670
3671 if (!(hostdata->issue_queue) || (cmd->cmnd[0] == REQUEST_SENSE)) {
3672 cmd->SCp.ptr = (unsigned char *) hostdata->issue_queue;
3673 hostdata->issue_queue = cmd;
3674 } else {
3675 for (tmp = (Scsi_Cmnd *) hostdata->issue_queue; tmp->SCp.ptr;
3676 tmp = (Scsi_Cmnd *) tmp->SCp.ptr);
3677 tmp->SCp.ptr = (unsigned char *) cmd;
3678 }
3679 local_irq_restore(flags);
3680 run_process_issue_queue();
3681 return 0;
3682}
3683
3684/*
3685 * Function : void to_schedule_list (struct Scsi_Host *host,
3686 * struct NCR53c7x0_hostdata * hostdata, Scsi_Cmnd *cmd)
3687 *
3688 * Purpose : takes a SCSI command which was just removed from the
3689 * issue queue, and deals with it by inserting it in the first
3690 * free slot in the schedule list or by terminating it immediately.
3691 *
3692 * Inputs :
3693 * host - SCSI host adapter; hostdata - hostdata structure for
3694 * this adapter; cmd - a pointer to the command; should have
3695 * the host_scribble field initialized to point to a valid
3696 *
3697 * Side effects :
3698 * cmd is added to the per instance schedule list, with minor
3699 * twiddling done to the host specific fields of cmd.
3700 *
3701 */
3702
3703static __inline__ void
3704to_schedule_list (struct Scsi_Host *host, struct NCR53c7x0_hostdata *hostdata,
3705 struct NCR53c7x0_cmd *cmd) {
3706 NCR53c7x0_local_declare();
3707 Scsi_Cmnd *tmp = cmd->cmd;
3708 unsigned long flags;
3709 /* dsa start is negative, so subtraction is used */
3710 volatile u32 *ncrcurrent;
3711
3712 int i;
3713 NCR53c7x0_local_setup(host);
3714#if 0
3715 printk("scsi%d : new dsa is 0x%lx (virt 0x%p)\n", host->host_no,
3716 virt_to_bus(hostdata->dsa), hostdata->dsa);
3717#endif
3718
3719 local_irq_save(flags);
3720
3721 /*
3722 * Work around race condition : if an interrupt fired and we
3723 * got disabled forget about this command.
3724 */
3725
3726 if (hostdata->state == STATE_DISABLED) {
3727 printk("scsi%d : driver disabled\n", host->host_no);
3728 tmp->result = (DID_BAD_TARGET << 16);
3729 cmd->next = (struct NCR53c7x0_cmd *) hostdata->free;
3730 hostdata->free = cmd;
3731 tmp->scsi_done(tmp);
3732 local_irq_restore(flags);
3733 return;
3734 }
3735
3736 for (i = host->can_queue, ncrcurrent = hostdata->schedule;
3737 i > 0 && ncrcurrent[0] != hostdata->NOP_insn;
3738 --i, ncrcurrent += 2 /* JUMP instructions are two words */);
3739
3740 if (i > 0) {
3741 ++hostdata->busy[tmp->device->id][tmp->device->lun];
3742 cmd->next = hostdata->running_list;
3743 hostdata->running_list = cmd;
3744
3745 /* Restore this instruction to a NOP once the command starts */
3746 cmd->dsa [(hostdata->dsa_jump_dest - hostdata->dsa_start) /
3747 sizeof(u32)] = (u32) virt_to_bus ((void *)ncrcurrent);
3748 /* Replace the current jump operand. */
3749 ncrcurrent[1] =
3750 virt_to_bus ((void *) cmd->dsa) + hostdata->E_dsa_code_begin -
3751 hostdata->E_dsa_code_template;
3752 /* Replace the NOP instruction with a JUMP */
3753 ncrcurrent[0] = ((DCMD_TYPE_TCI|DCMD_TCI_OP_JUMP) << 24) |
3754 DBC_TCI_TRUE;
3755 } else {
3756 printk ("scsi%d: no free slot\n", host->host_no);
3757 disable(host);
3758 tmp->result = (DID_ERROR << 16);
3759 cmd->next = (struct NCR53c7x0_cmd *) hostdata->free;
3760 hostdata->free = cmd;
3761 tmp->scsi_done(tmp);
3762 local_irq_restore(flags);
3763 return;
3764 }
3765
3766 /*
3767 * If the NCR chip is in an idle state, start it running the scheduler
3768 * immediately. Otherwise, signal the chip to jump to schedule as
3769 * soon as it is idle.
3770 */
3771
3772 if (hostdata->idle) {
3773 hostdata->idle = 0;
3774 hostdata->state = STATE_RUNNING;
3775 NCR53c7x0_write32 (DSP_REG, virt_to_bus ((void *)hostdata->schedule));
3776 if (hostdata->options & OPTION_DEBUG_TRACE)
3777 NCR53c7x0_write8 (DCNTL_REG, hostdata->saved_dcntl |
3778 DCNTL_SSM | DCNTL_STD);
3779 } else {
3780 NCR53c7x0_write8(hostdata->istat, ISTAT_10_SIGP);
3781 }
3782
3783 local_irq_restore(flags);
3784}
3785
3786/*
3787 * Function : busyp (struct Scsi_Host *host, struct NCR53c7x0_hostdata
3788 * *hostdata, Scsi_Cmnd *cmd)
3789 *
3790 * Purpose : decide if we can pass the given SCSI command on to the
3791 * device in question or not.
3792 *
3793 * Returns : non-zero when we're busy, 0 when we aren't.
3794 */
3795
3796static __inline__ int
3797busyp (struct Scsi_Host *host, struct NCR53c7x0_hostdata *hostdata,
3798 Scsi_Cmnd *cmd) {
3799 /* FIXME : in the future, this needs to accommodate SCSI-II tagged
3800 queuing, and we may be able to play with fairness here a bit.
3801 */
3802 return hostdata->busy[cmd->device->id][cmd->device->lun];
3803}
3804
3805/*
3806 * Function : process_issue_queue (void)
3807 *
3808 * Purpose : transfer commands from the issue queue to NCR start queue
3809 * of each NCR53c7/8xx in the system, avoiding kernel stack
3810 * overflows when the scsi_done() function is invoked recursively.
3811 *
3812 * NOTE : process_issue_queue exits with interrupts *disabled*, so the
3813 * caller must reenable them if it desires.
3814 *
3815 * NOTE : process_issue_queue should be called from both
3816 * NCR53c7x0_queue_command() and from the interrupt handler
3817 * after command completion in case NCR53c7x0_queue_command()
3818 * isn't invoked again but we've freed up resources that are
3819 * needed.
3820 */
3821
3822static void
3823process_issue_queue (unsigned long flags) {
3824 Scsi_Cmnd *tmp, *prev;
3825 struct Scsi_Host *host;
3826 struct NCR53c7x0_hostdata *hostdata;
3827 int done;
3828
3829 /*
3830 * We run (with interrupts disabled) until we're sure that none of
3831 * the host adapters have anything that can be done, at which point
3832 * we set process_issue_queue_running to 0 and exit.
3833 *
3834 * Interrupts are enabled before doing various other internal
3835 * instructions, after we've decided that we need to run through
3836 * the loop again.
3837 *
3838 */
3839
3840 do {
3841 local_irq_disable(); /* Freeze request queues */
3842 done = 1;
3843 for (host = first_host; host && host->hostt == the_template;
3844 host = host->next) {
3845 hostdata = (struct NCR53c7x0_hostdata *) host->hostdata[0];
3846 local_irq_disable();
3847 if (hostdata->issue_queue) {
3848 if (hostdata->state == STATE_DISABLED) {
3849 tmp = (Scsi_Cmnd *) hostdata->issue_queue;
3850 hostdata->issue_queue = (Scsi_Cmnd *) tmp->SCp.ptr;
3851 tmp->result = (DID_BAD_TARGET << 16);
3852 if (tmp->host_scribble) {
3853 ((struct NCR53c7x0_cmd *)tmp->host_scribble)->next =
3854 hostdata->free;
3855 hostdata->free =
3856 (struct NCR53c7x0_cmd *)tmp->host_scribble;
3857 tmp->host_scribble = NULL;
3858 }
3859 tmp->scsi_done (tmp);
3860 done = 0;
3861 } else
3862 for (tmp = (Scsi_Cmnd *) hostdata->issue_queue,
3863 prev = NULL; tmp; prev = tmp, tmp = (Scsi_Cmnd *)
3864 tmp->SCp.ptr)
3865 if (!tmp->host_scribble ||
3866 !busyp (host, hostdata, tmp)) {
3867 if (prev)
3868 prev->SCp.ptr = tmp->SCp.ptr;
3869 else
3870 hostdata->issue_queue = (Scsi_Cmnd *)
3871 tmp->SCp.ptr;
3872 tmp->SCp.ptr = NULL;
3873 if (tmp->host_scribble) {
3874 if (hostdata->options & OPTION_DEBUG_QUEUES)
3875 printk ("scsi%d : moving command for target %d lun %d to start list\n",
3876 host->host_no, tmp->device->id, tmp->device->lun);
3877
3878
3879 to_schedule_list (host, hostdata,
3880 (struct NCR53c7x0_cmd *)
3881 tmp->host_scribble);
3882 } else {
3883 if (((tmp->result & 0xff) == 0xff) ||
3884 ((tmp->result & 0xff00) == 0xff00)) {
3885 printk ("scsi%d : danger Will Robinson!\n",
3886 host->host_no);
3887 tmp->result = DID_ERROR << 16;
3888 disable (host);
3889 }
3890 tmp->scsi_done(tmp);
3891 }
3892 done = 0;
3893 } /* if target/lun is not busy */
3894 } /* if hostdata->issue_queue */
3895 if (!done)
3896 local_irq_restore(flags);
3897 } /* for host */
3898 } while (!done);
3899 process_issue_queue_running = 0;
3900}
3901
3902/*
3903 * Function : static void intr_scsi (struct Scsi_Host *host,
3904 * struct NCR53c7x0_cmd *cmd)
3905 *
3906 * Purpose : handle all SCSI interrupts, indicated by the setting
3907 * of the SIP bit in the ISTAT register.
3908 *
3909 * Inputs : host, cmd - host and NCR command causing the interrupt, cmd
3910 * may be NULL.
3911 */
3912
3913static void
3914intr_scsi (struct Scsi_Host *host, struct NCR53c7x0_cmd *cmd) {
3915 NCR53c7x0_local_declare();
3916 struct NCR53c7x0_hostdata *hostdata =
3917 (struct NCR53c7x0_hostdata *) host->hostdata[0];
3918 unsigned char sstat0_sist0, sist1, /* Registers */
3919 fatal; /* Did a fatal interrupt
3920 occur ? */
3921
3922 NCR53c7x0_local_setup(host);
3923
3924 fatal = 0;
3925
3926 sstat0_sist0 = NCR53c7x0_read8(SSTAT0_REG);
3927 sist1 = 0;
3928
3929 if (hostdata->options & OPTION_DEBUG_INTR)
3930 printk ("scsi%d : SIST0 0x%0x, SIST1 0x%0x\n", host->host_no,
3931 sstat0_sist0, sist1);
3932
3933 /* 250ms selection timeout */
3934 if (sstat0_sist0 & SSTAT0_700_STO) {
3935 fatal = 1;
3936 if (hostdata->options & OPTION_DEBUG_INTR) {
3937 printk ("scsi%d : Selection Timeout\n", host->host_no);
3938 if (cmd) {
3939 printk("scsi%d : target %d, lun %d, command ",
3940 host->host_no, cmd->cmd->device->id, cmd->cmd->device->lun);
3941 __scsi_print_command (cmd->cmd->cmnd);
3942 printk("scsi%d : dsp = 0x%x (virt 0x%p)\n", host->host_no,
3943 NCR53c7x0_read32(DSP_REG),
3944 bus_to_virt(NCR53c7x0_read32(DSP_REG)));
3945 } else {
3946 printk("scsi%d : no command\n", host->host_no);
3947 }
3948 }
3949/*
3950 * XXX - question : how do we want to handle the Illegal Instruction
3951 * interrupt, which may occur before or after the Selection Timeout
3952 * interrupt?
3953 */
3954
3955 if (1) {
3956 hostdata->idle = 1;
3957 hostdata->expecting_sto = 0;
3958
3959 if (hostdata->test_running) {
3960 hostdata->test_running = 0;
3961 hostdata->test_completed = 3;
3962 } else if (cmd) {
3963 abnormal_finished(cmd, DID_BAD_TARGET << 16);
3964 }
3965#if 0
3966 hostdata->intrs = 0;
3967#endif
3968 }
3969 }
3970
3971/*
3972 * FIXME : in theory, we can also get a UDC when a STO occurs.
3973 */
3974 if (sstat0_sist0 & SSTAT0_UDC) {
3975 fatal = 1;
3976 if (cmd) {
3977 printk("scsi%d : target %d lun %d unexpected disconnect\n",
3978 host->host_no, cmd->cmd->device->id, cmd->cmd->device->lun);
3979 print_lots (host);
3980 abnormal_finished(cmd, DID_ERROR << 16);
3981 } else
3982 printk("scsi%d : unexpected disconnect (no command)\n",
3983 host->host_no);
3984
3985 hostdata->dsp = (u32 *) hostdata->schedule;
3986 hostdata->dsp_changed = 1;
3987 }
3988
3989 /* SCSI PARITY error */
3990 if (sstat0_sist0 & SSTAT0_PAR) {
3991 fatal = 1;
3992 if (cmd && cmd->cmd) {
3993 printk("scsi%d : target %d lun %d parity error.\n",
3994 host->host_no, cmd->cmd->device->id, cmd->cmd->device->lun);
3995 abnormal_finished (cmd, DID_PARITY << 16);
3996 } else
3997 printk("scsi%d : parity error\n", host->host_no);
3998 /* Should send message out, parity error */
3999
4000 /* XXX - Reduce synchronous transfer rate! */
4001 hostdata->dsp = hostdata->script + hostdata->E_initiator_abort /
4002 sizeof(u32);
4003 hostdata->dsp_changed = 1;
4004 /* SCSI GROSS error */
4005 }
4006
4007 if (sstat0_sist0 & SSTAT0_SGE) {
4008 fatal = 1;
4009 printk("scsi%d : gross error, saved2_dsa = 0x%x\n", host->host_no,
4010 (unsigned int)hostdata->saved2_dsa);
4011 print_lots (host);
4012
4013 /*
4014 * A SCSI gross error may occur when we have
4015 *
4016 * - A synchronous offset which causes the SCSI FIFO to be overwritten.
4017 *
4018 * - A REQ which causes the maximum synchronous offset programmed in
4019 * the SXFER register to be exceeded.
4020 *
4021 * - A phase change with an outstanding synchronous offset.
4022 *
4023 * - Residual data in the synchronous data FIFO, with a transfer
4024 * other than a synchronous receive is started.$#
4025 */
4026
4027
4028 /* XXX Should deduce synchronous transfer rate! */
4029 hostdata->dsp = hostdata->script + hostdata->E_initiator_abort /
4030 sizeof(u32);
4031 hostdata->dsp_changed = 1;
4032 /* Phase mismatch */
4033 }
4034
4035 if (sstat0_sist0 & SSTAT0_MA) {
4036 fatal = 1;
4037 if (hostdata->options & OPTION_DEBUG_INTR)
4038 printk ("scsi%d : SSTAT0_MA\n", host->host_no);
4039 intr_phase_mismatch (host, cmd);
4040 }
4041
4042#if 0
4043 if (sstat0_sist0 & SIST0_800_RSL)
4044 printk ("scsi%d : Oh no Mr. Bill!\n", host->host_no);
4045#endif
4046
4047/*
4048 * If a fatal SCSI interrupt occurs, we must insure that the DMA and
4049 * SCSI FIFOs were flushed.
4050 */
4051
4052 if (fatal) {
4053 if (!hostdata->dstat_valid) {
4054 hostdata->dstat = NCR53c7x0_read8(DSTAT_REG);
4055 hostdata->dstat_valid = 1;
4056 }
4057
4058 if (!(hostdata->dstat & DSTAT_DFE)) {
4059 printk ("scsi%d : DMA FIFO not empty\n", host->host_no);
4060 /*
4061 * Really need to check this code for 710 RGH.
4062 * Havn't seen any problems, but maybe we should FLUSH before
4063 * clearing sometimes.
4064 */
4065 NCR53c7x0_write8 (CTEST8_REG, CTEST8_10_CLF);
4066 while (NCR53c7x0_read8 (CTEST8_REG) & CTEST8_10_CLF)
4067 ;
4068 hostdata->dstat |= DSTAT_DFE;
4069 }
4070 }
4071}
4072
4073#ifdef CYCLIC_TRACE
4074
4075/*
4076 * The following implements a cyclic log of instructions executed, if you turn
4077 * TRACE on. It will also print the log for you. Very useful when debugging
4078 * 53c710 support, possibly not really needed any more.
4079 */
4080
4081u32 insn_log[4096];
4082u32 insn_log_index = 0;
4083
4084void log1 (u32 i)
4085{
4086 insn_log[insn_log_index++] = i;
4087 if (insn_log_index == 4096)
4088 insn_log_index = 0;
4089}
4090
4091void log_insn (u32 *ip)
4092{
4093 log1 ((u32)ip);
4094 log1 (*ip);
4095 log1 (*(ip+1));
4096 if (((*ip >> 24) & DCMD_TYPE_MASK) == DCMD_TYPE_MMI)
4097 log1 (*(ip+2));
4098}
4099
4100void dump_log(void)
4101{
4102 int cnt = 0;
4103 int i = insn_log_index;
4104 int size;
4105 struct Scsi_Host *host = first_host;
4106
4107 while (cnt < 4096) {
4108 printk ("%08x (+%6x): ", insn_log[i], (insn_log[i] - (u32)&(((struct NCR53c7x0_hostdata *)host->hostdata[0])->script))/4);
4109 if (++i == 4096)
4110 i = 0;
4111 cnt++;
4112 if (((insn_log[i] >> 24) & DCMD_TYPE_MASK) == DCMD_TYPE_MMI)
4113 size = 3;
4114 else
4115 size = 2;
4116 while (size--) {
4117 printk ("%08x ", insn_log[i]);
4118 if (++i == 4096)
4119 i = 0;
4120 cnt++;
4121 }
4122 printk ("\n");
4123 }
4124}
4125#endif
4126
4127
4128/*
4129 * Function : static void NCR53c7x0_intfly (struct Scsi_Host *host)
4130 *
4131 * Purpose : Scan command queue for specified host, looking for completed
4132 * commands.
4133 *
4134 * Inputs : Scsi_Host pointer.
4135 *
4136 * This is called from the interrupt handler, when a simulated INTFLY
4137 * interrupt occurs.
4138 */
4139
4140static void
4141NCR53c7x0_intfly (struct Scsi_Host *host)
4142{
4143 NCR53c7x0_local_declare();
4144 struct NCR53c7x0_hostdata *hostdata; /* host->hostdata[0] */
4145 struct NCR53c7x0_cmd *cmd, /* command which halted */
4146 **cmd_prev_ptr;
4147 unsigned long flags;
4148 char search_found = 0; /* Got at least one ? */
4149
4150 hostdata = (struct NCR53c7x0_hostdata *) host->hostdata[0];
4151 NCR53c7x0_local_setup(host);
4152
4153 if (hostdata->options & OPTION_DEBUG_INTR)
4154 printk ("scsi%d : INTFLY\n", host->host_no);
4155
4156 /*
4157 * Traverse our list of running commands, and look
4158 * for those with valid (non-0xff ff) status and message
4159 * bytes encoded in the result which signify command
4160 * completion.
4161 */
4162
4163 local_irq_save(flags);
4164restart:
4165 for (cmd_prev_ptr = (struct NCR53c7x0_cmd **)&(hostdata->running_list),
4166 cmd = (struct NCR53c7x0_cmd *) hostdata->running_list; cmd ;
4167 cmd_prev_ptr = (struct NCR53c7x0_cmd **) &(cmd->next),
4168 cmd = (struct NCR53c7x0_cmd *) cmd->next)
4169 {
4170 Scsi_Cmnd *tmp;
4171
4172 if (!cmd) {
4173 printk("scsi%d : very weird.\n", host->host_no);
4174 break;
4175 }
4176
4177 if (!(tmp = cmd->cmd)) {
4178 printk("scsi%d : weird. NCR53c7x0_cmd has no Scsi_Cmnd\n",
4179 host->host_no);
4180 continue;
4181 }
4182 /* Copy the result over now; may not be complete,
4183 * but subsequent tests may as well be done on
4184 * cached memory.
4185 */
4186 tmp->result = cmd->result;
4187
4188 if (((tmp->result & 0xff) == 0xff) ||
4189 ((tmp->result & 0xff00) == 0xff00))
4190 continue;
4191
4192 search_found = 1;
4193
4194 if (cmd->bounce.len)
4195 memcpy ((void *)cmd->bounce.addr,
4196 (void *)cmd->bounce.buf, cmd->bounce.len);
4197
4198 /* Important - remove from list _before_ done is called */
4199 if (cmd_prev_ptr)
4200 *cmd_prev_ptr = (struct NCR53c7x0_cmd *) cmd->next;
4201
4202 --hostdata->busy[tmp->device->id][tmp->device->lun];
4203 cmd->next = hostdata->free;
4204 hostdata->free = cmd;
4205
4206 tmp->host_scribble = NULL;
4207
4208 if (hostdata->options & OPTION_DEBUG_INTR) {
4209 printk ("scsi%d : command complete : pid %lu, id %d,lun %d result 0x%x ",
4210 host->host_no, tmp->pid, tmp->device->id, tmp->device->lun, tmp->result);
4211 __scsi_print_command (tmp->cmnd);
4212 }
4213
4214 tmp->scsi_done(tmp);
4215 goto restart;
4216 }
4217 local_irq_restore(flags);
4218
4219 if (!search_found) {
4220 printk ("scsi%d : WARNING : INTFLY with no completed commands.\n",
4221 host->host_no);
4222 } else {
4223 run_process_issue_queue();
4224 }
4225 return;
4226}
4227
4228/*
4229 * Function : static irqreturn_t NCR53c7x0_intr (int irq, void *dev_id)
4230 *
4231 * Purpose : handle NCR53c7x0 interrupts for all NCR devices sharing
4232 * the same IRQ line.
4233 *
4234 * Inputs : Since we're using the IRQF_DISABLED interrupt handler
4235 * semantics, irq indicates the interrupt which invoked
4236 * this handler.
4237 *
4238 * On the 710 we simualte an INTFLY with a script interrupt, and the
4239 * script interrupt handler will call back to this function.
4240 */
4241
4242static irqreturn_t
4243NCR53c7x0_intr (int irq, void *dev_id)
4244{
4245 NCR53c7x0_local_declare();
4246 struct Scsi_Host *host; /* Host we are looking at */
4247 unsigned char istat; /* Values of interrupt regs */
4248 struct NCR53c7x0_hostdata *hostdata; /* host->hostdata[0] */
4249 struct NCR53c7x0_cmd *cmd; /* command which halted */
4250 u32 *dsa; /* DSA */
4251 int handled = 0;
4252
4253#ifdef NCR_DEBUG
4254 char buf[80]; /* Debugging sprintf buffer */
4255 size_t buflen; /* Length of same */
4256#endif
4257
4258 host = (struct Scsi_Host *)dev_id;
4259 hostdata = (struct NCR53c7x0_hostdata *) host->hostdata[0];
4260 NCR53c7x0_local_setup(host);
4261
4262 /*
4263 * Only read istat once per loop, since reading it again will unstack
4264 * interrupts
4265 */
4266
4267 while ((istat = NCR53c7x0_read8(hostdata->istat)) & (ISTAT_SIP|ISTAT_DIP)) {
4268 handled = 1;
4269 hostdata->dsp_changed = 0;
4270 hostdata->dstat_valid = 0;
4271 hostdata->state = STATE_HALTED;
4272
4273 if (NCR53c7x0_read8 (SSTAT2_REG) & SSTAT2_FF_MASK)
4274 printk ("scsi%d : SCSI FIFO not empty\n", host->host_no);
4275
4276 /*
4277 * NCR53c700 and NCR53c700-66 change the current SCSI
4278 * process, hostdata->ncrcurrent, in the Linux driver so
4279 * cmd = hostdata->ncrcurrent.
4280 *
4281 * With other chips, we must look through the commands
4282 * executing and find the command structure which
4283 * corresponds to the DSA register.
4284 */
4285
4286 if (hostdata->options & OPTION_700) {
4287 cmd = (struct NCR53c7x0_cmd *) hostdata->ncrcurrent;
4288 } else {
4289 dsa = bus_to_virt(NCR53c7x0_read32(DSA_REG));
4290 for (cmd = (struct NCR53c7x0_cmd *) hostdata->running_list;
4291 cmd && (dsa + (hostdata->dsa_start / sizeof(u32))) != cmd->dsa;
4292 cmd = (struct NCR53c7x0_cmd *)(cmd->next))
4293 ;
4294 }
4295 if (hostdata->options & OPTION_DEBUG_INTR) {
4296 if (cmd) {
4297 printk("scsi%d : interrupt for pid %lu, id %d, lun %d ",
4298 host->host_no, cmd->cmd->pid, (int) cmd->cmd->device->id,
4299 (int) cmd->cmd->device->lun);
4300 __scsi_print_command (cmd->cmd->cmnd);
4301 } else {
4302 printk("scsi%d : no active command\n", host->host_no);
4303 }
4304 }
4305
4306 if (istat & ISTAT_SIP) {
4307 if (hostdata->options & OPTION_DEBUG_INTR)
4308 printk ("scsi%d : ISTAT_SIP\n", host->host_no);
4309 intr_scsi (host, cmd);
4310 }
4311
4312 if (istat & ISTAT_DIP) {
4313 if (hostdata->options & OPTION_DEBUG_INTR)
4314 printk ("scsi%d : ISTAT_DIP\n", host->host_no);
4315 intr_dma (host, cmd);
4316 }
4317
4318 if (!hostdata->dstat_valid) {
4319 hostdata->dstat = NCR53c7x0_read8(DSTAT_REG);
4320 hostdata->dstat_valid = 1;
4321 }
4322
4323 if (!(hostdata->dstat & DSTAT_DFE)) {
4324 printk ("scsi%d : DMA FIFO not empty\n", host->host_no);
4325 /* Really need to check this out for 710 RGH */
4326 NCR53c7x0_write8 (CTEST8_REG, CTEST8_10_CLF);
4327 while (NCR53c7x0_read8 (CTEST8_REG) & CTEST8_10_CLF)
4328 ;
4329 hostdata->dstat |= DSTAT_DFE;
4330 }
4331
4332 if (!hostdata->idle && hostdata->state == STATE_HALTED) {
4333 if (!hostdata->dsp_changed)
4334 hostdata->dsp = (u32 *)bus_to_virt(NCR53c7x0_read32(DSP_REG));
4335#if 0
4336 printk("scsi%d : new dsp is 0x%lx (virt 0x%p)\n",
4337 host->host_no, virt_to_bus(hostdata->dsp), hostdata->dsp);
4338#endif
4339
4340 hostdata->state = STATE_RUNNING;
4341 NCR53c7x0_write32 (DSP_REG, virt_to_bus(hostdata->dsp));
4342 if (hostdata->options & OPTION_DEBUG_TRACE) {
4343#ifdef CYCLIC_TRACE
4344 log_insn (hostdata->dsp);
4345#else
4346 print_insn (host, hostdata->dsp, "t ", 1);
4347#endif
4348 NCR53c7x0_write8 (DCNTL_REG,
4349 hostdata->saved_dcntl | DCNTL_SSM | DCNTL_STD);
4350 }
4351 }
4352 }
4353 return IRQ_HANDLED;
4354}
4355
4356
4357/*
4358 * Function : static int abort_connected (struct Scsi_Host *host)
4359 *
4360 * Purpose : Assuming that the NCR SCSI processor is currently
4361 * halted, break the currently established nexus. Clean
4362 * up of the NCR53c7x0_cmd and Scsi_Cmnd structures should
4363 * be done on receipt of the abort interrupt.
4364 *
4365 * Inputs : host - SCSI host
4366 *
4367 */
4368
4369static int
4370abort_connected (struct Scsi_Host *host) {
4371#ifdef NEW_ABORT
4372 NCR53c7x0_local_declare();
4373#endif
4374 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
4375 host->hostdata[0];
4376/* FIXME : this probably should change for production kernels; at the
4377 least, counter should move to a per-host structure. */
4378 static int counter = 5;
4379#ifdef NEW_ABORT
4380 int sstat, phase, offset;
4381 u32 *script;
4382 NCR53c7x0_local_setup(host);
4383#endif
4384
4385 if (--counter <= 0) {
4386 disable(host);
4387 return 0;
4388 }
4389
4390 printk ("scsi%d : DANGER : abort_connected() called \n",
4391 host->host_no);
4392
4393#ifdef NEW_ABORT
4394
4395/*
4396 * New strategy : Rather than using a generic abort routine,
4397 * we'll specifically try to source or sink the appropriate
4398 * amount of data for the phase we're currently in (taking into
4399 * account the current synchronous offset)
4400 */
4401
4402 sstat = NCR53c8x0_read8 (SSTAT2_REG);
4403 offset = OFFSET (sstat & SSTAT2_FF_MASK) >> SSTAT2_FF_SHIFT;
4404 phase = sstat & SSTAT2_PHASE_MASK;
4405
4406/*
4407 * SET ATN
4408 * MOVE source_or_sink, WHEN CURRENT PHASE
4409 * < repeat for each outstanding byte >
4410 * JUMP send_abort_message
4411 */
4412
4413 script = hostdata->abort_script = kmalloc (
4414 8 /* instruction size */ * (
4415 1 /* set ATN */ +
4416 (!offset ? 1 : offset) /* One transfer per outstanding byte */ +
4417 1 /* send abort message */),
4418 GFP_ATOMIC);
4419
4420
4421#else /* def NEW_ABORT */
4422 hostdata->dsp = hostdata->script + hostdata->E_initiator_abort /
4423 sizeof(u32);
4424#endif /* def NEW_ABORT */
4425 hostdata->dsp_changed = 1;
4426
4427/* XXX - need to flag the command as aborted after the abort_connected
4428 code runs
4429 */
4430 return 0;
4431}
4432
4433/*
4434 * Function : static int datapath_residual (Scsi_Host *host)
4435 *
4436 * Purpose : return residual data count of what's in the chip.
4437 *
4438 * Inputs : host - SCSI host
4439 */
4440
4441static int
4442datapath_residual (struct Scsi_Host *host) {
4443 NCR53c7x0_local_declare();
4444 int count, synchronous, sstat;
4445 unsigned int ddir;
4446
4447 NCR53c7x0_local_setup(host);
4448 /* COMPAT : the 700 and 700-66 need to use DFIFO_00_BO_MASK */
4449 count = ((NCR53c7x0_read8 (DFIFO_REG) & DFIFO_10_BO_MASK) -
4450 (NCR53c7x0_read32 (DBC_REG) & DFIFO_10_BO_MASK)) & DFIFO_10_BO_MASK;
4451 synchronous = NCR53c7x0_read8 (SXFER_REG) & SXFER_MO_MASK;
4452 /* COMPAT : DDIR is elsewhere on non-'8xx chips. */
4453 ddir = NCR53c7x0_read8 (CTEST0_REG_700) & CTEST0_700_DDIR;
4454
4455 if (ddir) {
4456 /* Receive */
4457 if (synchronous)
4458 count += (NCR53c7x0_read8 (SSTAT2_REG) & SSTAT2_FF_MASK) >> SSTAT2_FF_SHIFT;
4459 else
4460 if (NCR53c7x0_read8 (SSTAT1_REG) & SSTAT1_ILF)
4461 ++count;
4462 } else {
4463 /* Send */
4464 sstat = NCR53c7x0_read8 (SSTAT1_REG);
4465 if (sstat & SSTAT1_OLF)
4466 ++count;
4467 if (synchronous && (sstat & SSTAT1_ORF))
4468 ++count;
4469 }
4470 return count;
4471}
4472
4473/*
4474 * Function : static const char * sbcl_to_phase (int sbcl)_
4475 *
4476 * Purpose : Convert SBCL register to user-parsable phase representation
4477 *
4478 * Inputs : sbcl - value of sbcl register
4479 */
4480
4481
4482static const char *
4483sbcl_to_phase (int sbcl) {
4484 switch (sbcl & SBCL_PHASE_MASK) {
4485 case SBCL_PHASE_DATAIN:
4486 return "DATAIN";
4487 case SBCL_PHASE_DATAOUT:
4488 return "DATAOUT";
4489 case SBCL_PHASE_MSGIN:
4490 return "MSGIN";
4491 case SBCL_PHASE_MSGOUT:
4492 return "MSGOUT";
4493 case SBCL_PHASE_CMDOUT:
4494 return "CMDOUT";
4495 case SBCL_PHASE_STATIN:
4496 return "STATUSIN";
4497 default:
4498 return "unknown";
4499 }
4500}
4501
4502/*
4503 * Function : static const char * sstat2_to_phase (int sstat)_
4504 *
4505 * Purpose : Convert SSTAT2 register to user-parsable phase representation
4506 *
4507 * Inputs : sstat - value of sstat register
4508 */
4509
4510
4511static const char *
4512sstat2_to_phase (int sstat) {
4513 switch (sstat & SSTAT2_PHASE_MASK) {
4514 case SSTAT2_PHASE_DATAIN:
4515 return "DATAIN";
4516 case SSTAT2_PHASE_DATAOUT:
4517 return "DATAOUT";
4518 case SSTAT2_PHASE_MSGIN:
4519 return "MSGIN";
4520 case SSTAT2_PHASE_MSGOUT:
4521 return "MSGOUT";
4522 case SSTAT2_PHASE_CMDOUT:
4523 return "CMDOUT";
4524 case SSTAT2_PHASE_STATIN:
4525 return "STATUSIN";
4526 default:
4527 return "unknown";
4528 }
4529}
4530
4531/*
4532 * Function : static void intr_phase_mismatch (struct Scsi_Host *host,
4533 * struct NCR53c7x0_cmd *cmd)
4534 *
4535 * Purpose : Handle phase mismatch interrupts
4536 *
4537 * Inputs : host, cmd - host and NCR command causing the interrupt, cmd
4538 * may be NULL.
4539 *
4540 * Side effects : The abort_connected() routine is called or the NCR chip
4541 * is restarted, jumping to the command_complete entry point, or
4542 * patching the address and transfer count of the current instruction
4543 * and calling the msg_in entry point as appropriate.
4544 */
4545
4546static void
4547intr_phase_mismatch (struct Scsi_Host *host, struct NCR53c7x0_cmd *cmd) {
4548 NCR53c7x0_local_declare();
4549 u32 dbc_dcmd, *dsp, *dsp_next;
4550 unsigned char dcmd, sbcl;
4551 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
4552 host->hostdata[0];
4553 int residual;
4554 enum {ACTION_ABORT, ACTION_ABORT_PRINT, ACTION_CONTINUE} action =
4555 ACTION_ABORT_PRINT;
4556 const char *where = NULL;
4557
4558 NCR53c7x0_local_setup(host);
4559
4560 /*
4561 * Corrective action is based on where in the SCSI SCRIPT(tm) the error
4562 * occurred, as well as which SCSI phase we are currently in.
4563 */
4564 dsp_next = bus_to_virt(NCR53c7x0_read32(DSP_REG));
4565
4566 /*
4567 * Fetch the current instruction, and remove the operands for easier
4568 * interpretation.
4569 */
4570 dbc_dcmd = NCR53c7x0_read32(DBC_REG);
4571 dcmd = (dbc_dcmd & 0xff000000) >> 24;
4572 /*
4573 * Like other processors, the NCR adjusts the instruction pointer before
4574 * instruction decode. Set the DSP address back to what it should
4575 * be for this instruction based on its size (2 or 3 32 bit words).
4576 */
4577 dsp = dsp_next - NCR53c7x0_insn_size(dcmd);
4578
4579
4580 /*
4581 * Read new SCSI phase from the SBCL lines. Since all of our code uses
4582 * a WHEN conditional instead of an IF conditional, we don't need to
4583 * wait for a new REQ.
4584 */
4585 sbcl = NCR53c7x0_read8(SBCL_REG) & SBCL_PHASE_MASK;
4586
4587 if (!cmd) {
4588 action = ACTION_ABORT_PRINT;
4589 where = "no current command";
4590 /*
4591 * The way my SCSI SCRIPTS(tm) are architected, recoverable phase
4592 * mismatches should only occur where we're doing a multi-byte
4593 * BMI instruction. Specifically, this means
4594 *
4595 * - select messages (a SCSI-I target may ignore additional messages
4596 * after the IDENTIFY; any target may reject a SDTR or WDTR)
4597 *
4598 * - command out (targets may send a message to signal an error
4599 * condition, or go into STATUSIN after they've decided
4600 * they don't like the command.
4601 *
4602 * - reply_message (targets may reject a multi-byte message in the
4603 * middle)
4604 *
4605 * - data transfer routines (command completion with buffer space
4606 * left, disconnect message, or error message)
4607 */
4608 } else if (((dsp >= cmd->data_transfer_start &&
4609 dsp < cmd->data_transfer_end)) || dsp == (cmd->residual + 2)) {
4610 if ((dcmd & (DCMD_TYPE_MASK|DCMD_BMI_OP_MASK|DCMD_BMI_INDIRECT|
4611 DCMD_BMI_MSG|DCMD_BMI_CD)) == (DCMD_TYPE_BMI|
4612 DCMD_BMI_OP_MOVE_I)) {
4613 residual = datapath_residual (host);
4614 if (hostdata->options & OPTION_DEBUG_DISCONNECT)
4615 printk ("scsi%d : handling residual transfer (+ %d bytes from DMA FIFO)\n",
4616 host->host_no, residual);
4617
4618 /*
4619 * The first instruction is a CALL to the alternate handler for
4620 * this data transfer phase, so we can do calls to
4621 * munge_msg_restart as we would if control were passed
4622 * from normal dynamic code.
4623 */
4624 if (dsp != cmd->residual + 2) {
4625 cmd->residual[0] = ((DCMD_TYPE_TCI | DCMD_TCI_OP_CALL |
4626 ((dcmd & DCMD_BMI_IO) ? DCMD_TCI_IO : 0)) << 24) |
4627 DBC_TCI_WAIT_FOR_VALID | DBC_TCI_COMPARE_PHASE;
4628 cmd->residual[1] = virt_to_bus(hostdata->script)
4629 + ((dcmd & DCMD_BMI_IO)
4630 ? hostdata->E_other_in : hostdata->E_other_out);
4631 }
4632
4633 /*
4634 * The second instruction is the a data transfer block
4635 * move instruction, reflecting the pointer and count at the
4636 * time of the phase mismatch.
4637 */
4638 cmd->residual[2] = dbc_dcmd + residual;
4639 cmd->residual[3] = NCR53c7x0_read32(DNAD_REG) - residual;
4640
4641 /*
4642 * The third and final instruction is a jump to the instruction
4643 * which follows the instruction which had to be 'split'
4644 */
4645 if (dsp != cmd->residual + 2) {
4646 cmd->residual[4] = ((DCMD_TYPE_TCI|DCMD_TCI_OP_JUMP)
4647 << 24) | DBC_TCI_TRUE;
4648 cmd->residual[5] = virt_to_bus(dsp_next);
4649 }
4650
4651 /*
4652 * For the sake of simplicity, transfer control to the
4653 * conditional CALL at the start of the residual buffer.
4654 */
4655 hostdata->dsp = cmd->residual;
4656 hostdata->dsp_changed = 1;
4657 action = ACTION_CONTINUE;
4658 } else {
4659 where = "non-BMI dynamic DSA code";
4660 action = ACTION_ABORT_PRINT;
4661 }
4662 } else if (dsp == (hostdata->script + hostdata->E_select_msgout / 4 + 2)) {
4663 /* RGH 290697: Added +2 above, to compensate for the script
4664 * instruction which disables the selection timer. */
4665 /* Release ATN */
4666 NCR53c7x0_write8 (SOCL_REG, 0);
4667 switch (sbcl) {
4668 /*
4669 * Some devices (SQ555 come to mind) grab the IDENTIFY message
4670 * sent on selection, and decide to go into COMMAND OUT phase
4671 * rather than accepting the rest of the messages or rejecting
4672 * them. Handle these devices gracefully.
4673 */
4674 case SBCL_PHASE_CMDOUT:
4675 hostdata->dsp = dsp + 2 /* two _words_ */;
4676 hostdata->dsp_changed = 1;
4677 printk ("scsi%d : target %d ignored SDTR and went into COMMAND OUT\n",
4678 host->host_no, cmd->cmd->device->id);
4679 cmd->flags &= ~CMD_FLAG_SDTR;
4680 action = ACTION_CONTINUE;
4681 break;
4682 case SBCL_PHASE_MSGIN:
4683 hostdata->dsp = hostdata->script + hostdata->E_msg_in /
4684 sizeof(u32);
4685 hostdata->dsp_changed = 1;
4686 action = ACTION_CONTINUE;
4687 break;
4688 default:
4689 where="select message out";
4690 action = ACTION_ABORT_PRINT;
4691 }
4692 /*
4693 * Some SCSI devices will interpret a command as they read the bytes
4694 * off the SCSI bus, and may decide that the command is Bogus before
4695 * they've read the entire command off the bus.
4696 */
4697 } else if (dsp == hostdata->script + hostdata->E_cmdout_cmdout / sizeof
4698 (u32)) {
4699 hostdata->dsp = hostdata->script + hostdata->E_data_transfer /
4700 sizeof (u32);
4701 hostdata->dsp_changed = 1;
4702 action = ACTION_CONTINUE;
4703 /* FIXME : we need to handle message reject, etc. within msg_respond. */
4704#ifdef notyet
4705 } else if (dsp == hostdata->script + hostdata->E_reply_message) {
4706 switch (sbcl) {
4707 /* Any other phase mismatches abort the currently executing command. */
4708#endif
4709 } else {
4710 where = "unknown location";
4711 action = ACTION_ABORT_PRINT;
4712 }
4713
4714 /* Flush DMA FIFO */
4715 if (!hostdata->dstat_valid) {
4716 hostdata->dstat = NCR53c7x0_read8(DSTAT_REG);
4717 hostdata->dstat_valid = 1;
4718 }
4719 if (!(hostdata->dstat & DSTAT_DFE)) {
4720 /* Really need to check this out for 710 RGH */
4721 NCR53c7x0_write8 (CTEST8_REG, CTEST8_10_CLF);
4722 while (NCR53c7x0_read8 (CTEST8_REG) & CTEST8_10_CLF);
4723 hostdata->dstat |= DSTAT_DFE;
4724 }
4725
4726 switch (action) {
4727 case ACTION_ABORT_PRINT:
4728 printk("scsi%d : %s : unexpected phase %s.\n",
4729 host->host_no, where ? where : "unknown location",
4730 sbcl_to_phase(sbcl));
4731 print_lots (host);
4732 /* Fall through to ACTION_ABORT */
4733 case ACTION_ABORT:
4734 abort_connected (host);
4735 break;
4736 case ACTION_CONTINUE:
4737 break;
4738 }
4739
4740#if 0
4741 if (hostdata->dsp_changed) {
4742 printk("scsi%d: new dsp 0x%p\n", host->host_no, hostdata->dsp);
4743 print_insn (host, hostdata->dsp, "", 1);
4744 }
4745#endif
4746}
4747
4748/*
4749 * Function : static void intr_bf (struct Scsi_Host *host,
4750 * struct NCR53c7x0_cmd *cmd)
4751 *
4752 * Purpose : handle BUS FAULT interrupts
4753 *
4754 * Inputs : host, cmd - host and NCR command causing the interrupt, cmd
4755 * may be NULL.
4756 */
4757
4758static void
4759intr_bf (struct Scsi_Host *host, struct NCR53c7x0_cmd *cmd) {
4760 NCR53c7x0_local_declare();
4761 u32 *dsp,
4762 *next_dsp, /* Current dsp */
4763 *dsa,
4764 dbc_dcmd; /* DCMD (high eight bits) + DBC */
4765 char *reason = NULL;
4766 /* Default behavior is for a silent error, with a retry until we've
4767 exhausted retries. */
4768 enum {MAYBE, ALWAYS, NEVER} retry = MAYBE;
4769 int report = 0;
4770 NCR53c7x0_local_setup(host);
4771
4772 dbc_dcmd = NCR53c7x0_read32 (DBC_REG);
4773 next_dsp = bus_to_virt (NCR53c7x0_read32(DSP_REG));
4774 dsp = next_dsp - NCR53c7x0_insn_size ((dbc_dcmd >> 24) & 0xff);
4775/* FIXME - check chip type */
4776 dsa = bus_to_virt (NCR53c7x0_read32(DSA_REG));
4777
4778 /*
4779 * Bus faults can be caused by either a Bad Address or
4780 * Target Abort. We should check the Received Target Abort
4781 * bit of the PCI status register and Master Abort Bit.
4782 *
4783 * - Master Abort bit indicates that no device claimed
4784 * the address with DEVSEL within five clocks
4785 *
4786 * - Target Abort bit indicates that a target claimed it,
4787 * but changed its mind once it saw the byte enables.
4788 *
4789 */
4790
4791 /* 53c710, not PCI system */
4792 report = 1;
4793 reason = "Unknown";
4794
4795#ifndef notyet
4796 report = 1;
4797#endif
4798 if (report && reason)
4799 {
4800 printk(KERN_ALERT "scsi%d : BUS FAULT reason = %s\n",
4801 host->host_no, reason ? reason : "unknown");
4802 print_lots (host);
4803 }
4804
4805#ifndef notyet
4806 retry = NEVER;
4807#endif
4808
4809 /*
4810 * TODO : we should attempt to recover from any spurious bus
4811 * faults. After X retries, we should figure that things are
4812 * sufficiently wedged, and call NCR53c7xx_reset.
4813 *
4814 * This code should only get executed once we've decided that we
4815 * cannot retry.
4816 */
4817
4818 if (retry == NEVER) {
4819 printk(KERN_ALERT " mail richard@sleepie.demon.co.uk\n");
4820 FATAL (host);
4821 }
4822}
4823
4824/*
4825 * Function : static void intr_dma (struct Scsi_Host *host,
4826 * struct NCR53c7x0_cmd *cmd)
4827 *
4828 * Purpose : handle all DMA interrupts, indicated by the setting
4829 * of the DIP bit in the ISTAT register.
4830 *
4831 * Inputs : host, cmd - host and NCR command causing the interrupt, cmd
4832 * may be NULL.
4833 */
4834
4835static void
4836intr_dma (struct Scsi_Host *host, struct NCR53c7x0_cmd *cmd) {
4837 NCR53c7x0_local_declare();
4838 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
4839 host->hostdata[0];
4840 unsigned char dstat; /* DSTAT */
4841 u32 *dsp,
4842 *next_dsp, /* Current dsp */
4843 *dsa,
4844 dbc_dcmd; /* DCMD (high eight bits) + DBC */
4845 int tmp;
4846 unsigned long flags;
4847 NCR53c7x0_local_setup(host);
4848
4849 if (!hostdata->dstat_valid) {
4850 hostdata->dstat = NCR53c7x0_read8(DSTAT_REG);
4851 hostdata->dstat_valid = 1;
4852 }
4853
4854 dstat = hostdata->dstat;
4855
4856 if (hostdata->options & OPTION_DEBUG_INTR)
4857 printk("scsi%d : DSTAT=0x%x\n", host->host_no, (int) dstat);
4858
4859 dbc_dcmd = NCR53c7x0_read32 (DBC_REG);
4860 next_dsp = bus_to_virt(NCR53c7x0_read32(DSP_REG));
4861 dsp = next_dsp - NCR53c7x0_insn_size ((dbc_dcmd >> 24) & 0xff);
4862/* XXX - check chip type */
4863 dsa = bus_to_virt(NCR53c7x0_read32(DSA_REG));
4864
4865 /*
4866 * DSTAT_ABRT is the aborted interrupt. This is set whenever the
4867 * SCSI chip is aborted.
4868 *
4869 * With NCR53c700 and NCR53c700-66 style chips, we should only
4870 * get this when the chip is currently running the accept
4871 * reselect/select code and we have set the abort bit in the
4872 * ISTAT register.
4873 *
4874 */
4875
4876 if (dstat & DSTAT_ABRT) {
4877#if 0
4878 /* XXX - add code here to deal with normal abort */
4879 if ((hostdata->options & OPTION_700) && (hostdata->state ==
4880 STATE_ABORTING)) {
4881 } else
4882#endif
4883 {
4884 printk(KERN_ALERT "scsi%d : unexpected abort interrupt at\n"
4885 " ", host->host_no);
4886 print_insn (host, dsp, KERN_ALERT "s ", 1);
4887 FATAL (host);
4888 }
4889 }
4890
4891 /*
4892 * DSTAT_SSI is the single step interrupt. Should be generated
4893 * whenever we have single stepped or are tracing.
4894 */
4895
4896 if (dstat & DSTAT_SSI) {
4897 if (hostdata->options & OPTION_DEBUG_TRACE) {
4898 /* Don't print instr. until we write DSP at end of intr function */
4899 } else if (hostdata->options & OPTION_DEBUG_SINGLE) {
4900 print_insn (host, dsp, "s ", 0);
4901 local_irq_save(flags);
4902/* XXX - should we do this, or can we get away with writing dsp? */
4903
4904 NCR53c7x0_write8 (DCNTL_REG, (NCR53c7x0_read8(DCNTL_REG) &
4905 ~DCNTL_SSM) | DCNTL_STD);
4906 local_irq_restore(flags);
4907 } else {
4908 printk(KERN_ALERT "scsi%d : unexpected single step interrupt at\n"
4909 " ", host->host_no);
4910 print_insn (host, dsp, KERN_ALERT "", 1);
4911 printk(KERN_ALERT " mail drew@PoohSticks.ORG\n");
4912 FATAL (host);
4913 }
4914 }
4915
4916 /*
4917 * DSTAT_IID / DSTAT_OPC (same bit, same meaning, only the name
4918 * is different) is generated whenever an illegal instruction is
4919 * encountered.
4920 *
4921 * XXX - we may want to emulate INTFLY here, so we can use
4922 * the same SCSI SCRIPT (tm) for NCR53c710 through NCR53c810
4923 * chips.
4924 */
4925
4926 if (dstat & DSTAT_OPC) {
4927 /*
4928 * Ascertain if this IID interrupts occurred before or after a STO
4929 * interrupt. Since the interrupt handling code now leaves
4930 * DSP unmodified until _after_ all stacked interrupts have been
4931 * processed, reading the DSP returns the original DSP register.
4932 * This means that if dsp lies between the select code, and
4933 * message out following the selection code (where the IID interrupt
4934 * would have to have occurred by due to the implicit wait for REQ),
4935 * we have an IID interrupt resulting from a STO condition and
4936 * can ignore it.
4937 */
4938
4939 if (((dsp >= (hostdata->script + hostdata->E_select / sizeof(u32))) &&
4940 (dsp <= (hostdata->script + hostdata->E_select_msgout /
4941 sizeof(u32) + 8))) || (hostdata->test_running == 2)) {
4942 if (hostdata->options & OPTION_DEBUG_INTR)
4943 printk ("scsi%d : ignoring DSTAT_IID for SSTAT_STO\n",
4944 host->host_no);
4945 if (hostdata->expecting_iid) {
4946 hostdata->expecting_iid = 0;
4947 hostdata->idle = 1;
4948 if (hostdata->test_running == 2) {
4949 hostdata->test_running = 0;
4950 hostdata->test_completed = 3;
4951 } else if (cmd)
4952 abnormal_finished (cmd, DID_BAD_TARGET << 16);
4953 } else {
4954 hostdata->expecting_sto = 1;
4955 }
4956 /*
4957 * We can't guarantee we'll be able to execute the WAIT DISCONNECT
4958 * instruction within the 3.4us of bus free and arbitration delay
4959 * that a target can RESELECT in and assert REQ after we've dropped
4960 * ACK. If this happens, we'll get an illegal instruction interrupt.
4961 * Doing away with the WAIT DISCONNECT instructions broke everything,
4962 * so instead I'll settle for moving one WAIT DISCONNECT a few
4963 * instructions closer to the CLEAR ACK before it to minimize the
4964 * chances of this happening, and handle it if it occurs anyway.
4965 *
4966 * Simply continue with what we were doing, and control should
4967 * be transferred to the schedule routine which will ultimately
4968 * pass control onto the reselection or selection (not yet)
4969 * code.
4970 */
4971 } else if (dbc_dcmd == 0x48000000 && (NCR53c7x0_read8 (SBCL_REG) &
4972 SBCL_REQ)) {
4973 if (!(hostdata->options & OPTION_NO_PRINT_RACE))
4974 {
4975 printk("scsi%d: REQ before WAIT DISCONNECT IID\n",
4976 host->host_no);
4977 hostdata->options |= OPTION_NO_PRINT_RACE;
4978 }
4979 } else {
4980 printk(KERN_ALERT "scsi%d : invalid instruction\n", host->host_no);
4981 print_lots (host);
4982 printk(KERN_ALERT " mail Richard@sleepie.demon.co.uk with ALL\n"
4983 " boot messages and diagnostic output\n");
4984 FATAL (host);
4985 }
4986 }
4987
4988 /*
4989 * DSTAT_BF are bus fault errors. DSTAT_800_BF is valid for 710 also.
4990 */
4991
4992 if (dstat & DSTAT_800_BF) {
4993 intr_bf (host, cmd);
4994 }
4995
4996
4997 /*
4998 * DSTAT_SIR interrupts are generated by the execution of
4999 * the INT instruction. Since the exact values available
5000 * are determined entirely by the SCSI script running,
5001 * and are local to a particular script, a unique handler
5002 * is called for each script.
5003 */
5004
5005 if (dstat & DSTAT_SIR) {
5006 if (hostdata->options & OPTION_DEBUG_INTR)
5007 printk ("scsi%d : DSTAT_SIR\n", host->host_no);
5008 switch ((tmp = hostdata->dstat_sir_intr (host, cmd))) {
5009 case SPECIFIC_INT_NOTHING:
5010 case SPECIFIC_INT_RESTART:
5011 break;
5012 case SPECIFIC_INT_ABORT:
5013 abort_connected(host);
5014 break;
5015 case SPECIFIC_INT_PANIC:
5016 printk(KERN_ALERT "scsi%d : failure at ", host->host_no);
5017 print_insn (host, dsp, KERN_ALERT "", 1);
5018 printk(KERN_ALERT " dstat_sir_intr() returned SPECIFIC_INT_PANIC\n");
5019 FATAL (host);
5020 break;
5021 case SPECIFIC_INT_BREAK:
5022 intr_break (host, cmd);
5023 break;
5024 default:
5025 printk(KERN_ALERT "scsi%d : failure at ", host->host_no);
5026 print_insn (host, dsp, KERN_ALERT "", 1);
5027 printk(KERN_ALERT" dstat_sir_intr() returned unknown value %d\n",
5028 tmp);
5029 FATAL (host);
5030 }
5031 }
5032}
5033
5034/*
5035 * Function : static int print_insn (struct Scsi_Host *host,
5036 * u32 *insn, int kernel)
5037 *
5038 * Purpose : print numeric representation of the instruction pointed
5039 * to by insn to the debugging or kernel message buffer
5040 * as appropriate.
5041 *
5042 * If desired, a user level program can interpret this
5043 * information.
5044 *
5045 * Inputs : host, insn - host, pointer to instruction, prefix -
5046 * string to prepend, kernel - use printk instead of debugging buffer.
5047 *
5048 * Returns : size, in u32s, of instruction printed.
5049 */
5050
5051/*
5052 * FIXME: should change kernel parameter so that it takes an ENUM
5053 * specifying severity - either KERN_ALERT or KERN_PANIC so
5054 * all panic messages are output with the same severity.
5055 */
5056
5057static int
5058print_insn (struct Scsi_Host *host, const u32 *insn,
5059 const char *prefix, int kernel) {
5060 char buf[160], /* Temporary buffer and pointer. ICKY
5061 arbitrary length. */
5062
5063
5064 *tmp;
5065 unsigned char dcmd; /* dcmd register for *insn */
5066 int size;
5067
5068 /*
5069 * Check to see if the instruction pointer is not bogus before
5070 * indirecting through it; avoiding red-zone at start of
5071 * memory.
5072 *
5073 * FIXME: icky magic needs to happen here on non-intel boxes which
5074 * don't have kernel memory mapped in like this. Might be reasonable
5075 * to use vverify()?
5076 */
5077
5078 if (virt_to_phys((void *)insn) < PAGE_SIZE ||
5079 virt_to_phys((void *)(insn + 8)) > virt_to_phys(high_memory) ||
5080 ((((dcmd = (insn[0] >> 24) & 0xff) & DCMD_TYPE_MMI) == DCMD_TYPE_MMI) &&
5081 virt_to_phys((void *)(insn + 12)) > virt_to_phys(high_memory))) {
5082 size = 0;
5083 sprintf (buf, "%s%p: address out of range\n",
5084 prefix, insn);
5085 } else {
5086/*
5087 * FIXME : (void *) cast in virt_to_bus should be unnecessary, because
5088 * it should take const void * as argument.
5089 */
5090#if !defined(CONFIG_MVME16x) && !defined(CONFIG_BVME6000)
5091 sprintf(buf, "%s0x%lx (virt 0x%p) : 0x%08x 0x%08x (virt 0x%p)",
5092 (prefix ? prefix : ""), virt_to_bus((void *) insn), insn,
5093 insn[0], insn[1], bus_to_virt (insn[1]));
5094#else
5095 /* Remove virtual addresses to reduce output, as they are the same */
5096 sprintf(buf, "%s0x%x (+%x) : 0x%08x 0x%08x",
5097 (prefix ? prefix : ""), (u32)insn, ((u32)insn -
5098 (u32)&(((struct NCR53c7x0_hostdata *)host->hostdata[0])->script))/4,
5099 insn[0], insn[1]);
5100#endif
5101 tmp = buf + strlen(buf);
5102 if ((dcmd & DCMD_TYPE_MASK) == DCMD_TYPE_MMI) {
5103#if !defined(CONFIG_MVME16x) && !defined(CONFIG_BVME6000)
5104 sprintf (tmp, " 0x%08x (virt 0x%p)\n", insn[2],
5105 bus_to_virt(insn[2]));
5106#else
5107 /* Remove virtual addr to reduce output, as it is the same */
5108 sprintf (tmp, " 0x%08x\n", insn[2]);
5109#endif
5110 size = 3;
5111 } else {
5112 sprintf (tmp, "\n");
5113 size = 2;
5114 }
5115 }
5116
5117 if (kernel)
5118 printk ("%s", buf);
5119#ifdef NCR_DEBUG
5120 else {
5121 size_t len = strlen(buf);
5122 debugger_kernel_write(host, buf, len);
5123 }
5124#endif
5125 return size;
5126}
5127
5128/*
5129 * Function : int NCR53c7xx_abort (Scsi_Cmnd *cmd)
5130 *
5131 * Purpose : Abort an errant SCSI command, doing all necessary
5132 * cleanup of the issue_queue, running_list, shared Linux/NCR
5133 * dsa issue and reconnect queues.
5134 *
5135 * Inputs : cmd - command to abort, code - entire result field
5136 *
5137 * Returns : 0 on success, -1 on failure.
5138 */
5139
5140int
5141NCR53c7xx_abort (Scsi_Cmnd *cmd) {
5142 NCR53c7x0_local_declare();
5143 struct Scsi_Host *host = cmd->device->host;
5144 struct NCR53c7x0_hostdata *hostdata = host ? (struct NCR53c7x0_hostdata *)
5145 host->hostdata[0] : NULL;
5146 unsigned long flags;
5147 struct NCR53c7x0_cmd *curr, **prev;
5148 Scsi_Cmnd *me, **last;
5149#if 0
5150 static long cache_pid = -1;
5151#endif
5152
5153
5154 if (!host) {
5155 printk ("Bogus SCSI command pid %ld; no host structure\n",
5156 cmd->pid);
5157 return SCSI_ABORT_ERROR;
5158 } else if (!hostdata) {
5159 printk ("Bogus SCSI host %d; no hostdata\n", host->host_no);
5160 return SCSI_ABORT_ERROR;
5161 }
5162 NCR53c7x0_local_setup(host);
5163
5164/*
5165 * CHECK : I don't think that reading ISTAT will unstack any interrupts,
5166 * since we need to write the INTF bit to clear it, and SCSI/DMA
5167 * interrupts don't clear until we read SSTAT/SIST and DSTAT registers.
5168 *
5169 * See that this is the case. Appears to be correct on the 710, at least.
5170 *
5171 * I suspect that several of our failures may be coming from a new fatal
5172 * interrupt (possibly due to a phase mismatch) happening after we've left
5173 * the interrupt handler, but before the PIC has had the interrupt condition
5174 * cleared.
5175 */
5176
5177 if (NCR53c7x0_read8(hostdata->istat) & (ISTAT_DIP|ISTAT_SIP)) {
5178 printk ("scsi%d : dropped interrupt for command %ld\n", host->host_no,
5179 cmd->pid);
5180 NCR53c7x0_intr (host->irq, NULL, NULL);
5181 return SCSI_ABORT_BUSY;
5182 }
5183
5184 local_irq_save(flags);
5185#if 0
5186 if (cache_pid == cmd->pid)
5187 panic ("scsi%d : bloody fetus %d\n", host->host_no, cmd->pid);
5188 else
5189 cache_pid = cmd->pid;
5190#endif
5191
5192
5193/*
5194 * The command could be hiding in the issue_queue. This would be very
5195 * nice, as commands can't be moved from the high level driver's issue queue
5196 * into the shared queue until an interrupt routine is serviced, and this
5197 * moving is atomic.
5198 *
5199 * If this is the case, we don't have to worry about anything - we simply
5200 * pull the command out of the old queue, and call it aborted.
5201 */
5202
5203 for (me = (Scsi_Cmnd *) hostdata->issue_queue,
5204 last = (Scsi_Cmnd **) &(hostdata->issue_queue);
5205 me && me != cmd; last = (Scsi_Cmnd **)&(me->SCp.ptr),
5206 me = (Scsi_Cmnd *)me->SCp.ptr);
5207
5208 if (me) {
5209 *last = (Scsi_Cmnd *) me->SCp.ptr;
5210 if (me->host_scribble) {
5211 ((struct NCR53c7x0_cmd *)me->host_scribble)->next = hostdata->free;
5212 hostdata->free = (struct NCR53c7x0_cmd *) me->host_scribble;
5213 me->host_scribble = NULL;
5214 }
5215 cmd->result = DID_ABORT << 16;
5216 cmd->scsi_done(cmd);
5217 printk ("scsi%d : found command %ld in Linux issue queue\n",
5218 host->host_no, me->pid);
5219 local_irq_restore(flags);
5220 run_process_issue_queue();
5221 return SCSI_ABORT_SUCCESS;
5222 }
5223
5224/*
5225 * That failing, the command could be in our list of already executing
5226 * commands. If this is the case, drastic measures are called for.
5227 */
5228
5229 for (curr = (struct NCR53c7x0_cmd *) hostdata->running_list,
5230 prev = (struct NCR53c7x0_cmd **) &(hostdata->running_list);
5231 curr && curr->cmd != cmd; prev = (struct NCR53c7x0_cmd **)
5232 &(curr->next), curr = (struct NCR53c7x0_cmd *) curr->next);
5233
5234 if (curr) {
5235 if ((curr->result & 0xff) != 0xff && (curr->result & 0xff00) != 0xff00) {
5236 cmd->result = curr->result;
5237 if (prev)
5238 *prev = (struct NCR53c7x0_cmd *) curr->next;
5239 curr->next = (struct NCR53c7x0_cmd *) hostdata->free;
5240 cmd->host_scribble = NULL;
5241 hostdata->free = curr;
5242 cmd->scsi_done(cmd);
5243 printk ("scsi%d : found finished command %ld in running list\n",
5244 host->host_no, cmd->pid);
5245 local_irq_restore(flags);
5246 return SCSI_ABORT_NOT_RUNNING;
5247 } else {
5248 printk ("scsi%d : DANGER : command running, can not abort.\n",
5249 cmd->device->host->host_no);
5250 local_irq_restore(flags);
5251 return SCSI_ABORT_BUSY;
5252 }
5253 }
5254
5255/*
5256 * And if we couldn't find it in any of our queues, it must have been
5257 * a dropped interrupt.
5258 */
5259
5260 curr = (struct NCR53c7x0_cmd *) cmd->host_scribble;
5261 if (curr) {
5262 curr->next = hostdata->free;
5263 hostdata->free = curr;
5264 cmd->host_scribble = NULL;
5265 }
5266
5267 if (curr == NULL || ((curr->result & 0xff00) == 0xff00) ||
5268 ((curr->result & 0xff) == 0xff)) {
5269 printk ("scsi%d : did this command ever run?\n", host->host_no);
5270 cmd->result = DID_ABORT << 16;
5271 } else {
5272 printk ("scsi%d : probably lost INTFLY, normal completion\n",
5273 host->host_no);
5274 cmd->result = curr->result;
5275/*
5276 * FIXME : We need to add an additional flag which indicates if a
5277 * command was ever counted as BUSY, so if we end up here we can
5278 * decrement the busy count if and only if it is necessary.
5279 */
5280 --hostdata->busy[cmd->device->id][cmd->device->lun];
5281 }
5282 local_irq_restore(flags);
5283 cmd->scsi_done(cmd);
5284
5285/*
5286 * We need to run process_issue_queue since termination of this command
5287 * may allow another queued command to execute first?
5288 */
5289 return SCSI_ABORT_NOT_RUNNING;
5290}
5291
5292/*
5293 * Function : int NCR53c7xx_reset (Scsi_Cmnd *cmd)
5294 *
5295 * Purpose : perform a hard reset of the SCSI bus and NCR
5296 * chip.
5297 *
5298 * Inputs : cmd - command which caused the SCSI RESET
5299 *
5300 * Returns : 0 on success.
5301 */
5302
5303int
5304NCR53c7xx_reset (Scsi_Cmnd *cmd, unsigned int reset_flags) {
5305 NCR53c7x0_local_declare();
5306 unsigned long flags;
5307 int found = 0;
5308 struct NCR53c7x0_cmd * c;
5309 Scsi_Cmnd *tmp;
5310 /*
5311 * When we call scsi_done(), it's going to wake up anything sleeping on the
5312 * resources which were in use by the aborted commands, and we'll start to
5313 * get new commands.
5314 *
5315 * We can't let this happen until after we've re-initialized the driver
5316 * structures, and can't reinitialize those structures until after we've
5317 * dealt with their contents.
5318 *
5319 * So, we need to find all of the commands which were running, stick
5320 * them on a linked list of completed commands (we'll use the host_scribble
5321 * pointer), do our reinitialization, and then call the done function for
5322 * each command.
5323 */
5324 Scsi_Cmnd *nuke_list = NULL;
5325 struct Scsi_Host *host = cmd->device->host;
5326 struct NCR53c7x0_hostdata *hostdata =
5327 (struct NCR53c7x0_hostdata *) host->hostdata[0];
5328
5329 NCR53c7x0_local_setup(host);
5330 local_irq_save(flags);
5331 ncr_halt (host);
5332 print_lots (host);
5333 dump_events (host, 30);
5334 ncr_scsi_reset (host);
5335 for (tmp = nuke_list = return_outstanding_commands (host, 1 /* free */,
5336 0 /* issue */ ); tmp; tmp = (Scsi_Cmnd *) tmp->SCp.buffer)
5337 if (tmp == cmd) {
5338 found = 1;
5339 break;
5340 }
5341
5342 /*
5343 * If we didn't find the command which caused this reset in our running
5344 * list, then we've lost it. See that it terminates normally anyway.
5345 */
5346 if (!found) {
5347 c = (struct NCR53c7x0_cmd *) cmd->host_scribble;
5348 if (c) {
5349 cmd->host_scribble = NULL;
5350 c->next = hostdata->free;
5351 hostdata->free = c;
5352 } else
5353 printk ("scsi%d: lost command %ld\n", host->host_no, cmd->pid);
5354 cmd->SCp.buffer = (struct scatterlist *) nuke_list;
5355 nuke_list = cmd;
5356 }
5357
5358 NCR53c7x0_driver_init (host);
5359 hostdata->soft_reset (host);
5360 if (hostdata->resets == 0)
5361 disable(host);
5362 else if (hostdata->resets != -1)
5363 --hostdata->resets;
5364 local_irq_restore(flags);
5365 for (; nuke_list; nuke_list = tmp) {
5366 tmp = (Scsi_Cmnd *) nuke_list->SCp.buffer;
5367 nuke_list->result = DID_RESET << 16;
5368 nuke_list->scsi_done (nuke_list);
5369 }
5370 local_irq_restore(flags);
5371 return SCSI_RESET_SUCCESS;
5372}
5373
5374/*
5375 * The NCR SDMS bios follows Annex A of the SCSI-CAM draft, and
5376 * therefore shares the scsicam_bios_param function.
5377 */
5378
5379/*
5380 * Function : int insn_to_offset (Scsi_Cmnd *cmd, u32 *insn)
5381 *
5382 * Purpose : convert instructions stored at NCR pointer into data
5383 * pointer offset.
5384 *
5385 * Inputs : cmd - SCSI command; insn - pointer to instruction. Either current
5386 * DSP, or saved data pointer.
5387 *
5388 * Returns : offset on success, -1 on failure.
5389 */
5390
5391
5392static int
5393insn_to_offset (Scsi_Cmnd *cmd, u32 *insn) {
5394 struct NCR53c7x0_hostdata *hostdata =
5395 (struct NCR53c7x0_hostdata *) cmd->device->host->hostdata[0];
5396 struct NCR53c7x0_cmd *ncmd =
5397 (struct NCR53c7x0_cmd *) cmd->host_scribble;
5398 int offset = 0, buffers;
5399 struct scatterlist *segment;
5400 char *ptr;
5401 int found = 0;
5402
5403/*
5404 * With the current code implementation, if the insn is inside dynamically
5405 * generated code, the data pointer will be the instruction preceding
5406 * the next transfer segment.
5407 */
5408
5409 if (!check_address ((unsigned long) ncmd, sizeof (struct NCR53c7x0_cmd)) &&
5410 ((insn >= ncmd->data_transfer_start &&
5411 insn < ncmd->data_transfer_end) ||
5412 (insn >= ncmd->residual &&
5413 insn < (ncmd->residual +
5414 sizeof(ncmd->residual))))) {
5415 ptr = bus_to_virt(insn[3]);
5416
5417 if ((buffers = cmd->use_sg)) {
5418 for (offset = 0,
5419 segment = (struct scatterlist *) cmd->request_buffer;
5420 buffers && !((found = ((ptr >= (char *)page_address(segment->page)+segment->offset) &&
5421 (ptr < ((char *)page_address(segment->page)+segment->offset+segment->length)))));
5422 --buffers, offset += segment->length, ++segment)
5423#if 0
5424 printk("scsi%d: comparing 0x%p to 0x%p\n",
5425 cmd->device->host->host_no, saved, page_address(segment->page+segment->offset));
5426#else
5427 ;
5428#endif
5429 offset += ptr - ((char *)page_address(segment->page)+segment->offset);
5430 } else {
5431 found = 1;
5432 offset = ptr - (char *) (cmd->request_buffer);
5433 }
5434 } else if ((insn >= hostdata->script +
5435 hostdata->E_data_transfer / sizeof(u32)) &&
5436 (insn <= hostdata->script +
5437 hostdata->E_end_data_transfer / sizeof(u32))) {
5438 found = 1;
5439 offset = 0;
5440 }
5441 return found ? offset : -1;
5442}
5443
5444
5445
5446/*
5447 * Function : void print_progress (Scsi_Cmnd *cmd)
5448 *
5449 * Purpose : print the current location of the saved data pointer
5450 *
5451 * Inputs : cmd - command we are interested in
5452 *
5453 */
5454
5455static void
5456print_progress (Scsi_Cmnd *cmd) {
5457 NCR53c7x0_local_declare();
5458 struct NCR53c7x0_cmd *ncmd =
5459 (struct NCR53c7x0_cmd *) cmd->host_scribble;
5460 int offset, i;
5461 char *where;
5462 u32 *ptr;
5463 NCR53c7x0_local_setup (cmd->device->host);
5464
5465 if (check_address ((unsigned long) ncmd,sizeof (struct NCR53c7x0_cmd)) == 0)
5466 {
5467 printk("\nNCR53c7x0_cmd fields:\n");
5468 printk(" bounce.len=0x%x, addr=0x%0x, buf[]=0x%02x %02x %02x %02x\n",
5469 ncmd->bounce.len, ncmd->bounce.addr, ncmd->bounce.buf[0],
5470 ncmd->bounce.buf[1], ncmd->bounce.buf[2], ncmd->bounce.buf[3]);
5471 printk(" result=%04x, cdb[0]=0x%02x\n", ncmd->result, ncmd->cmnd[0]);
5472 }
5473
5474 for (i = 0; i < 2; ++i) {
5475 if (check_address ((unsigned long) ncmd,
5476 sizeof (struct NCR53c7x0_cmd)) == -1)
5477 continue;
5478 if (!i) {
5479 where = "saved";
5480 ptr = bus_to_virt(ncmd->saved_data_pointer);
5481 } else {
5482 where = "active";
5483 ptr = bus_to_virt (NCR53c7x0_read32 (DSP_REG) -
5484 NCR53c7x0_insn_size (NCR53c7x0_read8 (DCMD_REG)) *
5485 sizeof(u32));
5486 }
5487 offset = insn_to_offset (cmd, ptr);
5488
5489 if (offset != -1)
5490 printk ("scsi%d : %s data pointer at offset %d\n",
5491 cmd->device->host->host_no, where, offset);
5492 else {
5493 int size;
5494 printk ("scsi%d : can't determine %s data pointer offset\n",
5495 cmd->device->host->host_no, where);
5496 if (ncmd) {
5497 size = print_insn (cmd->device->host,
5498 bus_to_virt(ncmd->saved_data_pointer), "", 1);
5499 print_insn (cmd->device->host,
5500 bus_to_virt(ncmd->saved_data_pointer) + size * sizeof(u32),
5501 "", 1);
5502 }
5503 }
5504 }
5505}
5506
5507
5508static void
5509print_dsa (struct Scsi_Host *host, u32 *dsa, const char *prefix) {
5510 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5511 host->hostdata[0];
5512 int i, len;
5513 char *ptr;
5514 Scsi_Cmnd *cmd;
5515
5516 if (check_address ((unsigned long) dsa, hostdata->dsa_end -
5517 hostdata->dsa_start) == -1) {
5518 printk("scsi%d : bad dsa virt 0x%p\n", host->host_no, dsa);
5519 return;
5520 }
5521 printk("%sscsi%d : dsa at phys 0x%lx (virt 0x%p)\n"
5522 " + %d : dsa_msgout length = %u, data = 0x%x (virt 0x%p)\n" ,
5523 prefix ? prefix : "",
5524 host->host_no, virt_to_bus (dsa), dsa, hostdata->dsa_msgout,
5525 dsa[hostdata->dsa_msgout / sizeof(u32)],
5526 dsa[hostdata->dsa_msgout / sizeof(u32) + 1],
5527 bus_to_virt (dsa[hostdata->dsa_msgout / sizeof(u32) + 1]));
5528
5529 /*
5530 * Only print messages if they're sane in length so we don't
5531 * blow the kernel printk buffer on something which won't buy us
5532 * anything.
5533 */
5534
5535 if (dsa[hostdata->dsa_msgout / sizeof(u32)] <
5536 sizeof (hostdata->free->select))
5537 for (i = dsa[hostdata->dsa_msgout / sizeof(u32)],
5538 ptr = bus_to_virt (dsa[hostdata->dsa_msgout / sizeof(u32) + 1]);
5539 i > 0 && !check_address ((unsigned long) ptr, 1);
5540 ptr += len, i -= len) {
5541 printk(" ");
5542 len = spi_print_msg(ptr);
5543 printk("\n");
5544 if (!len)
5545 break;
5546 }
5547
5548 printk(" + %d : select_indirect = 0x%x\n",
5549 hostdata->dsa_select, dsa[hostdata->dsa_select / sizeof(u32)]);
5550 cmd = (Scsi_Cmnd *) bus_to_virt(dsa[hostdata->dsa_cmnd / sizeof(u32)]);
5551 printk(" + %d : dsa_cmnd = 0x%x ", hostdata->dsa_cmnd,
5552 (u32) virt_to_bus(cmd));
5553 /* XXX Maybe we should access cmd->host_scribble->result here. RGH */
5554 if (cmd) {
5555 printk(" result = 0x%x, target = %d, lun = %d, cmd = ",
5556 cmd->result, cmd->device->id, cmd->device->lun);
5557 __scsi_print_command(cmd->cmnd);
5558 } else
5559 printk("\n");
5560 printk(" + %d : dsa_next = 0x%x\n", hostdata->dsa_next,
5561 dsa[hostdata->dsa_next / sizeof(u32)]);
5562 if (cmd) {
5563 printk("scsi%d target %d : sxfer_sanity = 0x%x, scntl3_sanity = 0x%x\n"
5564 " script : ",
5565 host->host_no, cmd->device->id,
5566 hostdata->sync[cmd->device->id].sxfer_sanity,
5567 hostdata->sync[cmd->device->id].scntl3_sanity);
5568 for (i = 0; i < (sizeof(hostdata->sync[cmd->device->id].script) / 4); ++i)
5569 printk ("0x%x ", hostdata->sync[cmd->device->id].script[i]);
5570 printk ("\n");
5571 print_progress (cmd);
5572 }
5573}
5574/*
5575 * Function : void print_queues (Scsi_Host *host)
5576 *
5577 * Purpose : print the contents of the NCR issue and reconnect queues
5578 *
5579 * Inputs : host - SCSI host we are interested in
5580 *
5581 */
5582
5583static void
5584print_queues (struct Scsi_Host *host) {
5585 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5586 host->hostdata[0];
5587 u32 *dsa, *next_dsa;
5588 volatile u32 *ncrcurrent;
5589 int left;
5590 Scsi_Cmnd *cmd, *next_cmd;
5591 unsigned long flags;
5592
5593 printk ("scsi%d : issue queue\n", host->host_no);
5594
5595 for (left = host->can_queue, cmd = (Scsi_Cmnd *) hostdata->issue_queue;
5596 left >= 0 && cmd;
5597 cmd = next_cmd) {
5598 next_cmd = (Scsi_Cmnd *) cmd->SCp.ptr;
5599 local_irq_save(flags);
5600 if (cmd->host_scribble) {
5601 if (check_address ((unsigned long) (cmd->host_scribble),
5602 sizeof (cmd->host_scribble)) == -1)
5603 printk ("scsi%d: scsi pid %ld bad pointer to NCR53c7x0_cmd\n",
5604 host->host_no, cmd->pid);
5605 /* print_dsa does sanity check on address, no need to check */
5606 else
5607 print_dsa (host, ((struct NCR53c7x0_cmd *) cmd->host_scribble)
5608 -> dsa, "");
5609 } else
5610 printk ("scsi%d : scsi pid %ld for target %d lun %d has no NCR53c7x0_cmd\n",
5611 host->host_no, cmd->pid, cmd->device->id, cmd->device->lun);
5612 local_irq_restore(flags);
5613 }
5614
5615 if (left <= 0) {
5616 printk ("scsi%d : loop detected in issue queue\n",
5617 host->host_no);
5618 }
5619
5620 /*
5621 * Traverse the NCR reconnect and start DSA structures, printing out
5622 * each element until we hit the end or detect a loop. Currently,
5623 * the reconnect structure is a linked list; and the start structure
5624 * is an array. Eventually, the reconnect structure will become a
5625 * list as well, since this simplifies the code.
5626 */
5627
5628 printk ("scsi%d : schedule dsa array :\n", host->host_no);
5629 for (left = host->can_queue, ncrcurrent = hostdata->schedule;
5630 left > 0; ncrcurrent += 2, --left)
5631 if (ncrcurrent[0] != hostdata->NOP_insn)
5632/* FIXME : convert pointer to dsa_begin to pointer to dsa. */
5633 print_dsa (host, bus_to_virt (ncrcurrent[1] -
5634 (hostdata->E_dsa_code_begin -
5635 hostdata->E_dsa_code_template)), "");
5636 printk ("scsi%d : end schedule dsa array\n", host->host_no);
5637
5638 printk ("scsi%d : reconnect_dsa_head :\n", host->host_no);
5639
5640 for (left = host->can_queue,
5641 dsa = bus_to_virt (hostdata->reconnect_dsa_head);
5642 left >= 0 && dsa;
5643 dsa = next_dsa) {
5644 local_irq_save(flags);
5645 if (check_address ((unsigned long) dsa, sizeof(dsa)) == -1) {
5646 printk ("scsi%d: bad DSA pointer 0x%p", host->host_no,
5647 dsa);
5648 next_dsa = NULL;
5649 }
5650 else
5651 {
5652 next_dsa = bus_to_virt(dsa[hostdata->dsa_next / sizeof(u32)]);
5653 print_dsa (host, dsa, "");
5654 }
5655 local_irq_restore(flags);
5656 }
5657 printk ("scsi%d : end reconnect_dsa_head\n", host->host_no);
5658 if (left < 0)
5659 printk("scsi%d: possible loop in ncr reconnect list\n",
5660 host->host_no);
5661}
5662
5663static void
5664print_lots (struct Scsi_Host *host) {
5665 NCR53c7x0_local_declare();
5666 struct NCR53c7x0_hostdata *hostdata =
5667 (struct NCR53c7x0_hostdata *) host->hostdata[0];
5668 u32 *dsp_next, *dsp, *dsa, dbc_dcmd;
5669 unsigned char dcmd, sbcl;
5670 int i, size;
5671 NCR53c7x0_local_setup(host);
5672
5673 if ((dsp_next = bus_to_virt(NCR53c7x0_read32 (DSP_REG)))) {
5674 dbc_dcmd = NCR53c7x0_read32(DBC_REG);
5675 dcmd = (dbc_dcmd & 0xff000000) >> 24;
5676 dsp = dsp_next - NCR53c7x0_insn_size(dcmd);
5677 dsa = bus_to_virt(NCR53c7x0_read32(DSA_REG));
5678 sbcl = NCR53c7x0_read8 (SBCL_REG);
5679
5680 /*
5681 * For the 53c710, the following will report value 0 for SCNTL3
5682 * and STEST0 - we don't have these registers.
5683 */
5684 printk ("scsi%d : DCMD|DBC=0x%x, DNAD=0x%x (virt 0x%p)\n"
5685 " DSA=0x%lx (virt 0x%p)\n"
5686 " DSPS=0x%x, TEMP=0x%x (virt 0x%p), DMODE=0x%x\n"
5687 " SXFER=0x%x, SCNTL3=0x%x\n"
5688 " %s%s%sphase=%s, %d bytes in SCSI FIFO\n"
5689 " SCRATCH=0x%x, saved2_dsa=0x%0lx\n",
5690 host->host_no, dbc_dcmd, NCR53c7x0_read32(DNAD_REG),
5691 bus_to_virt(NCR53c7x0_read32(DNAD_REG)),
5692 virt_to_bus(dsa), dsa,
5693 NCR53c7x0_read32(DSPS_REG), NCR53c7x0_read32(TEMP_REG),
5694 bus_to_virt (NCR53c7x0_read32(TEMP_REG)),
5695 (int) NCR53c7x0_read8(hostdata->dmode),
5696 (int) NCR53c7x0_read8(SXFER_REG),
5697 ((hostdata->chip / 100) == 8) ?
5698 (int) NCR53c7x0_read8(SCNTL3_REG_800) : 0,
5699 (sbcl & SBCL_BSY) ? "BSY " : "",
5700 (sbcl & SBCL_SEL) ? "SEL " : "",
5701 (sbcl & SBCL_REQ) ? "REQ " : "",
5702 sstat2_to_phase(NCR53c7x0_read8 (((hostdata->chip / 100) == 8) ?
5703 SSTAT1_REG : SSTAT2_REG)),
5704 (NCR53c7x0_read8 ((hostdata->chip / 100) == 8 ?
5705 SSTAT1_REG : SSTAT2_REG) & SSTAT2_FF_MASK) >> SSTAT2_FF_SHIFT,
5706 ((hostdata->chip / 100) == 8) ? NCR53c7x0_read8 (STEST0_REG_800) :
5707 NCR53c7x0_read32(SCRATCHA_REG_800),
5708 hostdata->saved2_dsa);
5709 printk ("scsi%d : DSP 0x%lx (virt 0x%p) ->\n", host->host_no,
5710 virt_to_bus(dsp), dsp);
5711 for (i = 6; i > 0; --i, dsp += size)
5712 size = print_insn (host, dsp, "", 1);
5713 if (NCR53c7x0_read8 (SCNTL1_REG) & SCNTL1_CON) {
5714 if ((hostdata->chip / 100) == 8)
5715 printk ("scsi%d : connected (SDID=0x%x, SSID=0x%x)\n",
5716 host->host_no, NCR53c7x0_read8 (SDID_REG_800),
5717 NCR53c7x0_read8 (SSID_REG_800));
5718 else
5719 printk ("scsi%d : connected (SDID=0x%x)\n",
5720 host->host_no, NCR53c7x0_read8 (SDID_REG_700));
5721 print_dsa (host, dsa, "");
5722 }
5723
5724#if 1
5725 print_queues (host);
5726#endif
5727 }
5728}
5729
5730/*
5731 * Function : static int shutdown (struct Scsi_Host *host)
5732 *
5733 * Purpose : does a clean (we hope) shutdown of the NCR SCSI
5734 * chip. Use prior to dumping core, unloading the NCR driver,
5735 *
5736 * Returns : 0 on success
5737 */
5738static int
5739shutdown (struct Scsi_Host *host) {
5740 NCR53c7x0_local_declare();
5741 unsigned long flags;
5742 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5743 host->hostdata[0];
5744 NCR53c7x0_local_setup(host);
5745 local_irq_save(flags);
5746/* Get in a state where we can reset the SCSI bus */
5747 ncr_halt (host);
5748 ncr_scsi_reset (host);
5749 hostdata->soft_reset(host);
5750
5751 disable (host);
5752 local_irq_restore(flags);
5753 return 0;
5754}
5755
5756/*
5757 * Function : void ncr_scsi_reset (struct Scsi_Host *host)
5758 *
5759 * Purpose : reset the SCSI bus.
5760 */
5761
5762static void
5763ncr_scsi_reset (struct Scsi_Host *host) {
5764 NCR53c7x0_local_declare();
5765 unsigned long flags;
5766 NCR53c7x0_local_setup(host);
5767 local_irq_save(flags);
5768 NCR53c7x0_write8(SCNTL1_REG, SCNTL1_RST);
5769 udelay(25); /* Minimum amount of time to assert RST */
5770 NCR53c7x0_write8(SCNTL1_REG, 0);
5771 local_irq_restore(flags);
5772}
5773
5774/*
5775 * Function : void hard_reset (struct Scsi_Host *host)
5776 *
5777 */
5778
5779static void
5780hard_reset (struct Scsi_Host *host) {
5781 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5782 host->hostdata[0];
5783 unsigned long flags;
5784 local_irq_save(flags);
5785 ncr_scsi_reset(host);
5786 NCR53c7x0_driver_init (host);
5787 if (hostdata->soft_reset)
5788 hostdata->soft_reset (host);
5789 local_irq_restore(flags);
5790}
5791
5792
5793/*
5794 * Function : Scsi_Cmnd *return_outstanding_commands (struct Scsi_Host *host,
5795 * int free, int issue)
5796 *
5797 * Purpose : return a linked list (using the SCp.buffer field as next,
5798 * so we don't perturb hostdata. We don't use a field of the
5799 * NCR53c7x0_cmd structure since we may not have allocated one
5800 * for the command causing the reset.) of Scsi_Cmnd structures that
5801 * had propagated below the Linux issue queue level. If free is set,
5802 * free the NCR53c7x0_cmd structures which are associated with
5803 * the Scsi_Cmnd structures, and clean up any internal
5804 * NCR lists that the commands were on. If issue is set,
5805 * also return commands in the issue queue.
5806 *
5807 * Returns : linked list of commands
5808 *
5809 * NOTE : the caller should insure that the NCR chip is halted
5810 * if the free flag is set.
5811 */
5812
5813static Scsi_Cmnd *
5814return_outstanding_commands (struct Scsi_Host *host, int free, int issue) {
5815 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5816 host->hostdata[0];
5817 struct NCR53c7x0_cmd *c;
5818 int i;
5819 u32 *ncrcurrent;
5820 Scsi_Cmnd *list = NULL, *tmp;
5821 for (c = (struct NCR53c7x0_cmd *) hostdata->running_list; c;
5822 c = (struct NCR53c7x0_cmd *) c->next) {
5823 if (c->cmd->SCp.buffer) {
5824 printk ("scsi%d : loop detected in running list!\n", host->host_no);
5825 break;
5826 } else {
5827 printk ("Duh? Bad things happening in the NCR driver\n");
5828 break;
5829 }
5830
5831 c->cmd->SCp.buffer = (struct scatterlist *) list;
5832 list = c->cmd;
5833 if (free) {
5834 c->next = hostdata->free;
5835 hostdata->free = c;
5836 }
5837 }
5838
5839 if (free) {
5840 for (i = 0, ncrcurrent = (u32 *) hostdata->schedule;
5841 i < host->can_queue; ++i, ncrcurrent += 2) {
5842 ncrcurrent[0] = hostdata->NOP_insn;
5843 ncrcurrent[1] = 0xdeadbeef;
5844 }
5845 hostdata->ncrcurrent = NULL;
5846 }
5847
5848 if (issue) {
5849 for (tmp = (Scsi_Cmnd *) hostdata->issue_queue; tmp; tmp = tmp->next) {
5850 if (tmp->SCp.buffer) {
5851 printk ("scsi%d : loop detected in issue queue!\n",
5852 host->host_no);
5853 break;
5854 }
5855 tmp->SCp.buffer = (struct scatterlist *) list;
5856 list = tmp;
5857 }
5858 if (free)
5859 hostdata->issue_queue = NULL;
5860
5861 }
5862 return list;
5863}
5864
5865/*
5866 * Function : static int disable (struct Scsi_Host *host)
5867 *
5868 * Purpose : disables the given NCR host, causing all commands
5869 * to return a driver error. Call this so we can unload the
5870 * module during development and try again. Eventually,
5871 * we should be able to find clean workarounds for these
5872 * problems.
5873 *
5874 * Inputs : host - hostadapter to twiddle
5875 *
5876 * Returns : 0 on success.
5877 */
5878
5879static int
5880disable (struct Scsi_Host *host) {
5881 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5882 host->hostdata[0];
5883 unsigned long flags;
5884 Scsi_Cmnd *nuke_list, *tmp;
5885 local_irq_save(flags);
5886 if (hostdata->state != STATE_HALTED)
5887 ncr_halt (host);
5888 nuke_list = return_outstanding_commands (host, 1 /* free */, 1 /* issue */);
5889 hard_reset (host);
5890 hostdata->state = STATE_DISABLED;
5891 local_irq_restore(flags);
5892 printk ("scsi%d : nuking commands\n", host->host_no);
5893 for (; nuke_list; nuke_list = tmp) {
5894 tmp = (Scsi_Cmnd *) nuke_list->SCp.buffer;
5895 nuke_list->result = DID_ERROR << 16;
5896 nuke_list->scsi_done(nuke_list);
5897 }
5898 printk ("scsi%d : done. \n", host->host_no);
5899 printk (KERN_ALERT "scsi%d : disabled. Unload and reload\n",
5900 host->host_no);
5901 return 0;
5902}
5903
5904/*
5905 * Function : static int ncr_halt (struct Scsi_Host *host)
5906 *
5907 * Purpose : halts the SCSI SCRIPTS(tm) processor on the NCR chip
5908 *
5909 * Inputs : host - SCSI chip to halt
5910 *
5911 * Returns : 0 on success
5912 */
5913
5914static int
5915ncr_halt (struct Scsi_Host *host) {
5916 NCR53c7x0_local_declare();
5917 unsigned long flags;
5918 unsigned char istat, tmp;
5919 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5920 host->hostdata[0];
5921 int stage;
5922 NCR53c7x0_local_setup(host);
5923
5924 local_irq_save(flags);
5925 /* Stage 0 : eat all interrupts
5926 Stage 1 : set ABORT
5927 Stage 2 : eat all but abort interrupts
5928 Stage 3 : eat all interrupts
5929 */
5930 for (stage = 0;;) {
5931 if (stage == 1) {
5932 NCR53c7x0_write8(hostdata->istat, ISTAT_ABRT);
5933 ++stage;
5934 }
5935 istat = NCR53c7x0_read8 (hostdata->istat);
5936 if (istat & ISTAT_SIP) {
5937 tmp = NCR53c7x0_read8(SSTAT0_REG);
5938 } else if (istat & ISTAT_DIP) {
5939 tmp = NCR53c7x0_read8(DSTAT_REG);
5940 if (stage == 2) {
5941 if (tmp & DSTAT_ABRT) {
5942 NCR53c7x0_write8(hostdata->istat, 0);
5943 ++stage;
5944 } else {
5945 printk(KERN_ALERT "scsi%d : could not halt NCR chip\n",
5946 host->host_no);
5947 disable (host);
5948 }
5949 }
5950 }
5951 if (!(istat & (ISTAT_SIP|ISTAT_DIP))) {
5952 if (stage == 0)
5953 ++stage;
5954 else if (stage == 3)
5955 break;
5956 }
5957 }
5958 hostdata->state = STATE_HALTED;
5959 local_irq_restore(flags);
5960#if 0
5961 print_lots (host);
5962#endif
5963 return 0;
5964}
5965
5966/*
5967 * Function: event_name (int event)
5968 *
5969 * Purpose: map event enum into user-readable strings.
5970 */
5971
5972static const char *
5973event_name (int event) {
5974 switch (event) {
5975 case EVENT_NONE: return "none";
5976 case EVENT_ISSUE_QUEUE: return "to issue queue";
5977 case EVENT_START_QUEUE: return "to start queue";
5978 case EVENT_SELECT: return "selected";
5979 case EVENT_DISCONNECT: return "disconnected";
5980 case EVENT_RESELECT: return "reselected";
5981 case EVENT_COMPLETE: return "completed";
5982 case EVENT_IDLE: return "idle";
5983 case EVENT_SELECT_FAILED: return "select failed";
5984 case EVENT_BEFORE_SELECT: return "before select";
5985 case EVENT_RESELECT_FAILED: return "reselect failed";
5986 default: return "unknown";
5987 }
5988}
5989
5990/*
5991 * Function : void dump_events (struct Scsi_Host *host, count)
5992 *
5993 * Purpose : print last count events which have occurred.
5994 */
5995static void
5996dump_events (struct Scsi_Host *host, int count) {
5997 struct NCR53c7x0_hostdata *hostdata = (struct NCR53c7x0_hostdata *)
5998 host->hostdata[0];
5999 struct NCR53c7x0_event event;
6000 int i;
6001 unsigned long flags;
6002 if (hostdata->events) {
6003 if (count > hostdata->event_size)
6004 count = hostdata->event_size;
6005 for (i = hostdata->event_index; count > 0;
6006 i = (i ? i - 1 : hostdata->event_size -1), --count) {
6007/*
6008 * By copying the event we're currently examining with interrupts
6009 * disabled, we can do multiple printk(), etc. operations and
6010 * still be guaranteed that they're happening on the same
6011 * event structure.
6012 */
6013 local_irq_save(flags);
6014#if 0
6015 event = hostdata->events[i];
6016#else
6017 memcpy ((void *) &event, (void *) &(hostdata->events[i]),
6018 sizeof(event));
6019#endif
6020
6021 local_irq_restore(flags);
6022 printk ("scsi%d : %s event %d at %ld secs %ld usecs target %d lun %d\n",
6023 host->host_no, event_name (event.event), count,
6024 (long) event.time.tv_sec, (long) event.time.tv_usec,
6025 event.target, event.lun);
6026 if (event.dsa)
6027 printk (" event for dsa 0x%lx (virt 0x%p)\n",
6028 virt_to_bus(event.dsa), event.dsa);
6029 if (event.pid != -1) {
6030 printk (" event for pid %ld ", event.pid);
6031 __scsi_print_command (event.cmnd);
6032 }
6033 }
6034 }
6035}
6036
6037/*
6038 * Function: check_address
6039 *
6040 * Purpose: Check to see if a possibly corrupt pointer will fault the
6041 * kernel.
6042 *
6043 * Inputs: addr - address; size - size of area
6044 *
6045 * Returns: 0 if area is OK, -1 on error.
6046 *
6047 * NOTES: should be implemented in terms of vverify on kernels
6048 * that have it.
6049 */
6050
6051static int
6052check_address (unsigned long addr, int size) {
6053 return (virt_to_phys((void *)addr) < PAGE_SIZE || virt_to_phys((void *)(addr + size)) > virt_to_phys(high_memory) ? -1 : 0);
6054}
6055
6056#ifdef MODULE
6057int
6058NCR53c7x0_release(struct Scsi_Host *host) {
6059 struct NCR53c7x0_hostdata *hostdata =
6060 (struct NCR53c7x0_hostdata *) host->hostdata[0];
6061 struct NCR53c7x0_cmd *cmd, *tmp;
6062 shutdown (host);
6063 if (host->irq != SCSI_IRQ_NONE)
6064 {
6065 int irq_count;
6066 struct Scsi_Host *tmp;
6067 for (irq_count = 0, tmp = first_host; tmp; tmp = tmp->next)
6068 if (tmp->hostt == the_template && tmp->irq == host->irq)
6069 ++irq_count;
6070 if (irq_count == 1)
6071 free_irq(host->irq, NULL);
6072 }
6073 if (host->dma_channel != DMA_NONE)
6074 free_dma(host->dma_channel);
6075 if (host->io_port)
6076 release_region(host->io_port, host->n_io_port);
6077
6078 for (cmd = (struct NCR53c7x0_cmd *) hostdata->free; cmd; cmd = tmp,
6079 --hostdata->num_cmds) {
6080 tmp = (struct NCR53c7x0_cmd *) cmd->next;
6081 /*
6082 * If we're going to loop, try to stop it to get a more accurate
6083 * count of the leaked commands.
6084 */
6085 cmd->next = NULL;
6086 if (cmd->free)
6087 cmd->free ((void *) cmd->real, cmd->size);
6088 }
6089 if (hostdata->num_cmds)
6090 printk ("scsi%d : leaked %d NCR53c7x0_cmd structures\n",
6091 host->host_no, hostdata->num_cmds);
6092
6093 vfree(hostdata->events);
6094
6095 /* XXX This assumes default cache mode to be IOMAP_FULL_CACHING, which
6096 * XXX may be invalid (CONFIG_060_WRITETHROUGH)
6097 */
6098 kernel_set_cachemode((void *)hostdata, 8192, IOMAP_FULL_CACHING);
6099 free_pages ((u32)hostdata, 1);
6100 return 1;
6101}
6102#endif /* def MODULE */
diff --git a/drivers/scsi/53c7xx.h b/drivers/scsi/53c7xx.h
deleted file mode 100644
index 218f3b901537..000000000000
--- a/drivers/scsi/53c7xx.h
+++ /dev/null
@@ -1,1608 +0,0 @@
1/*
2 * 53c710 driver. Modified from Drew Eckhardts driver
3 * for 53c810 by Richard Hirst [richard@sleepie.demon.co.uk]
4 *
5 * I have left the code for the 53c8xx family in here, because it didn't
6 * seem worth removing it. The possibility of IO_MAPPED chips rather
7 * than MEMORY_MAPPED remains, in case someone wants to add support for
8 * 53c710 chips on Intel PCs (some older machines have them on the
9 * motherboard).
10 *
11 * NOTE THERE MAY BE PROBLEMS WITH CASTS IN read8 AND Co.
12 */
13
14/*
15 * NCR 53c{7,8}0x0 driver, header file
16 *
17 * Sponsored by
18 * iX Multiuser Multitasking Magazine
19 * Hannover, Germany
20 * hm@ix.de
21 *
22 * Copyright 1993, 1994, 1995 Drew Eckhardt
23 * Visionary Computing
24 * (Unix and Linux consulting and custom programming)
25 * drew@PoohSticks.ORG
26 * +1 (303) 786-7975
27 *
28 * TolerANT and SCSI SCRIPTS are registered trademarks of NCR Corporation.
29 *
30 * PRE-ALPHA
31 *
32 * For more information, please consult
33 *
34 * NCR 53C700/53C700-66
35 * SCSI I/O Processor
36 * Data Manual
37 *
38 * NCR 53C810
39 * PCI-SCSI I/O Processor
40 * Data Manual
41 *
42 * NCR Microelectronics
43 * 1635 Aeroplaza Drive
44 * Colorado Springs, CO 80916
45 * +1 (719) 578-3400
46 *
47 * Toll free literature number
48 * +1 (800) 334-5454
49 *
50 */
51
52#ifndef NCR53c710_H
53#define NCR53c710_H
54
55#ifndef HOSTS_C
56
57/* SCSI control 0 rw, default = 0xc0 */
58#define SCNTL0_REG 0x00
59#define SCNTL0_ARB1 0x80 /* 0 0 = simple arbitration */
60#define SCNTL0_ARB2 0x40 /* 1 1 = full arbitration */
61#define SCNTL0_STRT 0x20 /* Start Sequence */
62#define SCNTL0_WATN 0x10 /* Select with ATN */
63#define SCNTL0_EPC 0x08 /* Enable parity checking */
64/* Bit 2 is reserved on 800 series chips */
65#define SCNTL0_EPG_700 0x04 /* Enable parity generation */
66#define SCNTL0_AAP 0x02 /* ATN/ on parity error */
67#define SCNTL0_TRG 0x01 /* Target mode */
68
69/* SCSI control 1 rw, default = 0x00 */
70
71#define SCNTL1_REG 0x01
72#define SCNTL1_EXC 0x80 /* Extra Clock Cycle of Data setup */
73#define SCNTL1_ADB 0x40 /* contents of SODL on bus */
74#define SCNTL1_ESR_700 0x20 /* Enable SIOP response to selection
75 and reselection */
76#define SCNTL1_DHP_800 0x20 /* Disable halt on parity error or ATN
77 target mode only */
78#define SCNTL1_CON 0x10 /* Connected */
79#define SCNTL1_RST 0x08 /* SCSI RST/ */
80#define SCNTL1_AESP 0x04 /* Force bad parity */
81#define SCNTL1_SND_700 0x02 /* Start SCSI send */
82#define SCNTL1_IARB_800 0x02 /* Immediate Arbitration, start
83 arbitration immediately after
84 busfree is detected */
85#define SCNTL1_RCV_700 0x01 /* Start SCSI receive */
86#define SCNTL1_SST_800 0x01 /* Start SCSI transfer */
87
88/* SCSI control 2 rw, */
89
90#define SCNTL2_REG_800 0x02
91#define SCNTL2_800_SDU 0x80 /* SCSI disconnect unexpected */
92
93/* SCSI control 3 rw */
94
95#define SCNTL3_REG_800 0x03
96#define SCNTL3_800_SCF_SHIFT 4
97#define SCNTL3_800_SCF_MASK 0x70
98#define SCNTL3_800_SCF2 0x40 /* Synchronous divisor */
99#define SCNTL3_800_SCF1 0x20 /* 0x00 = SCLK/3 */
100#define SCNTL3_800_SCF0 0x10 /* 0x10 = SCLK/1 */
101 /* 0x20 = SCLK/1.5
102 0x30 = SCLK/2
103 0x40 = SCLK/3 */
104
105#define SCNTL3_800_CCF_SHIFT 0
106#define SCNTL3_800_CCF_MASK 0x07
107#define SCNTL3_800_CCF2 0x04 /* 0x00 50.01 to 66 */
108#define SCNTL3_800_CCF1 0x02 /* 0x01 16.67 to 25 */
109#define SCNTL3_800_CCF0 0x01 /* 0x02 25.01 - 37.5
110 0x03 37.51 - 50
111 0x04 50.01 - 66 */
112
113/*
114 * SCSI destination ID rw - the appropriate bit is set for the selected
115 * target ID. This is written by the SCSI SCRIPTS processor.
116 * default = 0x00
117 */
118#define SDID_REG_700 0x02
119#define SDID_REG_800 0x06
120
121#define GP_REG_800 0x07 /* General purpose IO */
122#define GP_800_IO1 0x02
123#define GP_800_IO2 0x01
124
125/* SCSI interrupt enable rw, default = 0x00 */
126#define SIEN_REG_700 0x03
127#define SIEN0_REG_800 0x40
128#define SIEN_MA 0x80 /* Phase mismatch (ini) or ATN (tgt) */
129#define SIEN_FC 0x40 /* Function complete */
130#define SIEN_700_STO 0x20 /* Selection or reselection timeout */
131#define SIEN_800_SEL 0x20 /* Selected */
132#define SIEN_700_SEL 0x10 /* Selected or reselected */
133#define SIEN_800_RESEL 0x10 /* Reselected */
134#define SIEN_SGE 0x08 /* SCSI gross error */
135#define SIEN_UDC 0x04 /* Unexpected disconnect */
136#define SIEN_RST 0x02 /* SCSI RST/ received */
137#define SIEN_PAR 0x01 /* Parity error */
138
139/*
140 * SCSI chip ID rw
141 * NCR53c700 :
142 * When arbitrating, the highest bit is used, when reselection or selection
143 * occurs, the chip responds to all IDs for which a bit is set.
144 * default = 0x00
145 * NCR53c810 :
146 * Uses bit mapping
147 */
148#define SCID_REG 0x04
149/* Bit 7 is reserved on 800 series chips */
150#define SCID_800_RRE 0x40 /* Enable response to reselection */
151#define SCID_800_SRE 0x20 /* Enable response to selection */
152/* Bits four and three are reserved on 800 series chips */
153#define SCID_800_ENC_MASK 0x07 /* Encoded SCSI ID */
154
155/* SCSI transfer rw, default = 0x00 */
156#define SXFER_REG 0x05
157#define SXFER_DHP 0x80 /* Disable halt on parity */
158
159#define SXFER_TP2 0x40 /* Transfer period msb */
160#define SXFER_TP1 0x20
161#define SXFER_TP0 0x10 /* lsb */
162#define SXFER_TP_MASK 0x70
163/* FIXME : SXFER_TP_SHIFT == 5 is right for '8xx chips */
164#define SXFER_TP_SHIFT 5
165#define SXFER_TP_4 0x00 /* Divisors */
166#define SXFER_TP_5 0x10<<1
167#define SXFER_TP_6 0x20<<1
168#define SXFER_TP_7 0x30<<1
169#define SXFER_TP_8 0x40<<1
170#define SXFER_TP_9 0x50<<1
171#define SXFER_TP_10 0x60<<1
172#define SXFER_TP_11 0x70<<1
173
174#define SXFER_MO3 0x08 /* Max offset msb */
175#define SXFER_MO2 0x04
176#define SXFER_MO1 0x02
177#define SXFER_MO0 0x01 /* lsb */
178#define SXFER_MO_MASK 0x0f
179#define SXFER_MO_SHIFT 0
180
181/*
182 * SCSI output data latch rw
183 * The contents of this register are driven onto the SCSI bus when
184 * the Assert Data Bus bit of the SCNTL1 register is set and
185 * the CD, IO, and MSG bits of the SOCL register match the SCSI phase
186 */
187#define SODL_REG_700 0x06
188#define SODL_REG_800 0x54
189
190
191/*
192 * SCSI output control latch rw, default = 0
193 * Note that when the chip is being manually programmed as an initiator,
194 * the MSG, CD, and IO bits must be set correctly for the phase the target
195 * is driving the bus in. Otherwise no data transfer will occur due to
196 * phase mismatch.
197 */
198
199#define SOCL_REG 0x07
200#define SOCL_REQ 0x80 /* REQ */
201#define SOCL_ACK 0x40 /* ACK */
202#define SOCL_BSY 0x20 /* BSY */
203#define SOCL_SEL 0x10 /* SEL */
204#define SOCL_ATN 0x08 /* ATN */
205#define SOCL_MSG 0x04 /* MSG */
206#define SOCL_CD 0x02 /* C/D */
207#define SOCL_IO 0x01 /* I/O */
208
209/*
210 * SCSI first byte received latch ro
211 * This register contains the first byte received during a block MOVE
212 * SCSI SCRIPTS instruction, including
213 *
214 * Initiator mode Target mode
215 * Message in Command
216 * Status Message out
217 * Data in Data out
218 *
219 * It also contains the selecting or reselecting device's ID and our
220 * ID.
221 *
222 * Note that this is the register the various IF conditionals can
223 * operate on.
224 */
225#define SFBR_REG 0x08
226
227/*
228 * SCSI input data latch ro
229 * In initiator mode, data is latched into this register on the rising
230 * edge of REQ/. In target mode, data is latched on the rising edge of
231 * ACK/
232 */
233#define SIDL_REG_700 0x09
234#define SIDL_REG_800 0x50
235
236/*
237 * SCSI bus data lines ro
238 * This register reflects the instantaneous status of the SCSI data
239 * lines. Note that SCNTL0 must be set to disable parity checking,
240 * otherwise reading this register will latch new parity.
241 */
242#define SBDL_REG_700 0x0a
243#define SBDL_REG_800 0x58
244
245#define SSID_REG_800 0x0a
246#define SSID_800_VAL 0x80 /* Exactly two bits asserted at sel */
247#define SSID_800_ENCID_MASK 0x07 /* Device which performed operation */
248
249
250/*
251 * SCSI bus control lines rw,
252 * instantaneous readout of control lines
253 */
254#define SBCL_REG 0x0b
255#define SBCL_REQ 0x80 /* REQ ro */
256#define SBCL_ACK 0x40 /* ACK ro */
257#define SBCL_BSY 0x20 /* BSY ro */
258#define SBCL_SEL 0x10 /* SEL ro */
259#define SBCL_ATN 0x08 /* ATN ro */
260#define SBCL_MSG 0x04 /* MSG ro */
261#define SBCL_CD 0x02 /* C/D ro */
262#define SBCL_IO 0x01 /* I/O ro */
263#define SBCL_PHASE_CMDOUT SBCL_CD
264#define SBCL_PHASE_DATAIN SBCL_IO
265#define SBCL_PHASE_DATAOUT 0
266#define SBCL_PHASE_MSGIN (SBCL_CD|SBCL_IO|SBCL_MSG)
267#define SBCL_PHASE_MSGOUT (SBCL_CD|SBCL_MSG)
268#define SBCL_PHASE_STATIN (SBCL_CD|SBCL_IO)
269#define SBCL_PHASE_MASK (SBCL_CD|SBCL_IO|SBCL_MSG)
270/*
271 * Synchronous SCSI Clock Control bits
272 * 0 - set by DCNTL
273 * 1 - SCLK / 1.0
274 * 2 - SCLK / 1.5
275 * 3 - SCLK / 2.0
276 */
277#define SBCL_SSCF1 0x02 /* wo, -66 only */
278#define SBCL_SSCF0 0x01 /* wo, -66 only */
279#define SBCL_SSCF_MASK 0x03
280
281/*
282 * XXX note : when reading the DSTAT and STAT registers to clear interrupts,
283 * insure that 10 clocks elapse between the two
284 */
285/* DMA status ro */
286#define DSTAT_REG 0x0c
287#define DSTAT_DFE 0x80 /* DMA FIFO empty */
288#define DSTAT_800_MDPE 0x40 /* Master Data Parity Error */
289#define DSTAT_800_BF 0x20 /* Bus Fault */
290#define DSTAT_ABRT 0x10 /* Aborted - set on error */
291#define DSTAT_SSI 0x08 /* SCRIPTS single step interrupt */
292#define DSTAT_SIR 0x04 /* SCRIPTS interrupt received -
293 set when INT instruction is
294 executed */
295#define DSTAT_WTD 0x02 /* Watchdog timeout detected */
296#define DSTAT_OPC 0x01 /* Illegal instruction */
297#define DSTAT_800_IID 0x01 /* Same thing, different name */
298
299
300/* NCR53c800 moves this stuff into SIST0 */
301#define SSTAT0_REG 0x0d /* SCSI status 0 ro */
302#define SIST0_REG_800 0x42
303#define SSTAT0_MA 0x80 /* ini : phase mismatch,
304 * tgt : ATN/ asserted
305 */
306#define SSTAT0_CMP 0x40 /* function complete */
307#define SSTAT0_700_STO 0x20 /* Selection or reselection timeout */
308#define SIST0_800_SEL 0x20 /* Selected */
309#define SSTAT0_700_SEL 0x10 /* Selected or reselected */
310#define SIST0_800_RSL 0x10 /* Reselected */
311#define SSTAT0_SGE 0x08 /* SCSI gross error */
312#define SSTAT0_UDC 0x04 /* Unexpected disconnect */
313#define SSTAT0_RST 0x02 /* SCSI RST/ received */
314#define SSTAT0_PAR 0x01 /* Parity error */
315
316/* And uses SSTAT0 for what was SSTAT1 */
317
318#define SSTAT1_REG 0x0e /* SCSI status 1 ro */
319#define SSTAT1_ILF 0x80 /* SIDL full */
320#define SSTAT1_ORF 0x40 /* SODR full */
321#define SSTAT1_OLF 0x20 /* SODL full */
322#define SSTAT1_AIP 0x10 /* Arbitration in progress */
323#define SSTAT1_LOA 0x08 /* Lost arbitration */
324#define SSTAT1_WOA 0x04 /* Won arbitration */
325#define SSTAT1_RST 0x02 /* Instant readout of RST/ */
326#define SSTAT1_SDP 0x01 /* Instant readout of SDP/ */
327
328#define SSTAT2_REG 0x0f /* SCSI status 2 ro */
329#define SSTAT2_FF3 0x80 /* number of bytes in synchronous */
330#define SSTAT2_FF2 0x40 /* data FIFO */
331#define SSTAT2_FF1 0x20
332#define SSTAT2_FF0 0x10
333#define SSTAT2_FF_MASK 0xf0
334#define SSTAT2_FF_SHIFT 4
335
336/*
337 * Latched signals, latched on the leading edge of REQ/ for initiators,
338 * ACK/ for targets.
339 */
340#define SSTAT2_SDP 0x08 /* SDP */
341#define SSTAT2_MSG 0x04 /* MSG */
342#define SSTAT2_CD 0x02 /* C/D */
343#define SSTAT2_IO 0x01 /* I/O */
344#define SSTAT2_PHASE_CMDOUT SSTAT2_CD
345#define SSTAT2_PHASE_DATAIN SSTAT2_IO
346#define SSTAT2_PHASE_DATAOUT 0
347#define SSTAT2_PHASE_MSGIN (SSTAT2_CD|SSTAT2_IO|SSTAT2_MSG)
348#define SSTAT2_PHASE_MSGOUT (SSTAT2_CD|SSTAT2_MSG)
349#define SSTAT2_PHASE_STATIN (SSTAT2_CD|SSTAT2_IO)
350#define SSTAT2_PHASE_MASK (SSTAT2_CD|SSTAT2_IO|SSTAT2_MSG)
351
352
353/* NCR53c700-66 only */
354#define SCRATCHA_REG_00 0x10 /* through 0x13 Scratch A rw */
355/* NCR53c710 and higher */
356#define DSA_REG 0x10 /* DATA structure address */
357
358#define CTEST0_REG_700 0x14 /* Chip test 0 ro */
359#define CTEST0_REG_800 0x18 /* Chip test 0 rw, general purpose */
360/* 0x80 - 0x04 are reserved */
361#define CTEST0_700_RTRG 0x02 /* Real target mode */
362#define CTEST0_700_DDIR 0x01 /* Data direction, 1 =
363 * SCSI bus to host, 0 =
364 * host to SCSI.
365 */
366
367#define CTEST1_REG_700 0x15 /* Chip test 1 ro */
368#define CTEST1_REG_800 0x19 /* Chip test 1 ro */
369#define CTEST1_FMT3 0x80 /* Identify which byte lanes are empty */
370#define CTEST1_FMT2 0x40 /* in the DMA FIFO */
371#define CTEST1_FMT1 0x20
372#define CTEST1_FMT0 0x10
373
374#define CTEST1_FFL3 0x08 /* Identify which bytes lanes are full */
375#define CTEST1_FFL2 0x04 /* in the DMA FIFO */
376#define CTEST1_FFL1 0x02
377#define CTEST1_FFL0 0x01
378
379#define CTEST2_REG_700 0x16 /* Chip test 2 ro */
380#define CTEST2_REG_800 0x1a /* Chip test 2 ro */
381
382#define CTEST2_800_DDIR 0x80 /* 1 = SCSI->host */
383#define CTEST2_800_SIGP 0x40 /* A copy of SIGP in ISTAT.
384 Reading this register clears */
385#define CTEST2_800_CIO 0x20 /* Configured as IO */.
386#define CTEST2_800_CM 0x10 /* Configured as memory */
387
388/* 0x80 - 0x40 are reserved on 700 series chips */
389#define CTEST2_700_SOFF 0x20 /* SCSI Offset Compare,
390 * As an initiator, this bit is
391 * one when the synchronous offset
392 * is zero, as a target this bit
393 * is one when the synchronous
394 * offset is at the maximum
395 * defined in SXFER
396 */
397#define CTEST2_700_SFP 0x10 /* SCSI FIFO parity bit,
398 * reading CTEST3 unloads a byte
399 * from the FIFO and sets this
400 */
401#define CTEST2_700_DFP 0x08 /* DMA FIFO parity bit,
402 * reading CTEST6 unloads a byte
403 * from the FIFO and sets this
404 */
405#define CTEST2_TEOP 0x04 /* SCSI true end of process,
406 * indicates a totally finished
407 * transfer
408 */
409#define CTEST2_DREQ 0x02 /* Data request signal */
410/* 0x01 is reserved on 700 series chips */
411#define CTEST2_800_DACK 0x01
412
413/*
414 * Chip test 3 ro
415 * Unloads the bottom byte of the eight deep SCSI synchronous FIFO,
416 * check SSTAT2 FIFO full bits to determine size. Note that a GROSS
417 * error results if a read is attempted on this register. Also note
418 * that 16 and 32 bit reads of this register will cause corruption.
419 */
420#define CTEST3_REG_700 0x17
421/* Chip test 3 rw */
422#define CTEST3_REG_800 0x1b
423#define CTEST3_800_V3 0x80 /* Chip revision */
424#define CTEST3_800_V2 0x40
425#define CTEST3_800_V1 0x20
426#define CTEST3_800_V0 0x10
427#define CTEST3_800_FLF 0x08 /* Flush DMA FIFO */
428#define CTEST3_800_CLF 0x04 /* Clear DMA FIFO */
429#define CTEST3_800_FM 0x02 /* Fetch mode pin */
430/* bit 0 is reserved on 800 series chips */
431
432#define CTEST4_REG_700 0x18 /* Chip test 4 rw */
433#define CTEST4_REG_800 0x21 /* Chip test 4 rw */
434/* 0x80 is reserved on 700 series chips */
435#define CTEST4_800_BDIS 0x80 /* Burst mode disable */
436#define CTEST4_ZMOD 0x40 /* High impedance mode */
437#define CTEST4_SZM 0x20 /* SCSI bus high impedance */
438#define CTEST4_700_SLBE 0x10 /* SCSI loopback enabled */
439#define CTEST4_800_SRTM 0x10 /* Shadow Register Test Mode */
440#define CTEST4_700_SFWR 0x08 /* SCSI FIFO write enable,
441 * redirects writes from SODL
442 * to the SCSI FIFO.
443 */
444#define CTEST4_800_MPEE 0x08 /* Enable parity checking
445 during master cycles on PCI
446 bus */
447
448/*
449 * These bits send the contents of the CTEST6 register to the appropriate
450 * byte lane of the 32 bit DMA FIFO. Normal operation is zero, otherwise
451 * the high bit means the low two bits select the byte lane.
452 */
453#define CTEST4_FBL2 0x04
454#define CTEST4_FBL1 0x02
455#define CTEST4_FBL0 0x01
456#define CTEST4_FBL_MASK 0x07
457#define CTEST4_FBL_0 0x04 /* Select DMA FIFO byte lane 0 */
458#define CTEST4_FBL_1 0x05 /* Select DMA FIFO byte lane 1 */
459#define CTEST4_FBL_2 0x06 /* Select DMA FIFO byte lane 2 */
460#define CTEST4_FBL_3 0x07 /* Select DMA FIFO byte lane 3 */
461#define CTEST4_800_SAVE (CTEST4_800_BDIS)
462
463
464#define CTEST5_REG_700 0x19 /* Chip test 5 rw */
465#define CTEST5_REG_800 0x22 /* Chip test 5 rw */
466/*
467 * Clock Address Incrementor. When set, it increments the
468 * DNAD register to the next bus size boundary. It automatically
469 * resets itself when the operation is complete.
470 */
471#define CTEST5_ADCK 0x80
472/*
473 * Clock Byte Counter. When set, it decrements the DBC register to
474 * the next bus size boundary.
475 */
476#define CTEST5_BBCK 0x40
477/*
478 * Reset SCSI Offset. Setting this bit to 1 clears the current offset
479 * pointer in the SCSI synchronous offset counter (SSTAT). This bit
480 * is set to 1 if a SCSI Gross Error Condition occurs. The offset should
481 * be cleared when a synchronous transfer fails. When written, it is
482 * automatically cleared after the SCSI synchronous offset counter is
483 * reset.
484 */
485/* Bit 5 is reserved on 800 series chips */
486#define CTEST5_700_ROFF 0x20
487/*
488 * Master Control for Set or Reset pulses. When 1, causes the low
489 * four bits of register to set when set, 0 causes the low bits to
490 * clear when set.
491 */
492#define CTEST5_MASR 0x10
493#define CTEST5_DDIR 0x08 /* DMA direction */
494/*
495 * Bits 2-0 are reserved on 800 series chips
496 */
497#define CTEST5_700_EOP 0x04 /* End of process */
498#define CTEST5_700_DREQ 0x02 /* Data request */
499#define CTEST5_700_DACK 0x01 /* Data acknowledge */
500
501/*
502 * Chip test 6 rw - writing to this register writes to the byte
503 * lane in the DMA FIFO as determined by the FBL bits in the CTEST4
504 * register.
505 */
506#define CTEST6_REG_700 0x1a
507#define CTEST6_REG_800 0x23
508
509#define CTEST7_REG 0x1b /* Chip test 7 rw */
510/* 0x80 - 0x40 are reserved on NCR53c700 and NCR53c700-66 chips */
511#define CTEST7_10_CDIS 0x80 /* Cache burst disable */
512#define CTEST7_10_SC1 0x40 /* Snoop control bits */
513#define CTEST7_10_SC0 0x20
514#define CTEST7_10_SC_MASK 0x60
515/* 0x20 is reserved on the NCR53c700 */
516#define CTEST7_0060_FM 0x20 /* Fetch mode */
517#define CTEST7_STD 0x10 /* Selection timeout disable */
518#define CTEST7_DFP 0x08 /* DMA FIFO parity bit for CTEST6 */
519#define CTEST7_EVP 0x04 /* 1 = host bus even parity, 0 = odd */
520#define CTEST7_10_TT1 0x02 /* Transfer type */
521#define CTEST7_00_DC 0x02 /* Set to drive DC low during instruction
522 fetch */
523#define CTEST7_DIFF 0x01 /* Differential mode */
524
525#define CTEST7_SAVE ( CTEST7_EVP | CTEST7_DIFF )
526
527
528#define TEMP_REG 0x1c /* through 0x1f Temporary stack rw */
529
530#define DFIFO_REG 0x20 /* DMA FIFO rw */
531/*
532 * 0x80 is reserved on the NCR53c710, the CLF and FLF bits have been
533 * moved into the CTEST8 register.
534 */
535#define DFIFO_00_FLF 0x80 /* Flush DMA FIFO to memory */
536#define DFIFO_00_CLF 0x40 /* Clear DMA and SCSI FIFOs */
537#define DFIFO_BO6 0x40
538#define DFIFO_BO5 0x20
539#define DFIFO_BO4 0x10
540#define DFIFO_BO3 0x08
541#define DFIFO_BO2 0x04
542#define DFIFO_BO1 0x02
543#define DFIFO_BO0 0x01
544#define DFIFO_10_BO_MASK 0x7f /* 7 bit counter */
545#define DFIFO_00_BO_MASK 0x3f /* 6 bit counter */
546
547/*
548 * Interrupt status rw
549 * Note that this is the only register which can be read while SCSI
550 * SCRIPTS are being executed.
551 */
552#define ISTAT_REG_700 0x21
553#define ISTAT_REG_800 0x14
554#define ISTAT_ABRT 0x80 /* Software abort, write
555 *1 to abort, wait for interrupt. */
556/* 0x40 and 0x20 are reserved on NCR53c700 and NCR53c700-66 chips */
557#define ISTAT_10_SRST 0x40 /* software reset */
558#define ISTAT_10_SIGP 0x20 /* signal script */
559/* 0x10 is reserved on NCR53c700 series chips */
560#define ISTAT_800_SEM 0x10 /* semaphore */
561#define ISTAT_CON 0x08 /* 1 when connected */
562#define ISTAT_800_INTF 0x04 /* Interrupt on the fly */
563#define ISTAT_700_PRE 0x04 /* Pointer register empty.
564 * Set to 1 when DSPS and DSP
565 * registers are empty in pipeline
566 * mode, always set otherwise.
567 */
568#define ISTAT_SIP 0x02 /* SCSI interrupt pending from
569 * SCSI portion of SIOP see
570 * SSTAT0
571 */
572#define ISTAT_DIP 0x01 /* DMA interrupt pending
573 * see DSTAT
574 */
575
576/* NCR53c700-66 and NCR53c710 only */
577#define CTEST8_REG 0x22 /* Chip test 8 rw */
578#define CTEST8_0066_EAS 0x80 /* Enable alternate SCSI clock,
579 * ie read from SCLK/ rather than CLK/
580 */
581#define CTEST8_0066_EFM 0x40 /* Enable fetch and master outputs */
582#define CTEST8_0066_GRP 0x20 /* Generate Receive Parity for
583 * pass through. This insures that
584 * bad parity won't reach the host
585 * bus.
586 */
587#define CTEST8_0066_TE 0x10 /* TolerANT enable. Enable
588 * active negation, should only
589 * be used for slow SCSI
590 * non-differential.
591 */
592#define CTEST8_0066_HSC 0x08 /* Halt SCSI clock */
593#define CTEST8_0066_SRA 0x04 /* Shorten REQ/ACK filtering,
594 * must be set for fast SCSI-II
595 * speeds.
596 */
597#define CTEST8_0066_DAS 0x02 /* Disable automatic target/initiator
598 * switching.
599 */
600#define CTEST8_0066_LDE 0x01 /* Last disconnect enable.
601 * The status of pending
602 * disconnect is maintained by
603 * the core, eliminating
604 * the possibility of missing a
605 * selection or reselection
606 * while waiting to fetch a
607 * WAIT DISCONNECT opcode.
608 */
609
610#define CTEST8_10_V3 0x80 /* Chip revision */
611#define CTEST8_10_V2 0x40
612#define CTEST8_10_V1 0x20
613#define CTEST8_10_V0 0x10
614#define CTEST8_10_V_MASK 0xf0
615#define CTEST8_10_FLF 0x08 /* Flush FIFOs */
616#define CTEST8_10_CLF 0x04 /* Clear FIFOs */
617#define CTEST8_10_FM 0x02 /* Fetch pin mode */
618#define CTEST8_10_SM 0x01 /* Snoop pin mode */
619
620
621/*
622 * The CTEST9 register may be used to differentiate between a
623 * NCR53c700 and a NCR53c710.
624 *
625 * Write 0xff to this register.
626 * Read it.
627 * If the contents are 0xff, it is a NCR53c700
628 * If the contents are 0x00, it is a NCR53c700-66 first revision
629 * If the contents are some other value, it is some other NCR53c700-66
630 */
631#define CTEST9_REG_00 0x23 /* Chip test 9 ro */
632#define LCRC_REG_10 0x23
633
634/*
635 * 0x24 through 0x27 are the DMA byte counter register. Instructions
636 * write their high 8 bits into the DCMD register, the low 24 bits into
637 * the DBC register.
638 *
639 * Function is dependent on the command type being executed.
640 */
641
642
643#define DBC_REG 0x24
644/*
645 * For Block Move Instructions, DBC is a 24 bit quantity representing
646 * the number of bytes to transfer.
647 * For Transfer Control Instructions, DBC is bit fielded as follows :
648 */
649/* Bits 20 - 23 should be clear */
650#define DBC_TCI_TRUE (1 << 19) /* Jump when true */
651#define DBC_TCI_COMPARE_DATA (1 << 18) /* Compare data */
652#define DBC_TCI_COMPARE_PHASE (1 << 17) /* Compare phase with DCMD field */
653#define DBC_TCI_WAIT_FOR_VALID (1 << 16) /* Wait for REQ */
654/* Bits 8 - 15 are reserved on some implementations ? */
655#define DBC_TCI_MASK_MASK 0xff00 /* Mask for data compare */
656#define DBC_TCI_MASK_SHIFT 8
657#define DBC_TCI_DATA_MASK 0xff /* Data to be compared */
658#define DBC_TCI_DATA_SHIFT 0
659
660#define DBC_RWRI_IMMEDIATE_MASK 0xff00 /* Immediate data */
661#define DBC_RWRI_IMMEDIATE_SHIFT 8 /* Amount to shift */
662#define DBC_RWRI_ADDRESS_MASK 0x3f0000 /* Register address */
663#define DBC_RWRI_ADDRESS_SHIFT 16
664
665
666/*
667 * DMA command r/w
668 */
669#define DCMD_REG 0x27
670#define DCMD_TYPE_MASK 0xc0 /* Masks off type */
671#define DCMD_TYPE_BMI 0x00 /* Indicates a Block Move instruction */
672#define DCMD_BMI_IO 0x01 /* I/O, CD, and MSG bits selecting */
673#define DCMD_BMI_CD 0x02 /* the phase for the block MOVE */
674#define DCMD_BMI_MSG 0x04 /* instruction */
675
676#define DCMD_BMI_OP_MASK 0x18 /* mask for opcode */
677#define DCMD_BMI_OP_MOVE_T 0x00 /* MOVE */
678#define DCMD_BMI_OP_MOVE_I 0x08 /* MOVE Initiator */
679
680#define DCMD_BMI_INDIRECT 0x20 /* Indirect addressing */
681
682#define DCMD_TYPE_TCI 0x80 /* Indicates a Transfer Control
683 instruction */
684#define DCMD_TCI_IO 0x01 /* I/O, CD, and MSG bits selecting */
685#define DCMD_TCI_CD 0x02 /* the phase for the block MOVE */
686#define DCMD_TCI_MSG 0x04 /* instruction */
687#define DCMD_TCI_OP_MASK 0x38 /* mask for opcode */
688#define DCMD_TCI_OP_JUMP 0x00 /* JUMP */
689#define DCMD_TCI_OP_CALL 0x08 /* CALL */
690#define DCMD_TCI_OP_RETURN 0x10 /* RETURN */
691#define DCMD_TCI_OP_INT 0x18 /* INT */
692
693#define DCMD_TYPE_RWRI 0x40 /* Indicates I/O or register Read/Write
694 instruction */
695#define DCMD_RWRI_OPC_MASK 0x38 /* Opcode mask */
696#define DCMD_RWRI_OPC_WRITE 0x28 /* Write SFBR to register */
697#define DCMD_RWRI_OPC_READ 0x30 /* Read register to SFBR */
698#define DCMD_RWRI_OPC_MODIFY 0x38 /* Modify in place */
699
700#define DCMD_RWRI_OP_MASK 0x07
701#define DCMD_RWRI_OP_MOVE 0x00
702#define DCMD_RWRI_OP_SHL 0x01
703#define DCMD_RWRI_OP_OR 0x02
704#define DCMD_RWRI_OP_XOR 0x03
705#define DCMD_RWRI_OP_AND 0x04
706#define DCMD_RWRI_OP_SHR 0x05
707#define DCMD_RWRI_OP_ADD 0x06
708#define DCMD_RWRI_OP_ADDC 0x07
709
710#define DCMD_TYPE_MMI 0xc0 /* Indicates a Memory Move instruction
711 (three words) */
712
713
714#define DNAD_REG 0x28 /* through 0x2b DMA next address for
715 data */
716#define DSP_REG 0x2c /* through 0x2f DMA SCRIPTS pointer rw */
717#define DSPS_REG 0x30 /* through 0x33 DMA SCRIPTS pointer
718 save rw */
719#define DMODE_REG_00 0x34 /* DMA mode rw */
720#define DMODE_00_BL1 0x80 /* Burst length bits */
721#define DMODE_00_BL0 0x40
722#define DMODE_BL_MASK 0xc0
723/* Burst lengths (800) */
724#define DMODE_BL_2 0x00 /* 2 transfer */
725#define DMODE_BL_4 0x40 /* 4 transfers */
726#define DMODE_BL_8 0x80 /* 8 transfers */
727#define DMODE_BL_16 0xc0 /* 16 transfers */
728
729#define DMODE_10_BL_1 0x00 /* 1 transfer */
730#define DMODE_10_BL_2 0x40 /* 2 transfers */
731#define DMODE_10_BL_4 0x80 /* 4 transfers */
732#define DMODE_10_BL_8 0xc0 /* 8 transfers */
733#define DMODE_10_FC2 0x20 /* Driven to FC2 pin */
734#define DMODE_10_FC1 0x10 /* Driven to FC1 pin */
735#define DMODE_710_PD 0x08 /* Program/data on FC0 pin */
736#define DMODE_710_UO 0x02 /* User prog. output */
737
738#define DMODE_700_BW16 0x20 /* Host buswidth = 16 */
739#define DMODE_700_286 0x10 /* 286 mode */
740#define DMODE_700_IOM 0x08 /* Transfer to IO port */
741#define DMODE_700_FAM 0x04 /* Fixed address mode */
742#define DMODE_700_PIPE 0x02 /* Pipeline mode disables
743 * automatic fetch / exec
744 */
745#define DMODE_MAN 0x01 /* Manual start mode,
746 * requires a 1 to be written
747 * to the start DMA bit in the DCNTL
748 * register to run scripts
749 */
750
751#define DMODE_700_SAVE ( DMODE_00_BL_MASK | DMODE_00_BW16 | DMODE_00_286 )
752
753/* NCR53c800 series only */
754#define SCRATCHA_REG_800 0x34 /* through 0x37 Scratch A rw */
755/* NCR53c710 only */
756#define SCRATCHB_REG_10 0x34 /* through 0x37 scratch B rw */
757
758#define DMODE_REG_10 0x38 /* DMA mode rw, NCR53c710 and newer */
759#define DMODE_800_SIOM 0x20 /* Source IO = 1 */
760#define DMODE_800_DIOM 0x10 /* Destination IO = 1 */
761#define DMODE_800_ERL 0x08 /* Enable Read Line */
762
763/* 35-38 are reserved on 700 and 700-66 series chips */
764#define DIEN_REG 0x39 /* DMA interrupt enable rw */
765/* 0x80, 0x40, and 0x20 are reserved on 700-series chips */
766#define DIEN_800_MDPE 0x40 /* Master data parity error */
767#define DIEN_800_BF 0x20 /* BUS fault */
768#define DIEN_700_BF 0x20 /* BUS fault */
769#define DIEN_ABRT 0x10 /* Enable aborted interrupt */
770#define DIEN_SSI 0x08 /* Enable single step interrupt */
771#define DIEN_SIR 0x04 /* Enable SCRIPTS INT command
772 * interrupt
773 */
774/* 0x02 is reserved on 800 series chips */
775#define DIEN_700_WTD 0x02 /* Enable watchdog timeout interrupt */
776#define DIEN_700_OPC 0x01 /* Enable illegal instruction
777 * interrupt
778 */
779#define DIEN_800_IID 0x01 /* Same meaning, different name */
780
781/*
782 * DMA watchdog timer rw
783 * set in 16 CLK input periods.
784 */
785#define DWT_REG 0x3a
786
787/* DMA control rw */
788#define DCNTL_REG 0x3b
789#define DCNTL_700_CF1 0x80 /* Clock divisor bits */
790#define DCNTL_700_CF0 0x40
791#define DCNTL_700_CF_MASK 0xc0
792/* Clock divisors Divisor SCLK range (MHZ) */
793#define DCNTL_700_CF_2 0x00 /* 2.0 37.51-50.00 */
794#define DCNTL_700_CF_1_5 0x40 /* 1.5 25.01-37.50 */
795#define DCNTL_700_CF_1 0x80 /* 1.0 16.67-25.00 */
796#define DCNTL_700_CF_3 0xc0 /* 3.0 50.01-66.67 (53c700-66) */
797
798#define DCNTL_700_S16 0x20 /* Load scripts 16 bits at a time */
799#define DCNTL_SSM 0x10 /* Single step mode */
800#define DCNTL_700_LLM 0x08 /* Low level mode, can only be set
801 * after selection */
802#define DCNTL_800_IRQM 0x08 /* Totem pole IRQ pin */
803#define DCNTL_STD 0x04 /* Start DMA / SCRIPTS */
804/* 0x02 is reserved */
805#define DCNTL_00_RST 0x01 /* Software reset, resets everything
806 * but 286 mode bit in DMODE. On the
807 * NCR53c710, this bit moved to CTEST8
808 */
809#define DCNTL_10_COM 0x01 /* 700 software compatibility mode */
810#define DCNTL_10_EA 0x20 /* Enable Ack - needed for MVME16x */
811
812#define DCNTL_700_SAVE ( DCNTL_CF_MASK | DCNTL_S16)
813
814
815/* NCR53c700-66 only */
816#define SCRATCHB_REG_00 0x3c /* through 0x3f scratch b rw */
817#define SCRATCHB_REG_800 0x5c /* through 0x5f scratch b rw */
818/* NCR53c710 only */
819#define ADDER_REG_10 0x3c /* Adder, NCR53c710 only */
820
821#define SIEN1_REG_800 0x41
822#define SIEN1_800_STO 0x04 /* selection/reselection timeout */
823#define SIEN1_800_GEN 0x02 /* general purpose timer */
824#define SIEN1_800_HTH 0x01 /* handshake to handshake */
825
826#define SIST1_REG_800 0x43
827#define SIST1_800_STO 0x04 /* selection/reselection timeout */
828#define SIST1_800_GEN 0x02 /* general purpose timer */
829#define SIST1_800_HTH 0x01 /* handshake to handshake */
830
831#define SLPAR_REG_800 0x44 /* Parity */
832
833#define MACNTL_REG_800 0x46 /* Memory access control */
834#define MACNTL_800_TYP3 0x80
835#define MACNTL_800_TYP2 0x40
836#define MACNTL_800_TYP1 0x20
837#define MACNTL_800_TYP0 0x10
838#define MACNTL_800_DWR 0x08
839#define MACNTL_800_DRD 0x04
840#define MACNTL_800_PSCPT 0x02
841#define MACNTL_800_SCPTS 0x01
842
843#define GPCNTL_REG_800 0x47 /* General Purpose Pin Control */
844
845/* Timeouts are expressed such that 0=off, 1=100us, doubling after that */
846#define STIME0_REG_800 0x48 /* SCSI Timer Register 0 */
847#define STIME0_800_HTH_MASK 0xf0 /* Handshake to Handshake timeout */
848#define STIME0_800_HTH_SHIFT 4
849#define STIME0_800_SEL_MASK 0x0f /* Selection timeout */
850#define STIME0_800_SEL_SHIFT 0
851
852#define STIME1_REG_800 0x49
853#define STIME1_800_GEN_MASK 0x0f /* General purpose timer */
854
855#define RESPID_REG_800 0x4a /* Response ID, bit fielded. 8
856 bits on narrow chips, 16 on WIDE */
857
858#define STEST0_REG_800 0x4c
859#define STEST0_800_SLT 0x08 /* Selection response logic test */
860#define STEST0_800_ART 0x04 /* Arbitration priority encoder test */
861#define STEST0_800_SOZ 0x02 /* Synchronous offset zero */
862#define STEST0_800_SOM 0x01 /* Synchronous offset maximum */
863
864#define STEST1_REG_800 0x4d
865#define STEST1_800_SCLK 0x80 /* Disable SCSI clock */
866
867#define STEST2_REG_800 0x4e
868#define STEST2_800_SCE 0x80 /* Enable SOCL/SODL */
869#define STEST2_800_ROF 0x40 /* Reset SCSI sync offset */
870#define STEST2_800_SLB 0x10 /* Enable SCSI loopback mode */
871#define STEST2_800_SZM 0x08 /* SCSI high impedance mode */
872#define STEST2_800_EXT 0x02 /* Extend REQ/ACK filter 30 to 60ns */
873#define STEST2_800_LOW 0x01 /* SCSI low level mode */
874
875#define STEST3_REG_800 0x4f
876#define STEST3_800_TE 0x80 /* Enable active negation */
877#define STEST3_800_STR 0x40 /* SCSI FIFO test read */
878#define STEST3_800_HSC 0x20 /* Halt SCSI clock */
879#define STEST3_800_DSI 0x10 /* Disable single initiator response */
880#define STEST3_800_TTM 0x04 /* Time test mode */
881#define STEST3_800_CSF 0x02 /* Clear SCSI FIFO */
882#define STEST3_800_STW 0x01 /* SCSI FIFO test write */
883
884#define OPTION_PARITY 0x1 /* Enable parity checking */
885#define OPTION_TAGGED_QUEUE 0x2 /* Enable SCSI-II tagged queuing */
886#define OPTION_700 0x8 /* Always run NCR53c700 scripts */
887#define OPTION_INTFLY 0x10 /* Use INTFLY interrupts */
888#define OPTION_DEBUG_INTR 0x20 /* Debug interrupts */
889#define OPTION_DEBUG_INIT_ONLY 0x40 /* Run initialization code and
890 simple test code, return
891 DID_NO_CONNECT if any SCSI
892 commands are attempted. */
893#define OPTION_DEBUG_READ_ONLY 0x80 /* Return DID_ERROR if any
894 SCSI write is attempted */
895#define OPTION_DEBUG_TRACE 0x100 /* Animated trace mode, print
896 each address and instruction
897 executed to debug buffer. */
898#define OPTION_DEBUG_SINGLE 0x200 /* stop after executing one
899 instruction */
900#define OPTION_SYNCHRONOUS 0x400 /* Enable sync SCSI. */
901#define OPTION_MEMORY_MAPPED 0x800 /* NCR registers have valid
902 memory mapping */
903#define OPTION_IO_MAPPED 0x1000 /* NCR registers have valid
904 I/O mapping */
905#define OPTION_DEBUG_PROBE_ONLY 0x2000 /* Probe only, don't even init */
906#define OPTION_DEBUG_TESTS_ONLY 0x4000 /* Probe, init, run selected tests */
907#define OPTION_DEBUG_TEST0 0x08000 /* Run test 0 */
908#define OPTION_DEBUG_TEST1 0x10000 /* Run test 1 */
909#define OPTION_DEBUG_TEST2 0x20000 /* Run test 2 */
910#define OPTION_DEBUG_DUMP 0x40000 /* Dump commands */
911#define OPTION_DEBUG_TARGET_LIMIT 0x80000 /* Only talk to target+luns specified */
912#define OPTION_DEBUG_NCOMMANDS_LIMIT 0x100000 /* Limit the number of commands */
913#define OPTION_DEBUG_SCRIPT 0x200000 /* Print when checkpoints are passed */
914#define OPTION_DEBUG_FIXUP 0x400000 /* print fixup values */
915#define OPTION_DEBUG_DSA 0x800000
916#define OPTION_DEBUG_CORRUPTION 0x1000000 /* Detect script corruption */
917#define OPTION_DEBUG_SDTR 0x2000000 /* Debug SDTR problem */
918#define OPTION_DEBUG_MISMATCH 0x4000000 /* Debug phase mismatches */
919#define OPTION_DISCONNECT 0x8000000 /* Allow disconnect */
920#define OPTION_DEBUG_DISCONNECT 0x10000000
921#define OPTION_ALWAYS_SYNCHRONOUS 0x20000000 /* Negotiate sync. transfers
922 on power up */
923#define OPTION_DEBUG_QUEUES 0x80000000
924#define OPTION_DEBUG_ALLOCATION 0x100000000LL
925#define OPTION_DEBUG_SYNCHRONOUS 0x200000000LL /* Sanity check SXFER and
926 SCNTL3 registers */
927#define OPTION_NO_ASYNC 0x400000000LL /* Don't automagically send
928 SDTR for async transfers when
929 we haven't been told to do
930 a synchronous transfer. */
931#define OPTION_NO_PRINT_RACE 0x800000000LL /* Don't print message when
932 the reselect/WAIT DISCONNECT
933 race condition hits */
934#if !defined(PERM_OPTIONS)
935#define PERM_OPTIONS 0
936#endif
937
938/*
939 * Some data which is accessed by the NCR chip must be 4-byte aligned.
940 * For some hosts the default is less than that (eg. 68K uses 2-byte).
941 * Alignment has only been forced where it is important; also if one
942 * 32 bit structure field is aligned then it is assumed that following
943 * 32 bit fields are also aligned. Take care when adding fields
944 * which are other than 32 bit.
945 */
946
947struct NCR53c7x0_synchronous {
948 u32 select_indirect /* Value used for indirect selection */
949 __attribute__ ((aligned (4)));
950 u32 sscf_710; /* Used to set SSCF bits for 710 */
951 u32 script[8]; /* Size ?? Script used when target is
952 reselected */
953 unsigned char synchronous_want[5]; /* Per target desired SDTR */
954/*
955 * Set_synchronous programs these, select_indirect and current settings after
956 * int_debug_should show a match.
957 */
958 unsigned char sxfer_sanity, scntl3_sanity;
959};
960
961#define CMD_FLAG_SDTR 1 /* Initiating synchronous
962 transfer negotiation */
963#define CMD_FLAG_WDTR 2 /* Initiating wide transfer
964 negotiation */
965#define CMD_FLAG_DID_SDTR 4 /* did SDTR */
966#define CMD_FLAG_DID_WDTR 8 /* did WDTR */
967
968struct NCR53c7x0_table_indirect {
969 u32 count;
970 void *address;
971};
972
973enum ncr_event {
974 EVENT_NONE = 0,
975/*
976 * Order is IMPORTANT, since these must correspond to the event interrupts
977 * in 53c7,8xx.scr
978 */
979
980 EVENT_ISSUE_QUEUE = 0x5000000, /* 0 Command was added to issue queue */
981 EVENT_START_QUEUE, /* 1 Command moved to start queue */
982 EVENT_SELECT, /* 2 Command completed selection */
983 EVENT_DISCONNECT, /* 3 Command disconnected */
984 EVENT_RESELECT, /* 4 Command reselected */
985 EVENT_COMPLETE, /* 5 Command completed */
986 EVENT_IDLE, /* 6 */
987 EVENT_SELECT_FAILED, /* 7 */
988 EVENT_BEFORE_SELECT, /* 8 */
989 EVENT_RESELECT_FAILED /* 9 */
990};
991
992struct NCR53c7x0_event {
993 enum ncr_event event; /* What type of event */
994 unsigned char target;
995 unsigned char lun;
996 struct timeval time;
997 u32 *dsa; /* What's in the DSA register now (virt) */
998/*
999 * A few things from that SCSI pid so we know what happened after
1000 * the Scsi_Cmnd structure in question may have disappeared.
1001 */
1002 unsigned long pid; /* The SCSI PID which caused this
1003 event */
1004 unsigned char cmnd[12];
1005};
1006
1007/*
1008 * Things in the NCR53c7x0_cmd structure are split into two parts :
1009 *
1010 * 1. A fixed portion, for things which are not accessed directly by static NCR
1011 * code (ie, are referenced only by the Linux side of the driver,
1012 * or only by dynamically generated code).
1013 *
1014 * 2. The DSA portion, for things which are accessed directly by static NCR
1015 * code.
1016 *
1017 * This is a little ugly, but it
1018 * 1. Avoids conflicts between the NCR code's picture of the structure, and
1019 * Linux code's idea of what it looks like.
1020 *
1021 * 2. Minimizes the pain in the Linux side of the code needed
1022 * to calculate real dsa locations for things, etc.
1023 *
1024 */
1025
1026struct NCR53c7x0_cmd {
1027 void *real; /* Real, unaligned address for
1028 free function */
1029 void (* free)(void *, int); /* Command to deallocate; NULL
1030 for structures allocated with
1031 scsi_register, etc. */
1032 Scsi_Cmnd *cmd; /* Associated Scsi_Cmnd
1033 structure, Scsi_Cmnd points
1034 at NCR53c7x0_cmd using
1035 host_scribble structure */
1036
1037 int size; /* scsi_malloc'd size of this
1038 structure */
1039
1040 int flags; /* CMD_* flags */
1041
1042 unsigned char cmnd[12]; /* CDB, copied from Scsi_Cmnd */
1043 int result; /* Copy to Scsi_Cmnd when done */
1044
1045 struct { /* Private non-cached bounce buffer */
1046 unsigned char buf[256];
1047 u32 addr;
1048 u32 len;
1049 } bounce;
1050
1051/*
1052 * SDTR and WIDE messages are an either/or affair
1053 * in this message, since we will go into message out and send
1054 * _the whole mess_ without dropping out of message out to
1055 * let the target go into message in after sending the first
1056 * message.
1057 */
1058
1059 unsigned char select[11]; /* Select message, includes
1060 IDENTIFY
1061 (optional) QUEUE TAG
1062 (optional) SDTR or WDTR
1063 */
1064
1065
1066 volatile struct NCR53c7x0_cmd *next; /* Linux maintained lists (free,
1067 running, eventually finished */
1068
1069
1070 u32 *data_transfer_start; /* Start of data transfer routines */
1071 u32 *data_transfer_end; /* Address after end of data transfer o
1072 routines */
1073/*
1074 * The following three fields were moved from the DSA proper to here
1075 * since only dynamically generated NCR code refers to them, meaning
1076 * we don't need dsa_* absolutes, and it is simpler to let the
1077 * host code refer to them directly.
1078 */
1079
1080/*
1081 * HARD CODED : residual and saved_residual need to agree with the sizes
1082 * used in NCR53c7,8xx.scr.
1083 *
1084 * FIXME: we want to consider the case where we have odd-length
1085 * scatter/gather buffers and a WIDE transfer, in which case
1086 * we'll need to use the CHAIN MOVE instruction. Ick.
1087 */
1088 u32 residual[6] __attribute__ ((aligned (4)));
1089 /* Residual data transfer which
1090 allows pointer code to work
1091 right.
1092
1093 [0-1] : Conditional call to
1094 appropriate other transfer
1095 routine.
1096 [2-3] : Residual block transfer
1097 instruction.
1098 [4-5] : Jump to instruction
1099 after splice.
1100 */
1101 u32 saved_residual[6]; /* Copy of old residual, so we
1102 can get another partial
1103 transfer and still recover
1104 */
1105
1106 u32 saved_data_pointer; /* Saved data pointer */
1107
1108 u32 dsa_next_addr; /* _Address_ of dsa_next field
1109 in this dsa for RISCy
1110 style constant. */
1111
1112 u32 dsa_addr; /* Address of dsa; RISCy style
1113 constant */
1114
1115 u32 dsa[0]; /* Variable length (depending
1116 on host type, number of scatter /
1117 gather buffers, etc). */
1118};
1119
1120struct NCR53c7x0_break {
1121 u32 *address, old_instruction[2];
1122 struct NCR53c7x0_break *next;
1123 unsigned char old_size; /* Size of old instruction */
1124};
1125
1126/* Indicates that the NCR is not executing code */
1127#define STATE_HALTED 0
1128/*
1129 * Indicates that the NCR is executing the wait for select / reselect
1130 * script. Only used when running NCR53c700 compatible scripts, only
1131 * state during which an ABORT is _not_ considered an error condition.
1132 */
1133#define STATE_WAITING 1
1134/* Indicates that the NCR is executing other code. */
1135#define STATE_RUNNING 2
1136/*
1137 * Indicates that the NCR was being aborted.
1138 */
1139#define STATE_ABORTING 3
1140/* Indicates that the NCR was successfully aborted. */
1141#define STATE_ABORTED 4
1142/* Indicates that the NCR has been disabled due to a fatal error */
1143#define STATE_DISABLED 5
1144
1145/*
1146 * Where knowledge of SCSI SCRIPT(tm) specified values are needed
1147 * in an interrupt handler, an interrupt handler exists for each
1148 * different SCSI script so we don't have name space problems.
1149 *
1150 * Return values of these handlers are as follows :
1151 */
1152#define SPECIFIC_INT_NOTHING 0 /* don't even restart */
1153#define SPECIFIC_INT_RESTART 1 /* restart at the next instruction */
1154#define SPECIFIC_INT_ABORT 2 /* recoverable error, abort cmd */
1155#define SPECIFIC_INT_PANIC 3 /* unrecoverable error, panic */
1156#define SPECIFIC_INT_DONE 4 /* normal command completion */
1157#define SPECIFIC_INT_BREAK 5 /* break point encountered */
1158
1159struct NCR53c7x0_hostdata {
1160 int size; /* Size of entire Scsi_Host
1161 structure */
1162 int board; /* set to board type, useful if
1163 we have host specific things,
1164 ie, a general purpose I/O
1165 bit is being used to enable
1166 termination, etc. */
1167
1168 int chip; /* set to chip type; 700-66 is
1169 700-66, rest are last three
1170 digits of part number */
1171
1172 char valid_ids[8]; /* Valid SCSI ID's for adapter */
1173
1174 u32 *dsp; /* dsp to restart with after
1175 all stacked interrupts are
1176 handled. */
1177
1178 unsigned dsp_changed:1; /* Has dsp changed within this
1179 set of stacked interrupts ? */
1180
1181 unsigned char dstat; /* Most recent value of dstat */
1182 unsigned dstat_valid:1;
1183
1184 unsigned expecting_iid:1; /* Expect IID interrupt */
1185 unsigned expecting_sto:1; /* Expect STO interrupt */
1186
1187 /*
1188 * The code stays cleaner if we use variables with function
1189 * pointers and offsets that are unique for the different
1190 * scripts rather than having a slew of switch(hostdata->chip)
1191 * statements.
1192 *
1193 * It also means that the #defines from the SCSI SCRIPTS(tm)
1194 * don't have to be visible outside of the script-specific
1195 * instructions, preventing name space pollution.
1196 */
1197
1198 void (* init_fixup)(struct Scsi_Host *host);
1199 void (* init_save_regs)(struct Scsi_Host *host);
1200 void (* dsa_fixup)(struct NCR53c7x0_cmd *cmd);
1201 void (* soft_reset)(struct Scsi_Host *host);
1202 int (* run_tests)(struct Scsi_Host *host);
1203
1204 /*
1205 * Called when DSTAT_SIR is set, indicating an interrupt generated
1206 * by the INT instruction, where values are unique for each SCSI
1207 * script. Should return one of the SPEC_* values.
1208 */
1209
1210 int (* dstat_sir_intr)(struct Scsi_Host *host, struct NCR53c7x0_cmd *cmd);
1211
1212 int dsa_len; /* Size of DSA structure */
1213
1214 /*
1215 * Location of DSA fields for the SCSI SCRIPT corresponding to this
1216 * chip.
1217 */
1218
1219 s32 dsa_start;
1220 s32 dsa_end;
1221 s32 dsa_next;
1222 s32 dsa_prev;
1223 s32 dsa_cmnd;
1224 s32 dsa_select;
1225 s32 dsa_msgout;
1226 s32 dsa_cmdout;
1227 s32 dsa_dataout;
1228 s32 dsa_datain;
1229 s32 dsa_msgin;
1230 s32 dsa_msgout_other;
1231 s32 dsa_write_sync;
1232 s32 dsa_write_resume;
1233 s32 dsa_check_reselect;
1234 s32 dsa_status;
1235 s32 dsa_saved_pointer;
1236 s32 dsa_jump_dest;
1237
1238 /*
1239 * Important entry points that generic fixup code needs
1240 * to know about, fixed up.
1241 */
1242
1243 s32 E_accept_message;
1244 s32 E_command_complete;
1245 s32 E_data_transfer;
1246 s32 E_dsa_code_template;
1247 s32 E_dsa_code_template_end;
1248 s32 E_end_data_transfer;
1249 s32 E_msg_in;
1250 s32 E_initiator_abort;
1251 s32 E_other_transfer;
1252 s32 E_other_in;
1253 s32 E_other_out;
1254 s32 E_target_abort;
1255 s32 E_debug_break;
1256 s32 E_reject_message;
1257 s32 E_respond_message;
1258 s32 E_select;
1259 s32 E_select_msgout;
1260 s32 E_test_0;
1261 s32 E_test_1;
1262 s32 E_test_2;
1263 s32 E_test_3;
1264 s32 E_dsa_zero;
1265 s32 E_cmdout_cmdout;
1266 s32 E_wait_reselect;
1267 s32 E_dsa_code_begin;
1268
1269 long long options; /* Bitfielded set of options enabled */
1270 volatile u32 test_completed; /* Test completed */
1271 int test_running; /* Test currently running */
1272 s32 test_source
1273 __attribute__ ((aligned (4)));
1274 volatile s32 test_dest;
1275
1276 volatile int state; /* state of driver, only used for
1277 OPTION_700 */
1278
1279 unsigned char dmode; /*
1280 * set to the address of the DMODE
1281 * register for this chip.
1282 */
1283 unsigned char istat; /*
1284 * set to the address of the ISTAT
1285 * register for this chip.
1286 */
1287
1288 int scsi_clock; /*
1289 * SCSI clock in HZ. 0 may be used
1290 * for unknown, although this will
1291 * disable synchronous negotiation.
1292 */
1293
1294 volatile int intrs; /* Number of interrupts */
1295 volatile int resets; /* Number of SCSI resets */
1296 unsigned char saved_dmode;
1297 unsigned char saved_ctest4;
1298 unsigned char saved_ctest7;
1299 unsigned char saved_dcntl;
1300 unsigned char saved_scntl3;
1301
1302 unsigned char this_id_mask;
1303
1304 /* Debugger information */
1305 struct NCR53c7x0_break *breakpoints, /* Linked list of all break points */
1306 *breakpoint_current; /* Current breakpoint being stepped
1307 through, NULL if we are running
1308 normally. */
1309#ifdef NCR_DEBUG
1310 int debug_size; /* Size of debug buffer */
1311 volatile int debug_count; /* Current data count */
1312 volatile char *debug_buf; /* Output ring buffer */
1313 volatile char *debug_write; /* Current write pointer */
1314 volatile char *debug_read; /* Current read pointer */
1315#endif /* def NCR_DEBUG */
1316
1317 /* XXX - primitive debugging junk, remove when working ? */
1318 int debug_print_limit; /* Number of commands to print
1319 out exhaustive debugging
1320 information for if
1321 OPTION_DEBUG_DUMP is set */
1322
1323 unsigned char debug_lun_limit[16]; /* If OPTION_DEBUG_TARGET_LIMIT
1324 set, puke if commands are sent
1325 to other target/lun combinations */
1326
1327 int debug_count_limit; /* Number of commands to execute
1328 before puking to limit debugging
1329 output */
1330
1331
1332 volatile unsigned idle:1; /* set to 1 if idle */
1333
1334 /*
1335 * Table of synchronous+wide transfer parameters set on a per-target
1336 * basis.
1337 */
1338
1339 volatile struct NCR53c7x0_synchronous sync[16]
1340 __attribute__ ((aligned (4)));
1341
1342 volatile Scsi_Cmnd *issue_queue
1343 __attribute__ ((aligned (4)));
1344 /* waiting to be issued by
1345 Linux driver */
1346 volatile struct NCR53c7x0_cmd *running_list;
1347 /* commands running, maintained
1348 by Linux driver */
1349
1350 volatile struct NCR53c7x0_cmd *ncrcurrent; /* currently connected
1351 nexus, ONLY valid for
1352 NCR53c700/NCR53c700-66
1353 */
1354
1355 volatile struct NCR53c7x0_cmd *spare; /* pointer to spare,
1356 allocated at probe time,
1357 which we can use for
1358 initialization */
1359 volatile struct NCR53c7x0_cmd *free;
1360 int max_cmd_size; /* Maximum size of NCR53c7x0_cmd
1361 based on number of
1362 scatter/gather segments, etc.
1363 */
1364 volatile int num_cmds; /* Number of commands
1365 allocated */
1366 volatile int extra_allocate;
1367 volatile unsigned char cmd_allocated[16]; /* Have we allocated commands
1368 for this target yet? If not,
1369 do so ASAP */
1370 volatile unsigned char busy[16][8]; /* number of commands
1371 executing on each target
1372 */
1373 /*
1374 * Eventually, I'll switch to a coroutine for calling
1375 * cmd->done(cmd), etc. so that we can overlap interrupt
1376 * processing with this code for maximum performance.
1377 */
1378
1379 volatile struct NCR53c7x0_cmd *finished_queue;
1380
1381 /* Shared variables between SCRIPT and host driver */
1382 volatile u32 *schedule
1383 __attribute__ ((aligned (4))); /* Array of JUMPs to dsa_begin
1384 routines of various DSAs.
1385 When not in use, replace
1386 with jump to next slot */
1387
1388
1389 volatile unsigned char msg_buf[16]; /* buffer for messages
1390 other than the command
1391 complete message */
1392
1393 /* Per-target default synchronous and WIDE messages */
1394 volatile unsigned char synchronous_want[16][5];
1395 volatile unsigned char wide_want[16][4];
1396
1397 /* Bit fielded set of targets we want to speak synchronously with */
1398 volatile u16 initiate_sdtr;
1399 /* Bit fielded set of targets we want to speak wide with */
1400 volatile u16 initiate_wdtr;
1401 /* Bit fielded list of targets we've talked to. */
1402 volatile u16 talked_to;
1403
1404 /* Array of bit-fielded lun lists that we need to request_sense */
1405 volatile unsigned char request_sense[16];
1406
1407 u32 addr_reconnect_dsa_head
1408 __attribute__ ((aligned (4))); /* RISCy style constant,
1409 address of following */
1410 volatile u32 reconnect_dsa_head;
1411 /* Data identifying nexus we are trying to match during reselection */
1412 volatile unsigned char reselected_identify; /* IDENTIFY message */
1413 volatile unsigned char reselected_tag; /* second byte of queue tag
1414 message or 0 */
1415
1416 /* These were static variables before we moved them */
1417
1418 s32 NCR53c7xx_zero
1419 __attribute__ ((aligned (4)));
1420 s32 NCR53c7xx_sink;
1421 u32 NOP_insn;
1422 char NCR53c7xx_msg_reject;
1423 char NCR53c7xx_msg_abort;
1424 char NCR53c7xx_msg_nop;
1425
1426 /*
1427 * Following item introduced by RGH to support NCRc710, which is
1428 * VERY brain-dead when it come to memory moves
1429 */
1430
1431 /* DSA save area used only by the NCR chip */
1432 volatile unsigned long saved2_dsa
1433 __attribute__ ((aligned (4)));
1434
1435 volatile unsigned long emulated_intfly
1436 __attribute__ ((aligned (4)));
1437
1438 volatile int event_size, event_index;
1439 volatile struct NCR53c7x0_event *events;
1440
1441 /* If we need to generate code to kill off the currently connected
1442 command, this is where we do it. Should have a BMI instruction
1443 to source or sink the current data, followed by a JUMP
1444 to abort_connected */
1445
1446 u32 *abort_script;
1447
1448 int script_count; /* Size of script in words */
1449 u32 script[0]; /* Relocated SCSI script */
1450
1451};
1452
1453#define SCSI_IRQ_NONE 255
1454#define DMA_NONE 255
1455#define IRQ_AUTO 254
1456#define DMA_AUTO 254
1457
1458#define BOARD_GENERIC 0
1459
1460#define NCR53c7x0_insn_size(insn) \
1461 (((insn) & DCMD_TYPE_MASK) == DCMD_TYPE_MMI ? 3 : 2)
1462
1463
1464#define NCR53c7x0_local_declare() \
1465 volatile unsigned char *NCR53c7x0_address_memory; \
1466 unsigned int NCR53c7x0_address_io; \
1467 int NCR53c7x0_memory_mapped
1468
1469#define NCR53c7x0_local_setup(host) \
1470 NCR53c7x0_address_memory = (void *) (host)->base; \
1471 NCR53c7x0_address_io = (unsigned int) (host)->io_port; \
1472 NCR53c7x0_memory_mapped = ((struct NCR53c7x0_hostdata *) \
1473 host->hostdata[0])-> options & OPTION_MEMORY_MAPPED
1474
1475#ifdef BIG_ENDIAN
1476/* These could be more efficient, given that we are always memory mapped,
1477 * but they don't give the same problems as the write macros, so leave
1478 * them. */
1479#ifdef __mc68000__
1480#define NCR53c7x0_read8(address) \
1481 ((unsigned int)raw_inb((u32)NCR53c7x0_address_memory + ((u32)(address)^3)) )
1482
1483#define NCR53c7x0_read16(address) \
1484 ((unsigned int)raw_inw((u32)NCR53c7x0_address_memory + ((u32)(address)^2)))
1485#else
1486#define NCR53c7x0_read8(address) \
1487 (NCR53c7x0_memory_mapped ? \
1488 (unsigned int)readb((u32)NCR53c7x0_address_memory + ((u32)(address)^3)) : \
1489 inb(NCR53c7x0_address_io + (address)))
1490
1491#define NCR53c7x0_read16(address) \
1492 (NCR53c7x0_memory_mapped ? \
1493 (unsigned int)readw((u32)NCR53c7x0_address_memory + ((u32)(address)^2)) : \
1494 inw(NCR53c7x0_address_io + (address)))
1495#endif /* mc68000 */
1496#else
1497#define NCR53c7x0_read8(address) \
1498 (NCR53c7x0_memory_mapped ? \
1499 (unsigned int)readb((u32)NCR53c7x0_address_memory + (u32)(address)) : \
1500 inb(NCR53c7x0_address_io + (address)))
1501
1502#define NCR53c7x0_read16(address) \
1503 (NCR53c7x0_memory_mapped ? \
1504 (unsigned int)readw((u32)NCR53c7x0_address_memory + (u32)(address)) : \
1505 inw(NCR53c7x0_address_io + (address)))
1506#endif
1507
1508#ifdef __mc68000__
1509#define NCR53c7x0_read32(address) \
1510 ((unsigned int) raw_inl((u32)NCR53c7x0_address_memory + (u32)(address)))
1511#else
1512#define NCR53c7x0_read32(address) \
1513 (NCR53c7x0_memory_mapped ? \
1514 (unsigned int) readl((u32)NCR53c7x0_address_memory + (u32)(address)) : \
1515 inl(NCR53c7x0_address_io + (address)))
1516#endif /* mc68000*/
1517
1518#ifdef BIG_ENDIAN
1519/* If we are big-endian, then we are not Intel, so probably don't have
1520 * an i/o map as well as a memory map. So, let's assume memory mapped.
1521 * Also, I am having terrible problems trying to persuade the compiler
1522 * not to lay down code which does a read after write for these macros.
1523 * If you remove 'volatile' from writeb() and friends it is ok....
1524 */
1525
1526#define NCR53c7x0_write8(address,value) \
1527 *(volatile unsigned char *) \
1528 ((u32)NCR53c7x0_address_memory + ((u32)(address)^3)) = (value)
1529
1530#define NCR53c7x0_write16(address,value) \
1531 *(volatile unsigned short *) \
1532 ((u32)NCR53c7x0_address_memory + ((u32)(address)^2)) = (value)
1533
1534#define NCR53c7x0_write32(address,value) \
1535 *(volatile unsigned long *) \
1536 ((u32)NCR53c7x0_address_memory + ((u32)(address))) = (value)
1537
1538#else
1539
1540#define NCR53c7x0_write8(address,value) \
1541 (NCR53c7x0_memory_mapped ? \
1542 ({writeb((value), (u32)NCR53c7x0_address_memory + (u32)(address)); mb();}) : \
1543 outb((value), NCR53c7x0_address_io + (address)))
1544
1545#define NCR53c7x0_write16(address,value) \
1546 (NCR53c7x0_memory_mapped ? \
1547 ({writew((value), (u32)NCR53c7x0_address_memory + (u32)(address)); mb();}) : \
1548 outw((value), NCR53c7x0_address_io + (address)))
1549
1550#define NCR53c7x0_write32(address,value) \
1551 (NCR53c7x0_memory_mapped ? \
1552 ({writel((value), (u32)NCR53c7x0_address_memory + (u32)(address)); mb();}) : \
1553 outl((value), NCR53c7x0_address_io + (address)))
1554
1555#endif
1556
1557/* Patch arbitrary 32 bit words in the script */
1558#define patch_abs_32(script, offset, symbol, value) \
1559 for (i = 0; i < (sizeof (A_##symbol##_used) / sizeof \
1560 (u32)); ++i) { \
1561 (script)[A_##symbol##_used[i] - (offset)] += (value); \
1562 if (hostdata->options & OPTION_DEBUG_FIXUP) \
1563 printk("scsi%d : %s reference %d at 0x%x in %s is now 0x%x\n",\
1564 host->host_no, #symbol, i, A_##symbol##_used[i] - \
1565 (int)(offset), #script, (script)[A_##symbol##_used[i] - \
1566 (offset)]); \
1567 }
1568
1569/* Patch read/write instruction immediate field */
1570#define patch_abs_rwri_data(script, offset, symbol, value) \
1571 for (i = 0; i < (sizeof (A_##symbol##_used) / sizeof \
1572 (u32)); ++i) \
1573 (script)[A_##symbol##_used[i] - (offset)] = \
1574 ((script)[A_##symbol##_used[i] - (offset)] & \
1575 ~DBC_RWRI_IMMEDIATE_MASK) | \
1576 (((value) << DBC_RWRI_IMMEDIATE_SHIFT) & \
1577 DBC_RWRI_IMMEDIATE_MASK)
1578
1579/* Patch transfer control instruction data field */
1580#define patch_abs_tci_data(script, offset, symbol, value) \
1581 for (i = 0; i < (sizeof (A_##symbol##_used) / sizeof \
1582 (u32)); ++i) \
1583 (script)[A_##symbol##_used[i] - (offset)] = \
1584 ((script)[A_##symbol##_used[i] - (offset)] & \
1585 ~DBC_TCI_DATA_MASK) | \
1586 (((value) << DBC_TCI_DATA_SHIFT) & \
1587 DBC_TCI_DATA_MASK)
1588
1589/* Patch field in dsa structure (assignment should be +=?) */
1590#define patch_dsa_32(dsa, symbol, word, value) \
1591 { \
1592 (dsa)[(hostdata->##symbol - hostdata->dsa_start) / sizeof(u32) \
1593 + (word)] = (value); \
1594 if (hostdata->options & OPTION_DEBUG_DSA) \
1595 printk("scsi : dsa %s symbol %s(%d) word %d now 0x%x\n", \
1596 #dsa, #symbol, hostdata->##symbol, \
1597 (word), (u32) (value)); \
1598 }
1599
1600/* Paranoid people could use panic() here. */
1601#define FATAL(host) shutdown((host));
1602
1603extern int ncr53c7xx_init(struct scsi_host_template *tpnt, int board, int chip,
1604 unsigned long base, int io_port, int irq, int dma,
1605 long long options, int clock);
1606
1607#endif /* NCR53c710_C */
1608#endif /* NCR53c710_H */
diff --git a/drivers/scsi/53c7xx.scr b/drivers/scsi/53c7xx.scr
deleted file mode 100644
index 9c5694a2da8a..000000000000
--- a/drivers/scsi/53c7xx.scr
+++ /dev/null
@@ -1,1591 +0,0 @@
1#undef DEBUG
2#undef EVENTS
3#undef NO_SELECTION_TIMEOUT
4#define BIG_ENDIAN
5
6; 53c710 driver. Modified from Drew Eckhardts driver
7; for 53c810 by Richard Hirst [richard@sleepie.demon.co.uk]
8;
9; I have left the script for the 53c8xx family in here, as it is likely
10; to be useful to see what I changed when bug hunting.
11
12; NCR 53c810 driver, main script
13; Sponsored by
14; iX Multiuser Multitasking Magazine
15; hm@ix.de
16;
17; Copyright 1993, 1994, 1995 Drew Eckhardt
18; Visionary Computing
19; (Unix and Linux consulting and custom programming)
20; drew@PoohSticks.ORG
21; +1 (303) 786-7975
22;
23; TolerANT and SCSI SCRIPTS are registered trademarks of NCR Corporation.
24;
25; PRE-ALPHA
26;
27; For more information, please consult
28;
29; NCR 53C810
30; PCI-SCSI I/O Processor
31; Data Manual
32;
33; NCR 53C710
34; SCSI I/O Processor
35; Programmers Guide
36;
37; NCR Microelectronics
38; 1635 Aeroplaza Drive
39; Colorado Springs, CO 80916
40; 1+ (719) 578-3400
41;
42; Toll free literature number
43; +1 (800) 334-5454
44;
45; IMPORTANT : This code is self modifying due to the limitations of
46; the NCR53c7,8xx series chips. Persons debugging this code with
47; the remote debugger should take this into account, and NOT set
48; breakpoints in modified instructions.
49;
50; Design:
51; The NCR53c7,8xx family of SCSI chips are busmasters with an onboard
52; microcontroller using a simple instruction set.
53;
54; So, to minimize the effects of interrupt latency, and to maximize
55; throughput, this driver offloads the practical maximum amount
56; of processing to the SCSI chip while still maintaining a common
57; structure.
58;
59; Where tradeoffs were needed between efficiency on the older
60; chips and the newer NCR53c800 series, the NCR53c800 series
61; was chosen.
62;
63; While the NCR53c700 and NCR53c700-66 lacked the facilities to fully
64; automate SCSI transfers without host processor intervention, this
65; isn't the case with the NCR53c710 and newer chips which allow
66;
67; - reads and writes to the internal registers from within the SCSI
68; scripts, allowing the SCSI SCRIPTS(tm) code to save processor
69; state so that multiple threads of execution are possible, and also
70; provide an ALU for loop control, etc.
71;
72; - table indirect addressing for some instructions. This allows
73; pointers to be located relative to the DSA ((Data Structure
74; Address) register.
75;
76; These features make it possible to implement a mailbox style interface,
77; where the same piece of code is run to handle I/O for multiple threads
78; at once minimizing our need to relocate code. Since the NCR53c700/
79; NCR53c800 series have a unique combination of features, making a
80; a standard ingoing/outgoing mailbox system, costly, I've modified it.
81;
82; - Mailboxes are a mixture of code and data. This lets us greatly
83; simplify the NCR53c810 code and do things that would otherwise
84; not be possible.
85;
86; The saved data pointer is now implemented as follows :
87;
88; Control flow has been architected such that if control reaches
89; munge_save_data_pointer, on a restore pointers message or
90; reconnection, a jump to the address formerly in the TEMP register
91; will allow the SCSI command to resume execution.
92;
93
94;
95; Note : the DSA structures must be aligned on 32 bit boundaries,
96; since the source and destination of MOVE MEMORY instructions
97; must share the same alignment and this is the alignment of the
98; NCR registers.
99;
100
101; For some systems (MVME166, for example) dmode is always the same, so don't
102; waste time writing it
103
104#if 1
105#define DMODE_MEMORY_TO_NCR
106#define DMODE_MEMORY_TO_MEMORY
107#define DMODE_NCR_TO_MEMORY
108#else
109#define DMODE_MEMORY_TO_NCR MOVE dmode_memory_to_ncr TO DMODE
110#define DMODE_MEMORY_TO_MEMORY MOVE dmode_memory_to_memory TO DMODE
111#define DMODE_NCR_TO_MEMORY MOVE dmode_ncr_to_memory TO DMODE
112#endif
113
114ABSOLUTE dsa_temp_lun = 0 ; Patch to lun for current dsa
115ABSOLUTE dsa_temp_next = 0 ; Patch to dsa next for current dsa
116ABSOLUTE dsa_temp_addr_next = 0 ; Patch to address of dsa next address
117 ; for current dsa
118ABSOLUTE dsa_temp_sync = 0 ; Patch to address of per-target
119 ; sync routine
120ABSOLUTE dsa_sscf_710 = 0 ; Patch to address of per-target
121 ; sscf value (53c710)
122ABSOLUTE dsa_temp_target = 0 ; Patch to id for current dsa
123ABSOLUTE dsa_temp_addr_saved_pointer = 0; Patch to address of per-command
124 ; saved data pointer
125ABSOLUTE dsa_temp_addr_residual = 0 ; Patch to address of per-command
126 ; current residual code
127ABSOLUTE dsa_temp_addr_saved_residual = 0; Patch to address of per-command
128 ; saved residual code
129ABSOLUTE dsa_temp_addr_new_value = 0 ; Address of value for JUMP operand
130ABSOLUTE dsa_temp_addr_array_value = 0 ; Address to copy to
131ABSOLUTE dsa_temp_addr_dsa_value = 0 ; Address of this DSA value
132
133;
134; Once a device has initiated reselection, we need to compare it
135; against the singly linked list of commands which have disconnected
136; and are pending reselection. These commands are maintained in
137; an unordered singly linked list of DSA structures, through the
138; DSA pointers at their 'centers' headed by the reconnect_dsa_head
139; pointer.
140;
141; To avoid complications in removing commands from the list,
142; I minimize the amount of expensive (at eight operations per
143; addition @ 500-600ns each) pointer operations which must
144; be done in the NCR driver by precomputing them on the
145; host processor during dsa structure generation.
146;
147; The fixed-up per DSA code knows how to recognize the nexus
148; associated with the corresponding SCSI command, and modifies
149; the source and destination pointers for the MOVE MEMORY
150; instruction which is executed when reselected_ok is called
151; to remove the command from the list. Similarly, DSA is
152; loaded with the address of the next DSA structure and
153; reselected_check_next is called if a failure occurs.
154;
155; Perhaps more concisely, the net effect of the mess is
156;
157; for (dsa = reconnect_dsa_head, dest = &reconnect_dsa_head,
158; src = NULL; dsa; dest = &dsa->next, dsa = dsa->next) {
159; src = &dsa->next;
160; if (target_id == dsa->id && target_lun == dsa->lun) {
161; *dest = *src;
162; break;
163; }
164; }
165;
166; if (!dsa)
167; error (int_err_unexpected_reselect);
168; else
169; longjmp (dsa->jump_resume, 0);
170;
171;
172
173#if (CHIP != 700) && (CHIP != 70066)
174; Define DSA structure used for mailboxes
175ENTRY dsa_code_template
176dsa_code_template:
177ENTRY dsa_code_begin
178dsa_code_begin:
179; RGH: Don't care about TEMP and DSA here
180 DMODE_MEMORY_TO_NCR
181 MOVE MEMORY 4, dsa_temp_addr_dsa_value, addr_scratch
182 DMODE_MEMORY_TO_MEMORY
183#if (CHIP == 710)
184 MOVE MEMORY 4, addr_scratch, saved_dsa
185 ; We are about to go and select the device, so must set SSCF bits
186 MOVE MEMORY 4, dsa_sscf_710, addr_scratch
187#ifdef BIG_ENDIAN
188 MOVE SCRATCH3 TO SFBR
189#else
190 MOVE SCRATCH0 TO SFBR
191#endif
192 MOVE SFBR TO SBCL
193 MOVE MEMORY 4, saved_dsa, addr_dsa
194#else
195 CALL scratch_to_dsa
196#endif
197 CALL select
198; Handle the phase mismatch which may have resulted from the
199; MOVE FROM dsa_msgout if we returned here. The CLEAR ATN
200; may or may not be necessary, and we should update script_asm.pl
201; to handle multiple pieces.
202 CLEAR ATN
203 CLEAR ACK
204
205; Replace second operand with address of JUMP instruction dest operand
206; in schedule table for this DSA. Becomes dsa_jump_dest in 53c7,8xx.c.
207ENTRY dsa_code_fix_jump
208dsa_code_fix_jump:
209 MOVE MEMORY 4, NOP_insn, 0
210 JUMP select_done
211
212; wrong_dsa loads the DSA register with the value of the dsa_next
213; field.
214;
215wrong_dsa:
216#if (CHIP == 710)
217; NOTE DSA is corrupt when we arrive here!
218#endif
219; Patch the MOVE MEMORY INSTRUCTION such that
220; the destination address is the address of the OLD
221; next pointer.
222;
223 MOVE MEMORY 4, dsa_temp_addr_next, reselected_ok_patch + 8
224 DMODE_MEMORY_TO_NCR
225;
226; Move the _contents_ of the next pointer into the DSA register as
227; the next I_T_L or I_T_L_Q tupple to check against the established
228; nexus.
229;
230 MOVE MEMORY 4, dsa_temp_next, addr_scratch
231 DMODE_MEMORY_TO_MEMORY
232#if (CHIP == 710)
233 MOVE MEMORY 4, addr_scratch, saved_dsa
234 MOVE MEMORY 4, saved_dsa, addr_dsa
235#else
236 CALL scratch_to_dsa
237#endif
238 JUMP reselected_check_next
239
240ABSOLUTE dsa_save_data_pointer = 0
241ENTRY dsa_code_save_data_pointer
242dsa_code_save_data_pointer:
243#if (CHIP == 710)
244 ; When we get here, TEMP has been saved in jump_temp+4, DSA is corrupt
245 ; We MUST return with DSA correct
246 MOVE MEMORY 4, jump_temp+4, dsa_temp_addr_saved_pointer
247; HARD CODED : 24 bytes needs to agree with 53c7,8xx.h
248 MOVE MEMORY 24, dsa_temp_addr_residual, dsa_temp_addr_saved_residual
249 CLEAR ACK
250#ifdef DEBUG
251 INT int_debug_saved
252#endif
253 MOVE MEMORY 4, saved_dsa, addr_dsa
254 JUMP jump_temp
255#else
256 DMODE_NCR_TO_MEMORY
257 MOVE MEMORY 4, addr_temp, dsa_temp_addr_saved_pointer
258 DMODE_MEMORY_TO_MEMORY
259; HARD CODED : 24 bytes needs to agree with 53c7,8xx.h
260 MOVE MEMORY 24, dsa_temp_addr_residual, dsa_temp_addr_saved_residual
261 CLEAR ACK
262#ifdef DEBUG
263 INT int_debug_saved
264#endif
265 RETURN
266#endif
267ABSOLUTE dsa_restore_pointers = 0
268ENTRY dsa_code_restore_pointers
269dsa_code_restore_pointers:
270#if (CHIP == 710)
271 ; TEMP and DSA are corrupt when we get here, but who cares!
272 MOVE MEMORY 4, dsa_temp_addr_saved_pointer, jump_temp + 4
273; HARD CODED : 24 bytes needs to agree with 53c7,8xx.h
274 MOVE MEMORY 24, dsa_temp_addr_saved_residual, dsa_temp_addr_residual
275 CLEAR ACK
276 ; Restore DSA, note we don't care about TEMP
277 MOVE MEMORY 4, saved_dsa, addr_dsa
278#ifdef DEBUG
279 INT int_debug_restored
280#endif
281 JUMP jump_temp
282#else
283 DMODE_MEMORY_TO_NCR
284 MOVE MEMORY 4, dsa_temp_addr_saved_pointer, addr_temp
285 DMODE_MEMORY_TO_MEMORY
286; HARD CODED : 24 bytes needs to agree with 53c7,8xx.h
287 MOVE MEMORY 24, dsa_temp_addr_saved_residual, dsa_temp_addr_residual
288 CLEAR ACK
289#ifdef DEBUG
290 INT int_debug_restored
291#endif
292 RETURN
293#endif
294
295ABSOLUTE dsa_check_reselect = 0
296; dsa_check_reselect determines whether or not the current target and
297; lun match the current DSA
298ENTRY dsa_code_check_reselect
299dsa_code_check_reselect:
300#if (CHIP == 710)
301 /* Arrives here with DSA correct */
302 /* Assumes we are always ID 7 */
303 MOVE LCRC TO SFBR ; LCRC has our ID and his ID bits set
304 JUMP REL (wrong_dsa), IF NOT dsa_temp_target, AND MASK 0x80
305#else
306 MOVE SSID TO SFBR ; SSID contains 3 bit target ID
307; FIXME : we need to accommodate bit fielded and binary here for '7xx/'8xx chips
308 JUMP REL (wrong_dsa), IF NOT dsa_temp_target, AND MASK 0xf8
309#endif
310;
311; Hack - move to scratch first, since SFBR is not writeable
312; via the CPU and hence a MOVE MEMORY instruction.
313;
314 DMODE_MEMORY_TO_NCR
315 MOVE MEMORY 1, reselected_identify, addr_scratch
316 DMODE_MEMORY_TO_MEMORY
317#ifdef BIG_ENDIAN
318 ; BIG ENDIAN ON MVME16x
319 MOVE SCRATCH3 TO SFBR
320#else
321 MOVE SCRATCH0 TO SFBR
322#endif
323; FIXME : we need to accommodate bit fielded and binary here for '7xx/'8xx chips
324; Are you sure about that? richard@sleepie.demon.co.uk
325 JUMP REL (wrong_dsa), IF NOT dsa_temp_lun, AND MASK 0xf8
326; Patch the MOVE MEMORY INSTRUCTION such that
327; the source address is the address of this dsa's
328; next pointer.
329 MOVE MEMORY 4, dsa_temp_addr_next, reselected_ok_patch + 4
330 CALL reselected_ok
331#if (CHIP == 710)
332; Restore DSA following memory moves in reselected_ok
333; dsa_temp_sync doesn't really care about DSA, but it has an
334; optional debug INT so a valid DSA is a good idea.
335 MOVE MEMORY 4, saved_dsa, addr_dsa
336#endif
337 CALL dsa_temp_sync
338; Release ACK on the IDENTIFY message _after_ we've set the synchronous
339; transfer parameters!
340 CLEAR ACK
341; Implicitly restore pointers on reselection, so a RETURN
342; will transfer control back to the right spot.
343 CALL REL (dsa_code_restore_pointers)
344 RETURN
345ENTRY dsa_zero
346dsa_zero:
347ENTRY dsa_code_template_end
348dsa_code_template_end:
349
350; Perform sanity check for dsa_fields_start == dsa_code_template_end -
351; dsa_zero, puke.
352
353ABSOLUTE dsa_fields_start = 0 ; Sanity marker
354 ; pad 48 bytes (fix this RSN)
355ABSOLUTE dsa_next = 48 ; len 4 Next DSA
356 ; del 4 Previous DSA address
357ABSOLUTE dsa_cmnd = 56 ; len 4 Scsi_Cmnd * for this thread.
358ABSOLUTE dsa_select = 60 ; len 4 Device ID, Period, Offset for
359 ; table indirect select
360ABSOLUTE dsa_msgout = 64 ; len 8 table indirect move parameter for
361 ; select message
362ABSOLUTE dsa_cmdout = 72 ; len 8 table indirect move parameter for
363 ; command
364ABSOLUTE dsa_dataout = 80 ; len 4 code pointer for dataout
365ABSOLUTE dsa_datain = 84 ; len 4 code pointer for datain
366ABSOLUTE dsa_msgin = 88 ; len 8 table indirect move for msgin
367ABSOLUTE dsa_status = 96 ; len 8 table indirect move for status byte
368ABSOLUTE dsa_msgout_other = 104 ; len 8 table indirect for normal message out
369 ; (Synchronous transfer negotiation, etc).
370ABSOLUTE dsa_end = 112
371
372ABSOLUTE schedule = 0 ; Array of JUMP dsa_begin or JUMP (next),
373 ; terminated by a call to JUMP wait_reselect
374
375; Linked lists of DSA structures
376ABSOLUTE reconnect_dsa_head = 0 ; Link list of DSAs which can reconnect
377ABSOLUTE addr_reconnect_dsa_head = 0 ; Address of variable containing
378 ; address of reconnect_dsa_head
379
380; These select the source and destination of a MOVE MEMORY instruction
381ABSOLUTE dmode_memory_to_memory = 0x0
382ABSOLUTE dmode_memory_to_ncr = 0x0
383ABSOLUTE dmode_ncr_to_memory = 0x0
384
385ABSOLUTE addr_scratch = 0x0
386ABSOLUTE addr_temp = 0x0
387#if (CHIP == 710)
388ABSOLUTE saved_dsa = 0x0
389ABSOLUTE emulfly = 0x0
390ABSOLUTE addr_dsa = 0x0
391#endif
392#endif /* CHIP != 700 && CHIP != 70066 */
393
394; Interrupts -
395; MSB indicates type
396; 0 handle error condition
397; 1 handle message
398; 2 handle normal condition
399; 3 debugging interrupt
400; 4 testing interrupt
401; Next byte indicates specific error
402
403; XXX not yet implemented, I'm not sure if I want to -
404; Next byte indicates the routine the error occurred in
405; The LSB indicates the specific place the error occurred
406
407ABSOLUTE int_err_unexpected_phase = 0x00000000 ; Unexpected phase encountered
408ABSOLUTE int_err_selected = 0x00010000 ; SELECTED (nee RESELECTED)
409ABSOLUTE int_err_unexpected_reselect = 0x00020000
410ABSOLUTE int_err_check_condition = 0x00030000
411ABSOLUTE int_err_no_phase = 0x00040000
412ABSOLUTE int_msg_wdtr = 0x01000000 ; WDTR message received
413ABSOLUTE int_msg_sdtr = 0x01010000 ; SDTR received
414ABSOLUTE int_msg_1 = 0x01020000 ; single byte special message
415 ; received
416
417ABSOLUTE int_norm_select_complete = 0x02000000 ; Select complete, reprogram
418 ; registers.
419ABSOLUTE int_norm_reselect_complete = 0x02010000 ; Nexus established
420ABSOLUTE int_norm_command_complete = 0x02020000 ; Command complete
421ABSOLUTE int_norm_disconnected = 0x02030000 ; Disconnected
422ABSOLUTE int_norm_aborted =0x02040000 ; Aborted *dsa
423ABSOLUTE int_norm_reset = 0x02050000 ; Generated BUS reset.
424ABSOLUTE int_norm_emulateintfly = 0x02060000 ; 53C710 Emulated intfly
425ABSOLUTE int_debug_break = 0x03000000 ; Break point
426#ifdef DEBUG
427ABSOLUTE int_debug_scheduled = 0x03010000 ; new I/O scheduled
428ABSOLUTE int_debug_idle = 0x03020000 ; scheduler is idle
429ABSOLUTE int_debug_dsa_loaded = 0x03030000 ; dsa reloaded
430ABSOLUTE int_debug_reselected = 0x03040000 ; NCR reselected
431ABSOLUTE int_debug_head = 0x03050000 ; issue head overwritten
432ABSOLUTE int_debug_disconnected = 0x03060000 ; disconnected
433ABSOLUTE int_debug_disconnect_msg = 0x03070000 ; got message to disconnect
434ABSOLUTE int_debug_dsa_schedule = 0x03080000 ; in dsa_schedule
435ABSOLUTE int_debug_reselect_check = 0x03090000 ; Check for reselection of DSA
436ABSOLUTE int_debug_reselected_ok = 0x030a0000 ; Reselection accepted
437#endif
438ABSOLUTE int_debug_panic = 0x030b0000 ; Panic driver
439#ifdef DEBUG
440ABSOLUTE int_debug_saved = 0x030c0000 ; save/restore pointers
441ABSOLUTE int_debug_restored = 0x030d0000
442ABSOLUTE int_debug_sync = 0x030e0000 ; Sanity check synchronous
443 ; parameters.
444ABSOLUTE int_debug_datain = 0x030f0000 ; going into data in phase
445 ; now.
446ABSOLUTE int_debug_check_dsa = 0x03100000 ; Sanity check DSA against
447 ; SDID.
448#endif
449
450ABSOLUTE int_test_1 = 0x04000000 ; Test 1 complete
451ABSOLUTE int_test_2 = 0x04010000 ; Test 2 complete
452ABSOLUTE int_test_3 = 0x04020000 ; Test 3 complete
453
454
455; These should start with 0x05000000, with low bits incrementing for
456; each one.
457
458#ifdef EVENTS
459ABSOLUTE int_EVENT_SELECT = 0
460ABSOLUTE int_EVENT_DISCONNECT = 0
461ABSOLUTE int_EVENT_RESELECT = 0
462ABSOLUTE int_EVENT_COMPLETE = 0
463ABSOLUTE int_EVENT_IDLE = 0
464ABSOLUTE int_EVENT_SELECT_FAILED = 0
465ABSOLUTE int_EVENT_BEFORE_SELECT = 0
466ABSOLUTE int_EVENT_RESELECT_FAILED = 0
467#endif
468
469ABSOLUTE NCR53c7xx_msg_abort = 0 ; Pointer to abort message
470ABSOLUTE NCR53c7xx_msg_reject = 0 ; Pointer to reject message
471ABSOLUTE NCR53c7xx_zero = 0 ; long with zero in it, use for source
472ABSOLUTE NCR53c7xx_sink = 0 ; long to dump worthless data in
473ABSOLUTE NOP_insn = 0 ; NOP instruction
474
475; Pointer to message, potentially multi-byte
476ABSOLUTE msg_buf = 0
477
478; Pointer to holding area for reselection information
479ABSOLUTE reselected_identify = 0
480ABSOLUTE reselected_tag = 0
481
482; Request sense command pointer, it's a 6 byte command, should
483; be constant for all commands since we always want 16 bytes of
484; sense and we don't need to change any fields as we did under
485; SCSI-I when we actually cared about the LUN field.
486;EXTERNAL NCR53c7xx_sense ; Request sense command
487
488#if (CHIP != 700) && (CHIP != 70066)
489; dsa_schedule
490; PURPOSE : after a DISCONNECT message has been received, and pointers
491; saved, insert the current DSA structure at the head of the
492; disconnected queue and fall through to the scheduler.
493;
494; CALLS : OK
495;
496; INPUTS : dsa - current DSA structure, reconnect_dsa_head - list
497; of disconnected commands
498;
499; MODIFIES : SCRATCH, reconnect_dsa_head
500;
501; EXITS : always passes control to schedule
502
503ENTRY dsa_schedule
504dsa_schedule:
505#ifdef DEBUG
506 INT int_debug_dsa_schedule
507#endif
508
509;
510; Calculate the address of the next pointer within the DSA
511; structure of the command that is currently disconnecting
512;
513#if (CHIP == 710)
514 ; Read what should be the current DSA from memory - actual DSA
515 ; register is probably corrupt
516 MOVE MEMORY 4, saved_dsa, addr_scratch
517#else
518 CALL dsa_to_scratch
519#endif
520 MOVE SCRATCH0 + dsa_next TO SCRATCH0
521 MOVE SCRATCH1 + 0 TO SCRATCH1 WITH CARRY
522 MOVE SCRATCH2 + 0 TO SCRATCH2 WITH CARRY
523 MOVE SCRATCH3 + 0 TO SCRATCH3 WITH CARRY
524
525; Point the next field of this DSA structure at the current disconnected
526; list
527 DMODE_NCR_TO_MEMORY
528 MOVE MEMORY 4, addr_scratch, dsa_schedule_insert + 8
529 DMODE_MEMORY_TO_MEMORY
530dsa_schedule_insert:
531 MOVE MEMORY 4, reconnect_dsa_head, 0
532
533; And update the head pointer.
534#if (CHIP == 710)
535 ; Read what should be the current DSA from memory - actual DSA
536 ; register is probably corrupt
537 MOVE MEMORY 4, saved_dsa, addr_scratch
538#else
539 CALL dsa_to_scratch
540#endif
541 DMODE_NCR_TO_MEMORY
542 MOVE MEMORY 4, addr_scratch, reconnect_dsa_head
543 DMODE_MEMORY_TO_MEMORY
544/* Temporarily, see what happens. */
545#ifndef ORIGINAL
546#if (CHIP != 710)
547 MOVE SCNTL2 & 0x7f TO SCNTL2
548#endif
549 CLEAR ACK
550#endif
551#if (CHIP == 710)
552 ; Time to correct DSA following memory move
553 MOVE MEMORY 4, saved_dsa, addr_dsa
554#endif
555 WAIT DISCONNECT
556#ifdef EVENTS
557 INT int_EVENT_DISCONNECT;
558#endif
559#ifdef DEBUG
560 INT int_debug_disconnected
561#endif
562 JUMP schedule
563#endif
564
565;
566; select
567;
568; PURPOSE : establish a nexus for the SCSI command referenced by DSA.
569; On success, the current DSA structure is removed from the issue
570; queue. Usually, this is entered as a fall-through from schedule,
571; although the contingent allegiance handling code will write
572; the select entry address to the DSP to restart a command as a
573; REQUEST SENSE. A message is sent (usually IDENTIFY, although
574; additional SDTR or WDTR messages may be sent). COMMAND OUT
575; is handled.
576;
577; INPUTS : DSA - SCSI command, issue_dsa_head
578;
579; CALLS : NOT OK
580;
581; MODIFIES : SCRATCH, issue_dsa_head
582;
583; EXITS : on reselection or selection, go to select_failed
584; otherwise, RETURN so control is passed back to
585; dsa_begin.
586;
587
588ENTRY select
589select:
590
591#ifdef EVENTS
592 INT int_EVENT_BEFORE_SELECT
593#endif
594
595#ifdef DEBUG
596 INT int_debug_scheduled
597#endif
598 CLEAR TARGET
599
600; XXX
601;
602; In effect, SELECTION operations are backgrounded, with execution
603; continuing until code which waits for REQ or a fatal interrupt is
604; encountered.
605;
606; So, for more performance, we could overlap the code which removes
607; the command from the NCRs issue queue with the selection, but
608; at this point I don't want to deal with the error recovery.
609;
610
611#if (CHIP != 700) && (CHIP != 70066)
612#if (CHIP == 710)
613 ; Enable selection timer
614#ifdef NO_SELECTION_TIMEOUT
615 MOVE CTEST7 & 0xff TO CTEST7
616#else
617 MOVE CTEST7 & 0xef TO CTEST7
618#endif
619#endif
620 SELECT ATN FROM dsa_select, select_failed
621 JUMP select_msgout, WHEN MSG_OUT
622ENTRY select_msgout
623select_msgout:
624#if (CHIP == 710)
625 ; Disable selection timer
626 MOVE CTEST7 | 0x10 TO CTEST7
627#endif
628 MOVE FROM dsa_msgout, WHEN MSG_OUT
629#else
630ENTRY select_msgout
631 SELECT ATN 0, select_failed
632select_msgout:
633 MOVE 0, 0, WHEN MSGOUT
634#endif
635
636#ifdef EVENTS
637 INT int_EVENT_SELECT
638#endif
639 RETURN
640
641;
642; select_done
643;
644; PURPOSE: continue on to normal data transfer; called as the exit
645; point from dsa_begin.
646;
647; INPUTS: dsa
648;
649; CALLS: OK
650;
651;
652
653select_done:
654#if (CHIP == 710)
655; NOTE DSA is corrupt when we arrive here!
656 MOVE MEMORY 4, saved_dsa, addr_dsa
657#endif
658
659#ifdef DEBUG
660ENTRY select_check_dsa
661select_check_dsa:
662 INT int_debug_check_dsa
663#endif
664
665; After a successful selection, we should get either a CMD phase or
666; some transfer request negotiation message.
667
668 JUMP cmdout, WHEN CMD
669 INT int_err_unexpected_phase, WHEN NOT MSG_IN
670
671select_msg_in:
672 CALL msg_in, WHEN MSG_IN
673 JUMP select_msg_in, WHEN MSG_IN
674
675cmdout:
676 INT int_err_unexpected_phase, WHEN NOT CMD
677#if (CHIP == 700)
678 INT int_norm_selected
679#endif
680ENTRY cmdout_cmdout
681cmdout_cmdout:
682#if (CHIP != 700) && (CHIP != 70066)
683 MOVE FROM dsa_cmdout, WHEN CMD
684#else
685 MOVE 0, 0, WHEN CMD
686#endif /* (CHIP != 700) && (CHIP != 70066) */
687
688;
689; data_transfer
690; other_out
691; other_in
692; other_transfer
693;
694; PURPOSE : handle the main data transfer for a SCSI command in
695; several parts. In the first part, data_transfer, DATA_IN
696; and DATA_OUT phases are allowed, with the user provided
697; code (usually dynamically generated based on the scatter/gather
698; list associated with a SCSI command) called to handle these
699; phases.
700;
701; After control has passed to one of the user provided
702; DATA_IN or DATA_OUT routines, back calls are made to
703; other_transfer_in or other_transfer_out to handle non-DATA IN
704; and DATA OUT phases respectively, with the state of the active
705; data pointer being preserved in TEMP.
706;
707; On completion, the user code passes control to other_transfer
708; which causes DATA_IN and DATA_OUT to result in unexpected_phase
709; interrupts so that data overruns may be trapped.
710;
711; INPUTS : DSA - SCSI command
712;
713; CALLS : OK in data_transfer_start, not ok in other_out and other_in, ok in
714; other_transfer
715;
716; MODIFIES : SCRATCH
717;
718; EXITS : if STATUS IN is detected, signifying command completion,
719; the NCR jumps to command_complete. If MSG IN occurs, a
720; CALL is made to msg_in. Otherwise, other_transfer runs in
721; an infinite loop.
722;
723
724ENTRY data_transfer
725data_transfer:
726 JUMP cmdout_cmdout, WHEN CMD
727 CALL msg_in, WHEN MSG_IN
728 INT int_err_unexpected_phase, WHEN MSG_OUT
729 JUMP do_dataout, WHEN DATA_OUT
730 JUMP do_datain, WHEN DATA_IN
731 JUMP command_complete, WHEN STATUS
732 JUMP data_transfer
733ENTRY end_data_transfer
734end_data_transfer:
735
736;
737; FIXME: On NCR53c700 and NCR53c700-66 chips, do_dataout/do_datain
738; should be fixed up whenever the nexus changes so it can point to the
739; correct routine for that command.
740;
741
742#if (CHIP != 700) && (CHIP != 70066)
743; Nasty jump to dsa->dataout
744do_dataout:
745#if (CHIP == 710)
746 MOVE MEMORY 4, saved_dsa, addr_scratch
747#else
748 CALL dsa_to_scratch
749#endif
750 MOVE SCRATCH0 + dsa_dataout TO SCRATCH0
751 MOVE SCRATCH1 + 0 TO SCRATCH1 WITH CARRY
752 MOVE SCRATCH2 + 0 TO SCRATCH2 WITH CARRY
753 MOVE SCRATCH3 + 0 TO SCRATCH3 WITH CARRY
754 DMODE_NCR_TO_MEMORY
755 MOVE MEMORY 4, addr_scratch, dataout_to_jump + 4
756 DMODE_MEMORY_TO_MEMORY
757dataout_to_jump:
758 MOVE MEMORY 4, 0, dataout_jump + 4
759#if (CHIP == 710)
760 ; Time to correct DSA following memory move
761 MOVE MEMORY 4, saved_dsa, addr_dsa
762#endif
763dataout_jump:
764 JUMP 0
765
766; Nasty jump to dsa->dsain
767do_datain:
768#if (CHIP == 710)
769 MOVE MEMORY 4, saved_dsa, addr_scratch
770#else
771 CALL dsa_to_scratch
772#endif
773 MOVE SCRATCH0 + dsa_datain TO SCRATCH0
774 MOVE SCRATCH1 + 0 TO SCRATCH1 WITH CARRY
775 MOVE SCRATCH2 + 0 TO SCRATCH2 WITH CARRY
776 MOVE SCRATCH3 + 0 TO SCRATCH3 WITH CARRY
777 DMODE_NCR_TO_MEMORY
778 MOVE MEMORY 4, addr_scratch, datain_to_jump + 4
779 DMODE_MEMORY_TO_MEMORY
780ENTRY datain_to_jump
781datain_to_jump:
782 MOVE MEMORY 4, 0, datain_jump + 4
783#if (CHIP == 710)
784 ; Time to correct DSA following memory move
785 MOVE MEMORY 4, saved_dsa, addr_dsa
786#endif
787#ifdef DEBUG
788 INT int_debug_datain
789#endif
790datain_jump:
791 JUMP 0
792#endif /* (CHIP != 700) && (CHIP != 70066) */
793
794
795; Note that other_out and other_in loop until a non-data phase
796; is discovered, so we only execute return statements when we
797; can go on to the next data phase block move statement.
798
799ENTRY other_out
800other_out:
801#if 0
802 INT 0x03ffdead
803#endif
804 INT int_err_unexpected_phase, WHEN CMD
805 JUMP msg_in_restart, WHEN MSG_IN
806 INT int_err_unexpected_phase, WHEN MSG_OUT
807 INT int_err_unexpected_phase, WHEN DATA_IN
808 JUMP command_complete, WHEN STATUS
809 JUMP other_out, WHEN NOT DATA_OUT
810#if (CHIP == 710)
811; TEMP should be OK, as we got here from a call in the user dataout code.
812#endif
813 RETURN
814
815ENTRY other_in
816other_in:
817#if 0
818 INT 0x03ffdead
819#endif
820 INT int_err_unexpected_phase, WHEN CMD
821 JUMP msg_in_restart, WHEN MSG_IN
822 INT int_err_unexpected_phase, WHEN MSG_OUT
823 INT int_err_unexpected_phase, WHEN DATA_OUT
824 JUMP command_complete, WHEN STATUS
825 JUMP other_in, WHEN NOT DATA_IN
826#if (CHIP == 710)
827; TEMP should be OK, as we got here from a call in the user datain code.
828#endif
829 RETURN
830
831
832ENTRY other_transfer
833other_transfer:
834 INT int_err_unexpected_phase, WHEN CMD
835 CALL msg_in, WHEN MSG_IN
836 INT int_err_unexpected_phase, WHEN MSG_OUT
837 INT int_err_unexpected_phase, WHEN DATA_OUT
838 INT int_err_unexpected_phase, WHEN DATA_IN
839 JUMP command_complete, WHEN STATUS
840 JUMP other_transfer
841
842;
843; msg_in_restart
844; msg_in
845; munge_msg
846;
847; PURPOSE : process messages from a target. msg_in is called when the
848; caller hasn't read the first byte of the message. munge_message
849; is called when the caller has read the first byte of the message,
850; and left it in SFBR. msg_in_restart is called when the caller
851; hasn't read the first byte of the message, and wishes RETURN
852; to transfer control back to the address of the conditional
853; CALL instruction rather than to the instruction after it.
854;
855; Various int_* interrupts are generated when the host system
856; needs to intervene, as is the case with SDTR, WDTR, and
857; INITIATE RECOVERY messages.
858;
859; When the host system handles one of these interrupts,
860; it can respond by reentering at reject_message,
861; which rejects the message and returns control to
862; the caller of msg_in or munge_msg, accept_message
863; which clears ACK and returns control, or reply_message
864; which sends the message pointed to by the DSA
865; msgout_other table indirect field.
866;
867; DISCONNECT messages are handled by moving the command
868; to the reconnect_dsa_queue.
869#if (CHIP == 710)
870; NOTE: DSA should be valid when we get here - we cannot save both it
871; and TEMP in this routine.
872#endif
873;
874; INPUTS : DSA - SCSI COMMAND, SFBR - first byte of message (munge_msg
875; only)
876;
877; CALLS : NO. The TEMP register isn't backed up to allow nested calls.
878;
879; MODIFIES : SCRATCH, DSA on DISCONNECT
880;
881; EXITS : On receipt of SAVE DATA POINTER, RESTORE POINTERS,
882; and normal return from message handlers running under
883; Linux, control is returned to the caller. Receipt
884; of DISCONNECT messages pass control to dsa_schedule.
885;
886ENTRY msg_in_restart
887msg_in_restart:
888; XXX - hackish
889;
890; Since it's easier to debug changes to the statically
891; compiled code, rather than the dynamically generated
892; stuff, such as
893;
894; MOVE x, y, WHEN data_phase
895; CALL other_z, WHEN NOT data_phase
896; MOVE x, y, WHEN data_phase
897;
898; I'd like to have certain routines (notably the message handler)
899; restart on the conditional call rather than the next instruction.
900;
901; So, subtract 8 from the return address
902
903 MOVE TEMP0 + 0xf8 TO TEMP0
904 MOVE TEMP1 + 0xff TO TEMP1 WITH CARRY
905 MOVE TEMP2 + 0xff TO TEMP2 WITH CARRY
906 MOVE TEMP3 + 0xff TO TEMP3 WITH CARRY
907
908ENTRY msg_in
909msg_in:
910 MOVE 1, msg_buf, WHEN MSG_IN
911
912munge_msg:
913 JUMP munge_extended, IF 0x01 ; EXTENDED MESSAGE
914 JUMP munge_2, IF 0x20, AND MASK 0xdf ; two byte message
915;
916; XXX - I've seen a handful of broken SCSI devices which fail to issue
917; a SAVE POINTERS message before disconnecting in the middle of
918; a transfer, assuming that the DATA POINTER will be implicitly
919; restored.
920;
921; Historically, I've often done an implicit save when the DISCONNECT
922; message is processed. We may want to consider having the option of
923; doing that here.
924;
925 JUMP munge_save_data_pointer, IF 0x02 ; SAVE DATA POINTER
926 JUMP munge_restore_pointers, IF 0x03 ; RESTORE POINTERS
927 JUMP munge_disconnect, IF 0x04 ; DISCONNECT
928 INT int_msg_1, IF 0x07 ; MESSAGE REJECT
929 INT int_msg_1, IF 0x0f ; INITIATE RECOVERY
930#ifdef EVENTS
931 INT int_EVENT_SELECT_FAILED
932#endif
933 JUMP reject_message
934
935munge_2:
936 JUMP reject_message
937;
938; The SCSI standard allows targets to recover from transient
939; error conditions by backing up the data pointer with a
940; RESTORE POINTERS message.
941;
942; So, we must save and restore the _residual_ code as well as
943; the current instruction pointer. Because of this messiness,
944; it is simpler to put dynamic code in the dsa for this and to
945; just do a simple jump down there.
946;
947
948munge_save_data_pointer:
949#if (CHIP == 710)
950 ; We have something in TEMP here, so first we must save that
951 MOVE TEMP0 TO SFBR
952 MOVE SFBR TO SCRATCH0
953 MOVE TEMP1 TO SFBR
954 MOVE SFBR TO SCRATCH1
955 MOVE TEMP2 TO SFBR
956 MOVE SFBR TO SCRATCH2
957 MOVE TEMP3 TO SFBR
958 MOVE SFBR TO SCRATCH3
959 MOVE MEMORY 4, addr_scratch, jump_temp + 4
960 ; Now restore DSA
961 MOVE MEMORY 4, saved_dsa, addr_dsa
962#endif
963 MOVE DSA0 + dsa_save_data_pointer TO SFBR
964 MOVE SFBR TO SCRATCH0
965 MOVE DSA1 + 0xff TO SFBR WITH CARRY
966 MOVE SFBR TO SCRATCH1
967 MOVE DSA2 + 0xff TO SFBR WITH CARRY
968 MOVE SFBR TO SCRATCH2
969 MOVE DSA3 + 0xff TO SFBR WITH CARRY
970 MOVE SFBR TO SCRATCH3
971
972 DMODE_NCR_TO_MEMORY
973 MOVE MEMORY 4, addr_scratch, jump_dsa_save + 4
974 DMODE_MEMORY_TO_MEMORY
975jump_dsa_save:
976 JUMP 0
977
978munge_restore_pointers:
979#if (CHIP == 710)
980 ; The code at dsa_restore_pointers will RETURN, but we don't care
981 ; about TEMP here, as it will overwrite it anyway.
982#endif
983 MOVE DSA0 + dsa_restore_pointers TO SFBR
984 MOVE SFBR TO SCRATCH0
985 MOVE DSA1 + 0xff TO SFBR WITH CARRY
986 MOVE SFBR TO SCRATCH1
987 MOVE DSA2 + 0xff TO SFBR WITH CARRY
988 MOVE SFBR TO SCRATCH2
989 MOVE DSA3 + 0xff TO SFBR WITH CARRY
990 MOVE SFBR TO SCRATCH3
991
992 DMODE_NCR_TO_MEMORY
993 MOVE MEMORY 4, addr_scratch, jump_dsa_restore + 4
994 DMODE_MEMORY_TO_MEMORY
995jump_dsa_restore:
996 JUMP 0
997
998
999munge_disconnect:
1000#ifdef DEBUG
1001 INT int_debug_disconnect_msg
1002#endif
1003
1004/*
1005 * Before, we overlapped processing with waiting for disconnect, but
1006 * debugging was beginning to appear messy. Temporarily move things
1007 * to just before the WAIT DISCONNECT.
1008 */
1009
1010#ifdef ORIGINAL
1011#if (CHIP == 710)
1012; Following clears Unexpected Disconnect bit. What do we do?
1013#else
1014 MOVE SCNTL2 & 0x7f TO SCNTL2
1015#endif
1016 CLEAR ACK
1017#endif
1018
1019#if (CHIP != 700) && (CHIP != 70066)
1020 JUMP dsa_schedule
1021#else
1022 WAIT DISCONNECT
1023 INT int_norm_disconnected
1024#endif
1025
1026munge_extended:
1027 CLEAR ACK
1028 INT int_err_unexpected_phase, WHEN NOT MSG_IN
1029 MOVE 1, msg_buf + 1, WHEN MSG_IN
1030 JUMP munge_extended_2, IF 0x02
1031 JUMP munge_extended_3, IF 0x03
1032 JUMP reject_message
1033
1034munge_extended_2:
1035 CLEAR ACK
1036 MOVE 1, msg_buf + 2, WHEN MSG_IN
1037 JUMP reject_message, IF NOT 0x02 ; Must be WDTR
1038 CLEAR ACK
1039 MOVE 1, msg_buf + 3, WHEN MSG_IN
1040 INT int_msg_wdtr
1041
1042munge_extended_3:
1043 CLEAR ACK
1044 MOVE 1, msg_buf + 2, WHEN MSG_IN
1045 JUMP reject_message, IF NOT 0x01 ; Must be SDTR
1046 CLEAR ACK
1047 MOVE 2, msg_buf + 3, WHEN MSG_IN
1048 INT int_msg_sdtr
1049
1050ENTRY reject_message
1051reject_message:
1052 SET ATN
1053 CLEAR ACK
1054 MOVE 1, NCR53c7xx_msg_reject, WHEN MSG_OUT
1055 RETURN
1056
1057ENTRY accept_message
1058accept_message:
1059 CLEAR ATN
1060 CLEAR ACK
1061 RETURN
1062
1063ENTRY respond_message
1064respond_message:
1065 SET ATN
1066 CLEAR ACK
1067 MOVE FROM dsa_msgout_other, WHEN MSG_OUT
1068 RETURN
1069
1070;
1071; command_complete
1072;
1073; PURPOSE : handle command termination when STATUS IN is detected by reading
1074; a status byte followed by a command termination message.
1075;
1076; Normal termination results in an INTFLY instruction, and
1077; the host system can pick out which command terminated by
1078; examining the MESSAGE and STATUS buffers of all currently
1079; executing commands;
1080;
1081; Abnormal (CHECK_CONDITION) termination results in an
1082; int_err_check_condition interrupt so that a REQUEST SENSE
1083; command can be issued out-of-order so that no other command
1084; clears the contingent allegiance condition.
1085;
1086;
1087; INPUTS : DSA - command
1088;
1089; CALLS : OK
1090;
1091; EXITS : On successful termination, control is passed to schedule.
1092; On abnormal termination, the user will usually modify the
1093; DSA fields and corresponding buffers and return control
1094; to select.
1095;
1096
1097ENTRY command_complete
1098command_complete:
1099 MOVE FROM dsa_status, WHEN STATUS
1100#if (CHIP != 700) && (CHIP != 70066)
1101 MOVE SFBR TO SCRATCH0 ; Save status
1102#endif /* (CHIP != 700) && (CHIP != 70066) */
1103ENTRY command_complete_msgin
1104command_complete_msgin:
1105 MOVE FROM dsa_msgin, WHEN MSG_IN
1106; Indicate that we should be expecting a disconnect
1107#if (CHIP != 710)
1108 MOVE SCNTL2 & 0x7f TO SCNTL2
1109#else
1110 ; Above code cleared the Unexpected Disconnect bit, what do we do?
1111#endif
1112 CLEAR ACK
1113#if (CHIP != 700) && (CHIP != 70066)
1114 WAIT DISCONNECT
1115
1116;
1117; The SCSI specification states that when a UNIT ATTENTION condition
1118; is pending, as indicated by a CHECK CONDITION status message,
1119; the target shall revert to asynchronous transfers. Since
1120; synchronous transfers parameters are maintained on a per INITIATOR/TARGET
1121; basis, and returning control to our scheduler could work on a command
1122; running on another lun on that target using the old parameters, we must
1123; interrupt the host processor to get them changed, or change them ourselves.
1124;
1125; Once SCSI-II tagged queueing is implemented, things will be even more
1126; hairy, since contingent allegiance conditions exist on a per-target/lun
1127; basis, and issuing a new command with a different tag would clear it.
1128; In these cases, we must interrupt the host processor to get a request
1129; added to the HEAD of the queue with the request sense command, or we
1130; must automatically issue the request sense command.
1131
1132#if 0
1133 MOVE SCRATCH0 TO SFBR
1134 JUMP command_failed, IF 0x02
1135#endif
1136#if (CHIP == 710)
1137#if defined(MVME16x_INTFLY)
1138; For MVME16x (ie CHIP=710) we will force an INTFLY by triggering a software
1139; interrupt (SW7). We can use SCRATCH, as we are about to jump to
1140; schedule, which corrupts it anyway. Will probably remove this later,
1141; but want to check performance effects first.
1142
1143#define INTFLY_ADDR 0xfff40070
1144
1145 MOVE 0 TO SCRATCH0
1146 MOVE 0x80 TO SCRATCH1
1147 MOVE 0 TO SCRATCH2
1148 MOVE 0 TO SCRATCH3
1149 MOVE MEMORY 4, addr_scratch, INTFLY_ADDR
1150#else
1151 INT int_norm_emulateintfly
1152#endif
1153#else
1154 INTFLY
1155#endif
1156#endif /* (CHIP != 700) && (CHIP != 70066) */
1157#if (CHIP == 710)
1158 ; Time to correct DSA following memory move
1159 MOVE MEMORY 4, saved_dsa, addr_dsa
1160#endif
1161#ifdef EVENTS
1162 INT int_EVENT_COMPLETE
1163#endif
1164#if (CHIP != 700) && (CHIP != 70066)
1165 JUMP schedule
1166command_failed:
1167 INT int_err_check_condition
1168#else
1169 INT int_norm_command_complete
1170#endif
1171
1172;
1173; wait_reselect
1174;
1175; PURPOSE : This is essentially the idle routine, where control lands
1176; when there are no new processes to schedule. wait_reselect
1177; waits for reselection, selection, and new commands.
1178;
1179; When a successful reselection occurs, with the aid
1180; of fixed up code in each DSA, wait_reselect walks the
1181; reconnect_dsa_queue, asking each dsa if the target ID
1182; and LUN match its.
1183;
1184; If a match is found, a call is made back to reselected_ok,
1185; which through the miracles of self modifying code, extracts
1186; the found DSA from the reconnect_dsa_queue and then
1187; returns control to the DSAs thread of execution.
1188;
1189; INPUTS : NONE
1190;
1191; CALLS : OK
1192;
1193; MODIFIES : DSA,
1194;
1195; EXITS : On successful reselection, control is returned to the
1196; DSA which called reselected_ok. If the WAIT RESELECT
1197; was interrupted by a new commands arrival signaled by
1198; SIG_P, control is passed to schedule. If the NCR is
1199; selected, the host system is interrupted with an
1200; int_err_selected which is usually responded to by
1201; setting DSP to the target_abort address.
1202
1203ENTRY wait_reselect
1204wait_reselect:
1205#ifdef EVENTS
1206 int int_EVENT_IDLE
1207#endif
1208#ifdef DEBUG
1209 int int_debug_idle
1210#endif
1211 WAIT RESELECT wait_reselect_failed
1212
1213reselected:
1214#ifdef EVENTS
1215 int int_EVENT_RESELECT
1216#endif
1217 CLEAR TARGET
1218 DMODE_MEMORY_TO_MEMORY
1219 ; Read all data needed to reestablish the nexus -
1220 MOVE 1, reselected_identify, WHEN MSG_IN
1221 ; We used to CLEAR ACK here.
1222#if (CHIP != 700) && (CHIP != 70066)
1223#ifdef DEBUG
1224 int int_debug_reselected
1225#endif
1226
1227 ; Point DSA at the current head of the disconnected queue.
1228 DMODE_MEMORY_TO_NCR
1229 MOVE MEMORY 4, reconnect_dsa_head, addr_scratch
1230 DMODE_MEMORY_TO_MEMORY
1231#if (CHIP == 710)
1232 MOVE MEMORY 4, addr_scratch, saved_dsa
1233#else
1234 CALL scratch_to_dsa
1235#endif
1236
1237 ; Fix the update-next pointer so that the reconnect_dsa_head
1238 ; pointer is the one that will be updated if this DSA is a hit
1239 ; and we remove it from the queue.
1240
1241 MOVE MEMORY 4, addr_reconnect_dsa_head, reselected_ok_patch + 8
1242#if (CHIP == 710)
1243 ; Time to correct DSA following memory move
1244 MOVE MEMORY 4, saved_dsa, addr_dsa
1245#endif
1246
1247ENTRY reselected_check_next
1248reselected_check_next:
1249#ifdef DEBUG
1250 INT int_debug_reselect_check
1251#endif
1252 ; Check for a NULL pointer.
1253 MOVE DSA0 TO SFBR
1254 JUMP reselected_not_end, IF NOT 0
1255 MOVE DSA1 TO SFBR
1256 JUMP reselected_not_end, IF NOT 0
1257 MOVE DSA2 TO SFBR
1258 JUMP reselected_not_end, IF NOT 0
1259 MOVE DSA3 TO SFBR
1260 JUMP reselected_not_end, IF NOT 0
1261 INT int_err_unexpected_reselect
1262
1263reselected_not_end:
1264 ;
1265 ; XXX the ALU is only eight bits wide, and the assembler
1266 ; wont do the dirt work for us. As long as dsa_check_reselect
1267 ; is negative, we need to sign extend with 1 bits to the full
1268 ; 32 bit width of the address.
1269 ;
1270 ; A potential work around would be to have a known alignment
1271 ; of the DSA structure such that the base address plus
1272 ; dsa_check_reselect doesn't require carrying from bytes
1273 ; higher than the LSB.
1274 ;
1275
1276 MOVE DSA0 TO SFBR
1277 MOVE SFBR + dsa_check_reselect TO SCRATCH0
1278 MOVE DSA1 TO SFBR
1279 MOVE SFBR + 0xff TO SCRATCH1 WITH CARRY
1280 MOVE DSA2 TO SFBR
1281 MOVE SFBR + 0xff TO SCRATCH2 WITH CARRY
1282 MOVE DSA3 TO SFBR
1283 MOVE SFBR + 0xff TO SCRATCH3 WITH CARRY
1284
1285 DMODE_NCR_TO_MEMORY
1286 MOVE MEMORY 4, addr_scratch, reselected_check + 4
1287 DMODE_MEMORY_TO_MEMORY
1288#if (CHIP == 710)
1289 ; Time to correct DSA following memory move
1290 MOVE MEMORY 4, saved_dsa, addr_dsa
1291#endif
1292reselected_check:
1293 JUMP 0
1294
1295
1296;
1297;
1298#if (CHIP == 710)
1299; We have problems here - the memory move corrupts TEMP and DSA. This
1300; routine is called from DSA code, and patched from many places. Scratch
1301; is probably free when it is called.
1302; We have to:
1303; copy temp to scratch, one byte at a time
1304; write scratch to patch a jump in place of the return
1305; do the move memory
1306; jump to the patched in return address
1307; DSA is corrupt when we get here, and can be left corrupt
1308
1309ENTRY reselected_ok
1310reselected_ok:
1311 MOVE TEMP0 TO SFBR
1312 MOVE SFBR TO SCRATCH0
1313 MOVE TEMP1 TO SFBR
1314 MOVE SFBR TO SCRATCH1
1315 MOVE TEMP2 TO SFBR
1316 MOVE SFBR TO SCRATCH2
1317 MOVE TEMP3 TO SFBR
1318 MOVE SFBR TO SCRATCH3
1319 MOVE MEMORY 4, addr_scratch, reselected_ok_jump + 4
1320reselected_ok_patch:
1321 MOVE MEMORY 4, 0, 0
1322reselected_ok_jump:
1323 JUMP 0
1324#else
1325ENTRY reselected_ok
1326reselected_ok:
1327reselected_ok_patch:
1328 MOVE MEMORY 4, 0, 0 ; Patched : first word
1329 ; is address of
1330 ; successful dsa_next
1331 ; Second word is last
1332 ; unsuccessful dsa_next,
1333 ; starting with
1334 ; dsa_reconnect_head
1335 ; We used to CLEAR ACK here.
1336#ifdef DEBUG
1337 INT int_debug_reselected_ok
1338#endif
1339#ifdef DEBUG
1340 INT int_debug_check_dsa
1341#endif
1342 RETURN ; Return control to where
1343#endif
1344#else
1345 INT int_norm_reselected
1346#endif /* (CHIP != 700) && (CHIP != 70066) */
1347
1348selected:
1349 INT int_err_selected;
1350
1351;
1352; A select or reselect failure can be caused by one of two conditions :
1353; 1. SIG_P was set. This will be the case if the user has written
1354; a new value to a previously NULL head of the issue queue.
1355;
1356; 2. The NCR53c810 was selected or reselected by another device.
1357;
1358; 3. The bus was already busy since we were selected or reselected
1359; before starting the command.
1360
1361wait_reselect_failed:
1362#ifdef EVENTS
1363 INT int_EVENT_RESELECT_FAILED
1364#endif
1365; Check selected bit.
1366#if (CHIP == 710)
1367 ; Must work out how to tell if we are selected....
1368#else
1369 MOVE SIST0 & 0x20 TO SFBR
1370 JUMP selected, IF 0x20
1371#endif
1372; Reading CTEST2 clears the SIG_P bit in the ISTAT register.
1373 MOVE CTEST2 & 0x40 TO SFBR
1374 JUMP schedule, IF 0x40
1375; Check connected bit.
1376; FIXME: this needs to change if we support target mode
1377 MOVE ISTAT & 0x08 TO SFBR
1378 JUMP reselected, IF 0x08
1379; FIXME : Something bogus happened, and we shouldn't fail silently.
1380#if 0
1381 JUMP schedule
1382#else
1383 INT int_debug_panic
1384#endif
1385
1386
1387select_failed:
1388#if (CHIP == 710)
1389 ; Disable selection timer
1390 MOVE CTEST7 | 0x10 TO CTEST7
1391#endif
1392#ifdef EVENTS
1393 int int_EVENT_SELECT_FAILED
1394#endif
1395; Otherwise, mask the selected and reselected bits off SIST0
1396#if (CHIP ==710)
1397 ; Let's assume we don't get selected for now
1398 MOVE SSTAT0 & 0x10 TO SFBR
1399#else
1400 MOVE SIST0 & 0x30 TO SFBR
1401 JUMP selected, IF 0x20
1402#endif
1403 JUMP reselected, IF 0x10
1404; If SIGP is set, the user just gave us another command, and
1405; we should restart or return to the scheduler.
1406; Reading CTEST2 clears the SIG_P bit in the ISTAT register.
1407 MOVE CTEST2 & 0x40 TO SFBR
1408 JUMP select, IF 0x40
1409; Check connected bit.
1410; FIXME: this needs to change if we support target mode
1411; FIXME: is this really necessary?
1412 MOVE ISTAT & 0x08 TO SFBR
1413 JUMP reselected, IF 0x08
1414; FIXME : Something bogus happened, and we shouldn't fail silently.
1415#if 0
1416 JUMP schedule
1417#else
1418 INT int_debug_panic
1419#endif
1420
1421;
1422; test_1
1423; test_2
1424;
1425; PURPOSE : run some verification tests on the NCR. test_1
1426; copies test_src to test_dest and interrupts the host
1427; processor, testing for cache coherency and interrupt
1428; problems in the processes.
1429;
1430; test_2 runs a command with offsets relative to the
1431; DSA on entry, and is useful for miscellaneous experimentation.
1432;
1433
1434; Verify that interrupts are working correctly and that we don't
1435; have a cache invalidation problem.
1436
1437ABSOLUTE test_src = 0, test_dest = 0
1438ENTRY test_1
1439test_1:
1440 MOVE MEMORY 4, test_src, test_dest
1441 INT int_test_1
1442
1443;
1444; Run arbitrary commands, with test code establishing a DSA
1445;
1446
1447ENTRY test_2
1448test_2:
1449 CLEAR TARGET
1450#if (CHIP == 710)
1451 ; Enable selection timer
1452#ifdef NO_SELECTION_TIMEOUT
1453 MOVE CTEST7 & 0xff TO CTEST7
1454#else
1455 MOVE CTEST7 & 0xef TO CTEST7
1456#endif
1457#endif
1458 SELECT ATN FROM 0, test_2_fail
1459 JUMP test_2_msgout, WHEN MSG_OUT
1460ENTRY test_2_msgout
1461test_2_msgout:
1462#if (CHIP == 710)
1463 ; Disable selection timer
1464 MOVE CTEST7 | 0x10 TO CTEST7
1465#endif
1466 MOVE FROM 8, WHEN MSG_OUT
1467 MOVE FROM 16, WHEN CMD
1468 MOVE FROM 24, WHEN DATA_IN
1469 MOVE FROM 32, WHEN STATUS
1470 MOVE FROM 40, WHEN MSG_IN
1471#if (CHIP != 710)
1472 MOVE SCNTL2 & 0x7f TO SCNTL2
1473#endif
1474 CLEAR ACK
1475 WAIT DISCONNECT
1476test_2_fail:
1477#if (CHIP == 710)
1478 ; Disable selection timer
1479 MOVE CTEST7 | 0x10 TO CTEST7
1480#endif
1481 INT int_test_2
1482
1483ENTRY debug_break
1484debug_break:
1485 INT int_debug_break
1486
1487;
1488; initiator_abort
1489; target_abort
1490;
1491; PURPOSE : Abort the currently established nexus from with initiator
1492; or target mode.
1493;
1494;
1495
1496ENTRY target_abort
1497target_abort:
1498 SET TARGET
1499 DISCONNECT
1500 CLEAR TARGET
1501 JUMP schedule
1502
1503ENTRY initiator_abort
1504initiator_abort:
1505 SET ATN
1506;
1507; The SCSI-I specification says that targets may go into MSG out at
1508; their leisure upon receipt of the ATN single. On all versions of the
1509; specification, we can't change phases until REQ transitions true->false,
1510; so we need to sink/source one byte of data to allow the transition.
1511;
1512; For the sake of safety, we'll only source one byte of data in all
1513; cases, but to accommodate the SCSI-I dain bramage, we'll sink an
1514; arbitrary number of bytes.
1515 JUMP spew_cmd, WHEN CMD
1516 JUMP eat_msgin, WHEN MSG_IN
1517 JUMP eat_datain, WHEN DATA_IN
1518 JUMP eat_status, WHEN STATUS
1519 JUMP spew_dataout, WHEN DATA_OUT
1520 JUMP sated
1521spew_cmd:
1522 MOVE 1, NCR53c7xx_zero, WHEN CMD
1523 JUMP sated
1524eat_msgin:
1525 MOVE 1, NCR53c7xx_sink, WHEN MSG_IN
1526 JUMP eat_msgin, WHEN MSG_IN
1527 JUMP sated
1528eat_status:
1529 MOVE 1, NCR53c7xx_sink, WHEN STATUS
1530 JUMP eat_status, WHEN STATUS
1531 JUMP sated
1532eat_datain:
1533 MOVE 1, NCR53c7xx_sink, WHEN DATA_IN
1534 JUMP eat_datain, WHEN DATA_IN
1535 JUMP sated
1536spew_dataout:
1537 MOVE 1, NCR53c7xx_zero, WHEN DATA_OUT
1538sated:
1539#if (CHIP != 710)
1540 MOVE SCNTL2 & 0x7f TO SCNTL2
1541#endif
1542 MOVE 1, NCR53c7xx_msg_abort, WHEN MSG_OUT
1543 WAIT DISCONNECT
1544 INT int_norm_aborted
1545
1546#if (CHIP != 710)
1547;
1548; dsa_to_scratch
1549; scratch_to_dsa
1550;
1551; PURPOSE :
1552; The NCR chips cannot do a move memory instruction with the DSA register
1553; as the source or destination. So, we provide a couple of subroutines
1554; that let us switch between the DSA register and scratch register.
1555;
1556; Memory moves to/from the DSPS register also don't work, but we
1557; don't use them.
1558;
1559;
1560
1561
1562dsa_to_scratch:
1563 MOVE DSA0 TO SFBR
1564 MOVE SFBR TO SCRATCH0
1565 MOVE DSA1 TO SFBR
1566 MOVE SFBR TO SCRATCH1
1567 MOVE DSA2 TO SFBR
1568 MOVE SFBR TO SCRATCH2
1569 MOVE DSA3 TO SFBR
1570 MOVE SFBR TO SCRATCH3
1571 RETURN
1572
1573scratch_to_dsa:
1574 MOVE SCRATCH0 TO SFBR
1575 MOVE SFBR TO DSA0
1576 MOVE SCRATCH1 TO SFBR
1577 MOVE SFBR TO DSA1
1578 MOVE SCRATCH2 TO SFBR
1579 MOVE SFBR TO DSA2
1580 MOVE SCRATCH3 TO SFBR
1581 MOVE SFBR TO DSA3
1582 RETURN
1583#endif
1584
1585#if (CHIP == 710)
1586; Little patched jump, used to overcome problems with TEMP getting
1587; corrupted on memory moves.
1588
1589jump_temp:
1590 JUMP 0
1591#endif
diff --git a/drivers/scsi/53c7xx_d.h_shipped b/drivers/scsi/53c7xx_d.h_shipped
deleted file mode 100644
index 21d31b08ec31..000000000000
--- a/drivers/scsi/53c7xx_d.h_shipped
+++ /dev/null
@@ -1,2874 +0,0 @@
1/* DO NOT EDIT - Generated automatically by script_asm.pl */
2static u32 SCRIPT[] = {
3/*
4
5
6
7
8
9; 53c710 driver. Modified from Drew Eckhardts driver
10; for 53c810 by Richard Hirst [richard@sleepie.demon.co.uk]
11;
12; I have left the script for the 53c8xx family in here, as it is likely
13; to be useful to see what I changed when bug hunting.
14
15; NCR 53c810 driver, main script
16; Sponsored by
17; iX Multiuser Multitasking Magazine
18; hm@ix.de
19;
20; Copyright 1993, 1994, 1995 Drew Eckhardt
21; Visionary Computing
22; (Unix and Linux consulting and custom programming)
23; drew@PoohSticks.ORG
24; +1 (303) 786-7975
25;
26; TolerANT and SCSI SCRIPTS are registered trademarks of NCR Corporation.
27;
28; PRE-ALPHA
29;
30; For more information, please consult
31;
32; NCR 53C810
33; PCI-SCSI I/O Processor
34; Data Manual
35;
36; NCR 53C710
37; SCSI I/O Processor
38; Programmers Guide
39;
40; NCR Microelectronics
41; 1635 Aeroplaza Drive
42; Colorado Springs, CO 80916
43; 1+ (719) 578-3400
44;
45; Toll free literature number
46; +1 (800) 334-5454
47;
48; IMPORTANT : This code is self modifying due to the limitations of
49; the NCR53c7,8xx series chips. Persons debugging this code with
50; the remote debugger should take this into account, and NOT set
51; breakpoints in modified instructions.
52;
53; Design:
54; The NCR53c7,8xx family of SCSI chips are busmasters with an onboard
55; microcontroller using a simple instruction set.
56;
57; So, to minimize the effects of interrupt latency, and to maximize
58; throughput, this driver offloads the practical maximum amount
59; of processing to the SCSI chip while still maintaining a common
60; structure.
61;
62; Where tradeoffs were needed between efficiency on the older
63; chips and the newer NCR53c800 series, the NCR53c800 series
64; was chosen.
65;
66; While the NCR53c700 and NCR53c700-66 lacked the facilities to fully
67; automate SCSI transfers without host processor intervention, this
68; isn't the case with the NCR53c710 and newer chips which allow
69;
70; - reads and writes to the internal registers from within the SCSI
71; scripts, allowing the SCSI SCRIPTS(tm) code to save processor
72; state so that multiple threads of execution are possible, and also
73; provide an ALU for loop control, etc.
74;
75; - table indirect addressing for some instructions. This allows
76; pointers to be located relative to the DSA ((Data Structure
77; Address) register.
78;
79; These features make it possible to implement a mailbox style interface,
80; where the same piece of code is run to handle I/O for multiple threads
81; at once minimizing our need to relocate code. Since the NCR53c700/
82; NCR53c800 series have a unique combination of features, making a
83; a standard ingoing/outgoing mailbox system, costly, I've modified it.
84;
85; - Mailboxes are a mixture of code and data. This lets us greatly
86; simplify the NCR53c810 code and do things that would otherwise
87; not be possible.
88;
89; The saved data pointer is now implemented as follows :
90;
91; Control flow has been architected such that if control reaches
92; munge_save_data_pointer, on a restore pointers message or
93; reconnection, a jump to the address formerly in the TEMP register
94; will allow the SCSI command to resume execution.
95;
96
97;
98; Note : the DSA structures must be aligned on 32 bit boundaries,
99; since the source and destination of MOVE MEMORY instructions
100; must share the same alignment and this is the alignment of the
101; NCR registers.
102;
103
104; For some systems (MVME166, for example) dmode is always the same, so don't
105; waste time writing it
106
107
108
109
110
111
112
113
114
115
116
117ABSOLUTE dsa_temp_lun = 0 ; Patch to lun for current dsa
118ABSOLUTE dsa_temp_next = 0 ; Patch to dsa next for current dsa
119ABSOLUTE dsa_temp_addr_next = 0 ; Patch to address of dsa next address
120 ; for current dsa
121ABSOLUTE dsa_temp_sync = 0 ; Patch to address of per-target
122 ; sync routine
123ABSOLUTE dsa_sscf_710 = 0 ; Patch to address of per-target
124 ; sscf value (53c710)
125ABSOLUTE dsa_temp_target = 0 ; Patch to id for current dsa
126ABSOLUTE dsa_temp_addr_saved_pointer = 0; Patch to address of per-command
127 ; saved data pointer
128ABSOLUTE dsa_temp_addr_residual = 0 ; Patch to address of per-command
129 ; current residual code
130ABSOLUTE dsa_temp_addr_saved_residual = 0; Patch to address of per-command
131 ; saved residual code
132ABSOLUTE dsa_temp_addr_new_value = 0 ; Address of value for JUMP operand
133ABSOLUTE dsa_temp_addr_array_value = 0 ; Address to copy to
134ABSOLUTE dsa_temp_addr_dsa_value = 0 ; Address of this DSA value
135
136;
137; Once a device has initiated reselection, we need to compare it
138; against the singly linked list of commands which have disconnected
139; and are pending reselection. These commands are maintained in
140; an unordered singly linked list of DSA structures, through the
141; DSA pointers at their 'centers' headed by the reconnect_dsa_head
142; pointer.
143;
144; To avoid complications in removing commands from the list,
145; I minimize the amount of expensive (at eight operations per
146; addition @ 500-600ns each) pointer operations which must
147; be done in the NCR driver by precomputing them on the
148; host processor during dsa structure generation.
149;
150; The fixed-up per DSA code knows how to recognize the nexus
151; associated with the corresponding SCSI command, and modifies
152; the source and destination pointers for the MOVE MEMORY
153; instruction which is executed when reselected_ok is called
154; to remove the command from the list. Similarly, DSA is
155; loaded with the address of the next DSA structure and
156; reselected_check_next is called if a failure occurs.
157;
158; Perhaps more concisely, the net effect of the mess is
159;
160; for (dsa = reconnect_dsa_head, dest = &reconnect_dsa_head,
161; src = NULL; dsa; dest = &dsa->next, dsa = dsa->next) {
162; src = &dsa->next;
163; if (target_id == dsa->id && target_lun == dsa->lun) {
164; *dest = *src;
165; break;
166; }
167; }
168;
169; if (!dsa)
170; error (int_err_unexpected_reselect);
171; else
172; longjmp (dsa->jump_resume, 0);
173;
174;
175
176
177; Define DSA structure used for mailboxes
178ENTRY dsa_code_template
179dsa_code_template:
180ENTRY dsa_code_begin
181dsa_code_begin:
182; RGH: Don't care about TEMP and DSA here
183
184 MOVE MEMORY 4, dsa_temp_addr_dsa_value, addr_scratch
185
186at 0x00000000 : */ 0xc0000004,0x00000000,0x00000000,
187/*
188
189
190 MOVE MEMORY 4, addr_scratch, saved_dsa
191
192at 0x00000003 : */ 0xc0000004,0x00000000,0x00000000,
193/*
194 ; We are about to go and select the device, so must set SSCF bits
195 MOVE MEMORY 4, dsa_sscf_710, addr_scratch
196
197at 0x00000006 : */ 0xc0000004,0x00000000,0x00000000,
198/*
199
200 MOVE SCRATCH3 TO SFBR
201
202at 0x00000009 : */ 0x72370000,0x00000000,
203/*
204
205
206
207 MOVE SFBR TO SBCL
208
209at 0x0000000b : */ 0x6a0b0000,0x00000000,
210/*
211 MOVE MEMORY 4, saved_dsa, addr_dsa
212
213at 0x0000000d : */ 0xc0000004,0x00000000,0x00000000,
214/*
215
216
217
218 CALL select
219
220at 0x00000010 : */ 0x88080000,0x000001f8,
221/*
222; Handle the phase mismatch which may have resulted from the
223; MOVE FROM dsa_msgout if we returned here. The CLEAR ATN
224; may or may not be necessary, and we should update script_asm.pl
225; to handle multiple pieces.
226 CLEAR ATN
227
228at 0x00000012 : */ 0x60000008,0x00000000,
229/*
230 CLEAR ACK
231
232at 0x00000014 : */ 0x60000040,0x00000000,
233/*
234
235; Replace second operand with address of JUMP instruction dest operand
236; in schedule table for this DSA. Becomes dsa_jump_dest in 53c7,8xx.c.
237ENTRY dsa_code_fix_jump
238dsa_code_fix_jump:
239 MOVE MEMORY 4, NOP_insn, 0
240
241at 0x00000016 : */ 0xc0000004,0x00000000,0x00000000,
242/*
243 JUMP select_done
244
245at 0x00000019 : */ 0x80080000,0x00000230,
246/*
247
248; wrong_dsa loads the DSA register with the value of the dsa_next
249; field.
250;
251wrong_dsa:
252
253; NOTE DSA is corrupt when we arrive here!
254
255; Patch the MOVE MEMORY INSTRUCTION such that
256; the destination address is the address of the OLD
257; next pointer.
258;
259 MOVE MEMORY 4, dsa_temp_addr_next, reselected_ok_patch + 8
260
261at 0x0000001b : */ 0xc0000004,0x00000000,0x000007ec,
262/*
263
264;
265; Move the _contents_ of the next pointer into the DSA register as
266; the next I_T_L or I_T_L_Q tupple to check against the established
267; nexus.
268;
269 MOVE MEMORY 4, dsa_temp_next, addr_scratch
270
271at 0x0000001e : */ 0xc0000004,0x00000000,0x00000000,
272/*
273
274
275 MOVE MEMORY 4, addr_scratch, saved_dsa
276
277at 0x00000021 : */ 0xc0000004,0x00000000,0x00000000,
278/*
279 MOVE MEMORY 4, saved_dsa, addr_dsa
280
281at 0x00000024 : */ 0xc0000004,0x00000000,0x00000000,
282/*
283
284
285
286 JUMP reselected_check_next
287
288at 0x00000027 : */ 0x80080000,0x000006f0,
289/*
290
291ABSOLUTE dsa_save_data_pointer = 0
292ENTRY dsa_code_save_data_pointer
293dsa_code_save_data_pointer:
294
295 ; When we get here, TEMP has been saved in jump_temp+4, DSA is corrupt
296 ; We MUST return with DSA correct
297 MOVE MEMORY 4, jump_temp+4, dsa_temp_addr_saved_pointer
298
299at 0x00000029 : */ 0xc0000004,0x000009c8,0x00000000,
300/*
301; HARD CODED : 24 bytes needs to agree with 53c7,8xx.h
302 MOVE MEMORY 24, dsa_temp_addr_residual, dsa_temp_addr_saved_residual
303
304at 0x0000002c : */ 0xc0000018,0x00000000,0x00000000,
305/*
306 CLEAR ACK
307
308at 0x0000002f : */ 0x60000040,0x00000000,
309/*
310
311
312
313 MOVE MEMORY 4, saved_dsa, addr_dsa
314
315at 0x00000031 : */ 0xc0000004,0x00000000,0x00000000,
316/*
317 JUMP jump_temp
318
319at 0x00000034 : */ 0x80080000,0x000009c4,
320/*
321
322ABSOLUTE dsa_restore_pointers = 0
323ENTRY dsa_code_restore_pointers
324dsa_code_restore_pointers:
325
326 ; TEMP and DSA are corrupt when we get here, but who cares!
327 MOVE MEMORY 4, dsa_temp_addr_saved_pointer, jump_temp + 4
328
329at 0x00000036 : */ 0xc0000004,0x00000000,0x000009c8,
330/*
331; HARD CODED : 24 bytes needs to agree with 53c7,8xx.h
332 MOVE MEMORY 24, dsa_temp_addr_saved_residual, dsa_temp_addr_residual
333
334at 0x00000039 : */ 0xc0000018,0x00000000,0x00000000,
335/*
336 CLEAR ACK
337
338at 0x0000003c : */ 0x60000040,0x00000000,
339/*
340 ; Restore DSA, note we don't care about TEMP
341 MOVE MEMORY 4, saved_dsa, addr_dsa
342
343at 0x0000003e : */ 0xc0000004,0x00000000,0x00000000,
344/*
345
346
347
348 JUMP jump_temp
349
350at 0x00000041 : */ 0x80080000,0x000009c4,
351/*
352
353
354ABSOLUTE dsa_check_reselect = 0
355; dsa_check_reselect determines whether or not the current target and
356; lun match the current DSA
357ENTRY dsa_code_check_reselect
358dsa_code_check_reselect:
359
360
361
362 MOVE LCRC TO SFBR ; LCRC has our ID and his ID bits set
363
364at 0x00000043 : */ 0x72230000,0x00000000,
365/*
366 JUMP REL (wrong_dsa), IF NOT dsa_temp_target, AND MASK 0x80
367
368at 0x00000045 : */ 0x80848000,0x00ffff50,
369/*
370
371
372
373
374
375;
376; Hack - move to scratch first, since SFBR is not writeable
377; via the CPU and hence a MOVE MEMORY instruction.
378;
379
380 MOVE MEMORY 1, reselected_identify, addr_scratch
381
382at 0x00000047 : */ 0xc0000001,0x00000000,0x00000000,
383/*
384
385
386 ; BIG ENDIAN ON MVME16x
387 MOVE SCRATCH3 TO SFBR
388
389at 0x0000004a : */ 0x72370000,0x00000000,
390/*
391
392
393
394; FIXME : we need to accommodate bit fielded and binary here for '7xx/'8xx chips
395; Are you sure about that? richard@sleepie.demon.co.uk
396 JUMP REL (wrong_dsa), IF NOT dsa_temp_lun, AND MASK 0xf8
397
398at 0x0000004c : */ 0x8084f800,0x00ffff34,
399/*
400; Patch the MOVE MEMORY INSTRUCTION such that
401; the source address is the address of this dsa's
402; next pointer.
403 MOVE MEMORY 4, dsa_temp_addr_next, reselected_ok_patch + 4
404
405at 0x0000004e : */ 0xc0000004,0x00000000,0x000007e8,
406/*
407 CALL reselected_ok
408
409at 0x00000051 : */ 0x88080000,0x00000798,
410/*
411
412; Restore DSA following memory moves in reselected_ok
413; dsa_temp_sync doesn't really care about DSA, but it has an
414; optional debug INT so a valid DSA is a good idea.
415 MOVE MEMORY 4, saved_dsa, addr_dsa
416
417at 0x00000053 : */ 0xc0000004,0x00000000,0x00000000,
418/*
419
420 CALL dsa_temp_sync
421
422at 0x00000056 : */ 0x88080000,0x00000000,
423/*
424; Release ACK on the IDENTIFY message _after_ we've set the synchronous
425; transfer parameters!
426 CLEAR ACK
427
428at 0x00000058 : */ 0x60000040,0x00000000,
429/*
430; Implicitly restore pointers on reselection, so a RETURN
431; will transfer control back to the right spot.
432 CALL REL (dsa_code_restore_pointers)
433
434at 0x0000005a : */ 0x88880000,0x00ffff68,
435/*
436 RETURN
437
438at 0x0000005c : */ 0x90080000,0x00000000,
439/*
440ENTRY dsa_zero
441dsa_zero:
442ENTRY dsa_code_template_end
443dsa_code_template_end:
444
445; Perform sanity check for dsa_fields_start == dsa_code_template_end -
446; dsa_zero, puke.
447
448ABSOLUTE dsa_fields_start = 0 ; Sanity marker
449 ; pad 48 bytes (fix this RSN)
450ABSOLUTE dsa_next = 48 ; len 4 Next DSA
451 ; del 4 Previous DSA address
452ABSOLUTE dsa_cmnd = 56 ; len 4 Scsi_Cmnd * for this thread.
453ABSOLUTE dsa_select = 60 ; len 4 Device ID, Period, Offset for
454 ; table indirect select
455ABSOLUTE dsa_msgout = 64 ; len 8 table indirect move parameter for
456 ; select message
457ABSOLUTE dsa_cmdout = 72 ; len 8 table indirect move parameter for
458 ; command
459ABSOLUTE dsa_dataout = 80 ; len 4 code pointer for dataout
460ABSOLUTE dsa_datain = 84 ; len 4 code pointer for datain
461ABSOLUTE dsa_msgin = 88 ; len 8 table indirect move for msgin
462ABSOLUTE dsa_status = 96 ; len 8 table indirect move for status byte
463ABSOLUTE dsa_msgout_other = 104 ; len 8 table indirect for normal message out
464 ; (Synchronous transfer negotiation, etc).
465ABSOLUTE dsa_end = 112
466
467ABSOLUTE schedule = 0 ; Array of JUMP dsa_begin or JUMP (next),
468 ; terminated by a call to JUMP wait_reselect
469
470; Linked lists of DSA structures
471ABSOLUTE reconnect_dsa_head = 0 ; Link list of DSAs which can reconnect
472ABSOLUTE addr_reconnect_dsa_head = 0 ; Address of variable containing
473 ; address of reconnect_dsa_head
474
475; These select the source and destination of a MOVE MEMORY instruction
476ABSOLUTE dmode_memory_to_memory = 0x0
477ABSOLUTE dmode_memory_to_ncr = 0x0
478ABSOLUTE dmode_ncr_to_memory = 0x0
479
480ABSOLUTE addr_scratch = 0x0
481ABSOLUTE addr_temp = 0x0
482
483ABSOLUTE saved_dsa = 0x0
484ABSOLUTE emulfly = 0x0
485ABSOLUTE addr_dsa = 0x0
486
487
488
489; Interrupts -
490; MSB indicates type
491; 0 handle error condition
492; 1 handle message
493; 2 handle normal condition
494; 3 debugging interrupt
495; 4 testing interrupt
496; Next byte indicates specific error
497
498; XXX not yet implemented, I'm not sure if I want to -
499; Next byte indicates the routine the error occurred in
500; The LSB indicates the specific place the error occurred
501
502ABSOLUTE int_err_unexpected_phase = 0x00000000 ; Unexpected phase encountered
503ABSOLUTE int_err_selected = 0x00010000 ; SELECTED (nee RESELECTED)
504ABSOLUTE int_err_unexpected_reselect = 0x00020000
505ABSOLUTE int_err_check_condition = 0x00030000
506ABSOLUTE int_err_no_phase = 0x00040000
507ABSOLUTE int_msg_wdtr = 0x01000000 ; WDTR message received
508ABSOLUTE int_msg_sdtr = 0x01010000 ; SDTR received
509ABSOLUTE int_msg_1 = 0x01020000 ; single byte special message
510 ; received
511
512ABSOLUTE int_norm_select_complete = 0x02000000 ; Select complete, reprogram
513 ; registers.
514ABSOLUTE int_norm_reselect_complete = 0x02010000 ; Nexus established
515ABSOLUTE int_norm_command_complete = 0x02020000 ; Command complete
516ABSOLUTE int_norm_disconnected = 0x02030000 ; Disconnected
517ABSOLUTE int_norm_aborted =0x02040000 ; Aborted *dsa
518ABSOLUTE int_norm_reset = 0x02050000 ; Generated BUS reset.
519ABSOLUTE int_norm_emulateintfly = 0x02060000 ; 53C710 Emulated intfly
520ABSOLUTE int_debug_break = 0x03000000 ; Break point
521
522ABSOLUTE int_debug_panic = 0x030b0000 ; Panic driver
523
524
525ABSOLUTE int_test_1 = 0x04000000 ; Test 1 complete
526ABSOLUTE int_test_2 = 0x04010000 ; Test 2 complete
527ABSOLUTE int_test_3 = 0x04020000 ; Test 3 complete
528
529
530; These should start with 0x05000000, with low bits incrementing for
531; each one.
532
533
534
535ABSOLUTE NCR53c7xx_msg_abort = 0 ; Pointer to abort message
536ABSOLUTE NCR53c7xx_msg_reject = 0 ; Pointer to reject message
537ABSOLUTE NCR53c7xx_zero = 0 ; long with zero in it, use for source
538ABSOLUTE NCR53c7xx_sink = 0 ; long to dump worthless data in
539ABSOLUTE NOP_insn = 0 ; NOP instruction
540
541; Pointer to message, potentially multi-byte
542ABSOLUTE msg_buf = 0
543
544; Pointer to holding area for reselection information
545ABSOLUTE reselected_identify = 0
546ABSOLUTE reselected_tag = 0
547
548; Request sense command pointer, it's a 6 byte command, should
549; be constant for all commands since we always want 16 bytes of
550; sense and we don't need to change any fields as we did under
551; SCSI-I when we actually cared about the LUN field.
552;EXTERNAL NCR53c7xx_sense ; Request sense command
553
554
555; dsa_schedule
556; PURPOSE : after a DISCONNECT message has been received, and pointers
557; saved, insert the current DSA structure at the head of the
558; disconnected queue and fall through to the scheduler.
559;
560; CALLS : OK
561;
562; INPUTS : dsa - current DSA structure, reconnect_dsa_head - list
563; of disconnected commands
564;
565; MODIFIES : SCRATCH, reconnect_dsa_head
566;
567; EXITS : always passes control to schedule
568
569ENTRY dsa_schedule
570dsa_schedule:
571
572
573
574
575;
576; Calculate the address of the next pointer within the DSA
577; structure of the command that is currently disconnecting
578;
579
580 ; Read what should be the current DSA from memory - actual DSA
581 ; register is probably corrupt
582 MOVE MEMORY 4, saved_dsa, addr_scratch
583
584at 0x0000005e : */ 0xc0000004,0x00000000,0x00000000,
585/*
586
587
588
589 MOVE SCRATCH0 + dsa_next TO SCRATCH0
590
591at 0x00000061 : */ 0x7e343000,0x00000000,
592/*
593 MOVE SCRATCH1 + 0 TO SCRATCH1 WITH CARRY
594
595at 0x00000063 : */ 0x7f350000,0x00000000,
596/*
597 MOVE SCRATCH2 + 0 TO SCRATCH2 WITH CARRY
598
599at 0x00000065 : */ 0x7f360000,0x00000000,
600/*
601 MOVE SCRATCH3 + 0 TO SCRATCH3 WITH CARRY
602
603at 0x00000067 : */ 0x7f370000,0x00000000,
604/*
605
606; Point the next field of this DSA structure at the current disconnected
607; list
608
609 MOVE MEMORY 4, addr_scratch, dsa_schedule_insert + 8
610
611at 0x00000069 : */ 0xc0000004,0x00000000,0x000001b8,
612/*
613
614dsa_schedule_insert:
615 MOVE MEMORY 4, reconnect_dsa_head, 0
616
617at 0x0000006c : */ 0xc0000004,0x00000000,0x00000000,
618/*
619
620; And update the head pointer.
621
622 ; Read what should be the current DSA from memory - actual DSA
623 ; register is probably corrupt
624 MOVE MEMORY 4, saved_dsa, addr_scratch
625
626at 0x0000006f : */ 0xc0000004,0x00000000,0x00000000,
627/*
628
629
630
631
632 MOVE MEMORY 4, addr_scratch, reconnect_dsa_head
633
634at 0x00000072 : */ 0xc0000004,0x00000000,0x00000000,
635/*
636
637
638
639
640
641
642 CLEAR ACK
643
644at 0x00000075 : */ 0x60000040,0x00000000,
645/*
646
647
648 ; Time to correct DSA following memory move
649 MOVE MEMORY 4, saved_dsa, addr_dsa
650
651at 0x00000077 : */ 0xc0000004,0x00000000,0x00000000,
652/*
653
654 WAIT DISCONNECT
655
656at 0x0000007a : */ 0x48000000,0x00000000,
657/*
658
659
660
661
662
663
664 JUMP schedule
665
666at 0x0000007c : */ 0x80080000,0x00000000,
667/*
668
669
670;
671; select
672;
673; PURPOSE : establish a nexus for the SCSI command referenced by DSA.
674; On success, the current DSA structure is removed from the issue
675; queue. Usually, this is entered as a fall-through from schedule,
676; although the contingent allegiance handling code will write
677; the select entry address to the DSP to restart a command as a
678; REQUEST SENSE. A message is sent (usually IDENTIFY, although
679; additional SDTR or WDTR messages may be sent). COMMAND OUT
680; is handled.
681;
682; INPUTS : DSA - SCSI command, issue_dsa_head
683;
684; CALLS : NOT OK
685;
686; MODIFIES : SCRATCH, issue_dsa_head
687;
688; EXITS : on reselection or selection, go to select_failed
689; otherwise, RETURN so control is passed back to
690; dsa_begin.
691;
692
693ENTRY select
694select:
695
696
697
698
699
700
701
702
703 CLEAR TARGET
704
705at 0x0000007e : */ 0x60000200,0x00000000,
706/*
707
708; XXX
709;
710; In effect, SELECTION operations are backgrounded, with execution
711; continuing until code which waits for REQ or a fatal interrupt is
712; encountered.
713;
714; So, for more performance, we could overlap the code which removes
715; the command from the NCRs issue queue with the selection, but
716; at this point I don't want to deal with the error recovery.
717;
718
719
720
721 ; Enable selection timer
722
723
724
725 MOVE CTEST7 & 0xef TO CTEST7
726
727at 0x00000080 : */ 0x7c1bef00,0x00000000,
728/*
729
730
731 SELECT ATN FROM dsa_select, select_failed
732
733at 0x00000082 : */ 0x4300003c,0x00000828,
734/*
735 JUMP select_msgout, WHEN MSG_OUT
736
737at 0x00000084 : */ 0x860b0000,0x00000218,
738/*
739ENTRY select_msgout
740select_msgout:
741
742 ; Disable selection timer
743 MOVE CTEST7 | 0x10 TO CTEST7
744
745at 0x00000086 : */ 0x7a1b1000,0x00000000,
746/*
747
748 MOVE FROM dsa_msgout, WHEN MSG_OUT
749
750at 0x00000088 : */ 0x1e000000,0x00000040,
751/*
752
753
754
755
756
757
758
759
760
761
762 RETURN
763
764at 0x0000008a : */ 0x90080000,0x00000000,
765/*
766
767;
768; select_done
769;
770; PURPOSE: continue on to normal data transfer; called as the exit
771; point from dsa_begin.
772;
773; INPUTS: dsa
774;
775; CALLS: OK
776;
777;
778
779select_done:
780
781; NOTE DSA is corrupt when we arrive here!
782 MOVE MEMORY 4, saved_dsa, addr_dsa
783
784at 0x0000008c : */ 0xc0000004,0x00000000,0x00000000,
785/*
786
787
788
789
790
791
792
793
794; After a successful selection, we should get either a CMD phase or
795; some transfer request negotiation message.
796
797 JUMP cmdout, WHEN CMD
798
799at 0x0000008f : */ 0x820b0000,0x0000025c,
800/*
801 INT int_err_unexpected_phase, WHEN NOT MSG_IN
802
803at 0x00000091 : */ 0x9f030000,0x00000000,
804/*
805
806select_msg_in:
807 CALL msg_in, WHEN MSG_IN
808
809at 0x00000093 : */ 0x8f0b0000,0x0000041c,
810/*
811 JUMP select_msg_in, WHEN MSG_IN
812
813at 0x00000095 : */ 0x870b0000,0x0000024c,
814/*
815
816cmdout:
817 INT int_err_unexpected_phase, WHEN NOT CMD
818
819at 0x00000097 : */ 0x9a030000,0x00000000,
820/*
821
822
823
824ENTRY cmdout_cmdout
825cmdout_cmdout:
826
827 MOVE FROM dsa_cmdout, WHEN CMD
828
829at 0x00000099 : */ 0x1a000000,0x00000048,
830/*
831
832
833
834
835;
836; data_transfer
837; other_out
838; other_in
839; other_transfer
840;
841; PURPOSE : handle the main data transfer for a SCSI command in
842; several parts. In the first part, data_transfer, DATA_IN
843; and DATA_OUT phases are allowed, with the user provided
844; code (usually dynamically generated based on the scatter/gather
845; list associated with a SCSI command) called to handle these
846; phases.
847;
848; After control has passed to one of the user provided
849; DATA_IN or DATA_OUT routines, back calls are made to
850; other_transfer_in or other_transfer_out to handle non-DATA IN
851; and DATA OUT phases respectively, with the state of the active
852; data pointer being preserved in TEMP.
853;
854; On completion, the user code passes control to other_transfer
855; which causes DATA_IN and DATA_OUT to result in unexpected_phase
856; interrupts so that data overruns may be trapped.
857;
858; INPUTS : DSA - SCSI command
859;
860; CALLS : OK in data_transfer_start, not ok in other_out and other_in, ok in
861; other_transfer
862;
863; MODIFIES : SCRATCH
864;
865; EXITS : if STATUS IN is detected, signifying command completion,
866; the NCR jumps to command_complete. If MSG IN occurs, a
867; CALL is made to msg_in. Otherwise, other_transfer runs in
868; an infinite loop.
869;
870
871ENTRY data_transfer
872data_transfer:
873 JUMP cmdout_cmdout, WHEN CMD
874
875at 0x0000009b : */ 0x820b0000,0x00000264,
876/*
877 CALL msg_in, WHEN MSG_IN
878
879at 0x0000009d : */ 0x8f0b0000,0x0000041c,
880/*
881 INT int_err_unexpected_phase, WHEN MSG_OUT
882
883at 0x0000009f : */ 0x9e0b0000,0x00000000,
884/*
885 JUMP do_dataout, WHEN DATA_OUT
886
887at 0x000000a1 : */ 0x800b0000,0x000002a4,
888/*
889 JUMP do_datain, WHEN DATA_IN
890
891at 0x000000a3 : */ 0x810b0000,0x000002fc,
892/*
893 JUMP command_complete, WHEN STATUS
894
895at 0x000000a5 : */ 0x830b0000,0x0000065c,
896/*
897 JUMP data_transfer
898
899at 0x000000a7 : */ 0x80080000,0x0000026c,
900/*
901ENTRY end_data_transfer
902end_data_transfer:
903
904;
905; FIXME: On NCR53c700 and NCR53c700-66 chips, do_dataout/do_datain
906; should be fixed up whenever the nexus changes so it can point to the
907; correct routine for that command.
908;
909
910
911; Nasty jump to dsa->dataout
912do_dataout:
913
914 MOVE MEMORY 4, saved_dsa, addr_scratch
915
916at 0x000000a9 : */ 0xc0000004,0x00000000,0x00000000,
917/*
918
919
920
921 MOVE SCRATCH0 + dsa_dataout TO SCRATCH0
922
923at 0x000000ac : */ 0x7e345000,0x00000000,
924/*
925 MOVE SCRATCH1 + 0 TO SCRATCH1 WITH CARRY
926
927at 0x000000ae : */ 0x7f350000,0x00000000,
928/*
929 MOVE SCRATCH2 + 0 TO SCRATCH2 WITH CARRY
930
931at 0x000000b0 : */ 0x7f360000,0x00000000,
932/*
933 MOVE SCRATCH3 + 0 TO SCRATCH3 WITH CARRY
934
935at 0x000000b2 : */ 0x7f370000,0x00000000,
936/*
937
938 MOVE MEMORY 4, addr_scratch, dataout_to_jump + 4
939
940at 0x000000b4 : */ 0xc0000004,0x00000000,0x000002e0,
941/*
942
943dataout_to_jump:
944 MOVE MEMORY 4, 0, dataout_jump + 4
945
946at 0x000000b7 : */ 0xc0000004,0x00000000,0x000002f8,
947/*
948
949 ; Time to correct DSA following memory move
950 MOVE MEMORY 4, saved_dsa, addr_dsa
951
952at 0x000000ba : */ 0xc0000004,0x00000000,0x00000000,
953/*
954
955dataout_jump:
956 JUMP 0
957
958at 0x000000bd : */ 0x80080000,0x00000000,
959/*
960
961; Nasty jump to dsa->dsain
962do_datain:
963
964 MOVE MEMORY 4, saved_dsa, addr_scratch
965
966at 0x000000bf : */ 0xc0000004,0x00000000,0x00000000,
967/*
968
969
970
971 MOVE SCRATCH0 + dsa_datain TO SCRATCH0
972
973at 0x000000c2 : */ 0x7e345400,0x00000000,
974/*
975 MOVE SCRATCH1 + 0 TO SCRATCH1 WITH CARRY
976
977at 0x000000c4 : */ 0x7f350000,0x00000000,
978/*
979 MOVE SCRATCH2 + 0 TO SCRATCH2 WITH CARRY
980
981at 0x000000c6 : */ 0x7f360000,0x00000000,
982/*
983 MOVE SCRATCH3 + 0 TO SCRATCH3 WITH CARRY
984
985at 0x000000c8 : */ 0x7f370000,0x00000000,
986/*
987
988 MOVE MEMORY 4, addr_scratch, datain_to_jump + 4
989
990at 0x000000ca : */ 0xc0000004,0x00000000,0x00000338,
991/*
992
993ENTRY datain_to_jump
994datain_to_jump:
995 MOVE MEMORY 4, 0, datain_jump + 4
996
997at 0x000000cd : */ 0xc0000004,0x00000000,0x00000350,
998/*
999
1000 ; Time to correct DSA following memory move
1001 MOVE MEMORY 4, saved_dsa, addr_dsa
1002
1003at 0x000000d0 : */ 0xc0000004,0x00000000,0x00000000,
1004/*
1005
1006
1007
1008
1009datain_jump:
1010 JUMP 0
1011
1012at 0x000000d3 : */ 0x80080000,0x00000000,
1013/*
1014
1015
1016
1017; Note that other_out and other_in loop until a non-data phase
1018; is discovered, so we only execute return statements when we
1019; can go on to the next data phase block move statement.
1020
1021ENTRY other_out
1022other_out:
1023
1024
1025
1026 INT int_err_unexpected_phase, WHEN CMD
1027
1028at 0x000000d5 : */ 0x9a0b0000,0x00000000,
1029/*
1030 JUMP msg_in_restart, WHEN MSG_IN
1031
1032at 0x000000d7 : */ 0x870b0000,0x000003fc,
1033/*
1034 INT int_err_unexpected_phase, WHEN MSG_OUT
1035
1036at 0x000000d9 : */ 0x9e0b0000,0x00000000,
1037/*
1038 INT int_err_unexpected_phase, WHEN DATA_IN
1039
1040at 0x000000db : */ 0x990b0000,0x00000000,
1041/*
1042 JUMP command_complete, WHEN STATUS
1043
1044at 0x000000dd : */ 0x830b0000,0x0000065c,
1045/*
1046 JUMP other_out, WHEN NOT DATA_OUT
1047
1048at 0x000000df : */ 0x80030000,0x00000354,
1049/*
1050
1051; TEMP should be OK, as we got here from a call in the user dataout code.
1052
1053 RETURN
1054
1055at 0x000000e1 : */ 0x90080000,0x00000000,
1056/*
1057
1058ENTRY other_in
1059other_in:
1060
1061
1062
1063 INT int_err_unexpected_phase, WHEN CMD
1064
1065at 0x000000e3 : */ 0x9a0b0000,0x00000000,
1066/*
1067 JUMP msg_in_restart, WHEN MSG_IN
1068
1069at 0x000000e5 : */ 0x870b0000,0x000003fc,
1070/*
1071 INT int_err_unexpected_phase, WHEN MSG_OUT
1072
1073at 0x000000e7 : */ 0x9e0b0000,0x00000000,
1074/*
1075 INT int_err_unexpected_phase, WHEN DATA_OUT
1076
1077at 0x000000e9 : */ 0x980b0000,0x00000000,
1078/*
1079 JUMP command_complete, WHEN STATUS
1080
1081at 0x000000eb : */ 0x830b0000,0x0000065c,
1082/*
1083 JUMP other_in, WHEN NOT DATA_IN
1084
1085at 0x000000ed : */ 0x81030000,0x0000038c,
1086/*
1087
1088; TEMP should be OK, as we got here from a call in the user datain code.
1089
1090 RETURN
1091
1092at 0x000000ef : */ 0x90080000,0x00000000,
1093/*
1094
1095
1096ENTRY other_transfer
1097other_transfer:
1098 INT int_err_unexpected_phase, WHEN CMD
1099
1100at 0x000000f1 : */ 0x9a0b0000,0x00000000,
1101/*
1102 CALL msg_in, WHEN MSG_IN
1103
1104at 0x000000f3 : */ 0x8f0b0000,0x0000041c,
1105/*
1106 INT int_err_unexpected_phase, WHEN MSG_OUT
1107
1108at 0x000000f5 : */ 0x9e0b0000,0x00000000,
1109/*
1110 INT int_err_unexpected_phase, WHEN DATA_OUT
1111
1112at 0x000000f7 : */ 0x980b0000,0x00000000,
1113/*
1114 INT int_err_unexpected_phase, WHEN DATA_IN
1115
1116at 0x000000f9 : */ 0x990b0000,0x00000000,
1117/*
1118 JUMP command_complete, WHEN STATUS
1119
1120at 0x000000fb : */ 0x830b0000,0x0000065c,
1121/*
1122 JUMP other_transfer
1123
1124at 0x000000fd : */ 0x80080000,0x000003c4,
1125/*
1126
1127;
1128; msg_in_restart
1129; msg_in
1130; munge_msg
1131;
1132; PURPOSE : process messages from a target. msg_in is called when the
1133; caller hasn't read the first byte of the message. munge_message
1134; is called when the caller has read the first byte of the message,
1135; and left it in SFBR. msg_in_restart is called when the caller
1136; hasn't read the first byte of the message, and wishes RETURN
1137; to transfer control back to the address of the conditional
1138; CALL instruction rather than to the instruction after it.
1139;
1140; Various int_* interrupts are generated when the host system
1141; needs to intervene, as is the case with SDTR, WDTR, and
1142; INITIATE RECOVERY messages.
1143;
1144; When the host system handles one of these interrupts,
1145; it can respond by reentering at reject_message,
1146; which rejects the message and returns control to
1147; the caller of msg_in or munge_msg, accept_message
1148; which clears ACK and returns control, or reply_message
1149; which sends the message pointed to by the DSA
1150; msgout_other table indirect field.
1151;
1152; DISCONNECT messages are handled by moving the command
1153; to the reconnect_dsa_queue.
1154
1155; NOTE: DSA should be valid when we get here - we cannot save both it
1156; and TEMP in this routine.
1157
1158;
1159; INPUTS : DSA - SCSI COMMAND, SFBR - first byte of message (munge_msg
1160; only)
1161;
1162; CALLS : NO. The TEMP register isn't backed up to allow nested calls.
1163;
1164; MODIFIES : SCRATCH, DSA on DISCONNECT
1165;
1166; EXITS : On receipt of SAVE DATA POINTER, RESTORE POINTERS,
1167; and normal return from message handlers running under
1168; Linux, control is returned to the caller. Receipt
1169; of DISCONNECT messages pass control to dsa_schedule.
1170;
1171ENTRY msg_in_restart
1172msg_in_restart:
1173; XXX - hackish
1174;
1175; Since it's easier to debug changes to the statically
1176; compiled code, rather than the dynamically generated
1177; stuff, such as
1178;
1179; MOVE x, y, WHEN data_phase
1180; CALL other_z, WHEN NOT data_phase
1181; MOVE x, y, WHEN data_phase
1182;
1183; I'd like to have certain routines (notably the message handler)
1184; restart on the conditional call rather than the next instruction.
1185;
1186; So, subtract 8 from the return address
1187
1188 MOVE TEMP0 + 0xf8 TO TEMP0
1189
1190at 0x000000ff : */ 0x7e1cf800,0x00000000,
1191/*
1192 MOVE TEMP1 + 0xff TO TEMP1 WITH CARRY
1193
1194at 0x00000101 : */ 0x7f1dff00,0x00000000,
1195/*
1196 MOVE TEMP2 + 0xff TO TEMP2 WITH CARRY
1197
1198at 0x00000103 : */ 0x7f1eff00,0x00000000,
1199/*
1200 MOVE TEMP3 + 0xff TO TEMP3 WITH CARRY
1201
1202at 0x00000105 : */ 0x7f1fff00,0x00000000,
1203/*
1204
1205ENTRY msg_in
1206msg_in:
1207 MOVE 1, msg_buf, WHEN MSG_IN
1208
1209at 0x00000107 : */ 0x0f000001,0x00000000,
1210/*
1211
1212munge_msg:
1213 JUMP munge_extended, IF 0x01 ; EXTENDED MESSAGE
1214
1215at 0x00000109 : */ 0x800c0001,0x00000574,
1216/*
1217 JUMP munge_2, IF 0x20, AND MASK 0xdf ; two byte message
1218
1219at 0x0000010b : */ 0x800cdf20,0x00000464,
1220/*
1221;
1222; XXX - I've seen a handful of broken SCSI devices which fail to issue
1223; a SAVE POINTERS message before disconnecting in the middle of
1224; a transfer, assuming that the DATA POINTER will be implicitly
1225; restored.
1226;
1227; Historically, I've often done an implicit save when the DISCONNECT
1228; message is processed. We may want to consider having the option of
1229; doing that here.
1230;
1231 JUMP munge_save_data_pointer, IF 0x02 ; SAVE DATA POINTER
1232
1233at 0x0000010d : */ 0x800c0002,0x0000046c,
1234/*
1235 JUMP munge_restore_pointers, IF 0x03 ; RESTORE POINTERS
1236
1237at 0x0000010f : */ 0x800c0003,0x00000518,
1238/*
1239 JUMP munge_disconnect, IF 0x04 ; DISCONNECT
1240
1241at 0x00000111 : */ 0x800c0004,0x0000056c,
1242/*
1243 INT int_msg_1, IF 0x07 ; MESSAGE REJECT
1244
1245at 0x00000113 : */ 0x980c0007,0x01020000,
1246/*
1247 INT int_msg_1, IF 0x0f ; INITIATE RECOVERY
1248
1249at 0x00000115 : */ 0x980c000f,0x01020000,
1250/*
1251
1252
1253
1254 JUMP reject_message
1255
1256at 0x00000117 : */ 0x80080000,0x00000604,
1257/*
1258
1259munge_2:
1260 JUMP reject_message
1261
1262at 0x00000119 : */ 0x80080000,0x00000604,
1263/*
1264;
1265; The SCSI standard allows targets to recover from transient
1266; error conditions by backing up the data pointer with a
1267; RESTORE POINTERS message.
1268;
1269; So, we must save and restore the _residual_ code as well as
1270; the current instruction pointer. Because of this messiness,
1271; it is simpler to put dynamic code in the dsa for this and to
1272; just do a simple jump down there.
1273;
1274
1275munge_save_data_pointer:
1276
1277 ; We have something in TEMP here, so first we must save that
1278 MOVE TEMP0 TO SFBR
1279
1280at 0x0000011b : */ 0x721c0000,0x00000000,
1281/*
1282 MOVE SFBR TO SCRATCH0
1283
1284at 0x0000011d : */ 0x6a340000,0x00000000,
1285/*
1286 MOVE TEMP1 TO SFBR
1287
1288at 0x0000011f : */ 0x721d0000,0x00000000,
1289/*
1290 MOVE SFBR TO SCRATCH1
1291
1292at 0x00000121 : */ 0x6a350000,0x00000000,
1293/*
1294 MOVE TEMP2 TO SFBR
1295
1296at 0x00000123 : */ 0x721e0000,0x00000000,
1297/*
1298 MOVE SFBR TO SCRATCH2
1299
1300at 0x00000125 : */ 0x6a360000,0x00000000,
1301/*
1302 MOVE TEMP3 TO SFBR
1303
1304at 0x00000127 : */ 0x721f0000,0x00000000,
1305/*
1306 MOVE SFBR TO SCRATCH3
1307
1308at 0x00000129 : */ 0x6a370000,0x00000000,
1309/*
1310 MOVE MEMORY 4, addr_scratch, jump_temp + 4
1311
1312at 0x0000012b : */ 0xc0000004,0x00000000,0x000009c8,
1313/*
1314 ; Now restore DSA
1315 MOVE MEMORY 4, saved_dsa, addr_dsa
1316
1317at 0x0000012e : */ 0xc0000004,0x00000000,0x00000000,
1318/*
1319
1320 MOVE DSA0 + dsa_save_data_pointer TO SFBR
1321
1322at 0x00000131 : */ 0x76100000,0x00000000,
1323/*
1324 MOVE SFBR TO SCRATCH0
1325
1326at 0x00000133 : */ 0x6a340000,0x00000000,
1327/*
1328 MOVE DSA1 + 0xff TO SFBR WITH CARRY
1329
1330at 0x00000135 : */ 0x7711ff00,0x00000000,
1331/*
1332 MOVE SFBR TO SCRATCH1
1333
1334at 0x00000137 : */ 0x6a350000,0x00000000,
1335/*
1336 MOVE DSA2 + 0xff TO SFBR WITH CARRY
1337
1338at 0x00000139 : */ 0x7712ff00,0x00000000,
1339/*
1340 MOVE SFBR TO SCRATCH2
1341
1342at 0x0000013b : */ 0x6a360000,0x00000000,
1343/*
1344 MOVE DSA3 + 0xff TO SFBR WITH CARRY
1345
1346at 0x0000013d : */ 0x7713ff00,0x00000000,
1347/*
1348 MOVE SFBR TO SCRATCH3
1349
1350at 0x0000013f : */ 0x6a370000,0x00000000,
1351/*
1352
1353
1354 MOVE MEMORY 4, addr_scratch, jump_dsa_save + 4
1355
1356at 0x00000141 : */ 0xc0000004,0x00000000,0x00000514,
1357/*
1358
1359jump_dsa_save:
1360 JUMP 0
1361
1362at 0x00000144 : */ 0x80080000,0x00000000,
1363/*
1364
1365munge_restore_pointers:
1366
1367 ; The code at dsa_restore_pointers will RETURN, but we don't care
1368 ; about TEMP here, as it will overwrite it anyway.
1369
1370 MOVE DSA0 + dsa_restore_pointers TO SFBR
1371
1372at 0x00000146 : */ 0x76100000,0x00000000,
1373/*
1374 MOVE SFBR TO SCRATCH0
1375
1376at 0x00000148 : */ 0x6a340000,0x00000000,
1377/*
1378 MOVE DSA1 + 0xff TO SFBR WITH CARRY
1379
1380at 0x0000014a : */ 0x7711ff00,0x00000000,
1381/*
1382 MOVE SFBR TO SCRATCH1
1383
1384at 0x0000014c : */ 0x6a350000,0x00000000,
1385/*
1386 MOVE DSA2 + 0xff TO SFBR WITH CARRY
1387
1388at 0x0000014e : */ 0x7712ff00,0x00000000,
1389/*
1390 MOVE SFBR TO SCRATCH2
1391
1392at 0x00000150 : */ 0x6a360000,0x00000000,
1393/*
1394 MOVE DSA3 + 0xff TO SFBR WITH CARRY
1395
1396at 0x00000152 : */ 0x7713ff00,0x00000000,
1397/*
1398 MOVE SFBR TO SCRATCH3
1399
1400at 0x00000154 : */ 0x6a370000,0x00000000,
1401/*
1402
1403
1404 MOVE MEMORY 4, addr_scratch, jump_dsa_restore + 4
1405
1406at 0x00000156 : */ 0xc0000004,0x00000000,0x00000568,
1407/*
1408
1409jump_dsa_restore:
1410 JUMP 0
1411
1412at 0x00000159 : */ 0x80080000,0x00000000,
1413/*
1414
1415
1416munge_disconnect:
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437 JUMP dsa_schedule
1438
1439at 0x0000015b : */ 0x80080000,0x00000178,
1440/*
1441
1442
1443
1444
1445
1446munge_extended:
1447 CLEAR ACK
1448
1449at 0x0000015d : */ 0x60000040,0x00000000,
1450/*
1451 INT int_err_unexpected_phase, WHEN NOT MSG_IN
1452
1453at 0x0000015f : */ 0x9f030000,0x00000000,
1454/*
1455 MOVE 1, msg_buf + 1, WHEN MSG_IN
1456
1457at 0x00000161 : */ 0x0f000001,0x00000001,
1458/*
1459 JUMP munge_extended_2, IF 0x02
1460
1461at 0x00000163 : */ 0x800c0002,0x000005a4,
1462/*
1463 JUMP munge_extended_3, IF 0x03
1464
1465at 0x00000165 : */ 0x800c0003,0x000005d4,
1466/*
1467 JUMP reject_message
1468
1469at 0x00000167 : */ 0x80080000,0x00000604,
1470/*
1471
1472munge_extended_2:
1473 CLEAR ACK
1474
1475at 0x00000169 : */ 0x60000040,0x00000000,
1476/*
1477 MOVE 1, msg_buf + 2, WHEN MSG_IN
1478
1479at 0x0000016b : */ 0x0f000001,0x00000002,
1480/*
1481 JUMP reject_message, IF NOT 0x02 ; Must be WDTR
1482
1483at 0x0000016d : */ 0x80040002,0x00000604,
1484/*
1485 CLEAR ACK
1486
1487at 0x0000016f : */ 0x60000040,0x00000000,
1488/*
1489 MOVE 1, msg_buf + 3, WHEN MSG_IN
1490
1491at 0x00000171 : */ 0x0f000001,0x00000003,
1492/*
1493 INT int_msg_wdtr
1494
1495at 0x00000173 : */ 0x98080000,0x01000000,
1496/*
1497
1498munge_extended_3:
1499 CLEAR ACK
1500
1501at 0x00000175 : */ 0x60000040,0x00000000,
1502/*
1503 MOVE 1, msg_buf + 2, WHEN MSG_IN
1504
1505at 0x00000177 : */ 0x0f000001,0x00000002,
1506/*
1507 JUMP reject_message, IF NOT 0x01 ; Must be SDTR
1508
1509at 0x00000179 : */ 0x80040001,0x00000604,
1510/*
1511 CLEAR ACK
1512
1513at 0x0000017b : */ 0x60000040,0x00000000,
1514/*
1515 MOVE 2, msg_buf + 3, WHEN MSG_IN
1516
1517at 0x0000017d : */ 0x0f000002,0x00000003,
1518/*
1519 INT int_msg_sdtr
1520
1521at 0x0000017f : */ 0x98080000,0x01010000,
1522/*
1523
1524ENTRY reject_message
1525reject_message:
1526 SET ATN
1527
1528at 0x00000181 : */ 0x58000008,0x00000000,
1529/*
1530 CLEAR ACK
1531
1532at 0x00000183 : */ 0x60000040,0x00000000,
1533/*
1534 MOVE 1, NCR53c7xx_msg_reject, WHEN MSG_OUT
1535
1536at 0x00000185 : */ 0x0e000001,0x00000000,
1537/*
1538 RETURN
1539
1540at 0x00000187 : */ 0x90080000,0x00000000,
1541/*
1542
1543ENTRY accept_message
1544accept_message:
1545 CLEAR ATN
1546
1547at 0x00000189 : */ 0x60000008,0x00000000,
1548/*
1549 CLEAR ACK
1550
1551at 0x0000018b : */ 0x60000040,0x00000000,
1552/*
1553 RETURN
1554
1555at 0x0000018d : */ 0x90080000,0x00000000,
1556/*
1557
1558ENTRY respond_message
1559respond_message:
1560 SET ATN
1561
1562at 0x0000018f : */ 0x58000008,0x00000000,
1563/*
1564 CLEAR ACK
1565
1566at 0x00000191 : */ 0x60000040,0x00000000,
1567/*
1568 MOVE FROM dsa_msgout_other, WHEN MSG_OUT
1569
1570at 0x00000193 : */ 0x1e000000,0x00000068,
1571/*
1572 RETURN
1573
1574at 0x00000195 : */ 0x90080000,0x00000000,
1575/*
1576
1577;
1578; command_complete
1579;
1580; PURPOSE : handle command termination when STATUS IN is detected by reading
1581; a status byte followed by a command termination message.
1582;
1583; Normal termination results in an INTFLY instruction, and
1584; the host system can pick out which command terminated by
1585; examining the MESSAGE and STATUS buffers of all currently
1586; executing commands;
1587;
1588; Abnormal (CHECK_CONDITION) termination results in an
1589; int_err_check_condition interrupt so that a REQUEST SENSE
1590; command can be issued out-of-order so that no other command
1591; clears the contingent allegiance condition.
1592;
1593;
1594; INPUTS : DSA - command
1595;
1596; CALLS : OK
1597;
1598; EXITS : On successful termination, control is passed to schedule.
1599; On abnormal termination, the user will usually modify the
1600; DSA fields and corresponding buffers and return control
1601; to select.
1602;
1603
1604ENTRY command_complete
1605command_complete:
1606 MOVE FROM dsa_status, WHEN STATUS
1607
1608at 0x00000197 : */ 0x1b000000,0x00000060,
1609/*
1610
1611 MOVE SFBR TO SCRATCH0 ; Save status
1612
1613at 0x00000199 : */ 0x6a340000,0x00000000,
1614/*
1615
1616ENTRY command_complete_msgin
1617command_complete_msgin:
1618 MOVE FROM dsa_msgin, WHEN MSG_IN
1619
1620at 0x0000019b : */ 0x1f000000,0x00000058,
1621/*
1622; Indicate that we should be expecting a disconnect
1623
1624
1625
1626 ; Above code cleared the Unexpected Disconnect bit, what do we do?
1627
1628 CLEAR ACK
1629
1630at 0x0000019d : */ 0x60000040,0x00000000,
1631/*
1632
1633 WAIT DISCONNECT
1634
1635at 0x0000019f : */ 0x48000000,0x00000000,
1636/*
1637
1638;
1639; The SCSI specification states that when a UNIT ATTENTION condition
1640; is pending, as indicated by a CHECK CONDITION status message,
1641; the target shall revert to asynchronous transfers. Since
1642; synchronous transfers parameters are maintained on a per INITIATOR/TARGET
1643; basis, and returning control to our scheduler could work on a command
1644; running on another lun on that target using the old parameters, we must
1645; interrupt the host processor to get them changed, or change them ourselves.
1646;
1647; Once SCSI-II tagged queueing is implemented, things will be even more
1648; hairy, since contingent allegiance conditions exist on a per-target/lun
1649; basis, and issuing a new command with a different tag would clear it.
1650; In these cases, we must interrupt the host processor to get a request
1651; added to the HEAD of the queue with the request sense command, or we
1652; must automatically issue the request sense command.
1653
1654
1655
1656
1657
1658
1659
1660 INT int_norm_emulateintfly
1661
1662at 0x000001a1 : */ 0x98080000,0x02060000,
1663/*
1664
1665
1666
1667
1668
1669
1670 ; Time to correct DSA following memory move
1671 MOVE MEMORY 4, saved_dsa, addr_dsa
1672
1673at 0x000001a3 : */ 0xc0000004,0x00000000,0x00000000,
1674/*
1675
1676
1677
1678
1679
1680 JUMP schedule
1681
1682at 0x000001a6 : */ 0x80080000,0x00000000,
1683/*
1684command_failed:
1685 INT int_err_check_condition
1686
1687at 0x000001a8 : */ 0x98080000,0x00030000,
1688/*
1689
1690
1691
1692
1693;
1694; wait_reselect
1695;
1696; PURPOSE : This is essentially the idle routine, where control lands
1697; when there are no new processes to schedule. wait_reselect
1698; waits for reselection, selection, and new commands.
1699;
1700; When a successful reselection occurs, with the aid
1701; of fixed up code in each DSA, wait_reselect walks the
1702; reconnect_dsa_queue, asking each dsa if the target ID
1703; and LUN match its.
1704;
1705; If a match is found, a call is made back to reselected_ok,
1706; which through the miracles of self modifying code, extracts
1707; the found DSA from the reconnect_dsa_queue and then
1708; returns control to the DSAs thread of execution.
1709;
1710; INPUTS : NONE
1711;
1712; CALLS : OK
1713;
1714; MODIFIES : DSA,
1715;
1716; EXITS : On successful reselection, control is returned to the
1717; DSA which called reselected_ok. If the WAIT RESELECT
1718; was interrupted by a new commands arrival signaled by
1719; SIG_P, control is passed to schedule. If the NCR is
1720; selected, the host system is interrupted with an
1721; int_err_selected which is usually responded to by
1722; setting DSP to the target_abort address.
1723
1724ENTRY wait_reselect
1725wait_reselect:
1726
1727
1728
1729
1730
1731
1732 WAIT RESELECT wait_reselect_failed
1733
1734at 0x000001aa : */ 0x50000000,0x00000800,
1735/*
1736
1737reselected:
1738
1739
1740
1741 CLEAR TARGET
1742
1743at 0x000001ac : */ 0x60000200,0x00000000,
1744/*
1745
1746 ; Read all data needed to reestablish the nexus -
1747 MOVE 1, reselected_identify, WHEN MSG_IN
1748
1749at 0x000001ae : */ 0x0f000001,0x00000000,
1750/*
1751 ; We used to CLEAR ACK here.
1752
1753
1754
1755
1756
1757 ; Point DSA at the current head of the disconnected queue.
1758
1759 MOVE MEMORY 4, reconnect_dsa_head, addr_scratch
1760
1761at 0x000001b0 : */ 0xc0000004,0x00000000,0x00000000,
1762/*
1763
1764
1765 MOVE MEMORY 4, addr_scratch, saved_dsa
1766
1767at 0x000001b3 : */ 0xc0000004,0x00000000,0x00000000,
1768/*
1769
1770
1771
1772
1773 ; Fix the update-next pointer so that the reconnect_dsa_head
1774 ; pointer is the one that will be updated if this DSA is a hit
1775 ; and we remove it from the queue.
1776
1777 MOVE MEMORY 4, addr_reconnect_dsa_head, reselected_ok_patch + 8
1778
1779at 0x000001b6 : */ 0xc0000004,0x00000000,0x000007ec,
1780/*
1781
1782 ; Time to correct DSA following memory move
1783 MOVE MEMORY 4, saved_dsa, addr_dsa
1784
1785at 0x000001b9 : */ 0xc0000004,0x00000000,0x00000000,
1786/*
1787
1788
1789ENTRY reselected_check_next
1790reselected_check_next:
1791
1792
1793
1794 ; Check for a NULL pointer.
1795 MOVE DSA0 TO SFBR
1796
1797at 0x000001bc : */ 0x72100000,0x00000000,
1798/*
1799 JUMP reselected_not_end, IF NOT 0
1800
1801at 0x000001be : */ 0x80040000,0x00000738,
1802/*
1803 MOVE DSA1 TO SFBR
1804
1805at 0x000001c0 : */ 0x72110000,0x00000000,
1806/*
1807 JUMP reselected_not_end, IF NOT 0
1808
1809at 0x000001c2 : */ 0x80040000,0x00000738,
1810/*
1811 MOVE DSA2 TO SFBR
1812
1813at 0x000001c4 : */ 0x72120000,0x00000000,
1814/*
1815 JUMP reselected_not_end, IF NOT 0
1816
1817at 0x000001c6 : */ 0x80040000,0x00000738,
1818/*
1819 MOVE DSA3 TO SFBR
1820
1821at 0x000001c8 : */ 0x72130000,0x00000000,
1822/*
1823 JUMP reselected_not_end, IF NOT 0
1824
1825at 0x000001ca : */ 0x80040000,0x00000738,
1826/*
1827 INT int_err_unexpected_reselect
1828
1829at 0x000001cc : */ 0x98080000,0x00020000,
1830/*
1831
1832reselected_not_end:
1833 ;
1834 ; XXX the ALU is only eight bits wide, and the assembler
1835 ; wont do the dirt work for us. As long as dsa_check_reselect
1836 ; is negative, we need to sign extend with 1 bits to the full
1837 ; 32 bit width of the address.
1838 ;
1839 ; A potential work around would be to have a known alignment
1840 ; of the DSA structure such that the base address plus
1841 ; dsa_check_reselect doesn't require carrying from bytes
1842 ; higher than the LSB.
1843 ;
1844
1845 MOVE DSA0 TO SFBR
1846
1847at 0x000001ce : */ 0x72100000,0x00000000,
1848/*
1849 MOVE SFBR + dsa_check_reselect TO SCRATCH0
1850
1851at 0x000001d0 : */ 0x6e340000,0x00000000,
1852/*
1853 MOVE DSA1 TO SFBR
1854
1855at 0x000001d2 : */ 0x72110000,0x00000000,
1856/*
1857 MOVE SFBR + 0xff TO SCRATCH1 WITH CARRY
1858
1859at 0x000001d4 : */ 0x6f35ff00,0x00000000,
1860/*
1861 MOVE DSA2 TO SFBR
1862
1863at 0x000001d6 : */ 0x72120000,0x00000000,
1864/*
1865 MOVE SFBR + 0xff TO SCRATCH2 WITH CARRY
1866
1867at 0x000001d8 : */ 0x6f36ff00,0x00000000,
1868/*
1869 MOVE DSA3 TO SFBR
1870
1871at 0x000001da : */ 0x72130000,0x00000000,
1872/*
1873 MOVE SFBR + 0xff TO SCRATCH3 WITH CARRY
1874
1875at 0x000001dc : */ 0x6f37ff00,0x00000000,
1876/*
1877
1878
1879 MOVE MEMORY 4, addr_scratch, reselected_check + 4
1880
1881at 0x000001de : */ 0xc0000004,0x00000000,0x00000794,
1882/*
1883
1884
1885 ; Time to correct DSA following memory move
1886 MOVE MEMORY 4, saved_dsa, addr_dsa
1887
1888at 0x000001e1 : */ 0xc0000004,0x00000000,0x00000000,
1889/*
1890
1891reselected_check:
1892 JUMP 0
1893
1894at 0x000001e4 : */ 0x80080000,0x00000000,
1895/*
1896
1897
1898;
1899;
1900
1901; We have problems here - the memory move corrupts TEMP and DSA. This
1902; routine is called from DSA code, and patched from many places. Scratch
1903; is probably free when it is called.
1904; We have to:
1905; copy temp to scratch, one byte at a time
1906; write scratch to patch a jump in place of the return
1907; do the move memory
1908; jump to the patched in return address
1909; DSA is corrupt when we get here, and can be left corrupt
1910
1911ENTRY reselected_ok
1912reselected_ok:
1913 MOVE TEMP0 TO SFBR
1914
1915at 0x000001e6 : */ 0x721c0000,0x00000000,
1916/*
1917 MOVE SFBR TO SCRATCH0
1918
1919at 0x000001e8 : */ 0x6a340000,0x00000000,
1920/*
1921 MOVE TEMP1 TO SFBR
1922
1923at 0x000001ea : */ 0x721d0000,0x00000000,
1924/*
1925 MOVE SFBR TO SCRATCH1
1926
1927at 0x000001ec : */ 0x6a350000,0x00000000,
1928/*
1929 MOVE TEMP2 TO SFBR
1930
1931at 0x000001ee : */ 0x721e0000,0x00000000,
1932/*
1933 MOVE SFBR TO SCRATCH2
1934
1935at 0x000001f0 : */ 0x6a360000,0x00000000,
1936/*
1937 MOVE TEMP3 TO SFBR
1938
1939at 0x000001f2 : */ 0x721f0000,0x00000000,
1940/*
1941 MOVE SFBR TO SCRATCH3
1942
1943at 0x000001f4 : */ 0x6a370000,0x00000000,
1944/*
1945 MOVE MEMORY 4, addr_scratch, reselected_ok_jump + 4
1946
1947at 0x000001f6 : */ 0xc0000004,0x00000000,0x000007f4,
1948/*
1949reselected_ok_patch:
1950 MOVE MEMORY 4, 0, 0
1951
1952at 0x000001f9 : */ 0xc0000004,0x00000000,0x00000000,
1953/*
1954reselected_ok_jump:
1955 JUMP 0
1956
1957at 0x000001fc : */ 0x80080000,0x00000000,
1958/*
1959
1960
1961
1962
1963
1964selected:
1965 INT int_err_selected;
1966
1967at 0x000001fe : */ 0x98080000,0x00010000,
1968/*
1969
1970;
1971; A select or reselect failure can be caused by one of two conditions :
1972; 1. SIG_P was set. This will be the case if the user has written
1973; a new value to a previously NULL head of the issue queue.
1974;
1975; 2. The NCR53c810 was selected or reselected by another device.
1976;
1977; 3. The bus was already busy since we were selected or reselected
1978; before starting the command.
1979
1980wait_reselect_failed:
1981
1982
1983
1984; Check selected bit.
1985
1986 ; Must work out how to tell if we are selected....
1987
1988
1989
1990
1991; Reading CTEST2 clears the SIG_P bit in the ISTAT register.
1992 MOVE CTEST2 & 0x40 TO SFBR
1993
1994at 0x00000200 : */ 0x74164000,0x00000000,
1995/*
1996 JUMP schedule, IF 0x40
1997
1998at 0x00000202 : */ 0x800c0040,0x00000000,
1999/*
2000; Check connected bit.
2001; FIXME: this needs to change if we support target mode
2002 MOVE ISTAT & 0x08 TO SFBR
2003
2004at 0x00000204 : */ 0x74210800,0x00000000,
2005/*
2006 JUMP reselected, IF 0x08
2007
2008at 0x00000206 : */ 0x800c0008,0x000006b0,
2009/*
2010; FIXME : Something bogus happened, and we shouldn't fail silently.
2011
2012
2013
2014 INT int_debug_panic
2015
2016at 0x00000208 : */ 0x98080000,0x030b0000,
2017/*
2018
2019
2020
2021select_failed:
2022
2023 ; Disable selection timer
2024 MOVE CTEST7 | 0x10 TO CTEST7
2025
2026at 0x0000020a : */ 0x7a1b1000,0x00000000,
2027/*
2028
2029
2030
2031
2032; Otherwise, mask the selected and reselected bits off SIST0
2033
2034 ; Let's assume we don't get selected for now
2035 MOVE SSTAT0 & 0x10 TO SFBR
2036
2037at 0x0000020c : */ 0x740d1000,0x00000000,
2038/*
2039
2040
2041
2042
2043 JUMP reselected, IF 0x10
2044
2045at 0x0000020e : */ 0x800c0010,0x000006b0,
2046/*
2047; If SIGP is set, the user just gave us another command, and
2048; we should restart or return to the scheduler.
2049; Reading CTEST2 clears the SIG_P bit in the ISTAT register.
2050 MOVE CTEST2 & 0x40 TO SFBR
2051
2052at 0x00000210 : */ 0x74164000,0x00000000,
2053/*
2054 JUMP select, IF 0x40
2055
2056at 0x00000212 : */ 0x800c0040,0x000001f8,
2057/*
2058; Check connected bit.
2059; FIXME: this needs to change if we support target mode
2060; FIXME: is this really necessary?
2061 MOVE ISTAT & 0x08 TO SFBR
2062
2063at 0x00000214 : */ 0x74210800,0x00000000,
2064/*
2065 JUMP reselected, IF 0x08
2066
2067at 0x00000216 : */ 0x800c0008,0x000006b0,
2068/*
2069; FIXME : Something bogus happened, and we shouldn't fail silently.
2070
2071
2072
2073 INT int_debug_panic
2074
2075at 0x00000218 : */ 0x98080000,0x030b0000,
2076/*
2077
2078
2079;
2080; test_1
2081; test_2
2082;
2083; PURPOSE : run some verification tests on the NCR. test_1
2084; copies test_src to test_dest and interrupts the host
2085; processor, testing for cache coherency and interrupt
2086; problems in the processes.
2087;
2088; test_2 runs a command with offsets relative to the
2089; DSA on entry, and is useful for miscellaneous experimentation.
2090;
2091
2092; Verify that interrupts are working correctly and that we don't
2093; have a cache invalidation problem.
2094
2095ABSOLUTE test_src = 0, test_dest = 0
2096ENTRY test_1
2097test_1:
2098 MOVE MEMORY 4, test_src, test_dest
2099
2100at 0x0000021a : */ 0xc0000004,0x00000000,0x00000000,
2101/*
2102 INT int_test_1
2103
2104at 0x0000021d : */ 0x98080000,0x04000000,
2105/*
2106
2107;
2108; Run arbitrary commands, with test code establishing a DSA
2109;
2110
2111ENTRY test_2
2112test_2:
2113 CLEAR TARGET
2114
2115at 0x0000021f : */ 0x60000200,0x00000000,
2116/*
2117
2118 ; Enable selection timer
2119
2120
2121
2122 MOVE CTEST7 & 0xef TO CTEST7
2123
2124at 0x00000221 : */ 0x7c1bef00,0x00000000,
2125/*
2126
2127
2128 SELECT ATN FROM 0, test_2_fail
2129
2130at 0x00000223 : */ 0x43000000,0x000008dc,
2131/*
2132 JUMP test_2_msgout, WHEN MSG_OUT
2133
2134at 0x00000225 : */ 0x860b0000,0x0000089c,
2135/*
2136ENTRY test_2_msgout
2137test_2_msgout:
2138
2139 ; Disable selection timer
2140 MOVE CTEST7 | 0x10 TO CTEST7
2141
2142at 0x00000227 : */ 0x7a1b1000,0x00000000,
2143/*
2144
2145 MOVE FROM 8, WHEN MSG_OUT
2146
2147at 0x00000229 : */ 0x1e000000,0x00000008,
2148/*
2149 MOVE FROM 16, WHEN CMD
2150
2151at 0x0000022b : */ 0x1a000000,0x00000010,
2152/*
2153 MOVE FROM 24, WHEN DATA_IN
2154
2155at 0x0000022d : */ 0x19000000,0x00000018,
2156/*
2157 MOVE FROM 32, WHEN STATUS
2158
2159at 0x0000022f : */ 0x1b000000,0x00000020,
2160/*
2161 MOVE FROM 40, WHEN MSG_IN
2162
2163at 0x00000231 : */ 0x1f000000,0x00000028,
2164/*
2165
2166
2167
2168 CLEAR ACK
2169
2170at 0x00000233 : */ 0x60000040,0x00000000,
2171/*
2172 WAIT DISCONNECT
2173
2174at 0x00000235 : */ 0x48000000,0x00000000,
2175/*
2176test_2_fail:
2177
2178 ; Disable selection timer
2179 MOVE CTEST7 | 0x10 TO CTEST7
2180
2181at 0x00000237 : */ 0x7a1b1000,0x00000000,
2182/*
2183
2184 INT int_test_2
2185
2186at 0x00000239 : */ 0x98080000,0x04010000,
2187/*
2188
2189ENTRY debug_break
2190debug_break:
2191 INT int_debug_break
2192
2193at 0x0000023b : */ 0x98080000,0x03000000,
2194/*
2195
2196;
2197; initiator_abort
2198; target_abort
2199;
2200; PURPOSE : Abort the currently established nexus from with initiator
2201; or target mode.
2202;
2203;
2204
2205ENTRY target_abort
2206target_abort:
2207 SET TARGET
2208
2209at 0x0000023d : */ 0x58000200,0x00000000,
2210/*
2211 DISCONNECT
2212
2213at 0x0000023f : */ 0x48000000,0x00000000,
2214/*
2215 CLEAR TARGET
2216
2217at 0x00000241 : */ 0x60000200,0x00000000,
2218/*
2219 JUMP schedule
2220
2221at 0x00000243 : */ 0x80080000,0x00000000,
2222/*
2223
2224ENTRY initiator_abort
2225initiator_abort:
2226 SET ATN
2227
2228at 0x00000245 : */ 0x58000008,0x00000000,
2229/*
2230;
2231; The SCSI-I specification says that targets may go into MSG out at
2232; their leisure upon receipt of the ATN single. On all versions of the
2233; specification, we can't change phases until REQ transitions true->false,
2234; so we need to sink/source one byte of data to allow the transition.
2235;
2236; For the sake of safety, we'll only source one byte of data in all
2237; cases, but to accommodate the SCSI-I dain bramage, we'll sink an
2238; arbitrary number of bytes.
2239 JUMP spew_cmd, WHEN CMD
2240
2241at 0x00000247 : */ 0x820b0000,0x0000094c,
2242/*
2243 JUMP eat_msgin, WHEN MSG_IN
2244
2245at 0x00000249 : */ 0x870b0000,0x0000095c,
2246/*
2247 JUMP eat_datain, WHEN DATA_IN
2248
2249at 0x0000024b : */ 0x810b0000,0x0000098c,
2250/*
2251 JUMP eat_status, WHEN STATUS
2252
2253at 0x0000024d : */ 0x830b0000,0x00000974,
2254/*
2255 JUMP spew_dataout, WHEN DATA_OUT
2256
2257at 0x0000024f : */ 0x800b0000,0x000009a4,
2258/*
2259 JUMP sated
2260
2261at 0x00000251 : */ 0x80080000,0x000009ac,
2262/*
2263spew_cmd:
2264 MOVE 1, NCR53c7xx_zero, WHEN CMD
2265
2266at 0x00000253 : */ 0x0a000001,0x00000000,
2267/*
2268 JUMP sated
2269
2270at 0x00000255 : */ 0x80080000,0x000009ac,
2271/*
2272eat_msgin:
2273 MOVE 1, NCR53c7xx_sink, WHEN MSG_IN
2274
2275at 0x00000257 : */ 0x0f000001,0x00000000,
2276/*
2277 JUMP eat_msgin, WHEN MSG_IN
2278
2279at 0x00000259 : */ 0x870b0000,0x0000095c,
2280/*
2281 JUMP sated
2282
2283at 0x0000025b : */ 0x80080000,0x000009ac,
2284/*
2285eat_status:
2286 MOVE 1, NCR53c7xx_sink, WHEN STATUS
2287
2288at 0x0000025d : */ 0x0b000001,0x00000000,
2289/*
2290 JUMP eat_status, WHEN STATUS
2291
2292at 0x0000025f : */ 0x830b0000,0x00000974,
2293/*
2294 JUMP sated
2295
2296at 0x00000261 : */ 0x80080000,0x000009ac,
2297/*
2298eat_datain:
2299 MOVE 1, NCR53c7xx_sink, WHEN DATA_IN
2300
2301at 0x00000263 : */ 0x09000001,0x00000000,
2302/*
2303 JUMP eat_datain, WHEN DATA_IN
2304
2305at 0x00000265 : */ 0x810b0000,0x0000098c,
2306/*
2307 JUMP sated
2308
2309at 0x00000267 : */ 0x80080000,0x000009ac,
2310/*
2311spew_dataout:
2312 MOVE 1, NCR53c7xx_zero, WHEN DATA_OUT
2313
2314at 0x00000269 : */ 0x08000001,0x00000000,
2315/*
2316sated:
2317
2318
2319
2320 MOVE 1, NCR53c7xx_msg_abort, WHEN MSG_OUT
2321
2322at 0x0000026b : */ 0x0e000001,0x00000000,
2323/*
2324 WAIT DISCONNECT
2325
2326at 0x0000026d : */ 0x48000000,0x00000000,
2327/*
2328 INT int_norm_aborted
2329
2330at 0x0000026f : */ 0x98080000,0x02040000,
2331/*
2332
2333
2334
2335
2336; Little patched jump, used to overcome problems with TEMP getting
2337; corrupted on memory moves.
2338
2339jump_temp:
2340 JUMP 0
2341
2342at 0x00000271 : */ 0x80080000,0x00000000,
2343};
2344
2345#define A_NCR53c7xx_msg_abort 0x00000000
2346static u32 A_NCR53c7xx_msg_abort_used[] __attribute((unused)) = {
2347 0x0000026c,
2348};
2349
2350#define A_NCR53c7xx_msg_reject 0x00000000
2351static u32 A_NCR53c7xx_msg_reject_used[] __attribute((unused)) = {
2352 0x00000186,
2353};
2354
2355#define A_NCR53c7xx_sink 0x00000000
2356static u32 A_NCR53c7xx_sink_used[] __attribute((unused)) = {
2357 0x00000258,
2358 0x0000025e,
2359 0x00000264,
2360};
2361
2362#define A_NCR53c7xx_zero 0x00000000
2363static u32 A_NCR53c7xx_zero_used[] __attribute((unused)) = {
2364 0x00000254,
2365 0x0000026a,
2366};
2367
2368#define A_NOP_insn 0x00000000
2369static u32 A_NOP_insn_used[] __attribute((unused)) = {
2370 0x00000017,
2371};
2372
2373#define A_addr_dsa 0x00000000
2374static u32 A_addr_dsa_used[] __attribute((unused)) = {
2375 0x0000000f,
2376 0x00000026,
2377 0x00000033,
2378 0x00000040,
2379 0x00000055,
2380 0x00000079,
2381 0x0000008e,
2382 0x000000bc,
2383 0x000000d2,
2384 0x00000130,
2385 0x000001a5,
2386 0x000001bb,
2387 0x000001e3,
2388};
2389
2390#define A_addr_reconnect_dsa_head 0x00000000
2391static u32 A_addr_reconnect_dsa_head_used[] __attribute((unused)) = {
2392 0x000001b7,
2393};
2394
2395#define A_addr_scratch 0x00000000
2396static u32 A_addr_scratch_used[] __attribute((unused)) = {
2397 0x00000002,
2398 0x00000004,
2399 0x00000008,
2400 0x00000020,
2401 0x00000022,
2402 0x00000049,
2403 0x00000060,
2404 0x0000006a,
2405 0x00000071,
2406 0x00000073,
2407 0x000000ab,
2408 0x000000b5,
2409 0x000000c1,
2410 0x000000cb,
2411 0x0000012c,
2412 0x00000142,
2413 0x00000157,
2414 0x000001b2,
2415 0x000001b4,
2416 0x000001df,
2417 0x000001f7,
2418};
2419
2420#define A_addr_temp 0x00000000
2421static u32 A_addr_temp_used[] __attribute((unused)) = {
2422};
2423
2424#define A_dmode_memory_to_memory 0x00000000
2425static u32 A_dmode_memory_to_memory_used[] __attribute((unused)) = {
2426};
2427
2428#define A_dmode_memory_to_ncr 0x00000000
2429static u32 A_dmode_memory_to_ncr_used[] __attribute((unused)) = {
2430};
2431
2432#define A_dmode_ncr_to_memory 0x00000000
2433static u32 A_dmode_ncr_to_memory_used[] __attribute((unused)) = {
2434};
2435
2436#define A_dsa_check_reselect 0x00000000
2437static u32 A_dsa_check_reselect_used[] __attribute((unused)) = {
2438 0x000001d0,
2439};
2440
2441#define A_dsa_cmdout 0x00000048
2442static u32 A_dsa_cmdout_used[] __attribute((unused)) = {
2443 0x0000009a,
2444};
2445
2446#define A_dsa_cmnd 0x00000038
2447static u32 A_dsa_cmnd_used[] __attribute((unused)) = {
2448};
2449
2450#define A_dsa_datain 0x00000054
2451static u32 A_dsa_datain_used[] __attribute((unused)) = {
2452 0x000000c2,
2453};
2454
2455#define A_dsa_dataout 0x00000050
2456static u32 A_dsa_dataout_used[] __attribute((unused)) = {
2457 0x000000ac,
2458};
2459
2460#define A_dsa_end 0x00000070
2461static u32 A_dsa_end_used[] __attribute((unused)) = {
2462};
2463
2464#define A_dsa_fields_start 0x00000000
2465static u32 A_dsa_fields_start_used[] __attribute((unused)) = {
2466};
2467
2468#define A_dsa_msgin 0x00000058
2469static u32 A_dsa_msgin_used[] __attribute((unused)) = {
2470 0x0000019c,
2471};
2472
2473#define A_dsa_msgout 0x00000040
2474static u32 A_dsa_msgout_used[] __attribute((unused)) = {
2475 0x00000089,
2476};
2477
2478#define A_dsa_msgout_other 0x00000068
2479static u32 A_dsa_msgout_other_used[] __attribute((unused)) = {
2480 0x00000194,
2481};
2482
2483#define A_dsa_next 0x00000030
2484static u32 A_dsa_next_used[] __attribute((unused)) = {
2485 0x00000061,
2486};
2487
2488#define A_dsa_restore_pointers 0x00000000
2489static u32 A_dsa_restore_pointers_used[] __attribute((unused)) = {
2490 0x00000146,
2491};
2492
2493#define A_dsa_save_data_pointer 0x00000000
2494static u32 A_dsa_save_data_pointer_used[] __attribute((unused)) = {
2495 0x00000131,
2496};
2497
2498#define A_dsa_select 0x0000003c
2499static u32 A_dsa_select_used[] __attribute((unused)) = {
2500 0x00000082,
2501};
2502
2503#define A_dsa_sscf_710 0x00000000
2504static u32 A_dsa_sscf_710_used[] __attribute((unused)) = {
2505 0x00000007,
2506};
2507
2508#define A_dsa_status 0x00000060
2509static u32 A_dsa_status_used[] __attribute((unused)) = {
2510 0x00000198,
2511};
2512
2513#define A_dsa_temp_addr_array_value 0x00000000
2514static u32 A_dsa_temp_addr_array_value_used[] __attribute((unused)) = {
2515};
2516
2517#define A_dsa_temp_addr_dsa_value 0x00000000
2518static u32 A_dsa_temp_addr_dsa_value_used[] __attribute((unused)) = {
2519 0x00000001,
2520};
2521
2522#define A_dsa_temp_addr_new_value 0x00000000
2523static u32 A_dsa_temp_addr_new_value_used[] __attribute((unused)) = {
2524};
2525
2526#define A_dsa_temp_addr_next 0x00000000
2527static u32 A_dsa_temp_addr_next_used[] __attribute((unused)) = {
2528 0x0000001c,
2529 0x0000004f,
2530};
2531
2532#define A_dsa_temp_addr_residual 0x00000000
2533static u32 A_dsa_temp_addr_residual_used[] __attribute((unused)) = {
2534 0x0000002d,
2535 0x0000003b,
2536};
2537
2538#define A_dsa_temp_addr_saved_pointer 0x00000000
2539static u32 A_dsa_temp_addr_saved_pointer_used[] __attribute((unused)) = {
2540 0x0000002b,
2541 0x00000037,
2542};
2543
2544#define A_dsa_temp_addr_saved_residual 0x00000000
2545static u32 A_dsa_temp_addr_saved_residual_used[] __attribute((unused)) = {
2546 0x0000002e,
2547 0x0000003a,
2548};
2549
2550#define A_dsa_temp_lun 0x00000000
2551static u32 A_dsa_temp_lun_used[] __attribute((unused)) = {
2552 0x0000004c,
2553};
2554
2555#define A_dsa_temp_next 0x00000000
2556static u32 A_dsa_temp_next_used[] __attribute((unused)) = {
2557 0x0000001f,
2558};
2559
2560#define A_dsa_temp_sync 0x00000000
2561static u32 A_dsa_temp_sync_used[] __attribute((unused)) = {
2562 0x00000057,
2563};
2564
2565#define A_dsa_temp_target 0x00000000
2566static u32 A_dsa_temp_target_used[] __attribute((unused)) = {
2567 0x00000045,
2568};
2569
2570#define A_emulfly 0x00000000
2571static u32 A_emulfly_used[] __attribute((unused)) = {
2572};
2573
2574#define A_int_debug_break 0x03000000
2575static u32 A_int_debug_break_used[] __attribute((unused)) = {
2576 0x0000023c,
2577};
2578
2579#define A_int_debug_panic 0x030b0000
2580static u32 A_int_debug_panic_used[] __attribute((unused)) = {
2581 0x00000209,
2582 0x00000219,
2583};
2584
2585#define A_int_err_check_condition 0x00030000
2586static u32 A_int_err_check_condition_used[] __attribute((unused)) = {
2587 0x000001a9,
2588};
2589
2590#define A_int_err_no_phase 0x00040000
2591static u32 A_int_err_no_phase_used[] __attribute((unused)) = {
2592};
2593
2594#define A_int_err_selected 0x00010000
2595static u32 A_int_err_selected_used[] __attribute((unused)) = {
2596 0x000001ff,
2597};
2598
2599#define A_int_err_unexpected_phase 0x00000000
2600static u32 A_int_err_unexpected_phase_used[] __attribute((unused)) = {
2601 0x00000092,
2602 0x00000098,
2603 0x000000a0,
2604 0x000000d6,
2605 0x000000da,
2606 0x000000dc,
2607 0x000000e4,
2608 0x000000e8,
2609 0x000000ea,
2610 0x000000f2,
2611 0x000000f6,
2612 0x000000f8,
2613 0x000000fa,
2614 0x00000160,
2615};
2616
2617#define A_int_err_unexpected_reselect 0x00020000
2618static u32 A_int_err_unexpected_reselect_used[] __attribute((unused)) = {
2619 0x000001cd,
2620};
2621
2622#define A_int_msg_1 0x01020000
2623static u32 A_int_msg_1_used[] __attribute((unused)) = {
2624 0x00000114,
2625 0x00000116,
2626};
2627
2628#define A_int_msg_sdtr 0x01010000
2629static u32 A_int_msg_sdtr_used[] __attribute((unused)) = {
2630 0x00000180,
2631};
2632
2633#define A_int_msg_wdtr 0x01000000
2634static u32 A_int_msg_wdtr_used[] __attribute((unused)) = {
2635 0x00000174,
2636};
2637
2638#define A_int_norm_aborted 0x02040000
2639static u32 A_int_norm_aborted_used[] __attribute((unused)) = {
2640 0x00000270,
2641};
2642
2643#define A_int_norm_command_complete 0x02020000
2644static u32 A_int_norm_command_complete_used[] __attribute((unused)) = {
2645};
2646
2647#define A_int_norm_disconnected 0x02030000
2648static u32 A_int_norm_disconnected_used[] __attribute((unused)) = {
2649};
2650
2651#define A_int_norm_emulateintfly 0x02060000
2652static u32 A_int_norm_emulateintfly_used[] __attribute((unused)) = {
2653 0x000001a2,
2654};
2655
2656#define A_int_norm_reselect_complete 0x02010000
2657static u32 A_int_norm_reselect_complete_used[] __attribute((unused)) = {
2658};
2659
2660#define A_int_norm_reset 0x02050000
2661static u32 A_int_norm_reset_used[] __attribute((unused)) = {
2662};
2663
2664#define A_int_norm_select_complete 0x02000000
2665static u32 A_int_norm_select_complete_used[] __attribute((unused)) = {
2666};
2667
2668#define A_int_test_1 0x04000000
2669static u32 A_int_test_1_used[] __attribute((unused)) = {
2670 0x0000021e,
2671};
2672
2673#define A_int_test_2 0x04010000
2674static u32 A_int_test_2_used[] __attribute((unused)) = {
2675 0x0000023a,
2676};
2677
2678#define A_int_test_3 0x04020000
2679static u32 A_int_test_3_used[] __attribute((unused)) = {
2680};
2681
2682#define A_msg_buf 0x00000000
2683static u32 A_msg_buf_used[] __attribute((unused)) = {
2684 0x00000108,
2685 0x00000162,
2686 0x0000016c,
2687 0x00000172,
2688 0x00000178,
2689 0x0000017e,
2690};
2691
2692#define A_reconnect_dsa_head 0x00000000
2693static u32 A_reconnect_dsa_head_used[] __attribute((unused)) = {
2694 0x0000006d,
2695 0x00000074,
2696 0x000001b1,
2697};
2698
2699#define A_reselected_identify 0x00000000
2700static u32 A_reselected_identify_used[] __attribute((unused)) = {
2701 0x00000048,
2702 0x000001af,
2703};
2704
2705#define A_reselected_tag 0x00000000
2706static u32 A_reselected_tag_used[] __attribute((unused)) = {
2707};
2708
2709#define A_saved_dsa 0x00000000
2710static u32 A_saved_dsa_used[] __attribute((unused)) = {
2711 0x00000005,
2712 0x0000000e,
2713 0x00000023,
2714 0x00000025,
2715 0x00000032,
2716 0x0000003f,
2717 0x00000054,
2718 0x0000005f,
2719 0x00000070,
2720 0x00000078,
2721 0x0000008d,
2722 0x000000aa,
2723 0x000000bb,
2724 0x000000c0,
2725 0x000000d1,
2726 0x0000012f,
2727 0x000001a4,
2728 0x000001b5,
2729 0x000001ba,
2730 0x000001e2,
2731};
2732
2733#define A_schedule 0x00000000
2734static u32 A_schedule_used[] __attribute((unused)) = {
2735 0x0000007d,
2736 0x000001a7,
2737 0x00000203,
2738 0x00000244,
2739};
2740
2741#define A_test_dest 0x00000000
2742static u32 A_test_dest_used[] __attribute((unused)) = {
2743 0x0000021c,
2744};
2745
2746#define A_test_src 0x00000000
2747static u32 A_test_src_used[] __attribute((unused)) = {
2748 0x0000021b,
2749};
2750
2751#define Ent_accept_message 0x00000624
2752#define Ent_cmdout_cmdout 0x00000264
2753#define Ent_command_complete 0x0000065c
2754#define Ent_command_complete_msgin 0x0000066c
2755#define Ent_data_transfer 0x0000026c
2756#define Ent_datain_to_jump 0x00000334
2757#define Ent_debug_break 0x000008ec
2758#define Ent_dsa_code_begin 0x00000000
2759#define Ent_dsa_code_check_reselect 0x0000010c
2760#define Ent_dsa_code_fix_jump 0x00000058
2761#define Ent_dsa_code_restore_pointers 0x000000d8
2762#define Ent_dsa_code_save_data_pointer 0x000000a4
2763#define Ent_dsa_code_template 0x00000000
2764#define Ent_dsa_code_template_end 0x00000178
2765#define Ent_dsa_schedule 0x00000178
2766#define Ent_dsa_zero 0x00000178
2767#define Ent_end_data_transfer 0x000002a4
2768#define Ent_initiator_abort 0x00000914
2769#define Ent_msg_in 0x0000041c
2770#define Ent_msg_in_restart 0x000003fc
2771#define Ent_other_in 0x0000038c
2772#define Ent_other_out 0x00000354
2773#define Ent_other_transfer 0x000003c4
2774#define Ent_reject_message 0x00000604
2775#define Ent_reselected_check_next 0x000006f0
2776#define Ent_reselected_ok 0x00000798
2777#define Ent_respond_message 0x0000063c
2778#define Ent_select 0x000001f8
2779#define Ent_select_msgout 0x00000218
2780#define Ent_target_abort 0x000008f4
2781#define Ent_test_1 0x00000868
2782#define Ent_test_2 0x0000087c
2783#define Ent_test_2_msgout 0x0000089c
2784#define Ent_wait_reselect 0x000006a8
2785static u32 LABELPATCHES[] __attribute((unused)) = {
2786 0x00000011,
2787 0x0000001a,
2788 0x0000001d,
2789 0x00000028,
2790 0x0000002a,
2791 0x00000035,
2792 0x00000038,
2793 0x00000042,
2794 0x00000050,
2795 0x00000052,
2796 0x0000006b,
2797 0x00000083,
2798 0x00000085,
2799 0x00000090,
2800 0x00000094,
2801 0x00000096,
2802 0x0000009c,
2803 0x0000009e,
2804 0x000000a2,
2805 0x000000a4,
2806 0x000000a6,
2807 0x000000a8,
2808 0x000000b6,
2809 0x000000b9,
2810 0x000000cc,
2811 0x000000cf,
2812 0x000000d8,
2813 0x000000de,
2814 0x000000e0,
2815 0x000000e6,
2816 0x000000ec,
2817 0x000000ee,
2818 0x000000f4,
2819 0x000000fc,
2820 0x000000fe,
2821 0x0000010a,
2822 0x0000010c,
2823 0x0000010e,
2824 0x00000110,
2825 0x00000112,
2826 0x00000118,
2827 0x0000011a,
2828 0x0000012d,
2829 0x00000143,
2830 0x00000158,
2831 0x0000015c,
2832 0x00000164,
2833 0x00000166,
2834 0x00000168,
2835 0x0000016e,
2836 0x0000017a,
2837 0x000001ab,
2838 0x000001b8,
2839 0x000001bf,
2840 0x000001c3,
2841 0x000001c7,
2842 0x000001cb,
2843 0x000001e0,
2844 0x000001f8,
2845 0x00000207,
2846 0x0000020f,
2847 0x00000213,
2848 0x00000217,
2849 0x00000224,
2850 0x00000226,
2851 0x00000248,
2852 0x0000024a,
2853 0x0000024c,
2854 0x0000024e,
2855 0x00000250,
2856 0x00000252,
2857 0x00000256,
2858 0x0000025a,
2859 0x0000025c,
2860 0x00000260,
2861 0x00000262,
2862 0x00000266,
2863 0x00000268,
2864};
2865
2866static struct {
2867 u32 offset;
2868 void *address;
2869} EXTERNAL_PATCHES[] __attribute((unused)) = {
2870};
2871
2872static u32 INSTRUCTIONS __attribute((unused)) = 290;
2873static u32 PATCHES __attribute((unused)) = 78;
2874static u32 EXTERNAL_PATCHES_LEN __attribute((unused)) = 0;
diff --git a/drivers/scsi/53c7xx_u.h_shipped b/drivers/scsi/53c7xx_u.h_shipped
deleted file mode 100644
index 7b337174e228..000000000000
--- a/drivers/scsi/53c7xx_u.h_shipped
+++ /dev/null
@@ -1,102 +0,0 @@
1#undef A_NCR53c7xx_msg_abort
2#undef A_NCR53c7xx_msg_reject
3#undef A_NCR53c7xx_sink
4#undef A_NCR53c7xx_zero
5#undef A_NOP_insn
6#undef A_addr_dsa
7#undef A_addr_reconnect_dsa_head
8#undef A_addr_scratch
9#undef A_addr_temp
10#undef A_dmode_memory_to_memory
11#undef A_dmode_memory_to_ncr
12#undef A_dmode_ncr_to_memory
13#undef A_dsa_check_reselect
14#undef A_dsa_cmdout
15#undef A_dsa_cmnd
16#undef A_dsa_datain
17#undef A_dsa_dataout
18#undef A_dsa_end
19#undef A_dsa_fields_start
20#undef A_dsa_msgin
21#undef A_dsa_msgout
22#undef A_dsa_msgout_other
23#undef A_dsa_next
24#undef A_dsa_restore_pointers
25#undef A_dsa_save_data_pointer
26#undef A_dsa_select
27#undef A_dsa_sscf_710
28#undef A_dsa_status
29#undef A_dsa_temp_addr_array_value
30#undef A_dsa_temp_addr_dsa_value
31#undef A_dsa_temp_addr_new_value
32#undef A_dsa_temp_addr_next
33#undef A_dsa_temp_addr_residual
34#undef A_dsa_temp_addr_saved_pointer
35#undef A_dsa_temp_addr_saved_residual
36#undef A_dsa_temp_lun
37#undef A_dsa_temp_next
38#undef A_dsa_temp_sync
39#undef A_dsa_temp_target
40#undef A_emulfly
41#undef A_int_debug_break
42#undef A_int_debug_panic
43#undef A_int_err_check_condition
44#undef A_int_err_no_phase
45#undef A_int_err_selected
46#undef A_int_err_unexpected_phase
47#undef A_int_err_unexpected_reselect
48#undef A_int_msg_1
49#undef A_int_msg_sdtr
50#undef A_int_msg_wdtr
51#undef A_int_norm_aborted
52#undef A_int_norm_command_complete
53#undef A_int_norm_disconnected
54#undef A_int_norm_emulateintfly
55#undef A_int_norm_reselect_complete
56#undef A_int_norm_reset
57#undef A_int_norm_select_complete
58#undef A_int_test_1
59#undef A_int_test_2
60#undef A_int_test_3
61#undef A_msg_buf
62#undef A_reconnect_dsa_head
63#undef A_reselected_identify
64#undef A_reselected_tag
65#undef A_saved_dsa
66#undef A_schedule
67#undef A_test_dest
68#undef A_test_src
69#undef Ent_accept_message
70#undef Ent_cmdout_cmdout
71#undef Ent_command_complete
72#undef Ent_command_complete_msgin
73#undef Ent_data_transfer
74#undef Ent_datain_to_jump
75#undef Ent_debug_break
76#undef Ent_dsa_code_begin
77#undef Ent_dsa_code_check_reselect
78#undef Ent_dsa_code_fix_jump
79#undef Ent_dsa_code_restore_pointers
80#undef Ent_dsa_code_save_data_pointer
81#undef Ent_dsa_code_template
82#undef Ent_dsa_code_template_end
83#undef Ent_dsa_schedule
84#undef Ent_dsa_zero
85#undef Ent_end_data_transfer
86#undef Ent_initiator_abort
87#undef Ent_msg_in
88#undef Ent_msg_in_restart
89#undef Ent_other_in
90#undef Ent_other_out
91#undef Ent_other_transfer
92#undef Ent_reject_message
93#undef Ent_reselected_check_next
94#undef Ent_reselected_ok
95#undef Ent_respond_message
96#undef Ent_select
97#undef Ent_select_msgout
98#undef Ent_target_abort
99#undef Ent_test_1
100#undef Ent_test_2
101#undef Ent_test_2_msgout
102#undef Ent_wait_reselect
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile
index fc05d90229ac..51cba91cd228 100644
--- a/drivers/scsi/Makefile
+++ b/drivers/scsi/Makefile
@@ -37,7 +37,6 @@ obj-$(CONFIG_SCSI_SAS_LIBSAS) += libsas/
37 37
38obj-$(CONFIG_ISCSI_TCP) += libiscsi.o iscsi_tcp.o 38obj-$(CONFIG_ISCSI_TCP) += libiscsi.o iscsi_tcp.o
39obj-$(CONFIG_INFINIBAND_ISER) += libiscsi.o 39obj-$(CONFIG_INFINIBAND_ISER) += libiscsi.o
40obj-$(CONFIG_SCSI_AMIGA7XX) += amiga7xx.o 53c7xx.o
41obj-$(CONFIG_A3000_SCSI) += a3000.o wd33c93.o 40obj-$(CONFIG_A3000_SCSI) += a3000.o wd33c93.o
42obj-$(CONFIG_A2091_SCSI) += a2091.o wd33c93.o 41obj-$(CONFIG_A2091_SCSI) += a2091.o wd33c93.o
43obj-$(CONFIG_GVP11_SCSI) += gvp11.o wd33c93.o 42obj-$(CONFIG_GVP11_SCSI) += gvp11.o wd33c93.o
@@ -53,8 +52,6 @@ obj-$(CONFIG_ATARI_SCSI) += atari_scsi.o
53obj-$(CONFIG_MAC_SCSI) += mac_scsi.o 52obj-$(CONFIG_MAC_SCSI) += mac_scsi.o
54obj-$(CONFIG_SCSI_MAC_ESP) += mac_esp.o NCR53C9x.o 53obj-$(CONFIG_SCSI_MAC_ESP) += mac_esp.o NCR53C9x.o
55obj-$(CONFIG_SUN3_SCSI) += sun3_scsi.o sun3_scsi_vme.o 54obj-$(CONFIG_SUN3_SCSI) += sun3_scsi.o sun3_scsi_vme.o
56obj-$(CONFIG_MVME16x_SCSI) += mvme16x.o 53c7xx.o
57obj-$(CONFIG_BVME6000_SCSI) += bvme6000.o 53c7xx.o
58obj-$(CONFIG_SCSI_SIM710) += 53c700.o sim710.o 55obj-$(CONFIG_SCSI_SIM710) += 53c700.o sim710.o
59obj-$(CONFIG_SCSI_ADVANSYS) += advansys.o 56obj-$(CONFIG_SCSI_ADVANSYS) += advansys.o
60obj-$(CONFIG_SCSI_PSI240I) += psi240i.o 57obj-$(CONFIG_SCSI_PSI240I) += psi240i.o
@@ -169,10 +166,8 @@ NCR_Q720_mod-objs := NCR_Q720.o ncr53c8xx.o
169oktagon_esp_mod-objs := oktagon_esp.o oktagon_io.o 166oktagon_esp_mod-objs := oktagon_esp.o oktagon_io.o
170 167
171# Files generated that shall be removed upon make clean 168# Files generated that shall be removed upon make clean
172clean-files := 53c7xx_d.h 53c700_d.h \ 169clean-files := 53c700_d.h 53c700_u.h
173 53c7xx_u.h 53c700_u.h
174 170
175$(obj)/53c7xx.o: $(obj)/53c7xx_d.h $(obj)/53c7xx_u.h
176$(obj)/53c700.o $(MODVERDIR)/$(obj)/53c700.ver: $(obj)/53c700_d.h 171$(obj)/53c700.o $(MODVERDIR)/$(obj)/53c700.ver: $(obj)/53c700_d.h
177 172
178# If you want to play with the firmware, uncomment 173# If you want to play with the firmware, uncomment
@@ -180,11 +175,6 @@ $(obj)/53c700.o $(MODVERDIR)/$(obj)/53c700.ver: $(obj)/53c700_d.h
180 175
181ifdef GENERATE_FIRMWARE 176ifdef GENERATE_FIRMWARE
182 177
183$(obj)/53c7xx_d.h: $(src)/53c7xx.scr $(src)/script_asm.pl
184 $(CPP) -traditional -DCHIP=710 - < $< | grep -v '^#' | $(PERL) -s $(src)/script_asm.pl -ncr7x0_family $@ $(@:_d.h=_u.h)
185
186$(obj)/53c7xx_u.h: $(obj)/53c7xx_d.h
187
188$(obj)/53c700_d.h: $(src)/53c700.scr $(src)/script_asm.pl 178$(obj)/53c700_d.h: $(src)/53c700.scr $(src)/script_asm.pl
189 $(PERL) -s $(src)/script_asm.pl -ncr7x0_family $@ $(@:_d.h=_u.h) < $< 179 $(PERL) -s $(src)/script_asm.pl -ncr7x0_family $@ $(@:_d.h=_u.h) < $<
190 180
diff --git a/drivers/scsi/amiga7xx.c b/drivers/scsi/amiga7xx.c
deleted file mode 100644
index d5d3c4d5a253..000000000000
--- a/drivers/scsi/amiga7xx.c
+++ /dev/null
@@ -1,138 +0,0 @@
1/*
2 * Detection routine for the NCR53c710 based Amiga SCSI Controllers for Linux.
3 * Amiga MacroSystemUS WarpEngine SCSI controller.
4 * Amiga Technologies A4000T SCSI controller.
5 * Amiga Technologies/DKB A4091 SCSI controller.
6 *
7 * Written 1997 by Alan Hourihane <alanh@fairlite.demon.co.uk>
8 * plus modifications of the 53c7xx.c driver to support the Amiga.
9 */
10#include <linux/types.h>
11#include <linux/mm.h>
12#include <linux/blkdev.h>
13#include <linux/zorro.h>
14#include <linux/stat.h>
15
16#include <asm/setup.h>
17#include <asm/page.h>
18#include <asm/pgtable.h>
19#include <asm/amigaints.h>
20#include <asm/amigahw.h>
21#include <asm/dma.h>
22#include <asm/irq.h>
23
24#include "scsi.h"
25#include <scsi/scsi_host.h>
26#include "53c7xx.h"
27#include "amiga7xx.h"
28
29
30static int amiga7xx_register_one(struct scsi_host_template *tpnt,
31 unsigned long address)
32{
33 long long options;
34 int clock;
35
36 if (!request_mem_region(address, 0x1000, "ncr53c710"))
37 return 0;
38
39 address = (unsigned long)z_ioremap(address, 0x1000);
40 options = OPTION_MEMORY_MAPPED | OPTION_DEBUG_TEST1 | OPTION_INTFLY |
41 OPTION_SYNCHRONOUS | OPTION_ALWAYS_SYNCHRONOUS |
42 OPTION_DISCONNECT;
43 clock = 50000000; /* 50 MHz SCSI Clock */
44 ncr53c7xx_init(tpnt, 0, 710, address, 0, IRQ_AMIGA_PORTS, DMA_NONE,
45 options, clock);
46 return 1;
47}
48
49
50#ifdef CONFIG_ZORRO
51
52static struct {
53 zorro_id id;
54 unsigned long offset;
55 int absolute; /* offset is absolute address */
56} amiga7xx_table[] = {
57 { .id = ZORRO_PROD_PHASE5_BLIZZARD_603E_PLUS, .offset = 0xf40000,
58 .absolute = 1 },
59 { .id = ZORRO_PROD_MACROSYSTEMS_WARP_ENGINE_40xx, .offset = 0x40000 },
60 { .id = ZORRO_PROD_CBM_A4091_1, .offset = 0x800000 },
61 { .id = ZORRO_PROD_CBM_A4091_2, .offset = 0x800000 },
62 { .id = ZORRO_PROD_GVP_GFORCE_040_060, .offset = 0x40000 },
63 { 0 }
64};
65
66static int __init amiga7xx_zorro_detect(struct scsi_host_template *tpnt)
67{
68 int num = 0, i;
69 struct zorro_dev *z = NULL;
70 unsigned long address;
71
72 while ((z = zorro_find_device(ZORRO_WILDCARD, z))) {
73 for (i = 0; amiga7xx_table[i].id; i++)
74 if (z->id == amiga7xx_table[i].id)
75 break;
76 if (!amiga7xx_table[i].id)
77 continue;
78 if (amiga7xx_table[i].absolute)
79 address = amiga7xx_table[i].offset;
80 else
81 address = z->resource.start + amiga7xx_table[i].offset;
82 num += amiga7xx_register_one(tpnt, address);
83 }
84 return num;
85}
86
87#endif /* CONFIG_ZORRO */
88
89
90int __init amiga7xx_detect(struct scsi_host_template *tpnt)
91{
92 static unsigned char called = 0;
93 int num = 0;
94
95 if (called || !MACH_IS_AMIGA)
96 return 0;
97
98 tpnt->proc_name = "Amiga7xx";
99
100 if (AMIGAHW_PRESENT(A4000_SCSI))
101 num += amiga7xx_register_one(tpnt, 0xdd0040);
102
103#ifdef CONFIG_ZORRO
104 num += amiga7xx_zorro_detect(tpnt);
105#endif
106
107 called = 1;
108 return num;
109}
110
111static int amiga7xx_release(struct Scsi_Host *shost)
112{
113 if (shost->irq)
114 free_irq(shost->irq, NULL);
115 if (shost->dma_channel != 0xff)
116 free_dma(shost->dma_channel);
117 if (shost->io_port && shost->n_io_port)
118 release_region(shost->io_port, shost->n_io_port);
119 scsi_unregister(shost);
120 return 0;
121}
122
123static struct scsi_host_template driver_template = {
124 .name = "Amiga NCR53c710 SCSI",
125 .detect = amiga7xx_detect,
126 .release = amiga7xx_release,
127 .queuecommand = NCR53c7xx_queue_command,
128 .abort = NCR53c7xx_abort,
129 .reset = NCR53c7xx_reset,
130 .can_queue = 24,
131 .this_id = 7,
132 .sg_tablesize = 63,
133 .cmd_per_lun = 3,
134 .use_clustering = DISABLE_CLUSTERING
135};
136
137
138#include "scsi_module.c"
diff --git a/drivers/scsi/amiga7xx.h b/drivers/scsi/amiga7xx.h
deleted file mode 100644
index 7cd63a996886..000000000000
--- a/drivers/scsi/amiga7xx.h
+++ /dev/null
@@ -1,23 +0,0 @@
1#ifndef AMIGA7XX_H
2
3#include <linux/types.h>
4
5int amiga7xx_detect(struct scsi_host_template *);
6const char *NCR53c7x0_info(void);
7int NCR53c7xx_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
8int NCR53c7xx_abort(Scsi_Cmnd *);
9int NCR53c7x0_release (struct Scsi_Host *);
10int NCR53c7xx_reset(Scsi_Cmnd *, unsigned int);
11void NCR53c7x0_intr(int irq, void *dev_id);
12
13#ifndef CMD_PER_LUN
14#define CMD_PER_LUN 3
15#endif
16
17#ifndef CAN_QUEUE
18#define CAN_QUEUE 24
19#endif
20
21#include <scsi/scsicam.h>
22
23#endif /* AMIGA7XX_H */
diff --git a/drivers/scsi/bvme6000.c b/drivers/scsi/bvme6000.c
deleted file mode 100644
index 599b400a3c43..000000000000
--- a/drivers/scsi/bvme6000.c
+++ /dev/null
@@ -1,76 +0,0 @@
1/*
2 * Detection routine for the NCR53c710 based BVME6000 SCSI Controllers for Linux.
3 *
4 * Based on work by Alan Hourihane
5 */
6#include <linux/types.h>
7#include <linux/mm.h>
8#include <linux/blkdev.h>
9#include <linux/zorro.h>
10
11#include <asm/setup.h>
12#include <asm/page.h>
13#include <asm/pgtable.h>
14#include <asm/bvme6000hw.h>
15#include <asm/irq.h>
16
17#include "scsi.h"
18#include <scsi/scsi_host.h>
19#include "53c7xx.h"
20#include "bvme6000.h"
21
22#include<linux/stat.h>
23
24
25int bvme6000_scsi_detect(struct scsi_host_template *tpnt)
26{
27 static unsigned char called = 0;
28 int clock;
29 long long options;
30
31 if (called)
32 return 0;
33 if (!MACH_IS_BVME6000)
34 return 0;
35
36 tpnt->proc_name = "BVME6000";
37
38 options = OPTION_MEMORY_MAPPED|OPTION_DEBUG_TEST1|OPTION_INTFLY|OPTION_SYNCHRONOUS|OPTION_ALWAYS_SYNCHRONOUS|OPTION_DISCONNECT;
39
40 clock = 40000000; /* 66MHz SCSI Clock */
41
42 ncr53c7xx_init(tpnt, 0, 710, (unsigned long)BVME_NCR53C710_BASE,
43 0, BVME_IRQ_SCSI, DMA_NONE,
44 options, clock);
45 called = 1;
46 return 1;
47}
48
49static int bvme6000_scsi_release(struct Scsi_Host *shost)
50{
51 if (shost->irq)
52 free_irq(shost->irq, NULL);
53 if (shost->dma_channel != 0xff)
54 free_dma(shost->dma_channel);
55 if (shost->io_port && shost->n_io_port)
56 release_region(shost->io_port, shost->n_io_port);
57 scsi_unregister(shost);
58 return 0;
59}
60
61static struct scsi_host_template driver_template = {
62 .name = "BVME6000 NCR53c710 SCSI",
63 .detect = bvme6000_scsi_detect,
64 .release = bvme6000_scsi_release,
65 .queuecommand = NCR53c7xx_queue_command,
66 .abort = NCR53c7xx_abort,
67 .reset = NCR53c7xx_reset,
68 .can_queue = 24,
69 .this_id = 7,
70 .sg_tablesize = 63,
71 .cmd_per_lun = 3,
72 .use_clustering = DISABLE_CLUSTERING
73};
74
75
76#include "scsi_module.c"
diff --git a/drivers/scsi/bvme6000.h b/drivers/scsi/bvme6000.h
deleted file mode 100644
index ea3e4b2b9220..000000000000
--- a/drivers/scsi/bvme6000.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef BVME6000_SCSI_H
2#define BVME6000_SCSI_H
3
4#include <linux/types.h>
5
6int bvme6000_scsi_detect(struct scsi_host_template *);
7const char *NCR53c7x0_info(void);
8int NCR53c7xx_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
9int NCR53c7xx_abort(Scsi_Cmnd *);
10int NCR53c7x0_release (struct Scsi_Host *);
11int NCR53c7xx_reset(Scsi_Cmnd *, unsigned int);
12void NCR53c7x0_intr(int irq, void *dev_id);
13
14#ifndef CMD_PER_LUN
15#define CMD_PER_LUN 3
16#endif
17
18#ifndef CAN_QUEUE
19#define CAN_QUEUE 24
20#endif
21
22#include <scsi/scsicam.h>
23
24#endif /* BVME6000_SCSI_H */
diff --git a/drivers/scsi/mvme16x.c b/drivers/scsi/mvme16x.c
deleted file mode 100644
index 575fe6f7e0ec..000000000000
--- a/drivers/scsi/mvme16x.c
+++ /dev/null
@@ -1,78 +0,0 @@
1/*
2 * Detection routine for the NCR53c710 based MVME16x SCSI Controllers for Linux.
3 *
4 * Based on work by Alan Hourihane
5 */
6#include <linux/types.h>
7#include <linux/mm.h>
8#include <linux/blkdev.h>
9
10#include <asm/page.h>
11#include <asm/pgtable.h>
12#include <asm/mvme16xhw.h>
13#include <asm/irq.h>
14
15#include "scsi.h"
16#include <scsi/scsi_host.h>
17#include "53c7xx.h"
18#include "mvme16x.h"
19
20#include<linux/stat.h>
21
22
23int mvme16x_scsi_detect(struct scsi_host_template *tpnt)
24{
25 static unsigned char called = 0;
26 int clock;
27 long long options;
28
29 if (!MACH_IS_MVME16x)
30 return 0;
31 if (mvme16x_config & MVME16x_CONFIG_NO_SCSICHIP) {
32 printk ("SCSI detection disabled, SCSI chip not present\n");
33 return 0;
34 }
35 if (called)
36 return 0;
37
38 tpnt->proc_name = "MVME16x";
39
40 options = OPTION_MEMORY_MAPPED|OPTION_DEBUG_TEST1|OPTION_INTFLY|OPTION_SYNCHRONOUS|OPTION_ALWAYS_SYNCHRONOUS|OPTION_DISCONNECT;
41
42 clock = 66000000; /* 66MHz SCSI Clock */
43
44 ncr53c7xx_init(tpnt, 0, 710, (unsigned long)0xfff47000,
45 0, MVME16x_IRQ_SCSI, DMA_NONE,
46 options, clock);
47 called = 1;
48 return 1;
49}
50
51static int mvme16x_scsi_release(struct Scsi_Host *shost)
52{
53 if (shost->irq)
54 free_irq(shost->irq, NULL);
55 if (shost->dma_channel != 0xff)
56 free_dma(shost->dma_channel);
57 if (shost->io_port && shost->n_io_port)
58 release_region(shost->io_port, shost->n_io_port);
59 scsi_unregister(shost);
60 return 0;
61}
62
63static struct scsi_host_template driver_template = {
64 .name = "MVME16x NCR53c710 SCSI",
65 .detect = mvme16x_scsi_detect,
66 .release = mvme16x_scsi_release,
67 .queuecommand = NCR53c7xx_queue_command,
68 .abort = NCR53c7xx_abort,
69 .reset = NCR53c7xx_reset,
70 .can_queue = 24,
71 .this_id = 7,
72 .sg_tablesize = 63,
73 .cmd_per_lun = 3,
74 .use_clustering = DISABLE_CLUSTERING
75};
76
77
78#include "scsi_module.c"
diff --git a/drivers/scsi/mvme16x.h b/drivers/scsi/mvme16x.h
deleted file mode 100644
index 73e33b37a3f8..000000000000
--- a/drivers/scsi/mvme16x.h
+++ /dev/null
@@ -1,24 +0,0 @@
1#ifndef MVME16x_SCSI_H
2#define MVME16x_SCSI_H
3
4#include <linux/types.h>
5
6int mvme16x_scsi_detect(struct scsi_host_template *);
7const char *NCR53c7x0_info(void);
8int NCR53c7xx_queue_command(Scsi_Cmnd *, void (*done)(Scsi_Cmnd *));
9int NCR53c7xx_abort(Scsi_Cmnd *);
10int NCR53c7x0_release (struct Scsi_Host *);
11int NCR53c7xx_reset(Scsi_Cmnd *, unsigned int);
12void NCR53c7x0_intr(int irq, void *dev_id);
13
14#ifndef CMD_PER_LUN
15#define CMD_PER_LUN 3
16#endif
17
18#ifndef CAN_QUEUE
19#define CAN_QUEUE 24
20#endif
21
22#include <scsi/scsicam.h>
23
24#endif /* MVME16x_SCSI_H */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-12 04:00:35 -0500