diff options
708 files changed, 34578 insertions, 8732 deletions
diff --git a/.gitignore b/.gitignore index 946c7ec5c922..fb2190c61af0 100644 --- a/.gitignore +++ b/.gitignore | |||
@@ -22,6 +22,7 @@ | |||
22 | *.lst | 22 | *.lst |
23 | *.symtypes | 23 | *.symtypes |
24 | *.order | 24 | *.order |
25 | modules.builtin | ||
25 | *.elf | 26 | *.elf |
26 | *.bin | 27 | *.bin |
27 | *.gz | 28 | *.gz |
@@ -45,14 +46,8 @@ Module.symvers | |||
45 | # | 46 | # |
46 | # Generated include files | 47 | # Generated include files |
47 | # | 48 | # |
48 | include/asm | ||
49 | include/asm-*/asm-offsets.h | ||
50 | include/config | 49 | include/config |
51 | include/linux/autoconf.h | ||
52 | include/linux/compile.h | ||
53 | include/linux/version.h | 50 | include/linux/version.h |
54 | include/linux/utsrelease.h | ||
55 | include/linux/bounds.h | ||
56 | include/generated | 51 | include/generated |
57 | 52 | ||
58 | # stgit generated dirs | 53 | # stgit generated dirs |
diff --git a/Documentation/cpu-hotplug.txt b/Documentation/cpu-hotplug.txt index 4d4a644b505e..a99d7031cdf9 100644 --- a/Documentation/cpu-hotplug.txt +++ b/Documentation/cpu-hotplug.txt | |||
@@ -315,41 +315,26 @@ A: The following are what is required for CPU hotplug infrastructure to work | |||
315 | 315 | ||
316 | Q: I need to ensure that a particular cpu is not removed when there is some | 316 | Q: I need to ensure that a particular cpu is not removed when there is some |
317 | work specific to this cpu is in progress. | 317 | work specific to this cpu is in progress. |
318 | A: First switch the current thread context to preferred cpu | 318 | A: There are two ways. If your code can be run in interrupt context, use |
319 | smp_call_function_single(), otherwise use work_on_cpu(). Note that | ||
320 | work_on_cpu() is slow, and can fail due to out of memory: | ||
319 | 321 | ||
320 | int my_func_on_cpu(int cpu) | 322 | int my_func_on_cpu(int cpu) |
321 | { | 323 | { |
322 | cpumask_t saved_mask, new_mask = CPU_MASK_NONE; | 324 | int err; |
323 | int curr_cpu, err = 0; | 325 | get_online_cpus(); |
324 | 326 | if (!cpu_online(cpu)) | |
325 | saved_mask = current->cpus_allowed; | 327 | err = -EINVAL; |
326 | cpu_set(cpu, new_mask); | 328 | else |
327 | err = set_cpus_allowed(current, new_mask); | 329 | #if NEEDS_BLOCKING |
328 | 330 | err = work_on_cpu(cpu, __my_func_on_cpu, NULL); | |
329 | if (err) | 331 | #else |
330 | return err; | 332 | smp_call_function_single(cpu, __my_func_on_cpu, &err, |
331 | 333 | true); | |
332 | /* | 334 | #endif |
333 | * If we got scheduled out just after the return from | 335 | put_online_cpus(); |
334 | * set_cpus_allowed() before running the work, this ensures | 336 | return err; |
335 | * we stay locked. | 337 | } |
336 | */ | ||
337 | curr_cpu = get_cpu(); | ||
338 | |||
339 | if (curr_cpu != cpu) { | ||
340 | err = -EAGAIN; | ||
341 | goto ret; | ||
342 | } else { | ||
343 | /* | ||
344 | * Do work : But cant sleep, since get_cpu() disables preempt | ||
345 | */ | ||
346 | } | ||
347 | ret: | ||
348 | put_cpu(); | ||
349 | set_cpus_allowed(current, saved_mask); | ||
350 | return err; | ||
351 | } | ||
352 | |||
353 | 338 | ||
354 | Q: How do we determine how many CPUs are available for hotplug. | 339 | Q: How do we determine how many CPUs are available for hotplug. |
355 | A: There is no clear spec defined way from ACPI that can give us that | 340 | A: There is no clear spec defined way from ACPI that can give us that |
diff --git a/Documentation/dontdiff b/Documentation/dontdiff index e151b2a36267..3ad6acead949 100644 --- a/Documentation/dontdiff +++ b/Documentation/dontdiff | |||
@@ -103,6 +103,7 @@ gconf | |||
103 | gen-devlist | 103 | gen-devlist |
104 | gen_crc32table | 104 | gen_crc32table |
105 | gen_init_cpio | 105 | gen_init_cpio |
106 | generated | ||
106 | genheaders | 107 | genheaders |
107 | genksyms | 108 | genksyms |
108 | *_gray256.c | 109 | *_gray256.c |
diff --git a/Documentation/hwmon/k10temp b/Documentation/hwmon/k10temp new file mode 100644 index 000000000000..a7a18d453a51 --- /dev/null +++ b/Documentation/hwmon/k10temp | |||
@@ -0,0 +1,60 @@ | |||
1 | Kernel driver k10temp | ||
2 | ===================== | ||
3 | |||
4 | Supported chips: | ||
5 | * AMD Family 10h processors: | ||
6 | Socket F: Quad-Core/Six-Core/Embedded Opteron | ||
7 | Socket AM2+: Opteron, Phenom (II) X3/X4 | ||
8 | Socket AM3: Quad-Core Opteron, Athlon/Phenom II X2/X3/X4, Sempron II | ||
9 | Socket S1G3: Athlon II, Sempron, Turion II | ||
10 | * AMD Family 11h processors: | ||
11 | Socket S1G2: Athlon (X2), Sempron (X2), Turion X2 (Ultra) | ||
12 | |||
13 | Prefix: 'k10temp' | ||
14 | Addresses scanned: PCI space | ||
15 | Datasheets: | ||
16 | BIOS and Kernel Developer's Guide (BKDG) For AMD Family 10h Processors: | ||
17 | http://support.amd.com/us/Processor_TechDocs/31116.pdf | ||
18 | BIOS and Kernel Developer's Guide (BKDG) for AMD Family 11h Processors: | ||
19 | http://support.amd.com/us/Processor_TechDocs/41256.pdf | ||
20 | Revision Guide for AMD Family 10h Processors: | ||
21 | http://support.amd.com/us/Processor_TechDocs/41322.pdf | ||
22 | Revision Guide for AMD Family 11h Processors: | ||
23 | http://support.amd.com/us/Processor_TechDocs/41788.pdf | ||
24 | AMD Family 11h Processor Power and Thermal Data Sheet for Notebooks: | ||
25 | http://support.amd.com/us/Processor_TechDocs/43373.pdf | ||
26 | AMD Family 10h Server and Workstation Processor Power and Thermal Data Sheet: | ||
27 | http://support.amd.com/us/Processor_TechDocs/43374.pdf | ||
28 | AMD Family 10h Desktop Processor Power and Thermal Data Sheet: | ||
29 | http://support.amd.com/us/Processor_TechDocs/43375.pdf | ||
30 | |||
31 | Author: Clemens Ladisch <clemens@ladisch.de> | ||
32 | |||
33 | Description | ||
34 | ----------- | ||
35 | |||
36 | This driver permits reading of the internal temperature sensor of AMD | ||
37 | Family 10h and 11h processors. | ||
38 | |||
39 | All these processors have a sensor, but on older revisions of Family 10h | ||
40 | processors, the sensor may return inconsistent values (erratum 319). The | ||
41 | driver will refuse to load on these revisions unless you specify the | ||
42 | "force=1" module parameter. | ||
43 | |||
44 | There is one temperature measurement value, available as temp1_input in | ||
45 | sysfs. It is measured in degrees Celsius with a resolution of 1/8th degree. | ||
46 | Please note that it is defined as a relative value; to quote the AMD manual: | ||
47 | |||
48 | Tctl is the processor temperature control value, used by the platform to | ||
49 | control cooling systems. Tctl is a non-physical temperature on an | ||
50 | arbitrary scale measured in degrees. It does _not_ represent an actual | ||
51 | physical temperature like die or case temperature. Instead, it specifies | ||
52 | the processor temperature relative to the point at which the system must | ||
53 | supply the maximum cooling for the processor's specified maximum case | ||
54 | temperature and maximum thermal power dissipation. | ||
55 | |||
56 | The maximum value for Tctl is available in the file temp1_max. | ||
57 | |||
58 | If the BIOS has enabled hardware temperature control, the threshold at | ||
59 | which the processor will throttle itself to avoid damage is available in | ||
60 | temp1_crit and temp1_crit_hyst. | ||
diff --git a/Documentation/kbuild/kbuild.txt b/Documentation/kbuild/kbuild.txt index bb3bf38f03da..6f8c1cabbc5d 100644 --- a/Documentation/kbuild/kbuild.txt +++ b/Documentation/kbuild/kbuild.txt | |||
@@ -1,3 +1,17 @@ | |||
1 | Output files | ||
2 | |||
3 | modules.order | ||
4 | -------------------------------------------------- | ||
5 | This file records the order in which modules appear in Makefiles. This | ||
6 | is used by modprobe to deterministically resolve aliases that match | ||
7 | multiple modules. | ||
8 | |||
9 | modules.builtin | ||
10 | -------------------------------------------------- | ||
11 | This file lists all modules that are built into the kernel. This is used | ||
12 | by modprobe to not fail when trying to load something builtin. | ||
13 | |||
14 | |||
1 | Environment variables | 15 | Environment variables |
2 | 16 | ||
3 | KCPPFLAGS | 17 | KCPPFLAGS |
diff --git a/Documentation/kbuild/kconfig.txt b/Documentation/kbuild/kconfig.txt index 849b5e56d06f..49efae703979 100644 --- a/Documentation/kbuild/kconfig.txt +++ b/Documentation/kbuild/kconfig.txt | |||
@@ -103,10 +103,16 @@ KCONFIG_AUTOCONFIG | |||
103 | This environment variable can be set to specify the path & name of the | 103 | This environment variable can be set to specify the path & name of the |
104 | "auto.conf" file. Its default value is "include/config/auto.conf". | 104 | "auto.conf" file. Its default value is "include/config/auto.conf". |
105 | 105 | ||
106 | KCONFIG_TRISTATE | ||
107 | -------------------------------------------------- | ||
108 | This environment variable can be set to specify the path & name of the | ||
109 | "tristate.conf" file. Its default value is "include/config/tristate.conf". | ||
110 | |||
106 | KCONFIG_AUTOHEADER | 111 | KCONFIG_AUTOHEADER |
107 | -------------------------------------------------- | 112 | -------------------------------------------------- |
108 | This environment variable can be set to specify the path & name of the | 113 | This environment variable can be set to specify the path & name of the |
109 | "autoconf.h" (header) file. Its default value is "include/linux/autoconf.h". | 114 | "autoconf.h" (header) file. |
115 | Its default value is "include/generated/autoconf.h". | ||
110 | 116 | ||
111 | 117 | ||
112 | ====================================================================== | 118 | ====================================================================== |
@@ -8,7 +8,7 @@ | |||
8 | ##### | 8 | ##### |
9 | # 1) Generate bounds.h | 9 | # 1) Generate bounds.h |
10 | 10 | ||
11 | bounds-file := include/linux/bounds.h | 11 | bounds-file := include/generated/bounds.h |
12 | 12 | ||
13 | always := $(bounds-file) | 13 | always := $(bounds-file) |
14 | targets := $(bounds-file) kernel/bounds.s | 14 | targets := $(bounds-file) kernel/bounds.s |
@@ -43,7 +43,7 @@ $(obj)/$(bounds-file): kernel/bounds.s Kbuild | |||
43 | # 2) Generate asm-offsets.h | 43 | # 2) Generate asm-offsets.h |
44 | # | 44 | # |
45 | 45 | ||
46 | offsets-file := include/asm/asm-offsets.h | 46 | offsets-file := include/generated/asm-offsets.h |
47 | 47 | ||
48 | always += $(offsets-file) | 48 | always += $(offsets-file) |
49 | targets += $(offsets-file) | 49 | targets += $(offsets-file) |
diff --git a/MAINTAINERS b/MAINTAINERS index 0699782f8c5b..efd2ef2c2660 100644 --- a/MAINTAINERS +++ b/MAINTAINERS | |||
@@ -5434,6 +5434,12 @@ F: drivers/uwb/* | |||
5434 | F: include/linux/uwb.h | 5434 | F: include/linux/uwb.h |
5435 | F: include/linux/uwb/ | 5435 | F: include/linux/uwb/ |
5436 | 5436 | ||
5437 | UNIFDEF | ||
5438 | M: Tony Finch <dot@dotat.at> | ||
5439 | W: http://dotat.at/prog/unifdef | ||
5440 | S: Maintained | ||
5441 | F: scripts/unifdef.c | ||
5442 | |||
5437 | UNIFORM CDROM DRIVER | 5443 | UNIFORM CDROM DRIVER |
5438 | M: Jens Axboe <axboe@kernel.dk> | 5444 | M: Jens Axboe <axboe@kernel.dk> |
5439 | W: http://www.kernel.dk | 5445 | W: http://www.kernel.dk |
@@ -1,7 +1,7 @@ | |||
1 | VERSION = 2 | 1 | VERSION = 2 |
2 | PATCHLEVEL = 6 | 2 | PATCHLEVEL = 6 |
3 | SUBLEVEL = 32 | 3 | SUBLEVEL = 33 |
4 | EXTRAVERSION = | 4 | EXTRAVERSION = -rc1 |
5 | NAME = Man-Eating Seals of Antiquity | 5 | NAME = Man-Eating Seals of Antiquity |
6 | 6 | ||
7 | # *DOCUMENTATION* | 7 | # *DOCUMENTATION* |
@@ -16,6 +16,13 @@ NAME = Man-Eating Seals of Antiquity | |||
16 | # o print "Entering directory ..."; | 16 | # o print "Entering directory ..."; |
17 | MAKEFLAGS += -rR --no-print-directory | 17 | MAKEFLAGS += -rR --no-print-directory |
18 | 18 | ||
19 | # Avoid funny character set dependencies | ||
20 | unexport LC_ALL | ||
21 | LC_CTYPE=C | ||
22 | LC_COLLATE=C | ||
23 | LC_NUMERIC=C | ||
24 | export LC_CTYPE LC_COLLATE LC_NUMERIC | ||
25 | |||
19 | # We are using a recursive build, so we need to do a little thinking | 26 | # We are using a recursive build, so we need to do a little thinking |
20 | # to get the ordering right. | 27 | # to get the ordering right. |
21 | # | 28 | # |
@@ -334,10 +341,9 @@ CFLAGS_GCOV = -fprofile-arcs -ftest-coverage | |||
334 | 341 | ||
335 | # Use LINUXINCLUDE when you must reference the include/ directory. | 342 | # Use LINUXINCLUDE when you must reference the include/ directory. |
336 | # Needed to be compatible with the O= option | 343 | # Needed to be compatible with the O= option |
337 | LINUXINCLUDE := -Iinclude \ | 344 | LINUXINCLUDE := -I$(srctree)/arch/$(hdr-arch)/include -Iinclude \ |
338 | $(if $(KBUILD_SRC),-Iinclude2 -I$(srctree)/include) \ | 345 | $(if $(KBUILD_SRC), -I$(srctree)/include) \ |
339 | -I$(srctree)/arch/$(hdr-arch)/include \ | 346 | -include include/generated/autoconf.h |
340 | -include include/linux/autoconf.h | ||
341 | 347 | ||
342 | KBUILD_CPPFLAGS := -D__KERNEL__ | 348 | KBUILD_CPPFLAGS := -D__KERNEL__ |
343 | 349 | ||
@@ -465,7 +471,7 @@ ifeq ($(KBUILD_EXTMOD),) | |||
465 | # Carefully list dependencies so we do not try to build scripts twice | 471 | # Carefully list dependencies so we do not try to build scripts twice |
466 | # in parallel | 472 | # in parallel |
467 | PHONY += scripts | 473 | PHONY += scripts |
468 | scripts: scripts_basic include/config/auto.conf | 474 | scripts: scripts_basic include/config/auto.conf include/config/tristate.conf |
469 | $(Q)$(MAKE) $(build)=$(@) | 475 | $(Q)$(MAKE) $(build)=$(@) |
470 | 476 | ||
471 | # Objects we will link into vmlinux / subdirs we need to visit | 477 | # Objects we will link into vmlinux / subdirs we need to visit |
@@ -492,18 +498,18 @@ $(KCONFIG_CONFIG) include/config/auto.conf.cmd: ; | |||
492 | # with it and forgot to run make oldconfig. | 498 | # with it and forgot to run make oldconfig. |
493 | # if auto.conf.cmd is missing then we are probably in a cleaned tree so | 499 | # if auto.conf.cmd is missing then we are probably in a cleaned tree so |
494 | # we execute the config step to be sure to catch updated Kconfig files | 500 | # we execute the config step to be sure to catch updated Kconfig files |
495 | include/config/auto.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd | 501 | include/config/%.conf: $(KCONFIG_CONFIG) include/config/auto.conf.cmd |
496 | $(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig | 502 | $(Q)$(MAKE) -f $(srctree)/Makefile silentoldconfig |
497 | else | 503 | else |
498 | # external modules needs include/linux/autoconf.h and include/config/auto.conf | 504 | # external modules needs include/generated/autoconf.h and include/config/auto.conf |
499 | # but do not care if they are up-to-date. Use auto.conf to trigger the test | 505 | # but do not care if they are up-to-date. Use auto.conf to trigger the test |
500 | PHONY += include/config/auto.conf | 506 | PHONY += include/config/auto.conf |
501 | 507 | ||
502 | include/config/auto.conf: | 508 | include/config/auto.conf: |
503 | $(Q)test -e include/linux/autoconf.h -a -e $@ || ( \ | 509 | $(Q)test -e include/generated/autoconf.h -a -e $@ || ( \ |
504 | echo; \ | 510 | echo; \ |
505 | echo " ERROR: Kernel configuration is invalid."; \ | 511 | echo " ERROR: Kernel configuration is invalid."; \ |
506 | echo " include/linux/autoconf.h or $@ are missing."; \ | 512 | echo " include/generated/autoconf.h or $@ are missing.";\ |
507 | echo " Run 'make oldconfig && make prepare' on kernel src to fix it."; \ | 513 | echo " Run 'make oldconfig && make prepare' on kernel src to fix it."; \ |
508 | echo; \ | 514 | echo; \ |
509 | /bin/false) | 515 | /bin/false) |
@@ -877,6 +883,9 @@ $(sort $(vmlinux-init) $(vmlinux-main)) $(vmlinux-lds): $(vmlinux-dirs) ; | |||
877 | PHONY += $(vmlinux-dirs) | 883 | PHONY += $(vmlinux-dirs) |
878 | $(vmlinux-dirs): prepare scripts | 884 | $(vmlinux-dirs): prepare scripts |
879 | $(Q)$(MAKE) $(build)=$@ | 885 | $(Q)$(MAKE) $(build)=$@ |
886 | ifdef CONFIG_MODULES | ||
887 | $(Q)$(MAKE) $(modbuiltin)=$@ | ||
888 | endif | ||
880 | 889 | ||
881 | # Build the kernel release string | 890 | # Build the kernel release string |
882 | # | 891 | # |
@@ -955,7 +964,6 @@ PHONY += prepare archprepare prepare0 prepare1 prepare2 prepare3 | |||
955 | # prepare3 is used to check if we are building in a separate output directory, | 964 | # prepare3 is used to check if we are building in a separate output directory, |
956 | # and if so do: | 965 | # and if so do: |
957 | # 1) Check that make has not been executed in the kernel src $(srctree) | 966 | # 1) Check that make has not been executed in the kernel src $(srctree) |
958 | # 2) Create the include2 directory, used for the second asm symlink | ||
959 | prepare3: include/config/kernel.release | 967 | prepare3: include/config/kernel.release |
960 | ifneq ($(KBUILD_SRC),) | 968 | ifneq ($(KBUILD_SRC),) |
961 | @$(kecho) ' Using $(srctree) as source for kernel' | 969 | @$(kecho) ' Using $(srctree) as source for kernel' |
@@ -964,17 +972,13 @@ ifneq ($(KBUILD_SRC),) | |||
964 | echo " in the '$(srctree)' directory.";\ | 972 | echo " in the '$(srctree)' directory.";\ |
965 | /bin/false; \ | 973 | /bin/false; \ |
966 | fi; | 974 | fi; |
967 | $(Q)if [ ! -d include2 ]; then \ | ||
968 | mkdir -p include2; \ | ||
969 | ln -fsn $(srctree)/include/asm-$(SRCARCH) include2/asm; \ | ||
970 | fi | ||
971 | endif | 975 | endif |
972 | 976 | ||
973 | # prepare2 creates a makefile if using a separate output directory | 977 | # prepare2 creates a makefile if using a separate output directory |
974 | prepare2: prepare3 outputmakefile | 978 | prepare2: prepare3 outputmakefile |
975 | 979 | ||
976 | prepare1: prepare2 include/linux/version.h include/linux/utsrelease.h \ | 980 | prepare1: prepare2 include/linux/version.h include/generated/utsrelease.h \ |
977 | include/asm include/config/auto.conf | 981 | include/config/auto.conf |
978 | $(cmd_crmodverdir) | 982 | $(cmd_crmodverdir) |
979 | 983 | ||
980 | archprepare: prepare1 scripts_basic | 984 | archprepare: prepare1 scripts_basic |
@@ -986,42 +990,6 @@ prepare0: archprepare FORCE | |||
986 | # All the preparing.. | 990 | # All the preparing.. |
987 | prepare: prepare0 | 991 | prepare: prepare0 |
988 | 992 | ||
989 | # The asm symlink changes when $(ARCH) changes. | ||
990 | # Detect this and ask user to run make mrproper | ||
991 | # If asm is a stale symlink (point to dir that does not exist) remove it | ||
992 | define check-symlink | ||
993 | set -e; \ | ||
994 | if [ -L include/asm ]; then \ | ||
995 | asmlink=`readlink include/asm | cut -d '-' -f 2`; \ | ||
996 | if [ "$$asmlink" != "$(SRCARCH)" ]; then \ | ||
997 | echo "ERROR: the symlink $@ points to asm-$$asmlink but asm-$(SRCARCH) was expected"; \ | ||
998 | echo " set ARCH or save .config and run 'make mrproper' to fix it"; \ | ||
999 | exit 1; \ | ||
1000 | fi; \ | ||
1001 | test -e $$asmlink || rm include/asm; \ | ||
1002 | elif [ -d include/asm ]; then \ | ||
1003 | echo "ERROR: $@ is a directory but a symlink was expected";\ | ||
1004 | exit 1; \ | ||
1005 | fi | ||
1006 | endef | ||
1007 | |||
1008 | # We create the target directory of the symlink if it does | ||
1009 | # not exist so the test in check-symlink works and we have a | ||
1010 | # directory for generated filesas used by some architectures. | ||
1011 | define create-symlink | ||
1012 | if [ ! -L include/asm ]; then \ | ||
1013 | $(kecho) ' SYMLINK $@ -> include/asm-$(SRCARCH)'; \ | ||
1014 | if [ ! -d include/asm-$(SRCARCH) ]; then \ | ||
1015 | mkdir -p include/asm-$(SRCARCH); \ | ||
1016 | fi; \ | ||
1017 | ln -fsn asm-$(SRCARCH) $@; \ | ||
1018 | fi | ||
1019 | endef | ||
1020 | |||
1021 | include/asm: FORCE | ||
1022 | $(Q)$(check-symlink) | ||
1023 | $(Q)$(create-symlink) | ||
1024 | |||
1025 | # Generate some files | 993 | # Generate some files |
1026 | # --------------------------------------------------------------------------- | 994 | # --------------------------------------------------------------------------- |
1027 | 995 | ||
@@ -1046,7 +1014,7 @@ endef | |||
1046 | include/linux/version.h: $(srctree)/Makefile FORCE | 1014 | include/linux/version.h: $(srctree)/Makefile FORCE |
1047 | $(call filechk,version.h) | 1015 | $(call filechk,version.h) |
1048 | 1016 | ||
1049 | include/linux/utsrelease.h: include/config/kernel.release FORCE | 1017 | include/generated/utsrelease.h: include/config/kernel.release FORCE |
1050 | $(call filechk,utsrelease.h) | 1018 | $(call filechk,utsrelease.h) |
1051 | 1019 | ||
1052 | PHONY += headerdep | 1020 | PHONY += headerdep |
@@ -1076,11 +1044,6 @@ firmware_install: FORCE | |||
1076 | export INSTALL_HDR_PATH = $(objtree)/usr | 1044 | export INSTALL_HDR_PATH = $(objtree)/usr |
1077 | 1045 | ||
1078 | hdr-inst := -rR -f $(srctree)/scripts/Makefile.headersinst obj | 1046 | hdr-inst := -rR -f $(srctree)/scripts/Makefile.headersinst obj |
1079 | # Find out where the Kbuild file is located to support | ||
1080 | # arch/$(ARCH)/include/asm | ||
1081 | hdr-dir = $(strip \ | ||
1082 | $(if $(wildcard $(srctree)/arch/$(hdr-arch)/include/asm/Kbuild), \ | ||
1083 | arch/$(hdr-arch)/include/asm, include/asm-$(hdr-arch))) | ||
1084 | 1047 | ||
1085 | # If we do an all arch process set dst to asm-$(hdr-arch) | 1048 | # If we do an all arch process set dst to asm-$(hdr-arch) |
1086 | hdr-dst = $(if $(KBUILD_HEADERS), dst=include/asm-$(hdr-arch), dst=include/asm) | 1049 | hdr-dst = $(if $(KBUILD_HEADERS), dst=include/asm-$(hdr-arch), dst=include/asm) |
@@ -1095,10 +1058,10 @@ headers_install_all: | |||
1095 | 1058 | ||
1096 | PHONY += headers_install | 1059 | PHONY += headers_install |
1097 | headers_install: __headers | 1060 | headers_install: __headers |
1098 | $(if $(wildcard $(srctree)/$(hdr-dir)/Kbuild),, \ | 1061 | $(if $(wildcard $(srctree)/arch/$(hdr-arch)/include/asm/Kbuild),, \ |
1099 | $(error Headers not exportable for the $(SRCARCH) architecture)) | 1062 | $(error Headers not exportable for the $(SRCARCH) architecture)) |
1100 | $(Q)$(MAKE) $(hdr-inst)=include | 1063 | $(Q)$(MAKE) $(hdr-inst)=include |
1101 | $(Q)$(MAKE) $(hdr-inst)=$(hdr-dir) $(hdr-dst) | 1064 | $(Q)$(MAKE) $(hdr-inst)=arch/$(hdr-arch)/include/asm $(hdr-dst) |
1102 | 1065 | ||
1103 | PHONY += headers_check_all | 1066 | PHONY += headers_check_all |
1104 | headers_check_all: headers_install_all | 1067 | headers_check_all: headers_install_all |
@@ -1107,7 +1070,7 @@ headers_check_all: headers_install_all | |||
1107 | PHONY += headers_check | 1070 | PHONY += headers_check |
1108 | headers_check: headers_install | 1071 | headers_check: headers_install |
1109 | $(Q)$(MAKE) $(hdr-inst)=include HDRCHECK=1 | 1072 | $(Q)$(MAKE) $(hdr-inst)=include HDRCHECK=1 |
1110 | $(Q)$(MAKE) $(hdr-inst)=$(hdr-dir) $(hdr-dst) HDRCHECK=1 | 1073 | $(Q)$(MAKE) $(hdr-inst)=arch/$(hdr-arch)/include/asm $(hdr-dst) HDRCHECK=1 |
1111 | 1074 | ||
1112 | # --------------------------------------------------------------------------- | 1075 | # --------------------------------------------------------------------------- |
1113 | # Modules | 1076 | # Modules |
@@ -1127,6 +1090,7 @@ all: modules | |||
1127 | PHONY += modules | 1090 | PHONY += modules |
1128 | modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) | 1091 | modules: $(vmlinux-dirs) $(if $(KBUILD_BUILTIN),vmlinux) |
1129 | $(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.order) > $(objtree)/modules.order | 1092 | $(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.order) > $(objtree)/modules.order |
1093 | $(Q)$(AWK) '!x[$$0]++' $(vmlinux-dirs:%=$(objtree)/%/modules.builtin) > $(objtree)/modules.builtin | ||
1130 | @$(kecho) ' Building modules, stage 2.'; | 1094 | @$(kecho) ' Building modules, stage 2.'; |
1131 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost | 1095 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modpost |
1132 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild | 1096 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.fwinst obj=firmware __fw_modbuild |
@@ -1156,6 +1120,7 @@ _modinst_: | |||
1156 | ln -s $(objtree) $(MODLIB)/build ; \ | 1120 | ln -s $(objtree) $(MODLIB)/build ; \ |
1157 | fi | 1121 | fi |
1158 | @cp -f $(objtree)/modules.order $(MODLIB)/ | 1122 | @cp -f $(objtree)/modules.order $(MODLIB)/ |
1123 | @cp -f $(objtree)/modules.builtin $(MODLIB)/ | ||
1159 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst | 1124 | $(Q)$(MAKE) -f $(srctree)/scripts/Makefile.modinst |
1160 | 1125 | ||
1161 | # This depmod is only for convenience to give the initial | 1126 | # This depmod is only for convenience to give the initial |
@@ -1194,12 +1159,10 @@ CLEAN_FILES += vmlinux System.map \ | |||
1194 | .tmp_kallsyms* .tmp_version .tmp_vmlinux* .tmp_System.map | 1159 | .tmp_kallsyms* .tmp_version .tmp_vmlinux* .tmp_System.map |
1195 | 1160 | ||
1196 | # Directories & files removed with 'make mrproper' | 1161 | # Directories & files removed with 'make mrproper' |
1197 | MRPROPER_DIRS += include/config include2 usr/include include/generated | 1162 | MRPROPER_DIRS += include/config usr/include include/generated |
1198 | MRPROPER_FILES += .config .config.old include/asm .version .old_version \ | 1163 | MRPROPER_FILES += .config .config.old .version .old_version \ |
1199 | include/linux/autoconf.h include/linux/version.h \ | 1164 | include/linux/version.h \ |
1200 | include/linux/utsrelease.h \ | 1165 | Module.symvers tags TAGS cscope* |
1201 | include/linux/bounds.h include/asm*/asm-offsets.h \ | ||
1202 | Module.symvers Module.markers tags TAGS cscope* | ||
1203 | 1166 | ||
1204 | # clean - Delete most, but leave enough to build external modules | 1167 | # clean - Delete most, but leave enough to build external modules |
1205 | # | 1168 | # |
@@ -1218,7 +1181,7 @@ clean: archclean $(clean-dirs) | |||
1218 | \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \ | 1181 | \( -name '*.[oas]' -o -name '*.ko' -o -name '.*.cmd' \ |
1219 | -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ | 1182 | -o -name '.*.d' -o -name '.*.tmp' -o -name '*.mod.c' \ |
1220 | -o -name '*.symtypes' -o -name 'modules.order' \ | 1183 | -o -name '*.symtypes' -o -name 'modules.order' \ |
1221 | -o -name 'Module.markers' -o -name '.tmp_*.o.*' \ | 1184 | -o -name modules.builtin -o -name '.tmp_*.o.*' \ |
1222 | -o -name '*.gcno' \) -type f -print | xargs rm -f | 1185 | -o -name '*.gcno' \) -type f -print | xargs rm -f |
1223 | 1186 | ||
1224 | # mrproper - Delete all generated files, including .config | 1187 | # mrproper - Delete all generated files, including .config |
@@ -1416,8 +1379,8 @@ $(clean-dirs): | |||
1416 | 1379 | ||
1417 | clean: rm-dirs := $(MODVERDIR) | 1380 | clean: rm-dirs := $(MODVERDIR) |
1418 | clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers \ | 1381 | clean: rm-files := $(KBUILD_EXTMOD)/Module.symvers \ |
1419 | $(KBUILD_EXTMOD)/Module.markers \ | 1382 | $(KBUILD_EXTMOD)/modules.order \ |
1420 | $(KBUILD_EXTMOD)/modules.order | 1383 | $(KBUILD_EXTMOD)/modules.builtin |
1421 | clean: $(clean-dirs) | 1384 | clean: $(clean-dirs) |
1422 | $(call cmd,rmdirs) | 1385 | $(call cmd,rmdirs) |
1423 | $(call cmd,rmfiles) | 1386 | $(call cmd,rmfiles) |
diff --git a/arch/alpha/boot/bootp.c b/arch/alpha/boot/bootp.c index 3af21c789339..3c8d1b25c661 100644 --- a/arch/alpha/boot/bootp.c +++ b/arch/alpha/boot/bootp.c | |||
@@ -9,7 +9,7 @@ | |||
9 | */ | 9 | */ |
10 | #include <linux/kernel.h> | 10 | #include <linux/kernel.h> |
11 | #include <linux/string.h> | 11 | #include <linux/string.h> |
12 | #include <linux/utsrelease.h> | 12 | #include <generated/utsrelease.h> |
13 | #include <linux/mm.h> | 13 | #include <linux/mm.h> |
14 | 14 | ||
15 | #include <asm/system.h> | 15 | #include <asm/system.h> |
diff --git a/arch/alpha/boot/bootpz.c b/arch/alpha/boot/bootpz.c index 1036b515e20c..ade3f129dc27 100644 --- a/arch/alpha/boot/bootpz.c +++ b/arch/alpha/boot/bootpz.c | |||
@@ -11,7 +11,7 @@ | |||
11 | */ | 11 | */ |
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/string.h> | 13 | #include <linux/string.h> |
14 | #include <linux/utsrelease.h> | 14 | #include <generated/utsrelease.h> |
15 | #include <linux/mm.h> | 15 | #include <linux/mm.h> |
16 | 16 | ||
17 | #include <asm/system.h> | 17 | #include <asm/system.h> |
diff --git a/arch/alpha/boot/main.c b/arch/alpha/boot/main.c index 89f3be071ae5..644b7db55438 100644 --- a/arch/alpha/boot/main.c +++ b/arch/alpha/boot/main.c | |||
@@ -7,7 +7,7 @@ | |||
7 | */ | 7 | */ |
8 | #include <linux/kernel.h> | 8 | #include <linux/kernel.h> |
9 | #include <linux/string.h> | 9 | #include <linux/string.h> |
10 | #include <linux/utsrelease.h> | 10 | #include <generated/utsrelease.h> |
11 | #include <linux/mm.h> | 11 | #include <linux/mm.h> |
12 | 12 | ||
13 | #include <asm/system.h> | 13 | #include <asm/system.h> |
diff --git a/arch/alpha/include/asm/asm-offsets.h b/arch/alpha/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/alpha/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/alpha/include/asm/fcntl.h b/arch/alpha/include/asm/fcntl.h index 21b1117a0c61..70145cbb21cb 100644 --- a/arch/alpha/include/asm/fcntl.h +++ b/arch/alpha/include/asm/fcntl.h | |||
@@ -16,7 +16,7 @@ | |||
16 | #define O_NOATIME 04000000 | 16 | #define O_NOATIME 04000000 |
17 | #define O_CLOEXEC 010000000 /* set close_on_exec */ | 17 | #define O_CLOEXEC 010000000 /* set close_on_exec */ |
18 | /* | 18 | /* |
19 | * Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using | 19 | * Before Linux 2.6.33 only O_DSYNC semantics were implemented, but using |
20 | * the O_SYNC flag. We continue to use the existing numerical value | 20 | * the O_SYNC flag. We continue to use the existing numerical value |
21 | * for O_DSYNC semantics now, but using the correct symbolic name for it. | 21 | * for O_DSYNC semantics now, but using the correct symbolic name for it. |
22 | * This new value is used to request true Posix O_SYNC semantics. It is | 22 | * This new value is used to request true Posix O_SYNC semantics. It is |
diff --git a/arch/arm/Makefile b/arch/arm/Makefile index fa0cdab2e1d3..e9da08483b3c 100644 --- a/arch/arm/Makefile +++ b/arch/arm/Makefile | |||
@@ -242,15 +242,8 @@ all: $(KBUILD_IMAGE) | |||
242 | 242 | ||
243 | boot := arch/arm/boot | 243 | boot := arch/arm/boot |
244 | 244 | ||
245 | # Update machine arch and proc symlinks if something which affects | 245 | archprepare: |
246 | # them changed. We use .arch to indicate when they were updated | 246 | $(Q)$(MAKE) $(build)=arch/arm/tools include/generated/mach-types.h |
247 | # last, otherwise make uses the target directory mtime. | ||
248 | |||
249 | archprepare: maketools | ||
250 | |||
251 | PHONY += maketools FORCE | ||
252 | maketools: include/linux/version.h FORCE | ||
253 | $(Q)$(MAKE) $(build)=arch/arm/tools include/asm-arm/mach-types.h | ||
254 | 247 | ||
255 | # Convert bzImage to zImage | 248 | # Convert bzImage to zImage |
256 | bzImage: zImage | 249 | bzImage: zImage |
@@ -261,9 +254,6 @@ zImage Image xipImage bootpImage uImage: vmlinux | |||
261 | zinstall install: vmlinux | 254 | zinstall install: vmlinux |
262 | $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ | 255 | $(Q)$(MAKE) $(build)=$(boot) MACHINE=$(MACHINE) $@ |
263 | 256 | ||
264 | CLEAN_FILES += include/asm-arm/mach-types.h \ | ||
265 | include/asm-arm/arch include/asm-arm/.arch | ||
266 | |||
267 | # We use MRPROPER_FILES and CLEAN_FILES now | 257 | # We use MRPROPER_FILES and CLEAN_FILES now |
268 | archclean: | 258 | archclean: |
269 | $(Q)$(MAKE) $(clean)=$(boot) | 259 | $(Q)$(MAKE) $(clean)=$(boot) |
diff --git a/arch/arm/common/dmabounce.c b/arch/arm/common/dmabounce.c index 5a375e5fef21..bc90364a96c7 100644 --- a/arch/arm/common/dmabounce.c +++ b/arch/arm/common/dmabounce.c | |||
@@ -308,15 +308,11 @@ static inline void unmap_single(struct device *dev, dma_addr_t dma_addr, | |||
308 | memcpy(ptr, buf->safe, size); | 308 | memcpy(ptr, buf->safe, size); |
309 | 309 | ||
310 | /* | 310 | /* |
311 | * DMA buffers must have the same cache properties | 311 | * Since we may have written to a page cache page, |
312 | * as if they were really used for DMA - which means | 312 | * we need to ensure that the data will be coherent |
313 | * data must be written back to RAM. Note that | 313 | * with user mappings. |
314 | * we don't use dmac_flush_range() here for the | ||
315 | * bidirectional case because we know the cache | ||
316 | * lines will be coherent with the data written. | ||
317 | */ | 314 | */ |
318 | dmac_clean_range(ptr, ptr + size); | 315 | __cpuc_flush_kernel_dcache_area(ptr, size); |
319 | outer_clean_range(__pa(ptr), __pa(ptr) + size); | ||
320 | } | 316 | } |
321 | free_safe_buffer(dev->archdata.dmabounce, buf); | 317 | free_safe_buffer(dev->archdata.dmabounce, buf); |
322 | } | 318 | } |
diff --git a/arch/arm/include/asm/asm-offsets.h b/arch/arm/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/arm/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/arm/include/asm/cacheflush.h b/arch/arm/include/asm/cacheflush.h index 73eceb87e588..730aefcfbee3 100644 --- a/arch/arm/include/asm/cacheflush.h +++ b/arch/arm/include/asm/cacheflush.h | |||
@@ -211,7 +211,7 @@ struct cpu_cache_fns { | |||
211 | 211 | ||
212 | void (*coherent_kern_range)(unsigned long, unsigned long); | 212 | void (*coherent_kern_range)(unsigned long, unsigned long); |
213 | void (*coherent_user_range)(unsigned long, unsigned long); | 213 | void (*coherent_user_range)(unsigned long, unsigned long); |
214 | void (*flush_kern_dcache_page)(void *); | 214 | void (*flush_kern_dcache_area)(void *, size_t); |
215 | 215 | ||
216 | void (*dma_inv_range)(const void *, const void *); | 216 | void (*dma_inv_range)(const void *, const void *); |
217 | void (*dma_clean_range)(const void *, const void *); | 217 | void (*dma_clean_range)(const void *, const void *); |
@@ -236,7 +236,7 @@ extern struct cpu_cache_fns cpu_cache; | |||
236 | #define __cpuc_flush_user_range cpu_cache.flush_user_range | 236 | #define __cpuc_flush_user_range cpu_cache.flush_user_range |
237 | #define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range | 237 | #define __cpuc_coherent_kern_range cpu_cache.coherent_kern_range |
238 | #define __cpuc_coherent_user_range cpu_cache.coherent_user_range | 238 | #define __cpuc_coherent_user_range cpu_cache.coherent_user_range |
239 | #define __cpuc_flush_dcache_page cpu_cache.flush_kern_dcache_page | 239 | #define __cpuc_flush_dcache_area cpu_cache.flush_kern_dcache_area |
240 | 240 | ||
241 | /* | 241 | /* |
242 | * These are private to the dma-mapping API. Do not use directly. | 242 | * These are private to the dma-mapping API. Do not use directly. |
@@ -255,14 +255,14 @@ extern struct cpu_cache_fns cpu_cache; | |||
255 | #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) | 255 | #define __cpuc_flush_user_range __glue(_CACHE,_flush_user_cache_range) |
256 | #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) | 256 | #define __cpuc_coherent_kern_range __glue(_CACHE,_coherent_kern_range) |
257 | #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) | 257 | #define __cpuc_coherent_user_range __glue(_CACHE,_coherent_user_range) |
258 | #define __cpuc_flush_dcache_page __glue(_CACHE,_flush_kern_dcache_page) | 258 | #define __cpuc_flush_dcache_area __glue(_CACHE,_flush_kern_dcache_area) |
259 | 259 | ||
260 | extern void __cpuc_flush_kern_all(void); | 260 | extern void __cpuc_flush_kern_all(void); |
261 | extern void __cpuc_flush_user_all(void); | 261 | extern void __cpuc_flush_user_all(void); |
262 | extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); | 262 | extern void __cpuc_flush_user_range(unsigned long, unsigned long, unsigned int); |
263 | extern void __cpuc_coherent_kern_range(unsigned long, unsigned long); | 263 | extern void __cpuc_coherent_kern_range(unsigned long, unsigned long); |
264 | extern void __cpuc_coherent_user_range(unsigned long, unsigned long); | 264 | extern void __cpuc_coherent_user_range(unsigned long, unsigned long); |
265 | extern void __cpuc_flush_dcache_page(void *); | 265 | extern void __cpuc_flush_dcache_area(void *, size_t); |
266 | 266 | ||
267 | /* | 267 | /* |
268 | * These are private to the dma-mapping API. Do not use directly. | 268 | * These are private to the dma-mapping API. Do not use directly. |
@@ -448,7 +448,7 @@ static inline void flush_kernel_dcache_page(struct page *page) | |||
448 | { | 448 | { |
449 | /* highmem pages are always flushed upon kunmap already */ | 449 | /* highmem pages are always flushed upon kunmap already */ |
450 | if ((cache_is_vivt() || cache_is_vipt_aliasing()) && !PageHighMem(page)) | 450 | if ((cache_is_vivt() || cache_is_vipt_aliasing()) && !PageHighMem(page)) |
451 | __cpuc_flush_dcache_page(page_address(page)); | 451 | __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE); |
452 | } | 452 | } |
453 | 453 | ||
454 | #define flush_dcache_mmap_lock(mapping) \ | 454 | #define flush_dcache_mmap_lock(mapping) \ |
@@ -465,13 +465,6 @@ static inline void flush_kernel_dcache_page(struct page *page) | |||
465 | */ | 465 | */ |
466 | #define flush_icache_page(vma,page) do { } while (0) | 466 | #define flush_icache_page(vma,page) do { } while (0) |
467 | 467 | ||
468 | static inline void flush_ioremap_region(unsigned long phys, void __iomem *virt, | ||
469 | unsigned offset, size_t size) | ||
470 | { | ||
471 | const void *start = (void __force *)virt + offset; | ||
472 | dmac_inv_range(start, start + size); | ||
473 | } | ||
474 | |||
475 | /* | 468 | /* |
476 | * flush_cache_vmap() is used when creating mappings (eg, via vmap, | 469 | * flush_cache_vmap() is used when creating mappings (eg, via vmap, |
477 | * vmalloc, ioremap etc) in kernel space for pages. On non-VIPT | 470 | * vmalloc, ioremap etc) in kernel space for pages. On non-VIPT |
diff --git a/arch/arm/include/asm/mach-types.h b/arch/arm/include/asm/mach-types.h new file mode 100644 index 000000000000..948178cc6ba8 --- /dev/null +++ b/arch/arm/include/asm/mach-types.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/mach-types.h> | |||
diff --git a/arch/arm/mach-kirkwood/Kconfig b/arch/arm/mach-kirkwood/Kconfig index 8bf09ae5b347..f6c6196a51fa 100644 --- a/arch/arm/mach-kirkwood/Kconfig +++ b/arch/arm/mach-kirkwood/Kconfig | |||
@@ -52,6 +52,12 @@ config MACH_OPENRD_BASE | |||
52 | Say 'Y' here if you want your kernel to support the | 52 | Say 'Y' here if you want your kernel to support the |
53 | Marvell OpenRD Base Board. | 53 | Marvell OpenRD Base Board. |
54 | 54 | ||
55 | config MACH_NETSPACE_V2 | ||
56 | bool "LaCie Network Space v2 NAS Board" | ||
57 | help | ||
58 | Say 'Y' here if you want your kernel to support the | ||
59 | LaCie Network Space v2 NAS. | ||
60 | |||
55 | endmenu | 61 | endmenu |
56 | 62 | ||
57 | endif | 63 | endif |
diff --git a/arch/arm/mach-kirkwood/Makefile b/arch/arm/mach-kirkwood/Makefile index 9f2f67b2b63d..d4d7f53b0fb9 100644 --- a/arch/arm/mach-kirkwood/Makefile +++ b/arch/arm/mach-kirkwood/Makefile | |||
@@ -8,5 +8,6 @@ obj-$(CONFIG_MACH_SHEEVAPLUG) += sheevaplug-setup.o | |||
8 | obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o | 8 | obj-$(CONFIG_MACH_TS219) += ts219-setup.o tsx1x-common.o |
9 | obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o | 9 | obj-$(CONFIG_MACH_TS41X) += ts41x-setup.o tsx1x-common.o |
10 | obj-$(CONFIG_MACH_OPENRD_BASE) += openrd_base-setup.o | 10 | obj-$(CONFIG_MACH_OPENRD_BASE) += openrd_base-setup.o |
11 | obj-$(CONFIG_MACH_NETSPACE_V2) += netspace_v2-setup.o | ||
11 | 12 | ||
12 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o | 13 | obj-$(CONFIG_CPU_IDLE) += cpuidle.o |
diff --git a/arch/arm/mach-kirkwood/netspace_v2-setup.c b/arch/arm/mach-kirkwood/netspace_v2-setup.c new file mode 100644 index 000000000000..9a064065bebe --- /dev/null +++ b/arch/arm/mach-kirkwood/netspace_v2-setup.c | |||
@@ -0,0 +1,325 @@ | |||
1 | /* | ||
2 | * arch/arm/mach-kirkwood/netspace_v2-setup.c | ||
3 | * | ||
4 | * LaCie Network Space v2 board setup | ||
5 | * | ||
6 | * Copyright (C) 2009 Simon Guinot <sguinot@lacie.com> | ||
7 | * Copyright (C) 2009 Benoît Canet <benoit.canet@gmail.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; either version 2 of the License, or | ||
12 | * (at your option) any later version. | ||
13 | * | ||
14 | * This program is distributed in the hope that it will be useful, | ||
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
17 | * GNU General Public License for more details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this program; if not, write to the Free Software | ||
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
22 | */ | ||
23 | |||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/platform_device.h> | ||
27 | #include <linux/mtd/physmap.h> | ||
28 | #include <linux/spi/flash.h> | ||
29 | #include <linux/spi/spi.h> | ||
30 | #include <linux/ata_platform.h> | ||
31 | #include <linux/mv643xx_eth.h> | ||
32 | #include <linux/i2c.h> | ||
33 | #include <linux/i2c/at24.h> | ||
34 | #include <linux/input.h> | ||
35 | #include <linux/gpio.h> | ||
36 | #include <linux/gpio_keys.h> | ||
37 | #include <linux/leds.h> | ||
38 | #include <asm/mach-types.h> | ||
39 | #include <asm/mach/arch.h> | ||
40 | #include <asm/mach/time.h> | ||
41 | #include <mach/kirkwood.h> | ||
42 | #include <plat/time.h> | ||
43 | #include "common.h" | ||
44 | #include "mpp.h" | ||
45 | |||
46 | /***************************************************************************** | ||
47 | * 512KB SPI Flash on Boot Device (MACRONIX MX25L4005) | ||
48 | ****************************************************************************/ | ||
49 | |||
50 | static struct mtd_partition netspace_v2_flash_parts[] = { | ||
51 | { | ||
52 | .name = "u-boot", | ||
53 | .size = MTDPART_SIZ_FULL, | ||
54 | .offset = 0, | ||
55 | .mask_flags = MTD_WRITEABLE, /* force read-only */ | ||
56 | }, | ||
57 | }; | ||
58 | |||
59 | static const struct flash_platform_data netspace_v2_flash = { | ||
60 | .type = "mx25l4005a", | ||
61 | .name = "spi_flash", | ||
62 | .parts = netspace_v2_flash_parts, | ||
63 | .nr_parts = ARRAY_SIZE(netspace_v2_flash_parts), | ||
64 | }; | ||
65 | |||
66 | static struct spi_board_info __initdata netspace_v2_spi_slave_info[] = { | ||
67 | { | ||
68 | .modalias = "m25p80", | ||
69 | .platform_data = &netspace_v2_flash, | ||
70 | .irq = -1, | ||
71 | .max_speed_hz = 20000000, | ||
72 | .bus_num = 0, | ||
73 | .chip_select = 0, | ||
74 | }, | ||
75 | }; | ||
76 | |||
77 | /***************************************************************************** | ||
78 | * Ethernet | ||
79 | ****************************************************************************/ | ||
80 | |||
81 | static struct mv643xx_eth_platform_data netspace_v2_ge00_data = { | ||
82 | .phy_addr = MV643XX_ETH_PHY_ADDR(8), | ||
83 | }; | ||
84 | |||
85 | /***************************************************************************** | ||
86 | * I2C devices | ||
87 | ****************************************************************************/ | ||
88 | |||
89 | static struct at24_platform_data at24c04 = { | ||
90 | .byte_len = SZ_4K / 8, | ||
91 | .page_size = 16, | ||
92 | }; | ||
93 | |||
94 | /* | ||
95 | * i2c addr | chip | description | ||
96 | * 0x50 | HT24LC04 | eeprom (512B) | ||
97 | */ | ||
98 | |||
99 | static struct i2c_board_info __initdata netspace_v2_i2c_info[] = { | ||
100 | { | ||
101 | I2C_BOARD_INFO("24c04", 0x50), | ||
102 | .platform_data = &at24c04, | ||
103 | } | ||
104 | }; | ||
105 | |||
106 | /***************************************************************************** | ||
107 | * SATA | ||
108 | ****************************************************************************/ | ||
109 | |||
110 | static struct mv_sata_platform_data netspace_v2_sata_data = { | ||
111 | .n_ports = 2, | ||
112 | }; | ||
113 | |||
114 | #define NETSPACE_V2_GPIO_SATA0_POWER 16 | ||
115 | #define NETSPACE_V2_GPIO_SATA1_POWER 17 | ||
116 | |||
117 | static void __init netspace_v2_sata_power_init(void) | ||
118 | { | ||
119 | int err; | ||
120 | |||
121 | err = gpio_request(NETSPACE_V2_GPIO_SATA0_POWER, "SATA0 power"); | ||
122 | if (err == 0) { | ||
123 | err = gpio_direction_output(NETSPACE_V2_GPIO_SATA0_POWER, 1); | ||
124 | if (err) | ||
125 | gpio_free(NETSPACE_V2_GPIO_SATA0_POWER); | ||
126 | } | ||
127 | if (err) | ||
128 | pr_err("netspace_v2: failed to setup SATA0 power\n"); | ||
129 | } | ||
130 | |||
131 | /***************************************************************************** | ||
132 | * GPIO keys | ||
133 | ****************************************************************************/ | ||
134 | |||
135 | #define NETSPACE_V2_PUSH_BUTTON 32 | ||
136 | |||
137 | static struct gpio_keys_button netspace_v2_buttons[] = { | ||
138 | [0] = { | ||
139 | .code = KEY_POWER, | ||
140 | .gpio = NETSPACE_V2_PUSH_BUTTON, | ||
141 | .desc = "Power push button", | ||
142 | .active_low = 0, | ||
143 | }, | ||
144 | }; | ||
145 | |||
146 | static struct gpio_keys_platform_data netspace_v2_button_data = { | ||
147 | .buttons = netspace_v2_buttons, | ||
148 | .nbuttons = ARRAY_SIZE(netspace_v2_buttons), | ||
149 | }; | ||
150 | |||
151 | static struct platform_device netspace_v2_gpio_buttons = { | ||
152 | .name = "gpio-keys", | ||
153 | .id = -1, | ||
154 | .dev = { | ||
155 | .platform_data = &netspace_v2_button_data, | ||
156 | }, | ||
157 | }; | ||
158 | |||
159 | /***************************************************************************** | ||
160 | * GPIO LEDs | ||
161 | ****************************************************************************/ | ||
162 | |||
163 | /* | ||
164 | * The blue front LED is wired to a CPLD and can blink in relation with the | ||
165 | * SATA activity. | ||
166 | * | ||
167 | * The following array detail the different LED registers and the combination | ||
168 | * of their possible values: | ||
169 | * | ||
170 | * cmd_led | slow_led | /SATA active | LED state | ||
171 | * | | | | ||
172 | * 1 | 0 | x | off | ||
173 | * - | 1 | x | on | ||
174 | * 0 | 0 | 1 | on | ||
175 | * 0 | 0 | 0 | blink (rate 300ms) | ||
176 | */ | ||
177 | |||
178 | #define NETSPACE_V2_GPIO_RED_LED 12 | ||
179 | #define NETSPACE_V2_GPIO_BLUE_LED_SLOW 29 | ||
180 | #define NETSPACE_V2_GPIO_BLUE_LED_CMD 30 | ||
181 | |||
182 | |||
183 | static struct gpio_led netspace_v2_gpio_led_pins[] = { | ||
184 | { | ||
185 | .name = "ns_v2:red:fail", | ||
186 | .gpio = NETSPACE_V2_GPIO_RED_LED, | ||
187 | }, | ||
188 | }; | ||
189 | |||
190 | static struct gpio_led_platform_data netspace_v2_gpio_leds_data = { | ||
191 | .num_leds = ARRAY_SIZE(netspace_v2_gpio_led_pins), | ||
192 | .leds = netspace_v2_gpio_led_pins, | ||
193 | }; | ||
194 | |||
195 | static struct platform_device netspace_v2_gpio_leds = { | ||
196 | .name = "leds-gpio", | ||
197 | .id = -1, | ||
198 | .dev = { | ||
199 | .platform_data = &netspace_v2_gpio_leds_data, | ||
200 | }, | ||
201 | }; | ||
202 | |||
203 | static void __init netspace_v2_gpio_leds_init(void) | ||
204 | { | ||
205 | platform_device_register(&netspace_v2_gpio_leds); | ||
206 | |||
207 | /* | ||
208 | * Configure the front blue LED to blink in relation with the SATA | ||
209 | * activity. | ||
210 | */ | ||
211 | if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_SLOW, | ||
212 | "SATA blue LED slow") != 0) | ||
213 | return; | ||
214 | if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_SLOW, 0) != 0) | ||
215 | goto err_free_1; | ||
216 | if (gpio_request(NETSPACE_V2_GPIO_BLUE_LED_CMD, | ||
217 | "SATA blue LED command") != 0) | ||
218 | goto err_free_1; | ||
219 | if (gpio_direction_output(NETSPACE_V2_GPIO_BLUE_LED_CMD, 0) != 0) | ||
220 | goto err_free_2; | ||
221 | |||
222 | return; | ||
223 | |||
224 | err_free_2: | ||
225 | gpio_free(NETSPACE_V2_GPIO_BLUE_LED_CMD); | ||
226 | err_free_1: | ||
227 | gpio_free(NETSPACE_V2_GPIO_BLUE_LED_SLOW); | ||
228 | pr_err("netspace_v2: failed to configure SATA blue LED\n"); | ||
229 | } | ||
230 | |||
231 | /***************************************************************************** | ||
232 | * Timer | ||
233 | ****************************************************************************/ | ||
234 | |||
235 | static void netspace_v2_timer_init(void) | ||
236 | { | ||
237 | kirkwood_tclk = 166666667; | ||
238 | orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk); | ||
239 | } | ||
240 | |||
241 | struct sys_timer netspace_v2_timer = { | ||
242 | .init = netspace_v2_timer_init, | ||
243 | }; | ||
244 | |||
245 | /***************************************************************************** | ||
246 | * General Setup | ||
247 | ****************************************************************************/ | ||
248 | |||
249 | static unsigned int netspace_v2_mpp_config[] __initdata = { | ||
250 | MPP0_SPI_SCn, | ||
251 | MPP1_SPI_MOSI, | ||
252 | MPP2_SPI_SCK, | ||
253 | MPP3_SPI_MISO, | ||
254 | MPP4_NF_IO6, | ||
255 | MPP5_NF_IO7, | ||
256 | MPP6_SYSRST_OUTn, | ||
257 | MPP8_TW_SDA, | ||
258 | MPP9_TW_SCK, | ||
259 | MPP10_UART0_TXD, | ||
260 | MPP11_UART0_RXD, | ||
261 | MPP12_GPO, /* Red led */ | ||
262 | MPP14_GPIO, /* USB fuse */ | ||
263 | MPP16_GPIO, /* SATA 0 power */ | ||
264 | MPP18_NF_IO0, | ||
265 | MPP19_NF_IO1, | ||
266 | MPP20_SATA1_ACTn, | ||
267 | MPP21_SATA0_ACTn, | ||
268 | MPP24_GPIO, /* USB mode select */ | ||
269 | MPP25_GPIO, /* Fan rotation fail */ | ||
270 | MPP26_GPIO, /* USB device vbus */ | ||
271 | MPP28_GPIO, /* USB enable host vbus */ | ||
272 | MPP29_GPIO, /* Blue led (slow register) */ | ||
273 | MPP30_GPIO, /* Blue led (command register) */ | ||
274 | MPP31_GPIO, /* Board power off */ | ||
275 | MPP32_GPIO, /* Power button (0 = Released, 1 = Pushed) */ | ||
276 | 0 | ||
277 | }; | ||
278 | |||
279 | #define NETSPACE_V2_GPIO_POWER_OFF 31 | ||
280 | |||
281 | static void netspace_v2_power_off(void) | ||
282 | { | ||
283 | gpio_set_value(NETSPACE_V2_GPIO_POWER_OFF, 1); | ||
284 | } | ||
285 | |||
286 | static void __init netspace_v2_init(void) | ||
287 | { | ||
288 | /* | ||
289 | * Basic setup. Needs to be called early. | ||
290 | */ | ||
291 | kirkwood_init(); | ||
292 | kirkwood_mpp_conf(netspace_v2_mpp_config); | ||
293 | |||
294 | netspace_v2_sata_power_init(); | ||
295 | |||
296 | kirkwood_ehci_init(); | ||
297 | kirkwood_ge00_init(&netspace_v2_ge00_data); | ||
298 | kirkwood_sata_init(&netspace_v2_sata_data); | ||
299 | kirkwood_uart0_init(); | ||
300 | spi_register_board_info(netspace_v2_spi_slave_info, | ||
301 | ARRAY_SIZE(netspace_v2_spi_slave_info)); | ||
302 | kirkwood_spi_init(); | ||
303 | kirkwood_i2c_init(); | ||
304 | i2c_register_board_info(0, netspace_v2_i2c_info, | ||
305 | ARRAY_SIZE(netspace_v2_i2c_info)); | ||
306 | |||
307 | netspace_v2_gpio_leds_init(); | ||
308 | platform_device_register(&netspace_v2_gpio_buttons); | ||
309 | |||
310 | if (gpio_request(NETSPACE_V2_GPIO_POWER_OFF, "power-off") == 0 && | ||
311 | gpio_direction_output(NETSPACE_V2_GPIO_POWER_OFF, 0) == 0) | ||
312 | pm_power_off = netspace_v2_power_off; | ||
313 | else | ||
314 | pr_err("netspace_v2: failed to configure power-off GPIO\n"); | ||
315 | } | ||
316 | |||
317 | MACHINE_START(NETSPACE_V2, "LaCie Network Space v2") | ||
318 | .phys_io = KIRKWOOD_REGS_PHYS_BASE, | ||
319 | .io_pg_offst = ((KIRKWOOD_REGS_VIRT_BASE) >> 18) & 0xfffc, | ||
320 | .boot_params = 0x00000100, | ||
321 | .init_machine = netspace_v2_init, | ||
322 | .map_io = kirkwood_map_io, | ||
323 | .init_irq = kirkwood_init_irq, | ||
324 | .timer = &netspace_v2_timer, | ||
325 | MACHINE_END | ||
diff --git a/arch/arm/mach-omap2/Kconfig b/arch/arm/mach-omap2/Kconfig index 76c11ee113e9..10eafa70a909 100644 --- a/arch/arm/mach-omap2/Kconfig +++ b/arch/arm/mach-omap2/Kconfig | |||
@@ -18,6 +18,7 @@ config ARCH_OMAP2430 | |||
18 | config ARCH_OMAP34XX | 18 | config ARCH_OMAP34XX |
19 | bool "OMAP34xx Based System" | 19 | bool "OMAP34xx Based System" |
20 | depends on ARCH_OMAP3 | 20 | depends on ARCH_OMAP3 |
21 | select USB_ARCH_HAS_EHCI | ||
21 | 22 | ||
22 | config ARCH_OMAP3430 | 23 | config ARCH_OMAP3430 |
23 | bool "OMAP3430 support" | 24 | bool "OMAP3430 support" |
diff --git a/arch/arm/mach-omap2/board-cm-t35.c b/arch/arm/mach-omap2/board-cm-t35.c index 1591aae64500..2626a9f8a73a 100644 --- a/arch/arm/mach-omap2/board-cm-t35.c +++ b/arch/arm/mach-omap2/board-cm-t35.c | |||
@@ -29,7 +29,7 @@ | |||
29 | #include <linux/gpio.h> | 29 | #include <linux/gpio.h> |
30 | 30 | ||
31 | #include <linux/i2c/at24.h> | 31 | #include <linux/i2c/at24.h> |
32 | #include <linux/i2c/twl4030.h> | 32 | #include <linux/i2c/twl.h> |
33 | #include <linux/regulator/machine.h> | 33 | #include <linux/regulator/machine.h> |
34 | 34 | ||
35 | #include <asm/mach-types.h> | 35 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-omap2/board-igep0020.c b/arch/arm/mach-omap2/board-igep0020.c index 44239e3ec02e..117b8fd7e3a6 100644 --- a/arch/arm/mach-omap2/board-igep0020.c +++ b/arch/arm/mach-omap2/board-igep0020.c | |||
@@ -19,7 +19,7 @@ | |||
19 | #include <linux/interrupt.h> | 19 | #include <linux/interrupt.h> |
20 | 20 | ||
21 | #include <linux/regulator/machine.h> | 21 | #include <linux/regulator/machine.h> |
22 | #include <linux/i2c/twl4030.h> | 22 | #include <linux/i2c/twl.h> |
23 | 23 | ||
24 | #include <asm/mach-types.h> | 24 | #include <asm/mach-types.h> |
25 | #include <asm/mach/arch.h> | 25 | #include <asm/mach/arch.h> |
diff --git a/arch/arm/mach-omap2/board-omap3evm.c b/arch/arm/mach-omap2/board-omap3evm.c index 18913e96e34d..34de17851572 100644 --- a/arch/arm/mach-omap2/board-omap3evm.c +++ b/arch/arm/mach-omap2/board-omap3evm.c | |||
@@ -26,7 +26,7 @@ | |||
26 | 26 | ||
27 | #include <linux/spi/spi.h> | 27 | #include <linux/spi/spi.h> |
28 | #include <linux/spi/ads7846.h> | 28 | #include <linux/spi/ads7846.h> |
29 | #include <linux/i2c/twl4030.h> | 29 | #include <linux/i2c/twl.h> |
30 | #include <linux/usb/otg.h> | 30 | #include <linux/usb/otg.h> |
31 | #include <linux/smsc911x.h> | 31 | #include <linux/smsc911x.h> |
32 | 32 | ||
diff --git a/arch/arm/mach-omap2/board-omap3touchbook.c b/arch/arm/mach-omap2/board-omap3touchbook.c index c9e5ebb4d91d..fe3d22cb2457 100644 --- a/arch/arm/mach-omap2/board-omap3touchbook.c +++ b/arch/arm/mach-omap2/board-omap3touchbook.c | |||
@@ -34,7 +34,7 @@ | |||
34 | #include <linux/spi/ads7846.h> | 34 | #include <linux/spi/ads7846.h> |
35 | 35 | ||
36 | #include <linux/regulator/machine.h> | 36 | #include <linux/regulator/machine.h> |
37 | #include <linux/i2c/twl4030.h> | 37 | #include <linux/i2c/twl.h> |
38 | 38 | ||
39 | #include <mach/hardware.h> | 39 | #include <mach/hardware.h> |
40 | #include <asm/mach-types.h> | 40 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-omap2/board-rx51-peripherals.c b/arch/arm/mach-omap2/board-rx51-peripherals.c index 17f3c91231db..acafdbc8aa16 100644 --- a/arch/arm/mach-omap2/board-rx51-peripherals.c +++ b/arch/arm/mach-omap2/board-rx51-peripherals.c | |||
@@ -16,7 +16,7 @@ | |||
16 | #include <linux/spi/spi.h> | 16 | #include <linux/spi/spi.h> |
17 | #include <linux/spi/wl12xx.h> | 17 | #include <linux/spi/wl12xx.h> |
18 | #include <linux/i2c.h> | 18 | #include <linux/i2c.h> |
19 | #include <linux/i2c/twl4030.h> | 19 | #include <linux/i2c/twl.h> |
20 | #include <linux/clk.h> | 20 | #include <linux/clk.h> |
21 | #include <linux/delay.h> | 21 | #include <linux/delay.h> |
22 | #include <linux/regulator/machine.h> | 22 | #include <linux/regulator/machine.h> |
diff --git a/arch/arm/mach-omap2/board-zoom-peripherals.c b/arch/arm/mach-omap2/board-zoom-peripherals.c index 258794db488f..8dd277c36661 100755 --- a/arch/arm/mach-omap2/board-zoom-peripherals.c +++ b/arch/arm/mach-omap2/board-zoom-peripherals.c | |||
@@ -14,7 +14,7 @@ | |||
14 | #include <linux/input.h> | 14 | #include <linux/input.h> |
15 | #include <linux/input/matrix_keypad.h> | 15 | #include <linux/input/matrix_keypad.h> |
16 | #include <linux/gpio.h> | 16 | #include <linux/gpio.h> |
17 | #include <linux/i2c/twl4030.h> | 17 | #include <linux/i2c/twl.h> |
18 | #include <linux/regulator/machine.h> | 18 | #include <linux/regulator/machine.h> |
19 | 19 | ||
20 | #include <asm/mach-types.h> | 20 | #include <asm/mach-types.h> |
diff --git a/arch/arm/mach-omap2/serial.c b/arch/arm/mach-omap2/serial.c index 39b797bc14d6..19805a7de06c 100644 --- a/arch/arm/mach-omap2/serial.c +++ b/arch/arm/mach-omap2/serial.c | |||
@@ -640,12 +640,9 @@ void __init omap_serial_early_init(void) | |||
640 | uart->num = i; | 640 | uart->num = i; |
641 | p->private_data = uart; | 641 | p->private_data = uart; |
642 | uart->p = p; | 642 | uart->p = p; |
643 | list_add_tail(&uart->node, &uart_list); | ||
644 | 643 | ||
645 | if (cpu_is_omap44xx()) | 644 | if (cpu_is_omap44xx()) |
646 | p->irq += 32; | 645 | p->irq += 32; |
647 | |||
648 | omap_uart_enable_clocks(uart); | ||
649 | } | 646 | } |
650 | } | 647 | } |
651 | 648 | ||
@@ -673,9 +670,13 @@ void __init omap_serial_init_port(int port) | |||
673 | pdev = &uart->pdev; | 670 | pdev = &uart->pdev; |
674 | dev = &pdev->dev; | 671 | dev = &pdev->dev; |
675 | 672 | ||
673 | omap_uart_enable_clocks(uart); | ||
674 | |||
676 | omap_uart_reset(uart); | 675 | omap_uart_reset(uart); |
677 | omap_uart_idle_init(uart); | 676 | omap_uart_idle_init(uart); |
678 | 677 | ||
678 | list_add_tail(&uart->node, &uart_list); | ||
679 | |||
679 | if (WARN_ON(platform_device_register(pdev))) | 680 | if (WARN_ON(platform_device_register(pdev))) |
680 | return; | 681 | return; |
681 | 682 | ||
diff --git a/arch/arm/mach-pxa/Kconfig b/arch/arm/mach-pxa/Kconfig index e6d8e10ae5d1..8a0837ea0294 100644 --- a/arch/arm/mach-pxa/Kconfig +++ b/arch/arm/mach-pxa/Kconfig | |||
@@ -110,6 +110,8 @@ config MACH_CM_X300 | |||
110 | bool "CompuLab CM-X300 modules" | 110 | bool "CompuLab CM-X300 modules" |
111 | select PXA3xx | 111 | select PXA3xx |
112 | select CPU_PXA300 | 112 | select CPU_PXA300 |
113 | select CPU_PXA310 | ||
114 | select HAVE_PWM | ||
113 | 115 | ||
114 | config ARCH_GUMSTIX | 116 | config ARCH_GUMSTIX |
115 | bool "Gumstix XScale 255 boards" | 117 | bool "Gumstix XScale 255 boards" |
@@ -240,7 +242,6 @@ config MACH_COLIBRI300 | |||
240 | select PXA3xx | 242 | select PXA3xx |
241 | select CPU_PXA300 | 243 | select CPU_PXA300 |
242 | select CPU_PXA310 | 244 | select CPU_PXA310 |
243 | select HAVE_PWM | ||
244 | 245 | ||
245 | config MACH_COLIBRI320 | 246 | config MACH_COLIBRI320 |
246 | bool "Toradex Colibri PXA320" | 247 | bool "Toradex Colibri PXA320" |
diff --git a/arch/arm/mach-pxa/devices.c b/arch/arm/mach-pxa/devices.c index 3395463bb5a6..8e10db148f1b 100644 --- a/arch/arm/mach-pxa/devices.c +++ b/arch/arm/mach-pxa/devices.c | |||
@@ -4,7 +4,6 @@ | |||
4 | #include <linux/platform_device.h> | 4 | #include <linux/platform_device.h> |
5 | #include <linux/dma-mapping.h> | 5 | #include <linux/dma-mapping.h> |
6 | 6 | ||
7 | #include <mach/hardware.h> | ||
8 | #include <mach/udc.h> | 7 | #include <mach/udc.h> |
9 | #include <mach/pxafb.h> | 8 | #include <mach/pxafb.h> |
10 | #include <mach/mmc.h> | 9 | #include <mach/mmc.h> |
@@ -14,6 +13,7 @@ | |||
14 | #include <mach/pxa2xx_spi.h> | 13 | #include <mach/pxa2xx_spi.h> |
15 | #include <mach/camera.h> | 14 | #include <mach/camera.h> |
16 | #include <mach/audio.h> | 15 | #include <mach/audio.h> |
16 | #include <mach/hardware.h> | ||
17 | #include <plat/i2c.h> | 17 | #include <plat/i2c.h> |
18 | #include <plat/pxa3xx_nand.h> | 18 | #include <plat/pxa3xx_nand.h> |
19 | 19 | ||
diff --git a/arch/arm/mach-s3c2410/include/mach/spi.h b/arch/arm/mach-s3c2410/include/mach/spi.h index 193b39d654ed..4d9588373aa5 100644 --- a/arch/arm/mach-s3c2410/include/mach/spi.h +++ b/arch/arm/mach-s3c2410/include/mach/spi.h | |||
@@ -18,6 +18,8 @@ struct s3c2410_spi_info { | |||
18 | unsigned int num_cs; /* total chipselects */ | 18 | unsigned int num_cs; /* total chipselects */ |
19 | int bus_num; /* bus number to use. */ | 19 | int bus_num; /* bus number to use. */ |
20 | 20 | ||
21 | unsigned int use_fiq:1; /* use fiq */ | ||
22 | |||
21 | void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable); | 23 | void (*gpio_setup)(struct s3c2410_spi_info *spi, int enable); |
22 | void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); | 24 | void (*set_cs)(struct s3c2410_spi_info *spi, int cs, int pol); |
23 | }; | 25 | }; |
diff --git a/arch/arm/mm/cache-fa.S b/arch/arm/mm/cache-fa.S index b63a8f7b95cf..a89444a3c016 100644 --- a/arch/arm/mm/cache-fa.S +++ b/arch/arm/mm/cache-fa.S | |||
@@ -127,15 +127,16 @@ ENTRY(fa_coherent_user_range) | |||
127 | mov pc, lr | 127 | mov pc, lr |
128 | 128 | ||
129 | /* | 129 | /* |
130 | * flush_kern_dcache_page(kaddr) | 130 | * flush_kern_dcache_area(void *addr, size_t size) |
131 | * | 131 | * |
132 | * Ensure that the data held in the page kaddr is written back | 132 | * Ensure that the data held in the page kaddr is written back |
133 | * to the page in question. | 133 | * to the page in question. |
134 | * | 134 | * |
135 | * - kaddr - kernel address (guaranteed to be page aligned) | 135 | * - addr - kernel address |
136 | * - size - size of region | ||
136 | */ | 137 | */ |
137 | ENTRY(fa_flush_kern_dcache_page) | 138 | ENTRY(fa_flush_kern_dcache_area) |
138 | add r1, r0, #PAGE_SZ | 139 | add r1, r0, r1 |
139 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line | 140 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line |
140 | add r0, r0, #CACHE_DLINESIZE | 141 | add r0, r0, #CACHE_DLINESIZE |
141 | cmp r0, r1 | 142 | cmp r0, r1 |
@@ -213,7 +214,7 @@ ENTRY(fa_cache_fns) | |||
213 | .long fa_flush_user_cache_range | 214 | .long fa_flush_user_cache_range |
214 | .long fa_coherent_kern_range | 215 | .long fa_coherent_kern_range |
215 | .long fa_coherent_user_range | 216 | .long fa_coherent_user_range |
216 | .long fa_flush_kern_dcache_page | 217 | .long fa_flush_kern_dcache_area |
217 | .long fa_dma_inv_range | 218 | .long fa_dma_inv_range |
218 | .long fa_dma_clean_range | 219 | .long fa_dma_clean_range |
219 | .long fa_dma_flush_range | 220 | .long fa_dma_flush_range |
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c index 747f9a9021bb..cb8fc6573b1b 100644 --- a/arch/arm/mm/cache-l2x0.c +++ b/arch/arm/mm/cache-l2x0.c | |||
@@ -28,69 +28,120 @@ | |||
28 | static void __iomem *l2x0_base; | 28 | static void __iomem *l2x0_base; |
29 | static DEFINE_SPINLOCK(l2x0_lock); | 29 | static DEFINE_SPINLOCK(l2x0_lock); |
30 | 30 | ||
31 | static inline void sync_writel(unsigned long val, unsigned long reg, | 31 | static inline void cache_wait(void __iomem *reg, unsigned long mask) |
32 | unsigned long complete_mask) | ||
33 | { | 32 | { |
34 | unsigned long flags; | ||
35 | |||
36 | spin_lock_irqsave(&l2x0_lock, flags); | ||
37 | writel(val, l2x0_base + reg); | ||
38 | /* wait for the operation to complete */ | 33 | /* wait for the operation to complete */ |
39 | while (readl(l2x0_base + reg) & complete_mask) | 34 | while (readl(reg) & mask) |
40 | ; | 35 | ; |
41 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
42 | } | 36 | } |
43 | 37 | ||
44 | static inline void cache_sync(void) | 38 | static inline void cache_sync(void) |
45 | { | 39 | { |
46 | sync_writel(0, L2X0_CACHE_SYNC, 1); | 40 | void __iomem *base = l2x0_base; |
41 | writel(0, base + L2X0_CACHE_SYNC); | ||
42 | cache_wait(base + L2X0_CACHE_SYNC, 1); | ||
47 | } | 43 | } |
48 | 44 | ||
49 | static inline void l2x0_inv_all(void) | 45 | static inline void l2x0_inv_all(void) |
50 | { | 46 | { |
47 | unsigned long flags; | ||
48 | |||
51 | /* invalidate all ways */ | 49 | /* invalidate all ways */ |
52 | sync_writel(0xff, L2X0_INV_WAY, 0xff); | 50 | spin_lock_irqsave(&l2x0_lock, flags); |
51 | writel(0xff, l2x0_base + L2X0_INV_WAY); | ||
52 | cache_wait(l2x0_base + L2X0_INV_WAY, 0xff); | ||
53 | cache_sync(); | 53 | cache_sync(); |
54 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
54 | } | 55 | } |
55 | 56 | ||
56 | static void l2x0_inv_range(unsigned long start, unsigned long end) | 57 | static void l2x0_inv_range(unsigned long start, unsigned long end) |
57 | { | 58 | { |
58 | unsigned long addr; | 59 | void __iomem *base = l2x0_base; |
60 | unsigned long flags; | ||
59 | 61 | ||
62 | spin_lock_irqsave(&l2x0_lock, flags); | ||
60 | if (start & (CACHE_LINE_SIZE - 1)) { | 63 | if (start & (CACHE_LINE_SIZE - 1)) { |
61 | start &= ~(CACHE_LINE_SIZE - 1); | 64 | start &= ~(CACHE_LINE_SIZE - 1); |
62 | sync_writel(start, L2X0_CLEAN_INV_LINE_PA, 1); | 65 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); |
66 | writel(start, base + L2X0_CLEAN_INV_LINE_PA); | ||
63 | start += CACHE_LINE_SIZE; | 67 | start += CACHE_LINE_SIZE; |
64 | } | 68 | } |
65 | 69 | ||
66 | if (end & (CACHE_LINE_SIZE - 1)) { | 70 | if (end & (CACHE_LINE_SIZE - 1)) { |
67 | end &= ~(CACHE_LINE_SIZE - 1); | 71 | end &= ~(CACHE_LINE_SIZE - 1); |
68 | sync_writel(end, L2X0_CLEAN_INV_LINE_PA, 1); | 72 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); |
73 | writel(end, base + L2X0_CLEAN_INV_LINE_PA); | ||
69 | } | 74 | } |
70 | 75 | ||
71 | for (addr = start; addr < end; addr += CACHE_LINE_SIZE) | 76 | while (start < end) { |
72 | sync_writel(addr, L2X0_INV_LINE_PA, 1); | 77 | unsigned long blk_end = start + min(end - start, 4096UL); |
78 | |||
79 | while (start < blk_end) { | ||
80 | cache_wait(base + L2X0_INV_LINE_PA, 1); | ||
81 | writel(start, base + L2X0_INV_LINE_PA); | ||
82 | start += CACHE_LINE_SIZE; | ||
83 | } | ||
84 | |||
85 | if (blk_end < end) { | ||
86 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
87 | spin_lock_irqsave(&l2x0_lock, flags); | ||
88 | } | ||
89 | } | ||
90 | cache_wait(base + L2X0_INV_LINE_PA, 1); | ||
73 | cache_sync(); | 91 | cache_sync(); |
92 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
74 | } | 93 | } |
75 | 94 | ||
76 | static void l2x0_clean_range(unsigned long start, unsigned long end) | 95 | static void l2x0_clean_range(unsigned long start, unsigned long end) |
77 | { | 96 | { |
78 | unsigned long addr; | 97 | void __iomem *base = l2x0_base; |
98 | unsigned long flags; | ||
79 | 99 | ||
100 | spin_lock_irqsave(&l2x0_lock, flags); | ||
80 | start &= ~(CACHE_LINE_SIZE - 1); | 101 | start &= ~(CACHE_LINE_SIZE - 1); |
81 | for (addr = start; addr < end; addr += CACHE_LINE_SIZE) | 102 | while (start < end) { |
82 | sync_writel(addr, L2X0_CLEAN_LINE_PA, 1); | 103 | unsigned long blk_end = start + min(end - start, 4096UL); |
104 | |||
105 | while (start < blk_end) { | ||
106 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); | ||
107 | writel(start, base + L2X0_CLEAN_LINE_PA); | ||
108 | start += CACHE_LINE_SIZE; | ||
109 | } | ||
110 | |||
111 | if (blk_end < end) { | ||
112 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
113 | spin_lock_irqsave(&l2x0_lock, flags); | ||
114 | } | ||
115 | } | ||
116 | cache_wait(base + L2X0_CLEAN_LINE_PA, 1); | ||
83 | cache_sync(); | 117 | cache_sync(); |
118 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
84 | } | 119 | } |
85 | 120 | ||
86 | static void l2x0_flush_range(unsigned long start, unsigned long end) | 121 | static void l2x0_flush_range(unsigned long start, unsigned long end) |
87 | { | 122 | { |
88 | unsigned long addr; | 123 | void __iomem *base = l2x0_base; |
124 | unsigned long flags; | ||
89 | 125 | ||
126 | spin_lock_irqsave(&l2x0_lock, flags); | ||
90 | start &= ~(CACHE_LINE_SIZE - 1); | 127 | start &= ~(CACHE_LINE_SIZE - 1); |
91 | for (addr = start; addr < end; addr += CACHE_LINE_SIZE) | 128 | while (start < end) { |
92 | sync_writel(addr, L2X0_CLEAN_INV_LINE_PA, 1); | 129 | unsigned long blk_end = start + min(end - start, 4096UL); |
130 | |||
131 | while (start < blk_end) { | ||
132 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); | ||
133 | writel(start, base + L2X0_CLEAN_INV_LINE_PA); | ||
134 | start += CACHE_LINE_SIZE; | ||
135 | } | ||
136 | |||
137 | if (blk_end < end) { | ||
138 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
139 | spin_lock_irqsave(&l2x0_lock, flags); | ||
140 | } | ||
141 | } | ||
142 | cache_wait(base + L2X0_CLEAN_INV_LINE_PA, 1); | ||
93 | cache_sync(); | 143 | cache_sync(); |
144 | spin_unlock_irqrestore(&l2x0_lock, flags); | ||
94 | } | 145 | } |
95 | 146 | ||
96 | void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) | 147 | void __init l2x0_init(void __iomem *base, __u32 aux_val, __u32 aux_mask) |
diff --git a/arch/arm/mm/cache-v3.S b/arch/arm/mm/cache-v3.S index 8a4abebc478a..2a482731ea36 100644 --- a/arch/arm/mm/cache-v3.S +++ b/arch/arm/mm/cache-v3.S | |||
@@ -72,14 +72,15 @@ ENTRY(v3_coherent_user_range) | |||
72 | mov pc, lr | 72 | mov pc, lr |
73 | 73 | ||
74 | /* | 74 | /* |
75 | * flush_kern_dcache_page(void *page) | 75 | * flush_kern_dcache_area(void *page, size_t size) |
76 | * | 76 | * |
77 | * Ensure no D cache aliasing occurs, either with itself or | 77 | * Ensure no D cache aliasing occurs, either with itself or |
78 | * the I cache | 78 | * the I cache |
79 | * | 79 | * |
80 | * - addr - page aligned address | 80 | * - addr - kernel address |
81 | * - size - region size | ||
81 | */ | 82 | */ |
82 | ENTRY(v3_flush_kern_dcache_page) | 83 | ENTRY(v3_flush_kern_dcache_area) |
83 | /* FALLTHROUGH */ | 84 | /* FALLTHROUGH */ |
84 | 85 | ||
85 | /* | 86 | /* |
@@ -129,7 +130,7 @@ ENTRY(v3_cache_fns) | |||
129 | .long v3_flush_user_cache_range | 130 | .long v3_flush_user_cache_range |
130 | .long v3_coherent_kern_range | 131 | .long v3_coherent_kern_range |
131 | .long v3_coherent_user_range | 132 | .long v3_coherent_user_range |
132 | .long v3_flush_kern_dcache_page | 133 | .long v3_flush_kern_dcache_area |
133 | .long v3_dma_inv_range | 134 | .long v3_dma_inv_range |
134 | .long v3_dma_clean_range | 135 | .long v3_dma_clean_range |
135 | .long v3_dma_flush_range | 136 | .long v3_dma_flush_range |
diff --git a/arch/arm/mm/cache-v4.S b/arch/arm/mm/cache-v4.S index 3668611cb400..5c7da3e372e9 100644 --- a/arch/arm/mm/cache-v4.S +++ b/arch/arm/mm/cache-v4.S | |||
@@ -82,14 +82,15 @@ ENTRY(v4_coherent_user_range) | |||
82 | mov pc, lr | 82 | mov pc, lr |
83 | 83 | ||
84 | /* | 84 | /* |
85 | * flush_kern_dcache_page(void *page) | 85 | * flush_kern_dcache_area(void *addr, size_t size) |
86 | * | 86 | * |
87 | * Ensure no D cache aliasing occurs, either with itself or | 87 | * Ensure no D cache aliasing occurs, either with itself or |
88 | * the I cache | 88 | * the I cache |
89 | * | 89 | * |
90 | * - addr - page aligned address | 90 | * - addr - kernel address |
91 | * - size - region size | ||
91 | */ | 92 | */ |
92 | ENTRY(v4_flush_kern_dcache_page) | 93 | ENTRY(v4_flush_kern_dcache_area) |
93 | /* FALLTHROUGH */ | 94 | /* FALLTHROUGH */ |
94 | 95 | ||
95 | /* | 96 | /* |
@@ -141,7 +142,7 @@ ENTRY(v4_cache_fns) | |||
141 | .long v4_flush_user_cache_range | 142 | .long v4_flush_user_cache_range |
142 | .long v4_coherent_kern_range | 143 | .long v4_coherent_kern_range |
143 | .long v4_coherent_user_range | 144 | .long v4_coherent_user_range |
144 | .long v4_flush_kern_dcache_page | 145 | .long v4_flush_kern_dcache_area |
145 | .long v4_dma_inv_range | 146 | .long v4_dma_inv_range |
146 | .long v4_dma_clean_range | 147 | .long v4_dma_clean_range |
147 | .long v4_dma_flush_range | 148 | .long v4_dma_flush_range |
diff --git a/arch/arm/mm/cache-v4wb.S b/arch/arm/mm/cache-v4wb.S index 2ebc1b3bf856..3dbedf1ec0e7 100644 --- a/arch/arm/mm/cache-v4wb.S +++ b/arch/arm/mm/cache-v4wb.S | |||
@@ -114,15 +114,16 @@ ENTRY(v4wb_flush_user_cache_range) | |||
114 | mov pc, lr | 114 | mov pc, lr |
115 | 115 | ||
116 | /* | 116 | /* |
117 | * flush_kern_dcache_page(void *page) | 117 | * flush_kern_dcache_area(void *addr, size_t size) |
118 | * | 118 | * |
119 | * Ensure no D cache aliasing occurs, either with itself or | 119 | * Ensure no D cache aliasing occurs, either with itself or |
120 | * the I cache | 120 | * the I cache |
121 | * | 121 | * |
122 | * - addr - page aligned address | 122 | * - addr - kernel address |
123 | * - size - region size | ||
123 | */ | 124 | */ |
124 | ENTRY(v4wb_flush_kern_dcache_page) | 125 | ENTRY(v4wb_flush_kern_dcache_area) |
125 | add r1, r0, #PAGE_SZ | 126 | add r1, r0, r1 |
126 | /* fall through */ | 127 | /* fall through */ |
127 | 128 | ||
128 | /* | 129 | /* |
@@ -224,7 +225,7 @@ ENTRY(v4wb_cache_fns) | |||
224 | .long v4wb_flush_user_cache_range | 225 | .long v4wb_flush_user_cache_range |
225 | .long v4wb_coherent_kern_range | 226 | .long v4wb_coherent_kern_range |
226 | .long v4wb_coherent_user_range | 227 | .long v4wb_coherent_user_range |
227 | .long v4wb_flush_kern_dcache_page | 228 | .long v4wb_flush_kern_dcache_area |
228 | .long v4wb_dma_inv_range | 229 | .long v4wb_dma_inv_range |
229 | .long v4wb_dma_clean_range | 230 | .long v4wb_dma_clean_range |
230 | .long v4wb_dma_flush_range | 231 | .long v4wb_dma_flush_range |
diff --git a/arch/arm/mm/cache-v4wt.S b/arch/arm/mm/cache-v4wt.S index c54fa2cc40e6..b3b7410270b4 100644 --- a/arch/arm/mm/cache-v4wt.S +++ b/arch/arm/mm/cache-v4wt.S | |||
@@ -117,17 +117,18 @@ ENTRY(v4wt_coherent_user_range) | |||
117 | mov pc, lr | 117 | mov pc, lr |
118 | 118 | ||
119 | /* | 119 | /* |
120 | * flush_kern_dcache_page(void *page) | 120 | * flush_kern_dcache_area(void *addr, size_t size) |
121 | * | 121 | * |
122 | * Ensure no D cache aliasing occurs, either with itself or | 122 | * Ensure no D cache aliasing occurs, either with itself or |
123 | * the I cache | 123 | * the I cache |
124 | * | 124 | * |
125 | * - addr - page aligned address | 125 | * - addr - kernel address |
126 | * - size - region size | ||
126 | */ | 127 | */ |
127 | ENTRY(v4wt_flush_kern_dcache_page) | 128 | ENTRY(v4wt_flush_kern_dcache_area) |
128 | mov r2, #0 | 129 | mov r2, #0 |
129 | mcr p15, 0, r2, c7, c5, 0 @ invalidate I cache | 130 | mcr p15, 0, r2, c7, c5, 0 @ invalidate I cache |
130 | add r1, r0, #PAGE_SZ | 131 | add r1, r0, r1 |
131 | /* fallthrough */ | 132 | /* fallthrough */ |
132 | 133 | ||
133 | /* | 134 | /* |
@@ -180,7 +181,7 @@ ENTRY(v4wt_cache_fns) | |||
180 | .long v4wt_flush_user_cache_range | 181 | .long v4wt_flush_user_cache_range |
181 | .long v4wt_coherent_kern_range | 182 | .long v4wt_coherent_kern_range |
182 | .long v4wt_coherent_user_range | 183 | .long v4wt_coherent_user_range |
183 | .long v4wt_flush_kern_dcache_page | 184 | .long v4wt_flush_kern_dcache_area |
184 | .long v4wt_dma_inv_range | 185 | .long v4wt_dma_inv_range |
185 | .long v4wt_dma_clean_range | 186 | .long v4wt_dma_clean_range |
186 | .long v4wt_dma_flush_range | 187 | .long v4wt_dma_flush_range |
diff --git a/arch/arm/mm/cache-v6.S b/arch/arm/mm/cache-v6.S index 295e25dd6381..4ba0a24ce6f5 100644 --- a/arch/arm/mm/cache-v6.S +++ b/arch/arm/mm/cache-v6.S | |||
@@ -159,15 +159,16 @@ ENDPROC(v6_coherent_user_range) | |||
159 | ENDPROC(v6_coherent_kern_range) | 159 | ENDPROC(v6_coherent_kern_range) |
160 | 160 | ||
161 | /* | 161 | /* |
162 | * v6_flush_kern_dcache_page(kaddr) | 162 | * v6_flush_kern_dcache_area(void *addr, size_t size) |
163 | * | 163 | * |
164 | * Ensure that the data held in the page kaddr is written back | 164 | * Ensure that the data held in the page kaddr is written back |
165 | * to the page in question. | 165 | * to the page in question. |
166 | * | 166 | * |
167 | * - kaddr - kernel address (guaranteed to be page aligned) | 167 | * - addr - kernel address |
168 | * - size - region size | ||
168 | */ | 169 | */ |
169 | ENTRY(v6_flush_kern_dcache_page) | 170 | ENTRY(v6_flush_kern_dcache_area) |
170 | add r1, r0, #PAGE_SZ | 171 | add r1, r0, r1 |
171 | 1: | 172 | 1: |
172 | #ifdef HARVARD_CACHE | 173 | #ifdef HARVARD_CACHE |
173 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line | 174 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line |
@@ -271,7 +272,7 @@ ENTRY(v6_cache_fns) | |||
271 | .long v6_flush_user_cache_range | 272 | .long v6_flush_user_cache_range |
272 | .long v6_coherent_kern_range | 273 | .long v6_coherent_kern_range |
273 | .long v6_coherent_user_range | 274 | .long v6_coherent_user_range |
274 | .long v6_flush_kern_dcache_page | 275 | .long v6_flush_kern_dcache_area |
275 | .long v6_dma_inv_range | 276 | .long v6_dma_inv_range |
276 | .long v6_dma_clean_range | 277 | .long v6_dma_clean_range |
277 | .long v6_dma_flush_range | 278 | .long v6_dma_flush_range |
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index e1bd9759617f..9073db849fb4 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S | |||
@@ -186,16 +186,17 @@ ENDPROC(v7_coherent_kern_range) | |||
186 | ENDPROC(v7_coherent_user_range) | 186 | ENDPROC(v7_coherent_user_range) |
187 | 187 | ||
188 | /* | 188 | /* |
189 | * v7_flush_kern_dcache_page(kaddr) | 189 | * v7_flush_kern_dcache_area(void *addr, size_t size) |
190 | * | 190 | * |
191 | * Ensure that the data held in the page kaddr is written back | 191 | * Ensure that the data held in the page kaddr is written back |
192 | * to the page in question. | 192 | * to the page in question. |
193 | * | 193 | * |
194 | * - kaddr - kernel address (guaranteed to be page aligned) | 194 | * - addr - kernel address |
195 | * - size - region size | ||
195 | */ | 196 | */ |
196 | ENTRY(v7_flush_kern_dcache_page) | 197 | ENTRY(v7_flush_kern_dcache_area) |
197 | dcache_line_size r2, r3 | 198 | dcache_line_size r2, r3 |
198 | add r1, r0, #PAGE_SZ | 199 | add r1, r0, r1 |
199 | 1: | 200 | 1: |
200 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line | 201 | mcr p15, 0, r0, c7, c14, 1 @ clean & invalidate D line / unified line |
201 | add r0, r0, r2 | 202 | add r0, r0, r2 |
@@ -203,7 +204,7 @@ ENTRY(v7_flush_kern_dcache_page) | |||
203 | blo 1b | 204 | blo 1b |
204 | dsb | 205 | dsb |
205 | mov pc, lr | 206 | mov pc, lr |
206 | ENDPROC(v7_flush_kern_dcache_page) | 207 | ENDPROC(v7_flush_kern_dcache_area) |
207 | 208 | ||
208 | /* | 209 | /* |
209 | * v7_dma_inv_range(start,end) | 210 | * v7_dma_inv_range(start,end) |
@@ -279,7 +280,7 @@ ENTRY(v7_cache_fns) | |||
279 | .long v7_flush_user_cache_range | 280 | .long v7_flush_user_cache_range |
280 | .long v7_coherent_kern_range | 281 | .long v7_coherent_kern_range |
281 | .long v7_coherent_user_range | 282 | .long v7_coherent_user_range |
282 | .long v7_flush_kern_dcache_page | 283 | .long v7_flush_kern_dcache_area |
283 | .long v7_dma_inv_range | 284 | .long v7_dma_inv_range |
284 | .long v7_dma_clean_range | 285 | .long v7_dma_clean_range |
285 | .long v7_dma_flush_range | 286 | .long v7_dma_flush_range |
diff --git a/arch/arm/mm/flush.c b/arch/arm/mm/flush.c index 329594e760cd..6f3a4b7a3b82 100644 --- a/arch/arm/mm/flush.c +++ b/arch/arm/mm/flush.c | |||
@@ -131,7 +131,7 @@ void __flush_dcache_page(struct address_space *mapping, struct page *page) | |||
131 | */ | 131 | */ |
132 | if (addr) | 132 | if (addr) |
133 | #endif | 133 | #endif |
134 | __cpuc_flush_dcache_page(addr); | 134 | __cpuc_flush_dcache_area(addr, PAGE_SIZE); |
135 | 135 | ||
136 | /* | 136 | /* |
137 | * If this is a page cache page, and we have an aliasing VIPT cache, | 137 | * If this is a page cache page, and we have an aliasing VIPT cache, |
@@ -258,5 +258,5 @@ void __flush_anon_page(struct vm_area_struct *vma, struct page *page, unsigned l | |||
258 | * in this mapping of the page. FIXME: this is overkill | 258 | * in this mapping of the page. FIXME: this is overkill |
259 | * since we actually ask for a write-back and invalidate. | 259 | * since we actually ask for a write-back and invalidate. |
260 | */ | 260 | */ |
261 | __cpuc_flush_dcache_page(page_address(page)); | 261 | __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE); |
262 | } | 262 | } |
diff --git a/arch/arm/mm/highmem.c b/arch/arm/mm/highmem.c index 30f82fb5918c..2be1ec7c1b41 100644 --- a/arch/arm/mm/highmem.c +++ b/arch/arm/mm/highmem.c | |||
@@ -79,7 +79,7 @@ void kunmap_atomic(void *kvaddr, enum km_type type) | |||
79 | unsigned int idx = type + KM_TYPE_NR * smp_processor_id(); | 79 | unsigned int idx = type + KM_TYPE_NR * smp_processor_id(); |
80 | 80 | ||
81 | if (kvaddr >= (void *)FIXADDR_START) { | 81 | if (kvaddr >= (void *)FIXADDR_START) { |
82 | __cpuc_flush_dcache_page((void *)vaddr); | 82 | __cpuc_flush_dcache_area((void *)vaddr, PAGE_SIZE); |
83 | #ifdef CONFIG_DEBUG_HIGHMEM | 83 | #ifdef CONFIG_DEBUG_HIGHMEM |
84 | BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); | 84 | BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx)); |
85 | set_pte_ext(TOP_PTE(vaddr), __pte(0), 0); | 85 | set_pte_ext(TOP_PTE(vaddr), __pte(0), 0); |
diff --git a/arch/arm/mm/nommu.c b/arch/arm/mm/nommu.c index 900811cc9130..374a8311bc84 100644 --- a/arch/arm/mm/nommu.c +++ b/arch/arm/mm/nommu.c | |||
@@ -61,7 +61,7 @@ void setup_mm_for_reboot(char mode) | |||
61 | 61 | ||
62 | void flush_dcache_page(struct page *page) | 62 | void flush_dcache_page(struct page *page) |
63 | { | 63 | { |
64 | __cpuc_flush_dcache_page(page_address(page)); | 64 | __cpuc_flush_dcache_area(page_address(page), PAGE_SIZE); |
65 | } | 65 | } |
66 | EXPORT_SYMBOL(flush_dcache_page); | 66 | EXPORT_SYMBOL(flush_dcache_page); |
67 | 67 | ||
diff --git a/arch/arm/mm/proc-arm1020.S b/arch/arm/mm/proc-arm1020.S index d9fb4b98c49f..8012e24282b2 100644 --- a/arch/arm/mm/proc-arm1020.S +++ b/arch/arm/mm/proc-arm1020.S | |||
@@ -231,17 +231,18 @@ ENTRY(arm1020_coherent_user_range) | |||
231 | mov pc, lr | 231 | mov pc, lr |
232 | 232 | ||
233 | /* | 233 | /* |
234 | * flush_kern_dcache_page(void *page) | 234 | * flush_kern_dcache_area(void *addr, size_t size) |
235 | * | 235 | * |
236 | * Ensure no D cache aliasing occurs, either with itself or | 236 | * Ensure no D cache aliasing occurs, either with itself or |
237 | * the I cache | 237 | * the I cache |
238 | * | 238 | * |
239 | * - page - page aligned address | 239 | * - addr - kernel address |
240 | * - size - region size | ||
240 | */ | 241 | */ |
241 | ENTRY(arm1020_flush_kern_dcache_page) | 242 | ENTRY(arm1020_flush_kern_dcache_area) |
242 | mov ip, #0 | 243 | mov ip, #0 |
243 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 244 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
244 | add r1, r0, #PAGE_SZ | 245 | add r1, r0, r1 |
245 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 246 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
246 | mcr p15, 0, ip, c7, c10, 4 @ drain WB | 247 | mcr p15, 0, ip, c7, c10, 4 @ drain WB |
247 | add r0, r0, #CACHE_DLINESIZE | 248 | add r0, r0, #CACHE_DLINESIZE |
@@ -335,7 +336,7 @@ ENTRY(arm1020_cache_fns) | |||
335 | .long arm1020_flush_user_cache_range | 336 | .long arm1020_flush_user_cache_range |
336 | .long arm1020_coherent_kern_range | 337 | .long arm1020_coherent_kern_range |
337 | .long arm1020_coherent_user_range | 338 | .long arm1020_coherent_user_range |
338 | .long arm1020_flush_kern_dcache_page | 339 | .long arm1020_flush_kern_dcache_area |
339 | .long arm1020_dma_inv_range | 340 | .long arm1020_dma_inv_range |
340 | .long arm1020_dma_clean_range | 341 | .long arm1020_dma_clean_range |
341 | .long arm1020_dma_flush_range | 342 | .long arm1020_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm1020e.S b/arch/arm/mm/proc-arm1020e.S index 7453b75dcea5..41fe25d234f5 100644 --- a/arch/arm/mm/proc-arm1020e.S +++ b/arch/arm/mm/proc-arm1020e.S | |||
@@ -225,17 +225,18 @@ ENTRY(arm1020e_coherent_user_range) | |||
225 | mov pc, lr | 225 | mov pc, lr |
226 | 226 | ||
227 | /* | 227 | /* |
228 | * flush_kern_dcache_page(void *page) | 228 | * flush_kern_dcache_area(void *addr, size_t size) |
229 | * | 229 | * |
230 | * Ensure no D cache aliasing occurs, either with itself or | 230 | * Ensure no D cache aliasing occurs, either with itself or |
231 | * the I cache | 231 | * the I cache |
232 | * | 232 | * |
233 | * - page - page aligned address | 233 | * - addr - kernel address |
234 | * - size - region size | ||
234 | */ | 235 | */ |
235 | ENTRY(arm1020e_flush_kern_dcache_page) | 236 | ENTRY(arm1020e_flush_kern_dcache_area) |
236 | mov ip, #0 | 237 | mov ip, #0 |
237 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 238 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
238 | add r1, r0, #PAGE_SZ | 239 | add r1, r0, r1 |
239 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 240 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
240 | add r0, r0, #CACHE_DLINESIZE | 241 | add r0, r0, #CACHE_DLINESIZE |
241 | cmp r0, r1 | 242 | cmp r0, r1 |
@@ -321,7 +322,7 @@ ENTRY(arm1020e_cache_fns) | |||
321 | .long arm1020e_flush_user_cache_range | 322 | .long arm1020e_flush_user_cache_range |
322 | .long arm1020e_coherent_kern_range | 323 | .long arm1020e_coherent_kern_range |
323 | .long arm1020e_coherent_user_range | 324 | .long arm1020e_coherent_user_range |
324 | .long arm1020e_flush_kern_dcache_page | 325 | .long arm1020e_flush_kern_dcache_area |
325 | .long arm1020e_dma_inv_range | 326 | .long arm1020e_dma_inv_range |
326 | .long arm1020e_dma_clean_range | 327 | .long arm1020e_dma_clean_range |
327 | .long arm1020e_dma_flush_range | 328 | .long arm1020e_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm1022.S b/arch/arm/mm/proc-arm1022.S index 8eb72d75a8b6..20a5b1b31a70 100644 --- a/arch/arm/mm/proc-arm1022.S +++ b/arch/arm/mm/proc-arm1022.S | |||
@@ -214,17 +214,18 @@ ENTRY(arm1022_coherent_user_range) | |||
214 | mov pc, lr | 214 | mov pc, lr |
215 | 215 | ||
216 | /* | 216 | /* |
217 | * flush_kern_dcache_page(void *page) | 217 | * flush_kern_dcache_area(void *addr, size_t size) |
218 | * | 218 | * |
219 | * Ensure no D cache aliasing occurs, either with itself or | 219 | * Ensure no D cache aliasing occurs, either with itself or |
220 | * the I cache | 220 | * the I cache |
221 | * | 221 | * |
222 | * - page - page aligned address | 222 | * - addr - kernel address |
223 | * - size - region size | ||
223 | */ | 224 | */ |
224 | ENTRY(arm1022_flush_kern_dcache_page) | 225 | ENTRY(arm1022_flush_kern_dcache_area) |
225 | mov ip, #0 | 226 | mov ip, #0 |
226 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 227 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
227 | add r1, r0, #PAGE_SZ | 228 | add r1, r0, r1 |
228 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 229 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
229 | add r0, r0, #CACHE_DLINESIZE | 230 | add r0, r0, #CACHE_DLINESIZE |
230 | cmp r0, r1 | 231 | cmp r0, r1 |
@@ -310,7 +311,7 @@ ENTRY(arm1022_cache_fns) | |||
310 | .long arm1022_flush_user_cache_range | 311 | .long arm1022_flush_user_cache_range |
311 | .long arm1022_coherent_kern_range | 312 | .long arm1022_coherent_kern_range |
312 | .long arm1022_coherent_user_range | 313 | .long arm1022_coherent_user_range |
313 | .long arm1022_flush_kern_dcache_page | 314 | .long arm1022_flush_kern_dcache_area |
314 | .long arm1022_dma_inv_range | 315 | .long arm1022_dma_inv_range |
315 | .long arm1022_dma_clean_range | 316 | .long arm1022_dma_clean_range |
316 | .long arm1022_dma_flush_range | 317 | .long arm1022_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm1026.S b/arch/arm/mm/proc-arm1026.S index 3b59f0d67139..96aedb10fcc4 100644 --- a/arch/arm/mm/proc-arm1026.S +++ b/arch/arm/mm/proc-arm1026.S | |||
@@ -208,17 +208,18 @@ ENTRY(arm1026_coherent_user_range) | |||
208 | mov pc, lr | 208 | mov pc, lr |
209 | 209 | ||
210 | /* | 210 | /* |
211 | * flush_kern_dcache_page(void *page) | 211 | * flush_kern_dcache_area(void *addr, size_t size) |
212 | * | 212 | * |
213 | * Ensure no D cache aliasing occurs, either with itself or | 213 | * Ensure no D cache aliasing occurs, either with itself or |
214 | * the I cache | 214 | * the I cache |
215 | * | 215 | * |
216 | * - page - page aligned address | 216 | * - addr - kernel address |
217 | * - size - region size | ||
217 | */ | 218 | */ |
218 | ENTRY(arm1026_flush_kern_dcache_page) | 219 | ENTRY(arm1026_flush_kern_dcache_area) |
219 | mov ip, #0 | 220 | mov ip, #0 |
220 | #ifndef CONFIG_CPU_DCACHE_DISABLE | 221 | #ifndef CONFIG_CPU_DCACHE_DISABLE |
221 | add r1, r0, #PAGE_SZ | 222 | add r1, r0, r1 |
222 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 223 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
223 | add r0, r0, #CACHE_DLINESIZE | 224 | add r0, r0, #CACHE_DLINESIZE |
224 | cmp r0, r1 | 225 | cmp r0, r1 |
@@ -304,7 +305,7 @@ ENTRY(arm1026_cache_fns) | |||
304 | .long arm1026_flush_user_cache_range | 305 | .long arm1026_flush_user_cache_range |
305 | .long arm1026_coherent_kern_range | 306 | .long arm1026_coherent_kern_range |
306 | .long arm1026_coherent_user_range | 307 | .long arm1026_coherent_user_range |
307 | .long arm1026_flush_kern_dcache_page | 308 | .long arm1026_flush_kern_dcache_area |
308 | .long arm1026_dma_inv_range | 309 | .long arm1026_dma_inv_range |
309 | .long arm1026_dma_clean_range | 310 | .long arm1026_dma_clean_range |
310 | .long arm1026_dma_flush_range | 311 | .long arm1026_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm920.S b/arch/arm/mm/proc-arm920.S index 2b7c197cc58d..471669e2d7cb 100644 --- a/arch/arm/mm/proc-arm920.S +++ b/arch/arm/mm/proc-arm920.S | |||
@@ -207,15 +207,16 @@ ENTRY(arm920_coherent_user_range) | |||
207 | mov pc, lr | 207 | mov pc, lr |
208 | 208 | ||
209 | /* | 209 | /* |
210 | * flush_kern_dcache_page(void *page) | 210 | * flush_kern_dcache_area(void *addr, size_t size) |
211 | * | 211 | * |
212 | * Ensure no D cache aliasing occurs, either with itself or | 212 | * Ensure no D cache aliasing occurs, either with itself or |
213 | * the I cache | 213 | * the I cache |
214 | * | 214 | * |
215 | * - addr - page aligned address | 215 | * - addr - kernel address |
216 | * - size - region size | ||
216 | */ | 217 | */ |
217 | ENTRY(arm920_flush_kern_dcache_page) | 218 | ENTRY(arm920_flush_kern_dcache_area) |
218 | add r1, r0, #PAGE_SZ | 219 | add r1, r0, r1 |
219 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 220 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
220 | add r0, r0, #CACHE_DLINESIZE | 221 | add r0, r0, #CACHE_DLINESIZE |
221 | cmp r0, r1 | 222 | cmp r0, r1 |
@@ -293,7 +294,7 @@ ENTRY(arm920_cache_fns) | |||
293 | .long arm920_flush_user_cache_range | 294 | .long arm920_flush_user_cache_range |
294 | .long arm920_coherent_kern_range | 295 | .long arm920_coherent_kern_range |
295 | .long arm920_coherent_user_range | 296 | .long arm920_coherent_user_range |
296 | .long arm920_flush_kern_dcache_page | 297 | .long arm920_flush_kern_dcache_area |
297 | .long arm920_dma_inv_range | 298 | .long arm920_dma_inv_range |
298 | .long arm920_dma_clean_range | 299 | .long arm920_dma_clean_range |
299 | .long arm920_dma_flush_range | 300 | .long arm920_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm922.S b/arch/arm/mm/proc-arm922.S index 06a1aa4e3398..ee111b00fa41 100644 --- a/arch/arm/mm/proc-arm922.S +++ b/arch/arm/mm/proc-arm922.S | |||
@@ -209,15 +209,16 @@ ENTRY(arm922_coherent_user_range) | |||
209 | mov pc, lr | 209 | mov pc, lr |
210 | 210 | ||
211 | /* | 211 | /* |
212 | * flush_kern_dcache_page(void *page) | 212 | * flush_kern_dcache_area(void *addr, size_t size) |
213 | * | 213 | * |
214 | * Ensure no D cache aliasing occurs, either with itself or | 214 | * Ensure no D cache aliasing occurs, either with itself or |
215 | * the I cache | 215 | * the I cache |
216 | * | 216 | * |
217 | * - addr - page aligned address | 217 | * - addr - kernel address |
218 | * - size - region size | ||
218 | */ | 219 | */ |
219 | ENTRY(arm922_flush_kern_dcache_page) | 220 | ENTRY(arm922_flush_kern_dcache_area) |
220 | add r1, r0, #PAGE_SZ | 221 | add r1, r0, r1 |
221 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 222 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
222 | add r0, r0, #CACHE_DLINESIZE | 223 | add r0, r0, #CACHE_DLINESIZE |
223 | cmp r0, r1 | 224 | cmp r0, r1 |
@@ -295,7 +296,7 @@ ENTRY(arm922_cache_fns) | |||
295 | .long arm922_flush_user_cache_range | 296 | .long arm922_flush_user_cache_range |
296 | .long arm922_coherent_kern_range | 297 | .long arm922_coherent_kern_range |
297 | .long arm922_coherent_user_range | 298 | .long arm922_coherent_user_range |
298 | .long arm922_flush_kern_dcache_page | 299 | .long arm922_flush_kern_dcache_area |
299 | .long arm922_dma_inv_range | 300 | .long arm922_dma_inv_range |
300 | .long arm922_dma_clean_range | 301 | .long arm922_dma_clean_range |
301 | .long arm922_dma_flush_range | 302 | .long arm922_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm925.S b/arch/arm/mm/proc-arm925.S index cb53435a85ae..8deb5bde58e4 100644 --- a/arch/arm/mm/proc-arm925.S +++ b/arch/arm/mm/proc-arm925.S | |||
@@ -251,15 +251,16 @@ ENTRY(arm925_coherent_user_range) | |||
251 | mov pc, lr | 251 | mov pc, lr |
252 | 252 | ||
253 | /* | 253 | /* |
254 | * flush_kern_dcache_page(void *page) | 254 | * flush_kern_dcache_area(void *addr, size_t size) |
255 | * | 255 | * |
256 | * Ensure no D cache aliasing occurs, either with itself or | 256 | * Ensure no D cache aliasing occurs, either with itself or |
257 | * the I cache | 257 | * the I cache |
258 | * | 258 | * |
259 | * - addr - page aligned address | 259 | * - addr - kernel address |
260 | * - size - region size | ||
260 | */ | 261 | */ |
261 | ENTRY(arm925_flush_kern_dcache_page) | 262 | ENTRY(arm925_flush_kern_dcache_area) |
262 | add r1, r0, #PAGE_SZ | 263 | add r1, r0, r1 |
263 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 264 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
264 | add r0, r0, #CACHE_DLINESIZE | 265 | add r0, r0, #CACHE_DLINESIZE |
265 | cmp r0, r1 | 266 | cmp r0, r1 |
@@ -346,7 +347,7 @@ ENTRY(arm925_cache_fns) | |||
346 | .long arm925_flush_user_cache_range | 347 | .long arm925_flush_user_cache_range |
347 | .long arm925_coherent_kern_range | 348 | .long arm925_coherent_kern_range |
348 | .long arm925_coherent_user_range | 349 | .long arm925_coherent_user_range |
349 | .long arm925_flush_kern_dcache_page | 350 | .long arm925_flush_kern_dcache_area |
350 | .long arm925_dma_inv_range | 351 | .long arm925_dma_inv_range |
351 | .long arm925_dma_clean_range | 352 | .long arm925_dma_clean_range |
352 | .long arm925_dma_flush_range | 353 | .long arm925_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm926.S b/arch/arm/mm/proc-arm926.S index 1c4848704bb3..64db6e275a44 100644 --- a/arch/arm/mm/proc-arm926.S +++ b/arch/arm/mm/proc-arm926.S | |||
@@ -214,15 +214,16 @@ ENTRY(arm926_coherent_user_range) | |||
214 | mov pc, lr | 214 | mov pc, lr |
215 | 215 | ||
216 | /* | 216 | /* |
217 | * flush_kern_dcache_page(void *page) | 217 | * flush_kern_dcache_area(void *addr, size_t size) |
218 | * | 218 | * |
219 | * Ensure no D cache aliasing occurs, either with itself or | 219 | * Ensure no D cache aliasing occurs, either with itself or |
220 | * the I cache | 220 | * the I cache |
221 | * | 221 | * |
222 | * - addr - page aligned address | 222 | * - addr - kernel address |
223 | * - size - region size | ||
223 | */ | 224 | */ |
224 | ENTRY(arm926_flush_kern_dcache_page) | 225 | ENTRY(arm926_flush_kern_dcache_area) |
225 | add r1, r0, #PAGE_SZ | 226 | add r1, r0, r1 |
226 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 227 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
227 | add r0, r0, #CACHE_DLINESIZE | 228 | add r0, r0, #CACHE_DLINESIZE |
228 | cmp r0, r1 | 229 | cmp r0, r1 |
@@ -309,7 +310,7 @@ ENTRY(arm926_cache_fns) | |||
309 | .long arm926_flush_user_cache_range | 310 | .long arm926_flush_user_cache_range |
310 | .long arm926_coherent_kern_range | 311 | .long arm926_coherent_kern_range |
311 | .long arm926_coherent_user_range | 312 | .long arm926_coherent_user_range |
312 | .long arm926_flush_kern_dcache_page | 313 | .long arm926_flush_kern_dcache_area |
313 | .long arm926_dma_inv_range | 314 | .long arm926_dma_inv_range |
314 | .long arm926_dma_clean_range | 315 | .long arm926_dma_clean_range |
315 | .long arm926_dma_flush_range | 316 | .long arm926_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm940.S b/arch/arm/mm/proc-arm940.S index 5b0f8464c8f2..8196b9f401fb 100644 --- a/arch/arm/mm/proc-arm940.S +++ b/arch/arm/mm/proc-arm940.S | |||
@@ -141,14 +141,15 @@ ENTRY(arm940_coherent_user_range) | |||
141 | /* FALLTHROUGH */ | 141 | /* FALLTHROUGH */ |
142 | 142 | ||
143 | /* | 143 | /* |
144 | * flush_kern_dcache_page(void *page) | 144 | * flush_kern_dcache_area(void *addr, size_t size) |
145 | * | 145 | * |
146 | * Ensure no D cache aliasing occurs, either with itself or | 146 | * Ensure no D cache aliasing occurs, either with itself or |
147 | * the I cache | 147 | * the I cache |
148 | * | 148 | * |
149 | * - addr - page aligned address | 149 | * - addr - kernel address |
150 | * - size - region size | ||
150 | */ | 151 | */ |
151 | ENTRY(arm940_flush_kern_dcache_page) | 152 | ENTRY(arm940_flush_kern_dcache_area) |
152 | mov ip, #0 | 153 | mov ip, #0 |
153 | mov r1, #(CACHE_DSEGMENTS - 1) << 4 @ 4 segments | 154 | mov r1, #(CACHE_DSEGMENTS - 1) << 4 @ 4 segments |
154 | 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries | 155 | 1: orr r3, r1, #(CACHE_DENTRIES - 1) << 26 @ 64 entries |
@@ -238,7 +239,7 @@ ENTRY(arm940_cache_fns) | |||
238 | .long arm940_flush_user_cache_range | 239 | .long arm940_flush_user_cache_range |
239 | .long arm940_coherent_kern_range | 240 | .long arm940_coherent_kern_range |
240 | .long arm940_coherent_user_range | 241 | .long arm940_coherent_user_range |
241 | .long arm940_flush_kern_dcache_page | 242 | .long arm940_flush_kern_dcache_area |
242 | .long arm940_dma_inv_range | 243 | .long arm940_dma_inv_range |
243 | .long arm940_dma_clean_range | 244 | .long arm940_dma_clean_range |
244 | .long arm940_dma_flush_range | 245 | .long arm940_dma_flush_range |
diff --git a/arch/arm/mm/proc-arm946.S b/arch/arm/mm/proc-arm946.S index 40c0449a139b..9a951239c86c 100644 --- a/arch/arm/mm/proc-arm946.S +++ b/arch/arm/mm/proc-arm946.S | |||
@@ -183,16 +183,17 @@ ENTRY(arm946_coherent_user_range) | |||
183 | mov pc, lr | 183 | mov pc, lr |
184 | 184 | ||
185 | /* | 185 | /* |
186 | * flush_kern_dcache_page(void *page) | 186 | * flush_kern_dcache_area(void *addr, size_t size) |
187 | * | 187 | * |
188 | * Ensure no D cache aliasing occurs, either with itself or | 188 | * Ensure no D cache aliasing occurs, either with itself or |
189 | * the I cache | 189 | * the I cache |
190 | * | 190 | * |
191 | * - addr - page aligned address | 191 | * - addr - kernel address |
192 | * - size - region size | ||
192 | * (same as arm926) | 193 | * (same as arm926) |
193 | */ | 194 | */ |
194 | ENTRY(arm946_flush_kern_dcache_page) | 195 | ENTRY(arm946_flush_kern_dcache_area) |
195 | add r1, r0, #PAGE_SZ | 196 | add r1, r0, r1 |
196 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 197 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
197 | add r0, r0, #CACHE_DLINESIZE | 198 | add r0, r0, #CACHE_DLINESIZE |
198 | cmp r0, r1 | 199 | cmp r0, r1 |
@@ -280,7 +281,7 @@ ENTRY(arm946_cache_fns) | |||
280 | .long arm946_flush_user_cache_range | 281 | .long arm946_flush_user_cache_range |
281 | .long arm946_coherent_kern_range | 282 | .long arm946_coherent_kern_range |
282 | .long arm946_coherent_user_range | 283 | .long arm946_coherent_user_range |
283 | .long arm946_flush_kern_dcache_page | 284 | .long arm946_flush_kern_dcache_area |
284 | .long arm946_dma_inv_range | 285 | .long arm946_dma_inv_range |
285 | .long arm946_dma_clean_range | 286 | .long arm946_dma_clean_range |
286 | .long arm946_dma_flush_range | 287 | .long arm946_dma_flush_range |
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S index d0d7795200fc..dbc39383e66a 100644 --- a/arch/arm/mm/proc-feroceon.S +++ b/arch/arm/mm/proc-feroceon.S | |||
@@ -226,16 +226,17 @@ ENTRY(feroceon_coherent_user_range) | |||
226 | mov pc, lr | 226 | mov pc, lr |
227 | 227 | ||
228 | /* | 228 | /* |
229 | * flush_kern_dcache_page(void *page) | 229 | * flush_kern_dcache_area(void *addr, size_t size) |
230 | * | 230 | * |
231 | * Ensure no D cache aliasing occurs, either with itself or | 231 | * Ensure no D cache aliasing occurs, either with itself or |
232 | * the I cache | 232 | * the I cache |
233 | * | 233 | * |
234 | * - addr - page aligned address | 234 | * - addr - kernel address |
235 | * - size - region size | ||
235 | */ | 236 | */ |
236 | .align 5 | 237 | .align 5 |
237 | ENTRY(feroceon_flush_kern_dcache_page) | 238 | ENTRY(feroceon_flush_kern_dcache_area) |
238 | add r1, r0, #PAGE_SZ | 239 | add r1, r0, r1 |
239 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 240 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
240 | add r0, r0, #CACHE_DLINESIZE | 241 | add r0, r0, #CACHE_DLINESIZE |
241 | cmp r0, r1 | 242 | cmp r0, r1 |
@@ -246,7 +247,7 @@ ENTRY(feroceon_flush_kern_dcache_page) | |||
246 | mov pc, lr | 247 | mov pc, lr |
247 | 248 | ||
248 | .align 5 | 249 | .align 5 |
249 | ENTRY(feroceon_range_flush_kern_dcache_page) | 250 | ENTRY(feroceon_range_flush_kern_dcache_area) |
250 | mrs r2, cpsr | 251 | mrs r2, cpsr |
251 | add r1, r0, #PAGE_SZ - CACHE_DLINESIZE @ top addr is inclusive | 252 | add r1, r0, #PAGE_SZ - CACHE_DLINESIZE @ top addr is inclusive |
252 | orr r3, r2, #PSR_I_BIT | 253 | orr r3, r2, #PSR_I_BIT |
@@ -372,7 +373,7 @@ ENTRY(feroceon_cache_fns) | |||
372 | .long feroceon_flush_user_cache_range | 373 | .long feroceon_flush_user_cache_range |
373 | .long feroceon_coherent_kern_range | 374 | .long feroceon_coherent_kern_range |
374 | .long feroceon_coherent_user_range | 375 | .long feroceon_coherent_user_range |
375 | .long feroceon_flush_kern_dcache_page | 376 | .long feroceon_flush_kern_dcache_area |
376 | .long feroceon_dma_inv_range | 377 | .long feroceon_dma_inv_range |
377 | .long feroceon_dma_clean_range | 378 | .long feroceon_dma_clean_range |
378 | .long feroceon_dma_flush_range | 379 | .long feroceon_dma_flush_range |
@@ -383,7 +384,7 @@ ENTRY(feroceon_range_cache_fns) | |||
383 | .long feroceon_flush_user_cache_range | 384 | .long feroceon_flush_user_cache_range |
384 | .long feroceon_coherent_kern_range | 385 | .long feroceon_coherent_kern_range |
385 | .long feroceon_coherent_user_range | 386 | .long feroceon_coherent_user_range |
386 | .long feroceon_range_flush_kern_dcache_page | 387 | .long feroceon_range_flush_kern_dcache_area |
387 | .long feroceon_range_dma_inv_range | 388 | .long feroceon_range_dma_inv_range |
388 | .long feroceon_range_dma_clean_range | 389 | .long feroceon_range_dma_clean_range |
389 | .long feroceon_range_dma_flush_range | 390 | .long feroceon_range_dma_flush_range |
diff --git a/arch/arm/mm/proc-mohawk.S b/arch/arm/mm/proc-mohawk.S index 52b5fd74fbb3..9674d36cc97d 100644 --- a/arch/arm/mm/proc-mohawk.S +++ b/arch/arm/mm/proc-mohawk.S | |||
@@ -186,15 +186,16 @@ ENTRY(mohawk_coherent_user_range) | |||
186 | mov pc, lr | 186 | mov pc, lr |
187 | 187 | ||
188 | /* | 188 | /* |
189 | * flush_kern_dcache_page(void *page) | 189 | * flush_kern_dcache_area(void *addr, size_t size) |
190 | * | 190 | * |
191 | * Ensure no D cache aliasing occurs, either with itself or | 191 | * Ensure no D cache aliasing occurs, either with itself or |
192 | * the I cache | 192 | * the I cache |
193 | * | 193 | * |
194 | * - addr - page aligned address | 194 | * - addr - kernel address |
195 | * - size - region size | ||
195 | */ | 196 | */ |
196 | ENTRY(mohawk_flush_kern_dcache_page) | 197 | ENTRY(mohawk_flush_kern_dcache_area) |
197 | add r1, r0, #PAGE_SZ | 198 | add r1, r0, r1 |
198 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry | 199 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean+invalidate D entry |
199 | add r0, r0, #CACHE_DLINESIZE | 200 | add r0, r0, #CACHE_DLINESIZE |
200 | cmp r0, r1 | 201 | cmp r0, r1 |
@@ -273,7 +274,7 @@ ENTRY(mohawk_cache_fns) | |||
273 | .long mohawk_flush_user_cache_range | 274 | .long mohawk_flush_user_cache_range |
274 | .long mohawk_coherent_kern_range | 275 | .long mohawk_coherent_kern_range |
275 | .long mohawk_coherent_user_range | 276 | .long mohawk_coherent_user_range |
276 | .long mohawk_flush_kern_dcache_page | 277 | .long mohawk_flush_kern_dcache_area |
277 | .long mohawk_dma_inv_range | 278 | .long mohawk_dma_inv_range |
278 | .long mohawk_dma_clean_range | 279 | .long mohawk_dma_clean_range |
279 | .long mohawk_dma_flush_range | 280 | .long mohawk_dma_flush_range |
diff --git a/arch/arm/mm/proc-syms.c b/arch/arm/mm/proc-syms.c index ac5c80062b70..3e6210b4d6d4 100644 --- a/arch/arm/mm/proc-syms.c +++ b/arch/arm/mm/proc-syms.c | |||
@@ -27,8 +27,7 @@ EXPORT_SYMBOL(__cpuc_flush_kern_all); | |||
27 | EXPORT_SYMBOL(__cpuc_flush_user_all); | 27 | EXPORT_SYMBOL(__cpuc_flush_user_all); |
28 | EXPORT_SYMBOL(__cpuc_flush_user_range); | 28 | EXPORT_SYMBOL(__cpuc_flush_user_range); |
29 | EXPORT_SYMBOL(__cpuc_coherent_kern_range); | 29 | EXPORT_SYMBOL(__cpuc_coherent_kern_range); |
30 | EXPORT_SYMBOL(__cpuc_flush_dcache_page); | 30 | EXPORT_SYMBOL(__cpuc_flush_dcache_area); |
31 | EXPORT_SYMBOL(dmac_inv_range); /* because of flush_ioremap_region() */ | ||
32 | #else | 31 | #else |
33 | EXPORT_SYMBOL(cpu_cache); | 32 | EXPORT_SYMBOL(cpu_cache); |
34 | #endif | 33 | #endif |
diff --git a/arch/arm/mm/proc-v6.S b/arch/arm/mm/proc-v6.S index 5485c821101c..395cc90c6613 100644 --- a/arch/arm/mm/proc-v6.S +++ b/arch/arm/mm/proc-v6.S | |||
@@ -254,10 +254,9 @@ __pj4_v6_proc_info: | |||
254 | .long 0x560f5810 | 254 | .long 0x560f5810 |
255 | .long 0xff0ffff0 | 255 | .long 0xff0ffff0 |
256 | .long PMD_TYPE_SECT | \ | 256 | .long PMD_TYPE_SECT | \ |
257 | PMD_SECT_BUFFERABLE | \ | ||
258 | PMD_SECT_CACHEABLE | \ | ||
259 | PMD_SECT_AP_WRITE | \ | 257 | PMD_SECT_AP_WRITE | \ |
260 | PMD_SECT_AP_READ | 258 | PMD_SECT_AP_READ | \ |
259 | PMD_FLAGS | ||
261 | .long PMD_TYPE_SECT | \ | 260 | .long PMD_TYPE_SECT | \ |
262 | PMD_SECT_XN | \ | 261 | PMD_SECT_XN | \ |
263 | PMD_SECT_AP_WRITE | \ | 262 | PMD_SECT_AP_WRITE | \ |
diff --git a/arch/arm/mm/proc-xsc3.S b/arch/arm/mm/proc-xsc3.S index fab134e29826..96456f548798 100644 --- a/arch/arm/mm/proc-xsc3.S +++ b/arch/arm/mm/proc-xsc3.S | |||
@@ -226,15 +226,16 @@ ENTRY(xsc3_coherent_user_range) | |||
226 | mov pc, lr | 226 | mov pc, lr |
227 | 227 | ||
228 | /* | 228 | /* |
229 | * flush_kern_dcache_page(void *page) | 229 | * flush_kern_dcache_area(void *addr, size_t size) |
230 | * | 230 | * |
231 | * Ensure no D cache aliasing occurs, either with itself or | 231 | * Ensure no D cache aliasing occurs, either with itself or |
232 | * the I cache. | 232 | * the I cache. |
233 | * | 233 | * |
234 | * - addr - page aligned address | 234 | * - addr - kernel address |
235 | * - size - region size | ||
235 | */ | 236 | */ |
236 | ENTRY(xsc3_flush_kern_dcache_page) | 237 | ENTRY(xsc3_flush_kern_dcache_area) |
237 | add r1, r0, #PAGE_SZ | 238 | add r1, r0, r1 |
238 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line | 239 | 1: mcr p15, 0, r0, c7, c14, 1 @ clean/invalidate L1 D line |
239 | add r0, r0, #CACHELINESIZE | 240 | add r0, r0, #CACHELINESIZE |
240 | cmp r0, r1 | 241 | cmp r0, r1 |
@@ -309,7 +310,7 @@ ENTRY(xsc3_cache_fns) | |||
309 | .long xsc3_flush_user_cache_range | 310 | .long xsc3_flush_user_cache_range |
310 | .long xsc3_coherent_kern_range | 311 | .long xsc3_coherent_kern_range |
311 | .long xsc3_coherent_user_range | 312 | .long xsc3_coherent_user_range |
312 | .long xsc3_flush_kern_dcache_page | 313 | .long xsc3_flush_kern_dcache_area |
313 | .long xsc3_dma_inv_range | 314 | .long xsc3_dma_inv_range |
314 | .long xsc3_dma_clean_range | 315 | .long xsc3_dma_clean_range |
315 | .long xsc3_dma_flush_range | 316 | .long xsc3_dma_flush_range |
diff --git a/arch/arm/mm/proc-xscale.S b/arch/arm/mm/proc-xscale.S index f056c283682d..93df47265f2d 100644 --- a/arch/arm/mm/proc-xscale.S +++ b/arch/arm/mm/proc-xscale.S | |||
@@ -284,15 +284,16 @@ ENTRY(xscale_coherent_user_range) | |||
284 | mov pc, lr | 284 | mov pc, lr |
285 | 285 | ||
286 | /* | 286 | /* |
287 | * flush_kern_dcache_page(void *page) | 287 | * flush_kern_dcache_area(void *addr, size_t size) |
288 | * | 288 | * |
289 | * Ensure no D cache aliasing occurs, either with itself or | 289 | * Ensure no D cache aliasing occurs, either with itself or |
290 | * the I cache | 290 | * the I cache |
291 | * | 291 | * |
292 | * - addr - page aligned address | 292 | * - addr - kernel address |
293 | * - size - region size | ||
293 | */ | 294 | */ |
294 | ENTRY(xscale_flush_kern_dcache_page) | 295 | ENTRY(xscale_flush_kern_dcache_area) |
295 | add r1, r0, #PAGE_SZ | 296 | add r1, r0, r1 |
296 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry | 297 | 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry |
297 | mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry | 298 | mcr p15, 0, r0, c7, c6, 1 @ invalidate D entry |
298 | add r0, r0, #CACHELINESIZE | 299 | add r0, r0, #CACHELINESIZE |
@@ -368,7 +369,7 @@ ENTRY(xscale_cache_fns) | |||
368 | .long xscale_flush_user_cache_range | 369 | .long xscale_flush_user_cache_range |
369 | .long xscale_coherent_kern_range | 370 | .long xscale_coherent_kern_range |
370 | .long xscale_coherent_user_range | 371 | .long xscale_coherent_user_range |
371 | .long xscale_flush_kern_dcache_page | 372 | .long xscale_flush_kern_dcache_area |
372 | .long xscale_dma_inv_range | 373 | .long xscale_dma_inv_range |
373 | .long xscale_dma_clean_range | 374 | .long xscale_dma_clean_range |
374 | .long xscale_dma_flush_range | 375 | .long xscale_dma_flush_range |
@@ -392,7 +393,7 @@ ENTRY(xscale_80200_A0_A1_cache_fns) | |||
392 | .long xscale_flush_user_cache_range | 393 | .long xscale_flush_user_cache_range |
393 | .long xscale_coherent_kern_range | 394 | .long xscale_coherent_kern_range |
394 | .long xscale_coherent_user_range | 395 | .long xscale_coherent_user_range |
395 | .long xscale_flush_kern_dcache_page | 396 | .long xscale_flush_kern_dcache_area |
396 | .long xscale_dma_flush_range | 397 | .long xscale_dma_flush_range |
397 | .long xscale_dma_clean_range | 398 | .long xscale_dma_clean_range |
398 | .long xscale_dma_flush_range | 399 | .long xscale_dma_flush_range |
diff --git a/arch/arm/tools/Makefile b/arch/arm/tools/Makefile index 1dbaa29ac4d7..635cb1865e4d 100644 --- a/arch/arm/tools/Makefile +++ b/arch/arm/tools/Makefile | |||
@@ -4,7 +4,7 @@ | |||
4 | # Copyright (C) 2001 Russell King | 4 | # Copyright (C) 2001 Russell King |
5 | # | 5 | # |
6 | 6 | ||
7 | include/asm-arm/mach-types.h: $(src)/gen-mach-types $(src)/mach-types | 7 | include/generated/mach-types.h: $(src)/gen-mach-types $(src)/mach-types |
8 | @echo ' Generating $@' | 8 | @echo ' Generating $@' |
9 | @mkdir -p $(dir $@) | 9 | @mkdir -p $(dir $@) |
10 | $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } | 10 | $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } |
diff --git a/arch/arm/tools/gen-mach-types b/arch/arm/tools/gen-mach-types index ce319ef64bc1..04fef71d7be9 100644 --- a/arch/arm/tools/gen-mach-types +++ b/arch/arm/tools/gen-mach-types | |||
@@ -1,6 +1,6 @@ | |||
1 | #!/bin/awk | 1 | #!/bin/awk |
2 | # | 2 | # |
3 | # Awk script to generate include/asm-arm/mach-types.h | 3 | # Awk script to generate include/generated/mach-types.h |
4 | # | 4 | # |
5 | BEGIN { nr = 0 } | 5 | BEGIN { nr = 0 } |
6 | /^#/ { next } | 6 | /^#/ { next } |
diff --git a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types index 07b976da6174..c3a74ce24ef6 100644 --- a/arch/arm/tools/mach-types +++ b/arch/arm/tools/mach-types | |||
@@ -12,7 +12,7 @@ | |||
12 | # | 12 | # |
13 | # http://www.arm.linux.org.uk/developer/machines/?action=new | 13 | # http://www.arm.linux.org.uk/developer/machines/?action=new |
14 | # | 14 | # |
15 | # Last update: Wed Nov 25 22:14:58 2009 | 15 | # Last update: Wed Dec 16 20:06:34 2009 |
16 | # | 16 | # |
17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number | 17 | # machine_is_xxx CONFIG_xxxx MACH_TYPE_xxx number |
18 | # | 18 | # |
@@ -1776,6 +1776,7 @@ cybook3 MACH_CYBOOK3 CYBOOK3 1784 | |||
1776 | wdg002 MACH_WDG002 WDG002 1785 | 1776 | wdg002 MACH_WDG002 WDG002 1785 |
1777 | sg560adsl MACH_SG560ADSL SG560ADSL 1786 | 1777 | sg560adsl MACH_SG560ADSL SG560ADSL 1786 |
1778 | nextio_n2800_ica MACH_NEXTIO_N2800_ICA NEXTIO_N2800_ICA 1787 | 1778 | nextio_n2800_ica MACH_NEXTIO_N2800_ICA NEXTIO_N2800_ICA 1787 |
1779 | dove_db MACH_DOVE_DB DOVE_DB 1788 | ||
1779 | marvell_newdb MACH_MARVELL_NEWDB MARVELL_NEWDB 1789 | 1780 | marvell_newdb MACH_MARVELL_NEWDB MARVELL_NEWDB 1789 |
1780 | vandihud MACH_VANDIHUD VANDIHUD 1790 | 1781 | vandihud MACH_VANDIHUD VANDIHUD 1790 |
1781 | magx_e8 MACH_MAGX_E8 MAGX_E8 1791 | 1782 | magx_e8 MACH_MAGX_E8 MAGX_E8 1791 |
@@ -2536,3 +2537,44 @@ c3ax03 MACH_C3AX03 C3AX03 2549 | |||
2536 | mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 | 2537 | mxt_td60 MACH_MXT_TD60 MXT_TD60 2550 |
2537 | esyx MACH_ESYX ESYX 2551 | 2538 | esyx MACH_ESYX ESYX 2551 |
2538 | bulldog MACH_BULLDOG BULLDOG 2553 | 2539 | bulldog MACH_BULLDOG BULLDOG 2553 |
2540 | derell_me2000 MACH_DERELL_ME2000 DERELL_ME2000 2554 | ||
2541 | bcmring_base MACH_BCMRING_BASE BCMRING_BASE 2555 | ||
2542 | bcmring_evm MACH_BCMRING_EVM BCMRING_EVM 2556 | ||
2543 | bcmring_evm_jazz MACH_BCMRING_EVM_JAZZ BCMRING_EVM_JAZZ 2557 | ||
2544 | bcmring_sp MACH_BCMRING_SP BCMRING_SP 2558 | ||
2545 | bcmring_sv MACH_BCMRING_SV BCMRING_SV 2559 | ||
2546 | bcmring_sv_jazz MACH_BCMRING_SV_JAZZ BCMRING_SV_JAZZ 2560 | ||
2547 | bcmring_tablet MACH_BCMRING_TABLET BCMRING_TABLET 2561 | ||
2548 | bcmring_vp MACH_BCMRING_VP BCMRING_VP 2562 | ||
2549 | bcmring_evm_seikor MACH_BCMRING_EVM_SEIKOR BCMRING_EVM_SEIKOR 2563 | ||
2550 | bcmring_sp_wqvga MACH_BCMRING_SP_WQVGA BCMRING_SP_WQVGA 2564 | ||
2551 | bcmring_custom MACH_BCMRING_CUSTOM BCMRING_CUSTOM 2565 | ||
2552 | acer_s200 MACH_ACER_S200 ACER_S200 2566 | ||
2553 | bt270 MACH_BT270 BT270 2567 | ||
2554 | iseo MACH_ISEO ISEO 2568 | ||
2555 | cezanne MACH_CEZANNE CEZANNE 2569 | ||
2556 | lucca MACH_LUCCA LUCCA 2570 | ||
2557 | supersmart MACH_SUPERSMART SUPERSMART 2571 | ||
2558 | magnolia2 MACH_MAGNOLIA2 MAGNOLIA2 2573 | ||
2559 | emxx MACH_EMXX EMXX 2574 | ||
2560 | outlaw MACH_OUTLAW OUTLAW 2575 | ||
2561 | riot_bei2 MACH_RIOT_BEI2 RIOT_BEI2 2576 | ||
2562 | riot_vox MACH_RIOT_VOX RIOT_VOX 2577 | ||
2563 | riot_x37 MACH_RIOT_X37 RIOT_X37 2578 | ||
2564 | mega25mx MACH_MEGA25MX MEGA25MX 2579 | ||
2565 | benzina2 MACH_BENZINA2 BENZINA2 2580 | ||
2566 | ignite MACH_IGNITE IGNITE 2581 | ||
2567 | foggia MACH_FOGGIA FOGGIA 2582 | ||
2568 | arezzo MACH_AREZZO AREZZO 2583 | ||
2569 | leica_skywalker MACH_LEICA_SKYWALKER LEICA_SKYWALKER 2584 | ||
2570 | jacinto2_jamr MACH_JACINTO2_JAMR JACINTO2_JAMR 2585 | ||
2571 | gts_nova MACH_GTS_NOVA GTS_NOVA 2586 | ||
2572 | p3600 MACH_P3600 P3600 2587 | ||
2573 | dlt2 MACH_DLT2 DLT2 2588 | ||
2574 | df3120 MACH_DF3120 DF3120 2589 | ||
2575 | ecucore_9g20 MACH_ECUCORE_9G20 ECUCORE_9G20 2590 | ||
2576 | nautel_lpc3240 MACH_NAUTEL_LPC3240 NAUTEL_LPC3240 2591 | ||
2577 | glacier MACH_GLACIER GLACIER 2592 | ||
2578 | phrazer_bulldog MACH_PHRAZER_BULLDOG PHRAZER_BULLDOG 2593 | ||
2579 | omap3_bulldog MACH_OMAP3_BULLDOG OMAP3_BULLDOG 2594 | ||
2580 | pca101 MACH_PCA101 PCA101 2595 | ||
diff --git a/arch/avr32/include/asm/asm-offsets.h b/arch/avr32/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/avr32/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/blackfin/include/asm/asm-offsets.h b/arch/blackfin/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/blackfin/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/cris/arch-v32/kernel/head.S b/arch/cris/arch-v32/kernel/head.S index 3db478eb5155..76266f80a5f1 100644 --- a/arch/cris/arch-v32/kernel/head.S +++ b/arch/cris/arch-v32/kernel/head.S | |||
@@ -10,7 +10,6 @@ | |||
10 | * The macros found in mmu_defs_asm.h uses the ## concatenation operator, so | 10 | * The macros found in mmu_defs_asm.h uses the ## concatenation operator, so |
11 | * -traditional must not be used when assembling this file. | 11 | * -traditional must not be used when assembling this file. |
12 | */ | 12 | */ |
13 | #include <linux/autoconf.h> | ||
14 | #include <arch/memmap.h> | 13 | #include <arch/memmap.h> |
15 | #include <hwregs/reg_rdwr.h> | 14 | #include <hwregs/reg_rdwr.h> |
16 | #include <hwregs/intr_vect.h> | 15 | #include <hwregs/intr_vect.h> |
diff --git a/arch/cris/include/asm/asm-offsets.h b/arch/cris/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/cris/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/cris/kernel/asm-offsets.c b/arch/cris/kernel/asm-offsets.c index ddd6fbbe75de..dd7b8e983221 100644 --- a/arch/cris/kernel/asm-offsets.c +++ b/arch/cris/kernel/asm-offsets.c | |||
@@ -1,6 +1,5 @@ | |||
1 | #include <linux/sched.h> | 1 | #include <linux/sched.h> |
2 | #include <asm/thread_info.h> | 2 | #include <asm/thread_info.h> |
3 | #include <linux/autoconf.h> | ||
4 | 3 | ||
5 | /* | 4 | /* |
6 | * Generate definitions needed by assembly language modules. | 5 | * Generate definitions needed by assembly language modules. |
diff --git a/arch/cris/kernel/vmlinux.lds.S b/arch/cris/kernel/vmlinux.lds.S index bbfda67d2907..d49d17d2a14f 100644 --- a/arch/cris/kernel/vmlinux.lds.S +++ b/arch/cris/kernel/vmlinux.lds.S | |||
@@ -8,7 +8,6 @@ | |||
8 | * the kernel has booted. | 8 | * the kernel has booted. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #include <linux/autoconf.h> | ||
12 | #include <asm-generic/vmlinux.lds.h> | 11 | #include <asm-generic/vmlinux.lds.h> |
13 | #include <asm/page.h> | 12 | #include <asm/page.h> |
14 | 13 | ||
diff --git a/arch/frv/include/asm/asm-offsets.h b/arch/frv/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/frv/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/frv/kernel/setup.c b/arch/frv/kernel/setup.c index 55e4fab7c0bc..75cf7f4b2fa8 100644 --- a/arch/frv/kernel/setup.c +++ b/arch/frv/kernel/setup.c | |||
@@ -10,7 +10,7 @@ | |||
10 | * 2 of the License, or (at your option) any later version. | 10 | * 2 of the License, or (at your option) any later version. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #include <linux/utsrelease.h> | 13 | #include <generated/utsrelease.h> |
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
15 | #include <linux/sched.h> | 15 | #include <linux/sched.h> |
16 | #include <linux/delay.h> | 16 | #include <linux/delay.h> |
diff --git a/arch/h8300/include/asm/asm-offsets.h b/arch/h8300/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/h8300/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/ia64/Makefile b/arch/ia64/Makefile index e7cbaa02cd0b..475e2725fbde 100644 --- a/arch/ia64/Makefile +++ b/arch/ia64/Makefile | |||
@@ -103,4 +103,4 @@ archprepare: make_nr_irqs_h FORCE | |||
103 | PHONY += make_nr_irqs_h FORCE | 103 | PHONY += make_nr_irqs_h FORCE |
104 | 104 | ||
105 | make_nr_irqs_h: FORCE | 105 | make_nr_irqs_h: FORCE |
106 | $(Q)$(MAKE) $(build)=arch/ia64/kernel include/asm-ia64/nr-irqs.h | 106 | $(Q)$(MAKE) $(build)=arch/ia64/kernel include/generated/nr-irqs.h |
diff --git a/arch/ia64/include/asm/asm-offsets.h b/arch/ia64/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/ia64/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/ia64/include/asm/irq.h b/arch/ia64/include/asm/irq.h index 5282546cdf82..91b920fd7d53 100644 --- a/arch/ia64/include/asm/irq.h +++ b/arch/ia64/include/asm/irq.h | |||
@@ -13,7 +13,7 @@ | |||
13 | 13 | ||
14 | #include <linux/types.h> | 14 | #include <linux/types.h> |
15 | #include <linux/cpumask.h> | 15 | #include <linux/cpumask.h> |
16 | #include <asm-ia64/nr-irqs.h> | 16 | #include <generated/nr-irqs.h> |
17 | 17 | ||
18 | static __inline__ int | 18 | static __inline__ int |
19 | irq_canonicalize (int irq) | 19 | irq_canonicalize (int irq) |
diff --git a/arch/ia64/kernel/Makefile b/arch/ia64/kernel/Makefile index 6b7edcab0cb5..2a75e937ae8d 100644 --- a/arch/ia64/kernel/Makefile +++ b/arch/ia64/kernel/Makefile | |||
@@ -81,17 +81,14 @@ define cmd_nr_irqs | |||
81 | endef | 81 | endef |
82 | 82 | ||
83 | # We use internal kbuild rules to avoid the "is up to date" message from make | 83 | # We use internal kbuild rules to avoid the "is up to date" message from make |
84 | arch/$(SRCARCH)/kernel/nr-irqs.s: $(srctree)/arch/$(SRCARCH)/kernel/nr-irqs.c \ | 84 | arch/$(SRCARCH)/kernel/nr-irqs.s: arch/$(SRCARCH)/kernel/nr-irqs.c |
85 | $(wildcard $(srctree)/include/asm-ia64/*/irq.h) | ||
86 | $(Q)mkdir -p $(dir $@) | 85 | $(Q)mkdir -p $(dir $@) |
87 | $(call if_changed_dep,cc_s_c) | 86 | $(call if_changed_dep,cc_s_c) |
88 | 87 | ||
89 | include/asm-ia64/nr-irqs.h: arch/$(SRCARCH)/kernel/nr-irqs.s | 88 | include/generated/nr-irqs.h: arch/$(SRCARCH)/kernel/nr-irqs.s |
90 | $(Q)mkdir -p $(dir $@) | 89 | $(Q)mkdir -p $(dir $@) |
91 | $(call cmd,nr_irqs) | 90 | $(call cmd,nr_irqs) |
92 | 91 | ||
93 | clean-files += $(objtree)/include/asm-ia64/nr-irqs.h | ||
94 | |||
95 | # | 92 | # |
96 | # native ivt.S, entry.S and fsys.S | 93 | # native ivt.S, entry.S and fsys.S |
97 | # | 94 | # |
diff --git a/arch/ia64/kvm/asm-offsets.c b/arch/ia64/kvm/asm-offsets.c index 0c3564a7a033..9324c875caf5 100644 --- a/arch/ia64/kvm/asm-offsets.c +++ b/arch/ia64/kvm/asm-offsets.c | |||
@@ -22,7 +22,6 @@ | |||
22 | * | 22 | * |
23 | */ | 23 | */ |
24 | 24 | ||
25 | #include <linux/autoconf.h> | ||
26 | #include <linux/kvm_host.h> | 25 | #include <linux/kvm_host.h> |
27 | #include <linux/kbuild.h> | 26 | #include <linux/kbuild.h> |
28 | 27 | ||
diff --git a/arch/m68k/include/asm/asm-offsets.h b/arch/m68k/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/m68k/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/m68k/kernel/head.S b/arch/m68k/kernel/head.S index 86edb5fbcfc3..ef54128baa0b 100644 --- a/arch/m68k/kernel/head.S +++ b/arch/m68k/kernel/head.S | |||
@@ -196,7 +196,7 @@ | |||
196 | * for them and trying to understand what they mean. | 196 | * for them and trying to understand what they mean. |
197 | * | 197 | * |
198 | * CONFIG_xxx: These are the obvious machine configuration defines created | 198 | * CONFIG_xxx: These are the obvious machine configuration defines created |
199 | * during configuration. These are defined in include/linux/autoconf.h. | 199 | * during configuration. These are defined in autoconf.h. |
200 | * | 200 | * |
201 | * CONSOLE: There is support for head.S console in this file. This | 201 | * CONSOLE: There is support for head.S console in this file. This |
202 | * console can talk to a Mac frame buffer, but could easily be extrapolated | 202 | * console can talk to a Mac frame buffer, but could easily be extrapolated |
diff --git a/arch/microblaze/include/asm/asm-offsets.h b/arch/microblaze/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/microblaze/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index fd7620f025fa..9541171f1220 100644 --- a/arch/mips/Kconfig +++ b/arch/mips/Kconfig | |||
@@ -5,9 +5,12 @@ config MIPS | |||
5 | select HAVE_IDE | 5 | select HAVE_IDE |
6 | select HAVE_OPROFILE | 6 | select HAVE_OPROFILE |
7 | select HAVE_ARCH_KGDB | 7 | select HAVE_ARCH_KGDB |
8 | # Horrible source of confusion. Die, die, die ... | 8 | select HAVE_FUNCTION_TRACER |
9 | select EMBEDDED | 9 | select HAVE_FUNCTION_TRACE_MCOUNT_TEST |
10 | select RTC_LIB if !LEMOTE_FULOONG2E | 10 | select HAVE_DYNAMIC_FTRACE |
11 | select HAVE_FTRACE_MCOUNT_RECORD | ||
12 | select HAVE_FUNCTION_GRAPH_TRACER | ||
13 | select RTC_LIB if !MACH_LOONGSON | ||
11 | 14 | ||
12 | mainmenu "Linux/MIPS Kernel Configuration" | 15 | mainmenu "Linux/MIPS Kernel Configuration" |
13 | 16 | ||
@@ -22,6 +25,7 @@ choice | |||
22 | 25 | ||
23 | config MACH_ALCHEMY | 26 | config MACH_ALCHEMY |
24 | bool "Alchemy processor based machines" | 27 | bool "Alchemy processor based machines" |
28 | select SYS_SUPPORTS_ZBOOT | ||
25 | 29 | ||
26 | config AR7 | 30 | config AR7 |
27 | bool "Texas Instruments AR7" | 31 | bool "Texas Instruments AR7" |
@@ -36,6 +40,7 @@ config AR7 | |||
36 | select SYS_HAS_EARLY_PRINTK | 40 | select SYS_HAS_EARLY_PRINTK |
37 | select SYS_SUPPORTS_32BIT_KERNEL | 41 | select SYS_SUPPORTS_32BIT_KERNEL |
38 | select SYS_SUPPORTS_LITTLE_ENDIAN | 42 | select SYS_SUPPORTS_LITTLE_ENDIAN |
43 | select SYS_SUPPORTS_ZBOOT_UART16550 | ||
39 | select GENERIC_GPIO | 44 | select GENERIC_GPIO |
40 | select GCD | 45 | select GCD |
41 | select VLYNQ | 46 | select VLYNQ |
@@ -43,23 +48,6 @@ config AR7 | |||
43 | Support for the Texas Instruments AR7 System-on-a-Chip | 48 | Support for the Texas Instruments AR7 System-on-a-Chip |
44 | family: TNETD7100, 7200 and 7300. | 49 | family: TNETD7100, 7200 and 7300. |
45 | 50 | ||
46 | config BASLER_EXCITE | ||
47 | bool "Basler eXcite smart camera" | ||
48 | select CEVT_R4K | ||
49 | select CSRC_R4K | ||
50 | select DMA_COHERENT | ||
51 | select HW_HAS_PCI | ||
52 | select IRQ_CPU | ||
53 | select IRQ_CPU_RM7K | ||
54 | select IRQ_CPU_RM9K | ||
55 | select MIPS_RM9122 | ||
56 | select SYS_HAS_CPU_RM9000 | ||
57 | select SYS_SUPPORTS_32BIT_KERNEL | ||
58 | select SYS_SUPPORTS_BIG_ENDIAN | ||
59 | help | ||
60 | The eXcite is a smart camera platform manufactured by | ||
61 | Basler Vision Technologies AG. | ||
62 | |||
63 | config BCM47XX | 51 | config BCM47XX |
64 | bool "BCM47XX based boards" | 52 | bool "BCM47XX based boards" |
65 | select CEVT_R4K | 53 | select CEVT_R4K |
@@ -192,6 +180,7 @@ config LASAT | |||
192 | 180 | ||
193 | config MACH_LOONGSON | 181 | config MACH_LOONGSON |
194 | bool "Loongson family of machines" | 182 | bool "Loongson family of machines" |
183 | select SYS_SUPPORTS_ZBOOT_UART16550 | ||
195 | help | 184 | help |
196 | This enables the support of Loongson family of machines. | 185 | This enables the support of Loongson family of machines. |
197 | 186 | ||
@@ -233,6 +222,7 @@ config MIPS_MALTA | |||
233 | select SYS_SUPPORTS_MIPS_CMP | 222 | select SYS_SUPPORTS_MIPS_CMP |
234 | select SYS_SUPPORTS_MULTITHREADING | 223 | select SYS_SUPPORTS_MULTITHREADING |
235 | select SYS_SUPPORTS_SMARTMIPS | 224 | select SYS_SUPPORTS_SMARTMIPS |
225 | select SYS_SUPPORTS_ZBOOT | ||
236 | help | 226 | help |
237 | This enables support for the MIPS Technologies Malta evaluation | 227 | This enables support for the MIPS Technologies Malta evaluation |
238 | board. | 228 | board. |
@@ -334,6 +324,24 @@ config PMC_YOSEMITE | |||
334 | Yosemite is an evaluation board for the RM9000x2 processor | 324 | Yosemite is an evaluation board for the RM9000x2 processor |
335 | manufactured by PMC-Sierra. | 325 | manufactured by PMC-Sierra. |
336 | 326 | ||
327 | config POWERTV | ||
328 | bool "Cisco PowerTV" | ||
329 | select BOOT_ELF32 | ||
330 | select CEVT_R4K | ||
331 | select CPU_MIPSR2_IRQ_VI | ||
332 | select CPU_MIPSR2_IRQ_EI | ||
333 | select CSRC_POWERTV | ||
334 | select DMA_NONCOHERENT | ||
335 | select HW_HAS_PCI | ||
336 | select SYS_HAS_EARLY_PRINTK | ||
337 | select SYS_HAS_CPU_MIPS32_R2 | ||
338 | select SYS_SUPPORTS_32BIT_KERNEL | ||
339 | select SYS_SUPPORTS_BIG_ENDIAN | ||
340 | select SYS_SUPPORTS_HIGHMEM | ||
341 | select USB_OHCI_LITTLE_ENDIAN | ||
342 | help | ||
343 | This enables support for the Cisco PowerTV Platform. | ||
344 | |||
337 | config SGI_IP22 | 345 | config SGI_IP22 |
338 | bool "SGI IP22 (Indy/Indigo2)" | 346 | bool "SGI IP22 (Indy/Indigo2)" |
339 | select ARC | 347 | select ARC |
@@ -674,11 +682,11 @@ config CAVIUM_OCTEON_REFERENCE_BOARD | |||
674 | endchoice | 682 | endchoice |
675 | 683 | ||
676 | source "arch/mips/alchemy/Kconfig" | 684 | source "arch/mips/alchemy/Kconfig" |
677 | source "arch/mips/basler/excite/Kconfig" | ||
678 | source "arch/mips/bcm63xx/Kconfig" | 685 | source "arch/mips/bcm63xx/Kconfig" |
679 | source "arch/mips/jazz/Kconfig" | 686 | source "arch/mips/jazz/Kconfig" |
680 | source "arch/mips/lasat/Kconfig" | 687 | source "arch/mips/lasat/Kconfig" |
681 | source "arch/mips/pmc-sierra/Kconfig" | 688 | source "arch/mips/pmc-sierra/Kconfig" |
689 | source "arch/mips/powertv/Kconfig" | ||
682 | source "arch/mips/sgi-ip27/Kconfig" | 690 | source "arch/mips/sgi-ip27/Kconfig" |
683 | source "arch/mips/sibyte/Kconfig" | 691 | source "arch/mips/sibyte/Kconfig" |
684 | source "arch/mips/txx9/Kconfig" | 692 | source "arch/mips/txx9/Kconfig" |
@@ -778,6 +786,9 @@ config CSRC_BCM1480 | |||
778 | config CSRC_IOASIC | 786 | config CSRC_IOASIC |
779 | bool | 787 | bool |
780 | 788 | ||
789 | config CSRC_POWERTV | ||
790 | bool | ||
791 | |||
781 | config CSRC_R4K_LIB | 792 | config CSRC_R4K_LIB |
782 | bool | 793 | bool |
783 | 794 | ||
@@ -806,20 +817,6 @@ config DMA_NONCOHERENT | |||
806 | config DMA_NEED_PCI_MAP_STATE | 817 | config DMA_NEED_PCI_MAP_STATE |
807 | bool | 818 | bool |
808 | 819 | ||
809 | config EARLY_PRINTK | ||
810 | bool "Early printk" if EMBEDDED && DEBUG_KERNEL | ||
811 | depends on SYS_HAS_EARLY_PRINTK | ||
812 | default y | ||
813 | help | ||
814 | This option enables special console drivers which allow the kernel | ||
815 | to print messages very early in the bootup process. | ||
816 | |||
817 | This is useful for kernel debugging when your machine crashes very | ||
818 | early before the console code is initialized. For normal operation, | ||
819 | it is not recommended because it looks ugly on some machines and | ||
820 | doesn't cooperate with an X server. You should normally say N here, | ||
821 | unless you want to debug such a crash. | ||
822 | |||
823 | config SYS_HAS_EARLY_PRINTK | 820 | config SYS_HAS_EARLY_PRINTK |
824 | bool | 821 | bool |
825 | 822 | ||
@@ -1069,6 +1066,21 @@ config CPU_LOONGSON2E | |||
1069 | The Loongson 2E processor implements the MIPS III instruction set | 1066 | The Loongson 2E processor implements the MIPS III instruction set |
1070 | with many extensions. | 1067 | with many extensions. |
1071 | 1068 | ||
1069 | It has an internal FPGA northbridge, which is compatiable to | ||
1070 | bonito64. | ||
1071 | |||
1072 | config CPU_LOONGSON2F | ||
1073 | bool "Loongson 2F" | ||
1074 | depends on SYS_HAS_CPU_LOONGSON2F | ||
1075 | select CPU_LOONGSON2 | ||
1076 | help | ||
1077 | The Loongson 2F processor implements the MIPS III instruction set | ||
1078 | with many extensions. | ||
1079 | |||
1080 | Loongson2F have built-in DDR2 and PCIX controller. The PCIX controller | ||
1081 | have a similar programming interface with FPGA northbridge used in | ||
1082 | Loongson2E. | ||
1083 | |||
1072 | config CPU_MIPS32_R1 | 1084 | config CPU_MIPS32_R1 |
1073 | bool "MIPS32 Release 1" | 1085 | bool "MIPS32 Release 1" |
1074 | depends on SYS_HAS_CPU_MIPS32_R1 | 1086 | depends on SYS_HAS_CPU_MIPS32_R1 |
@@ -1294,6 +1306,16 @@ config CPU_CAVIUM_OCTEON | |||
1294 | 1306 | ||
1295 | endchoice | 1307 | endchoice |
1296 | 1308 | ||
1309 | config SYS_SUPPORTS_ZBOOT | ||
1310 | bool | ||
1311 | select HAVE_KERNEL_GZIP | ||
1312 | select HAVE_KERNEL_BZIP2 | ||
1313 | select HAVE_KERNEL_LZMA | ||
1314 | |||
1315 | config SYS_SUPPORTS_ZBOOT_UART16550 | ||
1316 | bool | ||
1317 | select SYS_SUPPORTS_ZBOOT | ||
1318 | |||
1297 | config CPU_LOONGSON2 | 1319 | config CPU_LOONGSON2 |
1298 | bool | 1320 | bool |
1299 | select CPU_SUPPORTS_32BIT_KERNEL | 1321 | select CPU_SUPPORTS_32BIT_KERNEL |
@@ -1303,6 +1325,12 @@ config CPU_LOONGSON2 | |||
1303 | config SYS_HAS_CPU_LOONGSON2E | 1325 | config SYS_HAS_CPU_LOONGSON2E |
1304 | bool | 1326 | bool |
1305 | 1327 | ||
1328 | config SYS_HAS_CPU_LOONGSON2F | ||
1329 | bool | ||
1330 | select CPU_SUPPORTS_CPUFREQ | ||
1331 | select CPU_SUPPORTS_ADDRWINCFG if 64BIT | ||
1332 | select CPU_SUPPORTS_UNCACHED_ACCELERATED | ||
1333 | |||
1306 | config SYS_HAS_CPU_MIPS32_R1 | 1334 | config SYS_HAS_CPU_MIPS32_R1 |
1307 | bool | 1335 | bool |
1308 | 1336 | ||
@@ -1411,8 +1439,17 @@ config CPU_SUPPORTS_32BIT_KERNEL | |||
1411 | bool | 1439 | bool |
1412 | config CPU_SUPPORTS_64BIT_KERNEL | 1440 | config CPU_SUPPORTS_64BIT_KERNEL |
1413 | bool | 1441 | bool |
1442 | config CPU_SUPPORTS_CPUFREQ | ||
1443 | bool | ||
1444 | config CPU_SUPPORTS_ADDRWINCFG | ||
1445 | bool | ||
1414 | config CPU_SUPPORTS_HUGEPAGES | 1446 | config CPU_SUPPORTS_HUGEPAGES |
1415 | bool | 1447 | bool |
1448 | config CPU_SUPPORTS_UNCACHED_ACCELERATED | ||
1449 | bool | ||
1450 | config MIPS_PGD_C0_CONTEXT | ||
1451 | bool | ||
1452 | default y if 64BIT && CPU_MIPSR2 | ||
1416 | 1453 | ||
1417 | # | 1454 | # |
1418 | # Set to y for ptrace access to watch registers. | 1455 | # Set to y for ptrace access to watch registers. |
@@ -2024,15 +2061,6 @@ config STACKTRACE_SUPPORT | |||
2024 | 2061 | ||
2025 | source "init/Kconfig" | 2062 | source "init/Kconfig" |
2026 | 2063 | ||
2027 | config PROBE_INITRD_HEADER | ||
2028 | bool "Probe initrd header created by addinitrd" | ||
2029 | depends on BLK_DEV_INITRD | ||
2030 | help | ||
2031 | Probe initrd header at the last page of kernel image. | ||
2032 | Say Y here if you are using arch/mips/boot/addinitrd.c to | ||
2033 | add initrd or initramfs image to the kernel image. | ||
2034 | Otherwise, say N. | ||
2035 | |||
2036 | source "kernel/Kconfig.freezer" | 2064 | source "kernel/Kconfig.freezer" |
2037 | 2065 | ||
2038 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" | 2066 | menu "Bus options (PCI, PCMCIA, EISA, ISA, TC)" |
@@ -2104,6 +2132,7 @@ config MMU | |||
2104 | 2132 | ||
2105 | config I8253 | 2133 | config I8253 |
2106 | bool | 2134 | bool |
2135 | select MIPS_EXTERNAL_TIMER | ||
2107 | 2136 | ||
2108 | config ZONE_DMA32 | 2137 | config ZONE_DMA32 |
2109 | bool | 2138 | bool |
@@ -2180,6 +2209,8 @@ source "kernel/power/Kconfig" | |||
2180 | 2209 | ||
2181 | endmenu | 2210 | endmenu |
2182 | 2211 | ||
2212 | source "arch/mips/kernel/cpufreq/Kconfig" | ||
2213 | |||
2183 | source "net/Kconfig" | 2214 | source "net/Kconfig" |
2184 | 2215 | ||
2185 | source "drivers/Kconfig" | 2216 | source "drivers/Kconfig" |
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug index 364ca8938807..d2b88a0be519 100644 --- a/arch/mips/Kconfig.debug +++ b/arch/mips/Kconfig.debug | |||
@@ -6,15 +6,66 @@ config TRACE_IRQFLAGS_SUPPORT | |||
6 | 6 | ||
7 | source "lib/Kconfig.debug" | 7 | source "lib/Kconfig.debug" |
8 | 8 | ||
9 | config EARLY_PRINTK | ||
10 | bool "Early printk" if EMBEDDED | ||
11 | depends on SYS_HAS_EARLY_PRINTK | ||
12 | default y | ||
13 | help | ||
14 | This option enables special console drivers which allow the kernel | ||
15 | to print messages very early in the bootup process. | ||
16 | |||
17 | This is useful for kernel debugging when your machine crashes very | ||
18 | early before the console code is initialized. For normal operation, | ||
19 | it is not recommended because it looks ugly on some machines and | ||
20 | doesn't cooperate with an X server. You should normally say N here, | ||
21 | unless you want to debug such a crash. | ||
22 | |||
23 | config CMDLINE_BOOL | ||
24 | bool "Built-in kernel command line" | ||
25 | default n | ||
26 | help | ||
27 | For most systems, it is firmware or second stage bootloader that | ||
28 | by default specifies the kernel command line options. However, | ||
29 | it might be necessary or advantageous to either override the | ||
30 | default kernel command line or add a few extra options to it. | ||
31 | For such cases, this option allows you to hardcode your own | ||
32 | command line options directly into the kernel. For that, you | ||
33 | should choose 'Y' here, and fill in the extra boot arguments | ||
34 | in CONFIG_CMDLINE. | ||
35 | |||
36 | The built-in options will be concatenated to the default command | ||
37 | line if CMDLINE_OVERRIDE is set to 'N'. Otherwise, the default | ||
38 | command line will be ignored and replaced by the built-in string. | ||
39 | |||
40 | Most MIPS systems will normally expect 'N' here and rely upon | ||
41 | the command line from the firmware or the second-stage bootloader. | ||
42 | |||
9 | config CMDLINE | 43 | config CMDLINE |
10 | string "Default kernel command string" | 44 | string "Default kernel command string" |
45 | depends on CMDLINE_BOOL | ||
11 | default "" | 46 | default "" |
12 | help | 47 | help |
13 | On some platforms, there is currently no way for the boot loader to | 48 | On some platforms, there is currently no way for the boot loader to |
14 | pass arguments to the kernel. For these platforms, you can supply | 49 | pass arguments to the kernel. For these platforms, and for the cases |
15 | some command-line options at build time by entering them here. In | 50 | when you want to add some extra options to the command line or ignore |
16 | other cases you can specify kernel args so that you don't have | 51 | the default command line, you can supply some command-line options at |
17 | to set them up in board prom initialization routines. | 52 | build time by entering them here. In other cases you can specify |
53 | kernel args so that you don't have to set them up in board prom | ||
54 | initialization routines. | ||
55 | |||
56 | For more information, see the CMDLINE_BOOL and CMDLINE_OVERRIDE | ||
57 | options. | ||
58 | |||
59 | config CMDLINE_OVERRIDE | ||
60 | bool "Built-in command line overrides firware arguments" | ||
61 | default n | ||
62 | depends on CMDLINE_BOOL | ||
63 | help | ||
64 | By setting this option to 'Y' you will have your kernel ignore | ||
65 | command line arguments from firmware or second stage bootloader. | ||
66 | Instead, the built-in command line will be used exclusively. | ||
67 | |||
68 | Normally, you will choose 'N' here. | ||
18 | 69 | ||
19 | config DEBUG_STACK_USAGE | 70 | config DEBUG_STACK_USAGE |
20 | bool "Enable stack utilization instrumentation" | 71 | bool "Enable stack utilization instrumentation" |
diff --git a/arch/mips/Makefile b/arch/mips/Makefile index 77f5021218d3..1893efd43fca 100644 --- a/arch/mips/Makefile +++ b/arch/mips/Makefile | |||
@@ -48,7 +48,16 @@ ifneq ($(SUBARCH),$(ARCH)) | |||
48 | endif | 48 | endif |
49 | endif | 49 | endif |
50 | 50 | ||
51 | ifndef CONFIG_FUNCTION_TRACER | ||
51 | cflags-y := -ffunction-sections | 52 | cflags-y := -ffunction-sections |
53 | endif | ||
54 | ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
55 | ifndef KBUILD_MCOUNT_RA_ADDRESS | ||
56 | ifeq ($(call cc-option-yn,-mmcount-ra-address), y) | ||
57 | cflags-y += -mmcount-ra-address -DKBUILD_MCOUNT_RA_ADDRESS | ||
58 | endif | ||
59 | endif | ||
60 | endif | ||
52 | cflags-y += $(call cc-option, -mno-check-zero-division) | 61 | cflags-y += $(call cc-option, -mno-check-zero-division) |
53 | 62 | ||
54 | ifdef CONFIG_32BIT | 63 | ifdef CONFIG_32BIT |
@@ -69,6 +78,7 @@ endif | |||
69 | 78 | ||
70 | all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32) | 79 | all-$(CONFIG_BOOT_ELF32) := $(vmlinux-32) |
71 | all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64) | 80 | all-$(CONFIG_BOOT_ELF64) := $(vmlinux-64) |
81 | all-$(CONFIG_SYS_SUPPORTS_ZBOOT)+= vmlinuz | ||
72 | 82 | ||
73 | # | 83 | # |
74 | # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel | 84 | # GCC uses -G 0 -mabicalls -fpic as default. We don't want PIC in the kernel |
@@ -124,6 +134,8 @@ cflags-$(CONFIG_CPU_TX49XX) += -march=r4600 -Wa,--trap | |||
124 | cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap | 134 | cflags-$(CONFIG_CPU_LOONGSON2) += -Wa,--trap |
125 | cflags-$(CONFIG_CPU_LOONGSON2E) += \ | 135 | cflags-$(CONFIG_CPU_LOONGSON2E) += \ |
126 | $(call cc-option,-march=loongson2e,-march=r4600) | 136 | $(call cc-option,-march=loongson2e,-march=r4600) |
137 | cflags-$(CONFIG_CPU_LOONGSON2F) += \ | ||
138 | $(call cc-option,-march=loongson2f,-march=r4600) | ||
127 | 139 | ||
128 | cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ | 140 | cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ |
129 | -Wa,-mips32 -Wa,--trap | 141 | -Wa,-mips32 -Wa,--trap |
@@ -324,6 +336,7 @@ core-$(CONFIG_MACH_LOONGSON) +=arch/mips/loongson/ | |||
324 | cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \ | 336 | cflags-$(CONFIG_MACH_LOONGSON) += -I$(srctree)/arch/mips/include/asm/mach-loongson \ |
325 | -mno-branch-likely | 337 | -mno-branch-likely |
326 | load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000 | 338 | load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000 |
339 | load-$(CONFIG_LEMOTE_MACH2F) +=0xffffffff80200000 | ||
327 | 340 | ||
328 | # | 341 | # |
329 | # MIPS Malta board | 342 | # MIPS Malta board |
@@ -331,7 +344,7 @@ load-$(CONFIG_LEMOTE_FULOONG2E) +=0xffffffff80100000 | |||
331 | core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/ | 344 | core-$(CONFIG_MIPS_MALTA) += arch/mips/mti-malta/ |
332 | cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta | 345 | cflags-$(CONFIG_MIPS_MALTA) += -I$(srctree)/arch/mips/include/asm/mach-malta |
333 | load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 | 346 | load-$(CONFIG_MIPS_MALTA) += 0xffffffff80100000 |
334 | all-$(CONFIG_MIPS_MALTA) := vmlinux.bin | 347 | all-$(CONFIG_MIPS_MALTA) := vmlinuz.bin |
335 | 348 | ||
336 | # | 349 | # |
337 | # MIPS SIM | 350 | # MIPS SIM |
@@ -356,13 +369,6 @@ cflags-$(CONFIG_PMC_YOSEMITE) += -I$(srctree)/arch/mips/include/asm/mach-yosemit | |||
356 | load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 | 369 | load-$(CONFIG_PMC_YOSEMITE) += 0xffffffff80100000 |
357 | 370 | ||
358 | # | 371 | # |
359 | # Basler eXcite | ||
360 | # | ||
361 | core-$(CONFIG_BASLER_EXCITE) += arch/mips/basler/excite/ | ||
362 | cflags-$(CONFIG_BASLER_EXCITE) += -I$(srctree)/arch/mips/include/asm/mach-excite | ||
363 | load-$(CONFIG_BASLER_EXCITE) += 0x80100000 | ||
364 | |||
365 | # | ||
366 | # LASAT platforms | 372 | # LASAT platforms |
367 | # | 373 | # |
368 | core-$(CONFIG_LASAT) += arch/mips/lasat/ | 374 | core-$(CONFIG_LASAT) += arch/mips/lasat/ |
@@ -441,6 +447,13 @@ core-$(CONFIG_NEC_MARKEINS) += arch/mips/emma/markeins/ | |||
441 | load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000 | 447 | load-$(CONFIG_NEC_MARKEINS) += 0xffffffff88100000 |
442 | 448 | ||
443 | # | 449 | # |
450 | # Cisco PowerTV Platform | ||
451 | # | ||
452 | core-$(CONFIG_POWERTV) += arch/mips/powertv/ | ||
453 | cflags-$(CONFIG_POWERTV) += -I$(srctree)/arch/mips/include/asm/mach-powertv | ||
454 | load-$(CONFIG_POWERTV) += 0xffffffff90800000 | ||
455 | |||
456 | # | ||
444 | # SGI IP22 (Indy/Indigo2) | 457 | # SGI IP22 (Indy/Indigo2) |
445 | # | 458 | # |
446 | # Set the load address to >= 0xffffffff88069000 if you want to leave space for | 459 | # Set the load address to >= 0xffffffff88069000 if you want to leave space for |
@@ -581,7 +594,7 @@ load-$(CONFIG_SNI_RM) += 0xffffffff80600000 | |||
581 | else | 594 | else |
582 | load-$(CONFIG_SNI_RM) += 0xffffffff80030000 | 595 | load-$(CONFIG_SNI_RM) += 0xffffffff80030000 |
583 | endif | 596 | endif |
584 | all-$(CONFIG_SNI_RM) := vmlinux.ecoff | 597 | all-$(CONFIG_SNI_RM) := vmlinuz.ecoff |
585 | 598 | ||
586 | # | 599 | # |
587 | # Common TXx9 | 600 | # Common TXx9 |
@@ -699,9 +712,23 @@ vmlinux.64: vmlinux | |||
699 | $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@ | 712 | $(OBJCOPY) -O $(64bit-bfd) $(OBJCOPYFLAGS) $< $@ |
700 | 713 | ||
701 | makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1) | 714 | makeboot =$(Q)$(MAKE) $(build)=arch/mips/boot VMLINUX=$(vmlinux-32) $(1) |
715 | makezboot =$(Q)$(MAKE) $(build)=arch/mips/boot/compressed \ | ||
716 | VMLINUX_LOAD_ADDRESS=$(load-y) 32bit-bfd=$(32bit-bfd) $(1) | ||
702 | 717 | ||
703 | all: $(all-y) | 718 | all: $(all-y) |
704 | 719 | ||
720 | vmlinuz: vmlinux FORCE | ||
721 | +@$(call makezboot,$@) | ||
722 | |||
723 | vmlinuz.bin: vmlinux | ||
724 | +@$(call makezboot,$@) | ||
725 | |||
726 | vmlinuz.ecoff: vmlinux | ||
727 | +@$(call makezboot,$@) | ||
728 | |||
729 | vmlinuz.srec: vmlinux | ||
730 | +@$(call makezboot,$@) | ||
731 | |||
705 | vmlinux.bin: $(vmlinux-32) | 732 | vmlinux.bin: $(vmlinux-32) |
706 | +@$(call makeboot,$@) | 733 | +@$(call makeboot,$@) |
707 | 734 | ||
@@ -726,11 +753,13 @@ endif | |||
726 | 753 | ||
727 | install: | 754 | install: |
728 | $(Q)install -D -m 755 vmlinux $(INSTALL_PATH)/vmlinux-$(KERNELRELEASE) | 755 | $(Q)install -D -m 755 vmlinux $(INSTALL_PATH)/vmlinux-$(KERNELRELEASE) |
756 | $(Q)install -D -m 755 vmlinuz $(INSTALL_PATH)/vmlinuz-$(KERNELRELEASE) | ||
729 | $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE) | 757 | $(Q)install -D -m 644 .config $(INSTALL_PATH)/config-$(KERNELRELEASE) |
730 | $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE) | 758 | $(Q)install -D -m 644 System.map $(INSTALL_PATH)/System.map-$(KERNELRELEASE) |
731 | 759 | ||
732 | archclean: | 760 | archclean: |
733 | @$(MAKE) $(clean)=arch/mips/boot | 761 | @$(MAKE) $(clean)=arch/mips/boot |
762 | @$(MAKE) $(clean)=arch/mips/boot/compressed | ||
734 | @$(MAKE) $(clean)=arch/mips/lasat | 763 | @$(MAKE) $(clean)=arch/mips/lasat |
735 | 764 | ||
736 | define archhelp | 765 | define archhelp |
@@ -738,10 +767,18 @@ define archhelp | |||
738 | echo ' vmlinux.ecoff - ECOFF boot image' | 767 | echo ' vmlinux.ecoff - ECOFF boot image' |
739 | echo ' vmlinux.bin - Raw binary boot image' | 768 | echo ' vmlinux.bin - Raw binary boot image' |
740 | echo ' vmlinux.srec - SREC boot image' | 769 | echo ' vmlinux.srec - SREC boot image' |
770 | echo ' vmlinuz - Compressed boot(zboot) image' | ||
771 | echo ' vmlinuz.ecoff - ECOFF zboot image' | ||
772 | echo ' vmlinuz.bin - Raw binary zboot image' | ||
773 | echo ' vmlinuz.srec - SREC zboot image' | ||
741 | echo | 774 | echo |
742 | echo ' These will be default as apropriate for a configured platform.' | 775 | echo ' These will be default as apropriate for a configured platform.' |
743 | endef | 776 | endef |
744 | 777 | ||
745 | CLEAN_FILES += vmlinux.32 \ | 778 | CLEAN_FILES += vmlinux.32 \ |
746 | vmlinux.64 \ | 779 | vmlinux.64 \ |
747 | vmlinux.ecoff | 780 | vmlinux.ecoff \ |
781 | vmlinuz \ | ||
782 | vmlinuz.ecoff \ | ||
783 | vmlinuz.bin \ | ||
784 | vmlinuz.srec | ||
diff --git a/arch/mips/ar7/platform.c b/arch/mips/ar7/platform.c index 835f3f0319ca..85169c08d8dc 100644 --- a/arch/mips/ar7/platform.c +++ b/arch/mips/ar7/platform.c | |||
@@ -505,7 +505,7 @@ static int __init ar7_register_devices(void) | |||
505 | int res; | 505 | int res; |
506 | u32 *bootcr, val; | 506 | u32 *bootcr, val; |
507 | #ifdef CONFIG_SERIAL_8250 | 507 | #ifdef CONFIG_SERIAL_8250 |
508 | static struct uart_port uart_port[2]; | 508 | static struct uart_port uart_port[2] __initdata; |
509 | 509 | ||
510 | memset(uart_port, 0, sizeof(struct uart_port) * 2); | 510 | memset(uart_port, 0, sizeof(struct uart_port) * 2); |
511 | 511 | ||
diff --git a/arch/mips/basler/excite/Kconfig b/arch/mips/basler/excite/Kconfig deleted file mode 100644 index ba506075608b..000000000000 --- a/arch/mips/basler/excite/Kconfig +++ /dev/null | |||
@@ -1,9 +0,0 @@ | |||
1 | config BASLER_EXCITE_PROTOTYPE | ||
2 | bool "Support for pre-release units" | ||
3 | depends on BASLER_EXCITE | ||
4 | default n | ||
5 | help | ||
6 | Pre-series (prototype) units are different from later ones in | ||
7 | some ways. Select this option if you have one of these. Please | ||
8 | note that a kernel built with this option selected will not be | ||
9 | able to run on normal units. | ||
diff --git a/arch/mips/basler/excite/Makefile b/arch/mips/basler/excite/Makefile deleted file mode 100644 index cff29cf46d03..000000000000 --- a/arch/mips/basler/excite/Makefile +++ /dev/null | |||
@@ -1,8 +0,0 @@ | |||
1 | # | ||
2 | # Makefile for Basler eXcite | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_BASLER_EXCITE) += excite_irq.o excite_prom.o excite_setup.o \ | ||
6 | excite_device.o excite_procfs.o | ||
7 | |||
8 | obj-m += excite_iodev.o | ||
diff --git a/arch/mips/basler/excite/excite_device.c b/arch/mips/basler/excite/excite_device.c deleted file mode 100644 index e00bc2d7f301..000000000000 --- a/arch/mips/basler/excite/excite_device.c +++ /dev/null | |||
@@ -1,403 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004 by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/kernel.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/platform_device.h> | ||
23 | #include <linux/ioport.h> | ||
24 | #include <linux/err.h> | ||
25 | #include <linux/jiffies.h> | ||
26 | #include <linux/sched.h> | ||
27 | #include <asm/types.h> | ||
28 | #include <asm/rm9k-ocd.h> | ||
29 | |||
30 | #include <excite.h> | ||
31 | #include <rm9k_eth.h> | ||
32 | #include <rm9k_wdt.h> | ||
33 | #include <rm9k_xicap.h> | ||
34 | #include <excite_nandflash.h> | ||
35 | |||
36 | #include "excite_iodev.h" | ||
37 | |||
38 | #define RM9K_GE_UNIT 0 | ||
39 | #define XICAP_UNIT 0 | ||
40 | #define NAND_UNIT 0 | ||
41 | |||
42 | #define DLL_TIMEOUT 3 /* seconds */ | ||
43 | |||
44 | |||
45 | #define RINIT(__start__, __end__, __name__, __parent__) { \ | ||
46 | .name = __name__ "_0", \ | ||
47 | .start = (__start__), \ | ||
48 | .end = (__end__), \ | ||
49 | .flags = 0, \ | ||
50 | .parent = (__parent__) \ | ||
51 | } | ||
52 | |||
53 | #define RINIT_IRQ(__irq__, __name__) { \ | ||
54 | .name = __name__ "_0", \ | ||
55 | .start = (__irq__), \ | ||
56 | .end = (__irq__), \ | ||
57 | .flags = IORESOURCE_IRQ, \ | ||
58 | .parent = NULL \ | ||
59 | } | ||
60 | |||
61 | |||
62 | |||
63 | enum { | ||
64 | slice_xicap, | ||
65 | slice_eth | ||
66 | }; | ||
67 | |||
68 | |||
69 | |||
70 | static struct resource | ||
71 | excite_ctr_resource __maybe_unused = { | ||
72 | .name = "GPI counters", | ||
73 | .start = 0, | ||
74 | .end = 5, | ||
75 | .flags = 0, | ||
76 | .parent = NULL, | ||
77 | .sibling = NULL, | ||
78 | .child = NULL | ||
79 | }, | ||
80 | excite_gpislice_resource __maybe_unused = { | ||
81 | .name = "GPI slices", | ||
82 | .start = 0, | ||
83 | .end = 1, | ||
84 | .flags = 0, | ||
85 | .parent = NULL, | ||
86 | .sibling = NULL, | ||
87 | .child = NULL | ||
88 | }, | ||
89 | excite_mdio_channel_resource __maybe_unused = { | ||
90 | .name = "MDIO channels", | ||
91 | .start = 0, | ||
92 | .end = 1, | ||
93 | .flags = 0, | ||
94 | .parent = NULL, | ||
95 | .sibling = NULL, | ||
96 | .child = NULL | ||
97 | }, | ||
98 | excite_fifomem_resource __maybe_unused = { | ||
99 | .name = "FIFO memory", | ||
100 | .start = 0, | ||
101 | .end = 767, | ||
102 | .flags = 0, | ||
103 | .parent = NULL, | ||
104 | .sibling = NULL, | ||
105 | .child = NULL | ||
106 | }, | ||
107 | excite_scram_resource __maybe_unused = { | ||
108 | .name = "Scratch RAM", | ||
109 | .start = EXCITE_PHYS_SCRAM, | ||
110 | .end = EXCITE_PHYS_SCRAM + EXCITE_SIZE_SCRAM - 1, | ||
111 | .flags = IORESOURCE_MEM, | ||
112 | .parent = NULL, | ||
113 | .sibling = NULL, | ||
114 | .child = NULL | ||
115 | }, | ||
116 | excite_fpga_resource __maybe_unused = { | ||
117 | .name = "System FPGA", | ||
118 | .start = EXCITE_PHYS_FPGA, | ||
119 | .end = EXCITE_PHYS_FPGA + EXCITE_SIZE_FPGA - 1, | ||
120 | .flags = IORESOURCE_MEM, | ||
121 | .parent = NULL, | ||
122 | .sibling = NULL, | ||
123 | .child = NULL | ||
124 | }, | ||
125 | excite_nand_resource __maybe_unused = { | ||
126 | .name = "NAND flash control", | ||
127 | .start = EXCITE_PHYS_NAND, | ||
128 | .end = EXCITE_PHYS_NAND + EXCITE_SIZE_NAND - 1, | ||
129 | .flags = IORESOURCE_MEM, | ||
130 | .parent = NULL, | ||
131 | .sibling = NULL, | ||
132 | .child = NULL | ||
133 | }, | ||
134 | excite_titan_resource __maybe_unused = { | ||
135 | .name = "TITAN registers", | ||
136 | .start = EXCITE_PHYS_TITAN, | ||
137 | .end = EXCITE_PHYS_TITAN + EXCITE_SIZE_TITAN - 1, | ||
138 | .flags = IORESOURCE_MEM, | ||
139 | .parent = NULL, | ||
140 | .sibling = NULL, | ||
141 | .child = NULL | ||
142 | }; | ||
143 | |||
144 | |||
145 | |||
146 | static void adjust_resources(struct resource *res, unsigned int n) | ||
147 | { | ||
148 | struct resource *p; | ||
149 | const unsigned long mask = IORESOURCE_IO | IORESOURCE_MEM | ||
150 | | IORESOURCE_IRQ | IORESOURCE_DMA; | ||
151 | |||
152 | for (p = res; p < res + n; p++) { | ||
153 | const struct resource * const parent = p->parent; | ||
154 | if (parent) { | ||
155 | p->start += parent->start; | ||
156 | p->end += parent->start; | ||
157 | p->flags = parent->flags & mask; | ||
158 | } | ||
159 | } | ||
160 | } | ||
161 | |||
162 | |||
163 | |||
164 | #if defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE) | ||
165 | static struct resource xicap_rsrc[] = { | ||
166 | RINIT(0x4840, 0x486f, XICAP_RESOURCE_FIFO_RX, &excite_titan_resource), | ||
167 | RINIT(0x4940, 0x494b, XICAP_RESOURCE_FIFO_TX, &excite_titan_resource), | ||
168 | RINIT(0x5040, 0x5127, XICAP_RESOURCE_XDMA, &excite_titan_resource), | ||
169 | RINIT(0x1000, 0x112f, XICAP_RESOURCE_PKTPROC, &excite_titan_resource), | ||
170 | RINIT(0x1100, 0x110f, XICAP_RESOURCE_PKT_STREAM, &excite_fpga_resource), | ||
171 | RINIT(0x0800, 0x0bff, XICAP_RESOURCE_DMADESC, &excite_scram_resource), | ||
172 | RINIT(slice_xicap, slice_xicap, XICAP_RESOURCE_GPI_SLICE, &excite_gpislice_resource), | ||
173 | RINIT(0x0100, 0x02ff, XICAP_RESOURCE_FIFO_BLK, &excite_fifomem_resource), | ||
174 | RINIT_IRQ(TITAN_IRQ, XICAP_RESOURCE_IRQ) | ||
175 | }; | ||
176 | |||
177 | static struct platform_device xicap_pdev = { | ||
178 | .name = XICAP_NAME, | ||
179 | .id = XICAP_UNIT, | ||
180 | .num_resources = ARRAY_SIZE(xicap_rsrc), | ||
181 | .resource = xicap_rsrc | ||
182 | }; | ||
183 | |||
184 | /* | ||
185 | * Create a platform device for the GPI port that receives the | ||
186 | * image data from the embedded camera. | ||
187 | */ | ||
188 | static int __init xicap_devinit(void) | ||
189 | { | ||
190 | unsigned long tend; | ||
191 | u32 reg; | ||
192 | int retval; | ||
193 | |||
194 | adjust_resources(xicap_rsrc, ARRAY_SIZE(xicap_rsrc)); | ||
195 | |||
196 | /* Power up the slice and configure it. */ | ||
197 | reg = titan_readl(CPTC1R); | ||
198 | reg &= ~(0x11100 << slice_xicap); | ||
199 | titan_writel(reg, CPTC1R); | ||
200 | |||
201 | /* Enable slice & DLL. */ | ||
202 | reg= titan_readl(CPRR); | ||
203 | reg &= ~(0x00030003 << (slice_xicap * 2)); | ||
204 | titan_writel(reg, CPRR); | ||
205 | |||
206 | /* Wait for DLLs to lock */ | ||
207 | tend = jiffies + DLL_TIMEOUT * HZ; | ||
208 | while (time_before(jiffies, tend)) { | ||
209 | if (!(~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4)))) | ||
210 | break; | ||
211 | yield(); | ||
212 | } | ||
213 | |||
214 | if (~titan_readl(CPDSR) & (0x1 << (slice_xicap * 4))) { | ||
215 | printk(KERN_ERR "%s: DLL not locked after %u seconds\n", | ||
216 | xicap_pdev.name, DLL_TIMEOUT); | ||
217 | retval = -ETIME; | ||
218 | } else { | ||
219 | /* Register platform device */ | ||
220 | retval = platform_device_register(&xicap_pdev); | ||
221 | } | ||
222 | |||
223 | return retval; | ||
224 | } | ||
225 | |||
226 | device_initcall(xicap_devinit); | ||
227 | #endif /* defined(CONFIG_EXCITE_FCAP_GPI) || defined(CONFIG_EXCITE_FCAP_GPI_MODULE) */ | ||
228 | |||
229 | |||
230 | |||
231 | #if defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE) | ||
232 | static struct resource wdt_rsrc[] = { | ||
233 | RINIT(0, 0, WDT_RESOURCE_COUNTER, &excite_ctr_resource), | ||
234 | RINIT(0x0084, 0x008f, WDT_RESOURCE_REGS, &excite_titan_resource), | ||
235 | RINIT_IRQ(TITAN_IRQ, WDT_RESOURCE_IRQ) | ||
236 | }; | ||
237 | |||
238 | static struct platform_device wdt_pdev = { | ||
239 | .name = WDT_NAME, | ||
240 | .id = -1, | ||
241 | .num_resources = ARRAY_SIZE(wdt_rsrc), | ||
242 | .resource = wdt_rsrc | ||
243 | }; | ||
244 | |||
245 | /* | ||
246 | * Create a platform device for the GPI port that receives the | ||
247 | * image data from the embedded camera. | ||
248 | */ | ||
249 | static int __init wdt_devinit(void) | ||
250 | { | ||
251 | adjust_resources(wdt_rsrc, ARRAY_SIZE(wdt_rsrc)); | ||
252 | return platform_device_register(&wdt_pdev); | ||
253 | } | ||
254 | |||
255 | device_initcall(wdt_devinit); | ||
256 | #endif /* defined(CONFIG_WDT_RM9K_GPI) || defined(CONFIG_WDT_RM9K_GPI_MODULE) */ | ||
257 | |||
258 | |||
259 | |||
260 | static struct resource excite_nandflash_rsrc[] = { | ||
261 | RINIT(0x2000, 0x201f, EXCITE_NANDFLASH_RESOURCE_REGS, &excite_nand_resource) | ||
262 | }; | ||
263 | |||
264 | static struct platform_device excite_nandflash_pdev = { | ||
265 | .name = "excite_nand", | ||
266 | .id = NAND_UNIT, | ||
267 | .num_resources = ARRAY_SIZE(excite_nandflash_rsrc), | ||
268 | .resource = excite_nandflash_rsrc | ||
269 | }; | ||
270 | |||
271 | /* | ||
272 | * Create a platform device for the access to the nand-flash | ||
273 | * port | ||
274 | */ | ||
275 | static int __init excite_nandflash_devinit(void) | ||
276 | { | ||
277 | adjust_resources(excite_nandflash_rsrc, ARRAY_SIZE(excite_nandflash_rsrc)); | ||
278 | |||
279 | /* nothing to be done here */ | ||
280 | |||
281 | /* Register platform device */ | ||
282 | return platform_device_register(&excite_nandflash_pdev); | ||
283 | } | ||
284 | |||
285 | device_initcall(excite_nandflash_devinit); | ||
286 | |||
287 | |||
288 | |||
289 | static struct resource iodev_rsrc[] = { | ||
290 | RINIT_IRQ(FPGA1_IRQ, IODEV_RESOURCE_IRQ) | ||
291 | }; | ||
292 | |||
293 | static struct platform_device io_pdev = { | ||
294 | .name = IODEV_NAME, | ||
295 | .id = -1, | ||
296 | .num_resources = ARRAY_SIZE(iodev_rsrc), | ||
297 | .resource = iodev_rsrc | ||
298 | }; | ||
299 | |||
300 | /* | ||
301 | * Create a platform device for the external I/O ports. | ||
302 | */ | ||
303 | static int __init io_devinit(void) | ||
304 | { | ||
305 | adjust_resources(iodev_rsrc, ARRAY_SIZE(iodev_rsrc)); | ||
306 | return platform_device_register(&io_pdev); | ||
307 | } | ||
308 | |||
309 | device_initcall(io_devinit); | ||
310 | |||
311 | |||
312 | |||
313 | |||
314 | #if defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE) | ||
315 | static struct resource rm9k_ge_rsrc[] = { | ||
316 | RINIT(0x2200, 0x27ff, RM9K_GE_RESOURCE_MAC, &excite_titan_resource), | ||
317 | RINIT(0x1800, 0x1fff, RM9K_GE_RESOURCE_MSTAT, &excite_titan_resource), | ||
318 | RINIT(0x2000, 0x212f, RM9K_GE_RESOURCE_PKTPROC, &excite_titan_resource), | ||
319 | RINIT(0x5140, 0x5227, RM9K_GE_RESOURCE_XDMA, &excite_titan_resource), | ||
320 | RINIT(0x4870, 0x489f, RM9K_GE_RESOURCE_FIFO_RX, &excite_titan_resource), | ||
321 | RINIT(0x494c, 0x4957, RM9K_GE_RESOURCE_FIFO_TX, &excite_titan_resource), | ||
322 | RINIT(0x0000, 0x007f, RM9K_GE_RESOURCE_FIFOMEM_RX, &excite_fifomem_resource), | ||
323 | RINIT(0x0080, 0x00ff, RM9K_GE_RESOURCE_FIFOMEM_TX, &excite_fifomem_resource), | ||
324 | RINIT(0x0180, 0x019f, RM9K_GE_RESOURCE_PHY, &excite_titan_resource), | ||
325 | RINIT(0x0000, 0x03ff, RM9K_GE_RESOURCE_DMADESC_RX, &excite_scram_resource), | ||
326 | RINIT(0x0400, 0x07ff, RM9K_GE_RESOURCE_DMADESC_TX, &excite_scram_resource), | ||
327 | RINIT(slice_eth, slice_eth, RM9K_GE_RESOURCE_GPI_SLICE, &excite_gpislice_resource), | ||
328 | RINIT(0, 0, RM9K_GE_RESOURCE_MDIO_CHANNEL, &excite_mdio_channel_resource), | ||
329 | RINIT_IRQ(TITAN_IRQ, RM9K_GE_RESOURCE_IRQ_MAIN), | ||
330 | RINIT_IRQ(PHY_IRQ, RM9K_GE_RESOURCE_IRQ_PHY) | ||
331 | }; | ||
332 | |||
333 | static struct platform_device rm9k_ge_pdev = { | ||
334 | .name = RM9K_GE_NAME, | ||
335 | .id = RM9K_GE_UNIT, | ||
336 | .num_resources = ARRAY_SIZE(rm9k_ge_rsrc), | ||
337 | .resource = rm9k_ge_rsrc | ||
338 | }; | ||
339 | |||
340 | |||
341 | |||
342 | /* | ||
343 | * Create a platform device for the Ethernet port. | ||
344 | */ | ||
345 | static int __init rm9k_ge_devinit(void) | ||
346 | { | ||
347 | u32 reg; | ||
348 | |||
349 | adjust_resources(rm9k_ge_rsrc, ARRAY_SIZE(rm9k_ge_rsrc)); | ||
350 | |||
351 | /* Power up the slice and configure it. */ | ||
352 | reg = titan_readl(CPTC1R); | ||
353 | reg &= ~(0x11000 << slice_eth); | ||
354 | reg |= 0x100 << slice_eth; | ||
355 | titan_writel(reg, CPTC1R); | ||
356 | |||
357 | /* Take the MAC out of reset, reset the DLLs. */ | ||
358 | reg = titan_readl(CPRR); | ||
359 | reg &= ~(0x00030000 << (slice_eth * 2)); | ||
360 | reg |= 0x3 << (slice_eth * 2); | ||
361 | titan_writel(reg, CPRR); | ||
362 | |||
363 | return platform_device_register(&rm9k_ge_pdev); | ||
364 | } | ||
365 | |||
366 | device_initcall(rm9k_ge_devinit); | ||
367 | #endif /* defined(CONFIG_RM9K_GE) || defined(CONFIG_RM9K_GE_MODULE) */ | ||
368 | |||
369 | |||
370 | |||
371 | static int __init excite_setup_devs(void) | ||
372 | { | ||
373 | int res; | ||
374 | u32 reg; | ||
375 | |||
376 | /* Enable xdma and fifo interrupts */ | ||
377 | reg = titan_readl(0x0050); | ||
378 | titan_writel(reg | 0x18000000, 0x0050); | ||
379 | |||
380 | res = request_resource(&iomem_resource, &excite_titan_resource); | ||
381 | if (res) | ||
382 | return res; | ||
383 | res = request_resource(&iomem_resource, &excite_scram_resource); | ||
384 | if (res) | ||
385 | return res; | ||
386 | res = request_resource(&iomem_resource, &excite_fpga_resource); | ||
387 | if (res) | ||
388 | return res; | ||
389 | res = request_resource(&iomem_resource, &excite_nand_resource); | ||
390 | if (res) | ||
391 | return res; | ||
392 | excite_fpga_resource.flags = excite_fpga_resource.parent->flags & | ||
393 | ( IORESOURCE_IO | IORESOURCE_MEM | ||
394 | | IORESOURCE_IRQ | IORESOURCE_DMA); | ||
395 | excite_nand_resource.flags = excite_nand_resource.parent->flags & | ||
396 | ( IORESOURCE_IO | IORESOURCE_MEM | ||
397 | | IORESOURCE_IRQ | IORESOURCE_DMA); | ||
398 | |||
399 | return 0; | ||
400 | } | ||
401 | |||
402 | arch_initcall(excite_setup_devs); | ||
403 | |||
diff --git a/arch/mips/basler/excite/excite_iodev.c b/arch/mips/basler/excite/excite_iodev.c deleted file mode 100644 index 938b1d0b7652..000000000000 --- a/arch/mips/basler/excite/excite_iodev.c +++ /dev/null | |||
@@ -1,178 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005 by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/compiler.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/wait.h> | ||
25 | #include <linux/poll.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/miscdevice.h> | ||
29 | #include <linux/smp_lock.h> | ||
30 | |||
31 | #include "excite_iodev.h" | ||
32 | |||
33 | |||
34 | |||
35 | static const struct resource *iodev_get_resource(struct platform_device *, const char *, unsigned int); | ||
36 | static int __init iodev_probe(struct platform_device *); | ||
37 | static int __exit iodev_remove(struct platform_device *); | ||
38 | static int iodev_open(struct inode *, struct file *); | ||
39 | static int iodev_release(struct inode *, struct file *); | ||
40 | static ssize_t iodev_read(struct file *, char __user *, size_t s, loff_t *); | ||
41 | static unsigned int iodev_poll(struct file *, struct poll_table_struct *); | ||
42 | static irqreturn_t iodev_irqhdl(int, void *); | ||
43 | |||
44 | |||
45 | |||
46 | static const char iodev_name[] = "iodev"; | ||
47 | static unsigned int iodev_irq; | ||
48 | static DECLARE_WAIT_QUEUE_HEAD(wq); | ||
49 | |||
50 | |||
51 | |||
52 | static const struct file_operations fops = | ||
53 | { | ||
54 | .owner = THIS_MODULE, | ||
55 | .open = iodev_open, | ||
56 | .release = iodev_release, | ||
57 | .read = iodev_read, | ||
58 | .poll = iodev_poll | ||
59 | }; | ||
60 | |||
61 | static struct miscdevice miscdev = | ||
62 | { | ||
63 | .minor = MISC_DYNAMIC_MINOR, | ||
64 | .name = iodev_name, | ||
65 | .fops = &fops | ||
66 | }; | ||
67 | |||
68 | static struct platform_driver iodev_driver = { | ||
69 | .driver = { | ||
70 | .name = iodev_name, | ||
71 | .owner = THIS_MODULE, | ||
72 | }, | ||
73 | .probe = iodev_probe, | ||
74 | .remove = __devexit_p(iodev_remove), | ||
75 | }; | ||
76 | |||
77 | |||
78 | |||
79 | static const struct resource * | ||
80 | iodev_get_resource(struct platform_device *pdv, const char *name, | ||
81 | unsigned int type) | ||
82 | { | ||
83 | char buf[80]; | ||
84 | if (snprintf(buf, sizeof buf, "%s_0", name) >= sizeof buf) | ||
85 | return NULL; | ||
86 | return platform_get_resource_byname(pdv, type, buf); | ||
87 | } | ||
88 | |||
89 | |||
90 | |||
91 | /* No hotplugging on the platform bus - use __init */ | ||
92 | static int __init iodev_probe(struct platform_device *dev) | ||
93 | { | ||
94 | const struct resource * const ri = | ||
95 | iodev_get_resource(dev, IODEV_RESOURCE_IRQ, IORESOURCE_IRQ); | ||
96 | |||
97 | if (unlikely(!ri)) | ||
98 | return -ENXIO; | ||
99 | |||
100 | iodev_irq = ri->start; | ||
101 | return misc_register(&miscdev); | ||
102 | } | ||
103 | |||
104 | |||
105 | |||
106 | static int __exit iodev_remove(struct platform_device *dev) | ||
107 | { | ||
108 | return misc_deregister(&miscdev); | ||
109 | } | ||
110 | |||
111 | static int iodev_open(struct inode *i, struct file *f) | ||
112 | { | ||
113 | int ret; | ||
114 | |||
115 | ret = request_irq(iodev_irq, iodev_irqhdl, IRQF_DISABLED, | ||
116 | iodev_name, &miscdev); | ||
117 | |||
118 | return ret; | ||
119 | } | ||
120 | |||
121 | static int iodev_release(struct inode *i, struct file *f) | ||
122 | { | ||
123 | free_irq(iodev_irq, &miscdev); | ||
124 | return 0; | ||
125 | } | ||
126 | |||
127 | |||
128 | |||
129 | |||
130 | static ssize_t | ||
131 | iodev_read(struct file *f, char __user *d, size_t s, loff_t *o) | ||
132 | { | ||
133 | ssize_t ret; | ||
134 | DEFINE_WAIT(w); | ||
135 | |||
136 | prepare_to_wait(&wq, &w, TASK_INTERRUPTIBLE); | ||
137 | if (!signal_pending(current)) | ||
138 | schedule(); | ||
139 | ret = signal_pending(current) ? -ERESTARTSYS : 0; | ||
140 | finish_wait(&wq, &w); | ||
141 | return ret; | ||
142 | } | ||
143 | |||
144 | |||
145 | static unsigned int iodev_poll(struct file *f, struct poll_table_struct *p) | ||
146 | { | ||
147 | poll_wait(f, &wq, p); | ||
148 | return POLLOUT | POLLWRNORM; | ||
149 | } | ||
150 | |||
151 | static irqreturn_t iodev_irqhdl(int irq, void *ctxt) | ||
152 | { | ||
153 | wake_up(&wq); | ||
154 | |||
155 | return IRQ_HANDLED; | ||
156 | } | ||
157 | |||
158 | static int __init iodev_init_module(void) | ||
159 | { | ||
160 | return platform_driver_register(&iodev_driver); | ||
161 | } | ||
162 | |||
163 | |||
164 | |||
165 | static void __exit iodev_cleanup_module(void) | ||
166 | { | ||
167 | platform_driver_unregister(&iodev_driver); | ||
168 | } | ||
169 | |||
170 | module_init(iodev_init_module); | ||
171 | module_exit(iodev_cleanup_module); | ||
172 | |||
173 | |||
174 | |||
175 | MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>"); | ||
176 | MODULE_DESCRIPTION("Basler eXcite i/o interrupt handler"); | ||
177 | MODULE_VERSION("0.0"); | ||
178 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/mips/basler/excite/excite_iodev.h b/arch/mips/basler/excite/excite_iodev.h deleted file mode 100644 index cbfbb5d2ee62..000000000000 --- a/arch/mips/basler/excite/excite_iodev.h +++ /dev/null | |||
@@ -1,10 +0,0 @@ | |||
1 | #ifndef __EXCITE_IODEV_H__ | ||
2 | #define __EXCITE_IODEV_H__ | ||
3 | |||
4 | /* Device name */ | ||
5 | #define IODEV_NAME "iodev" | ||
6 | |||
7 | /* Resource names */ | ||
8 | #define IODEV_RESOURCE_IRQ "excite_iodev_irq" | ||
9 | |||
10 | #endif /* __EXCITE_IODEV_H__ */ | ||
diff --git a/arch/mips/basler/excite/excite_irq.c b/arch/mips/basler/excite/excite_irq.c deleted file mode 100644 index 934e0a6b1011..000000000000 --- a/arch/mips/basler/excite/excite_irq.c +++ /dev/null | |||
@@ -1,122 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller@baslereb.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #include <linux/errno.h> | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/kernel_stat.h> | ||
23 | #include <linux/module.h> | ||
24 | #include <linux/signal.h> | ||
25 | #include <linux/sched.h> | ||
26 | #include <linux/types.h> | ||
27 | #include <linux/interrupt.h> | ||
28 | #include <linux/ioport.h> | ||
29 | #include <linux/timex.h> | ||
30 | #include <linux/slab.h> | ||
31 | #include <linux/random.h> | ||
32 | #include <linux/bitops.h> | ||
33 | #include <asm/bootinfo.h> | ||
34 | #include <asm/io.h> | ||
35 | #include <asm/irq.h> | ||
36 | #include <asm/irq_cpu.h> | ||
37 | #include <asm/mipsregs.h> | ||
38 | #include <asm/system.h> | ||
39 | #include <asm/rm9k-ocd.h> | ||
40 | |||
41 | #include <excite.h> | ||
42 | |||
43 | extern asmlinkage void excite_handle_int(void); | ||
44 | |||
45 | /* | ||
46 | * Initialize the interrupt handler | ||
47 | */ | ||
48 | void __init arch_init_irq(void) | ||
49 | { | ||
50 | mips_cpu_irq_init(); | ||
51 | rm7k_cpu_irq_init(); | ||
52 | rm9k_cpu_irq_init(); | ||
53 | } | ||
54 | |||
55 | asmlinkage void plat_irq_dispatch(void) | ||
56 | { | ||
57 | const u32 | ||
58 | interrupts = read_c0_cause() >> 8, | ||
59 | mask = ((read_c0_status() >> 8) & 0x000000ff) | | ||
60 | (read_c0_intcontrol() & 0x0000ff00), | ||
61 | pending = interrupts & mask; | ||
62 | u32 msgintflags, msgintmask, msgint; | ||
63 | |||
64 | /* process timer interrupt */ | ||
65 | if (pending & (1 << TIMER_IRQ)) { | ||
66 | do_IRQ(TIMER_IRQ); | ||
67 | return; | ||
68 | } | ||
69 | |||
70 | /* Process PCI interrupts */ | ||
71 | #if USB_IRQ < 10 | ||
72 | msgintflags = ocd_readl(INTP0Status0 + (USB_MSGINT / 0x20 * 0x10)); | ||
73 | msgintmask = ocd_readl(INTP0Mask0 + (USB_MSGINT / 0x20 * 0x10)); | ||
74 | msgint = msgintflags & msgintmask & (0x1 << (USB_MSGINT % 0x20)); | ||
75 | if ((pending & (1 << USB_IRQ)) && msgint) { | ||
76 | #else | ||
77 | if (pending & (1 << USB_IRQ)) { | ||
78 | #endif | ||
79 | do_IRQ(USB_IRQ); | ||
80 | return; | ||
81 | } | ||
82 | |||
83 | /* Process TITAN interrupts */ | ||
84 | msgintflags = ocd_readl(INTP0Status0 + (TITAN_MSGINT / 0x20 * 0x10)); | ||
85 | msgintmask = ocd_readl(INTP0Mask0 + (TITAN_MSGINT / 0x20 * 0x10)); | ||
86 | msgint = msgintflags & msgintmask & (0x1 << (TITAN_MSGINT % 0x20)); | ||
87 | if ((pending & (1 << TITAN_IRQ)) && msgint) { | ||
88 | ocd_writel(msgint, INTP0Clear0 + (TITAN_MSGINT / 0x20 * 0x10)); | ||
89 | do_IRQ(TITAN_IRQ); | ||
90 | return; | ||
91 | } | ||
92 | |||
93 | /* Process FPGA line #0 interrupts */ | ||
94 | msgintflags = ocd_readl(INTP0Status0 + (FPGA0_MSGINT / 0x20 * 0x10)); | ||
95 | msgintmask = ocd_readl(INTP0Mask0 + (FPGA0_MSGINT / 0x20 * 0x10)); | ||
96 | msgint = msgintflags & msgintmask & (0x1 << (FPGA0_MSGINT % 0x20)); | ||
97 | if ((pending & (1 << FPGA0_IRQ)) && msgint) { | ||
98 | do_IRQ(FPGA0_IRQ); | ||
99 | return; | ||
100 | } | ||
101 | |||
102 | /* Process FPGA line #1 interrupts */ | ||
103 | msgintflags = ocd_readl(INTP0Status0 + (FPGA1_MSGINT / 0x20 * 0x10)); | ||
104 | msgintmask = ocd_readl(INTP0Mask0 + (FPGA1_MSGINT / 0x20 * 0x10)); | ||
105 | msgint = msgintflags & msgintmask & (0x1 << (FPGA1_MSGINT % 0x20)); | ||
106 | if ((pending & (1 << FPGA1_IRQ)) && msgint) { | ||
107 | do_IRQ(FPGA1_IRQ); | ||
108 | return; | ||
109 | } | ||
110 | |||
111 | /* Process PHY interrupts */ | ||
112 | msgintflags = ocd_readl(INTP0Status0 + (PHY_MSGINT / 0x20 * 0x10)); | ||
113 | msgintmask = ocd_readl(INTP0Mask0 + (PHY_MSGINT / 0x20 * 0x10)); | ||
114 | msgint = msgintflags & msgintmask & (0x1 << (PHY_MSGINT % 0x20)); | ||
115 | if ((pending & (1 << PHY_IRQ)) && msgint) { | ||
116 | do_IRQ(PHY_IRQ); | ||
117 | return; | ||
118 | } | ||
119 | |||
120 | /* Process spurious interrupts */ | ||
121 | spurious_interrupt(); | ||
122 | } | ||
diff --git a/arch/mips/basler/excite/excite_procfs.c b/arch/mips/basler/excite/excite_procfs.c deleted file mode 100644 index 08923e6825b5..000000000000 --- a/arch/mips/basler/excite/excite_procfs.c +++ /dev/null | |||
@@ -1,92 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004, 2005 by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | ||
4 | * | ||
5 | * Procfs support for Basler eXcite | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | #include <linux/module.h> | ||
22 | #include <linux/proc_fs.h> | ||
23 | #include <linux/seq_file.h> | ||
24 | #include <linux/stat.h> | ||
25 | #include <asm/page.h> | ||
26 | #include <asm/io.h> | ||
27 | #include <asm/system.h> | ||
28 | #include <asm/rm9k-ocd.h> | ||
29 | |||
30 | #include <excite.h> | ||
31 | |||
32 | static int excite_unit_id_proc_show(struct seq_file *m, void *v) | ||
33 | { | ||
34 | seq_printf(m, "%06x", unit_id); | ||
35 | return 0; | ||
36 | } | ||
37 | |||
38 | static int excite_unit_id_proc_open(struct inode *inode, struct file *file) | ||
39 | { | ||
40 | return single_open(file, excite_unit_id_proc_show, NULL); | ||
41 | } | ||
42 | |||
43 | static const struct file_operations excite_unit_id_proc_fops = { | ||
44 | .owner = THIS_MODULE, | ||
45 | .open = excite_unit_id_proc_open, | ||
46 | .read = seq_read, | ||
47 | .llseek = seq_lseek, | ||
48 | .release = single_release, | ||
49 | }; | ||
50 | |||
51 | static int | ||
52 | excite_bootrom_read(char *page, char **start, off_t off, int count, | ||
53 | int *eof, void *data) | ||
54 | { | ||
55 | void __iomem * src; | ||
56 | |||
57 | if (off >= EXCITE_SIZE_BOOTROM) { | ||
58 | *eof = 1; | ||
59 | return 0; | ||
60 | } | ||
61 | |||
62 | if ((off + count) > EXCITE_SIZE_BOOTROM) | ||
63 | count = EXCITE_SIZE_BOOTROM - off; | ||
64 | |||
65 | src = ioremap(EXCITE_PHYS_BOOTROM + off, count); | ||
66 | if (src) { | ||
67 | memcpy_fromio(page, src, count); | ||
68 | iounmap(src); | ||
69 | *start = page; | ||
70 | } else { | ||
71 | count = -ENOMEM; | ||
72 | } | ||
73 | |||
74 | return count; | ||
75 | } | ||
76 | |||
77 | void excite_procfs_init(void) | ||
78 | { | ||
79 | /* Create & populate /proc/excite */ | ||
80 | struct proc_dir_entry * const pdir = proc_mkdir("excite", NULL); | ||
81 | if (pdir) { | ||
82 | struct proc_dir_entry * e; | ||
83 | |||
84 | e = proc_create("unit_id", S_IRUGO, pdir, | ||
85 | &excite_unit_id_proc_fops); | ||
86 | if (e) e->size = 6; | ||
87 | |||
88 | e = create_proc_read_entry("bootrom", S_IRUGO, pdir, | ||
89 | excite_bootrom_read, NULL); | ||
90 | if (e) e->size = EXCITE_SIZE_BOOTROM; | ||
91 | } | ||
92 | } | ||
diff --git a/arch/mips/basler/excite/excite_prom.c b/arch/mips/basler/excite/excite_prom.c deleted file mode 100644 index 68d8bc597e34..000000000000 --- a/arch/mips/basler/excite/excite_prom.c +++ /dev/null | |||
@@ -1,144 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004, 2005 by Thomas Koeller (thomas.koeller@baslerweb.com) | ||
3 | * Based on the PMC-Sierra Yosemite board support by Ralf Baechle and | ||
4 | * Manish Lachwani. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/init.h> | ||
22 | #include <linux/sched.h> | ||
23 | #include <linux/mm.h> | ||
24 | #include <linux/delay.h> | ||
25 | #include <linux/smp.h> | ||
26 | #include <linux/module.h> | ||
27 | #include <asm/io.h> | ||
28 | #include <asm/pgtable.h> | ||
29 | #include <asm/processor.h> | ||
30 | #include <asm/reboot.h> | ||
31 | #include <asm/system.h> | ||
32 | #include <asm/bootinfo.h> | ||
33 | #include <asm/string.h> | ||
34 | |||
35 | #include <excite.h> | ||
36 | |||
37 | /* This struct is used by Redboot to pass arguments to the kernel */ | ||
38 | typedef struct | ||
39 | { | ||
40 | char *name; | ||
41 | char *val; | ||
42 | } t_env_var; | ||
43 | |||
44 | struct parmblock { | ||
45 | t_env_var memsize; | ||
46 | t_env_var modetty0; | ||
47 | t_env_var ethaddr; | ||
48 | t_env_var env_end; | ||
49 | char *argv[2]; | ||
50 | char text[0]; | ||
51 | }; | ||
52 | |||
53 | static unsigned int prom_argc; | ||
54 | static const char ** prom_argv; | ||
55 | static const t_env_var * prom_env; | ||
56 | |||
57 | static void prom_halt(void) __attribute__((noreturn)); | ||
58 | static void prom_exit(void) __attribute__((noreturn)); | ||
59 | |||
60 | |||
61 | |||
62 | const char *get_system_type(void) | ||
63 | { | ||
64 | return "Basler eXcite"; | ||
65 | } | ||
66 | |||
67 | /* | ||
68 | * Halt the system | ||
69 | */ | ||
70 | static void prom_halt(void) | ||
71 | { | ||
72 | printk(KERN_NOTICE "\n** System halted.\n"); | ||
73 | while (1) | ||
74 | asm volatile ( | ||
75 | "\t.set\tmips3\n" | ||
76 | "\twait\n" | ||
77 | "\t.set\tmips0\n" | ||
78 | ); | ||
79 | } | ||
80 | |||
81 | /* | ||
82 | * Reset the CPU and re-enter Redboot | ||
83 | */ | ||
84 | static void prom_exit(void) | ||
85 | { | ||
86 | unsigned int i; | ||
87 | volatile unsigned char * const flg = | ||
88 | (volatile unsigned char *) (EXCITE_ADDR_FPGA + EXCITE_FPGA_DPR); | ||
89 | |||
90 | /* Clear the watchdog reset flag, set the reboot flag */ | ||
91 | *flg &= ~0x01; | ||
92 | *flg |= 0x80; | ||
93 | |||
94 | for (i = 0; i < 10; i++) { | ||
95 | *(volatile unsigned char *) (EXCITE_ADDR_FPGA + EXCITE_FPGA_SYSCTL) = 0x02; | ||
96 | iob(); | ||
97 | mdelay(1000); | ||
98 | } | ||
99 | |||
100 | printk(KERN_NOTICE "Reset failed\n"); | ||
101 | prom_halt(); | ||
102 | } | ||
103 | |||
104 | static const char __init *prom_getenv(char *name) | ||
105 | { | ||
106 | const t_env_var * p; | ||
107 | for (p = prom_env; p->name != NULL; p++) | ||
108 | if(strcmp(name, p->name) == 0) | ||
109 | break; | ||
110 | return p->val; | ||
111 | } | ||
112 | |||
113 | /* | ||
114 | * Init routine which accepts the variables from Redboot | ||
115 | */ | ||
116 | void __init prom_init(void) | ||
117 | { | ||
118 | const struct parmblock * const pb = (struct parmblock *) fw_arg2; | ||
119 | |||
120 | prom_argc = fw_arg0; | ||
121 | prom_argv = (const char **) fw_arg1; | ||
122 | prom_env = &pb->memsize; | ||
123 | |||
124 | /* Callbacks for halt, restart */ | ||
125 | _machine_restart = (void (*)(char *)) prom_exit; | ||
126 | _machine_halt = prom_halt; | ||
127 | |||
128 | #ifdef CONFIG_32BIT | ||
129 | /* copy command line */ | ||
130 | strcpy(arcs_cmdline, prom_argv[1]); | ||
131 | memsize = simple_strtol(prom_getenv("memsize"), NULL, 16); | ||
132 | strcpy(modetty, prom_getenv("modetty0")); | ||
133 | #endif /* CONFIG_32BIT */ | ||
134 | |||
135 | #ifdef CONFIG_64BIT | ||
136 | # error 64 bit support not implemented | ||
137 | #endif /* CONFIG_64BIT */ | ||
138 | } | ||
139 | |||
140 | /* This is called from free_initmem(), so we need to provide it */ | ||
141 | void __init prom_free_prom_memory(void) | ||
142 | { | ||
143 | /* Nothing to do */ | ||
144 | } | ||
diff --git a/arch/mips/basler/excite/excite_setup.c b/arch/mips/basler/excite/excite_setup.c deleted file mode 100644 index d66b3b8edf2a..000000000000 --- a/arch/mips/basler/excite/excite_setup.c +++ /dev/null | |||
@@ -1,302 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004, 2005 by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | ||
4 | * Based on the PMC-Sierra Yosemite board support by Ralf Baechle and | ||
5 | * Manish Lachwani. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software | ||
19 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | */ | ||
21 | |||
22 | #include <linux/types.h> | ||
23 | #include <linux/kernel.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/string.h> | ||
26 | #include <linux/tty.h> | ||
27 | #include <linux/serial_core.h> | ||
28 | #include <linux/serial.h> | ||
29 | #include <linux/serial_8250.h> | ||
30 | #include <linux/ioport.h> | ||
31 | #include <linux/spinlock.h> | ||
32 | #include <asm/bootinfo.h> | ||
33 | #include <asm/mipsregs.h> | ||
34 | #include <asm/pgtable-32.h> | ||
35 | #include <asm/io.h> | ||
36 | #include <asm/time.h> | ||
37 | #include <asm/rm9k-ocd.h> | ||
38 | |||
39 | #include <excite.h> | ||
40 | |||
41 | #define TITAN_UART_CLK 25000000 | ||
42 | |||
43 | #if 1 | ||
44 | /* normal serial port assignment */ | ||
45 | #define REGBASE_SER0 0x0208 | ||
46 | #define REGBASE_SER1 0x0238 | ||
47 | #define MASK_SER0 0x1 | ||
48 | #define MASK_SER1 0x2 | ||
49 | #else | ||
50 | /* serial ports swapped */ | ||
51 | #define REGBASE_SER0 0x0238 | ||
52 | #define REGBASE_SER1 0x0208 | ||
53 | #define MASK_SER0 0x2 | ||
54 | #define MASK_SER1 0x1 | ||
55 | #endif | ||
56 | |||
57 | unsigned long memsize; | ||
58 | char modetty[30]; | ||
59 | unsigned int titan_irq = TITAN_IRQ; | ||
60 | static void __iomem * ctl_regs; | ||
61 | u32 unit_id; | ||
62 | |||
63 | volatile void __iomem * const ocd_base = (void *) (EXCITE_ADDR_OCD); | ||
64 | volatile void __iomem * const titan_base = (void *) (EXCITE_ADDR_TITAN); | ||
65 | |||
66 | /* Protect access to shared GPI registers */ | ||
67 | DEFINE_SPINLOCK(titan_lock); | ||
68 | int titan_irqflags; | ||
69 | |||
70 | |||
71 | /* | ||
72 | * The eXcite platform uses the alternate timer interrupt | ||
73 | * | ||
74 | * Fixme: At the time of this writing cevt-r4k.c doesn't yet know about how | ||
75 | * to handle the alternate timer interrupt of the RM9000. | ||
76 | */ | ||
77 | void __init plat_time_init(void) | ||
78 | { | ||
79 | const u32 modebit5 = ocd_readl(0x00e4); | ||
80 | unsigned int mult = ((modebit5 >> 11) & 0x1f) + 2; | ||
81 | unsigned int div = ((modebit5 >> 16) & 0x1f) + 2; | ||
82 | |||
83 | if (div == 33) | ||
84 | div = 1; | ||
85 | mips_hpt_frequency = EXCITE_CPU_EXT_CLOCK * mult / div / 2; | ||
86 | } | ||
87 | |||
88 | static int __init excite_init_console(void) | ||
89 | { | ||
90 | #if defined(CONFIG_SERIAL_8250) | ||
91 | static __initdata char serr[] = | ||
92 | KERN_ERR "Serial port #%u setup failed\n"; | ||
93 | struct uart_port up; | ||
94 | |||
95 | /* Take the DUART out of reset */ | ||
96 | titan_writel(0x00ff1cff, CPRR); | ||
97 | |||
98 | #if (CONFIG_SERIAL_8250_NR_UARTS > 1) | ||
99 | /* Enable both ports */ | ||
100 | titan_writel(MASK_SER0 | MASK_SER1, UACFG); | ||
101 | #else | ||
102 | /* Enable port #0 only */ | ||
103 | titan_writel(MASK_SER0, UACFG); | ||
104 | #endif | ||
105 | |||
106 | /* | ||
107 | * Set up serial port #0. Do not use autodetection; the result is | ||
108 | * not what we want. | ||
109 | */ | ||
110 | memset(&up, 0, sizeof(up)); | ||
111 | up.membase = (char *) titan_addr(REGBASE_SER0); | ||
112 | up.irq = TITAN_IRQ; | ||
113 | up.uartclk = TITAN_UART_CLK; | ||
114 | up.regshift = 0; | ||
115 | up.iotype = UPIO_RM9000; | ||
116 | up.type = PORT_RM9000; | ||
117 | up.flags = UPF_SHARE_IRQ; | ||
118 | up.line = 0; | ||
119 | if (early_serial_setup(&up)) | ||
120 | printk(serr, up.line); | ||
121 | |||
122 | #if CONFIG_SERIAL_8250_NR_UARTS > 1 | ||
123 | /* And now for port #1. */ | ||
124 | up.membase = (char *) titan_addr(REGBASE_SER1); | ||
125 | up.line = 1; | ||
126 | if (early_serial_setup(&up)) | ||
127 | printk(serr, up.line); | ||
128 | #endif /* CONFIG_SERIAL_8250_NR_UARTS > 1 */ | ||
129 | #else | ||
130 | /* Leave the DUART in reset */ | ||
131 | titan_writel(0x00ff3cff, CPRR); | ||
132 | #endif /* defined(CONFIG_SERIAL_8250) */ | ||
133 | |||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | static int __init excite_platform_init(void) | ||
138 | { | ||
139 | unsigned int i; | ||
140 | unsigned char buf[3]; | ||
141 | u8 reg; | ||
142 | void __iomem * dpr; | ||
143 | |||
144 | /* BIU buffer allocations */ | ||
145 | ocd_writel(8, CPURSLMT); /* CPU */ | ||
146 | titan_writel(4, CPGRWL); /* GPI / Ethernet */ | ||
147 | |||
148 | /* Map control registers located in FPGA */ | ||
149 | ctl_regs = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_SYSCTL, 16); | ||
150 | if (!ctl_regs) | ||
151 | panic("eXcite: failed to map platform control registers\n"); | ||
152 | memcpy_fromio(buf, ctl_regs + 2, ARRAY_SIZE(buf)); | ||
153 | unit_id = buf[0] | (buf[1] << 8) | (buf[2] << 16); | ||
154 | |||
155 | /* Clear the reboot flag */ | ||
156 | dpr = ioremap_nocache(EXCITE_PHYS_FPGA + EXCITE_FPGA_DPR, 1); | ||
157 | reg = __raw_readb(dpr); | ||
158 | __raw_writeb(reg & 0x7f, dpr); | ||
159 | iounmap(dpr); | ||
160 | |||
161 | /* Interrupt controller setup */ | ||
162 | for (i = INTP0Status0; i < INTP0Status0 + 0x80; i += 0x10) { | ||
163 | ocd_writel(0x00000000, i + 0x04); | ||
164 | ocd_writel(0xffffffff, i + 0x0c); | ||
165 | } | ||
166 | ocd_writel(0x2, NMICONFIG); | ||
167 | |||
168 | ocd_writel(0x1 << (TITAN_MSGINT % 0x20), | ||
169 | INTP0Mask0 + (0x10 * (TITAN_MSGINT / 0x20))); | ||
170 | ocd_writel((0x1 << (FPGA0_MSGINT % 0x20)) | ||
171 | | ocd_readl(INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20))), | ||
172 | INTP0Mask0 + (0x10 * (FPGA0_MSGINT / 0x20))); | ||
173 | ocd_writel((0x1 << (FPGA1_MSGINT % 0x20)) | ||
174 | | ocd_readl(INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20))), | ||
175 | INTP0Mask0 + (0x10 * (FPGA1_MSGINT / 0x20))); | ||
176 | ocd_writel((0x1 << (PHY_MSGINT % 0x20)) | ||
177 | | ocd_readl(INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20))), | ||
178 | INTP0Mask0 + (0x10 * (PHY_MSGINT / 0x20))); | ||
179 | #if USB_IRQ < 10 | ||
180 | ocd_writel((0x1 << (USB_MSGINT % 0x20)) | ||
181 | | ocd_readl(INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20))), | ||
182 | INTP0Mask0 + (0x10 * (USB_MSGINT / 0x20))); | ||
183 | #endif | ||
184 | /* Enable the packet FIFO, XDMA and XDMA arbiter */ | ||
185 | titan_writel(0x00ff18ff, CPRR); | ||
186 | |||
187 | /* | ||
188 | * Set up the PADMUX. Power down all ethernet slices, | ||
189 | * they will be powered up and configured at device startup. | ||
190 | */ | ||
191 | titan_writel(0x00878206, CPTC1R); | ||
192 | titan_writel(0x00001100, CPTC0R); /* latch PADMUX, enable WCIMODE */ | ||
193 | |||
194 | /* Reset and enable the FIFO block */ | ||
195 | titan_writel(0x00000001, SDRXFCIE); | ||
196 | titan_writel(0x00000001, SDTXFCIE); | ||
197 | titan_writel(0x00000100, SDRXFCIE); | ||
198 | titan_writel(0x00000000, SDTXFCIE); | ||
199 | |||
200 | /* | ||
201 | * Initialize the common interrupt shared by all components of | ||
202 | * the GPI/Ethernet subsystem. | ||
203 | */ | ||
204 | titan_writel((EXCITE_PHYS_OCD >> 12), CPCFG0); | ||
205 | titan_writel(TITAN_MSGINT, CPCFG1); | ||
206 | |||
207 | /* | ||
208 | * XDMA configuration. | ||
209 | * In order for the XDMA to be sharable among multiple drivers, | ||
210 | * the setup must be done here in the platform. The reason is that | ||
211 | * this setup can only be done while the XDMA is in reset. If this | ||
212 | * were done in a driver, it would interrupt all other drivers | ||
213 | * using the XDMA. | ||
214 | */ | ||
215 | titan_writel(0x80021dff, GXCFG); /* XDMA reset */ | ||
216 | titan_writel(0x00000000, CPXCISRA); | ||
217 | titan_writel(0x00000000, CPXCISRB); /* clear pending interrupts */ | ||
218 | #if defined(CONFIG_HIGHMEM) | ||
219 | # error change for HIGHMEM support! | ||
220 | #else | ||
221 | titan_writel(0x00000000, GXDMADRPFX); /* buffer address prefix */ | ||
222 | #endif | ||
223 | titan_writel(0, GXDMA_DESCADR); | ||
224 | |||
225 | for (i = 0x5040; i <= 0x5300; i += 0x0040) | ||
226 | titan_writel(0x80080000, i); /* reset channel */ | ||
227 | |||
228 | titan_writel((0x1 << 29) /* no sparse tx descr. */ | ||
229 | | (0x1 << 28) /* no sparse rx descr. */ | ||
230 | | (0x1 << 23) | (0x1 << 24) /* descriptor coherency */ | ||
231 | | (0x1 << 21) | (0x1 << 22) /* data coherency */ | ||
232 | | (0x1 << 17) | ||
233 | | 0x1dff, | ||
234 | GXCFG); | ||
235 | |||
236 | #if defined(CONFIG_SMP) | ||
237 | # error No SMP support | ||
238 | #else | ||
239 | /* All interrupts go to core #0 only. */ | ||
240 | titan_writel(0x1f007fff, CPDST0A); | ||
241 | titan_writel(0x00000000, CPDST0B); | ||
242 | titan_writel(0x0000ff3f, CPDST1A); | ||
243 | titan_writel(0x00000000, CPDST1B); | ||
244 | titan_writel(0x00ffffff, CPXDSTA); | ||
245 | titan_writel(0x00000000, CPXDSTB); | ||
246 | #endif | ||
247 | |||
248 | /* Enable DUART interrupts, disable everything else. */ | ||
249 | titan_writel(0x04000000, CPGIG0ER); | ||
250 | titan_writel(0x000000c0, CPGIG1ER); | ||
251 | |||
252 | excite_procfs_init(); | ||
253 | return 0; | ||
254 | } | ||
255 | |||
256 | void __init plat_mem_setup(void) | ||
257 | { | ||
258 | volatile u32 * const boot_ocd_base = (u32 *) 0xbf7fc000; | ||
259 | |||
260 | /* Announce RAM to system */ | ||
261 | add_memory_region(0x00000000, memsize, BOOT_MEM_RAM); | ||
262 | |||
263 | /* Set up the peripheral address map */ | ||
264 | *(boot_ocd_base + (LKB9 / sizeof(u32))) = 0; | ||
265 | *(boot_ocd_base + (LKB10 / sizeof(u32))) = 0; | ||
266 | *(boot_ocd_base + (LKB11 / sizeof(u32))) = 0; | ||
267 | *(boot_ocd_base + (LKB12 / sizeof(u32))) = 0; | ||
268 | wmb(); | ||
269 | *(boot_ocd_base + (LKB0 / sizeof(u32))) = EXCITE_PHYS_OCD >> 4; | ||
270 | wmb(); | ||
271 | |||
272 | ocd_writel((EXCITE_PHYS_TITAN >> 4) | 0x1UL, LKB5); | ||
273 | ocd_writel(((EXCITE_SIZE_TITAN >> 4) & 0x7fffff00) - 0x100, LKM5); | ||
274 | ocd_writel((EXCITE_PHYS_SCRAM >> 4) | 0x1UL, LKB13); | ||
275 | ocd_writel(((EXCITE_SIZE_SCRAM >> 4) & 0xffffff00) - 0x100, LKM13); | ||
276 | |||
277 | /* Local bus slot #0 */ | ||
278 | ocd_writel(0x00040510, LDP0); | ||
279 | ocd_writel((EXCITE_PHYS_BOOTROM >> 4) | 0x1UL, LKB9); | ||
280 | ocd_writel(((EXCITE_SIZE_BOOTROM >> 4) & 0x03ffff00) - 0x100, LKM9); | ||
281 | |||
282 | /* Local bus slot #2 */ | ||
283 | ocd_writel(0x00000330, LDP2); | ||
284 | ocd_writel((EXCITE_PHYS_FPGA >> 4) | 0x1, LKB11); | ||
285 | ocd_writel(((EXCITE_SIZE_FPGA >> 4) - 0x100) & 0x03ffff00, LKM11); | ||
286 | |||
287 | /* Local bus slot #3 */ | ||
288 | ocd_writel(0x00123413, LDP3); | ||
289 | ocd_writel((EXCITE_PHYS_NAND >> 4) | 0x1, LKB12); | ||
290 | ocd_writel(((EXCITE_SIZE_NAND >> 4) - 0x100) & 0x03ffff00, LKM12); | ||
291 | } | ||
292 | |||
293 | |||
294 | |||
295 | console_initcall(excite_init_console); | ||
296 | arch_initcall(excite_platform_init); | ||
297 | |||
298 | EXPORT_SYMBOL(titan_lock); | ||
299 | EXPORT_SYMBOL(titan_irqflags); | ||
300 | EXPORT_SYMBOL(titan_irq); | ||
301 | EXPORT_SYMBOL(ocd_base); | ||
302 | EXPORT_SYMBOL(titan_base); | ||
diff --git a/arch/mips/bcm47xx/prom.c b/arch/mips/bcm47xx/prom.c index fb284c3b2cff..c51405e57921 100644 --- a/arch/mips/bcm47xx/prom.c +++ b/arch/mips/bcm47xx/prom.c | |||
@@ -100,11 +100,11 @@ static __init void prom_init_console(void) | |||
100 | 100 | ||
101 | static __init void prom_init_cmdline(void) | 101 | static __init void prom_init_cmdline(void) |
102 | { | 102 | { |
103 | static char buf[CL_SIZE] __initdata; | 103 | static char buf[COMMAND_LINE_SIZE] __initdata; |
104 | 104 | ||
105 | /* Get the kernel command line from CFE */ | 105 | /* Get the kernel command line from CFE */ |
106 | if (cfe_getenv("LINUX_CMDLINE", buf, CL_SIZE) >= 0) { | 106 | if (cfe_getenv("LINUX_CMDLINE", buf, COMMAND_LINE_SIZE) >= 0) { |
107 | buf[CL_SIZE-1] = 0; | 107 | buf[COMMAND_LINE_SIZE - 1] = 0; |
108 | strcpy(arcs_cmdline, buf); | 108 | strcpy(arcs_cmdline, buf); |
109 | } | 109 | } |
110 | 110 | ||
@@ -112,13 +112,13 @@ static __init void prom_init_cmdline(void) | |||
112 | * as CFE is not available anymore later in the boot process. */ | 112 | * as CFE is not available anymore later in the boot process. */ |
113 | if ((strstr(arcs_cmdline, "console=")) == NULL) { | 113 | if ((strstr(arcs_cmdline, "console=")) == NULL) { |
114 | /* Try to read the default serial port used by CFE */ | 114 | /* Try to read the default serial port used by CFE */ |
115 | if ((cfe_getenv("BOOT_CONSOLE", buf, CL_SIZE) < 0) | 115 | if ((cfe_getenv("BOOT_CONSOLE", buf, COMMAND_LINE_SIZE) < 0) |
116 | || (strncmp("uart", buf, 4))) | 116 | || (strncmp("uart", buf, 4))) |
117 | /* Default to uart0 */ | 117 | /* Default to uart0 */ |
118 | strcpy(buf, "uart0"); | 118 | strcpy(buf, "uart0"); |
119 | 119 | ||
120 | /* Compute the new command line */ | 120 | /* Compute the new command line */ |
121 | snprintf(arcs_cmdline, CL_SIZE, "%s console=ttyS%c,115200", | 121 | snprintf(arcs_cmdline, COMMAND_LINE_SIZE, "%s console=ttyS%c,115200", |
122 | arcs_cmdline, buf[4]); | 122 | arcs_cmdline, buf[4]); |
123 | } | 123 | } |
124 | } | 124 | } |
diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile index 2a209d74f0b4..094bc84765a3 100644 --- a/arch/mips/boot/Makefile +++ b/arch/mips/boot/Makefile | |||
@@ -25,7 +25,7 @@ strip-flags = $(addprefix --remove-section=,$(drop-sections)) | |||
25 | 25 | ||
26 | VMLINUX = vmlinux | 26 | VMLINUX = vmlinux |
27 | 27 | ||
28 | all: vmlinux.ecoff vmlinux.srec addinitrd | 28 | all: vmlinux.ecoff vmlinux.srec |
29 | 29 | ||
30 | vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX) | 30 | vmlinux.ecoff: $(obj)/elf2ecoff $(VMLINUX) |
31 | $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS) | 31 | $(obj)/elf2ecoff $(VMLINUX) vmlinux.ecoff $(E2EFLAGS) |
@@ -39,11 +39,7 @@ vmlinux.bin: $(VMLINUX) | |||
39 | vmlinux.srec: $(VMLINUX) | 39 | vmlinux.srec: $(VMLINUX) |
40 | $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec | 40 | $(OBJCOPY) -S -O srec $(strip-flags) $(VMLINUX) $(obj)/vmlinux.srec |
41 | 41 | ||
42 | $(obj)/addinitrd: $(obj)/addinitrd.c | 42 | clean-files += elf2ecoff \ |
43 | $(HOSTCC) -o $@ $^ | ||
44 | |||
45 | clean-files += addinitrd \ | ||
46 | elf2ecoff \ | ||
47 | vmlinux.bin \ | 43 | vmlinux.bin \ |
48 | vmlinux.ecoff \ | 44 | vmlinux.ecoff \ |
49 | vmlinux.srec | 45 | vmlinux.srec |
diff --git a/arch/mips/boot/addinitrd.c b/arch/mips/boot/addinitrd.c deleted file mode 100644 index b5b3febc10cc..000000000000 --- a/arch/mips/boot/addinitrd.c +++ /dev/null | |||
@@ -1,131 +0,0 @@ | |||
1 | /* | ||
2 | * addinitrd - program to add a initrd image to an ecoff kernel | ||
3 | * | ||
4 | * (C) 1999 Thomas Bogendoerfer | ||
5 | * minor modifications, cleanup: Guido Guenther <agx@sigxcpu.org> | ||
6 | * further cleanup: Maciej W. Rozycki | ||
7 | */ | ||
8 | |||
9 | #include <sys/types.h> | ||
10 | #include <sys/stat.h> | ||
11 | #include <fcntl.h> | ||
12 | #include <unistd.h> | ||
13 | #include <stdio.h> | ||
14 | #include <netinet/in.h> | ||
15 | |||
16 | #include "ecoff.h" | ||
17 | |||
18 | #define MIPS_PAGE_SIZE 4096 | ||
19 | #define MIPS_PAGE_MASK (MIPS_PAGE_SIZE-1) | ||
20 | |||
21 | #define swab16(x) \ | ||
22 | ((unsigned short)( \ | ||
23 | (((unsigned short)(x) & (unsigned short)0x00ffU) << 8) | \ | ||
24 | (((unsigned short)(x) & (unsigned short)0xff00U) >> 8) )) | ||
25 | |||
26 | #define swab32(x) \ | ||
27 | ((unsigned int)( \ | ||
28 | (((unsigned int)(x) & (unsigned int)0x000000ffUL) << 24) | \ | ||
29 | (((unsigned int)(x) & (unsigned int)0x0000ff00UL) << 8) | \ | ||
30 | (((unsigned int)(x) & (unsigned int)0x00ff0000UL) >> 8) | \ | ||
31 | (((unsigned int)(x) & (unsigned int)0xff000000UL) >> 24) )) | ||
32 | |||
33 | #define SWAB(a) (swab ? swab32(a) : (a)) | ||
34 | |||
35 | void die(char *s) | ||
36 | { | ||
37 | perror(s); | ||
38 | exit(1); | ||
39 | } | ||
40 | |||
41 | int main(int argc, char *argv[]) | ||
42 | { | ||
43 | int fd_vmlinux, fd_initrd, fd_outfile; | ||
44 | FILHDR efile; | ||
45 | AOUTHDR eaout; | ||
46 | SCNHDR esecs[3]; | ||
47 | struct stat st; | ||
48 | char buf[1024]; | ||
49 | unsigned long loadaddr; | ||
50 | unsigned long initrd_header[2]; | ||
51 | int i, cnt; | ||
52 | int swab = 0; | ||
53 | |||
54 | if (argc != 4) { | ||
55 | printf("Usage: %s <vmlinux> <initrd> <outfile>\n", argv[0]); | ||
56 | exit(1); | ||
57 | } | ||
58 | |||
59 | if ((fd_vmlinux = open (argv[1], O_RDONLY)) < 0) | ||
60 | die("open vmlinux"); | ||
61 | if (read (fd_vmlinux, &efile, sizeof efile) != sizeof efile) | ||
62 | die("read file header"); | ||
63 | if (read (fd_vmlinux, &eaout, sizeof eaout) != sizeof eaout) | ||
64 | die("read aout header"); | ||
65 | if (read (fd_vmlinux, esecs, sizeof esecs) != sizeof esecs) | ||
66 | die("read section headers"); | ||
67 | /* | ||
68 | * check whether the file is good for us | ||
69 | */ | ||
70 | /* TBD */ | ||
71 | |||
72 | /* | ||
73 | * check, if we have to swab words | ||
74 | */ | ||
75 | if (ntohs(0xaa55) == 0xaa55) { | ||
76 | if (efile.f_magic == swab16(MIPSELMAGIC)) | ||
77 | swab = 1; | ||
78 | } else { | ||
79 | if (efile.f_magic == swab16(MIPSEBMAGIC)) | ||
80 | swab = 1; | ||
81 | } | ||
82 | |||
83 | /* make sure we have an empty data segment for the initrd */ | ||
84 | if (eaout.dsize || esecs[1].s_size) { | ||
85 | fprintf(stderr, "Data segment not empty. Giving up!\n"); | ||
86 | exit(1); | ||
87 | } | ||
88 | if ((fd_initrd = open (argv[2], O_RDONLY)) < 0) | ||
89 | die("open initrd"); | ||
90 | if (fstat (fd_initrd, &st) < 0) | ||
91 | die("fstat initrd"); | ||
92 | loadaddr = ((SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size) | ||
93 | + MIPS_PAGE_SIZE-1) & ~MIPS_PAGE_MASK) - 8; | ||
94 | if (loadaddr < (SWAB(esecs[2].s_vaddr) + SWAB(esecs[2].s_size))) | ||
95 | loadaddr += MIPS_PAGE_SIZE; | ||
96 | initrd_header[0] = SWAB(0x494E5244); | ||
97 | initrd_header[1] = SWAB(st.st_size); | ||
98 | eaout.dsize = esecs[1].s_size = initrd_header[1] = SWAB(st.st_size+8); | ||
99 | eaout.data_start = esecs[1].s_vaddr = esecs[1].s_paddr = SWAB(loadaddr); | ||
100 | |||
101 | if ((fd_outfile = open (argv[3], O_RDWR|O_CREAT|O_TRUNC, 0666)) < 0) | ||
102 | die("open outfile"); | ||
103 | if (write (fd_outfile, &efile, sizeof efile) != sizeof efile) | ||
104 | die("write file header"); | ||
105 | if (write (fd_outfile, &eaout, sizeof eaout) != sizeof eaout) | ||
106 | die("write aout header"); | ||
107 | if (write (fd_outfile, esecs, sizeof esecs) != sizeof esecs) | ||
108 | die("write section headers"); | ||
109 | /* skip padding */ | ||
110 | if(lseek(fd_vmlinux, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1) | ||
111 | die("lseek vmlinux"); | ||
112 | if(lseek(fd_outfile, SWAB(esecs[0].s_scnptr), SEEK_SET) == (off_t)-1) | ||
113 | die("lseek outfile"); | ||
114 | /* copy text segment */ | ||
115 | cnt = SWAB(eaout.tsize); | ||
116 | while (cnt) { | ||
117 | if ((i = read (fd_vmlinux, buf, sizeof buf)) <= 0) | ||
118 | die("read vmlinux"); | ||
119 | if (write (fd_outfile, buf, i) != i) | ||
120 | die("write vmlinux"); | ||
121 | cnt -= i; | ||
122 | } | ||
123 | if (write (fd_outfile, initrd_header, sizeof initrd_header) != sizeof initrd_header) | ||
124 | die("write initrd header"); | ||
125 | while ((i = read (fd_initrd, buf, sizeof buf)) > 0) | ||
126 | if (write (fd_outfile, buf, i) != i) | ||
127 | die("write initrd"); | ||
128 | close(fd_vmlinux); | ||
129 | close(fd_initrd); | ||
130 | return 0; | ||
131 | } | ||
diff --git a/arch/mips/boot/compressed/Makefile b/arch/mips/boot/compressed/Makefile new file mode 100644 index 000000000000..e27f40bbd4e5 --- /dev/null +++ b/arch/mips/boot/compressed/Makefile | |||
@@ -0,0 +1,100 @@ | |||
1 | # | ||
2 | # This file is subject to the terms and conditions of the GNU General Public | ||
3 | # License. | ||
4 | # | ||
5 | # Adapted for MIPS Pete Popov, Dan Malek | ||
6 | # | ||
7 | # Copyright (C) 1994 by Linus Torvalds | ||
8 | # Adapted for PowerPC by Gary Thomas | ||
9 | # modified by Cort (cort@cs.nmt.edu) | ||
10 | # | ||
11 | # Copyright (C) 2009 Lemote Inc. & DSLab, Lanzhou University | ||
12 | # Author: Wu Zhangjin <wuzj@lemote.com> | ||
13 | # | ||
14 | |||
15 | # compressed kernel load addr: VMLINUZ_LOAD_ADDRESS > VMLINUX_LOAD_ADDRESS + VMLINUX_SIZE | ||
16 | VMLINUX_SIZE := $(shell wc -c $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | cut -d' ' -f1) | ||
17 | VMLINUX_SIZE := $(shell [ -n "$(VMLINUX_SIZE)" ] && echo $$(($(VMLINUX_SIZE) + (65536 - $(VMLINUX_SIZE) % 65536)))) | ||
18 | VMLINUZ_LOAD_ADDRESS := 0x$(shell [ -n "$(VMLINUX_SIZE)" ] && printf %x $$(($(VMLINUX_LOAD_ADDRESS) + $(VMLINUX_SIZE)))) | ||
19 | |||
20 | # set the default size of the mallocing area for decompressing | ||
21 | BOOT_HEAP_SIZE := 0x400000 | ||
22 | |||
23 | # Disable Function Tracer | ||
24 | KBUILD_CFLAGS := $(shell echo $(KBUILD_CFLAGS) | sed -e "s/-pg//") | ||
25 | |||
26 | KBUILD_CFLAGS := $(LINUXINCLUDE) $(KBUILD_CFLAGS) -D__KERNEL__ \ | ||
27 | -DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) -D"VMLINUX_LOAD_ADDRESS_ULL=$(VMLINUX_LOAD_ADDRESS)ull" \ | ||
28 | |||
29 | KBUILD_AFLAGS := $(LINUXINCLUDE) $(KBUILD_AFLAGS) -D__ASSEMBLY__ \ | ||
30 | -DKERNEL_ENTRY=0x$(shell $(NM) $(objtree)/$(KBUILD_IMAGE) 2>/dev/null | grep " kernel_entry" | cut -f1 -d \ ) \ | ||
31 | -DBOOT_HEAP_SIZE=$(BOOT_HEAP_SIZE) | ||
32 | |||
33 | obj-y := $(obj)/head.o $(obj)/decompress.o $(obj)/dbg.o | ||
34 | |||
35 | obj-$(CONFIG_SYS_SUPPORTS_ZBOOT_UART16550) += $(obj)/uart-16550.o | ||
36 | |||
37 | OBJCOPYFLAGS_vmlinux.bin := $(OBJCOPYFLAGS) -O binary -R .comment -S | ||
38 | $(obj)/vmlinux.bin: $(KBUILD_IMAGE) | ||
39 | $(call if_changed,objcopy) | ||
40 | |||
41 | suffix_$(CONFIG_KERNEL_GZIP) = gz | ||
42 | suffix_$(CONFIG_KERNEL_BZIP2) = bz2 | ||
43 | suffix_$(CONFIG_KERNEL_LZMA) = lzma | ||
44 | tool_$(CONFIG_KERNEL_GZIP) = gzip | ||
45 | tool_$(CONFIG_KERNEL_BZIP2) = bzip2 | ||
46 | tool_$(CONFIG_KERNEL_LZMA) = lzma | ||
47 | $(obj)/vmlinux.$(suffix_y): $(obj)/vmlinux.bin | ||
48 | $(call if_changed,$(tool_y)) | ||
49 | |||
50 | $(obj)/piggy.o: $(obj)/vmlinux.$(suffix_y) $(obj)/dummy.o | ||
51 | $(Q)$(OBJCOPY) $(OBJCOPYFLAGS) \ | ||
52 | --add-section=.image=$< \ | ||
53 | --set-section-flags=.image=contents,alloc,load,readonly,data \ | ||
54 | $(obj)/dummy.o $@ | ||
55 | |||
56 | LDFLAGS_vmlinuz := $(LDFLAGS) -Ttext $(VMLINUZ_LOAD_ADDRESS) -T | ||
57 | vmlinuz: $(src)/ld.script $(obj-y) $(obj)/piggy.o | ||
58 | $(call if_changed,ld) | ||
59 | $(Q)$(OBJCOPY) $(OBJCOPYFLAGS) -R .comment -R .stab -R .stabstr -R .initrd -R .sysmap $@ | ||
60 | |||
61 | # | ||
62 | # Some DECstations need all possible sections of an ECOFF executable | ||
63 | # | ||
64 | ifdef CONFIG_MACH_DECSTATION | ||
65 | E2EFLAGS = -a | ||
66 | else | ||
67 | E2EFLAGS = | ||
68 | endif | ||
69 | |||
70 | # elf2ecoff can only handle 32bit image | ||
71 | |||
72 | ifdef CONFIG_32BIT | ||
73 | VMLINUZ = vmlinuz | ||
74 | else | ||
75 | VMLINUZ = vmlinuz.32 | ||
76 | endif | ||
77 | |||
78 | vmlinuz.32: vmlinuz | ||
79 | $(Q)$(OBJCOPY) -O $(32bit-bfd) $(OBJCOPYFLAGS) $< $@ | ||
80 | |||
81 | vmlinuz.ecoff: $(obj)/../elf2ecoff $(VMLINUZ) | ||
82 | $(Q)$(obj)/../elf2ecoff $(VMLINUZ) vmlinuz.ecoff $(E2EFLAGS) | ||
83 | |||
84 | $(obj)/../elf2ecoff: $(src)/../elf2ecoff.c | ||
85 | $(Q)$(HOSTCC) -o $@ $^ | ||
86 | |||
87 | drop-sections = .reginfo .mdebug .comment .note .pdr .options .MIPS.options | ||
88 | strip-flags = $(addprefix --remove-section=,$(drop-sections)) | ||
89 | |||
90 | OBJCOPYFLAGS_vmlinuz.bin := $(OBJCOPYFLAGS) -O binary $(strip-flags) | ||
91 | vmlinuz.bin: vmlinuz | ||
92 | $(call if_changed,objcopy) | ||
93 | |||
94 | OBJCOPYFLAGS_vmlinuz.srec := $(OBJCOPYFLAGS) -S -O srec $(strip-flags) | ||
95 | vmlinuz.srec: vmlinuz | ||
96 | $(call if_changed,objcopy) | ||
97 | |||
98 | clean: | ||
99 | clean-files += *.o \ | ||
100 | vmlinu* | ||
diff --git a/arch/mips/boot/compressed/dbg.c b/arch/mips/boot/compressed/dbg.c new file mode 100644 index 000000000000..ff4dc7a33a9f --- /dev/null +++ b/arch/mips/boot/compressed/dbg.c | |||
@@ -0,0 +1,37 @@ | |||
1 | /* | ||
2 | * MIPS-specific debug support for pre-boot environment | ||
3 | * | ||
4 | * NOTE: putc() is board specific, if your board have a 16550 compatible uart, | ||
5 | * please select SYS_SUPPORTS_ZBOOT_UART16550 for your machine. othewise, you | ||
6 | * need to implement your own putc(). | ||
7 | */ | ||
8 | |||
9 | #include <linux/init.h> | ||
10 | #include <linux/types.h> | ||
11 | |||
12 | void __attribute__ ((weak)) putc(char c) | ||
13 | { | ||
14 | } | ||
15 | |||
16 | void puts(const char *s) | ||
17 | { | ||
18 | char c; | ||
19 | while ((c = *s++) != '\0') { | ||
20 | putc(c); | ||
21 | if (c == '\n') | ||
22 | putc('\r'); | ||
23 | } | ||
24 | } | ||
25 | |||
26 | void puthex(unsigned long long val) | ||
27 | { | ||
28 | |||
29 | unsigned char buf[10]; | ||
30 | int i; | ||
31 | for (i = 7; i >= 0; i--) { | ||
32 | buf[i] = "0123456789ABCDEF"[val & 0x0F]; | ||
33 | val >>= 4; | ||
34 | } | ||
35 | buf[8] = '\0'; | ||
36 | puts(buf); | ||
37 | } | ||
diff --git a/arch/mips/boot/compressed/decompress.c b/arch/mips/boot/compressed/decompress.c new file mode 100644 index 000000000000..67330c2f7318 --- /dev/null +++ b/arch/mips/boot/compressed/decompress.c | |||
@@ -0,0 +1,126 @@ | |||
1 | /* | ||
2 | * Misc. bootloader code for many machines. | ||
3 | * | ||
4 | * Copyright 2001 MontaVista Software Inc. | ||
5 | * Author: Matt Porter <mporter@mvista.com> Derived from | ||
6 | * arch/ppc/boot/prep/misc.c | ||
7 | * | ||
8 | * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology | ||
9 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License as published by the | ||
13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
14 | * option) any later version. | ||
15 | */ | ||
16 | |||
17 | #include <linux/types.h> | ||
18 | #include <linux/kernel.h> | ||
19 | |||
20 | #include <asm/addrspace.h> | ||
21 | |||
22 | /* These two variables specify the free mem region | ||
23 | * that can be used for temporary malloc area | ||
24 | */ | ||
25 | unsigned long free_mem_ptr; | ||
26 | unsigned long free_mem_end_ptr; | ||
27 | char *zimage_start; | ||
28 | |||
29 | /* The linker tells us where the image is. */ | ||
30 | extern unsigned char __image_begin, __image_end; | ||
31 | extern unsigned char __ramdisk_begin, __ramdisk_end; | ||
32 | unsigned long initrd_size; | ||
33 | |||
34 | /* debug interfaces */ | ||
35 | extern void puts(const char *s); | ||
36 | extern void puthex(unsigned long long val); | ||
37 | |||
38 | void error(char *x) | ||
39 | { | ||
40 | puts("\n\n"); | ||
41 | puts(x); | ||
42 | puts("\n\n -- System halted"); | ||
43 | |||
44 | while (1) | ||
45 | ; /* Halt */ | ||
46 | } | ||
47 | |||
48 | /* activate the code for pre-boot environment */ | ||
49 | #define STATIC static | ||
50 | |||
51 | #ifdef CONFIG_KERNEL_GZIP | ||
52 | void *memcpy(void *dest, const void *src, size_t n) | ||
53 | { | ||
54 | int i; | ||
55 | const char *s = src; | ||
56 | char *d = dest; | ||
57 | |||
58 | for (i = 0; i < n; i++) | ||
59 | d[i] = s[i]; | ||
60 | return dest; | ||
61 | } | ||
62 | #include "../../../../lib/decompress_inflate.c" | ||
63 | #endif | ||
64 | |||
65 | #ifdef CONFIG_KERNEL_BZIP2 | ||
66 | void *memset(void *s, int c, size_t n) | ||
67 | { | ||
68 | int i; | ||
69 | char *ss = s; | ||
70 | |||
71 | for (i = 0; i < n; i++) | ||
72 | ss[i] = c; | ||
73 | return s; | ||
74 | } | ||
75 | #include "../../../../lib/decompress_bunzip2.c" | ||
76 | #endif | ||
77 | |||
78 | #ifdef CONFIG_KERNEL_LZMA | ||
79 | #include "../../../../lib/decompress_unlzma.c" | ||
80 | #endif | ||
81 | |||
82 | void decompress_kernel(unsigned long boot_heap_start) | ||
83 | { | ||
84 | int zimage_size; | ||
85 | |||
86 | /* | ||
87 | * We link ourself to an arbitrary low address. When we run, we | ||
88 | * relocate outself to that address. __image_beign points to | ||
89 | * the part of the image where the zImage is. -- Tom | ||
90 | */ | ||
91 | zimage_start = (char *)(unsigned long)(&__image_begin); | ||
92 | zimage_size = (unsigned long)(&__image_end) - | ||
93 | (unsigned long)(&__image_begin); | ||
94 | |||
95 | /* | ||
96 | * The zImage and initrd will be between start and _end, so they've | ||
97 | * already been moved once. We're good to go now. -- Tom | ||
98 | */ | ||
99 | puts("zimage at: "); | ||
100 | puthex((unsigned long)zimage_start); | ||
101 | puts(" "); | ||
102 | puthex((unsigned long)(zimage_size + zimage_start)); | ||
103 | puts("\n"); | ||
104 | |||
105 | if (initrd_size) { | ||
106 | puts("initrd at: "); | ||
107 | puthex((unsigned long)(&__ramdisk_begin)); | ||
108 | puts(" "); | ||
109 | puthex((unsigned long)(&__ramdisk_end)); | ||
110 | puts("\n"); | ||
111 | } | ||
112 | |||
113 | /* this area are prepared for mallocing when decompressing */ | ||
114 | free_mem_ptr = boot_heap_start; | ||
115 | free_mem_end_ptr = boot_heap_start + BOOT_HEAP_SIZE; | ||
116 | |||
117 | /* Display standard Linux/MIPS boot prompt for kernel args */ | ||
118 | puts("Uncompressing Linux at load address "); | ||
119 | puthex(VMLINUX_LOAD_ADDRESS_ULL); | ||
120 | puts("\n"); | ||
121 | /* Decompress the kernel with according algorithm */ | ||
122 | decompress(zimage_start, zimage_size, 0, 0, | ||
123 | (void *)VMLINUX_LOAD_ADDRESS_ULL, 0, error); | ||
124 | /* FIXME: is there a need to flush cache here? */ | ||
125 | puts("Now, booting the kernel...\n"); | ||
126 | } | ||
diff --git a/arch/mips/boot/compressed/dummy.c b/arch/mips/boot/compressed/dummy.c new file mode 100644 index 000000000000..31dbf45bf99c --- /dev/null +++ b/arch/mips/boot/compressed/dummy.c | |||
@@ -0,0 +1,4 @@ | |||
1 | int main(void) | ||
2 | { | ||
3 | return 0; | ||
4 | } | ||
diff --git a/arch/mips/boot/compressed/head.S b/arch/mips/boot/compressed/head.S new file mode 100644 index 000000000000..4e65a8420bee --- /dev/null +++ b/arch/mips/boot/compressed/head.S | |||
@@ -0,0 +1,56 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 1994, 1995 Waldorf Electronics | ||
7 | * Written by Ralf Baechle and Andreas Busse | ||
8 | * Copyright (C) 1995 - 1999 Ralf Baechle | ||
9 | * Copyright (C) 1996 Paul M. Antoine | ||
10 | * Modified for DECStation and hence R3000 support by Paul M. Antoine | ||
11 | * Further modifications by David S. Miller and Harald Koerfgen | ||
12 | * Copyright (C) 1999 Silicon Graphics, Inc. | ||
13 | */ | ||
14 | |||
15 | #include <asm/asm.h> | ||
16 | #include <asm/regdef.h> | ||
17 | |||
18 | .set noreorder | ||
19 | .cprestore | ||
20 | LEAF(start) | ||
21 | start: | ||
22 | /* Save boot rom start args */ | ||
23 | move s0, a0 | ||
24 | move s1, a1 | ||
25 | move s2, a2 | ||
26 | move s3, a3 | ||
27 | |||
28 | /* Clear BSS */ | ||
29 | PTR_LA a0, _edata | ||
30 | PTR_LA a2, _end | ||
31 | 1: sw zero, 0(a0) | ||
32 | bne a2, a0, 1b | ||
33 | addiu a0, a0, 4 | ||
34 | |||
35 | PTR_LA a0, (.heap) /* heap address */ | ||
36 | PTR_LA sp, (.stack + 8192) /* stack address */ | ||
37 | |||
38 | PTR_LA ra, 2f | ||
39 | PTR_LA k0, decompress_kernel | ||
40 | jr k0 | ||
41 | nop | ||
42 | 2: | ||
43 | move a0, s0 | ||
44 | move a1, s1 | ||
45 | move a2, s2 | ||
46 | move a3, s3 | ||
47 | PTR_LI k0, KERNEL_ENTRY | ||
48 | jr k0 | ||
49 | nop | ||
50 | 3: | ||
51 | b 3b | ||
52 | nop | ||
53 | END(start) | ||
54 | |||
55 | .comm .heap,BOOT_HEAP_SIZE,4 | ||
56 | .comm .stack,4096*2,4 | ||
diff --git a/arch/mips/boot/compressed/ld.script b/arch/mips/boot/compressed/ld.script new file mode 100644 index 000000000000..29e9f4c0d5d8 --- /dev/null +++ b/arch/mips/boot/compressed/ld.script | |||
@@ -0,0 +1,150 @@ | |||
1 | OUTPUT_ARCH(mips) | ||
2 | ENTRY(start) | ||
3 | SECTIONS | ||
4 | { | ||
5 | /* Read-only sections, merged into text segment: */ | ||
6 | .init : { *(.init) } =0 | ||
7 | .text : | ||
8 | { | ||
9 | _ftext = . ; | ||
10 | *(.text) | ||
11 | *(.rodata) | ||
12 | *(.rodata1) | ||
13 | /* .gnu.warning sections are handled specially by elf32.em. */ | ||
14 | *(.gnu.warning) | ||
15 | } =0 | ||
16 | .kstrtab : { *(.kstrtab) } | ||
17 | |||
18 | . = ALIGN(16); /* Exception table */ | ||
19 | __start___ex_table = .; | ||
20 | __ex_table : { *(__ex_table) } | ||
21 | __stop___ex_table = .; | ||
22 | |||
23 | __start___dbe_table = .; /* Exception table for data bus errors */ | ||
24 | __dbe_table : { *(__dbe_table) } | ||
25 | __stop___dbe_table = .; | ||
26 | |||
27 | __start___ksymtab = .; /* Kernel symbol table */ | ||
28 | __ksymtab : { *(__ksymtab) } | ||
29 | __stop___ksymtab = .; | ||
30 | |||
31 | _etext = .; | ||
32 | |||
33 | . = ALIGN(8192); | ||
34 | .data.init_task : { *(.data.init_task) } | ||
35 | |||
36 | /* Startup code */ | ||
37 | . = ALIGN(4096); | ||
38 | __init_begin = .; | ||
39 | .text.init : { *(.text.init) } | ||
40 | .data.init : { *(.data.init) } | ||
41 | . = ALIGN(16); | ||
42 | __setup_start = .; | ||
43 | .setup.init : { *(.setup.init) } | ||
44 | __setup_end = .; | ||
45 | __initcall_start = .; | ||
46 | .initcall.init : { *(.initcall.init) } | ||
47 | __initcall_end = .; | ||
48 | . = ALIGN(4096); /* Align double page for init_task_union */ | ||
49 | __init_end = .; | ||
50 | |||
51 | . = ALIGN(4096); | ||
52 | .data.page_aligned : { *(.data.idt) } | ||
53 | |||
54 | . = ALIGN(32); | ||
55 | .data.cacheline_aligned : { *(.data.cacheline_aligned) } | ||
56 | |||
57 | .fini : { *(.fini) } =0 | ||
58 | .reginfo : { *(.reginfo) } | ||
59 | /* Adjust the address for the data segment. We want to adjust up to | ||
60 | the same address within the page on the next page up. It would | ||
61 | be more correct to do this: | ||
62 | . = .; | ||
63 | The current expression does not correctly handle the case of a | ||
64 | text segment ending precisely at the end of a page; it causes the | ||
65 | data segment to skip a page. The above expression does not have | ||
66 | this problem, but it will currently (2/95) cause BFD to allocate | ||
67 | a single segment, combining both text and data, for this case. | ||
68 | This will prevent the text segment from being shared among | ||
69 | multiple executions of the program; I think that is more | ||
70 | important than losing a page of the virtual address space (note | ||
71 | that no actual memory is lost; the page which is skipped can not | ||
72 | be referenced). */ | ||
73 | . = .; | ||
74 | .data : | ||
75 | { | ||
76 | _fdata = . ; | ||
77 | *(.data) | ||
78 | |||
79 | /* Put the compressed image here, so bss is on the end. */ | ||
80 | __image_begin = .; | ||
81 | *(.image) | ||
82 | __image_end = .; | ||
83 | /* Align the initial ramdisk image (INITRD) on page boundaries. */ | ||
84 | . = ALIGN(4096); | ||
85 | __ramdisk_begin = .; | ||
86 | *(.initrd) | ||
87 | __ramdisk_end = .; | ||
88 | . = ALIGN(4096); | ||
89 | |||
90 | CONSTRUCTORS | ||
91 | } | ||
92 | .data1 : { *(.data1) } | ||
93 | _gp = . + 0x8000; | ||
94 | .lit8 : { *(.lit8) } | ||
95 | .lit4 : { *(.lit4) } | ||
96 | .ctors : { *(.ctors) } | ||
97 | .dtors : { *(.dtors) } | ||
98 | .got : { *(.got.plt) *(.got) } | ||
99 | .dynamic : { *(.dynamic) } | ||
100 | /* We want the small data sections together, so single-instruction offsets | ||
101 | can access them all, and initialized data all before uninitialized, so | ||
102 | we can shorten the on-disk segment size. */ | ||
103 | .sdata : { *(.sdata) } | ||
104 | . = ALIGN(4); | ||
105 | _edata = .; | ||
106 | PROVIDE (edata = .); | ||
107 | |||
108 | __bss_start = .; | ||
109 | _fbss = .; | ||
110 | .sbss : { *(.sbss) *(.scommon) } | ||
111 | .bss : | ||
112 | { | ||
113 | *(.dynbss) | ||
114 | *(.bss) | ||
115 | *(COMMON) | ||
116 | . = ALIGN(4); | ||
117 | _end = . ; | ||
118 | PROVIDE (end = .); | ||
119 | } | ||
120 | |||
121 | /* Sections to be discarded */ | ||
122 | /DISCARD/ : | ||
123 | { | ||
124 | *(.text.exit) | ||
125 | *(.data.exit) | ||
126 | *(.exitcall.exit) | ||
127 | } | ||
128 | |||
129 | /* This is the MIPS specific mdebug section. */ | ||
130 | .mdebug : { *(.mdebug) } | ||
131 | /* These are needed for ELF backends which have not yet been | ||
132 | converted to the new style linker. */ | ||
133 | .stab 0 : { *(.stab) } | ||
134 | .stabstr 0 : { *(.stabstr) } | ||
135 | /* DWARF debug sections. | ||
136 | Symbols in the .debug DWARF section are relative to the beginning of the | ||
137 | section so we begin .debug at 0. It's not clear yet what needs to happen | ||
138 | for the others. */ | ||
139 | .debug 0 : { *(.debug) } | ||
140 | .debug_srcinfo 0 : { *(.debug_srcinfo) } | ||
141 | .debug_aranges 0 : { *(.debug_aranges) } | ||
142 | .debug_pubnames 0 : { *(.debug_pubnames) } | ||
143 | .debug_sfnames 0 : { *(.debug_sfnames) } | ||
144 | .line 0 : { *(.line) } | ||
145 | /* These must appear regardless of . */ | ||
146 | .gptab.sdata : { *(.gptab.data) *(.gptab.sdata) } | ||
147 | .gptab.sbss : { *(.gptab.bss) *(.gptab.sbss) } | ||
148 | .comment : { *(.comment) } | ||
149 | .note : { *(.note) } | ||
150 | } | ||
diff --git a/arch/mips/boot/compressed/uart-16550.c b/arch/mips/boot/compressed/uart-16550.c new file mode 100644 index 000000000000..c9caaf4fbf60 --- /dev/null +++ b/arch/mips/boot/compressed/uart-16550.c | |||
@@ -0,0 +1,43 @@ | |||
1 | /* | ||
2 | * 16550 compatible uart based serial debug support for zboot | ||
3 | */ | ||
4 | |||
5 | #include <linux/types.h> | ||
6 | #include <linux/serial_reg.h> | ||
7 | #include <linux/init.h> | ||
8 | |||
9 | #include <asm/addrspace.h> | ||
10 | |||
11 | #if defined(CONFIG_MACH_LOONGSON) || defined(CONFIG_MIPS_MALTA) | ||
12 | #define UART_BASE 0x1fd003f8 | ||
13 | #define PORT(offset) (CKSEG1ADDR(UART_BASE) + (offset)) | ||
14 | #endif | ||
15 | |||
16 | #ifdef CONFIG_AR7 | ||
17 | #include <ar7.h> | ||
18 | #define PORT(offset) (CKSEG1ADDR(AR7_REGS_UART0) + (4 * offset)) | ||
19 | #endif | ||
20 | |||
21 | #ifndef PORT | ||
22 | #error please define the serial port address for your own machine | ||
23 | #endif | ||
24 | |||
25 | static inline unsigned int serial_in(int offset) | ||
26 | { | ||
27 | return *((char *)PORT(offset)); | ||
28 | } | ||
29 | |||
30 | static inline void serial_out(int offset, int value) | ||
31 | { | ||
32 | *((char *)PORT(offset)) = value; | ||
33 | } | ||
34 | |||
35 | void putc(char c) | ||
36 | { | ||
37 | int timeout = 1024; | ||
38 | |||
39 | while (((serial_in(UART_LSR) & UART_LSR_THRE) == 0) && (timeout-- > 0)) | ||
40 | ; | ||
41 | |||
42 | serial_out(UART_TX, c); | ||
43 | } | ||
diff --git a/arch/mips/cavium-octeon/Makefile b/arch/mips/cavium-octeon/Makefile index 139436280520..3e9876317e61 100644 --- a/arch/mips/cavium-octeon/Makefile +++ b/arch/mips/cavium-octeon/Makefile | |||
@@ -9,7 +9,7 @@ | |||
9 | # Copyright (C) 2005-2009 Cavium Networks | 9 | # Copyright (C) 2005-2009 Cavium Networks |
10 | # | 10 | # |
11 | 11 | ||
12 | obj-y := setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o | 12 | obj-y := cpu.o setup.o serial.o octeon-platform.o octeon-irq.o csrc-octeon.o |
13 | obj-y += dma-octeon.o flash_setup.o | 13 | obj-y += dma-octeon.o flash_setup.o |
14 | obj-y += octeon-memcpy.o | 14 | obj-y += octeon-memcpy.o |
15 | 15 | ||
diff --git a/arch/mips/cavium-octeon/cpu.c b/arch/mips/cavium-octeon/cpu.c new file mode 100644 index 000000000000..b6df5387e855 --- /dev/null +++ b/arch/mips/cavium-octeon/cpu.c | |||
@@ -0,0 +1,52 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2009 Wind River Systems, | ||
7 | * written by Ralf Baechle <ralf@linux-mips.org> | ||
8 | */ | ||
9 | #include <linux/init.h> | ||
10 | #include <linux/irqflags.h> | ||
11 | #include <linux/notifier.h> | ||
12 | #include <linux/prefetch.h> | ||
13 | #include <linux/sched.h> | ||
14 | |||
15 | #include <asm/cop2.h> | ||
16 | #include <asm/current.h> | ||
17 | #include <asm/mipsregs.h> | ||
18 | #include <asm/page.h> | ||
19 | #include <asm/octeon/octeon.h> | ||
20 | |||
21 | static int cnmips_cu2_call(struct notifier_block *nfb, unsigned long action, | ||
22 | void *data) | ||
23 | { | ||
24 | unsigned long flags; | ||
25 | unsigned int status; | ||
26 | |||
27 | switch (action) { | ||
28 | case CU2_EXCEPTION: | ||
29 | prefetch(¤t->thread.cp2); | ||
30 | local_irq_save(flags); | ||
31 | KSTK_STATUS(current) |= ST0_CU2; | ||
32 | status = read_c0_status(); | ||
33 | write_c0_status(status | ST0_CU2); | ||
34 | octeon_cop2_restore(&(current->thread.cp2)); | ||
35 | write_c0_status(status & ~ST0_CU2); | ||
36 | local_irq_restore(flags); | ||
37 | |||
38 | return NOTIFY_BAD; /* Don't call default notifier */ | ||
39 | } | ||
40 | |||
41 | return NOTIFY_OK; /* Let default notifier send signals */ | ||
42 | } | ||
43 | |||
44 | static struct notifier_block cnmips_cu2_notifier = { | ||
45 | .notifier_call = cnmips_cu2_call, | ||
46 | }; | ||
47 | |||
48 | static int cnmips_cu2_setup(void) | ||
49 | { | ||
50 | return register_cu2_notifier(&cnmips_cu2_notifier); | ||
51 | } | ||
52 | early_initcall(cnmips_cu2_setup); | ||
diff --git a/arch/mips/cavium-octeon/octeon-platform.c b/arch/mips/cavium-octeon/octeon-platform.c index be711dd2d918..cfdb4c2ac5c3 100644 --- a/arch/mips/cavium-octeon/octeon-platform.c +++ b/arch/mips/cavium-octeon/octeon-platform.c | |||
@@ -159,6 +159,94 @@ out: | |||
159 | } | 159 | } |
160 | device_initcall(octeon_rng_device_init); | 160 | device_initcall(octeon_rng_device_init); |
161 | 161 | ||
162 | /* Octeon SMI/MDIO interface. */ | ||
163 | static int __init octeon_mdiobus_device_init(void) | ||
164 | { | ||
165 | struct platform_device *pd; | ||
166 | int ret = 0; | ||
167 | |||
168 | if (octeon_is_simulation()) | ||
169 | return 0; /* No mdio in the simulator. */ | ||
170 | |||
171 | /* The bus number is the platform_device id. */ | ||
172 | pd = platform_device_alloc("mdio-octeon", 0); | ||
173 | if (!pd) { | ||
174 | ret = -ENOMEM; | ||
175 | goto out; | ||
176 | } | ||
177 | |||
178 | ret = platform_device_add(pd); | ||
179 | if (ret) | ||
180 | goto fail; | ||
181 | |||
182 | return ret; | ||
183 | fail: | ||
184 | platform_device_put(pd); | ||
185 | |||
186 | out: | ||
187 | return ret; | ||
188 | |||
189 | } | ||
190 | device_initcall(octeon_mdiobus_device_init); | ||
191 | |||
192 | /* Octeon mgmt port Ethernet interface. */ | ||
193 | static int __init octeon_mgmt_device_init(void) | ||
194 | { | ||
195 | struct platform_device *pd; | ||
196 | int ret = 0; | ||
197 | int port, num_ports; | ||
198 | |||
199 | struct resource mgmt_port_resource = { | ||
200 | .flags = IORESOURCE_IRQ, | ||
201 | .start = -1, | ||
202 | .end = -1 | ||
203 | }; | ||
204 | |||
205 | if (!OCTEON_IS_MODEL(OCTEON_CN56XX) && !OCTEON_IS_MODEL(OCTEON_CN52XX)) | ||
206 | return 0; | ||
207 | |||
208 | if (OCTEON_IS_MODEL(OCTEON_CN56XX)) | ||
209 | num_ports = 1; | ||
210 | else | ||
211 | num_ports = 2; | ||
212 | |||
213 | for (port = 0; port < num_ports; port++) { | ||
214 | pd = platform_device_alloc("octeon_mgmt", port); | ||
215 | if (!pd) { | ||
216 | ret = -ENOMEM; | ||
217 | goto out; | ||
218 | } | ||
219 | switch (port) { | ||
220 | case 0: | ||
221 | mgmt_port_resource.start = OCTEON_IRQ_MII0; | ||
222 | break; | ||
223 | case 1: | ||
224 | mgmt_port_resource.start = OCTEON_IRQ_MII1; | ||
225 | break; | ||
226 | default: | ||
227 | BUG(); | ||
228 | } | ||
229 | mgmt_port_resource.end = mgmt_port_resource.start; | ||
230 | |||
231 | ret = platform_device_add_resources(pd, &mgmt_port_resource, 1); | ||
232 | |||
233 | if (ret) | ||
234 | goto fail; | ||
235 | |||
236 | ret = platform_device_add(pd); | ||
237 | if (ret) | ||
238 | goto fail; | ||
239 | } | ||
240 | return ret; | ||
241 | fail: | ||
242 | platform_device_put(pd); | ||
243 | |||
244 | out: | ||
245 | return ret; | ||
246 | |||
247 | } | ||
248 | device_initcall(octeon_mgmt_device_init); | ||
249 | |||
162 | MODULE_AUTHOR("David Daney <ddaney@caviumnetworks.com>"); | 250 | MODULE_AUTHOR("David Daney <ddaney@caviumnetworks.com>"); |
163 | MODULE_LICENSE("GPL"); | 251 | MODULE_LICENSE("GPL"); |
164 | MODULE_DESCRIPTION("Platform driver for Octeon SOC"); | 252 | MODULE_DESCRIPTION("Platform driver for Octeon SOC"); |
diff --git a/arch/mips/configs/ar7_defconfig b/arch/mips/configs/ar7_defconfig index 35648302f7cc..5a5b6ba7514e 100644 --- a/arch/mips/configs/ar7_defconfig +++ b/arch/mips/configs/ar7_defconfig | |||
@@ -10,7 +10,6 @@ CONFIG_MIPS=y | |||
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | CONFIG_AR7=y | 12 | CONFIG_AR7=y |
13 | # CONFIG_BASLER_EXCITE is not set | ||
14 | # CONFIG_BCM47XX is not set | 13 | # CONFIG_BCM47XX is not set |
15 | # CONFIG_MIPS_COBALT is not set | 14 | # CONFIG_MIPS_COBALT is not set |
16 | # CONFIG_MACH_DECSTATION is not set | 15 | # CONFIG_MACH_DECSTATION is not set |
@@ -265,7 +264,6 @@ CONFIG_DEFAULT_DEADLINE=y | |||
265 | # CONFIG_DEFAULT_CFQ is not set | 264 | # CONFIG_DEFAULT_CFQ is not set |
266 | # CONFIG_DEFAULT_NOOP is not set | 265 | # CONFIG_DEFAULT_NOOP is not set |
267 | CONFIG_DEFAULT_IOSCHED="deadline" | 266 | CONFIG_DEFAULT_IOSCHED="deadline" |
268 | CONFIG_PROBE_INITRD_HEADER=y | ||
269 | # CONFIG_FREEZER is not set | 267 | # CONFIG_FREEZER is not set |
270 | 268 | ||
271 | # | 269 | # |
@@ -1053,7 +1051,9 @@ CONFIG_TRACING_SUPPORT=y | |||
1053 | # CONFIG_DYNAMIC_DEBUG is not set | 1051 | # CONFIG_DYNAMIC_DEBUG is not set |
1054 | # CONFIG_SAMPLES is not set | 1052 | # CONFIG_SAMPLES is not set |
1055 | CONFIG_HAVE_ARCH_KGDB=y | 1053 | CONFIG_HAVE_ARCH_KGDB=y |
1054 | CONFIG_CMDLINE_BOOL=y | ||
1056 | CONFIG_CMDLINE="rootfstype=squashfs,jffs2" | 1055 | CONFIG_CMDLINE="rootfstype=squashfs,jffs2" |
1056 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
1057 | 1057 | ||
1058 | # | 1058 | # |
1059 | # Security options | 1059 | # Security options |
diff --git a/arch/mips/configs/bcm47xx_defconfig b/arch/mips/configs/bcm47xx_defconfig index 94b7d57f906d..267bd46120bc 100644 --- a/arch/mips/configs/bcm47xx_defconfig +++ b/arch/mips/configs/bcm47xx_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | CONFIG_BCM47XX=y | 12 | CONFIG_BCM47XX=y |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1853,7 +1852,7 @@ CONFIG_DEBUG_FS=y | |||
1853 | # CONFIG_HEADERS_CHECK is not set | 1852 | # CONFIG_HEADERS_CHECK is not set |
1854 | # CONFIG_DEBUG_KERNEL is not set | 1853 | # CONFIG_DEBUG_KERNEL is not set |
1855 | # CONFIG_SAMPLES is not set | 1854 | # CONFIG_SAMPLES is not set |
1856 | CONFIG_CMDLINE="" | 1855 | # CONFIG_CMDLINE_BOOL is not set |
1857 | 1856 | ||
1858 | # | 1857 | # |
1859 | # Security options | 1858 | # Security options |
diff --git a/arch/mips/configs/bcm63xx_defconfig b/arch/mips/configs/bcm63xx_defconfig index ea00c18d1f7b..7fee0273c829 100644 --- a/arch/mips/configs/bcm63xx_defconfig +++ b/arch/mips/configs/bcm63xx_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | CONFIG_BCM63XX=y | 13 | CONFIG_BCM63XX=y |
15 | # CONFIG_MIPS_COBALT is not set | 14 | # CONFIG_MIPS_COBALT is not set |
@@ -942,7 +941,9 @@ CONFIG_TRACING_SUPPORT=y | |||
942 | # CONFIG_BLK_DEV_IO_TRACE is not set | 941 | # CONFIG_BLK_DEV_IO_TRACE is not set |
943 | # CONFIG_SAMPLES is not set | 942 | # CONFIG_SAMPLES is not set |
944 | CONFIG_HAVE_ARCH_KGDB=y | 943 | CONFIG_HAVE_ARCH_KGDB=y |
944 | CONFIG_CMDLINE_BOOL=y | ||
945 | CONFIG_CMDLINE="console=ttyS0,115200" | 945 | CONFIG_CMDLINE="console=ttyS0,115200" |
946 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
946 | 947 | ||
947 | # | 948 | # |
948 | # Security options | 949 | # Security options |
diff --git a/arch/mips/configs/bigsur_defconfig b/arch/mips/configs/bigsur_defconfig index 13d9eb4736c0..c2f06e38c854 100644 --- a/arch/mips/configs/bigsur_defconfig +++ b/arch/mips/configs/bigsur_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1237,7 +1236,7 @@ CONFIG_DEBUG_MUTEXES=y | |||
1237 | # CONFIG_BACKTRACE_SELF_TEST is not set | 1236 | # CONFIG_BACKTRACE_SELF_TEST is not set |
1238 | # CONFIG_FAULT_INJECTION is not set | 1237 | # CONFIG_FAULT_INJECTION is not set |
1239 | # CONFIG_SAMPLES is not set | 1238 | # CONFIG_SAMPLES is not set |
1240 | CONFIG_CMDLINE="" | 1239 | # CONFIG_CMDLINE_BOOL is not set |
1241 | # CONFIG_DEBUG_STACK_USAGE is not set | 1240 | # CONFIG_DEBUG_STACK_USAGE is not set |
1242 | # CONFIG_SB1XXX_CORELIS is not set | 1241 | # CONFIG_SB1XXX_CORELIS is not set |
1243 | # CONFIG_RUNTIME_DEBUG is not set | 1242 | # CONFIG_RUNTIME_DEBUG is not set |
diff --git a/arch/mips/configs/capcella_defconfig b/arch/mips/configs/capcella_defconfig index 185df23fd460..72b7e456916e 100644 --- a/arch/mips/configs/capcella_defconfig +++ b/arch/mips/configs/capcella_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_MIPS_COBALT is not set | 12 | # CONFIG_MIPS_COBALT is not set |
14 | # CONFIG_MACH_DECSTATION is not set | 13 | # CONFIG_MACH_DECSTATION is not set |
15 | # CONFIG_MACH_JAZZ is not set | 14 | # CONFIG_MACH_JAZZ is not set |
@@ -783,7 +782,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
783 | # CONFIG_HEADERS_CHECK is not set | 782 | # CONFIG_HEADERS_CHECK is not set |
784 | # CONFIG_DEBUG_KERNEL is not set | 783 | # CONFIG_DEBUG_KERNEL is not set |
785 | CONFIG_CROSSCOMPILE=y | 784 | CONFIG_CROSSCOMPILE=y |
785 | CONFIG_CMDLINE_BOOL=y | ||
786 | CONFIG_CMDLINE="mem=32M console=ttyVR0,38400" | 786 | CONFIG_CMDLINE="mem=32M console=ttyVR0,38400" |
787 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
787 | 788 | ||
788 | # | 789 | # |
789 | # Security options | 790 | # Security options |
diff --git a/arch/mips/configs/cavium-octeon_defconfig b/arch/mips/configs/cavium-octeon_defconfig index 7afaa28a3768..c8507bc8e925 100644 --- a/arch/mips/configs/cavium-octeon_defconfig +++ b/arch/mips/configs/cavium-octeon_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -269,7 +268,6 @@ CONFIG_DEFAULT_CFQ=y | |||
269 | # CONFIG_DEFAULT_NOOP is not set | 268 | # CONFIG_DEFAULT_NOOP is not set |
270 | CONFIG_DEFAULT_IOSCHED="cfq" | 269 | CONFIG_DEFAULT_IOSCHED="cfq" |
271 | CONFIG_CLASSIC_RCU=y | 270 | CONFIG_CLASSIC_RCU=y |
272 | # CONFIG_PROBE_INITRD_HEADER is not set | ||
273 | # CONFIG_FREEZER is not set | 271 | # CONFIG_FREEZER is not set |
274 | 272 | ||
275 | # | 273 | # |
@@ -822,7 +820,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y | |||
822 | # CONFIG_SAMPLES is not set | 820 | # CONFIG_SAMPLES is not set |
823 | CONFIG_HAVE_ARCH_KGDB=y | 821 | CONFIG_HAVE_ARCH_KGDB=y |
824 | # CONFIG_KGDB is not set | 822 | # CONFIG_KGDB is not set |
825 | CONFIG_CMDLINE="" | 823 | # CONFIG_CMDLINE_BOOL is not set |
826 | # CONFIG_DEBUG_STACK_USAGE is not set | 824 | # CONFIG_DEBUG_STACK_USAGE is not set |
827 | # CONFIG_RUNTIME_DEBUG is not set | 825 | # CONFIG_RUNTIME_DEBUG is not set |
828 | 826 | ||
diff --git a/arch/mips/configs/cobalt_defconfig b/arch/mips/configs/cobalt_defconfig index 6c8cca8589ba..49e61312e006 100644 --- a/arch/mips/configs/cobalt_defconfig +++ b/arch/mips/configs/cobalt_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | CONFIG_MIPS_COBALT=y | 13 | CONFIG_MIPS_COBALT=y |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1126,7 +1125,7 @@ CONFIG_FRAME_WARN=1024 | |||
1126 | # CONFIG_SLUB_STATS is not set | 1125 | # CONFIG_SLUB_STATS is not set |
1127 | # CONFIG_DEBUG_MEMORY_INIT is not set | 1126 | # CONFIG_DEBUG_MEMORY_INIT is not set |
1128 | # CONFIG_SAMPLES is not set | 1127 | # CONFIG_SAMPLES is not set |
1129 | CONFIG_CMDLINE="" | 1128 | # CONFIG_CMDLINE_BOOL is not set |
1130 | 1129 | ||
1131 | # | 1130 | # |
1132 | # Security options | 1131 | # Security options |
diff --git a/arch/mips/configs/db1000_defconfig b/arch/mips/configs/db1000_defconfig index dbdf3bb1a34a..68e90cd6b2d4 100644 --- a/arch/mips/configs/db1000_defconfig +++ b/arch/mips/configs/db1000_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MIPS_DB1000=y | |||
23 | # CONFIG_MIPS_DB1550 is not set | 23 | # CONFIG_MIPS_DB1550 is not set |
24 | # CONFIG_MIPS_DB1200 is not set | 24 | # CONFIG_MIPS_DB1200 is not set |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1090,7 +1089,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1090 | # CONFIG_DEBUG_KERNEL is not set | 1089 | # CONFIG_DEBUG_KERNEL is not set |
1091 | CONFIG_LOG_BUF_SHIFT=14 | 1090 | CONFIG_LOG_BUF_SHIFT=14 |
1092 | CONFIG_CROSSCOMPILE=y | 1091 | CONFIG_CROSSCOMPILE=y |
1093 | CONFIG_CMDLINE="" | 1092 | # CONFIG_CMDLINE_BOOL is not set |
1094 | 1093 | ||
1095 | # | 1094 | # |
1096 | # Security options | 1095 | # Security options |
diff --git a/arch/mips/configs/db1100_defconfig b/arch/mips/configs/db1100_defconfig index fa6814475898..90812830e940 100644 --- a/arch/mips/configs/db1100_defconfig +++ b/arch/mips/configs/db1100_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MIPS_DB1100=y | |||
23 | # CONFIG_MIPS_DB1550 is not set | 23 | # CONFIG_MIPS_DB1550 is not set |
24 | # CONFIG_MIPS_DB1200 is not set | 24 | # CONFIG_MIPS_DB1200 is not set |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1090,7 +1089,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1090 | # CONFIG_DEBUG_KERNEL is not set | 1089 | # CONFIG_DEBUG_KERNEL is not set |
1091 | CONFIG_LOG_BUF_SHIFT=14 | 1090 | CONFIG_LOG_BUF_SHIFT=14 |
1092 | CONFIG_CROSSCOMPILE=y | 1091 | CONFIG_CROSSCOMPILE=y |
1093 | CONFIG_CMDLINE="" | 1092 | # CONFIG_CMDLINE_BOOL is not set |
1094 | 1093 | ||
1095 | # | 1094 | # |
1096 | # Security options | 1095 | # Security options |
diff --git a/arch/mips/configs/db1200_defconfig b/arch/mips/configs/db1200_defconfig index d73f1de43b5d..dabf03032e06 100644 --- a/arch/mips/configs/db1200_defconfig +++ b/arch/mips/configs/db1200_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MACH_ALCHEMY=y | |||
23 | # CONFIG_MIPS_DB1550 is not set | 23 | # CONFIG_MIPS_DB1550 is not set |
24 | CONFIG_MIPS_DB1200=y | 24 | CONFIG_MIPS_DB1200=y |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1172,7 +1171,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1172 | # CONFIG_DEBUG_KERNEL is not set | 1171 | # CONFIG_DEBUG_KERNEL is not set |
1173 | CONFIG_LOG_BUF_SHIFT=14 | 1172 | CONFIG_LOG_BUF_SHIFT=14 |
1174 | CONFIG_CROSSCOMPILE=y | 1173 | CONFIG_CROSSCOMPILE=y |
1174 | CONFIG_CMDLINE_BOOL=y | ||
1175 | CONFIG_CMDLINE="mem=48M" | 1175 | CONFIG_CMDLINE="mem=48M" |
1176 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
1176 | 1177 | ||
1177 | # | 1178 | # |
1178 | # Security options | 1179 | # Security options |
diff --git a/arch/mips/configs/db1500_defconfig b/arch/mips/configs/db1500_defconfig index ec3e028a5b2e..a15131373138 100644 --- a/arch/mips/configs/db1500_defconfig +++ b/arch/mips/configs/db1500_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MIPS_DB1500=y | |||
23 | # CONFIG_MIPS_DB1550 is not set | 23 | # CONFIG_MIPS_DB1550 is not set |
24 | # CONFIG_MIPS_DB1200 is not set | 24 | # CONFIG_MIPS_DB1200 is not set |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1390,7 +1389,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1390 | # CONFIG_DEBUG_KERNEL is not set | 1389 | # CONFIG_DEBUG_KERNEL is not set |
1391 | CONFIG_LOG_BUF_SHIFT=14 | 1390 | CONFIG_LOG_BUF_SHIFT=14 |
1392 | CONFIG_CROSSCOMPILE=y | 1391 | CONFIG_CROSSCOMPILE=y |
1393 | CONFIG_CMDLINE="" | 1392 | # CONFIG_CMDLINE_BOOL is not set |
1394 | 1393 | ||
1395 | # | 1394 | # |
1396 | # Security options | 1395 | # Security options |
diff --git a/arch/mips/configs/db1550_defconfig b/arch/mips/configs/db1550_defconfig index 7631dae51be9..6b64339c0014 100644 --- a/arch/mips/configs/db1550_defconfig +++ b/arch/mips/configs/db1550_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MACH_ALCHEMY=y | |||
23 | CONFIG_MIPS_DB1550=y | 23 | CONFIG_MIPS_DB1550=y |
24 | # CONFIG_MIPS_DB1200 is not set | 24 | # CONFIG_MIPS_DB1200 is not set |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1207,7 +1206,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1207 | # CONFIG_DEBUG_KERNEL is not set | 1206 | # CONFIG_DEBUG_KERNEL is not set |
1208 | CONFIG_LOG_BUF_SHIFT=14 | 1207 | CONFIG_LOG_BUF_SHIFT=14 |
1209 | CONFIG_CROSSCOMPILE=y | 1208 | CONFIG_CROSSCOMPILE=y |
1210 | CONFIG_CMDLINE="" | 1209 | # CONFIG_CMDLINE_BOOL is not set |
1211 | 1210 | ||
1212 | # | 1211 | # |
1213 | # Security options | 1212 | # Security options |
diff --git a/arch/mips/configs/decstation_defconfig b/arch/mips/configs/decstation_defconfig index 9e65e6a2dcb3..cbb4d86f2912 100644 --- a/arch/mips/configs/decstation_defconfig +++ b/arch/mips/configs/decstation_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | CONFIG_MACH_DECSTATION=y | 26 | CONFIG_MACH_DECSTATION=y |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -882,7 +881,7 @@ CONFIG_MAGIC_SYSRQ=y | |||
882 | # CONFIG_DEBUG_KERNEL is not set | 881 | # CONFIG_DEBUG_KERNEL is not set |
883 | CONFIG_LOG_BUF_SHIFT=14 | 882 | CONFIG_LOG_BUF_SHIFT=14 |
884 | CONFIG_CROSSCOMPILE=y | 883 | CONFIG_CROSSCOMPILE=y |
885 | CONFIG_CMDLINE="" | 884 | # CONFIG_CMDLINE_BOOL is not set |
886 | 885 | ||
887 | # | 886 | # |
888 | # Security options | 887 | # Security options |
diff --git a/arch/mips/configs/e55_defconfig b/arch/mips/configs/e55_defconfig index 1bd84d42b14f..52968c46c806 100644 --- a/arch/mips/configs/e55_defconfig +++ b/arch/mips/configs/e55_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_MIPS_COBALT is not set | 12 | # CONFIG_MIPS_COBALT is not set |
14 | # CONFIG_MACH_DECSTATION is not set | 13 | # CONFIG_MACH_DECSTATION is not set |
15 | # CONFIG_MACH_JAZZ is not set | 14 | # CONFIG_MACH_JAZZ is not set |
@@ -561,7 +560,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
561 | # CONFIG_HEADERS_CHECK is not set | 560 | # CONFIG_HEADERS_CHECK is not set |
562 | # CONFIG_DEBUG_KERNEL is not set | 561 | # CONFIG_DEBUG_KERNEL is not set |
563 | CONFIG_CROSSCOMPILE=y | 562 | CONFIG_CROSSCOMPILE=y |
563 | CONFIG_CMDLINE_BOOL=y | ||
564 | CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x1f0,0x3f6,40 mem=8M" | 564 | CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x1f0,0x3f6,40 mem=8M" |
565 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
565 | 566 | ||
566 | # | 567 | # |
567 | # Security options | 568 | # Security options |
diff --git a/arch/mips/configs/excite_defconfig b/arch/mips/configs/excite_defconfig deleted file mode 100644 index 1995d43a2ed1..000000000000 --- a/arch/mips/configs/excite_defconfig +++ /dev/null | |||
@@ -1,1335 +0,0 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.20 | ||
4 | # Tue Feb 20 21:47:31 2007 | ||
5 | # | ||
6 | CONFIG_MIPS=y | ||
7 | |||
8 | # | ||
9 | # Machine selection | ||
10 | # | ||
11 | CONFIG_ZONE_DMA=y | ||
12 | # CONFIG_MIPS_MTX1 is not set | ||
13 | # CONFIG_MIPS_BOSPORUS is not set | ||
14 | # CONFIG_MIPS_PB1000 is not set | ||
15 | # CONFIG_MIPS_PB1100 is not set | ||
16 | # CONFIG_MIPS_PB1500 is not set | ||
17 | # CONFIG_MIPS_PB1550 is not set | ||
18 | # CONFIG_MIPS_PB1200 is not set | ||
19 | # CONFIG_MIPS_DB1000 is not set | ||
20 | # CONFIG_MIPS_DB1100 is not set | ||
21 | # CONFIG_MIPS_DB1500 is not set | ||
22 | # CONFIG_MIPS_DB1550 is not set | ||
23 | # CONFIG_MIPS_DB1200 is not set | ||
24 | # CONFIG_MIPS_MIRAGE is not set | ||
25 | CONFIG_BASLER_EXCITE=y | ||
26 | # CONFIG_BASLER_EXCITE_PROTOTYPE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | ||
28 | # CONFIG_MACH_DECSTATION is not set | ||
29 | # CONFIG_MACH_JAZZ is not set | ||
30 | # CONFIG_MIPS_MALTA is not set | ||
31 | # CONFIG_WR_PPMC is not set | ||
32 | # CONFIG_MIPS_SIM is not set | ||
33 | # CONFIG_MOMENCO_JAGUAR_ATX is not set | ||
34 | # CONFIG_MIPS_XXS1500 is not set | ||
35 | # CONFIG_PNX8550_JBS is not set | ||
36 | # CONFIG_PNX8550_STB810 is not set | ||
37 | # CONFIG_MACH_VR41XX is not set | ||
38 | # CONFIG_PMC_YOSEMITE is not set | ||
39 | # CONFIG_MARKEINS is not set | ||
40 | # CONFIG_SGI_IP22 is not set | ||
41 | # CONFIG_SGI_IP27 is not set | ||
42 | # CONFIG_SGI_IP32 is not set | ||
43 | # CONFIG_SIBYTE_BIGSUR is not set | ||
44 | # CONFIG_SIBYTE_SWARM is not set | ||
45 | # CONFIG_SIBYTE_SENTOSA is not set | ||
46 | # CONFIG_SIBYTE_RHONE is not set | ||
47 | # CONFIG_SIBYTE_CARMEL is not set | ||
48 | # CONFIG_SIBYTE_LITTLESUR is not set | ||
49 | # CONFIG_SIBYTE_CRHINE is not set | ||
50 | # CONFIG_SIBYTE_CRHONE is not set | ||
51 | # CONFIG_SNI_RM is not set | ||
52 | # CONFIG_TOSHIBA_JMR3927 is not set | ||
53 | # CONFIG_TOSHIBA_RBTX4927 is not set | ||
54 | # CONFIG_TOSHIBA_RBTX4938 is not set | ||
55 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
56 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
57 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
58 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
59 | CONFIG_GENERIC_HWEIGHT=y | ||
60 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
61 | CONFIG_GENERIC_TIME=y | ||
62 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
63 | # CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ is not set | ||
64 | CONFIG_DMA_COHERENT=y | ||
65 | CONFIG_CPU_BIG_ENDIAN=y | ||
66 | # CONFIG_CPU_LITTLE_ENDIAN is not set | ||
67 | CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y | ||
68 | CONFIG_IRQ_CPU=y | ||
69 | CONFIG_IRQ_CPU_RM7K=y | ||
70 | CONFIG_IRQ_CPU_RM9K=y | ||
71 | CONFIG_MIPS_RM9122=y | ||
72 | CONFIG_SERIAL_RM9000=y | ||
73 | CONFIG_GPI_RM9000=y | ||
74 | CONFIG_WDT_RM9000=y | ||
75 | CONFIG_MIPS_L1_CACHE_SHIFT=5 | ||
76 | |||
77 | # | ||
78 | # CPU selection | ||
79 | # | ||
80 | # CONFIG_CPU_MIPS32_R1 is not set | ||
81 | # CONFIG_CPU_MIPS32_R2 is not set | ||
82 | # CONFIG_CPU_MIPS64_R1 is not set | ||
83 | # CONFIG_CPU_MIPS64_R2 is not set | ||
84 | # CONFIG_CPU_R3000 is not set | ||
85 | # CONFIG_CPU_TX39XX is not set | ||
86 | # CONFIG_CPU_VR41XX is not set | ||
87 | # CONFIG_CPU_R4300 is not set | ||
88 | # CONFIG_CPU_R4X00 is not set | ||
89 | # CONFIG_CPU_TX49XX is not set | ||
90 | # CONFIG_CPU_R5000 is not set | ||
91 | # CONFIG_CPU_R5432 is not set | ||
92 | # CONFIG_CPU_R6000 is not set | ||
93 | # CONFIG_CPU_NEVADA is not set | ||
94 | # CONFIG_CPU_R8000 is not set | ||
95 | # CONFIG_CPU_R10000 is not set | ||
96 | # CONFIG_CPU_RM7000 is not set | ||
97 | CONFIG_CPU_RM9000=y | ||
98 | # CONFIG_CPU_SB1 is not set | ||
99 | CONFIG_SYS_HAS_CPU_RM9000=y | ||
100 | CONFIG_WEAK_ORDERING=y | ||
101 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | ||
102 | CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y | ||
103 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y | ||
104 | CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y | ||
105 | |||
106 | # | ||
107 | # Kernel type | ||
108 | # | ||
109 | CONFIG_32BIT=y | ||
110 | # CONFIG_64BIT is not set | ||
111 | CONFIG_PAGE_SIZE_4KB=y | ||
112 | # CONFIG_PAGE_SIZE_8KB is not set | ||
113 | # CONFIG_PAGE_SIZE_16KB is not set | ||
114 | # CONFIG_PAGE_SIZE_64KB is not set | ||
115 | CONFIG_CPU_HAS_PREFETCH=y | ||
116 | CONFIG_MIPS_MT_DISABLED=y | ||
117 | # CONFIG_MIPS_MT_SMP is not set | ||
118 | # CONFIG_MIPS_MT_SMTC is not set | ||
119 | # CONFIG_MIPS_VPE_LOADER is not set | ||
120 | # CONFIG_64BIT_PHYS_ADDR is not set | ||
121 | CONFIG_CPU_HAS_SYNC=y | ||
122 | CONFIG_GENERIC_HARDIRQS=y | ||
123 | CONFIG_GENERIC_IRQ_PROBE=y | ||
124 | CONFIG_CPU_SUPPORTS_HIGHMEM=y | ||
125 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
126 | CONFIG_SELECT_MEMORY_MODEL=y | ||
127 | CONFIG_FLATMEM_MANUAL=y | ||
128 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
129 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
130 | CONFIG_FLATMEM=y | ||
131 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
132 | # CONFIG_SPARSEMEM_STATIC is not set | ||
133 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
134 | # CONFIG_RESOURCES_64BIT is not set | ||
135 | CONFIG_ZONE_DMA_FLAG=1 | ||
136 | # CONFIG_HZ_48 is not set | ||
137 | # CONFIG_HZ_100 is not set | ||
138 | # CONFIG_HZ_128 is not set | ||
139 | # CONFIG_HZ_250 is not set | ||
140 | # CONFIG_HZ_256 is not set | ||
141 | CONFIG_HZ_1000=y | ||
142 | # CONFIG_HZ_1024 is not set | ||
143 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y | ||
144 | CONFIG_HZ=1000 | ||
145 | # CONFIG_PREEMPT_NONE is not set | ||
146 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
147 | CONFIG_PREEMPT=y | ||
148 | CONFIG_PREEMPT_BKL=y | ||
149 | # CONFIG_KEXEC is not set | ||
150 | CONFIG_LOCKDEP_SUPPORT=y | ||
151 | CONFIG_STACKTRACE_SUPPORT=y | ||
152 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
153 | |||
154 | # | ||
155 | # Code maturity level options | ||
156 | # | ||
157 | CONFIG_EXPERIMENTAL=y | ||
158 | CONFIG_BROKEN_ON_SMP=y | ||
159 | CONFIG_LOCK_KERNEL=y | ||
160 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
161 | |||
162 | # | ||
163 | # General setup | ||
164 | # | ||
165 | CONFIG_LOCALVERSION="" | ||
166 | # CONFIG_LOCALVERSION_AUTO is not set | ||
167 | CONFIG_SWAP=y | ||
168 | CONFIG_SYSVIPC=y | ||
169 | # CONFIG_IPC_NS is not set | ||
170 | CONFIG_SYSVIPC_SYSCTL=y | ||
171 | CONFIG_POSIX_MQUEUE=y | ||
172 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
173 | # CONFIG_TASKSTATS is not set | ||
174 | # CONFIG_UTS_NS is not set | ||
175 | # CONFIG_AUDIT is not set | ||
176 | # CONFIG_IKCONFIG is not set | ||
177 | CONFIG_SYSFS_DEPRECATED=y | ||
178 | # CONFIG_RELAY is not set | ||
179 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
180 | CONFIG_SYSCTL=y | ||
181 | CONFIG_EMBEDDED=y | ||
182 | CONFIG_SYSCTL_SYSCALL=y | ||
183 | CONFIG_KALLSYMS=y | ||
184 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
185 | CONFIG_HOTPLUG=y | ||
186 | CONFIG_PRINTK=y | ||
187 | CONFIG_BUG=y | ||
188 | CONFIG_ELF_CORE=y | ||
189 | CONFIG_BASE_FULL=y | ||
190 | CONFIG_FUTEX=y | ||
191 | CONFIG_EPOLL=y | ||
192 | CONFIG_SHMEM=y | ||
193 | CONFIG_SLAB=y | ||
194 | CONFIG_VM_EVENT_COUNTERS=y | ||
195 | CONFIG_RT_MUTEXES=y | ||
196 | # CONFIG_TINY_SHMEM is not set | ||
197 | CONFIG_BASE_SMALL=0 | ||
198 | # CONFIG_SLOB is not set | ||
199 | |||
200 | # | ||
201 | # Loadable module support | ||
202 | # | ||
203 | CONFIG_MODULES=y | ||
204 | CONFIG_MODULE_UNLOAD=y | ||
205 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
206 | # CONFIG_MODVERSIONS is not set | ||
207 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
208 | CONFIG_KMOD=y | ||
209 | |||
210 | # | ||
211 | # Block layer | ||
212 | # | ||
213 | CONFIG_BLOCK=y | ||
214 | # CONFIG_LBD is not set | ||
215 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
216 | # CONFIG_LSF is not set | ||
217 | |||
218 | # | ||
219 | # IO Schedulers | ||
220 | # | ||
221 | CONFIG_IOSCHED_NOOP=y | ||
222 | CONFIG_IOSCHED_AS=y | ||
223 | CONFIG_IOSCHED_DEADLINE=y | ||
224 | CONFIG_IOSCHED_CFQ=y | ||
225 | CONFIG_DEFAULT_AS=y | ||
226 | # CONFIG_DEFAULT_DEADLINE is not set | ||
227 | # CONFIG_DEFAULT_CFQ is not set | ||
228 | # CONFIG_DEFAULT_NOOP is not set | ||
229 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
230 | |||
231 | # | ||
232 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | ||
233 | # | ||
234 | CONFIG_HW_HAS_PCI=y | ||
235 | CONFIG_PCI=y | ||
236 | CONFIG_MMU=y | ||
237 | |||
238 | # | ||
239 | # PCCARD (PCMCIA/CardBus) support | ||
240 | # | ||
241 | # CONFIG_PCCARD is not set | ||
242 | |||
243 | # | ||
244 | # PCI Hotplug Support | ||
245 | # | ||
246 | # CONFIG_HOTPLUG_PCI is not set | ||
247 | |||
248 | # | ||
249 | # Executable file formats | ||
250 | # | ||
251 | CONFIG_BINFMT_ELF=y | ||
252 | # CONFIG_BINFMT_MISC is not set | ||
253 | CONFIG_TRAD_SIGNALS=y | ||
254 | |||
255 | # | ||
256 | # Power management options | ||
257 | # | ||
258 | CONFIG_PM=y | ||
259 | # CONFIG_PM_LEGACY is not set | ||
260 | # CONFIG_PM_DEBUG is not set | ||
261 | # CONFIG_PM_SYSFS_DEPRECATED is not set | ||
262 | |||
263 | # | ||
264 | # Networking | ||
265 | # | ||
266 | CONFIG_NET=y | ||
267 | |||
268 | # | ||
269 | # Networking options | ||
270 | # | ||
271 | # CONFIG_NETDEBUG is not set | ||
272 | CONFIG_PACKET=y | ||
273 | CONFIG_PACKET_MMAP=y | ||
274 | CONFIG_UNIX=y | ||
275 | CONFIG_XFRM=y | ||
276 | # CONFIG_XFRM_USER is not set | ||
277 | # CONFIG_XFRM_SUB_POLICY is not set | ||
278 | CONFIG_XFRM_MIGRATE=y | ||
279 | # CONFIG_NET_KEY is not set | ||
280 | CONFIG_INET=y | ||
281 | # CONFIG_IP_MULTICAST is not set | ||
282 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
283 | CONFIG_IP_FIB_HASH=y | ||
284 | CONFIG_IP_PNP=y | ||
285 | CONFIG_IP_PNP_DHCP=y | ||
286 | # CONFIG_IP_PNP_BOOTP is not set | ||
287 | # CONFIG_IP_PNP_RARP is not set | ||
288 | # CONFIG_NET_IPIP is not set | ||
289 | # CONFIG_NET_IPGRE is not set | ||
290 | # CONFIG_ARPD is not set | ||
291 | # CONFIG_SYN_COOKIES is not set | ||
292 | # CONFIG_INET_AH is not set | ||
293 | # CONFIG_INET_ESP is not set | ||
294 | # CONFIG_INET_IPCOMP is not set | ||
295 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
296 | # CONFIG_INET_TUNNEL is not set | ||
297 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
298 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
299 | CONFIG_INET_XFRM_MODE_BEET=m | ||
300 | CONFIG_INET_DIAG=y | ||
301 | CONFIG_INET_TCP_DIAG=y | ||
302 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
303 | CONFIG_TCP_CONG_CUBIC=y | ||
304 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
305 | CONFIG_TCP_MD5SIG=y | ||
306 | # CONFIG_IPV6 is not set | ||
307 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
308 | # CONFIG_INET6_TUNNEL is not set | ||
309 | CONFIG_NETWORK_SECMARK=y | ||
310 | # CONFIG_NETFILTER is not set | ||
311 | |||
312 | # | ||
313 | # DCCP Configuration (EXPERIMENTAL) | ||
314 | # | ||
315 | # CONFIG_IP_DCCP is not set | ||
316 | |||
317 | # | ||
318 | # SCTP Configuration (EXPERIMENTAL) | ||
319 | # | ||
320 | # CONFIG_IP_SCTP is not set | ||
321 | |||
322 | # | ||
323 | # TIPC Configuration (EXPERIMENTAL) | ||
324 | # | ||
325 | # CONFIG_TIPC is not set | ||
326 | # CONFIG_ATM is not set | ||
327 | # CONFIG_BRIDGE is not set | ||
328 | # CONFIG_VLAN_8021Q is not set | ||
329 | # CONFIG_DECNET is not set | ||
330 | # CONFIG_LLC2 is not set | ||
331 | # CONFIG_IPX is not set | ||
332 | # CONFIG_ATALK is not set | ||
333 | # CONFIG_X25 is not set | ||
334 | # CONFIG_LAPB is not set | ||
335 | # CONFIG_ECONET is not set | ||
336 | # CONFIG_WAN_ROUTER is not set | ||
337 | |||
338 | # | ||
339 | # QoS and/or fair queueing | ||
340 | # | ||
341 | # CONFIG_NET_SCHED is not set | ||
342 | |||
343 | # | ||
344 | # Network testing | ||
345 | # | ||
346 | # CONFIG_NET_PKTGEN is not set | ||
347 | # CONFIG_HAMRADIO is not set | ||
348 | # CONFIG_IRDA is not set | ||
349 | # CONFIG_BT is not set | ||
350 | # CONFIG_IEEE80211 is not set | ||
351 | |||
352 | # | ||
353 | # Device Drivers | ||
354 | # | ||
355 | |||
356 | # | ||
357 | # Generic Driver Options | ||
358 | # | ||
359 | CONFIG_STANDALONE=y | ||
360 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
361 | CONFIG_FW_LOADER=m | ||
362 | # CONFIG_SYS_HYPERVISOR is not set | ||
363 | |||
364 | # | ||
365 | # Connector - unified userspace <-> kernelspace linker | ||
366 | # | ||
367 | # CONFIG_CONNECTOR is not set | ||
368 | |||
369 | # | ||
370 | # Memory Technology Devices (MTD) | ||
371 | # | ||
372 | CONFIG_MTD=y | ||
373 | # CONFIG_MTD_DEBUG is not set | ||
374 | # CONFIG_MTD_CONCAT is not set | ||
375 | CONFIG_MTD_PARTITIONS=y | ||
376 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
377 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
378 | |||
379 | # | ||
380 | # User Modules And Translation Layers | ||
381 | # | ||
382 | CONFIG_MTD_CHAR=y | ||
383 | CONFIG_MTD_BLKDEVS=y | ||
384 | CONFIG_MTD_BLOCK=y | ||
385 | # CONFIG_FTL is not set | ||
386 | # CONFIG_NFTL is not set | ||
387 | # CONFIG_INFTL is not set | ||
388 | # CONFIG_RFD_FTL is not set | ||
389 | # CONFIG_SSFDC is not set | ||
390 | |||
391 | # | ||
392 | # RAM/ROM/Flash chip drivers | ||
393 | # | ||
394 | # CONFIG_MTD_CFI is not set | ||
395 | # CONFIG_MTD_JEDECPROBE is not set | ||
396 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
397 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
398 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
399 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
400 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
401 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
402 | CONFIG_MTD_CFI_I1=y | ||
403 | CONFIG_MTD_CFI_I2=y | ||
404 | # CONFIG_MTD_CFI_I4 is not set | ||
405 | # CONFIG_MTD_CFI_I8 is not set | ||
406 | # CONFIG_MTD_RAM is not set | ||
407 | # CONFIG_MTD_ROM is not set | ||
408 | # CONFIG_MTD_ABSENT is not set | ||
409 | # CONFIG_MTD_OBSOLETE_CHIPS is not set | ||
410 | |||
411 | # | ||
412 | # Mapping drivers for chip access | ||
413 | # | ||
414 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
415 | # CONFIG_MTD_PLATRAM is not set | ||
416 | |||
417 | # | ||
418 | # Self-contained MTD device drivers | ||
419 | # | ||
420 | # CONFIG_MTD_PMC551 is not set | ||
421 | # CONFIG_MTD_SLRAM is not set | ||
422 | # CONFIG_MTD_PHRAM is not set | ||
423 | # CONFIG_MTD_MTDRAM is not set | ||
424 | # CONFIG_MTD_BLOCK2MTD is not set | ||
425 | |||
426 | # | ||
427 | # Disk-On-Chip Device Drivers | ||
428 | # | ||
429 | # CONFIG_MTD_DOC2000 is not set | ||
430 | # CONFIG_MTD_DOC2001 is not set | ||
431 | # CONFIG_MTD_DOC2001PLUS is not set | ||
432 | |||
433 | # | ||
434 | # NAND Flash Device Drivers | ||
435 | # | ||
436 | CONFIG_MTD_NAND=y | ||
437 | CONFIG_MTD_NAND_VERIFY_WRITE=y | ||
438 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
439 | CONFIG_MTD_NAND_IDS=y | ||
440 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
441 | # CONFIG_MTD_NAND_BASLER_EXCITE is not set | ||
442 | # CONFIG_MTD_NAND_CAFE is not set | ||
443 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
444 | |||
445 | # | ||
446 | # OneNAND Flash Device Drivers | ||
447 | # | ||
448 | # CONFIG_MTD_ONENAND is not set | ||
449 | |||
450 | # | ||
451 | # Parallel port support | ||
452 | # | ||
453 | # CONFIG_PARPORT is not set | ||
454 | |||
455 | # | ||
456 | # Plug and Play support | ||
457 | # | ||
458 | # CONFIG_PNPACPI is not set | ||
459 | |||
460 | # | ||
461 | # Block devices | ||
462 | # | ||
463 | # CONFIG_BLK_CPQ_DA is not set | ||
464 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
465 | # CONFIG_BLK_DEV_DAC960 is not set | ||
466 | # CONFIG_BLK_DEV_UMEM is not set | ||
467 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
468 | CONFIG_BLK_DEV_LOOP=m | ||
469 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
470 | # CONFIG_BLK_DEV_NBD is not set | ||
471 | # CONFIG_BLK_DEV_SX8 is not set | ||
472 | # CONFIG_BLK_DEV_UB is not set | ||
473 | # CONFIG_BLK_DEV_RAM is not set | ||
474 | # CONFIG_BLK_DEV_INITRD is not set | ||
475 | # CONFIG_CDROM_PKTCDVD is not set | ||
476 | # CONFIG_ATA_OVER_ETH is not set | ||
477 | |||
478 | # | ||
479 | # Misc devices | ||
480 | # | ||
481 | CONFIG_SGI_IOC4=m | ||
482 | # CONFIG_TIFM_CORE is not set | ||
483 | |||
484 | # | ||
485 | # ATA/ATAPI/MFM/RLL support | ||
486 | # | ||
487 | # CONFIG_IDE is not set | ||
488 | |||
489 | # | ||
490 | # SCSI device support | ||
491 | # | ||
492 | # CONFIG_RAID_ATTRS is not set | ||
493 | CONFIG_SCSI=y | ||
494 | CONFIG_SCSI_TGT=m | ||
495 | # CONFIG_SCSI_NETLINK is not set | ||
496 | # CONFIG_SCSI_PROC_FS is not set | ||
497 | |||
498 | # | ||
499 | # SCSI support type (disk, tape, CD-ROM) | ||
500 | # | ||
501 | CONFIG_BLK_DEV_SD=y | ||
502 | # CONFIG_CHR_DEV_ST is not set | ||
503 | # CONFIG_CHR_DEV_OSST is not set | ||
504 | # CONFIG_BLK_DEV_SR is not set | ||
505 | # CONFIG_CHR_DEV_SG is not set | ||
506 | # CONFIG_CHR_DEV_SCH is not set | ||
507 | |||
508 | # | ||
509 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
510 | # | ||
511 | # CONFIG_SCSI_MULTI_LUN is not set | ||
512 | # CONFIG_SCSI_CONSTANTS is not set | ||
513 | # CONFIG_SCSI_LOGGING is not set | ||
514 | CONFIG_SCSI_SCAN_ASYNC=y | ||
515 | |||
516 | # | ||
517 | # SCSI Transports | ||
518 | # | ||
519 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
520 | # CONFIG_SCSI_FC_ATTRS is not set | ||
521 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
522 | CONFIG_SCSI_SAS_ATTRS=m | ||
523 | CONFIG_SCSI_SAS_LIBSAS=m | ||
524 | # CONFIG_SCSI_SAS_LIBSAS_DEBUG is not set | ||
525 | |||
526 | # | ||
527 | # SCSI low-level drivers | ||
528 | # | ||
529 | # CONFIG_ISCSI_TCP is not set | ||
530 | # CONFIG_BLK_DEV_3W_XXXX_RAID is not set | ||
531 | # CONFIG_SCSI_3W_9XXX is not set | ||
532 | # CONFIG_SCSI_ACARD is not set | ||
533 | # CONFIG_SCSI_AACRAID is not set | ||
534 | # CONFIG_SCSI_AIC7XXX is not set | ||
535 | # CONFIG_SCSI_AIC7XXX_OLD is not set | ||
536 | # CONFIG_SCSI_AIC79XX is not set | ||
537 | CONFIG_SCSI_AIC94XX=m | ||
538 | # CONFIG_AIC94XX_DEBUG is not set | ||
539 | # CONFIG_SCSI_DPT_I2O is not set | ||
540 | # CONFIG_SCSI_ARCMSR is not set | ||
541 | # CONFIG_MEGARAID_NEWGEN is not set | ||
542 | # CONFIG_MEGARAID_LEGACY is not set | ||
543 | # CONFIG_MEGARAID_SAS is not set | ||
544 | # CONFIG_SCSI_HPTIOP is not set | ||
545 | # CONFIG_SCSI_DMX3191D is not set | ||
546 | # CONFIG_SCSI_FUTURE_DOMAIN is not set | ||
547 | # CONFIG_SCSI_IPS is not set | ||
548 | # CONFIG_SCSI_INITIO is not set | ||
549 | # CONFIG_SCSI_INIA100 is not set | ||
550 | # CONFIG_SCSI_STEX is not set | ||
551 | # CONFIG_SCSI_SYM53C8XX_2 is not set | ||
552 | # CONFIG_SCSI_QLOGIC_1280 is not set | ||
553 | # CONFIG_SCSI_QLA_FC is not set | ||
554 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
555 | # CONFIG_SCSI_LPFC is not set | ||
556 | # CONFIG_SCSI_DC395x is not set | ||
557 | # CONFIG_SCSI_DC390T is not set | ||
558 | # CONFIG_SCSI_NSP32 is not set | ||
559 | # CONFIG_SCSI_DEBUG is not set | ||
560 | # CONFIG_SCSI_SRP is not set | ||
561 | |||
562 | # | ||
563 | # Serial ATA (prod) and Parallel ATA (experimental) drivers | ||
564 | # | ||
565 | # CONFIG_ATA is not set | ||
566 | |||
567 | # | ||
568 | # Multi-device support (RAID and LVM) | ||
569 | # | ||
570 | # CONFIG_MD is not set | ||
571 | |||
572 | # | ||
573 | # Fusion MPT device support | ||
574 | # | ||
575 | # CONFIG_FUSION is not set | ||
576 | # CONFIG_FUSION_SPI is not set | ||
577 | # CONFIG_FUSION_FC is not set | ||
578 | # CONFIG_FUSION_SAS is not set | ||
579 | |||
580 | # | ||
581 | # IEEE 1394 (FireWire) support | ||
582 | # | ||
583 | # CONFIG_IEEE1394 is not set | ||
584 | |||
585 | # | ||
586 | # I2O device support | ||
587 | # | ||
588 | # CONFIG_I2O is not set | ||
589 | |||
590 | # | ||
591 | # Network device support | ||
592 | # | ||
593 | CONFIG_NETDEVICES=y | ||
594 | # CONFIG_DUMMY is not set | ||
595 | # CONFIG_BONDING is not set | ||
596 | # CONFIG_EQUALIZER is not set | ||
597 | # CONFIG_TUN is not set | ||
598 | |||
599 | # | ||
600 | # ARCnet devices | ||
601 | # | ||
602 | # CONFIG_ARCNET is not set | ||
603 | |||
604 | # | ||
605 | # PHY device support | ||
606 | # | ||
607 | |||
608 | # | ||
609 | # Ethernet (10 or 100Mbit) | ||
610 | # | ||
611 | # CONFIG_NET_ETHERNET is not set | ||
612 | |||
613 | # | ||
614 | # Ethernet (1000 Mbit) | ||
615 | # | ||
616 | # CONFIG_ACENIC is not set | ||
617 | # CONFIG_DL2K is not set | ||
618 | # CONFIG_E1000 is not set | ||
619 | # CONFIG_NS83820 is not set | ||
620 | # CONFIG_HAMACHI is not set | ||
621 | # CONFIG_YELLOWFIN is not set | ||
622 | # CONFIG_R8169 is not set | ||
623 | # CONFIG_SIS190 is not set | ||
624 | # CONFIG_SKGE is not set | ||
625 | # CONFIG_SKY2 is not set | ||
626 | # CONFIG_SK98LIN is not set | ||
627 | # CONFIG_TIGON3 is not set | ||
628 | # CONFIG_BNX2 is not set | ||
629 | CONFIG_QLA3XXX=m | ||
630 | # CONFIG_ATL1 is not set | ||
631 | |||
632 | # | ||
633 | # Ethernet (10000 Mbit) | ||
634 | # | ||
635 | # CONFIG_CHELSIO_T1 is not set | ||
636 | CONFIG_CHELSIO_T3=m | ||
637 | # CONFIG_IXGB is not set | ||
638 | # CONFIG_S2IO is not set | ||
639 | # CONFIG_MYRI10GE is not set | ||
640 | CONFIG_NETXEN_NIC=m | ||
641 | |||
642 | # | ||
643 | # Token Ring devices | ||
644 | # | ||
645 | # CONFIG_TR is not set | ||
646 | |||
647 | # | ||
648 | # Wireless LAN (non-hamradio) | ||
649 | # | ||
650 | # CONFIG_NET_RADIO is not set | ||
651 | |||
652 | # | ||
653 | # Wan interfaces | ||
654 | # | ||
655 | # CONFIG_WAN is not set | ||
656 | # CONFIG_FDDI is not set | ||
657 | # CONFIG_HIPPI is not set | ||
658 | # CONFIG_PPP is not set | ||
659 | # CONFIG_SLIP is not set | ||
660 | # CONFIG_NET_FC is not set | ||
661 | # CONFIG_SHAPER is not set | ||
662 | # CONFIG_NETCONSOLE is not set | ||
663 | # CONFIG_NETPOLL is not set | ||
664 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
665 | |||
666 | # | ||
667 | # ISDN subsystem | ||
668 | # | ||
669 | # CONFIG_ISDN is not set | ||
670 | |||
671 | # | ||
672 | # Telephony Support | ||
673 | # | ||
674 | # CONFIG_PHONE is not set | ||
675 | |||
676 | # | ||
677 | # Input device support | ||
678 | # | ||
679 | CONFIG_INPUT=y | ||
680 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
681 | |||
682 | # | ||
683 | # Userland interfaces | ||
684 | # | ||
685 | CONFIG_INPUT_MOUSEDEV=m | ||
686 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
687 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
688 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
689 | # CONFIG_INPUT_JOYDEV is not set | ||
690 | # CONFIG_INPUT_TSDEV is not set | ||
691 | CONFIG_INPUT_EVDEV=m | ||
692 | # CONFIG_INPUT_EVBUG is not set | ||
693 | |||
694 | # | ||
695 | # Input Device Drivers | ||
696 | # | ||
697 | # CONFIG_INPUT_KEYBOARD is not set | ||
698 | # CONFIG_INPUT_MOUSE is not set | ||
699 | # CONFIG_INPUT_JOYSTICK is not set | ||
700 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
701 | # CONFIG_INPUT_MISC is not set | ||
702 | |||
703 | # | ||
704 | # Hardware I/O ports | ||
705 | # | ||
706 | # CONFIG_SERIO is not set | ||
707 | # CONFIG_GAMEPORT is not set | ||
708 | |||
709 | # | ||
710 | # Character devices | ||
711 | # | ||
712 | CONFIG_VT=y | ||
713 | CONFIG_VT_CONSOLE=y | ||
714 | CONFIG_HW_CONSOLE=y | ||
715 | CONFIG_VT_HW_CONSOLE_BINDING=y | ||
716 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
717 | |||
718 | # | ||
719 | # Serial drivers | ||
720 | # | ||
721 | CONFIG_SERIAL_8250=y | ||
722 | CONFIG_SERIAL_8250_CONSOLE=y | ||
723 | CONFIG_SERIAL_8250_PCI=y | ||
724 | CONFIG_SERIAL_8250_NR_UARTS=2 | ||
725 | CONFIG_SERIAL_8250_RUNTIME_UARTS=2 | ||
726 | CONFIG_SERIAL_8250_EXTENDED=y | ||
727 | # CONFIG_SERIAL_8250_MANY_PORTS is not set | ||
728 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
729 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
730 | # CONFIG_SERIAL_8250_RSA is not set | ||
731 | |||
732 | # | ||
733 | # Non-8250 serial port support | ||
734 | # | ||
735 | CONFIG_SERIAL_CORE=y | ||
736 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
737 | # CONFIG_SERIAL_JSM is not set | ||
738 | CONFIG_UNIX98_PTYS=y | ||
739 | # CONFIG_LEGACY_PTYS is not set | ||
740 | |||
741 | # | ||
742 | # IPMI | ||
743 | # | ||
744 | # CONFIG_IPMI_HANDLER is not set | ||
745 | |||
746 | # | ||
747 | # Watchdog Cards | ||
748 | # | ||
749 | CONFIG_WATCHDOG=y | ||
750 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
751 | |||
752 | # | ||
753 | # Watchdog Device Drivers | ||
754 | # | ||
755 | # CONFIG_SOFT_WATCHDOG is not set | ||
756 | CONFIG_WDT_RM9K_GPI=m | ||
757 | |||
758 | # | ||
759 | # PCI-based Watchdog Cards | ||
760 | # | ||
761 | # CONFIG_PCIPCWATCHDOG is not set | ||
762 | # CONFIG_WDTPCI is not set | ||
763 | |||
764 | # | ||
765 | # USB-based Watchdog Cards | ||
766 | # | ||
767 | # CONFIG_USBPCWATCHDOG is not set | ||
768 | # CONFIG_HW_RANDOM is not set | ||
769 | # CONFIG_RTC is not set | ||
770 | # CONFIG_GEN_RTC is not set | ||
771 | # CONFIG_DTLK is not set | ||
772 | # CONFIG_R3964 is not set | ||
773 | # CONFIG_APPLICOM is not set | ||
774 | # CONFIG_DRM is not set | ||
775 | # CONFIG_RAW_DRIVER is not set | ||
776 | |||
777 | # | ||
778 | # TPM devices | ||
779 | # | ||
780 | # CONFIG_TCG_TPM is not set | ||
781 | |||
782 | # | ||
783 | # I2C support | ||
784 | # | ||
785 | # CONFIG_I2C is not set | ||
786 | |||
787 | # | ||
788 | # SPI support | ||
789 | # | ||
790 | # CONFIG_SPI is not set | ||
791 | # CONFIG_SPI_MASTER is not set | ||
792 | |||
793 | # | ||
794 | # Dallas's 1-wire bus | ||
795 | # | ||
796 | # CONFIG_W1 is not set | ||
797 | |||
798 | # | ||
799 | # Hardware Monitoring support | ||
800 | # | ||
801 | # CONFIG_HWMON is not set | ||
802 | # CONFIG_HWMON_VID is not set | ||
803 | |||
804 | # | ||
805 | # Multimedia devices | ||
806 | # | ||
807 | # CONFIG_VIDEO_DEV is not set | ||
808 | |||
809 | # | ||
810 | # Digital Video Broadcasting Devices | ||
811 | # | ||
812 | # CONFIG_DVB is not set | ||
813 | # CONFIG_USB_DABUSB is not set | ||
814 | |||
815 | # | ||
816 | # Graphics support | ||
817 | # | ||
818 | # CONFIG_FIRMWARE_EDID is not set | ||
819 | CONFIG_FB=y | ||
820 | # CONFIG_FB_CFB_FILLRECT is not set | ||
821 | # CONFIG_FB_CFB_COPYAREA is not set | ||
822 | # CONFIG_FB_CFB_IMAGEBLIT is not set | ||
823 | # CONFIG_FB_SVGALIB is not set | ||
824 | # CONFIG_FB_MACMODES is not set | ||
825 | # CONFIG_FB_BACKLIGHT is not set | ||
826 | # CONFIG_FB_MODE_HELPERS is not set | ||
827 | # CONFIG_FB_TILEBLITTING is not set | ||
828 | # CONFIG_FB_CIRRUS is not set | ||
829 | # CONFIG_FB_PM2 is not set | ||
830 | # CONFIG_FB_CYBER2000 is not set | ||
831 | # CONFIG_FB_ASILIANT is not set | ||
832 | # CONFIG_FB_IMSTT is not set | ||
833 | # CONFIG_FB_S1D13XXX is not set | ||
834 | # CONFIG_FB_NVIDIA is not set | ||
835 | # CONFIG_FB_RIVA is not set | ||
836 | # CONFIG_FB_MATROX is not set | ||
837 | # CONFIG_FB_RADEON is not set | ||
838 | # CONFIG_FB_ATY128 is not set | ||
839 | # CONFIG_FB_ATY is not set | ||
840 | # CONFIG_FB_S3 is not set | ||
841 | # CONFIG_FB_SAVAGE is not set | ||
842 | # CONFIG_FB_SIS is not set | ||
843 | # CONFIG_FB_NEOMAGIC is not set | ||
844 | # CONFIG_FB_KYRO is not set | ||
845 | # CONFIG_FB_3DFX is not set | ||
846 | # CONFIG_FB_VOODOO1 is not set | ||
847 | # CONFIG_FB_SMIVGX is not set | ||
848 | # CONFIG_FB_TRIDENT is not set | ||
849 | # CONFIG_FB_VIRTUAL is not set | ||
850 | |||
851 | # | ||
852 | # Console display driver support | ||
853 | # | ||
854 | # CONFIG_VGA_CONSOLE is not set | ||
855 | CONFIG_DUMMY_CONSOLE=y | ||
856 | CONFIG_FRAMEBUFFER_CONSOLE=m | ||
857 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
858 | # CONFIG_FONTS is not set | ||
859 | CONFIG_FONT_8x8=y | ||
860 | CONFIG_FONT_8x16=y | ||
861 | |||
862 | # | ||
863 | # Logo configuration | ||
864 | # | ||
865 | # CONFIG_LOGO is not set | ||
866 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
867 | |||
868 | # | ||
869 | # Sound | ||
870 | # | ||
871 | # CONFIG_SOUND is not set | ||
872 | |||
873 | # | ||
874 | # HID Devices | ||
875 | # | ||
876 | CONFIG_HID=y | ||
877 | # CONFIG_HID_DEBUG is not set | ||
878 | |||
879 | # | ||
880 | # USB support | ||
881 | # | ||
882 | CONFIG_USB_ARCH_HAS_HCD=y | ||
883 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
884 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
885 | CONFIG_USB=y | ||
886 | # CONFIG_USB_DEBUG is not set | ||
887 | |||
888 | # | ||
889 | # Miscellaneous USB options | ||
890 | # | ||
891 | CONFIG_USB_DEVICEFS=y | ||
892 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
893 | # CONFIG_USB_SUSPEND is not set | ||
894 | # CONFIG_USB_OTG is not set | ||
895 | |||
896 | # | ||
897 | # USB Host Controller Drivers | ||
898 | # | ||
899 | CONFIG_USB_EHCI_HCD=y | ||
900 | # CONFIG_USB_EHCI_SPLIT_ISO is not set | ||
901 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
902 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
903 | # CONFIG_USB_EHCI_BIG_ENDIAN_MMIO is not set | ||
904 | # CONFIG_USB_ISP116X_HCD is not set | ||
905 | CONFIG_USB_OHCI_HCD=y | ||
906 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
907 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
908 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
909 | # CONFIG_USB_UHCI_HCD is not set | ||
910 | # CONFIG_USB_SL811_HCD is not set | ||
911 | |||
912 | # | ||
913 | # USB Device Class drivers | ||
914 | # | ||
915 | # CONFIG_USB_ACM is not set | ||
916 | # CONFIG_USB_PRINTER is not set | ||
917 | |||
918 | # | ||
919 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
920 | # | ||
921 | |||
922 | # | ||
923 | # may also be needed; see USB_STORAGE Help for more information | ||
924 | # | ||
925 | CONFIG_USB_STORAGE=y | ||
926 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
927 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
928 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
929 | # CONFIG_USB_STORAGE_DPCM is not set | ||
930 | # CONFIG_USB_STORAGE_USBAT is not set | ||
931 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
932 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
933 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
934 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
935 | # CONFIG_USB_STORAGE_KARMA is not set | ||
936 | # CONFIG_USB_LIBUSUAL is not set | ||
937 | |||
938 | # | ||
939 | # USB Input Devices | ||
940 | # | ||
941 | CONFIG_USB_HID=m | ||
942 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
943 | # CONFIG_HID_FF is not set | ||
944 | # CONFIG_USB_HIDDEV is not set | ||
945 | |||
946 | # | ||
947 | # USB HID Boot Protocol drivers | ||
948 | # | ||
949 | # CONFIG_USB_KBD is not set | ||
950 | # CONFIG_USB_MOUSE is not set | ||
951 | # CONFIG_USB_AIPTEK is not set | ||
952 | # CONFIG_USB_WACOM is not set | ||
953 | # CONFIG_USB_ACECAD is not set | ||
954 | # CONFIG_USB_KBTAB is not set | ||
955 | # CONFIG_USB_POWERMATE is not set | ||
956 | # CONFIG_USB_TOUCHSCREEN is not set | ||
957 | # CONFIG_USB_YEALINK is not set | ||
958 | # CONFIG_USB_XPAD is not set | ||
959 | # CONFIG_USB_ATI_REMOTE is not set | ||
960 | # CONFIG_USB_ATI_REMOTE2 is not set | ||
961 | # CONFIG_USB_KEYSPAN_REMOTE is not set | ||
962 | # CONFIG_USB_APPLETOUCH is not set | ||
963 | # CONFIG_USB_GTCO is not set | ||
964 | |||
965 | # | ||
966 | # USB Imaging devices | ||
967 | # | ||
968 | # CONFIG_USB_MDC800 is not set | ||
969 | # CONFIG_USB_MICROTEK is not set | ||
970 | |||
971 | # | ||
972 | # USB Network Adapters | ||
973 | # | ||
974 | # CONFIG_USB_CATC is not set | ||
975 | # CONFIG_USB_KAWETH is not set | ||
976 | # CONFIG_USB_PEGASUS is not set | ||
977 | # CONFIG_USB_RTL8150 is not set | ||
978 | # CONFIG_USB_USBNET_MII is not set | ||
979 | # CONFIG_USB_USBNET is not set | ||
980 | # CONFIG_USB_MON is not set | ||
981 | |||
982 | # | ||
983 | # USB port drivers | ||
984 | # | ||
985 | |||
986 | # | ||
987 | # USB Serial Converter support | ||
988 | # | ||
989 | # CONFIG_USB_SERIAL is not set | ||
990 | |||
991 | # | ||
992 | # USB Miscellaneous drivers | ||
993 | # | ||
994 | # CONFIG_USB_EMI62 is not set | ||
995 | # CONFIG_USB_EMI26 is not set | ||
996 | # CONFIG_USB_ADUTUX is not set | ||
997 | # CONFIG_USB_AUERSWALD is not set | ||
998 | # CONFIG_USB_RIO500 is not set | ||
999 | # CONFIG_USB_LEGOTOWER is not set | ||
1000 | # CONFIG_USB_LCD is not set | ||
1001 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1002 | # CONFIG_USB_LED is not set | ||
1003 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1004 | # CONFIG_USB_CYTHERM is not set | ||
1005 | # CONFIG_USB_PHIDGET is not set | ||
1006 | # CONFIG_USB_IDMOUSE is not set | ||
1007 | # CONFIG_USB_FTDI_ELAN is not set | ||
1008 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1009 | # CONFIG_USB_SISUSBVGA is not set | ||
1010 | # CONFIG_USB_LD is not set | ||
1011 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1012 | # CONFIG_USB_TEST is not set | ||
1013 | |||
1014 | # | ||
1015 | # USB DSL modem support | ||
1016 | # | ||
1017 | |||
1018 | # | ||
1019 | # USB Gadget Support | ||
1020 | # | ||
1021 | # CONFIG_USB_GADGET is not set | ||
1022 | |||
1023 | # | ||
1024 | # MMC/SD Card support | ||
1025 | # | ||
1026 | # CONFIG_MMC is not set | ||
1027 | |||
1028 | # | ||
1029 | # LED devices | ||
1030 | # | ||
1031 | # CONFIG_NEW_LEDS is not set | ||
1032 | |||
1033 | # | ||
1034 | # LED drivers | ||
1035 | # | ||
1036 | |||
1037 | # | ||
1038 | # LED Triggers | ||
1039 | # | ||
1040 | |||
1041 | # | ||
1042 | # InfiniBand support | ||
1043 | # | ||
1044 | # CONFIG_INFINIBAND is not set | ||
1045 | |||
1046 | # | ||
1047 | # EDAC - error detection and reporting (RAS) (EXPERIMENTAL) | ||
1048 | # | ||
1049 | |||
1050 | # | ||
1051 | # Real Time Clock | ||
1052 | # | ||
1053 | # CONFIG_RTC_CLASS is not set | ||
1054 | |||
1055 | # | ||
1056 | # DMA Engine support | ||
1057 | # | ||
1058 | # CONFIG_DMA_ENGINE is not set | ||
1059 | |||
1060 | # | ||
1061 | # DMA Clients | ||
1062 | # | ||
1063 | |||
1064 | # | ||
1065 | # DMA Devices | ||
1066 | # | ||
1067 | |||
1068 | # | ||
1069 | # Auxiliary Display support | ||
1070 | # | ||
1071 | |||
1072 | # | ||
1073 | # Virtualization | ||
1074 | # | ||
1075 | |||
1076 | # | ||
1077 | # File systems | ||
1078 | # | ||
1079 | CONFIG_EXT2_FS=y | ||
1080 | # CONFIG_EXT2_FS_XATTR is not set | ||
1081 | # CONFIG_EXT2_FS_XIP is not set | ||
1082 | # CONFIG_EXT3_FS is not set | ||
1083 | # CONFIG_EXT4DEV_FS is not set | ||
1084 | # CONFIG_REISERFS_FS is not set | ||
1085 | # CONFIG_JFS_FS is not set | ||
1086 | CONFIG_FS_POSIX_ACL=y | ||
1087 | # CONFIG_XFS_FS is not set | ||
1088 | # CONFIG_GFS2_FS is not set | ||
1089 | # CONFIG_OCFS2_FS is not set | ||
1090 | # CONFIG_MINIX_FS is not set | ||
1091 | # CONFIG_ROMFS_FS is not set | ||
1092 | CONFIG_INOTIFY=y | ||
1093 | CONFIG_INOTIFY_USER=y | ||
1094 | # CONFIG_QUOTA is not set | ||
1095 | # CONFIG_DNOTIFY is not set | ||
1096 | # CONFIG_AUTOFS_FS is not set | ||
1097 | # CONFIG_AUTOFS4_FS is not set | ||
1098 | # CONFIG_FUSE_FS is not set | ||
1099 | CONFIG_GENERIC_ACL=y | ||
1100 | |||
1101 | # | ||
1102 | # CD-ROM/DVD Filesystems | ||
1103 | # | ||
1104 | # CONFIG_ISO9660_FS is not set | ||
1105 | # CONFIG_UDF_FS is not set | ||
1106 | |||
1107 | # | ||
1108 | # DOS/FAT/NT Filesystems | ||
1109 | # | ||
1110 | CONFIG_FAT_FS=m | ||
1111 | CONFIG_MSDOS_FS=m | ||
1112 | CONFIG_VFAT_FS=m | ||
1113 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1114 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1115 | # CONFIG_NTFS_FS is not set | ||
1116 | |||
1117 | # | ||
1118 | # Pseudo filesystems | ||
1119 | # | ||
1120 | CONFIG_PROC_FS=y | ||
1121 | CONFIG_PROC_KCORE=y | ||
1122 | CONFIG_PROC_SYSCTL=y | ||
1123 | CONFIG_SYSFS=y | ||
1124 | CONFIG_TMPFS=y | ||
1125 | CONFIG_TMPFS_POSIX_ACL=y | ||
1126 | # CONFIG_HUGETLB_PAGE is not set | ||
1127 | CONFIG_RAMFS=y | ||
1128 | CONFIG_CONFIGFS_FS=m | ||
1129 | |||
1130 | # | ||
1131 | # Miscellaneous filesystems | ||
1132 | # | ||
1133 | # CONFIG_ADFS_FS is not set | ||
1134 | # CONFIG_AFFS_FS is not set | ||
1135 | # CONFIG_HFS_FS is not set | ||
1136 | # CONFIG_HFSPLUS_FS is not set | ||
1137 | # CONFIG_BEFS_FS is not set | ||
1138 | # CONFIG_BFS_FS is not set | ||
1139 | # CONFIG_EFS_FS is not set | ||
1140 | CONFIG_JFFS2_FS=y | ||
1141 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1142 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1143 | # CONFIG_JFFS2_SUMMARY is not set | ||
1144 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1145 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1146 | CONFIG_JFFS2_ZLIB=y | ||
1147 | CONFIG_JFFS2_RTIME=y | ||
1148 | # CONFIG_JFFS2_RUBIN is not set | ||
1149 | # CONFIG_CRAMFS is not set | ||
1150 | # CONFIG_VXFS_FS is not set | ||
1151 | # CONFIG_HPFS_FS is not set | ||
1152 | # CONFIG_QNX4FS_FS is not set | ||
1153 | # CONFIG_SYSV_FS is not set | ||
1154 | # CONFIG_UFS_FS is not set | ||
1155 | |||
1156 | # | ||
1157 | # Network File Systems | ||
1158 | # | ||
1159 | CONFIG_NFS_FS=y | ||
1160 | CONFIG_NFS_V3=y | ||
1161 | # CONFIG_NFS_V3_ACL is not set | ||
1162 | # CONFIG_NFS_V4 is not set | ||
1163 | # CONFIG_NFS_DIRECTIO is not set | ||
1164 | # CONFIG_NFSD is not set | ||
1165 | CONFIG_ROOT_NFS=y | ||
1166 | CONFIG_LOCKD=y | ||
1167 | CONFIG_LOCKD_V4=y | ||
1168 | CONFIG_NFS_COMMON=y | ||
1169 | CONFIG_SUNRPC=y | ||
1170 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1171 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1172 | # CONFIG_SMB_FS is not set | ||
1173 | # CONFIG_CIFS is not set | ||
1174 | # CONFIG_NCP_FS is not set | ||
1175 | # CONFIG_CODA_FS is not set | ||
1176 | # CONFIG_AFS_FS is not set | ||
1177 | # CONFIG_9P_FS is not set | ||
1178 | |||
1179 | # | ||
1180 | # Partition Types | ||
1181 | # | ||
1182 | CONFIG_PARTITION_ADVANCED=y | ||
1183 | # CONFIG_ACORN_PARTITION is not set | ||
1184 | # CONFIG_OSF_PARTITION is not set | ||
1185 | # CONFIG_AMIGA_PARTITION is not set | ||
1186 | # CONFIG_ATARI_PARTITION is not set | ||
1187 | # CONFIG_MAC_PARTITION is not set | ||
1188 | CONFIG_MSDOS_PARTITION=y | ||
1189 | # CONFIG_BSD_DISKLABEL is not set | ||
1190 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1191 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1192 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1193 | # CONFIG_LDM_PARTITION is not set | ||
1194 | # CONFIG_SGI_PARTITION is not set | ||
1195 | # CONFIG_ULTRIX_PARTITION is not set | ||
1196 | # CONFIG_SUN_PARTITION is not set | ||
1197 | # CONFIG_KARMA_PARTITION is not set | ||
1198 | # CONFIG_EFI_PARTITION is not set | ||
1199 | |||
1200 | # | ||
1201 | # Native Language Support | ||
1202 | # | ||
1203 | CONFIG_NLS=y | ||
1204 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1205 | CONFIG_NLS_CODEPAGE_437=m | ||
1206 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1207 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1208 | CONFIG_NLS_CODEPAGE_850=m | ||
1209 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1210 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1211 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1212 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1213 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1214 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1215 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1216 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1217 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1218 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1219 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1220 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1221 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1222 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1223 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1224 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1225 | # CONFIG_NLS_ISO8859_8 is not set | ||
1226 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1227 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1228 | # CONFIG_NLS_ASCII is not set | ||
1229 | CONFIG_NLS_ISO8859_1=m | ||
1230 | # CONFIG_NLS_ISO8859_2 is not set | ||
1231 | # CONFIG_NLS_ISO8859_3 is not set | ||
1232 | # CONFIG_NLS_ISO8859_4 is not set | ||
1233 | # CONFIG_NLS_ISO8859_5 is not set | ||
1234 | # CONFIG_NLS_ISO8859_6 is not set | ||
1235 | # CONFIG_NLS_ISO8859_7 is not set | ||
1236 | # CONFIG_NLS_ISO8859_9 is not set | ||
1237 | # CONFIG_NLS_ISO8859_13 is not set | ||
1238 | # CONFIG_NLS_ISO8859_14 is not set | ||
1239 | # CONFIG_NLS_ISO8859_15 is not set | ||
1240 | # CONFIG_NLS_KOI8_R is not set | ||
1241 | # CONFIG_NLS_KOI8_U is not set | ||
1242 | # CONFIG_NLS_UTF8 is not set | ||
1243 | |||
1244 | # | ||
1245 | # Distributed Lock Manager | ||
1246 | # | ||
1247 | CONFIG_DLM=m | ||
1248 | CONFIG_DLM_TCP=y | ||
1249 | # CONFIG_DLM_SCTP is not set | ||
1250 | # CONFIG_DLM_DEBUG is not set | ||
1251 | |||
1252 | # | ||
1253 | # Profiling support | ||
1254 | # | ||
1255 | # CONFIG_PROFILING is not set | ||
1256 | |||
1257 | # | ||
1258 | # Kernel hacking | ||
1259 | # | ||
1260 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
1261 | # CONFIG_PRINTK_TIME is not set | ||
1262 | CONFIG_ENABLE_MUST_CHECK=y | ||
1263 | # CONFIG_MAGIC_SYSRQ is not set | ||
1264 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1265 | # CONFIG_DEBUG_FS is not set | ||
1266 | # CONFIG_HEADERS_CHECK is not set | ||
1267 | # CONFIG_DEBUG_KERNEL is not set | ||
1268 | CONFIG_LOG_BUF_SHIFT=14 | ||
1269 | CONFIG_CROSSCOMPILE=y | ||
1270 | CONFIG_CMDLINE="" | ||
1271 | |||
1272 | # | ||
1273 | # Security options | ||
1274 | # | ||
1275 | # CONFIG_KEYS is not set | ||
1276 | # CONFIG_SECURITY is not set | ||
1277 | |||
1278 | # | ||
1279 | # Cryptographic options | ||
1280 | # | ||
1281 | CONFIG_CRYPTO=y | ||
1282 | CONFIG_CRYPTO_ALGAPI=y | ||
1283 | CONFIG_CRYPTO_BLKCIPHER=m | ||
1284 | CONFIG_CRYPTO_HASH=m | ||
1285 | CONFIG_CRYPTO_MANAGER=m | ||
1286 | # CONFIG_CRYPTO_HMAC is not set | ||
1287 | CONFIG_CRYPTO_XCBC=m | ||
1288 | # CONFIG_CRYPTO_NULL is not set | ||
1289 | # CONFIG_CRYPTO_MD4 is not set | ||
1290 | CONFIG_CRYPTO_MD5=y | ||
1291 | # CONFIG_CRYPTO_SHA1 is not set | ||
1292 | # CONFIG_CRYPTO_SHA256 is not set | ||
1293 | # CONFIG_CRYPTO_SHA512 is not set | ||
1294 | # CONFIG_CRYPTO_WP512 is not set | ||
1295 | # CONFIG_CRYPTO_TGR192 is not set | ||
1296 | CONFIG_CRYPTO_GF128MUL=m | ||
1297 | CONFIG_CRYPTO_ECB=m | ||
1298 | CONFIG_CRYPTO_CBC=m | ||
1299 | CONFIG_CRYPTO_PCBC=m | ||
1300 | CONFIG_CRYPTO_LRW=m | ||
1301 | # CONFIG_CRYPTO_DES is not set | ||
1302 | CONFIG_CRYPTO_FCRYPT=m | ||
1303 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1304 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1305 | # CONFIG_CRYPTO_SERPENT is not set | ||
1306 | # CONFIG_CRYPTO_AES is not set | ||
1307 | # CONFIG_CRYPTO_CAST5 is not set | ||
1308 | # CONFIG_CRYPTO_CAST6 is not set | ||
1309 | # CONFIG_CRYPTO_TEA is not set | ||
1310 | # CONFIG_CRYPTO_ARC4 is not set | ||
1311 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1312 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1313 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1314 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1315 | # CONFIG_CRYPTO_CRC32C is not set | ||
1316 | CONFIG_CRYPTO_CAMELLIA=m | ||
1317 | # CONFIG_CRYPTO_TEST is not set | ||
1318 | |||
1319 | # | ||
1320 | # Hardware crypto devices | ||
1321 | # | ||
1322 | |||
1323 | # | ||
1324 | # Library routines | ||
1325 | # | ||
1326 | CONFIG_BITREVERSE=y | ||
1327 | # CONFIG_CRC_CCITT is not set | ||
1328 | # CONFIG_CRC16 is not set | ||
1329 | CONFIG_CRC32=y | ||
1330 | # CONFIG_LIBCRC32C is not set | ||
1331 | CONFIG_ZLIB_INFLATE=y | ||
1332 | CONFIG_ZLIB_DEFLATE=y | ||
1333 | CONFIG_PLIST=y | ||
1334 | CONFIG_HAS_IOMEM=y | ||
1335 | CONFIG_HAS_IOPORT=y | ||
diff --git a/arch/mips/configs/fuloong2e_defconfig b/arch/mips/configs/fuloong2e_defconfig index 0197f0de6b3f..a09dd03aa8c8 100644 --- a/arch/mips/configs/fuloong2e_defconfig +++ b/arch/mips/configs/fuloong2e_defconfig | |||
@@ -1,7 +1,7 @@ | |||
1 | # | 1 | # |
2 | # Automatically generated make config: don't edit | 2 | # Automatically generated make config: don't edit |
3 | # Linux kernel version: 2.6.31-rc1 | 3 | # Linux kernel version: 2.6.32-rc4 |
4 | # Thu Jul 2 22:37:00 2009 | 4 | # Fri Oct 16 13:18:01 2009 |
5 | # | 5 | # |
6 | CONFIG_MIPS=y | 6 | CONFIG_MIPS=y |
7 | 7 | ||
@@ -10,8 +10,8 @@ CONFIG_MIPS=y | |||
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_AR7 is not set | 12 | # CONFIG_AR7 is not set |
13 | # CONFIG_BASLER_EXCITE is not set | ||
14 | # CONFIG_BCM47XX is not set | 13 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_BCM63XX is not set | ||
15 | # CONFIG_MIPS_COBALT is not set | 15 | # CONFIG_MIPS_COBALT is not set |
16 | # CONFIG_MACH_DECSTATION is not set | 16 | # CONFIG_MACH_DECSTATION is not set |
17 | # CONFIG_MACH_JAZZ is not set | 17 | # CONFIG_MACH_JAZZ is not set |
@@ -105,6 +105,8 @@ CONFIG_CPU_LOONGSON2E=y | |||
105 | # CONFIG_CPU_RM9000 is not set | 105 | # CONFIG_CPU_RM9000 is not set |
106 | # CONFIG_CPU_SB1 is not set | 106 | # CONFIG_CPU_SB1 is not set |
107 | # CONFIG_CPU_CAVIUM_OCTEON is not set | 107 | # CONFIG_CPU_CAVIUM_OCTEON is not set |
108 | CONFIG_SYS_SUPPORTS_ZBOOT=y | ||
109 | CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y | ||
108 | CONFIG_CPU_LOONGSON2=y | 110 | CONFIG_CPU_LOONGSON2=y |
109 | CONFIG_SYS_HAS_CPU_LOONGSON2E=y | 111 | CONFIG_SYS_HAS_CPU_LOONGSON2E=y |
110 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | 112 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y |
@@ -135,12 +137,16 @@ CONFIG_SYS_SUPPORTS_HIGHMEM=y | |||
135 | CONFIG_ARCH_FLATMEM_ENABLE=y | 137 | CONFIG_ARCH_FLATMEM_ENABLE=y |
136 | CONFIG_ARCH_POPULATES_NODE_MAP=y | 138 | CONFIG_ARCH_POPULATES_NODE_MAP=y |
137 | CONFIG_SELECT_MEMORY_MODEL=y | 139 | CONFIG_SELECT_MEMORY_MODEL=y |
138 | CONFIG_FLATMEM_MANUAL=y | 140 | # CONFIG_FLATMEM_MANUAL is not set |
139 | # CONFIG_DISCONTIGMEM_MANUAL is not set | 141 | # CONFIG_DISCONTIGMEM_MANUAL is not set |
140 | # CONFIG_SPARSEMEM_MANUAL is not set | 142 | CONFIG_SPARSEMEM_MANUAL=y |
141 | CONFIG_FLATMEM=y | 143 | CONFIG_SPARSEMEM=y |
142 | CONFIG_FLAT_NODE_MEM_MAP=y | 144 | CONFIG_HAVE_MEMORY_PRESENT=y |
143 | CONFIG_SPARSEMEM_STATIC=y | 145 | CONFIG_SPARSEMEM_STATIC=y |
146 | |||
147 | # | ||
148 | # Memory hotplug is currently incompatible with Software Suspend | ||
149 | # | ||
144 | CONFIG_PAGEFLAGS_EXTENDED=y | 150 | CONFIG_PAGEFLAGS_EXTENDED=y |
145 | CONFIG_SPLIT_PTLOCK_CPUS=4 | 151 | CONFIG_SPLIT_PTLOCK_CPUS=4 |
146 | CONFIG_PHYS_ADDR_T_64BIT=y | 152 | CONFIG_PHYS_ADDR_T_64BIT=y |
@@ -148,6 +154,7 @@ CONFIG_ZONE_DMA_FLAG=0 | |||
148 | CONFIG_VIRT_TO_BUS=y | 154 | CONFIG_VIRT_TO_BUS=y |
149 | CONFIG_HAVE_MLOCK=y | 155 | CONFIG_HAVE_MLOCK=y |
150 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | 156 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y |
157 | # CONFIG_KSM is not set | ||
151 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | 158 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 |
152 | CONFIG_TICK_ONESHOT=y | 159 | CONFIG_TICK_ONESHOT=y |
153 | CONFIG_NO_HZ=y | 160 | CONFIG_NO_HZ=y |
@@ -180,6 +187,12 @@ CONFIG_BROKEN_ON_SMP=y | |||
180 | CONFIG_INIT_ENV_ARG_LIMIT=32 | 187 | CONFIG_INIT_ENV_ARG_LIMIT=32 |
181 | CONFIG_LOCALVERSION="-fuloong2e" | 188 | CONFIG_LOCALVERSION="-fuloong2e" |
182 | # CONFIG_LOCALVERSION_AUTO is not set | 189 | # CONFIG_LOCALVERSION_AUTO is not set |
190 | CONFIG_HAVE_KERNEL_GZIP=y | ||
191 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
192 | CONFIG_HAVE_KERNEL_LZMA=y | ||
193 | CONFIG_KERNEL_GZIP=y | ||
194 | # CONFIG_KERNEL_BZIP2 is not set | ||
195 | # CONFIG_KERNEL_LZMA is not set | ||
183 | CONFIG_SWAP=y | 196 | CONFIG_SWAP=y |
184 | CONFIG_SYSVIPC=y | 197 | CONFIG_SYSVIPC=y |
185 | CONFIG_SYSVIPC_SYSCTL=y | 198 | CONFIG_SYSVIPC_SYSCTL=y |
@@ -193,11 +206,12 @@ CONFIG_BSD_PROCESS_ACCT=y | |||
193 | # | 206 | # |
194 | # RCU Subsystem | 207 | # RCU Subsystem |
195 | # | 208 | # |
196 | CONFIG_CLASSIC_RCU=y | 209 | CONFIG_TREE_RCU=y |
197 | # CONFIG_TREE_RCU is not set | 210 | # CONFIG_TREE_PREEMPT_RCU is not set |
198 | # CONFIG_PREEMPT_RCU is not set | 211 | # CONFIG_RCU_TRACE is not set |
212 | CONFIG_RCU_FANOUT=64 | ||
213 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
199 | # CONFIG_TREE_RCU_TRACE is not set | 214 | # CONFIG_TREE_RCU_TRACE is not set |
200 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
201 | CONFIG_IKCONFIG=y | 215 | CONFIG_IKCONFIG=y |
202 | CONFIG_IKCONFIG_PROC=y | 216 | CONFIG_IKCONFIG_PROC=y |
203 | CONFIG_LOG_BUF_SHIFT=14 | 217 | CONFIG_LOG_BUF_SHIFT=14 |
@@ -235,18 +249,16 @@ CONFIG_SHMEM=y | |||
235 | CONFIG_AIO=y | 249 | CONFIG_AIO=y |
236 | 250 | ||
237 | # | 251 | # |
238 | # Performance Counters | 252 | # Kernel Performance Events And Counters |
239 | # | 253 | # |
240 | CONFIG_VM_EVENT_COUNTERS=y | 254 | CONFIG_VM_EVENT_COUNTERS=y |
241 | CONFIG_PCI_QUIRKS=y | 255 | CONFIG_PCI_QUIRKS=y |
242 | # CONFIG_STRIP_ASM_SYMS is not set | ||
243 | # CONFIG_COMPAT_BRK is not set | 256 | # CONFIG_COMPAT_BRK is not set |
244 | CONFIG_SLAB=y | 257 | CONFIG_SLAB=y |
245 | # CONFIG_SLUB is not set | 258 | # CONFIG_SLUB is not set |
246 | # CONFIG_SLOB is not set | 259 | # CONFIG_SLOB is not set |
247 | CONFIG_PROFILING=y | 260 | CONFIG_PROFILING=y |
248 | CONFIG_TRACEPOINTS=y | 261 | CONFIG_TRACEPOINTS=y |
249 | CONFIG_MARKERS=y | ||
250 | CONFIG_OPROFILE=m | 262 | CONFIG_OPROFILE=m |
251 | CONFIG_HAVE_OPROFILE=y | 263 | CONFIG_HAVE_OPROFILE=y |
252 | CONFIG_HAVE_SYSCALL_WRAPPERS=y | 264 | CONFIG_HAVE_SYSCALL_WRAPPERS=y |
@@ -255,8 +267,8 @@ CONFIG_HAVE_SYSCALL_WRAPPERS=y | |||
255 | # GCOV-based kernel profiling | 267 | # GCOV-based kernel profiling |
256 | # | 268 | # |
257 | # CONFIG_GCOV_KERNEL is not set | 269 | # CONFIG_GCOV_KERNEL is not set |
258 | # CONFIG_SLOW_WORK is not set | 270 | CONFIG_SLOW_WORK=y |
259 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | 271 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y |
260 | CONFIG_SLABINFO=y | 272 | CONFIG_SLABINFO=y |
261 | CONFIG_RT_MUTEXES=y | 273 | CONFIG_RT_MUTEXES=y |
262 | CONFIG_BASE_SMALL=0 | 274 | CONFIG_BASE_SMALL=0 |
@@ -283,7 +295,7 @@ CONFIG_IOSCHED_CFQ=y | |||
283 | CONFIG_DEFAULT_CFQ=y | 295 | CONFIG_DEFAULT_CFQ=y |
284 | # CONFIG_DEFAULT_NOOP is not set | 296 | # CONFIG_DEFAULT_NOOP is not set |
285 | CONFIG_DEFAULT_IOSCHED="cfq" | 297 | CONFIG_DEFAULT_IOSCHED="cfq" |
286 | # CONFIG_FREEZER is not set | 298 | CONFIG_FREEZER=y |
287 | 299 | ||
288 | # | 300 | # |
289 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | 301 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) |
@@ -321,9 +333,14 @@ CONFIG_ARCH_HIBERNATION_POSSIBLE=y | |||
321 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | 333 | CONFIG_ARCH_SUSPEND_POSSIBLE=y |
322 | CONFIG_PM=y | 334 | CONFIG_PM=y |
323 | # CONFIG_PM_DEBUG is not set | 335 | # CONFIG_PM_DEBUG is not set |
336 | CONFIG_PM_SLEEP=y | ||
324 | # CONFIG_SUSPEND is not set | 337 | # CONFIG_SUSPEND is not set |
325 | # CONFIG_HIBERNATION is not set | 338 | CONFIG_HIBERNATION_NVS=y |
339 | CONFIG_HIBERNATION=y | ||
340 | CONFIG_PM_STD_PARTITION="/dev/hda3" | ||
341 | # CONFIG_PM_RUNTIME is not set | ||
326 | CONFIG_NET=y | 342 | CONFIG_NET=y |
343 | CONFIG_COMPAT_NETLINK_MESSAGES=y | ||
327 | 344 | ||
328 | # | 345 | # |
329 | # Networking options | 346 | # Networking options |
@@ -442,6 +459,7 @@ CONFIG_IP_NF_ARPFILTER=m | |||
442 | CONFIG_IP_NF_ARP_MANGLE=m | 459 | CONFIG_IP_NF_ARP_MANGLE=m |
443 | # CONFIG_IP_DCCP is not set | 460 | # CONFIG_IP_DCCP is not set |
444 | # CONFIG_IP_SCTP is not set | 461 | # CONFIG_IP_SCTP is not set |
462 | # CONFIG_RDS is not set | ||
445 | # CONFIG_TIPC is not set | 463 | # CONFIG_TIPC is not set |
446 | # CONFIG_ATM is not set | 464 | # CONFIG_ATM is not set |
447 | # CONFIG_BRIDGE is not set | 465 | # CONFIG_BRIDGE is not set |
@@ -473,6 +491,7 @@ CONFIG_NET_CLS_ROUTE=y | |||
473 | # CONFIG_AF_RXRPC is not set | 491 | # CONFIG_AF_RXRPC is not set |
474 | CONFIG_WIRELESS=y | 492 | CONFIG_WIRELESS=y |
475 | # CONFIG_CFG80211 is not set | 493 | # CONFIG_CFG80211 is not set |
494 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
476 | CONFIG_WIRELESS_OLD_REGULATORY=y | 495 | CONFIG_WIRELESS_OLD_REGULATORY=y |
477 | CONFIG_WIRELESS_EXT=y | 496 | CONFIG_WIRELESS_EXT=y |
478 | CONFIG_WIRELESS_EXT_SYSFS=y | 497 | CONFIG_WIRELESS_EXT_SYSFS=y |
@@ -481,7 +500,6 @@ CONFIG_WIRELESS_EXT_SYSFS=y | |||
481 | # | 500 | # |
482 | # CFG80211 needs to be enabled for MAC80211 | 501 | # CFG80211 needs to be enabled for MAC80211 |
483 | # | 502 | # |
484 | CONFIG_MAC80211_DEFAULT_PS_VALUE=0 | ||
485 | # CONFIG_WIMAX is not set | 503 | # CONFIG_WIMAX is not set |
486 | # CONFIG_RFKILL is not set | 504 | # CONFIG_RFKILL is not set |
487 | CONFIG_NET_9P=m | 505 | CONFIG_NET_9P=m |
@@ -495,6 +513,7 @@ CONFIG_NET_9P=m | |||
495 | # Generic Driver Options | 513 | # Generic Driver Options |
496 | # | 514 | # |
497 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | 515 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" |
516 | # CONFIG_DEVTMPFS is not set | ||
498 | CONFIG_STANDALONE=y | 517 | CONFIG_STANDALONE=y |
499 | CONFIG_PREVENT_FIRMWARE_BUILD=y | 518 | CONFIG_PREVENT_FIRMWARE_BUILD=y |
500 | CONFIG_FW_LOADER=m | 519 | CONFIG_FW_LOADER=m |
@@ -504,9 +523,9 @@ CONFIG_EXTRA_FIRMWARE="" | |||
504 | # CONFIG_CONNECTOR is not set | 523 | # CONFIG_CONNECTOR is not set |
505 | CONFIG_MTD=m | 524 | CONFIG_MTD=m |
506 | # CONFIG_MTD_DEBUG is not set | 525 | # CONFIG_MTD_DEBUG is not set |
526 | # CONFIG_MTD_TESTS is not set | ||
507 | # CONFIG_MTD_CONCAT is not set | 527 | # CONFIG_MTD_CONCAT is not set |
508 | # CONFIG_MTD_PARTITIONS is not set | 528 | # CONFIG_MTD_PARTITIONS is not set |
509 | # CONFIG_MTD_TESTS is not set | ||
510 | 529 | ||
511 | # | 530 | # |
512 | # User Modules And Translation Layers | 531 | # User Modules And Translation Layers |
@@ -820,6 +839,7 @@ CONFIG_8139TOO=y | |||
820 | # CONFIG_SUNDANCE is not set | 839 | # CONFIG_SUNDANCE is not set |
821 | # CONFIG_TLAN is not set | 840 | # CONFIG_TLAN is not set |
822 | # CONFIG_KS8842 is not set | 841 | # CONFIG_KS8842 is not set |
842 | # CONFIG_KS8851_MLL is not set | ||
823 | # CONFIG_VIA_RHINE is not set | 843 | # CONFIG_VIA_RHINE is not set |
824 | # CONFIG_SC92031 is not set | 844 | # CONFIG_SC92031 is not set |
825 | # CONFIG_ATL2 is not set | 845 | # CONFIG_ATL2 is not set |
@@ -867,10 +887,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
867 | # CONFIG_SFC is not set | 887 | # CONFIG_SFC is not set |
868 | # CONFIG_BE2NET is not set | 888 | # CONFIG_BE2NET is not set |
869 | # CONFIG_TR is not set | 889 | # CONFIG_TR is not set |
870 | 890 | CONFIG_WLAN=y | |
871 | # | ||
872 | # Wireless LAN | ||
873 | # | ||
874 | # CONFIG_WLAN_PRE80211 is not set | 891 | # CONFIG_WLAN_PRE80211 is not set |
875 | # CONFIG_WLAN_80211 is not set | 892 | # CONFIG_WLAN_80211 is not set |
876 | 893 | ||
@@ -886,6 +903,7 @@ CONFIG_CHELSIO_T3_DEPENDS=y | |||
886 | # CONFIG_USB_PEGASUS is not set | 903 | # CONFIG_USB_PEGASUS is not set |
887 | # CONFIG_USB_RTL8150 is not set | 904 | # CONFIG_USB_RTL8150 is not set |
888 | # CONFIG_USB_USBNET is not set | 905 | # CONFIG_USB_USBNET is not set |
906 | # CONFIG_USB_CDC_PHONET is not set | ||
889 | # CONFIG_WAN is not set | 907 | # CONFIG_WAN is not set |
890 | # CONFIG_FDDI is not set | 908 | # CONFIG_FDDI is not set |
891 | # CONFIG_HIPPI is not set | 909 | # CONFIG_HIPPI is not set |
@@ -933,12 +951,16 @@ CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | |||
933 | # Input Device Drivers | 951 | # Input Device Drivers |
934 | # | 952 | # |
935 | CONFIG_INPUT_KEYBOARD=y | 953 | CONFIG_INPUT_KEYBOARD=y |
954 | # CONFIG_KEYBOARD_ADP5588 is not set | ||
936 | CONFIG_KEYBOARD_ATKBD=y | 955 | CONFIG_KEYBOARD_ATKBD=y |
937 | # CONFIG_KEYBOARD_SUNKBD is not set | 956 | # CONFIG_QT2160 is not set |
938 | # CONFIG_KEYBOARD_LKKBD is not set | 957 | # CONFIG_KEYBOARD_LKKBD is not set |
939 | # CONFIG_KEYBOARD_XTKBD is not set | 958 | # CONFIG_KEYBOARD_MAX7359 is not set |
940 | # CONFIG_KEYBOARD_NEWTON is not set | 959 | # CONFIG_KEYBOARD_NEWTON is not set |
960 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
941 | # CONFIG_KEYBOARD_STOWAWAY is not set | 961 | # CONFIG_KEYBOARD_STOWAWAY is not set |
962 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
963 | # CONFIG_KEYBOARD_XTKBD is not set | ||
942 | CONFIG_INPUT_MOUSE=y | 964 | CONFIG_INPUT_MOUSE=y |
943 | CONFIG_MOUSE_PS2=y | 965 | CONFIG_MOUSE_PS2=y |
944 | CONFIG_MOUSE_PS2_ALPS=y | 966 | CONFIG_MOUSE_PS2_ALPS=y |
@@ -946,6 +968,7 @@ CONFIG_MOUSE_PS2_LOGIPS2PP=y | |||
946 | CONFIG_MOUSE_PS2_SYNAPTICS=y | 968 | CONFIG_MOUSE_PS2_SYNAPTICS=y |
947 | CONFIG_MOUSE_PS2_TRACKPOINT=y | 969 | CONFIG_MOUSE_PS2_TRACKPOINT=y |
948 | # CONFIG_MOUSE_PS2_ELANTECH is not set | 970 | # CONFIG_MOUSE_PS2_ELANTECH is not set |
971 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
949 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | 972 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set |
950 | CONFIG_MOUSE_SERIAL=y | 973 | CONFIG_MOUSE_SERIAL=y |
951 | # CONFIG_MOUSE_APPLETOUCH is not set | 974 | # CONFIG_MOUSE_APPLETOUCH is not set |
@@ -1015,6 +1038,7 @@ CONFIG_RTC=y | |||
1015 | CONFIG_DEVPORT=y | 1038 | CONFIG_DEVPORT=y |
1016 | CONFIG_I2C=m | 1039 | CONFIG_I2C=m |
1017 | CONFIG_I2C_BOARDINFO=y | 1040 | CONFIG_I2C_BOARDINFO=y |
1041 | CONFIG_I2C_COMPAT=y | ||
1018 | CONFIG_I2C_CHARDEV=m | 1042 | CONFIG_I2C_CHARDEV=m |
1019 | CONFIG_I2C_HELPER_AUTO=y | 1043 | CONFIG_I2C_HELPER_AUTO=y |
1020 | 1044 | ||
@@ -1070,9 +1094,6 @@ CONFIG_I2C_VIAPRO=m | |||
1070 | # Miscellaneous I2C Chip support | 1094 | # Miscellaneous I2C Chip support |
1071 | # | 1095 | # |
1072 | # CONFIG_DS1682 is not set | 1096 | # CONFIG_DS1682 is not set |
1073 | # CONFIG_SENSORS_PCF8574 is not set | ||
1074 | # CONFIG_PCF8575 is not set | ||
1075 | # CONFIG_SENSORS_PCA9539 is not set | ||
1076 | # CONFIG_SENSORS_TSL2550 is not set | 1097 | # CONFIG_SENSORS_TSL2550 is not set |
1077 | # CONFIG_I2C_DEBUG_CORE is not set | 1098 | # CONFIG_I2C_DEBUG_CORE is not set |
1078 | # CONFIG_I2C_DEBUG_ALGO is not set | 1099 | # CONFIG_I2C_DEBUG_ALGO is not set |
@@ -1088,7 +1109,6 @@ CONFIG_I2C_VIAPRO=m | |||
1088 | # CONFIG_POWER_SUPPLY is not set | 1109 | # CONFIG_POWER_SUPPLY is not set |
1089 | # CONFIG_HWMON is not set | 1110 | # CONFIG_HWMON is not set |
1090 | # CONFIG_THERMAL is not set | 1111 | # CONFIG_THERMAL is not set |
1091 | # CONFIG_THERMAL_HWMON is not set | ||
1092 | # CONFIG_WATCHDOG is not set | 1112 | # CONFIG_WATCHDOG is not set |
1093 | CONFIG_SSB_POSSIBLE=y | 1113 | CONFIG_SSB_POSSIBLE=y |
1094 | 1114 | ||
@@ -1105,6 +1125,7 @@ CONFIG_SSB_POSSIBLE=y | |||
1105 | # CONFIG_HTC_PASIC3 is not set | 1125 | # CONFIG_HTC_PASIC3 is not set |
1106 | # CONFIG_MFD_TMIO is not set | 1126 | # CONFIG_MFD_TMIO is not set |
1107 | # CONFIG_MFD_WM8400 is not set | 1127 | # CONFIG_MFD_WM8400 is not set |
1128 | # CONFIG_MFD_WM831X is not set | ||
1108 | # CONFIG_MFD_WM8350_I2C is not set | 1129 | # CONFIG_MFD_WM8350_I2C is not set |
1109 | # CONFIG_MFD_PCF50633 is not set | 1130 | # CONFIG_MFD_PCF50633 is not set |
1110 | # CONFIG_AB3100_CORE is not set | 1131 | # CONFIG_AB3100_CORE is not set |
@@ -1114,6 +1135,7 @@ CONFIG_SSB_POSSIBLE=y | |||
1114 | # | 1135 | # |
1115 | # Graphics support | 1136 | # Graphics support |
1116 | # | 1137 | # |
1138 | CONFIG_VGA_ARB=y | ||
1117 | # CONFIG_DRM is not set | 1139 | # CONFIG_DRM is not set |
1118 | # CONFIG_VGASTATE is not set | 1140 | # CONFIG_VGASTATE is not set |
1119 | CONFIG_VIDEO_OUTPUT_CONTROL=m | 1141 | CONFIG_VIDEO_OUTPUT_CONTROL=m |
@@ -1198,6 +1220,7 @@ CONFIG_FONT_8x16=y | |||
1198 | # CONFIG_LOGO is not set | 1220 | # CONFIG_LOGO is not set |
1199 | CONFIG_SOUND=y | 1221 | CONFIG_SOUND=y |
1200 | CONFIG_SOUND_OSS_CORE=y | 1222 | CONFIG_SOUND_OSS_CORE=y |
1223 | CONFIG_SOUND_OSS_CORE_PRECLAIM=y | ||
1201 | CONFIG_SND=m | 1224 | CONFIG_SND=m |
1202 | CONFIG_SND_TIMER=m | 1225 | CONFIG_SND_TIMER=m |
1203 | CONFIG_SND_PCM=m | 1226 | CONFIG_SND_PCM=m |
@@ -1304,7 +1327,6 @@ CONFIG_SND_USB=y | |||
1304 | CONFIG_AC97_BUS=m | 1327 | CONFIG_AC97_BUS=m |
1305 | CONFIG_HID_SUPPORT=y | 1328 | CONFIG_HID_SUPPORT=y |
1306 | CONFIG_HID=y | 1329 | CONFIG_HID=y |
1307 | # CONFIG_HID_DEBUG is not set | ||
1308 | CONFIG_HIDRAW=y | 1330 | CONFIG_HIDRAW=y |
1309 | 1331 | ||
1310 | # | 1332 | # |
@@ -1356,6 +1378,7 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y | |||
1356 | # CONFIG_USB_OXU210HP_HCD is not set | 1378 | # CONFIG_USB_OXU210HP_HCD is not set |
1357 | # CONFIG_USB_ISP116X_HCD is not set | 1379 | # CONFIG_USB_ISP116X_HCD is not set |
1358 | CONFIG_USB_ISP1760_HCD=m | 1380 | CONFIG_USB_ISP1760_HCD=m |
1381 | # CONFIG_USB_ISP1362_HCD is not set | ||
1359 | CONFIG_USB_OHCI_HCD=y | 1382 | CONFIG_USB_OHCI_HCD=y |
1360 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | 1383 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set |
1361 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | 1384 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set |
@@ -1453,6 +1476,7 @@ CONFIG_UIO_CIF=m | |||
1453 | # CONFIG_UIO_SMX is not set | 1476 | # CONFIG_UIO_SMX is not set |
1454 | # CONFIG_UIO_AEC is not set | 1477 | # CONFIG_UIO_AEC is not set |
1455 | # CONFIG_UIO_SERCOS3 is not set | 1478 | # CONFIG_UIO_SERCOS3 is not set |
1479 | # CONFIG_UIO_PCI_GENERIC is not set | ||
1456 | 1480 | ||
1457 | # | 1481 | # |
1458 | # TI VLYNQ | 1482 | # TI VLYNQ |
@@ -1469,10 +1493,10 @@ CONFIG_EXT3_FS=y | |||
1469 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | 1493 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set |
1470 | # CONFIG_EXT3_FS_XATTR is not set | 1494 | # CONFIG_EXT3_FS_XATTR is not set |
1471 | CONFIG_EXT4_FS=m | 1495 | CONFIG_EXT4_FS=m |
1472 | CONFIG_EXT4DEV_COMPAT=y | ||
1473 | CONFIG_EXT4_FS_XATTR=y | 1496 | CONFIG_EXT4_FS_XATTR=y |
1474 | CONFIG_EXT4_FS_POSIX_ACL=y | 1497 | CONFIG_EXT4_FS_POSIX_ACL=y |
1475 | CONFIG_EXT4_FS_SECURITY=y | 1498 | CONFIG_EXT4_FS_SECURITY=y |
1499 | # CONFIG_EXT4_DEBUG is not set | ||
1476 | CONFIG_FS_XIP=y | 1500 | CONFIG_FS_XIP=y |
1477 | CONFIG_JBD=y | 1501 | CONFIG_JBD=y |
1478 | # CONFIG_JBD_DEBUG is not set | 1502 | # CONFIG_JBD_DEBUG is not set |
@@ -1489,6 +1513,7 @@ CONFIG_FS_POSIX_ACL=y | |||
1489 | # CONFIG_GFS2_FS is not set | 1513 | # CONFIG_GFS2_FS is not set |
1490 | # CONFIG_OCFS2_FS is not set | 1514 | # CONFIG_OCFS2_FS is not set |
1491 | # CONFIG_BTRFS_FS is not set | 1515 | # CONFIG_BTRFS_FS is not set |
1516 | # CONFIG_NILFS2_FS is not set | ||
1492 | CONFIG_FILE_LOCKING=y | 1517 | CONFIG_FILE_LOCKING=y |
1493 | CONFIG_FSNOTIFY=y | 1518 | CONFIG_FSNOTIFY=y |
1494 | CONFIG_DNOTIFY=y | 1519 | CONFIG_DNOTIFY=y |
@@ -1557,7 +1582,6 @@ CONFIG_OMFS_FS=m | |||
1557 | # CONFIG_ROMFS_FS is not set | 1582 | # CONFIG_ROMFS_FS is not set |
1558 | # CONFIG_SYSV_FS is not set | 1583 | # CONFIG_SYSV_FS is not set |
1559 | # CONFIG_UFS_FS is not set | 1584 | # CONFIG_UFS_FS is not set |
1560 | # CONFIG_NILFS2_FS is not set | ||
1561 | CONFIG_NETWORK_FILESYSTEMS=y | 1585 | CONFIG_NETWORK_FILESYSTEMS=y |
1562 | CONFIG_NFS_FS=m | 1586 | CONFIG_NFS_FS=m |
1563 | CONFIG_NFS_V3=y | 1587 | CONFIG_NFS_V3=y |
@@ -1666,6 +1690,7 @@ CONFIG_ENABLE_WARN_DEPRECATED=y | |||
1666 | # CONFIG_ENABLE_MUST_CHECK is not set | 1690 | # CONFIG_ENABLE_MUST_CHECK is not set |
1667 | CONFIG_FRAME_WARN=2048 | 1691 | CONFIG_FRAME_WARN=2048 |
1668 | # CONFIG_MAGIC_SYSRQ is not set | 1692 | # CONFIG_MAGIC_SYSRQ is not set |
1693 | # CONFIG_STRIP_ASM_SYMS is not set | ||
1669 | # CONFIG_UNUSED_SYMBOLS is not set | 1694 | # CONFIG_UNUSED_SYMBOLS is not set |
1670 | CONFIG_DEBUG_FS=y | 1695 | CONFIG_DEBUG_FS=y |
1671 | # CONFIG_HEADERS_CHECK is not set | 1696 | # CONFIG_HEADERS_CHECK is not set |
@@ -1678,13 +1703,14 @@ CONFIG_NOP_TRACER=y | |||
1678 | CONFIG_RING_BUFFER=y | 1703 | CONFIG_RING_BUFFER=y |
1679 | CONFIG_EVENT_TRACING=y | 1704 | CONFIG_EVENT_TRACING=y |
1680 | CONFIG_CONTEXT_SWITCH_TRACER=y | 1705 | CONFIG_CONTEXT_SWITCH_TRACER=y |
1706 | CONFIG_RING_BUFFER_ALLOW_SWAP=y | ||
1681 | CONFIG_TRACING=y | 1707 | CONFIG_TRACING=y |
1682 | CONFIG_TRACING_SUPPORT=y | 1708 | CONFIG_TRACING_SUPPORT=y |
1683 | # CONFIG_FTRACE is not set | 1709 | # CONFIG_FTRACE is not set |
1684 | # CONFIG_DYNAMIC_DEBUG is not set | 1710 | # CONFIG_DYNAMIC_DEBUG is not set |
1685 | # CONFIG_SAMPLES is not set | 1711 | # CONFIG_SAMPLES is not set |
1686 | CONFIG_HAVE_ARCH_KGDB=y | 1712 | CONFIG_HAVE_ARCH_KGDB=y |
1687 | CONFIG_CMDLINE="" | 1713 | # CONFIG_CMDLINE_BOOL is not set |
1688 | 1714 | ||
1689 | # | 1715 | # |
1690 | # Security options | 1716 | # Security options |
@@ -1742,11 +1768,13 @@ CONFIG_CRYPTO_XTS=m | |||
1742 | # | 1768 | # |
1743 | CONFIG_CRYPTO_HMAC=y | 1769 | CONFIG_CRYPTO_HMAC=y |
1744 | # CONFIG_CRYPTO_XCBC is not set | 1770 | # CONFIG_CRYPTO_XCBC is not set |
1771 | # CONFIG_CRYPTO_VMAC is not set | ||
1745 | 1772 | ||
1746 | # | 1773 | # |
1747 | # Digest | 1774 | # Digest |
1748 | # | 1775 | # |
1749 | # CONFIG_CRYPTO_CRC32C is not set | 1776 | # CONFIG_CRYPTO_CRC32C is not set |
1777 | CONFIG_CRYPTO_GHASH=m | ||
1750 | # CONFIG_CRYPTO_MD4 is not set | 1778 | # CONFIG_CRYPTO_MD4 is not set |
1751 | CONFIG_CRYPTO_MD5=m | 1779 | CONFIG_CRYPTO_MD5=m |
1752 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | 1780 | # CONFIG_CRYPTO_MICHAEL_MIC is not set |
diff --git a/arch/mips/configs/ip22_defconfig b/arch/mips/configs/ip22_defconfig index f14d38ba6034..222d7eca2fe4 100644 --- a/arch/mips/configs/ip22_defconfig +++ b/arch/mips/configs/ip22_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1188,7 +1187,7 @@ CONFIG_DEBUG_MEMORY_INIT=y | |||
1188 | CONFIG_DYNAMIC_PRINTK_DEBUG=y | 1187 | CONFIG_DYNAMIC_PRINTK_DEBUG=y |
1189 | # CONFIG_SAMPLES is not set | 1188 | # CONFIG_SAMPLES is not set |
1190 | CONFIG_HAVE_ARCH_KGDB=y | 1189 | CONFIG_HAVE_ARCH_KGDB=y |
1191 | CONFIG_CMDLINE="" | 1190 | # CONFIG_CMDLINE_BOOL is not set |
1192 | 1191 | ||
1193 | # | 1192 | # |
1194 | # Security options | 1193 | # Security options |
diff --git a/arch/mips/configs/ip27_defconfig b/arch/mips/configs/ip27_defconfig index 1fc73aa7b509..ed84b4cb3c8d 100644 --- a/arch/mips/configs/ip27_defconfig +++ b/arch/mips/configs/ip27_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_MIPS_COBALT is not set | 12 | # CONFIG_MIPS_COBALT is not set |
14 | # CONFIG_MACH_DECSTATION is not set | 13 | # CONFIG_MACH_DECSTATION is not set |
15 | # CONFIG_MACH_JAZZ is not set | 14 | # CONFIG_MACH_JAZZ is not set |
@@ -940,7 +939,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
940 | # CONFIG_HEADERS_CHECK is not set | 939 | # CONFIG_HEADERS_CHECK is not set |
941 | # CONFIG_DEBUG_KERNEL is not set | 940 | # CONFIG_DEBUG_KERNEL is not set |
942 | CONFIG_CROSSCOMPILE=y | 941 | CONFIG_CROSSCOMPILE=y |
943 | CONFIG_CMDLINE="" | 942 | # CONFIG_CMDLINE_BOOL is not set |
944 | 943 | ||
945 | # | 944 | # |
946 | # Security options | 945 | # Security options |
diff --git a/arch/mips/configs/ip28_defconfig b/arch/mips/configs/ip28_defconfig index 539dccb0345d..dab2e5aaadaf 100644 --- a/arch/mips/configs/ip28_defconfig +++ b/arch/mips/configs/ip28_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -816,7 +815,7 @@ CONFIG_MAGIC_SYSRQ=y | |||
816 | # CONFIG_HEADERS_CHECK is not set | 815 | # CONFIG_HEADERS_CHECK is not set |
817 | # CONFIG_DEBUG_KERNEL is not set | 816 | # CONFIG_DEBUG_KERNEL is not set |
818 | # CONFIG_SAMPLES is not set | 817 | # CONFIG_SAMPLES is not set |
819 | CONFIG_CMDLINE="" | 818 | # CONFIG_CMDLINE_BOOL is not set |
820 | 819 | ||
821 | # | 820 | # |
822 | # Security options | 821 | # Security options |
diff --git a/arch/mips/configs/ip32_defconfig b/arch/mips/configs/ip32_defconfig index d934bdefb393..1841c88d3d24 100644 --- a/arch/mips/configs/ip32_defconfig +++ b/arch/mips/configs/ip32_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1126,7 +1125,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y | |||
1126 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 1125 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set |
1127 | # CONFIG_SAMPLES is not set | 1126 | # CONFIG_SAMPLES is not set |
1128 | CONFIG_HAVE_ARCH_KGDB=y | 1127 | CONFIG_HAVE_ARCH_KGDB=y |
1129 | CONFIG_CMDLINE="" | 1128 | # CONFIG_CMDLINE_BOOL is not set |
1130 | 1129 | ||
1131 | # | 1130 | # |
1132 | # Security options | 1131 | # Security options |
diff --git a/arch/mips/configs/jazz_defconfig b/arch/mips/configs/jazz_defconfig index d22df61833a8..14c2ab3b2674 100644 --- a/arch/mips/configs/jazz_defconfig +++ b/arch/mips/configs/jazz_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | CONFIG_MACH_JAZZ=y | 27 | CONFIG_MACH_JAZZ=y |
@@ -1374,7 +1373,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1374 | # CONFIG_DEBUG_KERNEL is not set | 1373 | # CONFIG_DEBUG_KERNEL is not set |
1375 | CONFIG_LOG_BUF_SHIFT=14 | 1374 | CONFIG_LOG_BUF_SHIFT=14 |
1376 | CONFIG_CROSSCOMPILE=y | 1375 | CONFIG_CROSSCOMPILE=y |
1377 | CONFIG_CMDLINE="" | 1376 | # CONFIG_CMDLINE_BOOL is not set |
1378 | 1377 | ||
1379 | # | 1378 | # |
1380 | # Security options | 1379 | # Security options |
diff --git a/arch/mips/configs/jmr3927_defconfig b/arch/mips/configs/jmr3927_defconfig index 5380f1f582d9..4d66c44cced8 100644 --- a/arch/mips/configs/jmr3927_defconfig +++ b/arch/mips/configs/jmr3927_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -835,7 +834,7 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y | |||
835 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 834 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set |
836 | # CONFIG_SAMPLES is not set | 835 | # CONFIG_SAMPLES is not set |
837 | CONFIG_HAVE_ARCH_KGDB=y | 836 | CONFIG_HAVE_ARCH_KGDB=y |
838 | CONFIG_CMDLINE="" | 837 | # CONFIG_CMDLINE_BOOL is not set |
839 | 838 | ||
840 | # | 839 | # |
841 | # Security options | 840 | # Security options |
diff --git a/arch/mips/configs/lasat_defconfig b/arch/mips/configs/lasat_defconfig index 044074db7e55..08d481e3d42a 100644 --- a/arch/mips/configs/lasat_defconfig +++ b/arch/mips/configs/lasat_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_MIPS_COBALT is not set | 12 | # CONFIG_MIPS_COBALT is not set |
14 | # CONFIG_MACH_DECSTATION is not set | 13 | # CONFIG_MACH_DECSTATION is not set |
15 | # CONFIG_MACH_JAZZ is not set | 14 | # CONFIG_MACH_JAZZ is not set |
@@ -798,7 +797,7 @@ CONFIG_MAGIC_SYSRQ=y | |||
798 | # CONFIG_HEADERS_CHECK is not set | 797 | # CONFIG_HEADERS_CHECK is not set |
799 | # CONFIG_DEBUG_KERNEL is not set | 798 | # CONFIG_DEBUG_KERNEL is not set |
800 | CONFIG_CROSSCOMPILE=y | 799 | CONFIG_CROSSCOMPILE=y |
801 | CONFIG_CMDLINE="" | 800 | # CONFIG_CMDLINE_BOOL is not set |
802 | 801 | ||
803 | # | 802 | # |
804 | # Security options | 803 | # Security options |
diff --git a/arch/mips/configs/lemote2f_defconfig b/arch/mips/configs/lemote2f_defconfig new file mode 100644 index 000000000000..b71a0a4fb95f --- /dev/null +++ b/arch/mips/configs/lemote2f_defconfig | |||
@@ -0,0 +1,1835 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.32-rc6 | ||
4 | # Mon Nov 9 23:42:42 2009 | ||
5 | # | ||
6 | CONFIG_MIPS=y | ||
7 | |||
8 | # | ||
9 | # Machine selection | ||
10 | # | ||
11 | # CONFIG_MACH_ALCHEMY is not set | ||
12 | # CONFIG_AR7 is not set | ||
13 | # CONFIG_BCM47XX is not set | ||
14 | # CONFIG_BCM63XX is not set | ||
15 | # CONFIG_MIPS_COBALT is not set | ||
16 | # CONFIG_MACH_DECSTATION is not set | ||
17 | # CONFIG_MACH_JAZZ is not set | ||
18 | # CONFIG_LASAT is not set | ||
19 | CONFIG_MACH_LOONGSON=y | ||
20 | # CONFIG_MIPS_MALTA is not set | ||
21 | # CONFIG_MIPS_SIM is not set | ||
22 | # CONFIG_NEC_MARKEINS is not set | ||
23 | # CONFIG_MACH_VR41XX is not set | ||
24 | # CONFIG_NXP_STB220 is not set | ||
25 | # CONFIG_NXP_STB225 is not set | ||
26 | # CONFIG_PNX8550_JBS is not set | ||
27 | # CONFIG_PNX8550_STB810 is not set | ||
28 | # CONFIG_PMC_MSP is not set | ||
29 | # CONFIG_PMC_YOSEMITE is not set | ||
30 | # CONFIG_SGI_IP22 is not set | ||
31 | # CONFIG_SGI_IP27 is not set | ||
32 | # CONFIG_SGI_IP28 is not set | ||
33 | # CONFIG_SGI_IP32 is not set | ||
34 | # CONFIG_SIBYTE_CRHINE is not set | ||
35 | # CONFIG_SIBYTE_CARMEL is not set | ||
36 | # CONFIG_SIBYTE_CRHONE is not set | ||
37 | # CONFIG_SIBYTE_RHONE is not set | ||
38 | # CONFIG_SIBYTE_SWARM is not set | ||
39 | # CONFIG_SIBYTE_LITTLESUR is not set | ||
40 | # CONFIG_SIBYTE_SENTOSA is not set | ||
41 | # CONFIG_SIBYTE_BIGSUR is not set | ||
42 | # CONFIG_SNI_RM is not set | ||
43 | # CONFIG_MACH_TX39XX is not set | ||
44 | # CONFIG_MACH_TX49XX is not set | ||
45 | # CONFIG_MIKROTIK_RB532 is not set | ||
46 | # CONFIG_WR_PPMC is not set | ||
47 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set | ||
48 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set | ||
49 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set | ||
50 | CONFIG_ARCH_SPARSEMEM_ENABLE=y | ||
51 | # CONFIG_LEMOTE_FULOONG2E is not set | ||
52 | CONFIG_LEMOTE_MACH2F=y | ||
53 | CONFIG_CS5536=y | ||
54 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
55 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
56 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
57 | CONFIG_ARCH_SUPPORTS_OPROFILE=y | ||
58 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
59 | CONFIG_GENERIC_HWEIGHT=y | ||
60 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
61 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
62 | CONFIG_GENERIC_TIME=y | ||
63 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
64 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
65 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
66 | CONFIG_CEVT_R4K_LIB=y | ||
67 | CONFIG_CEVT_R4K=y | ||
68 | CONFIG_CSRC_R4K_LIB=y | ||
69 | CONFIG_CSRC_R4K=y | ||
70 | CONFIG_DMA_NONCOHERENT=y | ||
71 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | ||
72 | CONFIG_EARLY_PRINTK=y | ||
73 | CONFIG_SYS_HAS_EARLY_PRINTK=y | ||
74 | CONFIG_I8259=y | ||
75 | # CONFIG_NO_IOPORT is not set | ||
76 | CONFIG_GENERIC_ISA_DMA=y | ||
77 | CONFIG_GENERIC_ISA_DMA_SUPPORT_BROKEN=y | ||
78 | # CONFIG_CPU_BIG_ENDIAN is not set | ||
79 | CONFIG_CPU_LITTLE_ENDIAN=y | ||
80 | CONFIG_SYS_SUPPORTS_LITTLE_ENDIAN=y | ||
81 | CONFIG_IRQ_CPU=y | ||
82 | CONFIG_BOOT_ELF32=y | ||
83 | CONFIG_MIPS_L1_CACHE_SHIFT=5 | ||
84 | |||
85 | # | ||
86 | # CPU selection | ||
87 | # | ||
88 | # CONFIG_CPU_LOONGSON2E is not set | ||
89 | CONFIG_CPU_LOONGSON2F=y | ||
90 | # CONFIG_CPU_MIPS32_R1 is not set | ||
91 | # CONFIG_CPU_MIPS32_R2 is not set | ||
92 | # CONFIG_CPU_MIPS64_R1 is not set | ||
93 | # CONFIG_CPU_MIPS64_R2 is not set | ||
94 | # CONFIG_CPU_R3000 is not set | ||
95 | # CONFIG_CPU_TX39XX is not set | ||
96 | # CONFIG_CPU_VR41XX is not set | ||
97 | # CONFIG_CPU_R4300 is not set | ||
98 | # CONFIG_CPU_R4X00 is not set | ||
99 | # CONFIG_CPU_TX49XX is not set | ||
100 | # CONFIG_CPU_R5000 is not set | ||
101 | # CONFIG_CPU_R5432 is not set | ||
102 | # CONFIG_CPU_R5500 is not set | ||
103 | # CONFIG_CPU_R6000 is not set | ||
104 | # CONFIG_CPU_NEVADA is not set | ||
105 | # CONFIG_CPU_R8000 is not set | ||
106 | # CONFIG_CPU_R10000 is not set | ||
107 | # CONFIG_CPU_RM7000 is not set | ||
108 | # CONFIG_CPU_RM9000 is not set | ||
109 | # CONFIG_CPU_SB1 is not set | ||
110 | # CONFIG_CPU_CAVIUM_OCTEON is not set | ||
111 | CONFIG_SYS_SUPPORTS_ZBOOT=y | ||
112 | CONFIG_SYS_SUPPORTS_ZBOOT_UART16550=y | ||
113 | CONFIG_CPU_LOONGSON2=y | ||
114 | CONFIG_SYS_HAS_CPU_LOONGSON2F=y | ||
115 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | ||
116 | CONFIG_SYS_SUPPORTS_64BIT_KERNEL=y | ||
117 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y | ||
118 | CONFIG_CPU_SUPPORTS_64BIT_KERNEL=y | ||
119 | |||
120 | # | ||
121 | # Kernel type | ||
122 | # | ||
123 | # CONFIG_32BIT is not set | ||
124 | CONFIG_64BIT=y | ||
125 | # CONFIG_PAGE_SIZE_4KB is not set | ||
126 | # CONFIG_PAGE_SIZE_8KB is not set | ||
127 | CONFIG_PAGE_SIZE_16KB=y | ||
128 | # CONFIG_PAGE_SIZE_32KB is not set | ||
129 | # CONFIG_PAGE_SIZE_64KB is not set | ||
130 | CONFIG_BOARD_SCACHE=y | ||
131 | CONFIG_MIPS_MT_DISABLED=y | ||
132 | # CONFIG_MIPS_MT_SMP is not set | ||
133 | # CONFIG_MIPS_MT_SMTC is not set | ||
134 | CONFIG_CPU_HAS_WB=y | ||
135 | CONFIG_CPU_HAS_SYNC=y | ||
136 | CONFIG_GENERIC_HARDIRQS=y | ||
137 | CONFIG_GENERIC_IRQ_PROBE=y | ||
138 | CONFIG_CPU_SUPPORTS_HIGHMEM=y | ||
139 | CONFIG_SYS_SUPPORTS_HIGHMEM=y | ||
140 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
141 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
142 | CONFIG_SELECT_MEMORY_MODEL=y | ||
143 | # CONFIG_FLATMEM_MANUAL is not set | ||
144 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
145 | CONFIG_SPARSEMEM_MANUAL=y | ||
146 | CONFIG_SPARSEMEM=y | ||
147 | CONFIG_HAVE_MEMORY_PRESENT=y | ||
148 | CONFIG_SPARSEMEM_STATIC=y | ||
149 | |||
150 | # | ||
151 | # Memory hotplug is currently incompatible with Software Suspend | ||
152 | # | ||
153 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
154 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
155 | CONFIG_PHYS_ADDR_T_64BIT=y | ||
156 | CONFIG_ZONE_DMA_FLAG=0 | ||
157 | CONFIG_VIRT_TO_BUS=y | ||
158 | CONFIG_HAVE_MLOCK=y | ||
159 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
160 | # CONFIG_KSM is not set | ||
161 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
162 | CONFIG_TICK_ONESHOT=y | ||
163 | CONFIG_NO_HZ=y | ||
164 | CONFIG_HIGH_RES_TIMERS=y | ||
165 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
166 | # CONFIG_HZ_48 is not set | ||
167 | # CONFIG_HZ_100 is not set | ||
168 | # CONFIG_HZ_128 is not set | ||
169 | CONFIG_HZ_250=y | ||
170 | # CONFIG_HZ_256 is not set | ||
171 | # CONFIG_HZ_1000 is not set | ||
172 | # CONFIG_HZ_1024 is not set | ||
173 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y | ||
174 | CONFIG_HZ=250 | ||
175 | # CONFIG_PREEMPT_NONE is not set | ||
176 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
177 | CONFIG_PREEMPT=y | ||
178 | # CONFIG_KEXEC is not set | ||
179 | # CONFIG_SECCOMP is not set | ||
180 | CONFIG_LOCKDEP_SUPPORT=y | ||
181 | CONFIG_STACKTRACE_SUPPORT=y | ||
182 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
183 | CONFIG_CONSTRUCTORS=y | ||
184 | |||
185 | # | ||
186 | # General setup | ||
187 | # | ||
188 | CONFIG_EXPERIMENTAL=y | ||
189 | CONFIG_BROKEN_ON_SMP=y | ||
190 | CONFIG_LOCK_KERNEL=y | ||
191 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
192 | CONFIG_LOCALVERSION="" | ||
193 | # CONFIG_LOCALVERSION_AUTO is not set | ||
194 | CONFIG_HAVE_KERNEL_GZIP=y | ||
195 | CONFIG_HAVE_KERNEL_BZIP2=y | ||
196 | CONFIG_HAVE_KERNEL_LZMA=y | ||
197 | # CONFIG_KERNEL_GZIP is not set | ||
198 | # CONFIG_KERNEL_BZIP2 is not set | ||
199 | CONFIG_KERNEL_LZMA=y | ||
200 | CONFIG_SWAP=y | ||
201 | CONFIG_SYSVIPC=y | ||
202 | CONFIG_SYSVIPC_SYSCTL=y | ||
203 | # CONFIG_POSIX_MQUEUE is not set | ||
204 | CONFIG_BSD_PROCESS_ACCT=y | ||
205 | CONFIG_BSD_PROCESS_ACCT_V3=y | ||
206 | # CONFIG_TASKSTATS is not set | ||
207 | CONFIG_AUDIT=y | ||
208 | |||
209 | # | ||
210 | # RCU Subsystem | ||
211 | # | ||
212 | CONFIG_TREE_RCU=y | ||
213 | # CONFIG_TREE_PREEMPT_RCU is not set | ||
214 | # CONFIG_RCU_TRACE is not set | ||
215 | CONFIG_RCU_FANOUT=64 | ||
216 | # CONFIG_RCU_FANOUT_EXACT is not set | ||
217 | # CONFIG_TREE_RCU_TRACE is not set | ||
218 | CONFIG_IKCONFIG=y | ||
219 | CONFIG_IKCONFIG_PROC=y | ||
220 | CONFIG_LOG_BUF_SHIFT=15 | ||
221 | # CONFIG_GROUP_SCHED is not set | ||
222 | # CONFIG_CGROUPS is not set | ||
223 | CONFIG_SYSFS_DEPRECATED=y | ||
224 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
225 | # CONFIG_RELAY is not set | ||
226 | # CONFIG_NAMESPACES is not set | ||
227 | # CONFIG_BLK_DEV_INITRD is not set | ||
228 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
229 | CONFIG_SYSCTL=y | ||
230 | CONFIG_ANON_INODES=y | ||
231 | CONFIG_EMBEDDED=y | ||
232 | CONFIG_SYSCTL_SYSCALL=y | ||
233 | CONFIG_KALLSYMS=y | ||
234 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
235 | CONFIG_HOTPLUG=y | ||
236 | CONFIG_PRINTK=y | ||
237 | CONFIG_BUG=y | ||
238 | CONFIG_ELF_CORE=y | ||
239 | CONFIG_PCSPKR_PLATFORM=y | ||
240 | CONFIG_BASE_FULL=y | ||
241 | CONFIG_FUTEX=y | ||
242 | CONFIG_EPOLL=y | ||
243 | CONFIG_SIGNALFD=y | ||
244 | CONFIG_TIMERFD=y | ||
245 | CONFIG_EVENTFD=y | ||
246 | CONFIG_SHMEM=y | ||
247 | CONFIG_AIO=y | ||
248 | |||
249 | # | ||
250 | # Kernel Performance Events And Counters | ||
251 | # | ||
252 | CONFIG_VM_EVENT_COUNTERS=y | ||
253 | CONFIG_PCI_QUIRKS=y | ||
254 | CONFIG_SLUB_DEBUG=y | ||
255 | CONFIG_COMPAT_BRK=y | ||
256 | # CONFIG_SLAB is not set | ||
257 | CONFIG_SLUB=y | ||
258 | # CONFIG_SLOB is not set | ||
259 | # CONFIG_PROFILING is not set | ||
260 | CONFIG_HAVE_OPROFILE=y | ||
261 | CONFIG_HAVE_SYSCALL_WRAPPERS=y | ||
262 | |||
263 | # | ||
264 | # GCOV-based kernel profiling | ||
265 | # | ||
266 | # CONFIG_SLOW_WORK is not set | ||
267 | CONFIG_HAVE_GENERIC_DMA_COHERENT=y | ||
268 | CONFIG_SLABINFO=y | ||
269 | CONFIG_RT_MUTEXES=y | ||
270 | CONFIG_BASE_SMALL=0 | ||
271 | CONFIG_MODULES=y | ||
272 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
273 | CONFIG_MODULE_UNLOAD=y | ||
274 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
275 | CONFIG_MODVERSIONS=y | ||
276 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
277 | CONFIG_BLOCK=y | ||
278 | CONFIG_BLK_DEV_BSG=y | ||
279 | CONFIG_BLK_DEV_INTEGRITY=y | ||
280 | CONFIG_BLOCK_COMPAT=y | ||
281 | |||
282 | # | ||
283 | # IO Schedulers | ||
284 | # | ||
285 | CONFIG_IOSCHED_NOOP=y | ||
286 | CONFIG_IOSCHED_AS=y | ||
287 | CONFIG_IOSCHED_DEADLINE=y | ||
288 | CONFIG_IOSCHED_CFQ=y | ||
289 | # CONFIG_DEFAULT_AS is not set | ||
290 | # CONFIG_DEFAULT_DEADLINE is not set | ||
291 | CONFIG_DEFAULT_CFQ=y | ||
292 | # CONFIG_DEFAULT_NOOP is not set | ||
293 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
294 | CONFIG_FREEZER=y | ||
295 | |||
296 | # | ||
297 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | ||
298 | # | ||
299 | CONFIG_HW_HAS_PCI=y | ||
300 | CONFIG_PCI=y | ||
301 | CONFIG_PCI_DOMAINS=y | ||
302 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
303 | CONFIG_PCI_LEGACY=y | ||
304 | # CONFIG_PCI_STUB is not set | ||
305 | # CONFIG_PCI_IOV is not set | ||
306 | CONFIG_ISA=y | ||
307 | CONFIG_MMU=y | ||
308 | # CONFIG_PCCARD is not set | ||
309 | # CONFIG_HOTPLUG_PCI is not set | ||
310 | |||
311 | # | ||
312 | # Executable file formats | ||
313 | # | ||
314 | CONFIG_BINFMT_ELF=y | ||
315 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
316 | # CONFIG_HAVE_AOUT is not set | ||
317 | # CONFIG_BINFMT_MISC is not set | ||
318 | CONFIG_MIPS32_COMPAT=y | ||
319 | CONFIG_COMPAT=y | ||
320 | CONFIG_SYSVIPC_COMPAT=y | ||
321 | CONFIG_MIPS32_O32=y | ||
322 | CONFIG_MIPS32_N32=y | ||
323 | CONFIG_BINFMT_ELF32=y | ||
324 | |||
325 | # | ||
326 | # Power management options | ||
327 | # | ||
328 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
329 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
330 | CONFIG_PM=y | ||
331 | # CONFIG_PM_DEBUG is not set | ||
332 | CONFIG_PM_SLEEP=y | ||
333 | CONFIG_SUSPEND=y | ||
334 | CONFIG_SUSPEND_FREEZER=y | ||
335 | CONFIG_HIBERNATION_NVS=y | ||
336 | CONFIG_HIBERNATION=y | ||
337 | CONFIG_PM_STD_PARTITION="/dev/hda3" | ||
338 | # CONFIG_PM_RUNTIME is not set | ||
339 | CONFIG_NET=y | ||
340 | CONFIG_COMPAT_NETLINK_MESSAGES=y | ||
341 | |||
342 | # | ||
343 | # Networking options | ||
344 | # | ||
345 | CONFIG_PACKET=y | ||
346 | CONFIG_PACKET_MMAP=y | ||
347 | CONFIG_UNIX=y | ||
348 | CONFIG_XFRM=y | ||
349 | # CONFIG_XFRM_USER is not set | ||
350 | # CONFIG_XFRM_SUB_POLICY is not set | ||
351 | # CONFIG_XFRM_MIGRATE is not set | ||
352 | # CONFIG_XFRM_STATISTICS is not set | ||
353 | # CONFIG_NET_KEY is not set | ||
354 | CONFIG_INET=y | ||
355 | CONFIG_IP_MULTICAST=y | ||
356 | CONFIG_IP_ADVANCED_ROUTER=y | ||
357 | CONFIG_ASK_IP_FIB_HASH=y | ||
358 | # CONFIG_IP_FIB_TRIE is not set | ||
359 | CONFIG_IP_FIB_HASH=y | ||
360 | CONFIG_IP_MULTIPLE_TABLES=y | ||
361 | CONFIG_IP_ROUTE_MULTIPATH=y | ||
362 | CONFIG_IP_ROUTE_VERBOSE=y | ||
363 | # CONFIG_IP_PNP is not set | ||
364 | # CONFIG_NET_IPIP is not set | ||
365 | # CONFIG_NET_IPGRE is not set | ||
366 | CONFIG_IP_MROUTE=y | ||
367 | CONFIG_IP_PIMSM_V1=y | ||
368 | CONFIG_IP_PIMSM_V2=y | ||
369 | # CONFIG_ARPD is not set | ||
370 | CONFIG_SYN_COOKIES=y | ||
371 | # CONFIG_INET_AH is not set | ||
372 | # CONFIG_INET_ESP is not set | ||
373 | # CONFIG_INET_IPCOMP is not set | ||
374 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
375 | CONFIG_INET_TUNNEL=m | ||
376 | CONFIG_INET_XFRM_MODE_TRANSPORT=m | ||
377 | CONFIG_INET_XFRM_MODE_TUNNEL=m | ||
378 | CONFIG_INET_XFRM_MODE_BEET=m | ||
379 | CONFIG_INET_LRO=y | ||
380 | CONFIG_INET_DIAG=y | ||
381 | CONFIG_INET_TCP_DIAG=y | ||
382 | CONFIG_TCP_CONG_ADVANCED=y | ||
383 | CONFIG_TCP_CONG_BIC=y | ||
384 | CONFIG_TCP_CONG_CUBIC=y | ||
385 | CONFIG_TCP_CONG_WESTWOOD=m | ||
386 | CONFIG_TCP_CONG_HTCP=m | ||
387 | # CONFIG_TCP_CONG_HSTCP is not set | ||
388 | # CONFIG_TCP_CONG_HYBLA is not set | ||
389 | # CONFIG_TCP_CONG_VEGAS is not set | ||
390 | # CONFIG_TCP_CONG_SCALABLE is not set | ||
391 | # CONFIG_TCP_CONG_LP is not set | ||
392 | # CONFIG_TCP_CONG_VENO is not set | ||
393 | # CONFIG_TCP_CONG_YEAH is not set | ||
394 | # CONFIG_TCP_CONG_ILLINOIS is not set | ||
395 | CONFIG_DEFAULT_BIC=y | ||
396 | # CONFIG_DEFAULT_CUBIC is not set | ||
397 | # CONFIG_DEFAULT_HTCP is not set | ||
398 | # CONFIG_DEFAULT_VEGAS is not set | ||
399 | # CONFIG_DEFAULT_WESTWOOD is not set | ||
400 | # CONFIG_DEFAULT_RENO is not set | ||
401 | CONFIG_DEFAULT_TCP_CONG="bic" | ||
402 | # CONFIG_TCP_MD5SIG is not set | ||
403 | CONFIG_IPV6=m | ||
404 | CONFIG_IPV6_PRIVACY=y | ||
405 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
406 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
407 | # CONFIG_INET6_AH is not set | ||
408 | # CONFIG_INET6_ESP is not set | ||
409 | # CONFIG_INET6_IPCOMP is not set | ||
410 | # CONFIG_IPV6_MIP6 is not set | ||
411 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
412 | # CONFIG_INET6_TUNNEL is not set | ||
413 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
414 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
415 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
416 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
417 | CONFIG_IPV6_SIT=m | ||
418 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
419 | # CONFIG_IPV6_TUNNEL is not set | ||
420 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
421 | # CONFIG_IPV6_MROUTE is not set | ||
422 | CONFIG_NETWORK_SECMARK=y | ||
423 | CONFIG_NETFILTER=y | ||
424 | # CONFIG_NETFILTER_DEBUG is not set | ||
425 | CONFIG_NETFILTER_ADVANCED=y | ||
426 | |||
427 | # | ||
428 | # Core Netfilter Configuration | ||
429 | # | ||
430 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
431 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
432 | # CONFIG_NF_CONNTRACK is not set | ||
433 | # CONFIG_NETFILTER_XTABLES is not set | ||
434 | # CONFIG_IP_VS is not set | ||
435 | |||
436 | # | ||
437 | # IP: Netfilter Configuration | ||
438 | # | ||
439 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
440 | # CONFIG_IP_NF_QUEUE is not set | ||
441 | # CONFIG_IP_NF_IPTABLES is not set | ||
442 | # CONFIG_IP_NF_ARPTABLES is not set | ||
443 | |||
444 | # | ||
445 | # IPv6: Netfilter Configuration | ||
446 | # | ||
447 | # CONFIG_IP6_NF_QUEUE is not set | ||
448 | # CONFIG_IP6_NF_IPTABLES is not set | ||
449 | # CONFIG_IP_DCCP is not set | ||
450 | # CONFIG_IP_SCTP is not set | ||
451 | # CONFIG_RDS is not set | ||
452 | # CONFIG_TIPC is not set | ||
453 | # CONFIG_ATM is not set | ||
454 | # CONFIG_BRIDGE is not set | ||
455 | # CONFIG_NET_DSA is not set | ||
456 | # CONFIG_VLAN_8021Q is not set | ||
457 | # CONFIG_DECNET is not set | ||
458 | # CONFIG_LLC2 is not set | ||
459 | # CONFIG_IPX is not set | ||
460 | # CONFIG_ATALK is not set | ||
461 | # CONFIG_X25 is not set | ||
462 | # CONFIG_LAPB is not set | ||
463 | # CONFIG_ECONET is not set | ||
464 | # CONFIG_WAN_ROUTER is not set | ||
465 | # CONFIG_PHONET is not set | ||
466 | # CONFIG_IEEE802154 is not set | ||
467 | CONFIG_NET_SCHED=y | ||
468 | |||
469 | # | ||
470 | # Queueing/Scheduling | ||
471 | # | ||
472 | # CONFIG_NET_SCH_CBQ is not set | ||
473 | # CONFIG_NET_SCH_HTB is not set | ||
474 | # CONFIG_NET_SCH_HFSC is not set | ||
475 | # CONFIG_NET_SCH_PRIO is not set | ||
476 | # CONFIG_NET_SCH_MULTIQ is not set | ||
477 | # CONFIG_NET_SCH_RED is not set | ||
478 | # CONFIG_NET_SCH_SFQ is not set | ||
479 | # CONFIG_NET_SCH_TEQL is not set | ||
480 | # CONFIG_NET_SCH_TBF is not set | ||
481 | # CONFIG_NET_SCH_GRED is not set | ||
482 | # CONFIG_NET_SCH_DSMARK is not set | ||
483 | # CONFIG_NET_SCH_NETEM is not set | ||
484 | # CONFIG_NET_SCH_DRR is not set | ||
485 | # CONFIG_NET_SCH_INGRESS is not set | ||
486 | |||
487 | # | ||
488 | # Classification | ||
489 | # | ||
490 | CONFIG_NET_CLS=y | ||
491 | # CONFIG_NET_CLS_BASIC is not set | ||
492 | # CONFIG_NET_CLS_TCINDEX is not set | ||
493 | # CONFIG_NET_CLS_ROUTE4 is not set | ||
494 | # CONFIG_NET_CLS_FW is not set | ||
495 | # CONFIG_NET_CLS_U32 is not set | ||
496 | # CONFIG_NET_CLS_RSVP is not set | ||
497 | # CONFIG_NET_CLS_RSVP6 is not set | ||
498 | # CONFIG_NET_CLS_FLOW is not set | ||
499 | CONFIG_NET_EMATCH=y | ||
500 | CONFIG_NET_EMATCH_STACK=32 | ||
501 | # CONFIG_NET_EMATCH_CMP is not set | ||
502 | # CONFIG_NET_EMATCH_NBYTE is not set | ||
503 | # CONFIG_NET_EMATCH_U32 is not set | ||
504 | # CONFIG_NET_EMATCH_META is not set | ||
505 | # CONFIG_NET_EMATCH_TEXT is not set | ||
506 | CONFIG_NET_CLS_ACT=y | ||
507 | # CONFIG_NET_ACT_POLICE is not set | ||
508 | # CONFIG_NET_ACT_GACT is not set | ||
509 | # CONFIG_NET_ACT_MIRRED is not set | ||
510 | # CONFIG_NET_ACT_NAT is not set | ||
511 | # CONFIG_NET_ACT_PEDIT is not set | ||
512 | # CONFIG_NET_ACT_SIMP is not set | ||
513 | # CONFIG_NET_ACT_SKBEDIT is not set | ||
514 | CONFIG_NET_SCH_FIFO=y | ||
515 | # CONFIG_DCB is not set | ||
516 | |||
517 | # | ||
518 | # Network testing | ||
519 | # | ||
520 | # CONFIG_NET_PKTGEN is not set | ||
521 | # CONFIG_HAMRADIO is not set | ||
522 | # CONFIG_CAN is not set | ||
523 | # CONFIG_IRDA is not set | ||
524 | # CONFIG_BT is not set | ||
525 | # CONFIG_AF_RXRPC is not set | ||
526 | CONFIG_FIB_RULES=y | ||
527 | CONFIG_WIRELESS=y | ||
528 | # CONFIG_CFG80211 is not set | ||
529 | CONFIG_CFG80211_DEFAULT_PS_VALUE=0 | ||
530 | # CONFIG_WIRELESS_OLD_REGULATORY is not set | ||
531 | CONFIG_WIRELESS_EXT=y | ||
532 | CONFIG_WIRELESS_EXT_SYSFS=y | ||
533 | # CONFIG_LIB80211 is not set | ||
534 | |||
535 | # | ||
536 | # CFG80211 needs to be enabled for MAC80211 | ||
537 | # | ||
538 | # CONFIG_WIMAX is not set | ||
539 | CONFIG_RFKILL=m | ||
540 | # CONFIG_RFKILL_INPUT is not set | ||
541 | # CONFIG_NET_9P is not set | ||
542 | |||
543 | # | ||
544 | # Device Drivers | ||
545 | # | ||
546 | |||
547 | # | ||
548 | # Generic Driver Options | ||
549 | # | ||
550 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
551 | # CONFIG_DEVTMPFS is not set | ||
552 | CONFIG_STANDALONE=y | ||
553 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
554 | CONFIG_FW_LOADER=y | ||
555 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
556 | CONFIG_EXTRA_FIRMWARE="" | ||
557 | # CONFIG_SYS_HYPERVISOR is not set | ||
558 | # CONFIG_CONNECTOR is not set | ||
559 | # CONFIG_MTD is not set | ||
560 | # CONFIG_PARPORT is not set | ||
561 | # CONFIG_PNP is not set | ||
562 | CONFIG_BLK_DEV=y | ||
563 | # CONFIG_BLK_CPQ_DA is not set | ||
564 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
565 | # CONFIG_BLK_DEV_DAC960 is not set | ||
566 | # CONFIG_BLK_DEV_UMEM is not set | ||
567 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
568 | CONFIG_BLK_DEV_LOOP=y | ||
569 | CONFIG_BLK_DEV_CRYPTOLOOP=y | ||
570 | # CONFIG_BLK_DEV_NBD is not set | ||
571 | # CONFIG_BLK_DEV_SX8 is not set | ||
572 | # CONFIG_BLK_DEV_UB is not set | ||
573 | CONFIG_BLK_DEV_RAM=y | ||
574 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
575 | CONFIG_BLK_DEV_RAM_SIZE=8192 | ||
576 | # CONFIG_BLK_DEV_XIP is not set | ||
577 | # CONFIG_CDROM_PKTCDVD is not set | ||
578 | # CONFIG_ATA_OVER_ETH is not set | ||
579 | # CONFIG_BLK_DEV_HD is not set | ||
580 | CONFIG_MISC_DEVICES=y | ||
581 | # CONFIG_PHANTOM is not set | ||
582 | # CONFIG_SGI_IOC4 is not set | ||
583 | # CONFIG_TIFM_CORE is not set | ||
584 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
585 | # CONFIG_HP_ILO is not set | ||
586 | # CONFIG_C2PORT is not set | ||
587 | |||
588 | # | ||
589 | # EEPROM support | ||
590 | # | ||
591 | # CONFIG_EEPROM_93CX6 is not set | ||
592 | # CONFIG_CB710_CORE is not set | ||
593 | CONFIG_HAVE_IDE=y | ||
594 | CONFIG_IDE=y | ||
595 | |||
596 | # | ||
597 | # Please see Documentation/ide/ide.txt for help/info on IDE drives | ||
598 | # | ||
599 | CONFIG_IDE_XFER_MODE=y | ||
600 | CONFIG_IDE_TIMINGS=y | ||
601 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
602 | CONFIG_IDE_GD=y | ||
603 | CONFIG_IDE_GD_ATA=y | ||
604 | # CONFIG_IDE_GD_ATAPI is not set | ||
605 | # CONFIG_BLK_DEV_IDECD is not set | ||
606 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
607 | CONFIG_IDE_TASK_IOCTL=y | ||
608 | CONFIG_IDE_PROC_FS=y | ||
609 | |||
610 | # | ||
611 | # IDE chipset support/bugfixes | ||
612 | # | ||
613 | # CONFIG_IDE_GENERIC is not set | ||
614 | # CONFIG_BLK_DEV_PLATFORM is not set | ||
615 | CONFIG_BLK_DEV_IDEDMA_SFF=y | ||
616 | |||
617 | # | ||
618 | # PCI IDE chipsets support | ||
619 | # | ||
620 | CONFIG_BLK_DEV_IDEPCI=y | ||
621 | # CONFIG_IDEPCI_PCIBUS_ORDER is not set | ||
622 | # CONFIG_BLK_DEV_OFFBOARD is not set | ||
623 | CONFIG_BLK_DEV_GENERIC=y | ||
624 | # CONFIG_BLK_DEV_OPTI621 is not set | ||
625 | CONFIG_BLK_DEV_IDEDMA_PCI=y | ||
626 | # CONFIG_BLK_DEV_AEC62XX is not set | ||
627 | # CONFIG_BLK_DEV_ALI15X3 is not set | ||
628 | CONFIG_BLK_DEV_AMD74XX=y | ||
629 | # CONFIG_BLK_DEV_CMD64X is not set | ||
630 | # CONFIG_BLK_DEV_TRIFLEX is not set | ||
631 | # CONFIG_BLK_DEV_CS5520 is not set | ||
632 | # CONFIG_BLK_DEV_CS5530 is not set | ||
633 | # CONFIG_BLK_DEV_HPT366 is not set | ||
634 | # CONFIG_BLK_DEV_JMICRON is not set | ||
635 | # CONFIG_BLK_DEV_SC1200 is not set | ||
636 | # CONFIG_BLK_DEV_PIIX is not set | ||
637 | # CONFIG_BLK_DEV_IT8172 is not set | ||
638 | # CONFIG_BLK_DEV_IT8213 is not set | ||
639 | # CONFIG_BLK_DEV_IT821X is not set | ||
640 | # CONFIG_BLK_DEV_NS87415 is not set | ||
641 | # CONFIG_BLK_DEV_PDC202XX_OLD is not set | ||
642 | # CONFIG_BLK_DEV_PDC202XX_NEW is not set | ||
643 | # CONFIG_BLK_DEV_SVWKS is not set | ||
644 | # CONFIG_BLK_DEV_SIIMAGE is not set | ||
645 | # CONFIG_BLK_DEV_SLC90E66 is not set | ||
646 | # CONFIG_BLK_DEV_TRM290 is not set | ||
647 | # CONFIG_BLK_DEV_VIA82CXXX is not set | ||
648 | # CONFIG_BLK_DEV_TC86C001 is not set | ||
649 | |||
650 | # | ||
651 | # Other IDE chipsets support | ||
652 | # | ||
653 | |||
654 | # | ||
655 | # Note: most of these also require special kernel boot parameters | ||
656 | # | ||
657 | # CONFIG_BLK_DEV_4DRIVES is not set | ||
658 | # CONFIG_BLK_DEV_ALI14XX is not set | ||
659 | # CONFIG_BLK_DEV_DTC2278 is not set | ||
660 | # CONFIG_BLK_DEV_HT6560B is not set | ||
661 | # CONFIG_BLK_DEV_QD65XX is not set | ||
662 | # CONFIG_BLK_DEV_UMC8672 is not set | ||
663 | CONFIG_BLK_DEV_IDEDMA=y | ||
664 | |||
665 | # | ||
666 | # SCSI device support | ||
667 | # | ||
668 | # CONFIG_RAID_ATTRS is not set | ||
669 | CONFIG_SCSI=m | ||
670 | CONFIG_SCSI_DMA=y | ||
671 | # CONFIG_SCSI_TGT is not set | ||
672 | # CONFIG_SCSI_NETLINK is not set | ||
673 | CONFIG_SCSI_PROC_FS=y | ||
674 | |||
675 | # | ||
676 | # SCSI support type (disk, tape, CD-ROM) | ||
677 | # | ||
678 | CONFIG_BLK_DEV_SD=m | ||
679 | # CONFIG_CHR_DEV_ST is not set | ||
680 | # CONFIG_CHR_DEV_OSST is not set | ||
681 | # CONFIG_BLK_DEV_SR is not set | ||
682 | CONFIG_CHR_DEV_SG=m | ||
683 | # CONFIG_CHR_DEV_SCH is not set | ||
684 | CONFIG_SCSI_MULTI_LUN=y | ||
685 | # CONFIG_SCSI_CONSTANTS is not set | ||
686 | # CONFIG_SCSI_LOGGING is not set | ||
687 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
688 | CONFIG_SCSI_WAIT_SCAN=m | ||
689 | |||
690 | # | ||
691 | # SCSI Transports | ||
692 | # | ||
693 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
694 | # CONFIG_SCSI_FC_ATTRS is not set | ||
695 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
696 | # CONFIG_SCSI_SAS_ATTRS is not set | ||
697 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
698 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
699 | # CONFIG_SCSI_LOWLEVEL is not set | ||
700 | # CONFIG_SCSI_DH is not set | ||
701 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
702 | # CONFIG_ATA is not set | ||
703 | # CONFIG_MD is not set | ||
704 | # CONFIG_FUSION is not set | ||
705 | |||
706 | # | ||
707 | # IEEE 1394 (FireWire) support | ||
708 | # | ||
709 | |||
710 | # | ||
711 | # You can enable one or both FireWire driver stacks. | ||
712 | # | ||
713 | |||
714 | # | ||
715 | # See the help texts for more information. | ||
716 | # | ||
717 | # CONFIG_FIREWIRE is not set | ||
718 | # CONFIG_IEEE1394 is not set | ||
719 | # CONFIG_I2O is not set | ||
720 | CONFIG_NETDEVICES=y | ||
721 | # CONFIG_IFB is not set | ||
722 | # CONFIG_DUMMY is not set | ||
723 | # CONFIG_BONDING is not set | ||
724 | # CONFIG_MACVLAN is not set | ||
725 | # CONFIG_EQUALIZER is not set | ||
726 | # CONFIG_TUN is not set | ||
727 | # CONFIG_VETH is not set | ||
728 | # CONFIG_ARCNET is not set | ||
729 | # CONFIG_PHYLIB is not set | ||
730 | CONFIG_NET_ETHERNET=y | ||
731 | CONFIG_MII=y | ||
732 | # CONFIG_AX88796 is not set | ||
733 | # CONFIG_HAPPYMEAL is not set | ||
734 | # CONFIG_SUNGEM is not set | ||
735 | # CONFIG_CASSINI is not set | ||
736 | # CONFIG_NET_VENDOR_3COM is not set | ||
737 | # CONFIG_NET_VENDOR_SMC is not set | ||
738 | # CONFIG_SMC91X is not set | ||
739 | # CONFIG_DM9000 is not set | ||
740 | # CONFIG_ETHOC is not set | ||
741 | # CONFIG_NET_VENDOR_RACAL is not set | ||
742 | # CONFIG_DNET is not set | ||
743 | # CONFIG_NET_TULIP is not set | ||
744 | # CONFIG_AT1700 is not set | ||
745 | # CONFIG_DEPCA is not set | ||
746 | # CONFIG_HP100 is not set | ||
747 | # CONFIG_NET_ISA is not set | ||
748 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
749 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
750 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
751 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
752 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
753 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
754 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
755 | CONFIG_NET_PCI=y | ||
756 | # CONFIG_PCNET32 is not set | ||
757 | # CONFIG_AMD8111_ETH is not set | ||
758 | # CONFIG_ADAPTEC_STARFIRE is not set | ||
759 | # CONFIG_AC3200 is not set | ||
760 | # CONFIG_APRICOT is not set | ||
761 | # CONFIG_B44 is not set | ||
762 | # CONFIG_FORCEDETH is not set | ||
763 | # CONFIG_CS89x0 is not set | ||
764 | # CONFIG_TC35815 is not set | ||
765 | # CONFIG_E100 is not set | ||
766 | # CONFIG_FEALNX is not set | ||
767 | # CONFIG_NATSEMI is not set | ||
768 | # CONFIG_NE2K_PCI is not set | ||
769 | # CONFIG_8139CP is not set | ||
770 | CONFIG_8139TOO=y | ||
771 | # CONFIG_8139TOO_PIO is not set | ||
772 | CONFIG_8139TOO_TUNE_TWISTER=y | ||
773 | # CONFIG_8139TOO_8129 is not set | ||
774 | # CONFIG_8139_OLD_RX_RESET is not set | ||
775 | # CONFIG_R6040 is not set | ||
776 | # CONFIG_SIS900 is not set | ||
777 | # CONFIG_EPIC100 is not set | ||
778 | # CONFIG_SMSC9420 is not set | ||
779 | # CONFIG_SUNDANCE is not set | ||
780 | # CONFIG_TLAN is not set | ||
781 | # CONFIG_KS8842 is not set | ||
782 | # CONFIG_KS8851_MLL is not set | ||
783 | # CONFIG_VIA_RHINE is not set | ||
784 | # CONFIG_SC92031 is not set | ||
785 | # CONFIG_ATL2 is not set | ||
786 | CONFIG_NETDEV_1000=y | ||
787 | # CONFIG_ACENIC is not set | ||
788 | # CONFIG_DL2K is not set | ||
789 | # CONFIG_E1000 is not set | ||
790 | # CONFIG_E1000E is not set | ||
791 | # CONFIG_IP1000 is not set | ||
792 | # CONFIG_IGB is not set | ||
793 | # CONFIG_IGBVF is not set | ||
794 | # CONFIG_NS83820 is not set | ||
795 | # CONFIG_HAMACHI is not set | ||
796 | # CONFIG_YELLOWFIN is not set | ||
797 | CONFIG_R8169=y | ||
798 | # CONFIG_SIS190 is not set | ||
799 | # CONFIG_SKGE is not set | ||
800 | # CONFIG_SKY2 is not set | ||
801 | # CONFIG_VIA_VELOCITY is not set | ||
802 | # CONFIG_TIGON3 is not set | ||
803 | # CONFIG_BNX2 is not set | ||
804 | # CONFIG_CNIC is not set | ||
805 | # CONFIG_QLA3XXX is not set | ||
806 | # CONFIG_ATL1 is not set | ||
807 | # CONFIG_ATL1E is not set | ||
808 | # CONFIG_ATL1C is not set | ||
809 | # CONFIG_JME is not set | ||
810 | # CONFIG_NETDEV_10000 is not set | ||
811 | # CONFIG_TR is not set | ||
812 | CONFIG_WLAN=y | ||
813 | CONFIG_WLAN_PRE80211=y | ||
814 | # CONFIG_STRIP is not set | ||
815 | # CONFIG_WAVELAN is not set | ||
816 | CONFIG_WLAN_80211=y | ||
817 | # CONFIG_LIBERTAS is not set | ||
818 | # CONFIG_ATMEL is not set | ||
819 | # CONFIG_PRISM54 is not set | ||
820 | # CONFIG_USB_ZD1201 is not set | ||
821 | # CONFIG_HOSTAP is not set | ||
822 | |||
823 | # | ||
824 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
825 | # | ||
826 | |||
827 | # | ||
828 | # USB Network Adapters | ||
829 | # | ||
830 | # CONFIG_USB_CATC is not set | ||
831 | # CONFIG_USB_KAWETH is not set | ||
832 | # CONFIG_USB_PEGASUS is not set | ||
833 | # CONFIG_USB_RTL8150 is not set | ||
834 | # CONFIG_USB_USBNET is not set | ||
835 | # CONFIG_USB_HSO is not set | ||
836 | # CONFIG_WAN is not set | ||
837 | # CONFIG_FDDI is not set | ||
838 | # CONFIG_HIPPI is not set | ||
839 | # CONFIG_PPP is not set | ||
840 | # CONFIG_SLIP is not set | ||
841 | # CONFIG_NET_FC is not set | ||
842 | # CONFIG_NETCONSOLE is not set | ||
843 | # CONFIG_NETPOLL is not set | ||
844 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
845 | # CONFIG_ISDN is not set | ||
846 | # CONFIG_PHONE is not set | ||
847 | |||
848 | # | ||
849 | # Input device support | ||
850 | # | ||
851 | CONFIG_INPUT=y | ||
852 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
853 | # CONFIG_INPUT_POLLDEV is not set | ||
854 | |||
855 | # | ||
856 | # Userland interfaces | ||
857 | # | ||
858 | CONFIG_INPUT_MOUSEDEV=y | ||
859 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
860 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
861 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
862 | # CONFIG_INPUT_JOYDEV is not set | ||
863 | CONFIG_INPUT_EVDEV=y | ||
864 | # CONFIG_INPUT_EVBUG is not set | ||
865 | |||
866 | # | ||
867 | # Input Device Drivers | ||
868 | # | ||
869 | CONFIG_INPUT_KEYBOARD=y | ||
870 | CONFIG_KEYBOARD_ATKBD=y | ||
871 | # CONFIG_KEYBOARD_LKKBD is not set | ||
872 | # CONFIG_KEYBOARD_NEWTON is not set | ||
873 | # CONFIG_KEYBOARD_OPENCORES is not set | ||
874 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
875 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
876 | # CONFIG_KEYBOARD_XTKBD is not set | ||
877 | CONFIG_INPUT_MOUSE=y | ||
878 | CONFIG_MOUSE_PS2=y | ||
879 | # CONFIG_MOUSE_PS2_ALPS is not set | ||
880 | # CONFIG_MOUSE_PS2_LOGIPS2PP is not set | ||
881 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
882 | # CONFIG_MOUSE_PS2_TRACKPOINT is not set | ||
883 | # CONFIG_MOUSE_PS2_ELANTECH is not set | ||
884 | # CONFIG_MOUSE_PS2_SENTELIC is not set | ||
885 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
886 | # CONFIG_MOUSE_SERIAL is not set | ||
887 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
888 | # CONFIG_MOUSE_BCM5974 is not set | ||
889 | # CONFIG_MOUSE_INPORT is not set | ||
890 | # CONFIG_MOUSE_LOGIBM is not set | ||
891 | # CONFIG_MOUSE_PC110PAD is not set | ||
892 | # CONFIG_MOUSE_VSXXXAA is not set | ||
893 | # CONFIG_INPUT_JOYSTICK is not set | ||
894 | # CONFIG_INPUT_TABLET is not set | ||
895 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
896 | # CONFIG_INPUT_MISC is not set | ||
897 | |||
898 | # | ||
899 | # Hardware I/O ports | ||
900 | # | ||
901 | CONFIG_SERIO=y | ||
902 | CONFIG_SERIO_I8042=y | ||
903 | # CONFIG_SERIO_SERPORT is not set | ||
904 | # CONFIG_SERIO_PCIPS2 is not set | ||
905 | CONFIG_SERIO_LIBPS2=y | ||
906 | # CONFIG_SERIO_RAW is not set | ||
907 | # CONFIG_GAMEPORT is not set | ||
908 | |||
909 | # | ||
910 | # Character devices | ||
911 | # | ||
912 | CONFIG_VT=y | ||
913 | CONFIG_CONSOLE_TRANSLATIONS=y | ||
914 | CONFIG_VT_CONSOLE=y | ||
915 | CONFIG_HW_CONSOLE=y | ||
916 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
917 | CONFIG_DEVKMEM=y | ||
918 | CONFIG_SERIAL_NONSTANDARD=y | ||
919 | # CONFIG_COMPUTONE is not set | ||
920 | # CONFIG_ROCKETPORT is not set | ||
921 | # CONFIG_CYCLADES is not set | ||
922 | # CONFIG_DIGIEPCA is not set | ||
923 | # CONFIG_MOXA_INTELLIO is not set | ||
924 | # CONFIG_MOXA_SMARTIO is not set | ||
925 | # CONFIG_ISI is not set | ||
926 | # CONFIG_SYNCLINKMP is not set | ||
927 | # CONFIG_SYNCLINK_GT is not set | ||
928 | # CONFIG_N_HDLC is not set | ||
929 | # CONFIG_RISCOM8 is not set | ||
930 | # CONFIG_SPECIALIX is not set | ||
931 | # CONFIG_STALDRV is not set | ||
932 | # CONFIG_NOZOMI is not set | ||
933 | |||
934 | # | ||
935 | # Serial drivers | ||
936 | # | ||
937 | CONFIG_SERIAL_8250=y | ||
938 | CONFIG_SERIAL_8250_CONSOLE=y | ||
939 | # CONFIG_SERIAL_8250_PCI is not set | ||
940 | CONFIG_SERIAL_8250_NR_UARTS=16 | ||
941 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
942 | CONFIG_SERIAL_8250_EXTENDED=y | ||
943 | CONFIG_SERIAL_8250_MANY_PORTS=y | ||
944 | CONFIG_SERIAL_8250_FOURPORT=y | ||
945 | # CONFIG_SERIAL_8250_ACCENT is not set | ||
946 | # CONFIG_SERIAL_8250_BOCA is not set | ||
947 | # CONFIG_SERIAL_8250_EXAR_ST16C554 is not set | ||
948 | # CONFIG_SERIAL_8250_HUB6 is not set | ||
949 | # CONFIG_SERIAL_8250_SHARE_IRQ is not set | ||
950 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
951 | # CONFIG_SERIAL_8250_RSA is not set | ||
952 | |||
953 | # | ||
954 | # Non-8250 serial port support | ||
955 | # | ||
956 | CONFIG_SERIAL_CORE=y | ||
957 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
958 | # CONFIG_SERIAL_JSM is not set | ||
959 | CONFIG_UNIX98_PTYS=y | ||
960 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
961 | CONFIG_LEGACY_PTYS=y | ||
962 | CONFIG_LEGACY_PTY_COUNT=16 | ||
963 | # CONFIG_IPMI_HANDLER is not set | ||
964 | CONFIG_HW_RANDOM=y | ||
965 | # CONFIG_HW_RANDOM_TIMERIOMEM is not set | ||
966 | CONFIG_RTC=y | ||
967 | # CONFIG_DTLK is not set | ||
968 | # CONFIG_R3964 is not set | ||
969 | # CONFIG_APPLICOM is not set | ||
970 | # CONFIG_RAW_DRIVER is not set | ||
971 | # CONFIG_TCG_TPM is not set | ||
972 | CONFIG_DEVPORT=y | ||
973 | # CONFIG_I2C is not set | ||
974 | # CONFIG_SPI is not set | ||
975 | |||
976 | # | ||
977 | # PPS support | ||
978 | # | ||
979 | # CONFIG_PPS is not set | ||
980 | # CONFIG_W1 is not set | ||
981 | # CONFIG_POWER_SUPPLY is not set | ||
982 | CONFIG_HWMON=y | ||
983 | # CONFIG_HWMON_VID is not set | ||
984 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
985 | |||
986 | # | ||
987 | # Native drivers | ||
988 | # | ||
989 | # CONFIG_SENSORS_I5K_AMB is not set | ||
990 | # CONFIG_SENSORS_F71805F is not set | ||
991 | # CONFIG_SENSORS_F71882FG is not set | ||
992 | # CONFIG_SENSORS_IT87 is not set | ||
993 | # CONFIG_SENSORS_PC87360 is not set | ||
994 | # CONFIG_SENSORS_PC87427 is not set | ||
995 | # CONFIG_SENSORS_SIS5595 is not set | ||
996 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
997 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
998 | # CONFIG_SENSORS_VIA686A is not set | ||
999 | # CONFIG_SENSORS_VT1211 is not set | ||
1000 | # CONFIG_SENSORS_VT8231 is not set | ||
1001 | # CONFIG_SENSORS_W83627HF is not set | ||
1002 | # CONFIG_SENSORS_W83627EHF is not set | ||
1003 | CONFIG_THERMAL=y | ||
1004 | # CONFIG_THERMAL_HWMON is not set | ||
1005 | # CONFIG_WATCHDOG is not set | ||
1006 | CONFIG_SSB_POSSIBLE=y | ||
1007 | |||
1008 | # | ||
1009 | # Sonics Silicon Backplane | ||
1010 | # | ||
1011 | # CONFIG_SSB is not set | ||
1012 | |||
1013 | # | ||
1014 | # Multifunction device drivers | ||
1015 | # | ||
1016 | # CONFIG_MFD_CORE is not set | ||
1017 | # CONFIG_MFD_SM501 is not set | ||
1018 | # CONFIG_HTC_PASIC3 is not set | ||
1019 | # CONFIG_MFD_TMIO is not set | ||
1020 | # CONFIG_REGULATOR is not set | ||
1021 | CONFIG_MEDIA_SUPPORT=m | ||
1022 | |||
1023 | # | ||
1024 | # Multimedia core support | ||
1025 | # | ||
1026 | CONFIG_VIDEO_DEV=m | ||
1027 | CONFIG_VIDEO_V4L2_COMMON=m | ||
1028 | CONFIG_VIDEO_ALLOW_V4L1=y | ||
1029 | CONFIG_VIDEO_V4L1_COMPAT=y | ||
1030 | # CONFIG_DVB_CORE is not set | ||
1031 | CONFIG_VIDEO_MEDIA=m | ||
1032 | |||
1033 | # | ||
1034 | # Multimedia drivers | ||
1035 | # | ||
1036 | # CONFIG_MEDIA_ATTACH is not set | ||
1037 | CONFIG_VIDEO_V4L2=m | ||
1038 | CONFIG_VIDEO_V4L1=m | ||
1039 | CONFIG_VIDEO_CAPTURE_DRIVERS=y | ||
1040 | # CONFIG_VIDEO_ADV_DEBUG is not set | ||
1041 | # CONFIG_VIDEO_FIXED_MINOR_RANGES is not set | ||
1042 | CONFIG_VIDEO_HELPER_CHIPS_AUTO=y | ||
1043 | # CONFIG_VIDEO_VIVI is not set | ||
1044 | # CONFIG_VIDEO_PMS is not set | ||
1045 | # CONFIG_VIDEO_CPIA is not set | ||
1046 | # CONFIG_VIDEO_CPIA2 is not set | ||
1047 | # CONFIG_VIDEO_STRADIS is not set | ||
1048 | CONFIG_V4L_USB_DRIVERS=y | ||
1049 | CONFIG_USB_VIDEO_CLASS=m | ||
1050 | CONFIG_USB_VIDEO_CLASS_INPUT_EVDEV=y | ||
1051 | CONFIG_USB_GSPCA=m | ||
1052 | # CONFIG_USB_M5602 is not set | ||
1053 | # CONFIG_USB_STV06XX is not set | ||
1054 | # CONFIG_USB_GL860 is not set | ||
1055 | # CONFIG_USB_GSPCA_CONEX is not set | ||
1056 | # CONFIG_USB_GSPCA_ETOMS is not set | ||
1057 | # CONFIG_USB_GSPCA_FINEPIX is not set | ||
1058 | # CONFIG_USB_GSPCA_JEILINJ is not set | ||
1059 | # CONFIG_USB_GSPCA_MARS is not set | ||
1060 | # CONFIG_USB_GSPCA_MR97310A is not set | ||
1061 | # CONFIG_USB_GSPCA_OV519 is not set | ||
1062 | # CONFIG_USB_GSPCA_OV534 is not set | ||
1063 | # CONFIG_USB_GSPCA_PAC207 is not set | ||
1064 | # CONFIG_USB_GSPCA_PAC7311 is not set | ||
1065 | # CONFIG_USB_GSPCA_SN9C20X is not set | ||
1066 | # CONFIG_USB_GSPCA_SONIXB is not set | ||
1067 | # CONFIG_USB_GSPCA_SONIXJ is not set | ||
1068 | # CONFIG_USB_GSPCA_SPCA500 is not set | ||
1069 | # CONFIG_USB_GSPCA_SPCA501 is not set | ||
1070 | # CONFIG_USB_GSPCA_SPCA505 is not set | ||
1071 | # CONFIG_USB_GSPCA_SPCA506 is not set | ||
1072 | # CONFIG_USB_GSPCA_SPCA508 is not set | ||
1073 | # CONFIG_USB_GSPCA_SPCA561 is not set | ||
1074 | # CONFIG_USB_GSPCA_SQ905 is not set | ||
1075 | # CONFIG_USB_GSPCA_SQ905C is not set | ||
1076 | # CONFIG_USB_GSPCA_STK014 is not set | ||
1077 | # CONFIG_USB_GSPCA_SUNPLUS is not set | ||
1078 | # CONFIG_USB_GSPCA_T613 is not set | ||
1079 | # CONFIG_USB_GSPCA_TV8532 is not set | ||
1080 | # CONFIG_USB_GSPCA_VC032X is not set | ||
1081 | # CONFIG_USB_GSPCA_ZC3XX is not set | ||
1082 | # CONFIG_VIDEO_HDPVR is not set | ||
1083 | # CONFIG_USB_VICAM is not set | ||
1084 | # CONFIG_USB_IBMCAM is not set | ||
1085 | # CONFIG_USB_KONICAWC is not set | ||
1086 | # CONFIG_USB_QUICKCAM_MESSENGER is not set | ||
1087 | # CONFIG_USB_ET61X251 is not set | ||
1088 | # CONFIG_USB_OV511 is not set | ||
1089 | # CONFIG_USB_SE401 is not set | ||
1090 | # CONFIG_USB_SN9C102 is not set | ||
1091 | # CONFIG_USB_STV680 is not set | ||
1092 | # CONFIG_USB_ZC0301 is not set | ||
1093 | # CONFIG_USB_PWC is not set | ||
1094 | CONFIG_USB_PWC_INPUT_EVDEV=y | ||
1095 | # CONFIG_USB_ZR364XX is not set | ||
1096 | # CONFIG_USB_STKWEBCAM is not set | ||
1097 | # CONFIG_USB_S2255 is not set | ||
1098 | # CONFIG_RADIO_ADAPTERS is not set | ||
1099 | # CONFIG_DAB is not set | ||
1100 | |||
1101 | # | ||
1102 | # Graphics support | ||
1103 | # | ||
1104 | CONFIG_VGA_ARB=y | ||
1105 | # CONFIG_DRM is not set | ||
1106 | # CONFIG_VGASTATE is not set | ||
1107 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
1108 | CONFIG_FB=y | ||
1109 | CONFIG_FIRMWARE_EDID=y | ||
1110 | # CONFIG_FB_DDC is not set | ||
1111 | CONFIG_FB_BOOT_VESA_SUPPORT=y | ||
1112 | CONFIG_FB_CFB_FILLRECT=y | ||
1113 | CONFIG_FB_CFB_COPYAREA=y | ||
1114 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
1115 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
1116 | # CONFIG_FB_SYS_FILLRECT is not set | ||
1117 | # CONFIG_FB_SYS_COPYAREA is not set | ||
1118 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
1119 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
1120 | # CONFIG_FB_SYS_FOPS is not set | ||
1121 | # CONFIG_FB_SVGALIB is not set | ||
1122 | # CONFIG_FB_MACMODES is not set | ||
1123 | # CONFIG_FB_BACKLIGHT is not set | ||
1124 | CONFIG_FB_MODE_HELPERS=y | ||
1125 | CONFIG_FB_TILEBLITTING=y | ||
1126 | |||
1127 | # | ||
1128 | # Frame buffer hardware drivers | ||
1129 | # | ||
1130 | # CONFIG_FB_CIRRUS is not set | ||
1131 | # CONFIG_FB_PM2 is not set | ||
1132 | # CONFIG_FB_CYBER2000 is not set | ||
1133 | # CONFIG_FB_ASILIANT is not set | ||
1134 | # CONFIG_FB_IMSTT is not set | ||
1135 | # CONFIG_FB_S1D13XXX is not set | ||
1136 | # CONFIG_FB_NVIDIA is not set | ||
1137 | # CONFIG_FB_RIVA is not set | ||
1138 | # CONFIG_FB_MATROX is not set | ||
1139 | # CONFIG_FB_RADEON is not set | ||
1140 | # CONFIG_FB_ATY128 is not set | ||
1141 | # CONFIG_FB_ATY is not set | ||
1142 | # CONFIG_FB_S3 is not set | ||
1143 | # CONFIG_FB_SAVAGE is not set | ||
1144 | CONFIG_FB_SIS=y | ||
1145 | CONFIG_FB_SIS_300=y | ||
1146 | CONFIG_FB_SIS_315=y | ||
1147 | # CONFIG_FB_VIA is not set | ||
1148 | # CONFIG_FB_NEOMAGIC is not set | ||
1149 | # CONFIG_FB_KYRO is not set | ||
1150 | # CONFIG_FB_3DFX is not set | ||
1151 | # CONFIG_FB_VOODOO1 is not set | ||
1152 | # CONFIG_FB_VT8623 is not set | ||
1153 | # CONFIG_FB_TRIDENT is not set | ||
1154 | # CONFIG_FB_ARK is not set | ||
1155 | # CONFIG_FB_PM3 is not set | ||
1156 | # CONFIG_FB_CARMINE is not set | ||
1157 | # CONFIG_FB_VIRTUAL is not set | ||
1158 | # CONFIG_FB_METRONOME is not set | ||
1159 | # CONFIG_FB_MB862XX is not set | ||
1160 | # CONFIG_FB_BROADSHEET is not set | ||
1161 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
1162 | # CONFIG_LCD_CLASS_DEVICE is not set | ||
1163 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
1164 | CONFIG_BACKLIGHT_GENERIC=y | ||
1165 | |||
1166 | # | ||
1167 | # Display device support | ||
1168 | # | ||
1169 | # CONFIG_DISPLAY_SUPPORT is not set | ||
1170 | |||
1171 | # | ||
1172 | # Console display driver support | ||
1173 | # | ||
1174 | # CONFIG_VGA_CONSOLE is not set | ||
1175 | # CONFIG_MDA_CONSOLE is not set | ||
1176 | CONFIG_DUMMY_CONSOLE=y | ||
1177 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
1178 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
1179 | CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y | ||
1180 | CONFIG_FONTS=y | ||
1181 | CONFIG_FONT_8x8=y | ||
1182 | CONFIG_FONT_8x16=y | ||
1183 | CONFIG_FONT_6x11=y | ||
1184 | CONFIG_FONT_7x14=y | ||
1185 | CONFIG_FONT_PEARL_8x8=y | ||
1186 | CONFIG_FONT_ACORN_8x8=y | ||
1187 | CONFIG_FONT_MINI_4x6=y | ||
1188 | CONFIG_FONT_SUN8x16=y | ||
1189 | CONFIG_FONT_SUN12x22=y | ||
1190 | CONFIG_FONT_10x18=y | ||
1191 | CONFIG_LOGO=y | ||
1192 | # CONFIG_LOGO_LINUX_MONO is not set | ||
1193 | # CONFIG_LOGO_LINUX_VGA16 is not set | ||
1194 | CONFIG_LOGO_LINUX_CLUT224=y | ||
1195 | CONFIG_SOUND=m | ||
1196 | # CONFIG_SOUND_OSS_CORE is not set | ||
1197 | CONFIG_SND=m | ||
1198 | CONFIG_SND_TIMER=m | ||
1199 | CONFIG_SND_PCM=m | ||
1200 | # CONFIG_SND_SEQUENCER is not set | ||
1201 | # CONFIG_SND_MIXER_OSS is not set | ||
1202 | # CONFIG_SND_PCM_OSS is not set | ||
1203 | # CONFIG_SND_HRTIMER is not set | ||
1204 | # CONFIG_SND_RTCTIMER is not set | ||
1205 | # CONFIG_SND_DYNAMIC_MINORS is not set | ||
1206 | # CONFIG_SND_SUPPORT_OLD_API is not set | ||
1207 | # CONFIG_SND_VERBOSE_PROCFS is not set | ||
1208 | # CONFIG_SND_VERBOSE_PRINTK is not set | ||
1209 | # CONFIG_SND_DEBUG is not set | ||
1210 | CONFIG_SND_VMASTER=y | ||
1211 | # CONFIG_SND_RAWMIDI_SEQ is not set | ||
1212 | # CONFIG_SND_OPL3_LIB_SEQ is not set | ||
1213 | # CONFIG_SND_OPL4_LIB_SEQ is not set | ||
1214 | # CONFIG_SND_SBAWE_SEQ is not set | ||
1215 | # CONFIG_SND_EMU10K1_SEQ is not set | ||
1216 | CONFIG_SND_AC97_CODEC=m | ||
1217 | # CONFIG_SND_DRIVERS is not set | ||
1218 | CONFIG_SND_PCI=y | ||
1219 | # CONFIG_SND_AD1889 is not set | ||
1220 | # CONFIG_SND_ALS300 is not set | ||
1221 | # CONFIG_SND_ALI5451 is not set | ||
1222 | # CONFIG_SND_ATIIXP is not set | ||
1223 | # CONFIG_SND_ATIIXP_MODEM is not set | ||
1224 | # CONFIG_SND_AU8810 is not set | ||
1225 | # CONFIG_SND_AU8820 is not set | ||
1226 | # CONFIG_SND_AU8830 is not set | ||
1227 | # CONFIG_SND_AW2 is not set | ||
1228 | # CONFIG_SND_AZT3328 is not set | ||
1229 | # CONFIG_SND_BT87X is not set | ||
1230 | # CONFIG_SND_CA0106 is not set | ||
1231 | # CONFIG_SND_CMIPCI is not set | ||
1232 | # CONFIG_SND_OXYGEN is not set | ||
1233 | # CONFIG_SND_CS4281 is not set | ||
1234 | # CONFIG_SND_CS46XX is not set | ||
1235 | CONFIG_SND_CS5535AUDIO=m | ||
1236 | # CONFIG_SND_CTXFI is not set | ||
1237 | # CONFIG_SND_DARLA20 is not set | ||
1238 | # CONFIG_SND_GINA20 is not set | ||
1239 | # CONFIG_SND_LAYLA20 is not set | ||
1240 | # CONFIG_SND_DARLA24 is not set | ||
1241 | # CONFIG_SND_GINA24 is not set | ||
1242 | # CONFIG_SND_LAYLA24 is not set | ||
1243 | # CONFIG_SND_MONA is not set | ||
1244 | # CONFIG_SND_MIA is not set | ||
1245 | # CONFIG_SND_ECHO3G is not set | ||
1246 | # CONFIG_SND_INDIGO is not set | ||
1247 | # CONFIG_SND_INDIGOIO is not set | ||
1248 | # CONFIG_SND_INDIGODJ is not set | ||
1249 | # CONFIG_SND_INDIGOIOX is not set | ||
1250 | # CONFIG_SND_INDIGODJX is not set | ||
1251 | # CONFIG_SND_EMU10K1 is not set | ||
1252 | # CONFIG_SND_EMU10K1X is not set | ||
1253 | # CONFIG_SND_ENS1370 is not set | ||
1254 | # CONFIG_SND_ENS1371 is not set | ||
1255 | # CONFIG_SND_ES1938 is not set | ||
1256 | # CONFIG_SND_ES1968 is not set | ||
1257 | # CONFIG_SND_FM801 is not set | ||
1258 | # CONFIG_SND_HDA_INTEL is not set | ||
1259 | # CONFIG_SND_HDSP is not set | ||
1260 | # CONFIG_SND_HDSPM is not set | ||
1261 | # CONFIG_SND_HIFIER is not set | ||
1262 | # CONFIG_SND_ICE1712 is not set | ||
1263 | # CONFIG_SND_ICE1724 is not set | ||
1264 | # CONFIG_SND_INTEL8X0 is not set | ||
1265 | # CONFIG_SND_INTEL8X0M is not set | ||
1266 | # CONFIG_SND_KORG1212 is not set | ||
1267 | # CONFIG_SND_LX6464ES is not set | ||
1268 | # CONFIG_SND_MAESTRO3 is not set | ||
1269 | # CONFIG_SND_MIXART is not set | ||
1270 | # CONFIG_SND_NM256 is not set | ||
1271 | # CONFIG_SND_PCXHR is not set | ||
1272 | # CONFIG_SND_RIPTIDE is not set | ||
1273 | # CONFIG_SND_RME32 is not set | ||
1274 | # CONFIG_SND_RME96 is not set | ||
1275 | # CONFIG_SND_RME9652 is not set | ||
1276 | # CONFIG_SND_SONICVIBES is not set | ||
1277 | # CONFIG_SND_TRIDENT is not set | ||
1278 | # CONFIG_SND_VIA82XX is not set | ||
1279 | # CONFIG_SND_VIA82XX_MODEM is not set | ||
1280 | # CONFIG_SND_VIRTUOSO is not set | ||
1281 | # CONFIG_SND_VX222 is not set | ||
1282 | # CONFIG_SND_YMFPCI is not set | ||
1283 | # CONFIG_SND_MIPS is not set | ||
1284 | # CONFIG_SND_USB is not set | ||
1285 | # CONFIG_SND_SOC is not set | ||
1286 | # CONFIG_SOUND_PRIME is not set | ||
1287 | CONFIG_AC97_BUS=m | ||
1288 | CONFIG_HID_SUPPORT=y | ||
1289 | CONFIG_HID=y | ||
1290 | CONFIG_HIDRAW=y | ||
1291 | |||
1292 | # | ||
1293 | # USB Input Devices | ||
1294 | # | ||
1295 | CONFIG_USB_HID=y | ||
1296 | # CONFIG_HID_PID is not set | ||
1297 | CONFIG_USB_HIDDEV=y | ||
1298 | |||
1299 | # | ||
1300 | # Special HID drivers | ||
1301 | # | ||
1302 | # CONFIG_HID_A4TECH is not set | ||
1303 | # CONFIG_HID_APPLE is not set | ||
1304 | # CONFIG_HID_BELKIN is not set | ||
1305 | # CONFIG_HID_CHERRY is not set | ||
1306 | # CONFIG_HID_CHICONY is not set | ||
1307 | # CONFIG_HID_CYPRESS is not set | ||
1308 | # CONFIG_HID_DRAGONRISE is not set | ||
1309 | # CONFIG_HID_EZKEY is not set | ||
1310 | # CONFIG_HID_KYE is not set | ||
1311 | # CONFIG_HID_GYRATION is not set | ||
1312 | # CONFIG_HID_TWINHAN is not set | ||
1313 | # CONFIG_HID_KENSINGTON is not set | ||
1314 | # CONFIG_HID_LOGITECH is not set | ||
1315 | # CONFIG_HID_MICROSOFT is not set | ||
1316 | # CONFIG_HID_MONTEREY is not set | ||
1317 | # CONFIG_HID_NTRIG is not set | ||
1318 | # CONFIG_HID_PANTHERLORD is not set | ||
1319 | # CONFIG_HID_PETALYNX is not set | ||
1320 | # CONFIG_HID_SAMSUNG is not set | ||
1321 | # CONFIG_HID_SONY is not set | ||
1322 | # CONFIG_HID_SUNPLUS is not set | ||
1323 | # CONFIG_HID_GREENASIA is not set | ||
1324 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
1325 | # CONFIG_HID_TOPSEED is not set | ||
1326 | # CONFIG_HID_THRUSTMASTER is not set | ||
1327 | # CONFIG_HID_ZEROPLUS is not set | ||
1328 | CONFIG_USB_SUPPORT=y | ||
1329 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1330 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1331 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1332 | CONFIG_USB=y | ||
1333 | # CONFIG_USB_DEBUG is not set | ||
1334 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1335 | |||
1336 | # | ||
1337 | # Miscellaneous USB options | ||
1338 | # | ||
1339 | CONFIG_USB_DEVICEFS=y | ||
1340 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1341 | CONFIG_USB_DYNAMIC_MINORS=y | ||
1342 | CONFIG_USB_SUSPEND=y | ||
1343 | # CONFIG_USB_OTG is not set | ||
1344 | CONFIG_USB_OTG_WHITELIST=y | ||
1345 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1346 | CONFIG_USB_MON=y | ||
1347 | # CONFIG_USB_WUSB is not set | ||
1348 | # CONFIG_USB_WUSB_CBAF is not set | ||
1349 | |||
1350 | # | ||
1351 | # USB Host Controller Drivers | ||
1352 | # | ||
1353 | # CONFIG_USB_C67X00_HCD is not set | ||
1354 | # CONFIG_USB_XHCI_HCD is not set | ||
1355 | CONFIG_USB_EHCI_HCD=y | ||
1356 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
1357 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1358 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1359 | # CONFIG_USB_ISP116X_HCD is not set | ||
1360 | # CONFIG_USB_ISP1760_HCD is not set | ||
1361 | # CONFIG_USB_ISP1362_HCD is not set | ||
1362 | CONFIG_USB_OHCI_HCD=y | ||
1363 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
1364 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
1365 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1366 | CONFIG_USB_UHCI_HCD=m | ||
1367 | # CONFIG_USB_SL811_HCD is not set | ||
1368 | # CONFIG_USB_R8A66597_HCD is not set | ||
1369 | # CONFIG_USB_WHCI_HCD is not set | ||
1370 | # CONFIG_USB_HWA_HCD is not set | ||
1371 | |||
1372 | # | ||
1373 | # USB Device Class drivers | ||
1374 | # | ||
1375 | CONFIG_USB_ACM=m | ||
1376 | # CONFIG_USB_PRINTER is not set | ||
1377 | CONFIG_USB_WDM=m | ||
1378 | # CONFIG_USB_TMC is not set | ||
1379 | |||
1380 | # | ||
1381 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
1382 | # | ||
1383 | |||
1384 | # | ||
1385 | # also be needed; see USB_STORAGE Help for more info | ||
1386 | # | ||
1387 | CONFIG_USB_STORAGE=m | ||
1388 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1389 | CONFIG_USB_STORAGE_DATAFAB=m | ||
1390 | CONFIG_USB_STORAGE_FREECOM=m | ||
1391 | CONFIG_USB_STORAGE_ISD200=m | ||
1392 | CONFIG_USB_STORAGE_USBAT=m | ||
1393 | CONFIG_USB_STORAGE_SDDR09=m | ||
1394 | CONFIG_USB_STORAGE_SDDR55=m | ||
1395 | CONFIG_USB_STORAGE_JUMPSHOT=m | ||
1396 | CONFIG_USB_STORAGE_ALAUDA=m | ||
1397 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1398 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1399 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1400 | # CONFIG_USB_LIBUSUAL is not set | ||
1401 | |||
1402 | # | ||
1403 | # USB Imaging devices | ||
1404 | # | ||
1405 | # CONFIG_USB_MDC800 is not set | ||
1406 | # CONFIG_USB_MICROTEK is not set | ||
1407 | |||
1408 | # | ||
1409 | # USB port drivers | ||
1410 | # | ||
1411 | CONFIG_USB_SERIAL=m | ||
1412 | # CONFIG_USB_EZUSB is not set | ||
1413 | CONFIG_USB_SERIAL_GENERIC=y | ||
1414 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
1415 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
1416 | # CONFIG_USB_SERIAL_BELKIN is not set | ||
1417 | # CONFIG_USB_SERIAL_CH341 is not set | ||
1418 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
1419 | # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | ||
1420 | # CONFIG_USB_SERIAL_CP210X is not set | ||
1421 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
1422 | # CONFIG_USB_SERIAL_EMPEG is not set | ||
1423 | # CONFIG_USB_SERIAL_FTDI_SIO is not set | ||
1424 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
1425 | # CONFIG_USB_SERIAL_VISOR is not set | ||
1426 | # CONFIG_USB_SERIAL_IPAQ is not set | ||
1427 | # CONFIG_USB_SERIAL_IR is not set | ||
1428 | # CONFIG_USB_SERIAL_EDGEPORT is not set | ||
1429 | # CONFIG_USB_SERIAL_EDGEPORT_TI is not set | ||
1430 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
1431 | # CONFIG_USB_SERIAL_IPW is not set | ||
1432 | # CONFIG_USB_SERIAL_IUU is not set | ||
1433 | # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | ||
1434 | # CONFIG_USB_SERIAL_KEYSPAN is not set | ||
1435 | # CONFIG_USB_SERIAL_KLSI is not set | ||
1436 | # CONFIG_USB_SERIAL_KOBIL_SCT is not set | ||
1437 | # CONFIG_USB_SERIAL_MCT_U232 is not set | ||
1438 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
1439 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
1440 | # CONFIG_USB_SERIAL_MOTOROLA is not set | ||
1441 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
1442 | # CONFIG_USB_SERIAL_PL2303 is not set | ||
1443 | # CONFIG_USB_SERIAL_OTI6858 is not set | ||
1444 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
1445 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
1446 | # CONFIG_USB_SERIAL_HP4X is not set | ||
1447 | # CONFIG_USB_SERIAL_SAFE is not set | ||
1448 | # CONFIG_USB_SERIAL_SIEMENS_MPI is not set | ||
1449 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
1450 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
1451 | # CONFIG_USB_SERIAL_TI is not set | ||
1452 | # CONFIG_USB_SERIAL_CYBERJACK is not set | ||
1453 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
1454 | # CONFIG_USB_SERIAL_OPTION is not set | ||
1455 | # CONFIG_USB_SERIAL_OMNINET is not set | ||
1456 | # CONFIG_USB_SERIAL_OPTICON is not set | ||
1457 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
1458 | |||
1459 | # | ||
1460 | # USB Miscellaneous drivers | ||
1461 | # | ||
1462 | # CONFIG_USB_EMI62 is not set | ||
1463 | # CONFIG_USB_EMI26 is not set | ||
1464 | # CONFIG_USB_ADUTUX is not set | ||
1465 | # CONFIG_USB_SEVSEG is not set | ||
1466 | # CONFIG_USB_RIO500 is not set | ||
1467 | # CONFIG_USB_LEGOTOWER is not set | ||
1468 | # CONFIG_USB_LCD is not set | ||
1469 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1470 | # CONFIG_USB_LED is not set | ||
1471 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1472 | # CONFIG_USB_CYTHERM is not set | ||
1473 | # CONFIG_USB_IDMOUSE is not set | ||
1474 | # CONFIG_USB_FTDI_ELAN is not set | ||
1475 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1476 | # CONFIG_USB_SISUSBVGA is not set | ||
1477 | # CONFIG_USB_LD is not set | ||
1478 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1479 | # CONFIG_USB_IOWARRIOR is not set | ||
1480 | # CONFIG_USB_TEST is not set | ||
1481 | # CONFIG_USB_ISIGHTFW is not set | ||
1482 | # CONFIG_USB_VST is not set | ||
1483 | # CONFIG_USB_GADGET is not set | ||
1484 | |||
1485 | # | ||
1486 | # OTG and related infrastructure | ||
1487 | # | ||
1488 | # CONFIG_NOP_USB_XCEIV is not set | ||
1489 | # CONFIG_UWB is not set | ||
1490 | # CONFIG_MMC is not set | ||
1491 | # CONFIG_MEMSTICK is not set | ||
1492 | # CONFIG_NEW_LEDS is not set | ||
1493 | # CONFIG_ACCESSIBILITY is not set | ||
1494 | # CONFIG_INFINIBAND is not set | ||
1495 | # CONFIG_RTC_CLASS is not set | ||
1496 | # CONFIG_DMADEVICES is not set | ||
1497 | # CONFIG_AUXDISPLAY is not set | ||
1498 | # CONFIG_UIO is not set | ||
1499 | |||
1500 | # | ||
1501 | # TI VLYNQ | ||
1502 | # | ||
1503 | CONFIG_STAGING=y | ||
1504 | # CONFIG_STAGING_EXCLUDE_BUILD is not set | ||
1505 | # CONFIG_ET131X is not set | ||
1506 | # CONFIG_USB_IP_COMMON is not set | ||
1507 | # CONFIG_PRISM2_USB is not set | ||
1508 | # CONFIG_ECHO is not set | ||
1509 | # CONFIG_COMEDI is not set | ||
1510 | # CONFIG_ASUS_OLED is not set | ||
1511 | # CONFIG_ALTERA_PCIE_CHDMA is not set | ||
1512 | # CONFIG_RTL8187SE is not set | ||
1513 | # CONFIG_RTL8192SU is not set | ||
1514 | # CONFIG_RTL8192E is not set | ||
1515 | # CONFIG_INPUT_MIMIO is not set | ||
1516 | # CONFIG_TRANZPORT is not set | ||
1517 | |||
1518 | # | ||
1519 | # Android | ||
1520 | # | ||
1521 | |||
1522 | # | ||
1523 | # Qualcomm MSM Camera And Video | ||
1524 | # | ||
1525 | |||
1526 | # | ||
1527 | # Camera Sensor Selection | ||
1528 | # | ||
1529 | # CONFIG_INPUT_GPIO is not set | ||
1530 | # CONFIG_DST is not set | ||
1531 | # CONFIG_POHMELFS is not set | ||
1532 | # CONFIG_B3DFG is not set | ||
1533 | # CONFIG_PLAN9AUTH is not set | ||
1534 | # CONFIG_LINE6_USB is not set | ||
1535 | # CONFIG_USB_SERIAL_QUATECH2 is not set | ||
1536 | # CONFIG_USB_SERIAL_QUATECH_USB2 is not set | ||
1537 | # CONFIG_VT6655 is not set | ||
1538 | # CONFIG_VT6656 is not set | ||
1539 | # CONFIG_FB_UDL is not set | ||
1540 | # CONFIG_VME_BUS is not set | ||
1541 | |||
1542 | # | ||
1543 | # RAR Register Driver | ||
1544 | # | ||
1545 | # CONFIG_RAR_REGISTER is not set | ||
1546 | # CONFIG_IIO is not set | ||
1547 | CONFIG_FB_SM7XX=y | ||
1548 | CONFIG_FB_SM7XX_ACCEL=y | ||
1549 | |||
1550 | # | ||
1551 | # File systems | ||
1552 | # | ||
1553 | # CONFIG_EXT2_FS is not set | ||
1554 | CONFIG_EXT3_FS=y | ||
1555 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
1556 | CONFIG_EXT3_FS_XATTR=y | ||
1557 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
1558 | CONFIG_EXT3_FS_SECURITY=y | ||
1559 | # CONFIG_EXT4_FS is not set | ||
1560 | CONFIG_JBD=y | ||
1561 | CONFIG_FS_MBCACHE=y | ||
1562 | # CONFIG_REISERFS_FS is not set | ||
1563 | # CONFIG_JFS_FS is not set | ||
1564 | CONFIG_FS_POSIX_ACL=y | ||
1565 | # CONFIG_XFS_FS is not set | ||
1566 | # CONFIG_GFS2_FS is not set | ||
1567 | # CONFIG_OCFS2_FS is not set | ||
1568 | # CONFIG_BTRFS_FS is not set | ||
1569 | # CONFIG_NILFS2_FS is not set | ||
1570 | CONFIG_FILE_LOCKING=y | ||
1571 | CONFIG_FSNOTIFY=y | ||
1572 | CONFIG_DNOTIFY=y | ||
1573 | CONFIG_INOTIFY=y | ||
1574 | CONFIG_INOTIFY_USER=y | ||
1575 | CONFIG_QUOTA=y | ||
1576 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
1577 | CONFIG_PRINT_QUOTA_WARNING=y | ||
1578 | # CONFIG_QFMT_V1 is not set | ||
1579 | # CONFIG_QFMT_V2 is not set | ||
1580 | CONFIG_QUOTACTL=y | ||
1581 | # CONFIG_AUTOFS_FS is not set | ||
1582 | # CONFIG_AUTOFS4_FS is not set | ||
1583 | # CONFIG_FUSE_FS is not set | ||
1584 | |||
1585 | # | ||
1586 | # Caches | ||
1587 | # | ||
1588 | # CONFIG_FSCACHE is not set | ||
1589 | |||
1590 | # | ||
1591 | # CD-ROM/DVD Filesystems | ||
1592 | # | ||
1593 | CONFIG_ISO9660_FS=m | ||
1594 | CONFIG_JOLIET=y | ||
1595 | CONFIG_ZISOFS=y | ||
1596 | # CONFIG_UDF_FS is not set | ||
1597 | |||
1598 | # | ||
1599 | # DOS/FAT/NT Filesystems | ||
1600 | # | ||
1601 | CONFIG_FAT_FS=m | ||
1602 | # CONFIG_MSDOS_FS is not set | ||
1603 | CONFIG_VFAT_FS=m | ||
1604 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1605 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1606 | # CONFIG_NTFS_FS is not set | ||
1607 | |||
1608 | # | ||
1609 | # Pseudo filesystems | ||
1610 | # | ||
1611 | CONFIG_PROC_FS=y | ||
1612 | CONFIG_PROC_KCORE=y | ||
1613 | CONFIG_PROC_SYSCTL=y | ||
1614 | CONFIG_PROC_PAGE_MONITOR=y | ||
1615 | CONFIG_SYSFS=y | ||
1616 | CONFIG_TMPFS=y | ||
1617 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1618 | # CONFIG_HUGETLB_PAGE is not set | ||
1619 | # CONFIG_CONFIGFS_FS is not set | ||
1620 | # CONFIG_MISC_FILESYSTEMS is not set | ||
1621 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1622 | CONFIG_NFS_FS=m | ||
1623 | CONFIG_NFS_V3=y | ||
1624 | CONFIG_NFS_V3_ACL=y | ||
1625 | # CONFIG_NFS_V4 is not set | ||
1626 | # CONFIG_NFSD is not set | ||
1627 | CONFIG_LOCKD=m | ||
1628 | CONFIG_LOCKD_V4=y | ||
1629 | CONFIG_NFS_ACL_SUPPORT=m | ||
1630 | CONFIG_NFS_COMMON=y | ||
1631 | CONFIG_SUNRPC=m | ||
1632 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1633 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1634 | # CONFIG_SMB_FS is not set | ||
1635 | # CONFIG_CIFS is not set | ||
1636 | # CONFIG_NCP_FS is not set | ||
1637 | # CONFIG_CODA_FS is not set | ||
1638 | # CONFIG_AFS_FS is not set | ||
1639 | |||
1640 | # | ||
1641 | # Partition Types | ||
1642 | # | ||
1643 | # CONFIG_PARTITION_ADVANCED is not set | ||
1644 | CONFIG_MSDOS_PARTITION=y | ||
1645 | CONFIG_NLS=y | ||
1646 | CONFIG_NLS_DEFAULT="utf-8" | ||
1647 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1648 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1649 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1650 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1651 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1652 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1653 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1654 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1655 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1656 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1657 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1658 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1659 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1660 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1661 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1662 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1663 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1664 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1665 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1666 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1667 | # CONFIG_NLS_ISO8859_8 is not set | ||
1668 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1669 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1670 | # CONFIG_NLS_ASCII is not set | ||
1671 | # CONFIG_NLS_ISO8859_1 is not set | ||
1672 | # CONFIG_NLS_ISO8859_2 is not set | ||
1673 | # CONFIG_NLS_ISO8859_3 is not set | ||
1674 | # CONFIG_NLS_ISO8859_4 is not set | ||
1675 | # CONFIG_NLS_ISO8859_5 is not set | ||
1676 | # CONFIG_NLS_ISO8859_6 is not set | ||
1677 | # CONFIG_NLS_ISO8859_7 is not set | ||
1678 | # CONFIG_NLS_ISO8859_9 is not set | ||
1679 | # CONFIG_NLS_ISO8859_13 is not set | ||
1680 | # CONFIG_NLS_ISO8859_14 is not set | ||
1681 | # CONFIG_NLS_ISO8859_15 is not set | ||
1682 | # CONFIG_NLS_KOI8_R is not set | ||
1683 | # CONFIG_NLS_KOI8_U is not set | ||
1684 | # CONFIG_NLS_UTF8 is not set | ||
1685 | # CONFIG_DLM is not set | ||
1686 | |||
1687 | # | ||
1688 | # Kernel hacking | ||
1689 | # | ||
1690 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
1691 | CONFIG_PRINTK_TIME=y | ||
1692 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1693 | CONFIG_ENABLE_MUST_CHECK=y | ||
1694 | CONFIG_FRAME_WARN=1024 | ||
1695 | # CONFIG_MAGIC_SYSRQ is not set | ||
1696 | CONFIG_STRIP_ASM_SYMS=y | ||
1697 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1698 | # CONFIG_DEBUG_FS is not set | ||
1699 | # CONFIG_HEADERS_CHECK is not set | ||
1700 | # CONFIG_DEBUG_KERNEL is not set | ||
1701 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1702 | # CONFIG_SLUB_STATS is not set | ||
1703 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1704 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1705 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
1706 | CONFIG_TRACING_SUPPORT=y | ||
1707 | # CONFIG_FTRACE is not set | ||
1708 | # CONFIG_SAMPLES is not set | ||
1709 | CONFIG_HAVE_ARCH_KGDB=y | ||
1710 | # CONFIG_CMDLINE_BOOL is not set | ||
1711 | |||
1712 | # | ||
1713 | # Security options | ||
1714 | # | ||
1715 | # CONFIG_KEYS is not set | ||
1716 | # CONFIG_SECURITY is not set | ||
1717 | # CONFIG_SECURITYFS is not set | ||
1718 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1719 | CONFIG_CRYPTO=y | ||
1720 | |||
1721 | # | ||
1722 | # Crypto core or helper | ||
1723 | # | ||
1724 | CONFIG_CRYPTO_ALGAPI=y | ||
1725 | CONFIG_CRYPTO_ALGAPI2=y | ||
1726 | CONFIG_CRYPTO_AEAD2=y | ||
1727 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1728 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
1729 | CONFIG_CRYPTO_HASH2=y | ||
1730 | CONFIG_CRYPTO_RNG2=y | ||
1731 | CONFIG_CRYPTO_PCOMP=y | ||
1732 | CONFIG_CRYPTO_MANAGER=y | ||
1733 | CONFIG_CRYPTO_MANAGER2=y | ||
1734 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1735 | # CONFIG_CRYPTO_NULL is not set | ||
1736 | CONFIG_CRYPTO_WORKQUEUE=y | ||
1737 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1738 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1739 | # CONFIG_CRYPTO_TEST is not set | ||
1740 | |||
1741 | # | ||
1742 | # Authenticated Encryption with Associated Data | ||
1743 | # | ||
1744 | # CONFIG_CRYPTO_CCM is not set | ||
1745 | # CONFIG_CRYPTO_GCM is not set | ||
1746 | # CONFIG_CRYPTO_SEQIV is not set | ||
1747 | |||
1748 | # | ||
1749 | # Block modes | ||
1750 | # | ||
1751 | CONFIG_CRYPTO_CBC=y | ||
1752 | # CONFIG_CRYPTO_CTR is not set | ||
1753 | # CONFIG_CRYPTO_CTS is not set | ||
1754 | # CONFIG_CRYPTO_ECB is not set | ||
1755 | # CONFIG_CRYPTO_LRW is not set | ||
1756 | # CONFIG_CRYPTO_PCBC is not set | ||
1757 | # CONFIG_CRYPTO_XTS is not set | ||
1758 | |||
1759 | # | ||
1760 | # Hash modes | ||
1761 | # | ||
1762 | # CONFIG_CRYPTO_HMAC is not set | ||
1763 | # CONFIG_CRYPTO_XCBC is not set | ||
1764 | # CONFIG_CRYPTO_VMAC is not set | ||
1765 | |||
1766 | # | ||
1767 | # Digest | ||
1768 | # | ||
1769 | # CONFIG_CRYPTO_CRC32C is not set | ||
1770 | # CONFIG_CRYPTO_GHASH is not set | ||
1771 | # CONFIG_CRYPTO_MD4 is not set | ||
1772 | # CONFIG_CRYPTO_MD5 is not set | ||
1773 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1774 | # CONFIG_CRYPTO_RMD128 is not set | ||
1775 | # CONFIG_CRYPTO_RMD160 is not set | ||
1776 | # CONFIG_CRYPTO_RMD256 is not set | ||
1777 | # CONFIG_CRYPTO_RMD320 is not set | ||
1778 | # CONFIG_CRYPTO_SHA1 is not set | ||
1779 | # CONFIG_CRYPTO_SHA256 is not set | ||
1780 | # CONFIG_CRYPTO_SHA512 is not set | ||
1781 | # CONFIG_CRYPTO_TGR192 is not set | ||
1782 | # CONFIG_CRYPTO_WP512 is not set | ||
1783 | |||
1784 | # | ||
1785 | # Ciphers | ||
1786 | # | ||
1787 | # CONFIG_CRYPTO_AES is not set | ||
1788 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1789 | # CONFIG_CRYPTO_ARC4 is not set | ||
1790 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1791 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1792 | # CONFIG_CRYPTO_CAST5 is not set | ||
1793 | # CONFIG_CRYPTO_CAST6 is not set | ||
1794 | # CONFIG_CRYPTO_DES is not set | ||
1795 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1796 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1797 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1798 | # CONFIG_CRYPTO_SEED is not set | ||
1799 | # CONFIG_CRYPTO_SERPENT is not set | ||
1800 | # CONFIG_CRYPTO_TEA is not set | ||
1801 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1802 | |||
1803 | # | ||
1804 | # Compression | ||
1805 | # | ||
1806 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1807 | # CONFIG_CRYPTO_ZLIB is not set | ||
1808 | # CONFIG_CRYPTO_LZO is not set | ||
1809 | |||
1810 | # | ||
1811 | # Random Number Generation | ||
1812 | # | ||
1813 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1814 | CONFIG_CRYPTO_HW=y | ||
1815 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1816 | # CONFIG_BINARY_PRINTF is not set | ||
1817 | |||
1818 | # | ||
1819 | # Library routines | ||
1820 | # | ||
1821 | CONFIG_BITREVERSE=y | ||
1822 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1823 | # CONFIG_CRC_CCITT is not set | ||
1824 | # CONFIG_CRC16 is not set | ||
1825 | CONFIG_CRC_T10DIF=y | ||
1826 | # CONFIG_CRC_ITU_T is not set | ||
1827 | CONFIG_CRC32=y | ||
1828 | # CONFIG_CRC7 is not set | ||
1829 | # CONFIG_LIBCRC32C is not set | ||
1830 | CONFIG_AUDIT_GENERIC=y | ||
1831 | CONFIG_ZLIB_INFLATE=m | ||
1832 | CONFIG_HAS_IOMEM=y | ||
1833 | CONFIG_HAS_IOPORT=y | ||
1834 | CONFIG_HAS_DMA=y | ||
1835 | CONFIG_NLATTR=y | ||
diff --git a/arch/mips/configs/malta_defconfig b/arch/mips/configs/malta_defconfig index 3f01870b4d65..d3c601206db2 100644 --- a/arch/mips/configs/malta_defconfig +++ b/arch/mips/configs/malta_defconfig | |||
@@ -10,7 +10,6 @@ CONFIG_MIPS=y | |||
10 | # | 10 | # |
11 | CONFIG_ZONE_DMA=y | 11 | CONFIG_ZONE_DMA=y |
12 | # CONFIG_MACH_ALCHEMY is not set | 12 | # CONFIG_MACH_ALCHEMY is not set |
13 | # CONFIG_BASLER_EXCITE is not set | ||
14 | # CONFIG_BCM47XX is not set | 13 | # CONFIG_BCM47XX is not set |
15 | # CONFIG_MIPS_COBALT is not set | 14 | # CONFIG_MIPS_COBALT is not set |
16 | # CONFIG_MACH_DECSTATION is not set | 15 | # CONFIG_MACH_DECSTATION is not set |
@@ -1591,7 +1590,7 @@ CONFIG_FRAME_WARN=1024 | |||
1591 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set | 1590 | # CONFIG_DYNAMIC_PRINTK_DEBUG is not set |
1592 | # CONFIG_SAMPLES is not set | 1591 | # CONFIG_SAMPLES is not set |
1593 | CONFIG_HAVE_ARCH_KGDB=y | 1592 | CONFIG_HAVE_ARCH_KGDB=y |
1594 | CONFIG_CMDLINE="" | 1593 | # CONFIG_CMDLINE_BOOL is not set |
1595 | 1594 | ||
1596 | # | 1595 | # |
1597 | # Security options | 1596 | # Security options |
diff --git a/arch/mips/configs/markeins_defconfig b/arch/mips/configs/markeins_defconfig index d001f7e87418..6a325c02b63c 100644 --- a/arch/mips/configs/markeins_defconfig +++ b/arch/mips/configs/markeins_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -1366,7 +1365,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1366 | # CONFIG_DEBUG_KERNEL is not set | 1365 | # CONFIG_DEBUG_KERNEL is not set |
1367 | CONFIG_LOG_BUF_SHIFT=14 | 1366 | CONFIG_LOG_BUF_SHIFT=14 |
1368 | CONFIG_CROSSCOMPILE=y | 1367 | CONFIG_CROSSCOMPILE=y |
1368 | CONFIG_CMDLINE_BOOL=y | ||
1369 | CONFIG_CMDLINE="console=ttyS0,115200 mem=192m ip=bootp root=/dev/nfs rw" | 1369 | CONFIG_CMDLINE="console=ttyS0,115200 mem=192m ip=bootp root=/dev/nfs rw" |
1370 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
1370 | 1371 | ||
1371 | # | 1372 | # |
1372 | # Security options | 1373 | # Security options |
diff --git a/arch/mips/configs/mipssim_defconfig b/arch/mips/configs/mipssim_defconfig index 7358454deaa6..f77a34e0f938 100644 --- a/arch/mips/configs/mipssim_defconfig +++ b/arch/mips/configs/mipssim_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -635,7 +634,9 @@ CONFIG_FORCED_INLINING=y | |||
635 | # CONFIG_RCU_TORTURE_TEST is not set | 634 | # CONFIG_RCU_TORTURE_TEST is not set |
636 | # CONFIG_FAULT_INJECTION is not set | 635 | # CONFIG_FAULT_INJECTION is not set |
637 | CONFIG_CROSSCOMPILE=y | 636 | CONFIG_CROSSCOMPILE=y |
637 | CONFIG_CMDLINE_BOOL=y | ||
638 | CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp" | 638 | CONFIG_CMDLINE="nfsroot=192.168.192.169:/u1/mipsel,timeo=20 ip=dhcp" |
639 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
639 | # CONFIG_DEBUG_STACK_USAGE is not set | 640 | # CONFIG_DEBUG_STACK_USAGE is not set |
640 | # CONFIG_RUNTIME_DEBUG is not set | 641 | # CONFIG_RUNTIME_DEBUG is not set |
641 | 642 | ||
diff --git a/arch/mips/configs/mpc30x_defconfig b/arch/mips/configs/mpc30x_defconfig index 8c720e51795b..17203056b22b 100644 --- a/arch/mips/configs/mpc30x_defconfig +++ b/arch/mips/configs/mpc30x_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_MIPS_COBALT is not set | 12 | # CONFIG_MIPS_COBALT is not set |
14 | # CONFIG_MACH_DECSTATION is not set | 13 | # CONFIG_MACH_DECSTATION is not set |
15 | # CONFIG_MACH_JAZZ is not set | 14 | # CONFIG_MACH_JAZZ is not set |
@@ -817,7 +816,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
817 | # CONFIG_HEADERS_CHECK is not set | 816 | # CONFIG_HEADERS_CHECK is not set |
818 | # CONFIG_DEBUG_KERNEL is not set | 817 | # CONFIG_DEBUG_KERNEL is not set |
819 | CONFIG_CROSSCOMPILE=y | 818 | CONFIG_CROSSCOMPILE=y |
819 | CONFIG_CMDLINE_BOOL=y | ||
820 | CONFIG_CMDLINE="mem=32M console=ttyVR0,19200 ide0=0x170,0x376,73" | 820 | CONFIG_CMDLINE="mem=32M console=ttyVR0,19200 ide0=0x170,0x376,73" |
821 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
821 | 822 | ||
822 | # | 823 | # |
823 | # Security options | 824 | # Security options |
diff --git a/arch/mips/configs/msp71xx_defconfig b/arch/mips/configs/msp71xx_defconfig index ecbc030b7b6c..000d185ddf42 100644 --- a/arch/mips/configs/msp71xx_defconfig +++ b/arch/mips/configs/msp71xx_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -1412,7 +1411,7 @@ CONFIG_FORCED_INLINING=y | |||
1412 | # CONFIG_RCU_TORTURE_TEST is not set | 1411 | # CONFIG_RCU_TORTURE_TEST is not set |
1413 | # CONFIG_FAULT_INJECTION is not set | 1412 | # CONFIG_FAULT_INJECTION is not set |
1414 | CONFIG_CROSSCOMPILE=y | 1413 | CONFIG_CROSSCOMPILE=y |
1415 | CONFIG_CMDLINE="" | 1414 | # CONFIG_CMDLINE_BOOL is not set |
1416 | # CONFIG_DEBUG_STACK_USAGE is not set | 1415 | # CONFIG_DEBUG_STACK_USAGE is not set |
1417 | # CONFIG_RUNTIME_DEBUG is not set | 1416 | # CONFIG_RUNTIME_DEBUG is not set |
1418 | # CONFIG_MIPS_UNCACHED is not set | 1417 | # CONFIG_MIPS_UNCACHED is not set |
diff --git a/arch/mips/configs/mtx1_defconfig b/arch/mips/configs/mtx1_defconfig index 9477f040796d..144b94d9a6ad 100644 --- a/arch/mips/configs/mtx1_defconfig +++ b/arch/mips/configs/mtx1_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | CONFIG_MACH_ALCHEMY=y | 11 | CONFIG_MACH_ALCHEMY=y |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_MIPS_COBALT is not set | 12 | # CONFIG_MIPS_COBALT is not set |
14 | # CONFIG_MACH_DECSTATION is not set | 13 | # CONFIG_MACH_DECSTATION is not set |
15 | # CONFIG_MACH_JAZZ is not set | 14 | # CONFIG_MACH_JAZZ is not set |
@@ -3018,7 +3017,7 @@ CONFIG_MAGIC_SYSRQ=y | |||
3018 | # CONFIG_HEADERS_CHECK is not set | 3017 | # CONFIG_HEADERS_CHECK is not set |
3019 | # CONFIG_DEBUG_KERNEL is not set | 3018 | # CONFIG_DEBUG_KERNEL is not set |
3020 | CONFIG_CROSSCOMPILE=y | 3019 | CONFIG_CROSSCOMPILE=y |
3021 | CONFIG_CMDLINE="" | 3020 | # CONFIG_CMDLINE_BOOL is not set |
3022 | 3021 | ||
3023 | # | 3022 | # |
3024 | # Security options | 3023 | # Security options |
diff --git a/arch/mips/configs/pb1100_defconfig b/arch/mips/configs/pb1100_defconfig index be8091ef0a79..ddf67f639194 100644 --- a/arch/mips/configs/pb1100_defconfig +++ b/arch/mips/configs/pb1100_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MIPS_PB1100=y | |||
23 | # CONFIG_MIPS_DB1550 is not set | 23 | # CONFIG_MIPS_DB1550 is not set |
24 | # CONFIG_MIPS_DB1200 is not set | 24 | # CONFIG_MIPS_DB1200 is not set |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1083,7 +1082,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1083 | # CONFIG_DEBUG_KERNEL is not set | 1082 | # CONFIG_DEBUG_KERNEL is not set |
1084 | CONFIG_LOG_BUF_SHIFT=14 | 1083 | CONFIG_LOG_BUF_SHIFT=14 |
1085 | CONFIG_CROSSCOMPILE=y | 1084 | CONFIG_CROSSCOMPILE=y |
1086 | CONFIG_CMDLINE="" | 1085 | # CONFIG_CMDLINE_BOOL is not set |
1087 | 1086 | ||
1088 | # | 1087 | # |
1089 | # Security options | 1088 | # Security options |
diff --git a/arch/mips/configs/pb1500_defconfig b/arch/mips/configs/pb1500_defconfig index e74ba794c789..5ec60836b645 100644 --- a/arch/mips/configs/pb1500_defconfig +++ b/arch/mips/configs/pb1500_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MIPS_PB1500=y | |||
23 | # CONFIG_MIPS_DB1550 is not set | 23 | # CONFIG_MIPS_DB1550 is not set |
24 | # CONFIG_MIPS_DB1200 is not set | 24 | # CONFIG_MIPS_DB1200 is not set |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1200,7 +1199,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1200 | # CONFIG_DEBUG_KERNEL is not set | 1199 | # CONFIG_DEBUG_KERNEL is not set |
1201 | CONFIG_LOG_BUF_SHIFT=14 | 1200 | CONFIG_LOG_BUF_SHIFT=14 |
1202 | CONFIG_CROSSCOMPILE=y | 1201 | CONFIG_CROSSCOMPILE=y |
1203 | CONFIG_CMDLINE="" | 1202 | # CONFIG_CMDLINE_BOOL is not set |
1204 | 1203 | ||
1205 | # | 1204 | # |
1206 | # Security options | 1205 | # Security options |
diff --git a/arch/mips/configs/pb1550_defconfig b/arch/mips/configs/pb1550_defconfig index 1d896fd830da..6647642b5d97 100644 --- a/arch/mips/configs/pb1550_defconfig +++ b/arch/mips/configs/pb1550_defconfig | |||
@@ -23,7 +23,6 @@ CONFIG_MIPS_PB1550=y | |||
23 | # CONFIG_MIPS_DB1550 is not set | 23 | # CONFIG_MIPS_DB1550 is not set |
24 | # CONFIG_MIPS_DB1200 is not set | 24 | # CONFIG_MIPS_DB1200 is not set |
25 | # CONFIG_MIPS_MIRAGE is not set | 25 | # CONFIG_MIPS_MIRAGE is not set |
26 | # CONFIG_BASLER_EXCITE is not set | ||
27 | # CONFIG_MIPS_COBALT is not set | 26 | # CONFIG_MIPS_COBALT is not set |
28 | # CONFIG_MACH_DECSTATION is not set | 27 | # CONFIG_MACH_DECSTATION is not set |
29 | # CONFIG_MACH_JAZZ is not set | 28 | # CONFIG_MACH_JAZZ is not set |
@@ -1193,7 +1192,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1193 | # CONFIG_DEBUG_KERNEL is not set | 1192 | # CONFIG_DEBUG_KERNEL is not set |
1194 | CONFIG_LOG_BUF_SHIFT=14 | 1193 | CONFIG_LOG_BUF_SHIFT=14 |
1195 | CONFIG_CROSSCOMPILE=y | 1194 | CONFIG_CROSSCOMPILE=y |
1196 | CONFIG_CMDLINE="" | 1195 | # CONFIG_CMDLINE_BOOL is not set |
1197 | 1196 | ||
1198 | # | 1197 | # |
1199 | # Security options | 1198 | # Security options |
diff --git a/arch/mips/configs/pnx8335-stb225_defconfig b/arch/mips/configs/pnx8335-stb225_defconfig index fef4d31c2055..848344d588d1 100644 --- a/arch/mips/configs/pnx8335-stb225_defconfig +++ b/arch/mips/configs/pnx8335-stb225_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1034,7 +1033,7 @@ CONFIG_FRAME_WARN=1024 | |||
1034 | # CONFIG_DEBUG_KERNEL is not set | 1033 | # CONFIG_DEBUG_KERNEL is not set |
1035 | # CONFIG_SAMPLES is not set | 1034 | # CONFIG_SAMPLES is not set |
1036 | # CONFIG_KERNEL_TESTS is not set | 1035 | # CONFIG_KERNEL_TESTS is not set |
1037 | CONFIG_CMDLINE="" | 1036 | # CONFIG_CMDLINE_BOOL is not set |
1038 | 1037 | ||
1039 | # | 1038 | # |
1040 | # Security options | 1039 | # Security options |
diff --git a/arch/mips/configs/pnx8550-jbs_defconfig b/arch/mips/configs/pnx8550-jbs_defconfig index e10c7116c3c2..9d721fdccb30 100644 --- a/arch/mips/configs/pnx8550-jbs_defconfig +++ b/arch/mips/configs/pnx8550-jbs_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -1215,7 +1214,9 @@ CONFIG_DEBUG_MUTEXES=y | |||
1215 | CONFIG_FORCED_INLINING=y | 1214 | CONFIG_FORCED_INLINING=y |
1216 | # CONFIG_RCU_TORTURE_TEST is not set | 1215 | # CONFIG_RCU_TORTURE_TEST is not set |
1217 | CONFIG_CROSSCOMPILE=y | 1216 | CONFIG_CROSSCOMPILE=y |
1217 | CONFIG_CMDLINE_BOOL=y | ||
1218 | CONFIG_CMDLINE="console=ttyS1,38400n8 root=/dev/nfs ip=bootp" | 1218 | CONFIG_CMDLINE="console=ttyS1,38400n8 root=/dev/nfs ip=bootp" |
1219 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
1219 | # CONFIG_DEBUG_STACK_USAGE is not set | 1220 | # CONFIG_DEBUG_STACK_USAGE is not set |
1220 | # CONFIG_RUNTIME_DEBUG is not set | 1221 | # CONFIG_RUNTIME_DEBUG is not set |
1221 | 1222 | ||
diff --git a/arch/mips/configs/pnx8550-stb810_defconfig b/arch/mips/configs/pnx8550-stb810_defconfig index 5ed3c8dfa0a1..ab07ec08c6fa 100644 --- a/arch/mips/configs/pnx8550-stb810_defconfig +++ b/arch/mips/configs/pnx8550-stb810_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -1205,7 +1204,9 @@ CONFIG_DEBUG_SLAB=y | |||
1205 | CONFIG_FORCED_INLINING=y | 1204 | CONFIG_FORCED_INLINING=y |
1206 | # CONFIG_RCU_TORTURE_TEST is not set | 1205 | # CONFIG_RCU_TORTURE_TEST is not set |
1207 | CONFIG_CROSSCOMPILE=y | 1206 | CONFIG_CROSSCOMPILE=y |
1207 | CONFIG_CMDLINE_BOOL=y | ||
1208 | CONFIG_CMDLINE="console=ttyS1,38400n8 root=/dev/nfs ip=bootp" | 1208 | CONFIG_CMDLINE="console=ttyS1,38400n8 root=/dev/nfs ip=bootp" |
1209 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
1209 | # CONFIG_DEBUG_STACK_USAGE is not set | 1210 | # CONFIG_DEBUG_STACK_USAGE is not set |
1210 | # CONFIG_RUNTIME_DEBUG is not set | 1211 | # CONFIG_RUNTIME_DEBUG is not set |
1211 | 1212 | ||
diff --git a/arch/mips/configs/powertv_defconfig b/arch/mips/configs/powertv_defconfig new file mode 100644 index 000000000000..7291633d81cc --- /dev/null +++ b/arch/mips/configs/powertv_defconfig | |||
@@ -0,0 +1,1550 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.31-rc5 | ||
4 | # Fri Aug 28 14:49:33 2009 | ||
5 | # | ||
6 | CONFIG_MIPS=y | ||
7 | |||
8 | # | ||
9 | # Machine selection | ||
10 | # | ||
11 | # CONFIG_MACH_ALCHEMY is not set | ||
12 | # CONFIG_AR7 is not set | ||
13 | # CONFIG_BCM47XX is not set | ||
14 | # CONFIG_MIPS_COBALT is not set | ||
15 | # CONFIG_MACH_DECSTATION is not set | ||
16 | # CONFIG_MACH_JAZZ is not set | ||
17 | # CONFIG_LASAT is not set | ||
18 | # CONFIG_LEMOTE_FULONG is not set | ||
19 | # CONFIG_MIPS_MALTA is not set | ||
20 | # CONFIG_MIPS_SIM is not set | ||
21 | # CONFIG_NEC_MARKEINS is not set | ||
22 | # CONFIG_MACH_VR41XX is not set | ||
23 | # CONFIG_NXP_STB220 is not set | ||
24 | # CONFIG_NXP_STB225 is not set | ||
25 | # CONFIG_PNX8550_JBS is not set | ||
26 | # CONFIG_PNX8550_STB810 is not set | ||
27 | # CONFIG_PMC_MSP is not set | ||
28 | # CONFIG_PMC_YOSEMITE is not set | ||
29 | CONFIG_POWERTV=y | ||
30 | # CONFIG_SGI_IP22 is not set | ||
31 | # CONFIG_SGI_IP27 is not set | ||
32 | # CONFIG_SGI_IP28 is not set | ||
33 | # CONFIG_SGI_IP32 is not set | ||
34 | # CONFIG_SIBYTE_CRHINE is not set | ||
35 | # CONFIG_SIBYTE_CARMEL is not set | ||
36 | # CONFIG_SIBYTE_CRHONE is not set | ||
37 | # CONFIG_SIBYTE_RHONE is not set | ||
38 | # CONFIG_SIBYTE_SWARM is not set | ||
39 | # CONFIG_SIBYTE_LITTLESUR is not set | ||
40 | # CONFIG_SIBYTE_SENTOSA is not set | ||
41 | # CONFIG_SIBYTE_BIGSUR is not set | ||
42 | # CONFIG_SNI_RM is not set | ||
43 | # CONFIG_MACH_TX39XX is not set | ||
44 | # CONFIG_MACH_TX49XX is not set | ||
45 | # CONFIG_MIKROTIK_RB532 is not set | ||
46 | # CONFIG_WR_PPMC is not set | ||
47 | # CONFIG_CAVIUM_OCTEON_SIMULATOR is not set | ||
48 | # CONFIG_CAVIUM_OCTEON_REFERENCE_BOARD is not set | ||
49 | # CONFIG_ALCHEMY_GPIO_INDIRECT is not set | ||
50 | # CONFIG_MIN_RUNTIME_RESOURCES is not set | ||
51 | # CONFIG_BOOTLOADER_DRIVER is not set | ||
52 | CONFIG_BOOTLOADER_FAMILY="R2" | ||
53 | CONFIG_CSRC_POWERTV=y | ||
54 | CONFIG_RWSEM_GENERIC_SPINLOCK=y | ||
55 | # CONFIG_ARCH_HAS_ILOG2_U32 is not set | ||
56 | # CONFIG_ARCH_HAS_ILOG2_U64 is not set | ||
57 | CONFIG_ARCH_SUPPORTS_OPROFILE=y | ||
58 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
59 | CONFIG_GENERIC_HWEIGHT=y | ||
60 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
61 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
62 | CONFIG_GENERIC_TIME=y | ||
63 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
64 | CONFIG_SCHED_OMIT_FRAME_POINTER=y | ||
65 | CONFIG_GENERIC_HARDIRQS_NO__DO_IRQ=y | ||
66 | CONFIG_CEVT_R4K_LIB=y | ||
67 | CONFIG_CEVT_R4K=y | ||
68 | CONFIG_DMA_NONCOHERENT=y | ||
69 | CONFIG_DMA_NEED_PCI_MAP_STATE=y | ||
70 | # CONFIG_EARLY_PRINTK is not set | ||
71 | CONFIG_SYS_HAS_EARLY_PRINTK=y | ||
72 | # CONFIG_NO_IOPORT is not set | ||
73 | CONFIG_CPU_BIG_ENDIAN=y | ||
74 | # CONFIG_CPU_LITTLE_ENDIAN is not set | ||
75 | CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y | ||
76 | CONFIG_BOOT_ELF32=y | ||
77 | CONFIG_MIPS_L1_CACHE_SHIFT=5 | ||
78 | |||
79 | # | ||
80 | # CPU selection | ||
81 | # | ||
82 | # CONFIG_CPU_LOONGSON2 is not set | ||
83 | # CONFIG_CPU_MIPS32_R1 is not set | ||
84 | CONFIG_CPU_MIPS32_R2=y | ||
85 | # CONFIG_CPU_MIPS64_R1 is not set | ||
86 | # CONFIG_CPU_MIPS64_R2 is not set | ||
87 | # CONFIG_CPU_R3000 is not set | ||
88 | # CONFIG_CPU_TX39XX is not set | ||
89 | # CONFIG_CPU_VR41XX is not set | ||
90 | # CONFIG_CPU_R4300 is not set | ||
91 | # CONFIG_CPU_R4X00 is not set | ||
92 | # CONFIG_CPU_TX49XX is not set | ||
93 | # CONFIG_CPU_R5000 is not set | ||
94 | # CONFIG_CPU_R5432 is not set | ||
95 | # CONFIG_CPU_R5500 is not set | ||
96 | # CONFIG_CPU_R6000 is not set | ||
97 | # CONFIG_CPU_NEVADA is not set | ||
98 | # CONFIG_CPU_R8000 is not set | ||
99 | # CONFIG_CPU_R10000 is not set | ||
100 | # CONFIG_CPU_RM7000 is not set | ||
101 | # CONFIG_CPU_RM9000 is not set | ||
102 | # CONFIG_CPU_SB1 is not set | ||
103 | # CONFIG_CPU_CAVIUM_OCTEON is not set | ||
104 | CONFIG_SYS_HAS_CPU_MIPS32_R2=y | ||
105 | CONFIG_CPU_MIPS32=y | ||
106 | CONFIG_CPU_MIPSR2=y | ||
107 | CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y | ||
108 | CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y | ||
109 | CONFIG_HARDWARE_WATCHPOINTS=y | ||
110 | |||
111 | # | ||
112 | # Kernel type | ||
113 | # | ||
114 | CONFIG_32BIT=y | ||
115 | # CONFIG_64BIT is not set | ||
116 | CONFIG_PAGE_SIZE_4KB=y | ||
117 | # CONFIG_PAGE_SIZE_8KB is not set | ||
118 | # CONFIG_PAGE_SIZE_16KB is not set | ||
119 | # CONFIG_PAGE_SIZE_32KB is not set | ||
120 | # CONFIG_PAGE_SIZE_64KB is not set | ||
121 | CONFIG_CPU_HAS_PREFETCH=y | ||
122 | CONFIG_MIPS_MT_DISABLED=y | ||
123 | # CONFIG_MIPS_MT_SMP is not set | ||
124 | # CONFIG_MIPS_MT_SMTC is not set | ||
125 | CONFIG_CPU_HAS_LLSC=y | ||
126 | CONFIG_CPU_MIPSR2_IRQ_VI=y | ||
127 | CONFIG_CPU_MIPSR2_IRQ_EI=y | ||
128 | CONFIG_CPU_HAS_SYNC=y | ||
129 | CONFIG_GENERIC_HARDIRQS=y | ||
130 | CONFIG_GENERIC_IRQ_PROBE=y | ||
131 | # CONFIG_HIGHMEM is not set | ||
132 | CONFIG_CPU_SUPPORTS_HIGHMEM=y | ||
133 | CONFIG_SYS_SUPPORTS_HIGHMEM=y | ||
134 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
135 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
136 | CONFIG_SELECT_MEMORY_MODEL=y | ||
137 | CONFIG_FLATMEM_MANUAL=y | ||
138 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
139 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
140 | CONFIG_FLATMEM=y | ||
141 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
142 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
143 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
144 | # CONFIG_PHYS_ADDR_T_64BIT is not set | ||
145 | CONFIG_ZONE_DMA_FLAG=0 | ||
146 | CONFIG_VIRT_TO_BUS=y | ||
147 | CONFIG_HAVE_MLOCK=y | ||
148 | CONFIG_HAVE_MLOCKED_PAGE_BIT=y | ||
149 | CONFIG_DEFAULT_MMAP_MIN_ADDR=4096 | ||
150 | CONFIG_TICK_ONESHOT=y | ||
151 | CONFIG_NO_HZ=y | ||
152 | CONFIG_HIGH_RES_TIMERS=y | ||
153 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
154 | # CONFIG_HZ_48 is not set | ||
155 | # CONFIG_HZ_100 is not set | ||
156 | # CONFIG_HZ_128 is not set | ||
157 | # CONFIG_HZ_250 is not set | ||
158 | # CONFIG_HZ_256 is not set | ||
159 | CONFIG_HZ_1000=y | ||
160 | # CONFIG_HZ_1024 is not set | ||
161 | CONFIG_SYS_SUPPORTS_ARBIT_HZ=y | ||
162 | CONFIG_HZ=1000 | ||
163 | # CONFIG_PREEMPT_NONE is not set | ||
164 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
165 | CONFIG_PREEMPT=y | ||
166 | # CONFIG_KEXEC is not set | ||
167 | # CONFIG_SECCOMP is not set | ||
168 | CONFIG_LOCKDEP_SUPPORT=y | ||
169 | CONFIG_STACKTRACE_SUPPORT=y | ||
170 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
171 | CONFIG_CONSTRUCTORS=y | ||
172 | |||
173 | # | ||
174 | # General setup | ||
175 | # | ||
176 | CONFIG_EXPERIMENTAL=y | ||
177 | CONFIG_BROKEN_ON_SMP=y | ||
178 | CONFIG_LOCK_KERNEL=y | ||
179 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
180 | CONFIG_LOCALVERSION="" | ||
181 | CONFIG_LOCALVERSION_AUTO=y | ||
182 | # CONFIG_SWAP is not set | ||
183 | CONFIG_SYSVIPC=y | ||
184 | CONFIG_SYSVIPC_SYSCTL=y | ||
185 | # CONFIG_POSIX_MQUEUE is not set | ||
186 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
187 | # CONFIG_TASKSTATS is not set | ||
188 | # CONFIG_AUDIT is not set | ||
189 | |||
190 | # | ||
191 | # RCU Subsystem | ||
192 | # | ||
193 | CONFIG_CLASSIC_RCU=y | ||
194 | # CONFIG_TREE_RCU is not set | ||
195 | # CONFIG_PREEMPT_RCU is not set | ||
196 | # CONFIG_TREE_RCU_TRACE is not set | ||
197 | # CONFIG_PREEMPT_RCU_TRACE is not set | ||
198 | # CONFIG_IKCONFIG is not set | ||
199 | CONFIG_LOG_BUF_SHIFT=16 | ||
200 | CONFIG_GROUP_SCHED=y | ||
201 | CONFIG_FAIR_GROUP_SCHED=y | ||
202 | # CONFIG_RT_GROUP_SCHED is not set | ||
203 | CONFIG_USER_SCHED=y | ||
204 | # CONFIG_CGROUP_SCHED is not set | ||
205 | # CONFIG_CGROUPS is not set | ||
206 | # CONFIG_SYSFS_DEPRECATED_V2 is not set | ||
207 | CONFIG_RELAY=y | ||
208 | # CONFIG_NAMESPACES is not set | ||
209 | CONFIG_BLK_DEV_INITRD=y | ||
210 | CONFIG_INITRAMFS_SOURCE="" | ||
211 | # CONFIG_RD_GZIP is not set | ||
212 | # CONFIG_RD_BZIP2 is not set | ||
213 | # CONFIG_RD_LZMA is not set | ||
214 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
215 | CONFIG_SYSCTL=y | ||
216 | CONFIG_ANON_INODES=y | ||
217 | CONFIG_EMBEDDED=y | ||
218 | # CONFIG_SYSCTL_SYSCALL is not set | ||
219 | CONFIG_KALLSYMS=y | ||
220 | CONFIG_KALLSYMS_ALL=y | ||
221 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
222 | CONFIG_HOTPLUG=y | ||
223 | CONFIG_PRINTK=y | ||
224 | CONFIG_BUG=y | ||
225 | CONFIG_ELF_CORE=y | ||
226 | # CONFIG_PCSPKR_PLATFORM is not set | ||
227 | CONFIG_BASE_FULL=y | ||
228 | CONFIG_FUTEX=y | ||
229 | # CONFIG_EPOLL is not set | ||
230 | # CONFIG_SIGNALFD is not set | ||
231 | CONFIG_TIMERFD=y | ||
232 | # CONFIG_EVENTFD is not set | ||
233 | CONFIG_SHMEM=y | ||
234 | CONFIG_AIO=y | ||
235 | |||
236 | # | ||
237 | # Performance Counters | ||
238 | # | ||
239 | # CONFIG_VM_EVENT_COUNTERS is not set | ||
240 | CONFIG_PCI_QUIRKS=y | ||
241 | # CONFIG_SLUB_DEBUG is not set | ||
242 | # CONFIG_STRIP_ASM_SYMS is not set | ||
243 | CONFIG_COMPAT_BRK=y | ||
244 | # CONFIG_SLAB is not set | ||
245 | CONFIG_SLUB=y | ||
246 | # CONFIG_SLOB is not set | ||
247 | # CONFIG_PROFILING is not set | ||
248 | # CONFIG_MARKERS is not set | ||
249 | CONFIG_HAVE_OPROFILE=y | ||
250 | |||
251 | # | ||
252 | # GCOV-based kernel profiling | ||
253 | # | ||
254 | # CONFIG_GCOV_KERNEL is not set | ||
255 | # CONFIG_SLOW_WORK is not set | ||
256 | # CONFIG_HAVE_GENERIC_DMA_COHERENT is not set | ||
257 | CONFIG_RT_MUTEXES=y | ||
258 | CONFIG_BASE_SMALL=0 | ||
259 | CONFIG_MODULES=y | ||
260 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
261 | CONFIG_MODULE_UNLOAD=y | ||
262 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
263 | CONFIG_MODVERSIONS=y | ||
264 | CONFIG_MODULE_SRCVERSION_ALL=y | ||
265 | CONFIG_BLOCK=y | ||
266 | CONFIG_LBDAF=y | ||
267 | # CONFIG_BLK_DEV_BSG is not set | ||
268 | # CONFIG_BLK_DEV_INTEGRITY is not set | ||
269 | |||
270 | # | ||
271 | # IO Schedulers | ||
272 | # | ||
273 | CONFIG_IOSCHED_NOOP=y | ||
274 | # CONFIG_IOSCHED_AS is not set | ||
275 | # CONFIG_IOSCHED_DEADLINE is not set | ||
276 | # CONFIG_IOSCHED_CFQ is not set | ||
277 | # CONFIG_DEFAULT_AS is not set | ||
278 | # CONFIG_DEFAULT_DEADLINE is not set | ||
279 | # CONFIG_DEFAULT_CFQ is not set | ||
280 | CONFIG_DEFAULT_NOOP=y | ||
281 | CONFIG_DEFAULT_IOSCHED="noop" | ||
282 | # CONFIG_PROBE_INITRD_HEADER is not set | ||
283 | # CONFIG_FREEZER is not set | ||
284 | |||
285 | # | ||
286 | # Bus options (PCI, PCMCIA, EISA, ISA, TC) | ||
287 | # | ||
288 | CONFIG_HW_HAS_PCI=y | ||
289 | CONFIG_PCI=y | ||
290 | CONFIG_PCI_DOMAINS=y | ||
291 | # CONFIG_ARCH_SUPPORTS_MSI is not set | ||
292 | # CONFIG_PCI_LEGACY is not set | ||
293 | # CONFIG_PCI_DEBUG is not set | ||
294 | # CONFIG_PCI_STUB is not set | ||
295 | # CONFIG_PCI_IOV is not set | ||
296 | CONFIG_MMU=y | ||
297 | # CONFIG_PCCARD is not set | ||
298 | # CONFIG_HOTPLUG_PCI is not set | ||
299 | |||
300 | # | ||
301 | # Executable file formats | ||
302 | # | ||
303 | CONFIG_BINFMT_ELF=y | ||
304 | # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set | ||
305 | # CONFIG_HAVE_AOUT is not set | ||
306 | # CONFIG_BINFMT_MISC is not set | ||
307 | CONFIG_TRAD_SIGNALS=y | ||
308 | |||
309 | # | ||
310 | # Power management options | ||
311 | # | ||
312 | CONFIG_ARCH_HIBERNATION_POSSIBLE=y | ||
313 | CONFIG_ARCH_SUSPEND_POSSIBLE=y | ||
314 | # CONFIG_PM is not set | ||
315 | CONFIG_NET=y | ||
316 | |||
317 | # | ||
318 | # Networking options | ||
319 | # | ||
320 | CONFIG_PACKET=y | ||
321 | CONFIG_PACKET_MMAP=y | ||
322 | CONFIG_UNIX=y | ||
323 | CONFIG_XFRM=y | ||
324 | # CONFIG_XFRM_USER is not set | ||
325 | # CONFIG_XFRM_SUB_POLICY is not set | ||
326 | # CONFIG_XFRM_MIGRATE is not set | ||
327 | # CONFIG_XFRM_STATISTICS is not set | ||
328 | CONFIG_XFRM_IPCOMP=y | ||
329 | # CONFIG_NET_KEY is not set | ||
330 | CONFIG_INET=y | ||
331 | CONFIG_IP_MULTICAST=y | ||
332 | CONFIG_IP_ADVANCED_ROUTER=y | ||
333 | CONFIG_ASK_IP_FIB_HASH=y | ||
334 | # CONFIG_IP_FIB_TRIE is not set | ||
335 | CONFIG_IP_FIB_HASH=y | ||
336 | # CONFIG_IP_MULTIPLE_TABLES is not set | ||
337 | # CONFIG_IP_ROUTE_MULTIPATH is not set | ||
338 | # CONFIG_IP_ROUTE_VERBOSE is not set | ||
339 | CONFIG_IP_PNP=y | ||
340 | # CONFIG_IP_PNP_DHCP is not set | ||
341 | # CONFIG_IP_PNP_BOOTP is not set | ||
342 | # CONFIG_IP_PNP_RARP is not set | ||
343 | # CONFIG_NET_IPIP is not set | ||
344 | # CONFIG_NET_IPGRE is not set | ||
345 | # CONFIG_IP_MROUTE is not set | ||
346 | # CONFIG_ARPD is not set | ||
347 | CONFIG_SYN_COOKIES=y | ||
348 | # CONFIG_INET_AH is not set | ||
349 | # CONFIG_INET_ESP is not set | ||
350 | # CONFIG_INET_IPCOMP is not set | ||
351 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
352 | # CONFIG_INET_TUNNEL is not set | ||
353 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
354 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
355 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
356 | # CONFIG_INET_LRO is not set | ||
357 | # CONFIG_INET_DIAG is not set | ||
358 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
359 | CONFIG_TCP_CONG_CUBIC=y | ||
360 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
361 | # CONFIG_TCP_MD5SIG is not set | ||
362 | CONFIG_IPV6=y | ||
363 | CONFIG_IPV6_PRIVACY=y | ||
364 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
365 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
366 | CONFIG_INET6_AH=y | ||
367 | CONFIG_INET6_ESP=y | ||
368 | CONFIG_INET6_IPCOMP=y | ||
369 | # CONFIG_IPV6_MIP6 is not set | ||
370 | CONFIG_INET6_XFRM_TUNNEL=y | ||
371 | CONFIG_INET6_TUNNEL=y | ||
372 | # CONFIG_INET6_XFRM_MODE_TRANSPORT is not set | ||
373 | # CONFIG_INET6_XFRM_MODE_TUNNEL is not set | ||
374 | # CONFIG_INET6_XFRM_MODE_BEET is not set | ||
375 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
376 | # CONFIG_IPV6_SIT is not set | ||
377 | CONFIG_IPV6_TUNNEL=y | ||
378 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
379 | # CONFIG_IPV6_MROUTE is not set | ||
380 | # CONFIG_NETWORK_SECMARK is not set | ||
381 | CONFIG_NETFILTER=y | ||
382 | # CONFIG_NETFILTER_DEBUG is not set | ||
383 | CONFIG_NETFILTER_ADVANCED=y | ||
384 | # CONFIG_BRIDGE_NETFILTER is not set | ||
385 | |||
386 | # | ||
387 | # Core Netfilter Configuration | ||
388 | # | ||
389 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
390 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
391 | # CONFIG_NF_CONNTRACK is not set | ||
392 | CONFIG_NETFILTER_XTABLES=y | ||
393 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set | ||
394 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set | ||
395 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set | ||
396 | # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set | ||
397 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | ||
398 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set | ||
399 | # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set | ||
400 | # CONFIG_NETFILTER_XT_MATCH_DCCP is not set | ||
401 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set | ||
402 | # CONFIG_NETFILTER_XT_MATCH_ESP is not set | ||
403 | # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set | ||
404 | # CONFIG_NETFILTER_XT_MATCH_HL is not set | ||
405 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | ||
406 | # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set | ||
407 | # CONFIG_NETFILTER_XT_MATCH_LIMIT is not set | ||
408 | # CONFIG_NETFILTER_XT_MATCH_MAC is not set | ||
409 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set | ||
410 | CONFIG_NETFILTER_XT_MATCH_MULTIPORT=y | ||
411 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | ||
412 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set | ||
413 | # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set | ||
414 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | ||
415 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | ||
416 | # CONFIG_NETFILTER_XT_MATCH_REALM is not set | ||
417 | # CONFIG_NETFILTER_XT_MATCH_RECENT is not set | ||
418 | # CONFIG_NETFILTER_XT_MATCH_SCTP is not set | ||
419 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | ||
420 | # CONFIG_NETFILTER_XT_MATCH_STRING is not set | ||
421 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set | ||
422 | # CONFIG_NETFILTER_XT_MATCH_TIME is not set | ||
423 | # CONFIG_NETFILTER_XT_MATCH_U32 is not set | ||
424 | # CONFIG_IP_VS is not set | ||
425 | |||
426 | # | ||
427 | # IP: Netfilter Configuration | ||
428 | # | ||
429 | # CONFIG_NF_DEFRAG_IPV4 is not set | ||
430 | # CONFIG_IP_NF_QUEUE is not set | ||
431 | CONFIG_IP_NF_IPTABLES=y | ||
432 | # CONFIG_IP_NF_MATCH_ADDRTYPE is not set | ||
433 | # CONFIG_IP_NF_MATCH_AH is not set | ||
434 | # CONFIG_IP_NF_MATCH_ECN is not set | ||
435 | # CONFIG_IP_NF_MATCH_TTL is not set | ||
436 | CONFIG_IP_NF_FILTER=y | ||
437 | # CONFIG_IP_NF_TARGET_REJECT is not set | ||
438 | # CONFIG_IP_NF_TARGET_LOG is not set | ||
439 | # CONFIG_IP_NF_TARGET_ULOG is not set | ||
440 | # CONFIG_IP_NF_MANGLE is not set | ||
441 | # CONFIG_IP_NF_TARGET_TTL is not set | ||
442 | # CONFIG_IP_NF_RAW is not set | ||
443 | CONFIG_IP_NF_ARPTABLES=y | ||
444 | CONFIG_IP_NF_ARPFILTER=y | ||
445 | # CONFIG_IP_NF_ARP_MANGLE is not set | ||
446 | |||
447 | # | ||
448 | # IPv6: Netfilter Configuration | ||
449 | # | ||
450 | # CONFIG_IP6_NF_QUEUE is not set | ||
451 | CONFIG_IP6_NF_IPTABLES=y | ||
452 | # CONFIG_IP6_NF_MATCH_AH is not set | ||
453 | # CONFIG_IP6_NF_MATCH_EUI64 is not set | ||
454 | # CONFIG_IP6_NF_MATCH_FRAG is not set | ||
455 | # CONFIG_IP6_NF_MATCH_OPTS is not set | ||
456 | # CONFIG_IP6_NF_MATCH_HL is not set | ||
457 | # CONFIG_IP6_NF_MATCH_IPV6HEADER is not set | ||
458 | # CONFIG_IP6_NF_MATCH_MH is not set | ||
459 | # CONFIG_IP6_NF_MATCH_RT is not set | ||
460 | # CONFIG_IP6_NF_TARGET_HL is not set | ||
461 | # CONFIG_IP6_NF_TARGET_LOG is not set | ||
462 | CONFIG_IP6_NF_FILTER=y | ||
463 | # CONFIG_IP6_NF_TARGET_REJECT is not set | ||
464 | # CONFIG_IP6_NF_MANGLE is not set | ||
465 | # CONFIG_IP6_NF_RAW is not set | ||
466 | # CONFIG_IP_DCCP is not set | ||
467 | # CONFIG_IP_SCTP is not set | ||
468 | # CONFIG_TIPC is not set | ||
469 | # CONFIG_ATM is not set | ||
470 | CONFIG_STP=y | ||
471 | CONFIG_BRIDGE=y | ||
472 | # CONFIG_NET_DSA is not set | ||
473 | # CONFIG_VLAN_8021Q is not set | ||
474 | # CONFIG_DECNET is not set | ||
475 | CONFIG_LLC=y | ||
476 | # CONFIG_LLC2 is not set | ||
477 | # CONFIG_IPX is not set | ||
478 | # CONFIG_ATALK is not set | ||
479 | # CONFIG_X25 is not set | ||
480 | # CONFIG_LAPB is not set | ||
481 | # CONFIG_ECONET is not set | ||
482 | # CONFIG_WAN_ROUTER is not set | ||
483 | # CONFIG_PHONET is not set | ||
484 | # CONFIG_IEEE802154 is not set | ||
485 | CONFIG_NET_SCHED=y | ||
486 | |||
487 | # | ||
488 | # Queueing/Scheduling | ||
489 | # | ||
490 | # CONFIG_NET_SCH_CBQ is not set | ||
491 | # CONFIG_NET_SCH_HTB is not set | ||
492 | # CONFIG_NET_SCH_HFSC is not set | ||
493 | # CONFIG_NET_SCH_PRIO is not set | ||
494 | # CONFIG_NET_SCH_MULTIQ is not set | ||
495 | # CONFIG_NET_SCH_RED is not set | ||
496 | # CONFIG_NET_SCH_SFQ is not set | ||
497 | # CONFIG_NET_SCH_TEQL is not set | ||
498 | CONFIG_NET_SCH_TBF=y | ||
499 | # CONFIG_NET_SCH_GRED is not set | ||
500 | # CONFIG_NET_SCH_DSMARK is not set | ||
501 | # CONFIG_NET_SCH_NETEM is not set | ||
502 | # CONFIG_NET_SCH_DRR is not set | ||
503 | |||
504 | # | ||
505 | # Classification | ||
506 | # | ||
507 | # CONFIG_NET_CLS_BASIC is not set | ||
508 | # CONFIG_NET_CLS_TCINDEX is not set | ||
509 | # CONFIG_NET_CLS_ROUTE4 is not set | ||
510 | # CONFIG_NET_CLS_FW is not set | ||
511 | # CONFIG_NET_CLS_U32 is not set | ||
512 | # CONFIG_NET_CLS_RSVP is not set | ||
513 | # CONFIG_NET_CLS_RSVP6 is not set | ||
514 | # CONFIG_NET_CLS_FLOW is not set | ||
515 | # CONFIG_NET_EMATCH is not set | ||
516 | # CONFIG_NET_CLS_ACT is not set | ||
517 | CONFIG_NET_SCH_FIFO=y | ||
518 | # CONFIG_DCB is not set | ||
519 | |||
520 | # | ||
521 | # Network testing | ||
522 | # | ||
523 | # CONFIG_NET_PKTGEN is not set | ||
524 | # CONFIG_HAMRADIO is not set | ||
525 | # CONFIG_CAN is not set | ||
526 | # CONFIG_IRDA is not set | ||
527 | # CONFIG_BT is not set | ||
528 | # CONFIG_AF_RXRPC is not set | ||
529 | # CONFIG_WIRELESS is not set | ||
530 | # CONFIG_WIMAX is not set | ||
531 | # CONFIG_RFKILL is not set | ||
532 | # CONFIG_NET_9P is not set | ||
533 | |||
534 | # | ||
535 | # Device Drivers | ||
536 | # | ||
537 | |||
538 | # | ||
539 | # Generic Driver Options | ||
540 | # | ||
541 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
542 | CONFIG_STANDALONE=y | ||
543 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
544 | CONFIG_FW_LOADER=y | ||
545 | CONFIG_FIRMWARE_IN_KERNEL=y | ||
546 | CONFIG_EXTRA_FIRMWARE="" | ||
547 | # CONFIG_DEBUG_DRIVER is not set | ||
548 | # CONFIG_DEBUG_DEVRES is not set | ||
549 | # CONFIG_SYS_HYPERVISOR is not set | ||
550 | # CONFIG_CONNECTOR is not set | ||
551 | CONFIG_MTD=y | ||
552 | # CONFIG_MTD_DEBUG is not set | ||
553 | # CONFIG_MTD_CONCAT is not set | ||
554 | CONFIG_MTD_PARTITIONS=y | ||
555 | # CONFIG_MTD_TESTS is not set | ||
556 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
557 | CONFIG_MTD_CMDLINE_PARTS=y | ||
558 | # CONFIG_MTD_AR7_PARTS is not set | ||
559 | |||
560 | # | ||
561 | # User Modules And Translation Layers | ||
562 | # | ||
563 | CONFIG_MTD_CHAR=y | ||
564 | CONFIG_MTD_BLKDEVS=y | ||
565 | CONFIG_MTD_BLOCK=y | ||
566 | # CONFIG_FTL is not set | ||
567 | # CONFIG_NFTL is not set | ||
568 | # CONFIG_INFTL is not set | ||
569 | # CONFIG_RFD_FTL is not set | ||
570 | # CONFIG_SSFDC is not set | ||
571 | # CONFIG_MTD_OOPS is not set | ||
572 | |||
573 | # | ||
574 | # RAM/ROM/Flash chip drivers | ||
575 | # | ||
576 | # CONFIG_MTD_CFI is not set | ||
577 | # CONFIG_MTD_JEDECPROBE is not set | ||
578 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
579 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
580 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
581 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
582 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
583 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
584 | CONFIG_MTD_CFI_I1=y | ||
585 | CONFIG_MTD_CFI_I2=y | ||
586 | # CONFIG_MTD_CFI_I4 is not set | ||
587 | # CONFIG_MTD_CFI_I8 is not set | ||
588 | # CONFIG_MTD_RAM is not set | ||
589 | # CONFIG_MTD_ROM is not set | ||
590 | # CONFIG_MTD_ABSENT is not set | ||
591 | |||
592 | # | ||
593 | # Mapping drivers for chip access | ||
594 | # | ||
595 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
596 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
597 | # CONFIG_MTD_PLATRAM is not set | ||
598 | |||
599 | # | ||
600 | # Self-contained MTD device drivers | ||
601 | # | ||
602 | # CONFIG_MTD_PMC551 is not set | ||
603 | # CONFIG_MTD_SLRAM is not set | ||
604 | # CONFIG_MTD_PHRAM is not set | ||
605 | # CONFIG_MTD_MTDRAM is not set | ||
606 | # CONFIG_MTD_BLOCK2MTD is not set | ||
607 | |||
608 | # | ||
609 | # Disk-On-Chip Device Drivers | ||
610 | # | ||
611 | # CONFIG_MTD_DOC2000 is not set | ||
612 | # CONFIG_MTD_DOC2001 is not set | ||
613 | # CONFIG_MTD_DOC2001PLUS is not set | ||
614 | CONFIG_MTD_NAND=y | ||
615 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
616 | # CONFIG_MTD_NAND_ECC_SMC is not set | ||
617 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
618 | CONFIG_MTD_NAND_IDS=y | ||
619 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
620 | # CONFIG_MTD_NAND_CAFE is not set | ||
621 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
622 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
623 | # CONFIG_MTD_ALAUDA is not set | ||
624 | # CONFIG_MTD_ONENAND is not set | ||
625 | |||
626 | # | ||
627 | # LPDDR flash memory drivers | ||
628 | # | ||
629 | # CONFIG_MTD_LPDDR is not set | ||
630 | |||
631 | # | ||
632 | # UBI - Unsorted block images | ||
633 | # | ||
634 | # CONFIG_MTD_UBI is not set | ||
635 | # CONFIG_PARPORT is not set | ||
636 | CONFIG_BLK_DEV=y | ||
637 | # CONFIG_BLK_CPQ_DA is not set | ||
638 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
639 | # CONFIG_BLK_DEV_DAC960 is not set | ||
640 | # CONFIG_BLK_DEV_UMEM is not set | ||
641 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
642 | CONFIG_BLK_DEV_LOOP=y | ||
643 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
644 | # CONFIG_BLK_DEV_NBD is not set | ||
645 | # CONFIG_BLK_DEV_SX8 is not set | ||
646 | # CONFIG_BLK_DEV_UB is not set | ||
647 | CONFIG_BLK_DEV_RAM=y | ||
648 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
649 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
650 | # CONFIG_BLK_DEV_XIP is not set | ||
651 | # CONFIG_CDROM_PKTCDVD is not set | ||
652 | # CONFIG_ATA_OVER_ETH is not set | ||
653 | # CONFIG_BLK_DEV_HD is not set | ||
654 | # CONFIG_MISC_DEVICES is not set | ||
655 | CONFIG_HAVE_IDE=y | ||
656 | # CONFIG_IDE is not set | ||
657 | |||
658 | # | ||
659 | # SCSI device support | ||
660 | # | ||
661 | # CONFIG_RAID_ATTRS is not set | ||
662 | CONFIG_SCSI=y | ||
663 | CONFIG_SCSI_DMA=y | ||
664 | # CONFIG_SCSI_TGT is not set | ||
665 | # CONFIG_SCSI_NETLINK is not set | ||
666 | # CONFIG_SCSI_PROC_FS is not set | ||
667 | |||
668 | # | ||
669 | # SCSI support type (disk, tape, CD-ROM) | ||
670 | # | ||
671 | CONFIG_BLK_DEV_SD=y | ||
672 | # CONFIG_CHR_DEV_ST is not set | ||
673 | # CONFIG_CHR_DEV_OSST is not set | ||
674 | # CONFIG_BLK_DEV_SR is not set | ||
675 | # CONFIG_CHR_DEV_SG is not set | ||
676 | # CONFIG_CHR_DEV_SCH is not set | ||
677 | # CONFIG_SCSI_MULTI_LUN is not set | ||
678 | # CONFIG_SCSI_CONSTANTS is not set | ||
679 | # CONFIG_SCSI_LOGGING is not set | ||
680 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
681 | CONFIG_SCSI_WAIT_SCAN=m | ||
682 | |||
683 | # | ||
684 | # SCSI Transports | ||
685 | # | ||
686 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
687 | # CONFIG_SCSI_FC_ATTRS is not set | ||
688 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
689 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
690 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
691 | # CONFIG_SCSI_LOWLEVEL is not set | ||
692 | # CONFIG_SCSI_DH is not set | ||
693 | # CONFIG_SCSI_OSD_INITIATOR is not set | ||
694 | CONFIG_ATA=y | ||
695 | # CONFIG_ATA_NONSTANDARD is not set | ||
696 | CONFIG_SATA_PMP=y | ||
697 | # CONFIG_SATA_AHCI is not set | ||
698 | # CONFIG_SATA_SIL24 is not set | ||
699 | CONFIG_ATA_SFF=y | ||
700 | # CONFIG_SATA_SVW is not set | ||
701 | # CONFIG_ATA_PIIX is not set | ||
702 | # CONFIG_SATA_MV is not set | ||
703 | # CONFIG_SATA_NV is not set | ||
704 | # CONFIG_PDC_ADMA is not set | ||
705 | # CONFIG_SATA_QSTOR is not set | ||
706 | # CONFIG_SATA_PROMISE is not set | ||
707 | # CONFIG_SATA_SX4 is not set | ||
708 | # CONFIG_SATA_SIL is not set | ||
709 | # CONFIG_SATA_SIS is not set | ||
710 | # CONFIG_SATA_ULI is not set | ||
711 | # CONFIG_SATA_VIA is not set | ||
712 | # CONFIG_SATA_VITESSE is not set | ||
713 | # CONFIG_SATA_INIC162X is not set | ||
714 | # CONFIG_PATA_ALI is not set | ||
715 | # CONFIG_PATA_AMD is not set | ||
716 | # CONFIG_PATA_ARTOP is not set | ||
717 | # CONFIG_PATA_ATIIXP is not set | ||
718 | # CONFIG_PATA_CMD640_PCI is not set | ||
719 | # CONFIG_PATA_CMD64X is not set | ||
720 | # CONFIG_PATA_CS5520 is not set | ||
721 | # CONFIG_PATA_CS5530 is not set | ||
722 | # CONFIG_PATA_CYPRESS is not set | ||
723 | # CONFIG_PATA_EFAR is not set | ||
724 | # CONFIG_ATA_GENERIC is not set | ||
725 | # CONFIG_PATA_HPT366 is not set | ||
726 | # CONFIG_PATA_HPT37X is not set | ||
727 | # CONFIG_PATA_HPT3X2N is not set | ||
728 | # CONFIG_PATA_HPT3X3 is not set | ||
729 | # CONFIG_PATA_IT821X is not set | ||
730 | # CONFIG_PATA_IT8213 is not set | ||
731 | # CONFIG_PATA_JMICRON is not set | ||
732 | # CONFIG_PATA_TRIFLEX is not set | ||
733 | # CONFIG_PATA_MARVELL is not set | ||
734 | # CONFIG_PATA_MPIIX is not set | ||
735 | # CONFIG_PATA_OLDPIIX is not set | ||
736 | # CONFIG_PATA_NETCELL is not set | ||
737 | # CONFIG_PATA_NINJA32 is not set | ||
738 | # CONFIG_PATA_NS87410 is not set | ||
739 | # CONFIG_PATA_NS87415 is not set | ||
740 | # CONFIG_PATA_OPTI is not set | ||
741 | # CONFIG_PATA_OPTIDMA is not set | ||
742 | # CONFIG_PATA_PDC_OLD is not set | ||
743 | # CONFIG_PATA_RADISYS is not set | ||
744 | # CONFIG_PATA_RZ1000 is not set | ||
745 | # CONFIG_PATA_SC1200 is not set | ||
746 | # CONFIG_PATA_SERVERWORKS is not set | ||
747 | # CONFIG_PATA_PDC2027X is not set | ||
748 | # CONFIG_PATA_SIL680 is not set | ||
749 | # CONFIG_PATA_SIS is not set | ||
750 | # CONFIG_PATA_VIA is not set | ||
751 | # CONFIG_PATA_WINBOND is not set | ||
752 | # CONFIG_PATA_PLATFORM is not set | ||
753 | # CONFIG_PATA_SCH is not set | ||
754 | # CONFIG_MD is not set | ||
755 | # CONFIG_FUSION is not set | ||
756 | |||
757 | # | ||
758 | # IEEE 1394 (FireWire) support | ||
759 | # | ||
760 | |||
761 | # | ||
762 | # You can enable one or both FireWire driver stacks. | ||
763 | # | ||
764 | |||
765 | # | ||
766 | # See the help texts for more information. | ||
767 | # | ||
768 | # CONFIG_FIREWIRE is not set | ||
769 | # CONFIG_IEEE1394 is not set | ||
770 | # CONFIG_I2O is not set | ||
771 | CONFIG_NETDEVICES=y | ||
772 | # CONFIG_DUMMY is not set | ||
773 | # CONFIG_BONDING is not set | ||
774 | # CONFIG_MACVLAN is not set | ||
775 | # CONFIG_EQUALIZER is not set | ||
776 | # CONFIG_TUN is not set | ||
777 | # CONFIG_VETH is not set | ||
778 | # CONFIG_ARCNET is not set | ||
779 | # CONFIG_PHYLIB is not set | ||
780 | CONFIG_NET_ETHERNET=y | ||
781 | CONFIG_MII=y | ||
782 | # CONFIG_AX88796 is not set | ||
783 | # CONFIG_HAPPYMEAL is not set | ||
784 | # CONFIG_SUNGEM is not set | ||
785 | # CONFIG_CASSINI is not set | ||
786 | # CONFIG_NET_VENDOR_3COM is not set | ||
787 | # CONFIG_SMC91X is not set | ||
788 | # CONFIG_DM9000 is not set | ||
789 | # CONFIG_ETHOC is not set | ||
790 | # CONFIG_DNET is not set | ||
791 | # CONFIG_NET_TULIP is not set | ||
792 | # CONFIG_HP100 is not set | ||
793 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
794 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
795 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
796 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
797 | # CONFIG_IBM_NEW_EMAC_NO_FLOW_CTRL is not set | ||
798 | # CONFIG_IBM_NEW_EMAC_MAL_CLR_ICINTSTAT is not set | ||
799 | # CONFIG_IBM_NEW_EMAC_MAL_COMMON_ERR is not set | ||
800 | # CONFIG_NET_PCI is not set | ||
801 | # CONFIG_B44 is not set | ||
802 | # CONFIG_KS8842 is not set | ||
803 | # CONFIG_ATL2 is not set | ||
804 | CONFIG_NETDEV_1000=y | ||
805 | # CONFIG_ACENIC is not set | ||
806 | # CONFIG_DL2K is not set | ||
807 | # CONFIG_E1000 is not set | ||
808 | # CONFIG_E1000E is not set | ||
809 | # CONFIG_IP1000 is not set | ||
810 | # CONFIG_IGB is not set | ||
811 | # CONFIG_IGBVF is not set | ||
812 | # CONFIG_NS83820 is not set | ||
813 | # CONFIG_HAMACHI is not set | ||
814 | # CONFIG_YELLOWFIN is not set | ||
815 | # CONFIG_R8169 is not set | ||
816 | # CONFIG_SIS190 is not set | ||
817 | # CONFIG_SKGE is not set | ||
818 | # CONFIG_SKY2 is not set | ||
819 | # CONFIG_VIA_VELOCITY is not set | ||
820 | # CONFIG_TIGON3 is not set | ||
821 | # CONFIG_BNX2 is not set | ||
822 | # CONFIG_CNIC is not set | ||
823 | # CONFIG_QLA3XXX is not set | ||
824 | # CONFIG_ATL1 is not set | ||
825 | # CONFIG_ATL1E is not set | ||
826 | # CONFIG_ATL1C is not set | ||
827 | # CONFIG_JME is not set | ||
828 | CONFIG_NETDEV_10000=y | ||
829 | # CONFIG_CHELSIO_T1 is not set | ||
830 | CONFIG_CHELSIO_T3_DEPENDS=y | ||
831 | # CONFIG_CHELSIO_T3 is not set | ||
832 | # CONFIG_ENIC is not set | ||
833 | # CONFIG_IXGBE is not set | ||
834 | # CONFIG_IXGB is not set | ||
835 | # CONFIG_S2IO is not set | ||
836 | # CONFIG_VXGE is not set | ||
837 | # CONFIG_MYRI10GE is not set | ||
838 | # CONFIG_NETXEN_NIC is not set | ||
839 | # CONFIG_NIU is not set | ||
840 | # CONFIG_MLX4_EN is not set | ||
841 | # CONFIG_MLX4_CORE is not set | ||
842 | # CONFIG_TEHUTI is not set | ||
843 | # CONFIG_BNX2X is not set | ||
844 | # CONFIG_QLGE is not set | ||
845 | # CONFIG_SFC is not set | ||
846 | # CONFIG_BE2NET is not set | ||
847 | # CONFIG_TR is not set | ||
848 | |||
849 | # | ||
850 | # Wireless LAN | ||
851 | # | ||
852 | # CONFIG_WLAN_PRE80211 is not set | ||
853 | # CONFIG_WLAN_80211 is not set | ||
854 | |||
855 | # | ||
856 | # Enable WiMAX (Networking options) to see the WiMAX drivers | ||
857 | # | ||
858 | |||
859 | # | ||
860 | # USB Network Adapters | ||
861 | # | ||
862 | # CONFIG_USB_CATC is not set | ||
863 | # CONFIG_USB_KAWETH is not set | ||
864 | # CONFIG_USB_PEGASUS is not set | ||
865 | CONFIG_USB_RTL8150=y | ||
866 | # CONFIG_USB_USBNET is not set | ||
867 | # CONFIG_WAN is not set | ||
868 | # CONFIG_FDDI is not set | ||
869 | # CONFIG_HIPPI is not set | ||
870 | # CONFIG_PPP is not set | ||
871 | # CONFIG_SLIP is not set | ||
872 | # CONFIG_NET_FC is not set | ||
873 | # CONFIG_NETCONSOLE is not set | ||
874 | # CONFIG_NETPOLL is not set | ||
875 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
876 | # CONFIG_ISDN is not set | ||
877 | # CONFIG_PHONE is not set | ||
878 | |||
879 | # | ||
880 | # Input device support | ||
881 | # | ||
882 | CONFIG_INPUT=y | ||
883 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
884 | # CONFIG_INPUT_POLLDEV is not set | ||
885 | |||
886 | # | ||
887 | # Userland interfaces | ||
888 | # | ||
889 | # CONFIG_INPUT_MOUSEDEV is not set | ||
890 | # CONFIG_INPUT_JOYDEV is not set | ||
891 | CONFIG_INPUT_EVDEV=y | ||
892 | # CONFIG_INPUT_EVBUG is not set | ||
893 | |||
894 | # | ||
895 | # Input Device Drivers | ||
896 | # | ||
897 | # CONFIG_INPUT_KEYBOARD is not set | ||
898 | # CONFIG_INPUT_MOUSE is not set | ||
899 | # CONFIG_INPUT_JOYSTICK is not set | ||
900 | # CONFIG_INPUT_TABLET is not set | ||
901 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
902 | # CONFIG_INPUT_MISC is not set | ||
903 | |||
904 | # | ||
905 | # Hardware I/O ports | ||
906 | # | ||
907 | # CONFIG_SERIO is not set | ||
908 | # CONFIG_GAMEPORT is not set | ||
909 | |||
910 | # | ||
911 | # Character devices | ||
912 | # | ||
913 | # CONFIG_VT is not set | ||
914 | # CONFIG_DEVKMEM is not set | ||
915 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
916 | # CONFIG_NOZOMI is not set | ||
917 | |||
918 | # | ||
919 | # Serial drivers | ||
920 | # | ||
921 | # CONFIG_SERIAL_8250 is not set | ||
922 | |||
923 | # | ||
924 | # Non-8250 serial port support | ||
925 | # | ||
926 | # CONFIG_SERIAL_JSM is not set | ||
927 | CONFIG_UNIX98_PTYS=y | ||
928 | # CONFIG_DEVPTS_MULTIPLE_INSTANCES is not set | ||
929 | # CONFIG_LEGACY_PTYS is not set | ||
930 | # CONFIG_IPMI_HANDLER is not set | ||
931 | # CONFIG_HW_RANDOM is not set | ||
932 | # CONFIG_R3964 is not set | ||
933 | # CONFIG_APPLICOM is not set | ||
934 | # CONFIG_RAW_DRIVER is not set | ||
935 | # CONFIG_TCG_TPM is not set | ||
936 | CONFIG_DEVPORT=y | ||
937 | # CONFIG_I2C is not set | ||
938 | # CONFIG_SPI is not set | ||
939 | |||
940 | # | ||
941 | # PPS support | ||
942 | # | ||
943 | # CONFIG_PPS is not set | ||
944 | # CONFIG_W1 is not set | ||
945 | # CONFIG_POWER_SUPPLY is not set | ||
946 | # CONFIG_HWMON is not set | ||
947 | # CONFIG_THERMAL is not set | ||
948 | # CONFIG_THERMAL_HWMON is not set | ||
949 | # CONFIG_WATCHDOG is not set | ||
950 | CONFIG_SSB_POSSIBLE=y | ||
951 | |||
952 | # | ||
953 | # Sonics Silicon Backplane | ||
954 | # | ||
955 | # CONFIG_SSB is not set | ||
956 | |||
957 | # | ||
958 | # Multifunction device drivers | ||
959 | # | ||
960 | # CONFIG_MFD_CORE is not set | ||
961 | # CONFIG_MFD_SM501 is not set | ||
962 | # CONFIG_HTC_PASIC3 is not set | ||
963 | # CONFIG_MFD_TMIO is not set | ||
964 | # CONFIG_REGULATOR is not set | ||
965 | # CONFIG_MEDIA_SUPPORT is not set | ||
966 | |||
967 | # | ||
968 | # Graphics support | ||
969 | # | ||
970 | # CONFIG_DRM is not set | ||
971 | # CONFIG_VGASTATE is not set | ||
972 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
973 | # CONFIG_FB is not set | ||
974 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
975 | |||
976 | # | ||
977 | # Display device support | ||
978 | # | ||
979 | # CONFIG_DISPLAY_SUPPORT is not set | ||
980 | # CONFIG_SOUND is not set | ||
981 | CONFIG_HID_SUPPORT=y | ||
982 | CONFIG_HID=y | ||
983 | # CONFIG_HID_DEBUG is not set | ||
984 | # CONFIG_HIDRAW is not set | ||
985 | |||
986 | # | ||
987 | # USB Input Devices | ||
988 | # | ||
989 | CONFIG_USB_HID=y | ||
990 | # CONFIG_HID_PID is not set | ||
991 | CONFIG_USB_HIDDEV=y | ||
992 | |||
993 | # | ||
994 | # Special HID drivers | ||
995 | # | ||
996 | # CONFIG_HID_A4TECH is not set | ||
997 | # CONFIG_HID_APPLE is not set | ||
998 | # CONFIG_HID_BELKIN is not set | ||
999 | # CONFIG_HID_CHERRY is not set | ||
1000 | # CONFIG_HID_CHICONY is not set | ||
1001 | # CONFIG_HID_CYPRESS is not set | ||
1002 | # CONFIG_HID_DRAGONRISE is not set | ||
1003 | # CONFIG_HID_EZKEY is not set | ||
1004 | # CONFIG_HID_KYE is not set | ||
1005 | # CONFIG_HID_GYRATION is not set | ||
1006 | # CONFIG_HID_KENSINGTON is not set | ||
1007 | # CONFIG_HID_LOGITECH is not set | ||
1008 | # CONFIG_HID_MICROSOFT is not set | ||
1009 | # CONFIG_HID_MONTEREY is not set | ||
1010 | # CONFIG_HID_NTRIG is not set | ||
1011 | # CONFIG_HID_PANTHERLORD is not set | ||
1012 | # CONFIG_HID_PETALYNX is not set | ||
1013 | # CONFIG_HID_SAMSUNG is not set | ||
1014 | # CONFIG_HID_SONY is not set | ||
1015 | # CONFIG_HID_SUNPLUS is not set | ||
1016 | # CONFIG_HID_GREENASIA is not set | ||
1017 | # CONFIG_HID_SMARTJOYPLUS is not set | ||
1018 | # CONFIG_HID_TOPSEED is not set | ||
1019 | # CONFIG_HID_THRUSTMASTER is not set | ||
1020 | # CONFIG_HID_ZEROPLUS is not set | ||
1021 | CONFIG_USB_SUPPORT=y | ||
1022 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1023 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1024 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1025 | CONFIG_USB=y | ||
1026 | # CONFIG_USB_DEBUG is not set | ||
1027 | CONFIG_USB_ANNOUNCE_NEW_DEVICES=y | ||
1028 | |||
1029 | # | ||
1030 | # Miscellaneous USB options | ||
1031 | # | ||
1032 | CONFIG_USB_DEVICEFS=y | ||
1033 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1034 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1035 | # CONFIG_USB_OTG is not set | ||
1036 | # CONFIG_USB_OTG_WHITELIST is not set | ||
1037 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
1038 | # CONFIG_USB_MON is not set | ||
1039 | # CONFIG_USB_WUSB is not set | ||
1040 | # CONFIG_USB_WUSB_CBAF is not set | ||
1041 | |||
1042 | # | ||
1043 | # USB Host Controller Drivers | ||
1044 | # | ||
1045 | # CONFIG_USB_C67X00_HCD is not set | ||
1046 | # CONFIG_USB_XHCI_HCD is not set | ||
1047 | CONFIG_USB_EHCI_HCD=y | ||
1048 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
1049 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1050 | # CONFIG_USB_OXU210HP_HCD is not set | ||
1051 | # CONFIG_USB_ISP116X_HCD is not set | ||
1052 | # CONFIG_USB_ISP1760_HCD is not set | ||
1053 | CONFIG_USB_OHCI_HCD=y | ||
1054 | # CONFIG_USB_OHCI_BIG_ENDIAN_DESC is not set | ||
1055 | # CONFIG_USB_OHCI_BIG_ENDIAN_MMIO is not set | ||
1056 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1057 | # CONFIG_USB_UHCI_HCD is not set | ||
1058 | # CONFIG_USB_SL811_HCD is not set | ||
1059 | # CONFIG_USB_R8A66597_HCD is not set | ||
1060 | # CONFIG_USB_WHCI_HCD is not set | ||
1061 | # CONFIG_USB_HWA_HCD is not set | ||
1062 | |||
1063 | # | ||
1064 | # USB Device Class drivers | ||
1065 | # | ||
1066 | # CONFIG_USB_ACM is not set | ||
1067 | # CONFIG_USB_PRINTER is not set | ||
1068 | # CONFIG_USB_WDM is not set | ||
1069 | # CONFIG_USB_TMC is not set | ||
1070 | |||
1071 | # | ||
1072 | # NOTE: USB_STORAGE depends on SCSI but BLK_DEV_SD may | ||
1073 | # | ||
1074 | |||
1075 | # | ||
1076 | # also be needed; see USB_STORAGE Help for more info | ||
1077 | # | ||
1078 | CONFIG_USB_STORAGE=y | ||
1079 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1080 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
1081 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
1082 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
1083 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1084 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
1085 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
1086 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
1087 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1088 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1089 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1090 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1091 | # CONFIG_USB_LIBUSUAL is not set | ||
1092 | |||
1093 | # | ||
1094 | # USB Imaging devices | ||
1095 | # | ||
1096 | # CONFIG_USB_MDC800 is not set | ||
1097 | # CONFIG_USB_MICROTEK is not set | ||
1098 | |||
1099 | # | ||
1100 | # USB port drivers | ||
1101 | # | ||
1102 | CONFIG_USB_SERIAL=y | ||
1103 | CONFIG_USB_SERIAL_CONSOLE=y | ||
1104 | # CONFIG_USB_EZUSB is not set | ||
1105 | # CONFIG_USB_SERIAL_GENERIC is not set | ||
1106 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
1107 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
1108 | # CONFIG_USB_SERIAL_BELKIN is not set | ||
1109 | # CONFIG_USB_SERIAL_CH341 is not set | ||
1110 | # CONFIG_USB_SERIAL_WHITEHEAT is not set | ||
1111 | # CONFIG_USB_SERIAL_DIGI_ACCELEPORT is not set | ||
1112 | CONFIG_USB_SERIAL_CP210X=y | ||
1113 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
1114 | # CONFIG_USB_SERIAL_EMPEG is not set | ||
1115 | # CONFIG_USB_SERIAL_FTDI_SIO is not set | ||
1116 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
1117 | # CONFIG_USB_SERIAL_VISOR is not set | ||
1118 | # CONFIG_USB_SERIAL_IPAQ is not set | ||
1119 | # CONFIG_USB_SERIAL_IR is not set | ||
1120 | # CONFIG_USB_SERIAL_EDGEPORT is not set | ||
1121 | # CONFIG_USB_SERIAL_EDGEPORT_TI is not set | ||
1122 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
1123 | # CONFIG_USB_SERIAL_IPW is not set | ||
1124 | # CONFIG_USB_SERIAL_IUU is not set | ||
1125 | # CONFIG_USB_SERIAL_KEYSPAN_PDA is not set | ||
1126 | # CONFIG_USB_SERIAL_KEYSPAN is not set | ||
1127 | # CONFIG_USB_SERIAL_KLSI is not set | ||
1128 | # CONFIG_USB_SERIAL_KOBIL_SCT is not set | ||
1129 | # CONFIG_USB_SERIAL_MCT_U232 is not set | ||
1130 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
1131 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
1132 | # CONFIG_USB_SERIAL_MOTOROLA is not set | ||
1133 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
1134 | # CONFIG_USB_SERIAL_PL2303 is not set | ||
1135 | # CONFIG_USB_SERIAL_OTI6858 is not set | ||
1136 | # CONFIG_USB_SERIAL_QUALCOMM is not set | ||
1137 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
1138 | # CONFIG_USB_SERIAL_HP4X is not set | ||
1139 | # CONFIG_USB_SERIAL_SAFE is not set | ||
1140 | # CONFIG_USB_SERIAL_SIEMENS_MPI is not set | ||
1141 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
1142 | # CONFIG_USB_SERIAL_SYMBOL is not set | ||
1143 | # CONFIG_USB_SERIAL_TI is not set | ||
1144 | # CONFIG_USB_SERIAL_CYBERJACK is not set | ||
1145 | # CONFIG_USB_SERIAL_XIRCOM is not set | ||
1146 | # CONFIG_USB_SERIAL_OPTION is not set | ||
1147 | # CONFIG_USB_SERIAL_OMNINET is not set | ||
1148 | # CONFIG_USB_SERIAL_OPTICON is not set | ||
1149 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
1150 | |||
1151 | # | ||
1152 | # USB Miscellaneous drivers | ||
1153 | # | ||
1154 | # CONFIG_USB_EMI62 is not set | ||
1155 | # CONFIG_USB_EMI26 is not set | ||
1156 | # CONFIG_USB_ADUTUX is not set | ||
1157 | # CONFIG_USB_SEVSEG is not set | ||
1158 | # CONFIG_USB_RIO500 is not set | ||
1159 | # CONFIG_USB_LEGOTOWER is not set | ||
1160 | # CONFIG_USB_LCD is not set | ||
1161 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1162 | # CONFIG_USB_LED is not set | ||
1163 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1164 | # CONFIG_USB_CYTHERM is not set | ||
1165 | # CONFIG_USB_IDMOUSE is not set | ||
1166 | # CONFIG_USB_FTDI_ELAN is not set | ||
1167 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1168 | # CONFIG_USB_SISUSBVGA is not set | ||
1169 | # CONFIG_USB_LD is not set | ||
1170 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1171 | # CONFIG_USB_IOWARRIOR is not set | ||
1172 | # CONFIG_USB_TEST is not set | ||
1173 | # CONFIG_USB_ISIGHTFW is not set | ||
1174 | # CONFIG_USB_VST is not set | ||
1175 | # CONFIG_USB_GADGET is not set | ||
1176 | |||
1177 | # | ||
1178 | # OTG and related infrastructure | ||
1179 | # | ||
1180 | # CONFIG_NOP_USB_XCEIV is not set | ||
1181 | # CONFIG_UWB is not set | ||
1182 | # CONFIG_MMC is not set | ||
1183 | # CONFIG_MEMSTICK is not set | ||
1184 | # CONFIG_NEW_LEDS is not set | ||
1185 | # CONFIG_ACCESSIBILITY is not set | ||
1186 | # CONFIG_INFINIBAND is not set | ||
1187 | CONFIG_RTC_LIB=y | ||
1188 | # CONFIG_RTC_CLASS is not set | ||
1189 | # CONFIG_DMADEVICES is not set | ||
1190 | # CONFIG_AUXDISPLAY is not set | ||
1191 | # CONFIG_UIO is not set | ||
1192 | |||
1193 | # | ||
1194 | # TI VLYNQ | ||
1195 | # | ||
1196 | # CONFIG_STAGING is not set | ||
1197 | |||
1198 | # | ||
1199 | # File systems | ||
1200 | # | ||
1201 | CONFIG_EXT2_FS=y | ||
1202 | # CONFIG_EXT2_FS_XATTR is not set | ||
1203 | # CONFIG_EXT2_FS_XIP is not set | ||
1204 | CONFIG_EXT3_FS=y | ||
1205 | # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set | ||
1206 | # CONFIG_EXT3_FS_XATTR is not set | ||
1207 | # CONFIG_EXT4_FS is not set | ||
1208 | CONFIG_JBD=y | ||
1209 | # CONFIG_JBD_DEBUG is not set | ||
1210 | # CONFIG_REISERFS_FS is not set | ||
1211 | # CONFIG_JFS_FS is not set | ||
1212 | # CONFIG_FS_POSIX_ACL is not set | ||
1213 | # CONFIG_XFS_FS is not set | ||
1214 | # CONFIG_GFS2_FS is not set | ||
1215 | # CONFIG_OCFS2_FS is not set | ||
1216 | # CONFIG_BTRFS_FS is not set | ||
1217 | CONFIG_FILE_LOCKING=y | ||
1218 | CONFIG_FSNOTIFY=y | ||
1219 | # CONFIG_DNOTIFY is not set | ||
1220 | CONFIG_INOTIFY=y | ||
1221 | CONFIG_INOTIFY_USER=y | ||
1222 | # CONFIG_QUOTA is not set | ||
1223 | # CONFIG_AUTOFS_FS is not set | ||
1224 | # CONFIG_AUTOFS4_FS is not set | ||
1225 | CONFIG_FUSE_FS=y | ||
1226 | # CONFIG_CUSE is not set | ||
1227 | |||
1228 | # | ||
1229 | # Caches | ||
1230 | # | ||
1231 | # CONFIG_FSCACHE is not set | ||
1232 | |||
1233 | # | ||
1234 | # CD-ROM/DVD Filesystems | ||
1235 | # | ||
1236 | # CONFIG_ISO9660_FS is not set | ||
1237 | # CONFIG_UDF_FS is not set | ||
1238 | |||
1239 | # | ||
1240 | # DOS/FAT/NT Filesystems | ||
1241 | # | ||
1242 | # CONFIG_MSDOS_FS is not set | ||
1243 | # CONFIG_VFAT_FS is not set | ||
1244 | # CONFIG_NTFS_FS is not set | ||
1245 | |||
1246 | # | ||
1247 | # Pseudo filesystems | ||
1248 | # | ||
1249 | CONFIG_PROC_FS=y | ||
1250 | CONFIG_PROC_KCORE=y | ||
1251 | CONFIG_PROC_SYSCTL=y | ||
1252 | CONFIG_PROC_PAGE_MONITOR=y | ||
1253 | CONFIG_SYSFS=y | ||
1254 | CONFIG_TMPFS=y | ||
1255 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1256 | # CONFIG_HUGETLB_PAGE is not set | ||
1257 | # CONFIG_CONFIGFS_FS is not set | ||
1258 | CONFIG_MISC_FILESYSTEMS=y | ||
1259 | # CONFIG_ADFS_FS is not set | ||
1260 | # CONFIG_AFFS_FS is not set | ||
1261 | # CONFIG_HFS_FS is not set | ||
1262 | # CONFIG_HFSPLUS_FS is not set | ||
1263 | # CONFIG_BEFS_FS is not set | ||
1264 | # CONFIG_BFS_FS is not set | ||
1265 | # CONFIG_EFS_FS is not set | ||
1266 | CONFIG_JFFS2_FS=y | ||
1267 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1268 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1269 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1270 | # CONFIG_JFFS2_SUMMARY is not set | ||
1271 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1272 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1273 | CONFIG_JFFS2_ZLIB=y | ||
1274 | # CONFIG_JFFS2_LZO is not set | ||
1275 | CONFIG_JFFS2_RTIME=y | ||
1276 | # CONFIG_JFFS2_RUBIN is not set | ||
1277 | CONFIG_CRAMFS=y | ||
1278 | # CONFIG_SQUASHFS is not set | ||
1279 | # CONFIG_VXFS_FS is not set | ||
1280 | # CONFIG_MINIX_FS is not set | ||
1281 | # CONFIG_OMFS_FS is not set | ||
1282 | # CONFIG_HPFS_FS is not set | ||
1283 | # CONFIG_QNX4FS_FS is not set | ||
1284 | # CONFIG_ROMFS_FS is not set | ||
1285 | # CONFIG_SYSV_FS is not set | ||
1286 | # CONFIG_UFS_FS is not set | ||
1287 | # CONFIG_NILFS2_FS is not set | ||
1288 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1289 | CONFIG_NFS_FS=y | ||
1290 | CONFIG_NFS_V3=y | ||
1291 | # CONFIG_NFS_V3_ACL is not set | ||
1292 | # CONFIG_NFS_V4 is not set | ||
1293 | CONFIG_ROOT_NFS=y | ||
1294 | # CONFIG_NFSD is not set | ||
1295 | CONFIG_LOCKD=y | ||
1296 | CONFIG_LOCKD_V4=y | ||
1297 | CONFIG_NFS_COMMON=y | ||
1298 | CONFIG_SUNRPC=y | ||
1299 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
1300 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1301 | # CONFIG_SMB_FS is not set | ||
1302 | # CONFIG_CIFS is not set | ||
1303 | # CONFIG_NCP_FS is not set | ||
1304 | # CONFIG_CODA_FS is not set | ||
1305 | # CONFIG_AFS_FS is not set | ||
1306 | |||
1307 | # | ||
1308 | # Partition Types | ||
1309 | # | ||
1310 | # CONFIG_PARTITION_ADVANCED is not set | ||
1311 | CONFIG_MSDOS_PARTITION=y | ||
1312 | CONFIG_NLS=y | ||
1313 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1314 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1315 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1316 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1317 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1318 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1319 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1320 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1321 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1322 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1323 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1324 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1325 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1326 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1327 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1328 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1329 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1330 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1331 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1332 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1333 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1334 | # CONFIG_NLS_ISO8859_8 is not set | ||
1335 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1336 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1337 | # CONFIG_NLS_ASCII is not set | ||
1338 | # CONFIG_NLS_ISO8859_1 is not set | ||
1339 | # CONFIG_NLS_ISO8859_2 is not set | ||
1340 | # CONFIG_NLS_ISO8859_3 is not set | ||
1341 | # CONFIG_NLS_ISO8859_4 is not set | ||
1342 | # CONFIG_NLS_ISO8859_5 is not set | ||
1343 | # CONFIG_NLS_ISO8859_6 is not set | ||
1344 | # CONFIG_NLS_ISO8859_7 is not set | ||
1345 | # CONFIG_NLS_ISO8859_9 is not set | ||
1346 | # CONFIG_NLS_ISO8859_13 is not set | ||
1347 | # CONFIG_NLS_ISO8859_14 is not set | ||
1348 | # CONFIG_NLS_ISO8859_15 is not set | ||
1349 | # CONFIG_NLS_KOI8_R is not set | ||
1350 | # CONFIG_NLS_KOI8_U is not set | ||
1351 | # CONFIG_NLS_UTF8 is not set | ||
1352 | # CONFIG_DLM is not set | ||
1353 | |||
1354 | # | ||
1355 | # Kernel hacking | ||
1356 | # | ||
1357 | CONFIG_TRACE_IRQFLAGS_SUPPORT=y | ||
1358 | CONFIG_PRINTK_TIME=y | ||
1359 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1360 | CONFIG_ENABLE_MUST_CHECK=y | ||
1361 | CONFIG_FRAME_WARN=1024 | ||
1362 | # CONFIG_MAGIC_SYSRQ is not set | ||
1363 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1364 | CONFIG_DEBUG_FS=y | ||
1365 | # CONFIG_HEADERS_CHECK is not set | ||
1366 | CONFIG_DEBUG_KERNEL=y | ||
1367 | # CONFIG_DEBUG_SHIRQ is not set | ||
1368 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1369 | # CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC is not set | ||
1370 | CONFIG_BOOTPARAM_SOFTLOCKUP_PANIC_VALUE=0 | ||
1371 | CONFIG_DETECT_HUNG_TASK=y | ||
1372 | # CONFIG_BOOTPARAM_HUNG_TASK_PANIC is not set | ||
1373 | CONFIG_BOOTPARAM_HUNG_TASK_PANIC_VALUE=0 | ||
1374 | # CONFIG_SCHED_DEBUG is not set | ||
1375 | # CONFIG_SCHEDSTATS is not set | ||
1376 | # CONFIG_TIMER_STATS is not set | ||
1377 | # CONFIG_DEBUG_OBJECTS is not set | ||
1378 | # CONFIG_DEBUG_PREEMPT is not set | ||
1379 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1380 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1381 | # CONFIG_DEBUG_SPINLOCK is not set | ||
1382 | # CONFIG_DEBUG_MUTEXES is not set | ||
1383 | # CONFIG_DEBUG_LOCK_ALLOC is not set | ||
1384 | # CONFIG_PROVE_LOCKING is not set | ||
1385 | # CONFIG_LOCK_STAT is not set | ||
1386 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
1387 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1388 | # CONFIG_DEBUG_KOBJECT is not set | ||
1389 | CONFIG_DEBUG_INFO=y | ||
1390 | # CONFIG_DEBUG_VM is not set | ||
1391 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1392 | # CONFIG_DEBUG_MEMORY_INIT is not set | ||
1393 | # CONFIG_DEBUG_LIST is not set | ||
1394 | # CONFIG_DEBUG_SG is not set | ||
1395 | # CONFIG_DEBUG_NOTIFIERS is not set | ||
1396 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1397 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1398 | # CONFIG_RCU_CPU_STALL_DETECTOR is not set | ||
1399 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1400 | # CONFIG_DEBUG_BLOCK_EXT_DEVT is not set | ||
1401 | # CONFIG_FAULT_INJECTION is not set | ||
1402 | # CONFIG_PAGE_POISONING is not set | ||
1403 | CONFIG_TRACING_SUPPORT=y | ||
1404 | CONFIG_FTRACE=y | ||
1405 | # CONFIG_IRQSOFF_TRACER is not set | ||
1406 | # CONFIG_PREEMPT_TRACER is not set | ||
1407 | # CONFIG_SCHED_TRACER is not set | ||
1408 | # CONFIG_ENABLE_DEFAULT_TRACERS is not set | ||
1409 | # CONFIG_BOOT_TRACER is not set | ||
1410 | CONFIG_BRANCH_PROFILE_NONE=y | ||
1411 | # CONFIG_PROFILE_ANNOTATED_BRANCHES is not set | ||
1412 | # CONFIG_PROFILE_ALL_BRANCHES is not set | ||
1413 | # CONFIG_KMEMTRACE is not set | ||
1414 | # CONFIG_WORKQUEUE_TRACER is not set | ||
1415 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
1416 | # CONFIG_DYNAMIC_DEBUG is not set | ||
1417 | # CONFIG_SAMPLES is not set | ||
1418 | CONFIG_HAVE_ARCH_KGDB=y | ||
1419 | # CONFIG_KGDB is not set | ||
1420 | # CONFIG_KMEMCHECK is not set | ||
1421 | CONFIG_CMDLINE_BOOL=y | ||
1422 | CONFIG_CMDLINE="rw dhash_entries=1024 ihash_entries=1024 ip=10.0.1.3:10.0.1.1:10.0.1.1:255.255.255.0:zeus:eth0: root=/dev/nfs nfsroot=/nfsroot/cramfs,wsize=512,rsize=512,tcp nokgdb console=ttyUSB0,115200 memsize=252M" | ||
1423 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
1424 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1425 | # CONFIG_RUNTIME_DEBUG is not set | ||
1426 | |||
1427 | # | ||
1428 | # Security options | ||
1429 | # | ||
1430 | # CONFIG_KEYS is not set | ||
1431 | # CONFIG_SECURITY is not set | ||
1432 | # CONFIG_SECURITYFS is not set | ||
1433 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1434 | CONFIG_CRYPTO=y | ||
1435 | |||
1436 | # | ||
1437 | # Crypto core or helper | ||
1438 | # | ||
1439 | # CONFIG_CRYPTO_FIPS is not set | ||
1440 | CONFIG_CRYPTO_ALGAPI=y | ||
1441 | CONFIG_CRYPTO_ALGAPI2=y | ||
1442 | CONFIG_CRYPTO_AEAD=y | ||
1443 | CONFIG_CRYPTO_AEAD2=y | ||
1444 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1445 | CONFIG_CRYPTO_BLKCIPHER2=y | ||
1446 | CONFIG_CRYPTO_HASH=y | ||
1447 | CONFIG_CRYPTO_HASH2=y | ||
1448 | CONFIG_CRYPTO_RNG2=y | ||
1449 | CONFIG_CRYPTO_PCOMP=y | ||
1450 | CONFIG_CRYPTO_MANAGER=y | ||
1451 | CONFIG_CRYPTO_MANAGER2=y | ||
1452 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1453 | # CONFIG_CRYPTO_NULL is not set | ||
1454 | CONFIG_CRYPTO_WORKQUEUE=y | ||
1455 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1456 | CONFIG_CRYPTO_AUTHENC=y | ||
1457 | # CONFIG_CRYPTO_TEST is not set | ||
1458 | |||
1459 | # | ||
1460 | # Authenticated Encryption with Associated Data | ||
1461 | # | ||
1462 | # CONFIG_CRYPTO_CCM is not set | ||
1463 | # CONFIG_CRYPTO_GCM is not set | ||
1464 | # CONFIG_CRYPTO_SEQIV is not set | ||
1465 | |||
1466 | # | ||
1467 | # Block modes | ||
1468 | # | ||
1469 | CONFIG_CRYPTO_CBC=y | ||
1470 | # CONFIG_CRYPTO_CTR is not set | ||
1471 | # CONFIG_CRYPTO_CTS is not set | ||
1472 | # CONFIG_CRYPTO_ECB is not set | ||
1473 | # CONFIG_CRYPTO_LRW is not set | ||
1474 | # CONFIG_CRYPTO_PCBC is not set | ||
1475 | # CONFIG_CRYPTO_XTS is not set | ||
1476 | |||
1477 | # | ||
1478 | # Hash modes | ||
1479 | # | ||
1480 | CONFIG_CRYPTO_HMAC=y | ||
1481 | # CONFIG_CRYPTO_XCBC is not set | ||
1482 | |||
1483 | # | ||
1484 | # Digest | ||
1485 | # | ||
1486 | # CONFIG_CRYPTO_CRC32C is not set | ||
1487 | # CONFIG_CRYPTO_MD4 is not set | ||
1488 | CONFIG_CRYPTO_MD5=y | ||
1489 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1490 | # CONFIG_CRYPTO_RMD128 is not set | ||
1491 | # CONFIG_CRYPTO_RMD160 is not set | ||
1492 | # CONFIG_CRYPTO_RMD256 is not set | ||
1493 | # CONFIG_CRYPTO_RMD320 is not set | ||
1494 | CONFIG_CRYPTO_SHA1=y | ||
1495 | # CONFIG_CRYPTO_SHA256 is not set | ||
1496 | # CONFIG_CRYPTO_SHA512 is not set | ||
1497 | # CONFIG_CRYPTO_TGR192 is not set | ||
1498 | # CONFIG_CRYPTO_WP512 is not set | ||
1499 | |||
1500 | # | ||
1501 | # Ciphers | ||
1502 | # | ||
1503 | # CONFIG_CRYPTO_AES is not set | ||
1504 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1505 | # CONFIG_CRYPTO_ARC4 is not set | ||
1506 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1507 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1508 | # CONFIG_CRYPTO_CAST5 is not set | ||
1509 | # CONFIG_CRYPTO_CAST6 is not set | ||
1510 | CONFIG_CRYPTO_DES=y | ||
1511 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1512 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1513 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1514 | # CONFIG_CRYPTO_SEED is not set | ||
1515 | # CONFIG_CRYPTO_SERPENT is not set | ||
1516 | # CONFIG_CRYPTO_TEA is not set | ||
1517 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1518 | |||
1519 | # | ||
1520 | # Compression | ||
1521 | # | ||
1522 | CONFIG_CRYPTO_DEFLATE=y | ||
1523 | # CONFIG_CRYPTO_ZLIB is not set | ||
1524 | # CONFIG_CRYPTO_LZO is not set | ||
1525 | |||
1526 | # | ||
1527 | # Random Number Generation | ||
1528 | # | ||
1529 | # CONFIG_CRYPTO_ANSI_CPRNG is not set | ||
1530 | # CONFIG_CRYPTO_HW is not set | ||
1531 | # CONFIG_BINARY_PRINTF is not set | ||
1532 | |||
1533 | # | ||
1534 | # Library routines | ||
1535 | # | ||
1536 | CONFIG_BITREVERSE=y | ||
1537 | CONFIG_GENERIC_FIND_LAST_BIT=y | ||
1538 | # CONFIG_CRC_CCITT is not set | ||
1539 | # CONFIG_CRC16 is not set | ||
1540 | # CONFIG_CRC_T10DIF is not set | ||
1541 | # CONFIG_CRC_ITU_T is not set | ||
1542 | CONFIG_CRC32=y | ||
1543 | # CONFIG_CRC7 is not set | ||
1544 | # CONFIG_LIBCRC32C is not set | ||
1545 | CONFIG_ZLIB_INFLATE=y | ||
1546 | CONFIG_ZLIB_DEFLATE=y | ||
1547 | CONFIG_HAS_IOMEM=y | ||
1548 | CONFIG_HAS_IOPORT=y | ||
1549 | CONFIG_HAS_DMA=y | ||
1550 | CONFIG_NLATTR=y | ||
diff --git a/arch/mips/configs/rb532_defconfig b/arch/mips/configs/rb532_defconfig index f40c3a04739d..57a50483abdf 100644 --- a/arch/mips/configs/rb532_defconfig +++ b/arch/mips/configs/rb532_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1204,7 +1203,7 @@ CONFIG_FRAME_WARN=1024 | |||
1204 | # CONFIG_HEADERS_CHECK is not set | 1203 | # CONFIG_HEADERS_CHECK is not set |
1205 | # CONFIG_DEBUG_KERNEL is not set | 1204 | # CONFIG_DEBUG_KERNEL is not set |
1206 | # CONFIG_SAMPLES is not set | 1205 | # CONFIG_SAMPLES is not set |
1207 | CONFIG_CMDLINE="" | 1206 | # CONFIG_CMDLINE_BOOL is not set |
1208 | 1207 | ||
1209 | # | 1208 | # |
1210 | # Security options | 1209 | # Security options |
diff --git a/arch/mips/configs/rbtx49xx_defconfig b/arch/mips/configs/rbtx49xx_defconfig index 6c6a19aebe1f..21c2022d46ee 100644 --- a/arch/mips/configs/rbtx49xx_defconfig +++ b/arch/mips/configs/rbtx49xx_defconfig | |||
@@ -10,7 +10,6 @@ CONFIG_MIPS=y | |||
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_AR7 is not set | 12 | # CONFIG_AR7 is not set |
13 | # CONFIG_BASLER_EXCITE is not set | ||
14 | # CONFIG_BCM47XX is not set | 13 | # CONFIG_BCM47XX is not set |
15 | # CONFIG_BCM63XX is not set | 14 | # CONFIG_BCM63XX is not set |
16 | # CONFIG_MIPS_COBALT is not set | 15 | # CONFIG_MIPS_COBALT is not set |
@@ -284,7 +283,6 @@ CONFIG_DEFAULT_AS=y | |||
284 | # CONFIG_DEFAULT_CFQ is not set | 283 | # CONFIG_DEFAULT_CFQ is not set |
285 | # CONFIG_DEFAULT_NOOP is not set | 284 | # CONFIG_DEFAULT_NOOP is not set |
286 | CONFIG_DEFAULT_IOSCHED="anticipatory" | 285 | CONFIG_DEFAULT_IOSCHED="anticipatory" |
287 | # CONFIG_PROBE_INITRD_HEADER is not set | ||
288 | # CONFIG_FREEZER is not set | 286 | # CONFIG_FREEZER is not set |
289 | 287 | ||
290 | # | 288 | # |
@@ -1063,7 +1061,7 @@ CONFIG_TRACING_SUPPORT=y | |||
1063 | # CONFIG_DYNAMIC_DEBUG is not set | 1061 | # CONFIG_DYNAMIC_DEBUG is not set |
1064 | # CONFIG_SAMPLES is not set | 1062 | # CONFIG_SAMPLES is not set |
1065 | CONFIG_HAVE_ARCH_KGDB=y | 1063 | CONFIG_HAVE_ARCH_KGDB=y |
1066 | CONFIG_CMDLINE="" | 1064 | # CONFIG_CMDLINE_BOOL is not set |
1067 | 1065 | ||
1068 | # | 1066 | # |
1069 | # Security options | 1067 | # Security options |
diff --git a/arch/mips/configs/rm200_defconfig b/arch/mips/configs/rm200_defconfig index e53b8d096cfc..790362890033 100644 --- a/arch/mips/configs/rm200_defconfig +++ b/arch/mips/configs/rm200_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -1694,7 +1693,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
1694 | # CONFIG_DEBUG_KERNEL is not set | 1693 | # CONFIG_DEBUG_KERNEL is not set |
1695 | CONFIG_LOG_BUF_SHIFT=14 | 1694 | CONFIG_LOG_BUF_SHIFT=14 |
1696 | CONFIG_CROSSCOMPILE=y | 1695 | CONFIG_CROSSCOMPILE=y |
1697 | CONFIG_CMDLINE="" | 1696 | # CONFIG_CMDLINE_BOOL is not set |
1698 | 1697 | ||
1699 | # | 1698 | # |
1700 | # Security options | 1699 | # Security options |
diff --git a/arch/mips/configs/sb1250-swarm_defconfig b/arch/mips/configs/sb1250-swarm_defconfig index 7f38c0b956f3..7f07bf02b838 100644 --- a/arch/mips/configs/sb1250-swarm_defconfig +++ b/arch/mips/configs/sb1250-swarm_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -961,7 +960,7 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
961 | # CONFIG_HEADERS_CHECK is not set | 960 | # CONFIG_HEADERS_CHECK is not set |
962 | # CONFIG_DEBUG_KERNEL is not set | 961 | # CONFIG_DEBUG_KERNEL is not set |
963 | # CONFIG_SAMPLES is not set | 962 | # CONFIG_SAMPLES is not set |
964 | CONFIG_CMDLINE="" | 963 | # CONFIG_CMDLINE_BOOL is not set |
965 | # CONFIG_SB1XXX_CORELIS is not set | 964 | # CONFIG_SB1XXX_CORELIS is not set |
966 | 965 | ||
967 | # | 966 | # |
diff --git a/arch/mips/configs/tb0219_defconfig b/arch/mips/configs/tb0219_defconfig index b5059881bc7e..c54d1128f9a3 100644 --- a/arch/mips/configs/tb0219_defconfig +++ b/arch/mips/configs/tb0219_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -892,7 +891,9 @@ CONFIG_FRAME_WARN=1024 | |||
892 | # CONFIG_HEADERS_CHECK is not set | 891 | # CONFIG_HEADERS_CHECK is not set |
893 | # CONFIG_DEBUG_KERNEL is not set | 892 | # CONFIG_DEBUG_KERNEL is not set |
894 | # CONFIG_SAMPLES is not set | 893 | # CONFIG_SAMPLES is not set |
894 | CONFIG_CMDLINE_BOOL=y | ||
895 | CONFIG_CMDLINE="cca=3 mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" | 895 | CONFIG_CMDLINE="cca=3 mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" |
896 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
896 | 897 | ||
897 | # | 898 | # |
898 | # Security options | 899 | # Security options |
diff --git a/arch/mips/configs/tb0226_defconfig b/arch/mips/configs/tb0226_defconfig index b06a716bf23f..e7c5cd32a2bd 100644 --- a/arch/mips/configs/tb0226_defconfig +++ b/arch/mips/configs/tb0226_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -895,7 +894,9 @@ CONFIG_FRAME_WARN=1024 | |||
895 | # CONFIG_HEADERS_CHECK is not set | 894 | # CONFIG_HEADERS_CHECK is not set |
896 | # CONFIG_DEBUG_KERNEL is not set | 895 | # CONFIG_DEBUG_KERNEL is not set |
897 | # CONFIG_SAMPLES is not set | 896 | # CONFIG_SAMPLES is not set |
897 | CONFIG_CMDLINE_BOOL=y | ||
898 | CONFIG_CMDLINE="cca=3 mem=32M console=ttyVR0,115200" | 898 | CONFIG_CMDLINE="cca=3 mem=32M console=ttyVR0,115200" |
899 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
899 | 900 | ||
900 | # | 901 | # |
901 | # Security options | 902 | # Security options |
diff --git a/arch/mips/configs/tb0287_defconfig b/arch/mips/configs/tb0287_defconfig index 46512cf7ce04..b50032ba4d01 100644 --- a/arch/mips/configs/tb0287_defconfig +++ b/arch/mips/configs/tb0287_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_BCM47XX is not set | 12 | # CONFIG_BCM47XX is not set |
14 | # CONFIG_MIPS_COBALT is not set | 13 | # CONFIG_MIPS_COBALT is not set |
15 | # CONFIG_MACH_DECSTATION is not set | 14 | # CONFIG_MACH_DECSTATION is not set |
@@ -1077,7 +1076,9 @@ CONFIG_FRAME_WARN=1024 | |||
1077 | # CONFIG_HEADERS_CHECK is not set | 1076 | # CONFIG_HEADERS_CHECK is not set |
1078 | # CONFIG_DEBUG_KERNEL is not set | 1077 | # CONFIG_DEBUG_KERNEL is not set |
1079 | # CONFIG_SAMPLES is not set | 1078 | # CONFIG_SAMPLES is not set |
1079 | CONFIG_CMDLINE_BOOL=y | ||
1080 | CONFIG_CMDLINE="cca=3 mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" | 1080 | CONFIG_CMDLINE="cca=3 mem=64M console=ttyVR0,115200 ip=any root=/dev/nfs" |
1081 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
1081 | 1082 | ||
1082 | # | 1083 | # |
1083 | # Security options | 1084 | # Security options |
diff --git a/arch/mips/configs/workpad_defconfig b/arch/mips/configs/workpad_defconfig index b437eb7f8672..c02ba08b69ab 100644 --- a/arch/mips/configs/workpad_defconfig +++ b/arch/mips/configs/workpad_defconfig | |||
@@ -9,7 +9,6 @@ CONFIG_MIPS=y | |||
9 | # Machine selection | 9 | # Machine selection |
10 | # | 10 | # |
11 | # CONFIG_MACH_ALCHEMY is not set | 11 | # CONFIG_MACH_ALCHEMY is not set |
12 | # CONFIG_BASLER_EXCITE is not set | ||
13 | # CONFIG_MIPS_COBALT is not set | 12 | # CONFIG_MIPS_COBALT is not set |
14 | # CONFIG_MACH_DECSTATION is not set | 13 | # CONFIG_MACH_DECSTATION is not set |
15 | # CONFIG_MACH_JAZZ is not set | 14 | # CONFIG_MACH_JAZZ is not set |
@@ -755,7 +754,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
755 | # CONFIG_HEADERS_CHECK is not set | 754 | # CONFIG_HEADERS_CHECK is not set |
756 | # CONFIG_DEBUG_KERNEL is not set | 755 | # CONFIG_DEBUG_KERNEL is not set |
757 | CONFIG_CROSSCOMPILE=y | 756 | CONFIG_CROSSCOMPILE=y |
757 | CONFIG_CMDLINE_BOOL=y | ||
758 | CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x170,0x376,49 mem=16M" | 758 | CONFIG_CMDLINE="console=ttyVR0,19200 ide0=0x170,0x376,49 mem=16M" |
759 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
759 | 760 | ||
760 | # | 761 | # |
761 | # Security options | 762 | # Security options |
diff --git a/arch/mips/configs/wrppmc_defconfig b/arch/mips/configs/wrppmc_defconfig index 06acc7482e4c..a35bc41389e5 100644 --- a/arch/mips/configs/wrppmc_defconfig +++ b/arch/mips/configs/wrppmc_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -887,7 +886,9 @@ CONFIG_ENABLE_MUST_CHECK=y | |||
887 | # CONFIG_DEBUG_KERNEL is not set | 886 | # CONFIG_DEBUG_KERNEL is not set |
888 | CONFIG_LOG_BUF_SHIFT=14 | 887 | CONFIG_LOG_BUF_SHIFT=14 |
889 | CONFIG_CROSSCOMPILE=y | 888 | CONFIG_CROSSCOMPILE=y |
889 | CONFIG_CMDLINE_BOOL=y | ||
890 | CONFIG_CMDLINE="console=ttyS0,115200n8" | 890 | CONFIG_CMDLINE="console=ttyS0,115200n8" |
891 | # CONFIG_CMDLINE_OVERRIDE is not set | ||
891 | 892 | ||
892 | # | 893 | # |
893 | # Security options | 894 | # Security options |
diff --git a/arch/mips/configs/yosemite_defconfig b/arch/mips/configs/yosemite_defconfig index 69feaf88b510..e3d68d651e7d 100644 --- a/arch/mips/configs/yosemite_defconfig +++ b/arch/mips/configs/yosemite_defconfig | |||
@@ -22,7 +22,6 @@ CONFIG_ZONE_DMA=y | |||
22 | # CONFIG_MIPS_DB1550 is not set | 22 | # CONFIG_MIPS_DB1550 is not set |
23 | # CONFIG_MIPS_DB1200 is not set | 23 | # CONFIG_MIPS_DB1200 is not set |
24 | # CONFIG_MIPS_MIRAGE is not set | 24 | # CONFIG_MIPS_MIRAGE is not set |
25 | # CONFIG_BASLER_EXCITE is not set | ||
26 | # CONFIG_MIPS_COBALT is not set | 25 | # CONFIG_MIPS_COBALT is not set |
27 | # CONFIG_MACH_DECSTATION is not set | 26 | # CONFIG_MACH_DECSTATION is not set |
28 | # CONFIG_MACH_JAZZ is not set | 27 | # CONFIG_MACH_JAZZ is not set |
@@ -824,7 +823,7 @@ CONFIG_DEBUG_MUTEXES=y | |||
824 | CONFIG_FORCED_INLINING=y | 823 | CONFIG_FORCED_INLINING=y |
825 | # CONFIG_RCU_TORTURE_TEST is not set | 824 | # CONFIG_RCU_TORTURE_TEST is not set |
826 | CONFIG_CROSSCOMPILE=y | 825 | CONFIG_CROSSCOMPILE=y |
827 | CONFIG_CMDLINE="" | 826 | # CONFIG_CMDLINE_BOOL is not set |
828 | # CONFIG_DEBUG_STACK_USAGE is not set | 827 | # CONFIG_DEBUG_STACK_USAGE is not set |
829 | # CONFIG_RUNTIME_DEBUG is not set | 828 | # CONFIG_RUNTIME_DEBUG is not set |
830 | 829 | ||
diff --git a/arch/mips/fw/arc/cmdline.c b/arch/mips/fw/arc/cmdline.c index 4ca4eef934a5..5c8603c85f20 100644 --- a/arch/mips/fw/arc/cmdline.c +++ b/arch/mips/fw/arc/cmdline.c | |||
@@ -16,11 +16,6 @@ | |||
16 | 16 | ||
17 | #undef DEBUG_CMDLINE | 17 | #undef DEBUG_CMDLINE |
18 | 18 | ||
19 | char * __init prom_getcmdline(void) | ||
20 | { | ||
21 | return arcs_cmdline; | ||
22 | } | ||
23 | |||
24 | static char *ignored[] = { | 19 | static char *ignored[] = { |
25 | "ConsoleIn=", | 20 | "ConsoleIn=", |
26 | "ConsoleOut=", | 21 | "ConsoleOut=", |
diff --git a/arch/mips/include/asm/asm-offsets.h b/arch/mips/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/mips/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/mips/include/asm/bootinfo.h b/arch/mips/include/asm/bootinfo.h index f5dfaf6a1606..09eee09780f2 100644 --- a/arch/mips/include/asm/bootinfo.h +++ b/arch/mips/include/asm/bootinfo.h | |||
@@ -67,9 +67,9 @@ | |||
67 | #define MACH_LEMOTE_ML2F7 3 | 67 | #define MACH_LEMOTE_ML2F7 3 |
68 | #define MACH_LEMOTE_YL2F89 4 | 68 | #define MACH_LEMOTE_YL2F89 4 |
69 | #define MACH_DEXXON_GDIUM2F10 5 | 69 | #define MACH_DEXXON_GDIUM2F10 5 |
70 | #define MACH_LOONGSON_END 6 | 70 | #define MACH_LEMOTE_NAS 6 |
71 | 71 | #define MACH_LEMOTE_LL2F 7 | |
72 | #define CL_SIZE COMMAND_LINE_SIZE | 72 | #define MACH_LOONGSON_END 8 |
73 | 73 | ||
74 | extern char *system_type; | 74 | extern char *system_type; |
75 | const char *get_system_type(void); | 75 | const char *get_system_type(void); |
@@ -107,7 +107,7 @@ extern void free_init_pages(const char *what, | |||
107 | /* | 107 | /* |
108 | * Initial kernel command line, usually setup by prom_init() | 108 | * Initial kernel command line, usually setup by prom_init() |
109 | */ | 109 | */ |
110 | extern char arcs_cmdline[CL_SIZE]; | 110 | extern char arcs_cmdline[COMMAND_LINE_SIZE]; |
111 | 111 | ||
112 | /* | 112 | /* |
113 | * Registers a0, a1, a3 and a4 as passed to the kernel entry by firmware | 113 | * Registers a0, a1, a3 and a4 as passed to the kernel entry by firmware |
diff --git a/arch/mips/include/asm/clock.h b/arch/mips/include/asm/clock.h new file mode 100644 index 000000000000..83894aa7932c --- /dev/null +++ b/arch/mips/include/asm/clock.h | |||
@@ -0,0 +1,64 @@ | |||
1 | #ifndef __ASM_MIPS_CLOCK_H | ||
2 | #define __ASM_MIPS_CLOCK_H | ||
3 | |||
4 | #include <linux/kref.h> | ||
5 | #include <linux/list.h> | ||
6 | #include <linux/seq_file.h> | ||
7 | #include <linux/clk.h> | ||
8 | |||
9 | extern void (*cpu_wait) (void); | ||
10 | |||
11 | struct clk; | ||
12 | |||
13 | struct clk_ops { | ||
14 | void (*init) (struct clk *clk); | ||
15 | void (*enable) (struct clk *clk); | ||
16 | void (*disable) (struct clk *clk); | ||
17 | void (*recalc) (struct clk *clk); | ||
18 | int (*set_rate) (struct clk *clk, unsigned long rate, int algo_id); | ||
19 | long (*round_rate) (struct clk *clk, unsigned long rate); | ||
20 | }; | ||
21 | |||
22 | struct clk { | ||
23 | struct list_head node; | ||
24 | const char *name; | ||
25 | int id; | ||
26 | struct module *owner; | ||
27 | |||
28 | struct clk *parent; | ||
29 | struct clk_ops *ops; | ||
30 | |||
31 | struct kref kref; | ||
32 | |||
33 | unsigned long rate; | ||
34 | unsigned long flags; | ||
35 | }; | ||
36 | |||
37 | #define CLK_ALWAYS_ENABLED (1 << 0) | ||
38 | #define CLK_RATE_PROPAGATES (1 << 1) | ||
39 | |||
40 | /* Should be defined by processor-specific code */ | ||
41 | void arch_init_clk_ops(struct clk_ops **, int type); | ||
42 | |||
43 | int clk_init(void); | ||
44 | |||
45 | int __clk_enable(struct clk *); | ||
46 | void __clk_disable(struct clk *); | ||
47 | |||
48 | void clk_recalc_rate(struct clk *); | ||
49 | |||
50 | int clk_register(struct clk *); | ||
51 | void clk_unregister(struct clk *); | ||
52 | |||
53 | /* the exported API, in addition to clk_set_rate */ | ||
54 | /** | ||
55 | * clk_set_rate_ex - set the clock rate for a clock source, with additional parameter | ||
56 | * @clk: clock source | ||
57 | * @rate: desired clock rate in Hz | ||
58 | * @algo_id: algorithm id to be passed down to ops->set_rate | ||
59 | * | ||
60 | * Returns success (0) or negative errno. | ||
61 | */ | ||
62 | int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id); | ||
63 | |||
64 | #endif /* __ASM_MIPS_CLOCK_H */ | ||
diff --git a/arch/mips/include/asm/cop2.h b/arch/mips/include/asm/cop2.h new file mode 100644 index 000000000000..6b04c98b7fad --- /dev/null +++ b/arch/mips/include/asm/cop2.h | |||
@@ -0,0 +1,23 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2009 Wind River Systems, | ||
7 | * written by Ralf Baechle <ralf@linux-mips.org> | ||
8 | */ | ||
9 | #ifndef __ASM_COP2_H | ||
10 | #define __ASM_COP2_H | ||
11 | |||
12 | enum cu2_ops { | ||
13 | CU2_EXCEPTION, | ||
14 | CU2_LWC2_OP, | ||
15 | CU2_LDC2_OP, | ||
16 | CU2_SWC2_OP, | ||
17 | CU2_SDC2_OP, | ||
18 | }; | ||
19 | |||
20 | extern int register_cu2_notifier(struct notifier_block *nb); | ||
21 | extern int cu2_notifier_call_chain(unsigned long val, void *v); | ||
22 | |||
23 | #endif /* __ASM_COP2_H */ | ||
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h index 4b96d1a36056..cf373a95fe4a 100644 --- a/arch/mips/include/asm/cpu.h +++ b/arch/mips/include/asm/cpu.h | |||
@@ -154,6 +154,8 @@ | |||
154 | #define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */ | 154 | #define PRID_REV_VR4181A 0x0070 /* Same as VR4122 */ |
155 | #define PRID_REV_VR4130 0x0080 | 155 | #define PRID_REV_VR4130 0x0080 |
156 | #define PRID_REV_34K_V1_0_2 0x0022 | 156 | #define PRID_REV_34K_V1_0_2 0x0022 |
157 | #define PRID_REV_LOONGSON2E 0x0002 | ||
158 | #define PRID_REV_LOONGSON2F 0x0003 | ||
157 | 159 | ||
158 | /* | 160 | /* |
159 | * Older processors used to encode processor version and revision in two | 161 | * Older processors used to encode processor version and revision in two |
diff --git a/arch/mips/include/asm/fcntl.h b/arch/mips/include/asm/fcntl.h index 7c6681aa2ab8..e482fe90fe88 100644 --- a/arch/mips/include/asm/fcntl.h +++ b/arch/mips/include/asm/fcntl.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #define FASYNC 0x1000 /* fcntl, for BSD compatibility */ | 19 | #define FASYNC 0x1000 /* fcntl, for BSD compatibility */ |
20 | #define O_LARGEFILE 0x2000 /* allow large file opens */ | 20 | #define O_LARGEFILE 0x2000 /* allow large file opens */ |
21 | /* | 21 | /* |
22 | * Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using | 22 | * Before Linux 2.6.33 only O_DSYNC semantics were implemented, but using |
23 | * the O_SYNC flag. We continue to use the existing numerical value | 23 | * the O_SYNC flag. We continue to use the existing numerical value |
24 | * for O_DSYNC semantics now, but using the correct symbolic name for it. | 24 | * for O_DSYNC semantics now, but using the correct symbolic name for it. |
25 | * This new value is used to request true Posix O_SYNC semantics. It is | 25 | * This new value is used to request true Posix O_SYNC semantics. It is |
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h index 8a3ef247659a..7fcef8ef3fab 100644 --- a/arch/mips/include/asm/fpu.h +++ b/arch/mips/include/asm/fpu.h | |||
@@ -28,15 +28,7 @@ | |||
28 | struct sigcontext; | 28 | struct sigcontext; |
29 | struct sigcontext32; | 29 | struct sigcontext32; |
30 | 30 | ||
31 | extern asmlinkage int (*save_fp_context)(struct sigcontext __user *sc); | ||
32 | extern asmlinkage int (*restore_fp_context)(struct sigcontext __user *sc); | ||
33 | |||
34 | extern asmlinkage int (*save_fp_context32)(struct sigcontext32 __user *sc); | ||
35 | extern asmlinkage int (*restore_fp_context32)(struct sigcontext32 __user *sc); | ||
36 | |||
37 | extern void fpu_emulator_init_fpu(void); | 31 | extern void fpu_emulator_init_fpu(void); |
38 | extern int fpu_emulator_save_context(struct sigcontext __user *sc); | ||
39 | extern int fpu_emulator_restore_context(struct sigcontext __user *sc); | ||
40 | extern void _init_fpu(void); | 32 | extern void _init_fpu(void); |
41 | extern void _save_fp(struct task_struct *); | 33 | extern void _save_fp(struct task_struct *); |
42 | extern void _restore_fp(struct task_struct *); | 34 | extern void _restore_fp(struct task_struct *); |
diff --git a/arch/mips/include/asm/fpu_emulator.h b/arch/mips/include/asm/fpu_emulator.h index e5189572956c..aecada6f6117 100644 --- a/arch/mips/include/asm/fpu_emulator.h +++ b/arch/mips/include/asm/fpu_emulator.h | |||
@@ -25,17 +25,27 @@ | |||
25 | 25 | ||
26 | #include <asm/break.h> | 26 | #include <asm/break.h> |
27 | #include <asm/inst.h> | 27 | #include <asm/inst.h> |
28 | #include <asm/local.h> | ||
29 | |||
30 | #ifdef CONFIG_DEBUG_FS | ||
28 | 31 | ||
29 | struct mips_fpu_emulator_stats { | 32 | struct mips_fpu_emulator_stats { |
30 | unsigned int emulated; | 33 | local_t emulated; |
31 | unsigned int loads; | 34 | local_t loads; |
32 | unsigned int stores; | 35 | local_t stores; |
33 | unsigned int cp1ops; | 36 | local_t cp1ops; |
34 | unsigned int cp1xops; | 37 | local_t cp1xops; |
35 | unsigned int errors; | 38 | local_t errors; |
36 | }; | 39 | }; |
37 | 40 | ||
38 | extern struct mips_fpu_emulator_stats fpuemustats; | 41 | DECLARE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); |
42 | |||
43 | #define MIPS_FPU_EMU_INC_STATS(M) \ | ||
44 | cpu_local_wrap(__local_inc(&__get_cpu_var(fpuemustats).M)) | ||
45 | |||
46 | #else | ||
47 | #define MIPS_FPU_EMU_INC_STATS(M) do { } while (0) | ||
48 | #endif /* CONFIG_DEBUG_FS */ | ||
39 | 49 | ||
40 | extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, | 50 | extern int mips_dsemul(struct pt_regs *regs, mips_instruction ir, |
41 | unsigned long cpc); | 51 | unsigned long cpc); |
diff --git a/arch/mips/include/asm/ftrace.h b/arch/mips/include/asm/ftrace.h index 40a8c178f10d..3986cd8704f3 100644 --- a/arch/mips/include/asm/ftrace.h +++ b/arch/mips/include/asm/ftrace.h | |||
@@ -1 +1,90 @@ | |||
1 | /* empty */ | 1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive for | ||
4 | * more details. | ||
5 | * | ||
6 | * Copyright (C) 2009 DSLab, Lanzhou University, China | ||
7 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
8 | */ | ||
9 | |||
10 | #ifndef _ASM_MIPS_FTRACE_H | ||
11 | #define _ASM_MIPS_FTRACE_H | ||
12 | |||
13 | #ifdef CONFIG_FUNCTION_TRACER | ||
14 | |||
15 | #define MCOUNT_ADDR ((unsigned long)(_mcount)) | ||
16 | #define MCOUNT_INSN_SIZE 4 /* sizeof mcount call */ | ||
17 | |||
18 | #ifndef __ASSEMBLY__ | ||
19 | extern void _mcount(void); | ||
20 | #define mcount _mcount | ||
21 | |||
22 | #define safe_load(load, src, dst, error) \ | ||
23 | do { \ | ||
24 | asm volatile ( \ | ||
25 | "1: " load " %[" STR(dst) "], 0(%[" STR(src) "])\n"\ | ||
26 | " li %[" STR(error) "], 0\n" \ | ||
27 | "2:\n" \ | ||
28 | \ | ||
29 | ".section .fixup, \"ax\"\n" \ | ||
30 | "3: li %[" STR(error) "], 1\n" \ | ||
31 | " j 2b\n" \ | ||
32 | ".previous\n" \ | ||
33 | \ | ||
34 | ".section\t__ex_table,\"a\"\n\t" \ | ||
35 | STR(PTR) "\t1b, 3b\n\t" \ | ||
36 | ".previous\n" \ | ||
37 | \ | ||
38 | : [dst] "=&r" (dst), [error] "=r" (error)\ | ||
39 | : [src] "r" (src) \ | ||
40 | : "memory" \ | ||
41 | ); \ | ||
42 | } while (0) | ||
43 | |||
44 | #define safe_store(store, src, dst, error) \ | ||
45 | do { \ | ||
46 | asm volatile ( \ | ||
47 | "1: " store " %[" STR(src) "], 0(%[" STR(dst) "])\n"\ | ||
48 | " li %[" STR(error) "], 0\n" \ | ||
49 | "2:\n" \ | ||
50 | \ | ||
51 | ".section .fixup, \"ax\"\n" \ | ||
52 | "3: li %[" STR(error) "], 1\n" \ | ||
53 | " j 2b\n" \ | ||
54 | ".previous\n" \ | ||
55 | \ | ||
56 | ".section\t__ex_table,\"a\"\n\t"\ | ||
57 | STR(PTR) "\t1b, 3b\n\t" \ | ||
58 | ".previous\n" \ | ||
59 | \ | ||
60 | : [error] "=r" (error) \ | ||
61 | : [dst] "r" (dst), [src] "r" (src)\ | ||
62 | : "memory" \ | ||
63 | ); \ | ||
64 | } while (0) | ||
65 | |||
66 | #define safe_load_code(dst, src, error) \ | ||
67 | safe_load(STR(lw), src, dst, error) | ||
68 | #define safe_store_code(src, dst, error) \ | ||
69 | safe_store(STR(sw), src, dst, error) | ||
70 | |||
71 | #define safe_load_stack(dst, src, error) \ | ||
72 | safe_load(STR(PTR_L), src, dst, error) | ||
73 | |||
74 | #define safe_store_stack(src, dst, error) \ | ||
75 | safe_store(STR(PTR_S), src, dst, error) | ||
76 | |||
77 | |||
78 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
79 | static inline unsigned long ftrace_call_adjust(unsigned long addr) | ||
80 | { | ||
81 | return addr; | ||
82 | } | ||
83 | |||
84 | struct dyn_arch_ftrace { | ||
85 | }; | ||
86 | |||
87 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
88 | #endif /* __ASSEMBLY__ */ | ||
89 | #endif /* CONFIG_FUNCTION_TRACER */ | ||
90 | #endif /* _ASM_MIPS_FTRACE_H */ | ||
diff --git a/arch/mips/include/asm/irq.h b/arch/mips/include/asm/irq.h index 09b08d05ff72..06960364c96b 100644 --- a/arch/mips/include/asm/irq.h +++ b/arch/mips/include/asm/irq.h | |||
@@ -113,36 +113,11 @@ do { \ | |||
113 | 113 | ||
114 | #endif | 114 | #endif |
115 | 115 | ||
116 | /* | 116 | extern void do_IRQ(unsigned int irq); |
117 | * do_IRQ handles all normal device IRQ's (the special | ||
118 | * SMP cross-CPU interrupts have their own specific | ||
119 | * handlers). | ||
120 | * | ||
121 | * Ideally there should be away to get this into kernel/irq/handle.c to | ||
122 | * avoid the overhead of a call for just a tiny function ... | ||
123 | */ | ||
124 | #define do_IRQ(irq) \ | ||
125 | do { \ | ||
126 | irq_enter(); \ | ||
127 | __DO_IRQ_SMTC_HOOK(irq); \ | ||
128 | generic_handle_irq(irq); \ | ||
129 | irq_exit(); \ | ||
130 | } while (0) | ||
131 | 117 | ||
132 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF | 118 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF |
133 | /* | ||
134 | * To avoid inefficient and in some cases pathological re-checking of | ||
135 | * IRQ affinity, we have this variant that skips the affinity check. | ||
136 | */ | ||
137 | |||
138 | 119 | ||
139 | #define do_IRQ_no_affinity(irq) \ | 120 | extern void do_IRQ_no_affinity(unsigned int irq); |
140 | do { \ | ||
141 | irq_enter(); \ | ||
142 | __NO_AFFINITY_IRQ_SMTC_HOOK(irq); \ | ||
143 | generic_handle_irq(irq); \ | ||
144 | irq_exit(); \ | ||
145 | } while (0) | ||
146 | 121 | ||
147 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ | 122 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ |
148 | 123 | ||
diff --git a/arch/mips/include/asm/mach-excite/cpu-feature-overrides.h b/arch/mips/include/asm/mach-excite/cpu-feature-overrides.h deleted file mode 100644 index 107104c3cd12..000000000000 --- a/arch/mips/include/asm/mach-excite/cpu-feature-overrides.h +++ /dev/null | |||
@@ -1,48 +0,0 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2004 Thomas Koeller <thomas.koeller@baslerweb.com> | ||
7 | * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) | ||
8 | */ | ||
9 | #ifndef __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H | ||
10 | #define __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H | ||
11 | |||
12 | /* | ||
13 | * Basler eXcite has an RM9122 processor. | ||
14 | */ | ||
15 | #define cpu_has_watch 1 | ||
16 | #define cpu_has_mips16 0 | ||
17 | #define cpu_has_divec 0 | ||
18 | #define cpu_has_vce 0 | ||
19 | #define cpu_has_cache_cdex_p 0 | ||
20 | #define cpu_has_cache_cdex_s 0 | ||
21 | #define cpu_has_prefetch 1 | ||
22 | #define cpu_has_mcheck 0 | ||
23 | #define cpu_has_ejtag 0 | ||
24 | |||
25 | #define cpu_has_llsc 1 | ||
26 | #define cpu_has_vtag_icache 0 | ||
27 | #define cpu_has_dc_aliases 0 | ||
28 | #define cpu_has_ic_fills_f_dc 0 | ||
29 | #define cpu_has_dsp 0 | ||
30 | #define cpu_icache_snoops_remote_store 0 | ||
31 | #define cpu_has_mipsmt 0 | ||
32 | #define cpu_has_userlocal 0 | ||
33 | |||
34 | #define cpu_has_nofpuex 0 | ||
35 | #define cpu_has_64bits 1 | ||
36 | |||
37 | #define cpu_has_mips32r1 0 | ||
38 | #define cpu_has_mips32r2 0 | ||
39 | #define cpu_has_mips64r1 0 | ||
40 | #define cpu_has_mips64r2 0 | ||
41 | |||
42 | #define cpu_has_inclusive_pcaches 0 | ||
43 | |||
44 | #define cpu_dcache_line_size() 32 | ||
45 | #define cpu_icache_line_size() 32 | ||
46 | #define cpu_scache_line_size() 32 | ||
47 | |||
48 | #endif /* __ASM_MACH_EXCITE_CPU_FEATURE_OVERRIDES_H */ | ||
diff --git a/arch/mips/include/asm/mach-excite/excite.h b/arch/mips/include/asm/mach-excite/excite.h deleted file mode 100644 index 4c29ba44992c..000000000000 --- a/arch/mips/include/asm/mach-excite/excite.h +++ /dev/null | |||
@@ -1,154 +0,0 @@ | |||
1 | #ifndef __EXCITE_H__ | ||
2 | #define __EXCITE_H__ | ||
3 | |||
4 | #include <linux/init.h> | ||
5 | #include <asm/addrspace.h> | ||
6 | #include <asm/types.h> | ||
7 | |||
8 | #define EXCITE_CPU_EXT_CLOCK 100000000 | ||
9 | |||
10 | #if !defined(__ASSEMBLY__) | ||
11 | void __init excite_kgdb_init(void); | ||
12 | void excite_procfs_init(void); | ||
13 | extern unsigned long memsize; | ||
14 | extern char modetty[]; | ||
15 | extern u32 unit_id; | ||
16 | #endif | ||
17 | |||
18 | /* Base name for XICAP devices */ | ||
19 | #define XICAP_NAME "xicap_gpi" | ||
20 | |||
21 | /* OCD register offsets */ | ||
22 | #define LKB0 0x0038 | ||
23 | #define LKB5 0x0128 | ||
24 | #define LKM5 0x012C | ||
25 | #define LKB7 0x0138 | ||
26 | #define LKM7 0x013c | ||
27 | #define LKB8 0x0140 | ||
28 | #define LKM8 0x0144 | ||
29 | #define LKB9 0x0148 | ||
30 | #define LKM9 0x014c | ||
31 | #define LKB10 0x0150 | ||
32 | #define LKM10 0x0154 | ||
33 | #define LKB11 0x0158 | ||
34 | #define LKM11 0x015c | ||
35 | #define LKB12 0x0160 | ||
36 | #define LKM12 0x0164 | ||
37 | #define LKB13 0x0168 | ||
38 | #define LKM13 0x016c | ||
39 | #define LDP0 0x0200 | ||
40 | #define LDP1 0x0210 | ||
41 | #define LDP2 0x0220 | ||
42 | #define LDP3 0x0230 | ||
43 | #define INTPIN0 0x0A40 | ||
44 | #define INTPIN1 0x0A44 | ||
45 | #define INTPIN2 0x0A48 | ||
46 | #define INTPIN3 0x0A4C | ||
47 | #define INTPIN4 0x0A50 | ||
48 | #define INTPIN5 0x0A54 | ||
49 | #define INTPIN6 0x0A58 | ||
50 | #define INTPIN7 0x0A5C | ||
51 | |||
52 | |||
53 | |||
54 | |||
55 | /* TITAN register offsets */ | ||
56 | #define CPRR 0x0004 | ||
57 | #define CPDSR 0x0008 | ||
58 | #define CPTC0R 0x000c | ||
59 | #define CPTC1R 0x0010 | ||
60 | #define CPCFG0 0x0020 | ||
61 | #define CPCFG1 0x0024 | ||
62 | #define CPDST0A 0x0028 | ||
63 | #define CPDST0B 0x002c | ||
64 | #define CPDST1A 0x0030 | ||
65 | #define CPDST1B 0x0034 | ||
66 | #define CPXDSTA 0x0038 | ||
67 | #define CPXDSTB 0x003c | ||
68 | #define CPXCISRA 0x0048 | ||
69 | #define CPXCISRB 0x004c | ||
70 | #define CPGIG0ER 0x0050 | ||
71 | #define CPGIG1ER 0x0054 | ||
72 | #define CPGRWL 0x0068 | ||
73 | #define CPURSLMT 0x00f8 | ||
74 | #define UACFG 0x0200 | ||
75 | #define UAINTS 0x0204 | ||
76 | #define SDRXFCIE 0x4828 | ||
77 | #define SDTXFCIE 0x4928 | ||
78 | #define INTP0Status0 0x1B00 | ||
79 | #define INTP0Mask0 0x1B04 | ||
80 | #define INTP0Set0 0x1B08 | ||
81 | #define INTP0Clear0 0x1B0C | ||
82 | #define GXCFG 0x5000 | ||
83 | #define GXDMADRPFX 0x5018 | ||
84 | #define GXDMA_DESCADR 0x501c | ||
85 | #define GXCH0TDESSTRT 0x5054 | ||
86 | |||
87 | /* IRQ definitions */ | ||
88 | #define NMICONFIG 0xac0 | ||
89 | #define TITAN_MSGINT 0xc4 | ||
90 | #define TITAN_IRQ ((TITAN_MSGINT / 0x20) + 2) | ||
91 | #define FPGA0_MSGINT 0x5a | ||
92 | #define FPGA0_IRQ ((FPGA0_MSGINT / 0x20) + 2) | ||
93 | #define FPGA1_MSGINT 0x7b | ||
94 | #define FPGA1_IRQ ((FPGA1_MSGINT / 0x20) + 2) | ||
95 | #define PHY_MSGINT 0x9c | ||
96 | #define PHY_IRQ ((PHY_MSGINT / 0x20) + 2) | ||
97 | |||
98 | #if defined(CONFIG_BASLER_EXCITE_PROTOTYPE) | ||
99 | /* Pre-release units used interrupt pin #9 */ | ||
100 | #define USB_IRQ 11 | ||
101 | #else | ||
102 | /* Re-designed units use interrupt pin #1 */ | ||
103 | #define USB_MSGINT 0x39 | ||
104 | #define USB_IRQ ((USB_MSGINT / 0x20) + 2) | ||
105 | #endif | ||
106 | #define TIMER_IRQ 12 | ||
107 | |||
108 | |||
109 | /* Device address ranges */ | ||
110 | #define EXCITE_OFFS_OCD 0x1fffc000 | ||
111 | #define EXCITE_SIZE_OCD (16 * 1024) | ||
112 | #define EXCITE_PHYS_OCD CPHYSADDR(EXCITE_OFFS_OCD) | ||
113 | #define EXCITE_ADDR_OCD CKSEG1ADDR(EXCITE_OFFS_OCD) | ||
114 | |||
115 | #define EXCITE_OFFS_SCRAM 0x1fffa000 | ||
116 | #define EXCITE_SIZE_SCRAM (8 << 10) | ||
117 | #define EXCITE_PHYS_SCRAM CPHYSADDR(EXCITE_OFFS_SCRAM) | ||
118 | #define EXCITE_ADDR_SCRAM CKSEG1ADDR(EXCITE_OFFS_SCRAM) | ||
119 | |||
120 | #define EXCITE_OFFS_PCI_IO 0x1fff8000 | ||
121 | #define EXCITE_SIZE_PCI_IO (8 << 10) | ||
122 | #define EXCITE_PHYS_PCI_IO CPHYSADDR(EXCITE_OFFS_PCI_IO) | ||
123 | #define EXCITE_ADDR_PCI_IO CKSEG1ADDR(EXCITE_OFFS_PCI_IO) | ||
124 | |||
125 | #define EXCITE_OFFS_TITAN 0x1fff0000 | ||
126 | #define EXCITE_SIZE_TITAN (32 << 10) | ||
127 | #define EXCITE_PHYS_TITAN CPHYSADDR(EXCITE_OFFS_TITAN) | ||
128 | #define EXCITE_ADDR_TITAN CKSEG1ADDR(EXCITE_OFFS_TITAN) | ||
129 | |||
130 | #define EXCITE_OFFS_PCI_MEM 0x1ffe0000 | ||
131 | #define EXCITE_SIZE_PCI_MEM (64 << 10) | ||
132 | #define EXCITE_PHYS_PCI_MEM CPHYSADDR(EXCITE_OFFS_PCI_MEM) | ||
133 | #define EXCITE_ADDR_PCI_MEM CKSEG1ADDR(EXCITE_OFFS_PCI_MEM) | ||
134 | |||
135 | #define EXCITE_OFFS_FPGA 0x1ffdc000 | ||
136 | #define EXCITE_SIZE_FPGA (16 << 10) | ||
137 | #define EXCITE_PHYS_FPGA CPHYSADDR(EXCITE_OFFS_FPGA) | ||
138 | #define EXCITE_ADDR_FPGA CKSEG1ADDR(EXCITE_OFFS_FPGA) | ||
139 | |||
140 | #define EXCITE_OFFS_NAND 0x1ffd8000 | ||
141 | #define EXCITE_SIZE_NAND (16 << 10) | ||
142 | #define EXCITE_PHYS_NAND CPHYSADDR(EXCITE_OFFS_NAND) | ||
143 | #define EXCITE_ADDR_NAND CKSEG1ADDR(EXCITE_OFFS_NAND) | ||
144 | |||
145 | #define EXCITE_OFFS_BOOTROM 0x1f000000 | ||
146 | #define EXCITE_SIZE_BOOTROM (8 << 20) | ||
147 | #define EXCITE_PHYS_BOOTROM CPHYSADDR(EXCITE_OFFS_BOOTROM) | ||
148 | #define EXCITE_ADDR_BOOTROM CKSEG1ADDR(EXCITE_OFFS_BOOTROM) | ||
149 | |||
150 | /* FPGA address offsets */ | ||
151 | #define EXCITE_FPGA_DPR 0x0104 /* dual-ported ram */ | ||
152 | #define EXCITE_FPGA_SYSCTL 0x0200 /* system control register block */ | ||
153 | |||
154 | #endif /* __EXCITE_H__ */ | ||
diff --git a/arch/mips/include/asm/mach-excite/excite_fpga.h b/arch/mips/include/asm/mach-excite/excite_fpga.h deleted file mode 100644 index 0a1ef69bece7..000000000000 --- a/arch/mips/include/asm/mach-excite/excite_fpga.h +++ /dev/null | |||
@@ -1,80 +0,0 @@ | |||
1 | #ifndef EXCITE_FPGA_H_INCLUDED | ||
2 | #define EXCITE_FPGA_H_INCLUDED | ||
3 | |||
4 | |||
5 | /** | ||
6 | * Address alignment of the individual FPGA bytes. | ||
7 | * The address arrangement of the individual bytes of the FPGA is two | ||
8 | * byte aligned at the embedded MK2 platform. | ||
9 | */ | ||
10 | #ifdef EXCITE_CCI_FPGA_MK2 | ||
11 | typedef unsigned char excite_cci_fpga_align_t __attribute__ ((aligned(2))); | ||
12 | #else | ||
13 | typedef unsigned char excite_cci_fpga_align_t; | ||
14 | #endif | ||
15 | |||
16 | |||
17 | /** | ||
18 | * Size of Dual Ported RAM. | ||
19 | */ | ||
20 | #define EXCITE_DPR_SIZE 263 | ||
21 | |||
22 | |||
23 | /** | ||
24 | * Size of Reserved Status Fields in Dual Ported RAM. | ||
25 | */ | ||
26 | #define EXCITE_DPR_STATUS_SIZE 7 | ||
27 | |||
28 | |||
29 | |||
30 | /** | ||
31 | * FPGA. | ||
32 | * Hardware register layout of the FPGA interface. The FPGA must accessed | ||
33 | * byte wise solely. | ||
34 | * @see EXCITE_CCI_DPR_MK2 | ||
35 | */ | ||
36 | typedef struct excite_fpga { | ||
37 | |||
38 | /** | ||
39 | * Dual Ported RAM. | ||
40 | */ | ||
41 | excite_cci_fpga_align_t dpr[EXCITE_DPR_SIZE]; | ||
42 | |||
43 | /** | ||
44 | * Status. | ||
45 | */ | ||
46 | excite_cci_fpga_align_t status[EXCITE_DPR_STATUS_SIZE]; | ||
47 | |||
48 | #ifdef EXCITE_CCI_FPGA_MK2 | ||
49 | /** | ||
50 | * RM9000 Interrupt. | ||
51 | * Write access initiates interrupt at the RM9000 (MIPS) processor of the eXcite. | ||
52 | */ | ||
53 | excite_cci_fpga_align_t rm9k_int; | ||
54 | #else | ||
55 | /** | ||
56 | * MK2 Interrupt. | ||
57 | * Write access initiates interrupt at the ARM processor of the MK2. | ||
58 | */ | ||
59 | excite_cci_fpga_align_t mk2_int; | ||
60 | |||
61 | excite_cci_fpga_align_t gap[0x1000-0x10f]; | ||
62 | |||
63 | /** | ||
64 | * IRQ Source/Acknowledge. | ||
65 | */ | ||
66 | excite_cci_fpga_align_t rm9k_irq_src; | ||
67 | |||
68 | /** | ||
69 | * IRQ Mask. | ||
70 | * Set bits enable the related interrupt. | ||
71 | */ | ||
72 | excite_cci_fpga_align_t rm9k_irq_mask; | ||
73 | #endif | ||
74 | |||
75 | |||
76 | } excite_fpga; | ||
77 | |||
78 | |||
79 | |||
80 | #endif /* ndef EXCITE_FPGA_H_INCLUDED */ | ||
diff --git a/arch/mips/include/asm/mach-excite/excite_nandflash.h b/arch/mips/include/asm/mach-excite/excite_nandflash.h deleted file mode 100644 index c4cf6140622e..000000000000 --- a/arch/mips/include/asm/mach-excite/excite_nandflash.h +++ /dev/null | |||
@@ -1,7 +0,0 @@ | |||
1 | #ifndef __EXCITE_NANDFLASH_H__ | ||
2 | #define __EXCITE_NANDFLASH_H__ | ||
3 | |||
4 | /* Resource names */ | ||
5 | #define EXCITE_NANDFLASH_RESOURCE_REGS "excite_nandflash_regs" | ||
6 | |||
7 | #endif /* __EXCITE_NANDFLASH_H__ */ | ||
diff --git a/arch/mips/include/asm/mach-excite/rm9k_eth.h b/arch/mips/include/asm/mach-excite/rm9k_eth.h deleted file mode 100644 index 94705a46f72e..000000000000 --- a/arch/mips/include/asm/mach-excite/rm9k_eth.h +++ /dev/null | |||
@@ -1,23 +0,0 @@ | |||
1 | #if !defined(__RM9K_ETH_H__) | ||
2 | #define __RM9K_ETH_H__ | ||
3 | |||
4 | #define RM9K_GE_NAME "rm9k_ge" | ||
5 | |||
6 | /* Resource names */ | ||
7 | #define RM9K_GE_RESOURCE_MAC "rm9k_ge_mac" | ||
8 | #define RM9K_GE_RESOURCE_MSTAT "rm9k_ge_mstat" | ||
9 | #define RM9K_GE_RESOURCE_PKTPROC "rm9k_ge_pktproc" | ||
10 | #define RM9K_GE_RESOURCE_XDMA "rm9k_ge_xdma" | ||
11 | #define RM9K_GE_RESOURCE_FIFO_RX "rm9k_ge_fifo_rx" | ||
12 | #define RM9K_GE_RESOURCE_FIFO_TX "rm9k_ge_fifo_tx" | ||
13 | #define RM9K_GE_RESOURCE_FIFOMEM_RX "rm9k_ge_fifo_memory_rx" | ||
14 | #define RM9K_GE_RESOURCE_FIFOMEM_TX "rm9k_ge_fifo_memory_tx" | ||
15 | #define RM9K_GE_RESOURCE_PHY "rm9k_ge_phy" | ||
16 | #define RM9K_GE_RESOURCE_DMADESC_RX "rm9k_ge_dmadesc_rx" | ||
17 | #define RM9K_GE_RESOURCE_DMADESC_TX "rm9k_ge_dmadesc_tx" | ||
18 | #define RM9K_GE_RESOURCE_IRQ_MAIN "rm9k_ge_irq_main" | ||
19 | #define RM9K_GE_RESOURCE_IRQ_PHY "rm9k_ge_irq_phy" | ||
20 | #define RM9K_GE_RESOURCE_GPI_SLICE "rm9k_ge_gpi_slice" | ||
21 | #define RM9K_GE_RESOURCE_MDIO_CHANNEL "rm9k_ge_mdio_channel" | ||
22 | |||
23 | #endif /* !defined(__RM9K_ETH_H__) */ | ||
diff --git a/arch/mips/include/asm/mach-excite/rm9k_wdt.h b/arch/mips/include/asm/mach-excite/rm9k_wdt.h deleted file mode 100644 index 3fa3c08d2da7..000000000000 --- a/arch/mips/include/asm/mach-excite/rm9k_wdt.h +++ /dev/null | |||
@@ -1,12 +0,0 @@ | |||
1 | #ifndef __RM9K_WDT_H__ | ||
2 | #define __RM9K_WDT_H__ | ||
3 | |||
4 | /* Device name */ | ||
5 | #define WDT_NAME "wdt_gpi" | ||
6 | |||
7 | /* Resource names */ | ||
8 | #define WDT_RESOURCE_REGS "excite_watchdog_regs" | ||
9 | #define WDT_RESOURCE_IRQ "excite_watchdog_irq" | ||
10 | #define WDT_RESOURCE_COUNTER "excite_watchdog_counter" | ||
11 | |||
12 | #endif /* __RM9K_WDT_H__ */ | ||
diff --git a/arch/mips/include/asm/mach-excite/rm9k_xicap.h b/arch/mips/include/asm/mach-excite/rm9k_xicap.h deleted file mode 100644 index 009577734a8d..000000000000 --- a/arch/mips/include/asm/mach-excite/rm9k_xicap.h +++ /dev/null | |||
@@ -1,16 +0,0 @@ | |||
1 | #ifndef __EXCITE_XICAP_H__ | ||
2 | #define __EXCITE_XICAP_H__ | ||
3 | |||
4 | |||
5 | /* Resource names */ | ||
6 | #define XICAP_RESOURCE_FIFO_RX "xicap_fifo_rx" | ||
7 | #define XICAP_RESOURCE_FIFO_TX "xicap_fifo_tx" | ||
8 | #define XICAP_RESOURCE_XDMA "xicap_xdma" | ||
9 | #define XICAP_RESOURCE_DMADESC "xicap_dmadesc" | ||
10 | #define XICAP_RESOURCE_PKTPROC "xicap_pktproc" | ||
11 | #define XICAP_RESOURCE_IRQ "xicap_irq" | ||
12 | #define XICAP_RESOURCE_GPI_SLICE "xicap_gpi_slice" | ||
13 | #define XICAP_RESOURCE_FIFO_BLK "xicap_fifo_blocks" | ||
14 | #define XICAP_RESOURCE_PKT_STREAM "xicap_pkt_stream" | ||
15 | |||
16 | #endif /* __EXCITE_XICAP_H__ */ | ||
diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h b/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h new file mode 100644 index 000000000000..021f77ca59ec --- /dev/null +++ b/arch/mips/include/asm/mach-loongson/cs5536/cs5536.h | |||
@@ -0,0 +1,305 @@ | |||
1 | /* | ||
2 | * The header file of cs5536 sourth bridge. | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote, Inc. | ||
5 | * Author : jlliu <liujl@lemote.com> | ||
6 | */ | ||
7 | |||
8 | #ifndef _CS5536_H | ||
9 | #define _CS5536_H | ||
10 | |||
11 | #include <linux/types.h> | ||
12 | |||
13 | extern void _rdmsr(u32 msr, u32 *hi, u32 *lo); | ||
14 | extern void _wrmsr(u32 msr, u32 hi, u32 lo); | ||
15 | |||
16 | /* | ||
17 | * MSR module base | ||
18 | */ | ||
19 | #define CS5536_SB_MSR_BASE (0x00000000) | ||
20 | #define CS5536_GLIU_MSR_BASE (0x10000000) | ||
21 | #define CS5536_ILLEGAL_MSR_BASE (0x20000000) | ||
22 | #define CS5536_USB_MSR_BASE (0x40000000) | ||
23 | #define CS5536_IDE_MSR_BASE (0x60000000) | ||
24 | #define CS5536_DIVIL_MSR_BASE (0x80000000) | ||
25 | #define CS5536_ACC_MSR_BASE (0xa0000000) | ||
26 | #define CS5536_UNUSED_MSR_BASE (0xc0000000) | ||
27 | #define CS5536_GLCP_MSR_BASE (0xe0000000) | ||
28 | |||
29 | #define SB_MSR_REG(offset) (CS5536_SB_MSR_BASE | (offset)) | ||
30 | #define GLIU_MSR_REG(offset) (CS5536_GLIU_MSR_BASE | (offset)) | ||
31 | #define ILLEGAL_MSR_REG(offset) (CS5536_ILLEGAL_MSR_BASE | (offset)) | ||
32 | #define USB_MSR_REG(offset) (CS5536_USB_MSR_BASE | (offset)) | ||
33 | #define IDE_MSR_REG(offset) (CS5536_IDE_MSR_BASE | (offset)) | ||
34 | #define DIVIL_MSR_REG(offset) (CS5536_DIVIL_MSR_BASE | (offset)) | ||
35 | #define ACC_MSR_REG(offset) (CS5536_ACC_MSR_BASE | (offset)) | ||
36 | #define UNUSED_MSR_REG(offset) (CS5536_UNUSED_MSR_BASE | (offset)) | ||
37 | #define GLCP_MSR_REG(offset) (CS5536_GLCP_MSR_BASE | (offset)) | ||
38 | |||
39 | /* | ||
40 | * BAR SPACE OF VIRTUAL PCI : | ||
41 | * range for pci probe use, length is the actual size. | ||
42 | */ | ||
43 | /* IO space for all DIVIL modules */ | ||
44 | #define CS5536_IRQ_RANGE 0xffffffe0 /* USERD FOR PCI PROBE */ | ||
45 | #define CS5536_IRQ_LENGTH 0x20 /* THE REGS ACTUAL LENGTH */ | ||
46 | #define CS5536_SMB_RANGE 0xfffffff8 | ||
47 | #define CS5536_SMB_LENGTH 0x08 | ||
48 | #define CS5536_GPIO_RANGE 0xffffff00 | ||
49 | #define CS5536_GPIO_LENGTH 0x100 | ||
50 | #define CS5536_MFGPT_RANGE 0xffffffc0 | ||
51 | #define CS5536_MFGPT_LENGTH 0x40 | ||
52 | #define CS5536_ACPI_RANGE 0xffffffe0 | ||
53 | #define CS5536_ACPI_LENGTH 0x20 | ||
54 | #define CS5536_PMS_RANGE 0xffffff80 | ||
55 | #define CS5536_PMS_LENGTH 0x80 | ||
56 | /* IO space for IDE */ | ||
57 | #define CS5536_IDE_RANGE 0xfffffff0 | ||
58 | #define CS5536_IDE_LENGTH 0x10 | ||
59 | /* IO space for ACC */ | ||
60 | #define CS5536_ACC_RANGE 0xffffff80 | ||
61 | #define CS5536_ACC_LENGTH 0x80 | ||
62 | /* MEM space for ALL USB modules */ | ||
63 | #define CS5536_OHCI_RANGE 0xfffff000 | ||
64 | #define CS5536_OHCI_LENGTH 0x1000 | ||
65 | #define CS5536_EHCI_RANGE 0xfffff000 | ||
66 | #define CS5536_EHCI_LENGTH 0x1000 | ||
67 | |||
68 | /* | ||
69 | * PCI MSR ACCESS | ||
70 | */ | ||
71 | #define PCI_MSR_CTRL 0xF0 | ||
72 | #define PCI_MSR_ADDR 0xF4 | ||
73 | #define PCI_MSR_DATA_LO 0xF8 | ||
74 | #define PCI_MSR_DATA_HI 0xFC | ||
75 | |||
76 | /**************** MSR *****************************/ | ||
77 | |||
78 | /* | ||
79 | * GLIU STANDARD MSR | ||
80 | */ | ||
81 | #define GLIU_CAP 0x00 | ||
82 | #define GLIU_CONFIG 0x01 | ||
83 | #define GLIU_SMI 0x02 | ||
84 | #define GLIU_ERROR 0x03 | ||
85 | #define GLIU_PM 0x04 | ||
86 | #define GLIU_DIAG 0x05 | ||
87 | |||
88 | /* | ||
89 | * GLIU SPEC. MSR | ||
90 | */ | ||
91 | #define GLIU_P2D_BM0 0x20 | ||
92 | #define GLIU_P2D_BM1 0x21 | ||
93 | #define GLIU_P2D_BM2 0x22 | ||
94 | #define GLIU_P2D_BMK0 0x23 | ||
95 | #define GLIU_P2D_BMK1 0x24 | ||
96 | #define GLIU_P2D_BM3 0x25 | ||
97 | #define GLIU_P2D_BM4 0x26 | ||
98 | #define GLIU_COH 0x80 | ||
99 | #define GLIU_PAE 0x81 | ||
100 | #define GLIU_ARB 0x82 | ||
101 | #define GLIU_ASMI 0x83 | ||
102 | #define GLIU_AERR 0x84 | ||
103 | #define GLIU_DEBUG 0x85 | ||
104 | #define GLIU_PHY_CAP 0x86 | ||
105 | #define GLIU_NOUT_RESP 0x87 | ||
106 | #define GLIU_NOUT_WDATA 0x88 | ||
107 | #define GLIU_WHOAMI 0x8B | ||
108 | #define GLIU_SLV_DIS 0x8C | ||
109 | #define GLIU_IOD_BM0 0xE0 | ||
110 | #define GLIU_IOD_BM1 0xE1 | ||
111 | #define GLIU_IOD_BM2 0xE2 | ||
112 | #define GLIU_IOD_BM3 0xE3 | ||
113 | #define GLIU_IOD_BM4 0xE4 | ||
114 | #define GLIU_IOD_BM5 0xE5 | ||
115 | #define GLIU_IOD_BM6 0xE6 | ||
116 | #define GLIU_IOD_BM7 0xE7 | ||
117 | #define GLIU_IOD_BM8 0xE8 | ||
118 | #define GLIU_IOD_BM9 0xE9 | ||
119 | #define GLIU_IOD_SC0 0xEA | ||
120 | #define GLIU_IOD_SC1 0xEB | ||
121 | #define GLIU_IOD_SC2 0xEC | ||
122 | #define GLIU_IOD_SC3 0xED | ||
123 | #define GLIU_IOD_SC4 0xEE | ||
124 | #define GLIU_IOD_SC5 0xEF | ||
125 | #define GLIU_IOD_SC6 0xF0 | ||
126 | #define GLIU_IOD_SC7 0xF1 | ||
127 | |||
128 | /* | ||
129 | * SB STANDARD | ||
130 | */ | ||
131 | #define SB_CAP 0x00 | ||
132 | #define SB_CONFIG 0x01 | ||
133 | #define SB_SMI 0x02 | ||
134 | #define SB_ERROR 0x03 | ||
135 | #define SB_MAR_ERR_EN 0x00000001 | ||
136 | #define SB_TAR_ERR_EN 0x00000002 | ||
137 | #define SB_RSVD_BIT1 0x00000004 | ||
138 | #define SB_EXCEP_ERR_EN 0x00000008 | ||
139 | #define SB_SYSE_ERR_EN 0x00000010 | ||
140 | #define SB_PARE_ERR_EN 0x00000020 | ||
141 | #define SB_TAS_ERR_EN 0x00000040 | ||
142 | #define SB_MAR_ERR_FLAG 0x00010000 | ||
143 | #define SB_TAR_ERR_FLAG 0x00020000 | ||
144 | #define SB_RSVD_BIT2 0x00040000 | ||
145 | #define SB_EXCEP_ERR_FLAG 0x00080000 | ||
146 | #define SB_SYSE_ERR_FLAG 0x00100000 | ||
147 | #define SB_PARE_ERR_FLAG 0x00200000 | ||
148 | #define SB_TAS_ERR_FLAG 0x00400000 | ||
149 | #define SB_PM 0x04 | ||
150 | #define SB_DIAG 0x05 | ||
151 | |||
152 | /* | ||
153 | * SB SPEC. | ||
154 | */ | ||
155 | #define SB_CTRL 0x10 | ||
156 | #define SB_R0 0x20 | ||
157 | #define SB_R1 0x21 | ||
158 | #define SB_R2 0x22 | ||
159 | #define SB_R3 0x23 | ||
160 | #define SB_R4 0x24 | ||
161 | #define SB_R5 0x25 | ||
162 | #define SB_R6 0x26 | ||
163 | #define SB_R7 0x27 | ||
164 | #define SB_R8 0x28 | ||
165 | #define SB_R9 0x29 | ||
166 | #define SB_R10 0x2A | ||
167 | #define SB_R11 0x2B | ||
168 | #define SB_R12 0x2C | ||
169 | #define SB_R13 0x2D | ||
170 | #define SB_R14 0x2E | ||
171 | #define SB_R15 0x2F | ||
172 | |||
173 | /* | ||
174 | * GLCP STANDARD | ||
175 | */ | ||
176 | #define GLCP_CAP 0x00 | ||
177 | #define GLCP_CONFIG 0x01 | ||
178 | #define GLCP_SMI 0x02 | ||
179 | #define GLCP_ERROR 0x03 | ||
180 | #define GLCP_PM 0x04 | ||
181 | #define GLCP_DIAG 0x05 | ||
182 | |||
183 | /* | ||
184 | * GLCP SPEC. | ||
185 | */ | ||
186 | #define GLCP_CLK_DIS_DELAY 0x08 | ||
187 | #define GLCP_PM_CLK_DISABLE 0x09 | ||
188 | #define GLCP_GLB_PM 0x0B | ||
189 | #define GLCP_DBG_OUT 0x0C | ||
190 | #define GLCP_RSVD1 0x0D | ||
191 | #define GLCP_SOFT_COM 0x0E | ||
192 | #define SOFT_BAR_SMB_FLAG 0x00000001 | ||
193 | #define SOFT_BAR_GPIO_FLAG 0x00000002 | ||
194 | #define SOFT_BAR_MFGPT_FLAG 0x00000004 | ||
195 | #define SOFT_BAR_IRQ_FLAG 0x00000008 | ||
196 | #define SOFT_BAR_PMS_FLAG 0x00000010 | ||
197 | #define SOFT_BAR_ACPI_FLAG 0x00000020 | ||
198 | #define SOFT_BAR_IDE_FLAG 0x00000400 | ||
199 | #define SOFT_BAR_ACC_FLAG 0x00000800 | ||
200 | #define SOFT_BAR_OHCI_FLAG 0x00001000 | ||
201 | #define SOFT_BAR_EHCI_FLAG 0x00002000 | ||
202 | #define GLCP_RSVD2 0x0F | ||
203 | #define GLCP_CLK_OFF 0x10 | ||
204 | #define GLCP_CLK_ACTIVE 0x11 | ||
205 | #define GLCP_CLK_DISABLE 0x12 | ||
206 | #define GLCP_CLK4ACK 0x13 | ||
207 | #define GLCP_SYS_RST 0x14 | ||
208 | #define GLCP_RSVD3 0x15 | ||
209 | #define GLCP_DBG_CLK_CTRL 0x16 | ||
210 | #define GLCP_CHIP_REV_ID 0x17 | ||
211 | |||
212 | /* PIC */ | ||
213 | #define PIC_YSEL_LOW 0x20 | ||
214 | #define PIC_YSEL_LOW_USB_SHIFT 8 | ||
215 | #define PIC_YSEL_LOW_ACC_SHIFT 16 | ||
216 | #define PIC_YSEL_LOW_FLASH_SHIFT 24 | ||
217 | #define PIC_YSEL_HIGH 0x21 | ||
218 | #define PIC_ZSEL_LOW 0x22 | ||
219 | #define PIC_ZSEL_HIGH 0x23 | ||
220 | #define PIC_IRQM_PRIM 0x24 | ||
221 | #define PIC_IRQM_LPC 0x25 | ||
222 | #define PIC_XIRR_STS_LOW 0x26 | ||
223 | #define PIC_XIRR_STS_HIGH 0x27 | ||
224 | #define PCI_SHDW 0x34 | ||
225 | |||
226 | /* | ||
227 | * DIVIL STANDARD | ||
228 | */ | ||
229 | #define DIVIL_CAP 0x00 | ||
230 | #define DIVIL_CONFIG 0x01 | ||
231 | #define DIVIL_SMI 0x02 | ||
232 | #define DIVIL_ERROR 0x03 | ||
233 | #define DIVIL_PM 0x04 | ||
234 | #define DIVIL_DIAG 0x05 | ||
235 | |||
236 | /* | ||
237 | * DIVIL SPEC. | ||
238 | */ | ||
239 | #define DIVIL_LBAR_IRQ 0x08 | ||
240 | #define DIVIL_LBAR_KEL 0x09 | ||
241 | #define DIVIL_LBAR_SMB 0x0B | ||
242 | #define DIVIL_LBAR_GPIO 0x0C | ||
243 | #define DIVIL_LBAR_MFGPT 0x0D | ||
244 | #define DIVIL_LBAR_ACPI 0x0E | ||
245 | #define DIVIL_LBAR_PMS 0x0F | ||
246 | #define DIVIL_LEG_IO 0x14 | ||
247 | #define DIVIL_BALL_OPTS 0x15 | ||
248 | #define DIVIL_SOFT_IRQ 0x16 | ||
249 | #define DIVIL_SOFT_RESET 0x17 | ||
250 | |||
251 | /* MFGPT */ | ||
252 | #define MFGPT_IRQ 0x28 | ||
253 | |||
254 | /* | ||
255 | * IDE STANDARD | ||
256 | */ | ||
257 | #define IDE_CAP 0x00 | ||
258 | #define IDE_CONFIG 0x01 | ||
259 | #define IDE_SMI 0x02 | ||
260 | #define IDE_ERROR 0x03 | ||
261 | #define IDE_PM 0x04 | ||
262 | #define IDE_DIAG 0x05 | ||
263 | |||
264 | /* | ||
265 | * IDE SPEC. | ||
266 | */ | ||
267 | #define IDE_IO_BAR 0x08 | ||
268 | #define IDE_CFG 0x10 | ||
269 | #define IDE_DTC 0x12 | ||
270 | #define IDE_CAST 0x13 | ||
271 | #define IDE_ETC 0x14 | ||
272 | #define IDE_INTERNAL_PM 0x15 | ||
273 | |||
274 | /* | ||
275 | * ACC STANDARD | ||
276 | */ | ||
277 | #define ACC_CAP 0x00 | ||
278 | #define ACC_CONFIG 0x01 | ||
279 | #define ACC_SMI 0x02 | ||
280 | #define ACC_ERROR 0x03 | ||
281 | #define ACC_PM 0x04 | ||
282 | #define ACC_DIAG 0x05 | ||
283 | |||
284 | /* | ||
285 | * USB STANDARD | ||
286 | */ | ||
287 | #define USB_CAP 0x00 | ||
288 | #define USB_CONFIG 0x01 | ||
289 | #define USB_SMI 0x02 | ||
290 | #define USB_ERROR 0x03 | ||
291 | #define USB_PM 0x04 | ||
292 | #define USB_DIAG 0x05 | ||
293 | |||
294 | /* | ||
295 | * USB SPEC. | ||
296 | */ | ||
297 | #define USB_OHCI 0x08 | ||
298 | #define USB_EHCI 0x09 | ||
299 | |||
300 | /****************** NATIVE ***************************/ | ||
301 | /* GPIO : I/O SPACE; REG : 32BITS */ | ||
302 | #define GPIOL_OUT_VAL 0x00 | ||
303 | #define GPIOL_OUT_EN 0x04 | ||
304 | |||
305 | #endif /* _CS5536_H */ | ||
diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h new file mode 100644 index 000000000000..4b493d6772c2 --- /dev/null +++ b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_mfgpt.h | |||
@@ -0,0 +1,35 @@ | |||
1 | /* | ||
2 | * cs5536 mfgpt header file | ||
3 | */ | ||
4 | |||
5 | #ifndef _CS5536_MFGPT_H | ||
6 | #define _CS5536_MFGPT_H | ||
7 | |||
8 | #include <cs5536/cs5536.h> | ||
9 | #include <cs5536/cs5536_pci.h> | ||
10 | |||
11 | #ifdef CONFIG_CS5536_MFGPT | ||
12 | extern void setup_mfgpt0_timer(void); | ||
13 | extern void disable_mfgpt0_counter(void); | ||
14 | extern void enable_mfgpt0_counter(void); | ||
15 | #else | ||
16 | static inline void __maybe_unused setup_mfgpt0_timer(void) | ||
17 | { | ||
18 | } | ||
19 | static inline void __maybe_unused disable_mfgpt0_counter(void) | ||
20 | { | ||
21 | } | ||
22 | static inline void __maybe_unused enable_mfgpt0_counter(void) | ||
23 | { | ||
24 | } | ||
25 | #endif | ||
26 | |||
27 | #define MFGPT_TICK_RATE 14318000 | ||
28 | #define COMPARE ((MFGPT_TICK_RATE + HZ/2) / HZ) | ||
29 | |||
30 | #define MFGPT_BASE mfgpt_base | ||
31 | #define MFGPT0_CMP2 (MFGPT_BASE + 2) | ||
32 | #define MFGPT0_CNT (MFGPT_BASE + 4) | ||
33 | #define MFGPT0_SETUP (MFGPT_BASE + 6) | ||
34 | |||
35 | #endif /*!_CS5536_MFGPT_H */ | ||
diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h new file mode 100644 index 000000000000..0dca9c89ee7c --- /dev/null +++ b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_pci.h | |||
@@ -0,0 +1,153 @@ | |||
1 | /* | ||
2 | * the definition file of cs5536 Virtual Support Module(VSM). | ||
3 | * pci configuration space can be accessed through the VSM, so | ||
4 | * there is no need of the MSR read/write now, except the spec. | ||
5 | * MSR registers which are not implemented yet. | ||
6 | * | ||
7 | * Copyright (C) 2007 Lemote Inc. | ||
8 | * Author : jlliu, liujl@lemote.com | ||
9 | */ | ||
10 | |||
11 | #ifndef _CS5536_PCI_H | ||
12 | #define _CS5536_PCI_H | ||
13 | |||
14 | #include <linux/types.h> | ||
15 | #include <linux/pci_regs.h> | ||
16 | |||
17 | extern void cs5536_pci_conf_write4(int function, int reg, u32 value); | ||
18 | extern u32 cs5536_pci_conf_read4(int function, int reg); | ||
19 | |||
20 | #define CS5536_ACC_INTR 9 | ||
21 | #define CS5536_IDE_INTR 14 | ||
22 | #define CS5536_USB_INTR 11 | ||
23 | #define CS5536_MFGPT_INTR 5 | ||
24 | #define CS5536_UART1_INTR 4 | ||
25 | #define CS5536_UART2_INTR 3 | ||
26 | |||
27 | /************** PCI BUS DEVICE FUNCTION ***************/ | ||
28 | |||
29 | /* | ||
30 | * PCI bus device function | ||
31 | */ | ||
32 | #define PCI_BUS_CS5536 0 | ||
33 | #define PCI_IDSEL_CS5536 14 | ||
34 | |||
35 | /********** STANDARD PCI-2.2 EXPANSION ****************/ | ||
36 | |||
37 | /* | ||
38 | * PCI configuration space | ||
39 | * we have to virtualize the PCI configure space head, so we should | ||
40 | * define the necessary IDs and some others. | ||
41 | */ | ||
42 | |||
43 | /* CONFIG of PCI VENDOR ID*/ | ||
44 | #define CFG_PCI_VENDOR_ID(mod_dev_id, sys_vendor_id) \ | ||
45 | (((mod_dev_id) << 16) | (sys_vendor_id)) | ||
46 | |||
47 | /* VENDOR ID */ | ||
48 | #define CS5536_VENDOR_ID 0x1022 | ||
49 | |||
50 | /* DEVICE ID */ | ||
51 | #define CS5536_ISA_DEVICE_ID 0x2090 | ||
52 | #define CS5536_IDE_DEVICE_ID 0x209a | ||
53 | #define CS5536_ACC_DEVICE_ID 0x2093 | ||
54 | #define CS5536_OHCI_DEVICE_ID 0x2094 | ||
55 | #define CS5536_EHCI_DEVICE_ID 0x2095 | ||
56 | |||
57 | /* CLASS CODE : CLASS SUB-CLASS INTERFACE */ | ||
58 | #define CS5536_ISA_CLASS_CODE 0x060100 | ||
59 | #define CS5536_IDE_CLASS_CODE 0x010180 | ||
60 | #define CS5536_ACC_CLASS_CODE 0x040100 | ||
61 | #define CS5536_OHCI_CLASS_CODE 0x0C0310 | ||
62 | #define CS5536_EHCI_CLASS_CODE 0x0C0320 | ||
63 | |||
64 | /* BHLC : BIST HEADER-TYPE LATENCY-TIMER CACHE-LINE-SIZE */ | ||
65 | |||
66 | #define CFG_PCI_CACHE_LINE_SIZE(header_type, latency_timer) \ | ||
67 | ((PCI_NONE_BIST << 24) | ((header_type) << 16) \ | ||
68 | | ((latency_timer) << 8) | PCI_NORMAL_CACHE_LINE_SIZE); | ||
69 | |||
70 | #define PCI_NONE_BIST 0x00 /* RO not implemented yet. */ | ||
71 | #define PCI_BRIDGE_HEADER_TYPE 0x80 /* RO */ | ||
72 | #define PCI_NORMAL_HEADER_TYPE 0x00 | ||
73 | #define PCI_NORMAL_LATENCY_TIMER 0x00 | ||
74 | #define PCI_NORMAL_CACHE_LINE_SIZE 0x08 /* RW */ | ||
75 | |||
76 | /* BAR */ | ||
77 | #define PCI_BAR0_REG 0x10 | ||
78 | #define PCI_BAR1_REG 0x14 | ||
79 | #define PCI_BAR2_REG 0x18 | ||
80 | #define PCI_BAR3_REG 0x1c | ||
81 | #define PCI_BAR4_REG 0x20 | ||
82 | #define PCI_BAR5_REG 0x24 | ||
83 | #define PCI_BAR_COUNT 6 | ||
84 | #define PCI_BAR_RANGE_MASK 0xFFFFFFFF | ||
85 | |||
86 | /* CARDBUS CIS POINTER */ | ||
87 | #define PCI_CARDBUS_CIS_POINTER 0x00000000 | ||
88 | |||
89 | /* SUBSYSTEM VENDOR ID */ | ||
90 | #define CS5536_SUB_VENDOR_ID CS5536_VENDOR_ID | ||
91 | |||
92 | /* SUBSYSTEM ID */ | ||
93 | #define CS5536_ISA_SUB_ID CS5536_ISA_DEVICE_ID | ||
94 | #define CS5536_IDE_SUB_ID CS5536_IDE_DEVICE_ID | ||
95 | #define CS5536_ACC_SUB_ID CS5536_ACC_DEVICE_ID | ||
96 | #define CS5536_OHCI_SUB_ID CS5536_OHCI_DEVICE_ID | ||
97 | #define CS5536_EHCI_SUB_ID CS5536_EHCI_DEVICE_ID | ||
98 | |||
99 | /* EXPANSION ROM BAR */ | ||
100 | #define PCI_EXPANSION_ROM_BAR 0x00000000 | ||
101 | |||
102 | /* CAPABILITIES POINTER */ | ||
103 | #define PCI_CAPLIST_POINTER 0x00000000 | ||
104 | #define PCI_CAPLIST_USB_POINTER 0x40 | ||
105 | /* INTERRUPT */ | ||
106 | |||
107 | #define CFG_PCI_INTERRUPT_LINE(pin, mod_intr) \ | ||
108 | ((PCI_MAX_LATENCY << 24) | (PCI_MIN_GRANT << 16) | \ | ||
109 | ((pin) << 8) | (mod_intr)) | ||
110 | |||
111 | #define PCI_MAX_LATENCY 0x40 | ||
112 | #define PCI_MIN_GRANT 0x00 | ||
113 | #define PCI_DEFAULT_PIN 0x01 | ||
114 | |||
115 | /*********** EXPANSION PCI REG ************************/ | ||
116 | |||
117 | /* | ||
118 | * ISA EXPANSION | ||
119 | */ | ||
120 | #define PCI_UART1_INT_REG 0x50 | ||
121 | #define PCI_UART2_INT_REG 0x54 | ||
122 | #define PCI_ISA_FIXUP_REG 0x58 | ||
123 | |||
124 | /* | ||
125 | * IDE EXPANSION | ||
126 | */ | ||
127 | #define PCI_IDE_CFG_REG 0x40 | ||
128 | #define CS5536_IDE_FLASH_SIGNATURE 0xDEADBEEF | ||
129 | #define PCI_IDE_DTC_REG 0x48 | ||
130 | #define PCI_IDE_CAST_REG 0x4C | ||
131 | #define PCI_IDE_ETC_REG 0x50 | ||
132 | #define PCI_IDE_PM_REG 0x54 | ||
133 | #define PCI_IDE_INT_REG 0x60 | ||
134 | |||
135 | /* | ||
136 | * ACC EXPANSION | ||
137 | */ | ||
138 | #define PCI_ACC_INT_REG 0x50 | ||
139 | |||
140 | /* | ||
141 | * OHCI EXPANSION : INTTERUPT IS IMPLEMENTED BY THE OHCI | ||
142 | */ | ||
143 | #define PCI_OHCI_PM_REG 0x40 | ||
144 | #define PCI_OHCI_INT_REG 0x50 | ||
145 | |||
146 | /* | ||
147 | * EHCI EXPANSION | ||
148 | */ | ||
149 | #define PCI_EHCI_LEGSMIEN_REG 0x50 | ||
150 | #define PCI_EHCI_LEGSMISTS_REG 0x54 | ||
151 | #define PCI_EHCI_FLADJ_REG 0x60 | ||
152 | |||
153 | #endif /* _CS5536_PCI_H_ */ | ||
diff --git a/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h new file mode 100644 index 000000000000..6305bea7e18e --- /dev/null +++ b/arch/mips/include/asm/mach-loongson/cs5536/cs5536_vsm.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * the read/write interfaces for Virtual Support Module(VSM) | ||
3 | * | ||
4 | * Copyright (C) 2009 Lemote, Inc. | ||
5 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
6 | */ | ||
7 | |||
8 | #ifndef _CS5536_VSM_H | ||
9 | #define _CS5536_VSM_H | ||
10 | |||
11 | #include <linux/types.h> | ||
12 | |||
13 | typedef void (*cs5536_pci_vsm_write)(int reg, u32 value); | ||
14 | typedef u32 (*cs5536_pci_vsm_read)(int reg); | ||
15 | |||
16 | #define DECLARE_CS5536_MODULE(name) \ | ||
17 | extern void pci_##name##_write_reg(int reg, u32 value); \ | ||
18 | extern u32 pci_##name##_read_reg(int reg); | ||
19 | |||
20 | /* ide module */ | ||
21 | DECLARE_CS5536_MODULE(ide) | ||
22 | /* acc module */ | ||
23 | DECLARE_CS5536_MODULE(acc) | ||
24 | /* ohci module */ | ||
25 | DECLARE_CS5536_MODULE(ohci) | ||
26 | /* isa module */ | ||
27 | DECLARE_CS5536_MODULE(isa) | ||
28 | /* ehci module */ | ||
29 | DECLARE_CS5536_MODULE(ehci) | ||
30 | |||
31 | #endif /* _CS5536_VSM_H */ | ||
diff --git a/arch/mips/include/asm/mach-loongson/dma-coherence.h b/arch/mips/include/asm/mach-loongson/dma-coherence.h index 71a6851ba833..981c75f91a7d 100644 --- a/arch/mips/include/asm/mach-loongson/dma-coherence.h +++ b/arch/mips/include/asm/mach-loongson/dma-coherence.h | |||
@@ -28,7 +28,11 @@ static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, | |||
28 | static inline unsigned long plat_dma_addr_to_phys(struct device *dev, | 28 | static inline unsigned long plat_dma_addr_to_phys(struct device *dev, |
29 | dma_addr_t dma_addr) | 29 | dma_addr_t dma_addr) |
30 | { | 30 | { |
31 | #if defined(CONFIG_CPU_LOONGSON2F) && defined(CONFIG_64BIT) | ||
32 | return (dma_addr > 0x8fffffff) ? dma_addr : (dma_addr & 0x0fffffff); | ||
33 | #else | ||
31 | return dma_addr & 0x7fffffff; | 34 | return dma_addr & 0x7fffffff; |
35 | #endif | ||
32 | } | 36 | } |
33 | 37 | ||
34 | static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, | 38 | static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, |
diff --git a/arch/mips/include/asm/mach-loongson/loongson.h b/arch/mips/include/asm/mach-loongson/loongson.h index da70bcf2304e..ee8bc8376972 100644 --- a/arch/mips/include/asm/mach-loongson/loongson.h +++ b/arch/mips/include/asm/mach-loongson/loongson.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology | 2 | * Copyright (C) 2009 Lemote, Inc. |
3 | * Author: Wu Zhangjin <wuzj@lemote.com> | 3 | * Author: Wu Zhangjin <wuzj@lemote.com> |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
@@ -15,9 +15,6 @@ | |||
15 | #include <linux/io.h> | 15 | #include <linux/io.h> |
16 | #include <linux/init.h> | 16 | #include <linux/init.h> |
17 | 17 | ||
18 | /* there is an internal bonito64-compatiable northbridge in loongson2e/2f */ | ||
19 | #include <asm/mips-boards/bonito64.h> | ||
20 | |||
21 | /* loongson internal northbridge initialization */ | 18 | /* loongson internal northbridge initialization */ |
22 | extern void bonito_irq_init(void); | 19 | extern void bonito_irq_init(void); |
23 | 20 | ||
@@ -32,7 +29,19 @@ extern unsigned long memsize, highmemsize; | |||
32 | /* loongson-specific command line, env and memory initialization */ | 29 | /* loongson-specific command line, env and memory initialization */ |
33 | extern void __init prom_init_memory(void); | 30 | extern void __init prom_init_memory(void); |
34 | extern void __init prom_init_cmdline(void); | 31 | extern void __init prom_init_cmdline(void); |
32 | extern void __init prom_init_machtype(void); | ||
35 | extern void __init prom_init_env(void); | 33 | extern void __init prom_init_env(void); |
34 | #ifdef CONFIG_LOONGSON_UART_BASE | ||
35 | extern unsigned long _loongson_uart_base, loongson_uart_base; | ||
36 | extern void prom_init_loongson_uart_base(void); | ||
37 | #endif | ||
38 | |||
39 | static inline void prom_init_uart_base(void) | ||
40 | { | ||
41 | #ifdef CONFIG_LOONGSON_UART_BASE | ||
42 | prom_init_loongson_uart_base(); | ||
43 | #endif | ||
44 | } | ||
36 | 45 | ||
37 | /* irq operation functions */ | 46 | /* irq operation functions */ |
38 | extern void bonito_irqdispatch(void); | 47 | extern void bonito_irqdispatch(void); |
@@ -40,25 +49,276 @@ extern void __init bonito_irq_init(void); | |||
40 | extern void __init set_irq_trigger_mode(void); | 49 | extern void __init set_irq_trigger_mode(void); |
41 | extern void __init mach_init_irq(void); | 50 | extern void __init mach_init_irq(void); |
42 | extern void mach_irq_dispatch(unsigned int pending); | 51 | extern void mach_irq_dispatch(unsigned int pending); |
52 | extern int mach_i8259_irq(void); | ||
53 | |||
54 | /* We need this in some places... */ | ||
55 | #define delay() ({ \ | ||
56 | int x; \ | ||
57 | for (x = 0; x < 100000; x++) \ | ||
58 | __asm__ __volatile__(""); \ | ||
59 | }) | ||
60 | |||
61 | #define LOONGSON_REG(x) \ | ||
62 | (*(volatile u32 *)((char *)CKSEG1ADDR(LOONGSON_REG_BASE) + (x))) | ||
63 | |||
64 | #define LOONGSON_IRQ_BASE 32 | ||
65 | #define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */ | ||
66 | |||
67 | #define LOONGSON_FLASH_BASE 0x1c000000 | ||
68 | #define LOONGSON_FLASH_SIZE 0x02000000 /* 32M */ | ||
69 | #define LOONGSON_FLASH_TOP (LOONGSON_FLASH_BASE+LOONGSON_FLASH_SIZE-1) | ||
70 | |||
71 | #define LOONGSON_LIO0_BASE 0x1e000000 | ||
72 | #define LOONGSON_LIO0_SIZE 0x01C00000 /* 28M */ | ||
73 | #define LOONGSON_LIO0_TOP (LOONGSON_LIO0_BASE+LOONGSON_LIO0_SIZE-1) | ||
74 | |||
75 | #define LOONGSON_BOOT_BASE 0x1fc00000 | ||
76 | #define LOONGSON_BOOT_SIZE 0x00100000 /* 1M */ | ||
77 | #define LOONGSON_BOOT_TOP (LOONGSON_BOOT_BASE+LOONGSON_BOOT_SIZE-1) | ||
78 | #define LOONGSON_REG_BASE 0x1fe00000 | ||
79 | #define LOONGSON_REG_SIZE 0x00100000 /* 256Bytes + 256Bytes + ??? */ | ||
80 | #define LOONGSON_REG_TOP (LOONGSON_REG_BASE+LOONGSON_REG_SIZE-1) | ||
81 | |||
82 | #define LOONGSON_LIO1_BASE 0x1ff00000 | ||
83 | #define LOONGSON_LIO1_SIZE 0x00100000 /* 1M */ | ||
84 | #define LOONGSON_LIO1_TOP (LOONGSON_LIO1_BASE+LOONGSON_LIO1_SIZE-1) | ||
85 | |||
86 | #define LOONGSON_PCILO0_BASE 0x10000000 | ||
87 | #define LOONGSON_PCILO1_BASE 0x14000000 | ||
88 | #define LOONGSON_PCILO2_BASE 0x18000000 | ||
89 | #define LOONGSON_PCILO_BASE LOONGSON_PCILO0_BASE | ||
90 | #define LOONGSON_PCILO_SIZE 0x0c000000 /* 64M * 3 */ | ||
91 | #define LOONGSON_PCILO_TOP (LOONGSON_PCILO0_BASE+LOONGSON_PCILO_SIZE-1) | ||
92 | |||
93 | #define LOONGSON_PCICFG_BASE 0x1fe80000 | ||
94 | #define LOONGSON_PCICFG_SIZE 0x00000800 /* 2K */ | ||
95 | #define LOONGSON_PCICFG_TOP (LOONGSON_PCICFG_BASE+LOONGSON_PCICFG_SIZE-1) | ||
96 | #define LOONGSON_PCIIO_BASE 0x1fd00000 | ||
97 | #define LOONGSON_PCIIO_SIZE 0x00100000 /* 1M */ | ||
98 | #define LOONGSON_PCIIO_TOP (LOONGSON_PCIIO_BASE+LOONGSON_PCIIO_SIZE-1) | ||
99 | |||
100 | /* Loongson Register Bases */ | ||
101 | |||
102 | #define LOONGSON_PCICONFIGBASE 0x00 | ||
103 | #define LOONGSON_REGBASE 0x100 | ||
43 | 104 | ||
44 | /* PCI Configuration Registers */ | 105 | /* PCI Configuration Registers */ |
45 | #define LOONGSON_PCI_ISR4C BONITO_PCI_REG(0x4c) | 106 | |
107 | #define LOONGSON_PCI_REG(x) LOONGSON_REG(LOONGSON_PCICONFIGBASE + (x)) | ||
108 | #define LOONGSON_PCIDID LOONGSON_PCI_REG(0x00) | ||
109 | #define LOONGSON_PCICMD LOONGSON_PCI_REG(0x04) | ||
110 | #define LOONGSON_PCICLASS LOONGSON_PCI_REG(0x08) | ||
111 | #define LOONGSON_PCILTIMER LOONGSON_PCI_REG(0x0c) | ||
112 | #define LOONGSON_PCIBASE0 LOONGSON_PCI_REG(0x10) | ||
113 | #define LOONGSON_PCIBASE1 LOONGSON_PCI_REG(0x14) | ||
114 | #define LOONGSON_PCIBASE2 LOONGSON_PCI_REG(0x18) | ||
115 | #define LOONGSON_PCIBASE3 LOONGSON_PCI_REG(0x1c) | ||
116 | #define LOONGSON_PCIBASE4 LOONGSON_PCI_REG(0x20) | ||
117 | #define LOONGSON_PCIEXPRBASE LOONGSON_PCI_REG(0x30) | ||
118 | #define LOONGSON_PCIINT LOONGSON_PCI_REG(0x3c) | ||
119 | |||
120 | #define LOONGSON_PCI_ISR4C LOONGSON_PCI_REG(0x4c) | ||
121 | |||
122 | #define LOONGSON_PCICMD_PERR_CLR 0x80000000 | ||
123 | #define LOONGSON_PCICMD_SERR_CLR 0x40000000 | ||
124 | #define LOONGSON_PCICMD_MABORT_CLR 0x20000000 | ||
125 | #define LOONGSON_PCICMD_MTABORT_CLR 0x10000000 | ||
126 | #define LOONGSON_PCICMD_TABORT_CLR 0x08000000 | ||
127 | #define LOONGSON_PCICMD_MPERR_CLR 0x01000000 | ||
128 | #define LOONGSON_PCICMD_PERRRESPEN 0x00000040 | ||
129 | #define LOONGSON_PCICMD_ASTEPEN 0x00000080 | ||
130 | #define LOONGSON_PCICMD_SERREN 0x00000100 | ||
131 | #define LOONGSON_PCILTIMER_BUSLATENCY 0x0000ff00 | ||
132 | #define LOONGSON_PCILTIMER_BUSLATENCY_SHIFT 8 | ||
133 | |||
134 | /* Loongson h/w Configuration */ | ||
135 | |||
136 | #define LOONGSON_GENCFG_OFFSET 0x4 | ||
137 | #define LOONGSON_GENCFG LOONGSON_REG(LOONGSON_REGBASE + LOONGSON_GENCFG_OFFSET) | ||
138 | |||
139 | #define LOONGSON_GENCFG_DEBUGMODE 0x00000001 | ||
140 | #define LOONGSON_GENCFG_SNOOPEN 0x00000002 | ||
141 | #define LOONGSON_GENCFG_CPUSELFRESET 0x00000004 | ||
142 | |||
143 | #define LOONGSON_GENCFG_FORCE_IRQA 0x00000008 | ||
144 | #define LOONGSON_GENCFG_IRQA_ISOUT 0x00000010 | ||
145 | #define LOONGSON_GENCFG_IRQA_FROM_INT1 0x00000020 | ||
146 | #define LOONGSON_GENCFG_BYTESWAP 0x00000040 | ||
147 | |||
148 | #define LOONGSON_GENCFG_UNCACHED 0x00000080 | ||
149 | #define LOONGSON_GENCFG_PREFETCHEN 0x00000100 | ||
150 | #define LOONGSON_GENCFG_WBEHINDEN 0x00000200 | ||
151 | #define LOONGSON_GENCFG_CACHEALG 0x00000c00 | ||
152 | #define LOONGSON_GENCFG_CACHEALG_SHIFT 10 | ||
153 | #define LOONGSON_GENCFG_PCIQUEUE 0x00001000 | ||
154 | #define LOONGSON_GENCFG_CACHESTOP 0x00002000 | ||
155 | #define LOONGSON_GENCFG_MSTRBYTESWAP 0x00004000 | ||
156 | #define LOONGSON_GENCFG_BUSERREN 0x00008000 | ||
157 | #define LOONGSON_GENCFG_NORETRYTIMEOUT 0x00010000 | ||
158 | #define LOONGSON_GENCFG_SHORTCOPYTIMEOUT 0x00020000 | ||
159 | |||
160 | /* PCI address map control */ | ||
161 | |||
162 | #define LOONGSON_PCIMAP LOONGSON_REG(LOONGSON_REGBASE + 0x10) | ||
163 | #define LOONGSON_PCIMEMBASECFG LOONGSON_REG(LOONGSON_REGBASE + 0x14) | ||
164 | #define LOONGSON_PCIMAP_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x18) | ||
165 | |||
166 | /* GPIO Regs - r/w */ | ||
167 | |||
168 | #define LOONGSON_GPIODATA LOONGSON_REG(LOONGSON_REGBASE + 0x1c) | ||
169 | #define LOONGSON_GPIOIE LOONGSON_REG(LOONGSON_REGBASE + 0x20) | ||
170 | |||
171 | /* ICU Configuration Regs - r/w */ | ||
172 | |||
173 | #define LOONGSON_INTEDGE LOONGSON_REG(LOONGSON_REGBASE + 0x24) | ||
174 | #define LOONGSON_INTSTEER LOONGSON_REG(LOONGSON_REGBASE + 0x28) | ||
175 | #define LOONGSON_INTPOL LOONGSON_REG(LOONGSON_REGBASE + 0x2c) | ||
176 | |||
177 | /* ICU Enable Regs - IntEn & IntISR are r/o. */ | ||
178 | |||
179 | #define LOONGSON_INTENSET LOONGSON_REG(LOONGSON_REGBASE + 0x30) | ||
180 | #define LOONGSON_INTENCLR LOONGSON_REG(LOONGSON_REGBASE + 0x34) | ||
181 | #define LOONGSON_INTEN LOONGSON_REG(LOONGSON_REGBASE + 0x38) | ||
182 | #define LOONGSON_INTISR LOONGSON_REG(LOONGSON_REGBASE + 0x3c) | ||
183 | |||
184 | /* ICU */ | ||
185 | #define LOONGSON_ICU_MBOXES 0x0000000f | ||
186 | #define LOONGSON_ICU_MBOXES_SHIFT 0 | ||
187 | #define LOONGSON_ICU_DMARDY 0x00000010 | ||
188 | #define LOONGSON_ICU_DMAEMPTY 0x00000020 | ||
189 | #define LOONGSON_ICU_COPYRDY 0x00000040 | ||
190 | #define LOONGSON_ICU_COPYEMPTY 0x00000080 | ||
191 | #define LOONGSON_ICU_COPYERR 0x00000100 | ||
192 | #define LOONGSON_ICU_PCIIRQ 0x00000200 | ||
193 | #define LOONGSON_ICU_MASTERERR 0x00000400 | ||
194 | #define LOONGSON_ICU_SYSTEMERR 0x00000800 | ||
195 | #define LOONGSON_ICU_DRAMPERR 0x00001000 | ||
196 | #define LOONGSON_ICU_RETRYERR 0x00002000 | ||
197 | #define LOONGSON_ICU_GPIOS 0x01ff0000 | ||
198 | #define LOONGSON_ICU_GPIOS_SHIFT 16 | ||
199 | #define LOONGSON_ICU_GPINS 0x7e000000 | ||
200 | #define LOONGSON_ICU_GPINS_SHIFT 25 | ||
201 | #define LOONGSON_ICU_MBOX(N) (1<<(LOONGSON_ICU_MBOXES_SHIFT+(N))) | ||
202 | #define LOONGSON_ICU_GPIO(N) (1<<(LOONGSON_ICU_GPIOS_SHIFT+(N))) | ||
203 | #define LOONGSON_ICU_GPIN(N) (1<<(LOONGSON_ICU_GPINS_SHIFT+(N))) | ||
204 | |||
205 | /* PCI prefetch window base & mask */ | ||
206 | |||
207 | #define LOONGSON_MEM_WIN_BASE_L LOONGSON_REG(LOONGSON_REGBASE + 0x40) | ||
208 | #define LOONGSON_MEM_WIN_BASE_H LOONGSON_REG(LOONGSON_REGBASE + 0x44) | ||
209 | #define LOONGSON_MEM_WIN_MASK_L LOONGSON_REG(LOONGSON_REGBASE + 0x48) | ||
210 | #define LOONGSON_MEM_WIN_MASK_H LOONGSON_REG(LOONGSON_REGBASE + 0x4c) | ||
46 | 211 | ||
47 | /* PCI_Hit*_Sel_* */ | 212 | /* PCI_Hit*_Sel_* */ |
48 | 213 | ||
49 | #define LOONGSON_PCI_HIT0_SEL_L BONITO(BONITO_REGBASE + 0x50) | 214 | #define LOONGSON_PCI_HIT0_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x50) |
50 | #define LOONGSON_PCI_HIT0_SEL_H BONITO(BONITO_REGBASE + 0x54) | 215 | #define LOONGSON_PCI_HIT0_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x54) |
51 | #define LOONGSON_PCI_HIT1_SEL_L BONITO(BONITO_REGBASE + 0x58) | 216 | #define LOONGSON_PCI_HIT1_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x58) |
52 | #define LOONGSON_PCI_HIT1_SEL_H BONITO(BONITO_REGBASE + 0x5c) | 217 | #define LOONGSON_PCI_HIT1_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x5c) |
53 | #define LOONGSON_PCI_HIT2_SEL_L BONITO(BONITO_REGBASE + 0x60) | 218 | #define LOONGSON_PCI_HIT2_SEL_L LOONGSON_REG(LOONGSON_REGBASE + 0x60) |
54 | #define LOONGSON_PCI_HIT2_SEL_H BONITO(BONITO_REGBASE + 0x64) | 219 | #define LOONGSON_PCI_HIT2_SEL_H LOONGSON_REG(LOONGSON_REGBASE + 0x64) |
55 | 220 | ||
56 | /* PXArb Config & Status */ | 221 | /* PXArb Config & Status */ |
57 | 222 | ||
58 | #define LOONGSON_PXARB_CFG BONITO(BONITO_REGBASE + 0x68) | 223 | #define LOONGSON_PXARB_CFG LOONGSON_REG(LOONGSON_REGBASE + 0x68) |
59 | #define LOONGSON_PXARB_STATUS BONITO(BONITO_REGBASE + 0x6c) | 224 | #define LOONGSON_PXARB_STATUS LOONGSON_REG(LOONGSON_REGBASE + 0x6c) |
225 | |||
226 | /* pcimap */ | ||
227 | |||
228 | #define LOONGSON_PCIMAP_PCIMAP_LO0 0x0000003f | ||
229 | #define LOONGSON_PCIMAP_PCIMAP_LO0_SHIFT 0 | ||
230 | #define LOONGSON_PCIMAP_PCIMAP_LO1 0x00000fc0 | ||
231 | #define LOONGSON_PCIMAP_PCIMAP_LO1_SHIFT 6 | ||
232 | #define LOONGSON_PCIMAP_PCIMAP_LO2 0x0003f000 | ||
233 | #define LOONGSON_PCIMAP_PCIMAP_LO2_SHIFT 12 | ||
234 | #define LOONGSON_PCIMAP_PCIMAP_2 0x00040000 | ||
235 | #define LOONGSON_PCIMAP_WIN(WIN, ADDR) \ | ||
236 | ((((ADDR)>>26) & LOONGSON_PCIMAP_PCIMAP_LO0) << ((WIN)*6)) | ||
237 | |||
238 | #ifdef CONFIG_CPU_SUPPORTS_CPUFREQ | ||
239 | #include <linux/cpufreq.h> | ||
240 | extern void loongson2_cpu_wait(void); | ||
241 | extern struct cpufreq_frequency_table loongson2_clockmod_table[]; | ||
242 | |||
243 | /* Chip Config */ | ||
244 | #define LOONGSON_CHIPCFG0 LOONGSON_REG(LOONGSON_REGBASE + 0x80) | ||
245 | #endif | ||
246 | |||
247 | /* | ||
248 | * address windows configuration module | ||
249 | * | ||
250 | * loongson2e do not have this module | ||
251 | */ | ||
252 | #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG | ||
253 | |||
254 | /* address window config module base address */ | ||
255 | #define LOONGSON_ADDRWINCFG_BASE 0x3ff00000ul | ||
256 | #define LOONGSON_ADDRWINCFG_SIZE 0x180 | ||
257 | |||
258 | extern unsigned long _loongson_addrwincfg_base; | ||
259 | #define LOONGSON_ADDRWINCFG(offset) \ | ||
260 | (*(volatile u64 *)(_loongson_addrwincfg_base + (offset))) | ||
261 | |||
262 | #define CPU_WIN0_BASE LOONGSON_ADDRWINCFG(0x00) | ||
263 | #define CPU_WIN1_BASE LOONGSON_ADDRWINCFG(0x08) | ||
264 | #define CPU_WIN2_BASE LOONGSON_ADDRWINCFG(0x10) | ||
265 | #define CPU_WIN3_BASE LOONGSON_ADDRWINCFG(0x18) | ||
266 | |||
267 | #define CPU_WIN0_MASK LOONGSON_ADDRWINCFG(0x20) | ||
268 | #define CPU_WIN1_MASK LOONGSON_ADDRWINCFG(0x28) | ||
269 | #define CPU_WIN2_MASK LOONGSON_ADDRWINCFG(0x30) | ||
270 | #define CPU_WIN3_MASK LOONGSON_ADDRWINCFG(0x38) | ||
271 | |||
272 | #define CPU_WIN0_MMAP LOONGSON_ADDRWINCFG(0x40) | ||
273 | #define CPU_WIN1_MMAP LOONGSON_ADDRWINCFG(0x48) | ||
274 | #define CPU_WIN2_MMAP LOONGSON_ADDRWINCFG(0x50) | ||
275 | #define CPU_WIN3_MMAP LOONGSON_ADDRWINCFG(0x58) | ||
276 | |||
277 | #define PCIDMA_WIN0_BASE LOONGSON_ADDRWINCFG(0x60) | ||
278 | #define PCIDMA_WIN1_BASE LOONGSON_ADDRWINCFG(0x68) | ||
279 | #define PCIDMA_WIN2_BASE LOONGSON_ADDRWINCFG(0x70) | ||
280 | #define PCIDMA_WIN3_BASE LOONGSON_ADDRWINCFG(0x78) | ||
281 | |||
282 | #define PCIDMA_WIN0_MASK LOONGSON_ADDRWINCFG(0x80) | ||
283 | #define PCIDMA_WIN1_MASK LOONGSON_ADDRWINCFG(0x88) | ||
284 | #define PCIDMA_WIN2_MASK LOONGSON_ADDRWINCFG(0x90) | ||
285 | #define PCIDMA_WIN3_MASK LOONGSON_ADDRWINCFG(0x98) | ||
286 | |||
287 | #define PCIDMA_WIN0_MMAP LOONGSON_ADDRWINCFG(0xa0) | ||
288 | #define PCIDMA_WIN1_MMAP LOONGSON_ADDRWINCFG(0xa8) | ||
289 | #define PCIDMA_WIN2_MMAP LOONGSON_ADDRWINCFG(0xb0) | ||
290 | #define PCIDMA_WIN3_MMAP LOONGSON_ADDRWINCFG(0xb8) | ||
291 | |||
292 | #define ADDRWIN_WIN0 0 | ||
293 | #define ADDRWIN_WIN1 1 | ||
294 | #define ADDRWIN_WIN2 2 | ||
295 | #define ADDRWIN_WIN3 3 | ||
296 | |||
297 | #define ADDRWIN_MAP_DST_DDR 0 | ||
298 | #define ADDRWIN_MAP_DST_PCI 1 | ||
299 | #define ADDRWIN_MAP_DST_LIO 1 | ||
300 | |||
301 | /* | ||
302 | * s: CPU, PCIDMA | ||
303 | * d: DDR, PCI, LIO | ||
304 | * win: 0, 1, 2, 3 | ||
305 | * src: map source | ||
306 | * dst: map destination | ||
307 | * size: ~mask + 1 | ||
308 | */ | ||
309 | #define LOONGSON_ADDRWIN_CFG(s, d, w, src, dst, size) do {\ | ||
310 | s##_WIN##w##_BASE = (src); \ | ||
311 | s##_WIN##w##_MMAP = (src) | ADDRWIN_MAP_DST_##d; \ | ||
312 | s##_WIN##w##_MASK = ~(size-1); \ | ||
313 | } while (0) | ||
314 | |||
315 | #define LOONGSON_ADDRWIN_CPUTOPCI(win, src, dst, size) \ | ||
316 | LOONGSON_ADDRWIN_CFG(CPU, PCI, win, src, dst, size) | ||
317 | #define LOONGSON_ADDRWIN_CPUTODDR(win, src, dst, size) \ | ||
318 | LOONGSON_ADDRWIN_CFG(CPU, DDR, win, src, dst, size) | ||
319 | #define LOONGSON_ADDRWIN_PCITODDR(win, src, dst, size) \ | ||
320 | LOONGSON_ADDRWIN_CFG(PCIDMA, DDR, win, src, dst, size) | ||
60 | 321 | ||
61 | /* loongson2-specific perf counter IRQ */ | 322 | #endif /* ! CONFIG_CPU_SUPPORTS_ADDRWINCFG */ |
62 | #define LOONGSON2_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) | ||
63 | 323 | ||
64 | #endif /* __ASM_MACH_LOONGSON_LOONGSON_H */ | 324 | #endif /* __ASM_MACH_LOONGSON_LOONGSON_H */ |
diff --git a/arch/mips/include/asm/mach-loongson/machine.h b/arch/mips/include/asm/mach-loongson/machine.h index 206ea2067916..acf8359cb135 100644 --- a/arch/mips/include/asm/mach-loongson/machine.h +++ b/arch/mips/include/asm/mach-loongson/machine.h | |||
@@ -13,10 +13,15 @@ | |||
13 | 13 | ||
14 | #ifdef CONFIG_LEMOTE_FULOONG2E | 14 | #ifdef CONFIG_LEMOTE_FULOONG2E |
15 | 15 | ||
16 | #define LOONGSON_UART_BASE (BONITO_PCIIO_BASE + 0x3f8) | ||
17 | |||
18 | #define LOONGSON_MACHTYPE MACH_LEMOTE_FL2E | 16 | #define LOONGSON_MACHTYPE MACH_LEMOTE_FL2E |
19 | 17 | ||
20 | #endif | 18 | #endif |
21 | 19 | ||
20 | /* use fuloong2f as the default machine of LEMOTE_MACH2F */ | ||
21 | #ifdef CONFIG_LEMOTE_MACH2F | ||
22 | |||
23 | #define LOONGSON_MACHTYPE MACH_LEMOTE_FL2F | ||
24 | |||
25 | #endif | ||
26 | |||
22 | #endif /* __ASM_MACH_LOONGSON_MACHINE_H */ | 27 | #endif /* __ASM_MACH_LOONGSON_MACHINE_H */ |
diff --git a/arch/mips/include/asm/mach-loongson/mem.h b/arch/mips/include/asm/mach-loongson/mem.h index bd7b3cba7e35..e9960f341b96 100644 --- a/arch/mips/include/asm/mach-loongson/mem.h +++ b/arch/mips/include/asm/mach-loongson/mem.h | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2009 Lemote, Inc. & Institute of Computing Technology | 2 | * Copyright (C) 2009 Lemote, Inc. |
3 | * Author: Wu Zhangjin <wuzj@lemote.com> | 3 | * Author: Wu Zhangjin <wuzj@lemote.com> |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
@@ -12,19 +12,30 @@ | |||
12 | #define __ASM_MACH_LOONGSON_MEM_H | 12 | #define __ASM_MACH_LOONGSON_MEM_H |
13 | 13 | ||
14 | /* | 14 | /* |
15 | * On Lemote Loongson 2e | 15 | * high memory space |
16 | * | 16 | * |
17 | * the high memory space starts from 512M. | 17 | * in loongson2e, starts from 512M |
18 | * the peripheral registers reside between 0x1000:0000 and 0x2000:0000. | 18 | * in loongson2f, starts from 2G 256M |
19 | */ | 19 | */ |
20 | #ifdef CONFIG_CPU_LOONGSON2E | ||
21 | #define LOONGSON_HIGHMEM_START 0x20000000 | ||
22 | #else | ||
23 | #define LOONGSON_HIGHMEM_START 0x90000000 | ||
24 | #endif | ||
20 | 25 | ||
21 | #ifdef CONFIG_LEMOTE_FULOONG2E | 26 | /* |
22 | 27 | * the peripheral registers(MMIO): | |
23 | #define LOONGSON_HIGHMEM_START 0x20000000 | 28 | * |
29 | * On the Lemote Loongson 2e system, reside between 0x1000:0000 and 0x2000:0000. | ||
30 | * On the Lemote Loongson 2f system, reside between 0x1000:0000 and 0x8000:0000. | ||
31 | */ | ||
24 | 32 | ||
25 | #define LOONGSON_MMIO_MEM_START 0x10000000 | 33 | #define LOONGSON_MMIO_MEM_START 0x10000000 |
26 | #define LOONGSON_MMIO_MEM_END 0x20000000 | ||
27 | 34 | ||
35 | #ifdef CONFIG_CPU_LOONGSON2E | ||
36 | #define LOONGSON_MMIO_MEM_END 0x20000000 | ||
37 | #else | ||
38 | #define LOONGSON_MMIO_MEM_END 0x80000000 | ||
28 | #endif | 39 | #endif |
29 | 40 | ||
30 | #endif /* __ASM_MACH_LOONGSON_MEM_H */ | 41 | #endif /* __ASM_MACH_LOONGSON_MEM_H */ |
diff --git a/arch/mips/include/asm/mach-loongson/pci.h b/arch/mips/include/asm/mach-loongson/pci.h index f1663ca81da0..a199a4f6de4e 100644 --- a/arch/mips/include/asm/mach-loongson/pci.h +++ b/arch/mips/include/asm/mach-loongson/pci.h | |||
@@ -1,5 +1,6 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> | 2 | * Copyright (c) 2008 Zhang Le <r0bertz@gentoo.org> |
3 | * Copyright (c) 2009 Wu Zhangjin <wuzj@lemote.com> | ||
3 | * | 4 | * |
4 | * This program is free software; you can redistribute it | 5 | * This program is free software; you can redistribute it |
5 | * and/or modify it under the terms of the GNU General | 6 | * and/or modify it under the terms of the GNU General |
@@ -22,16 +23,39 @@ | |||
22 | #ifndef __ASM_MACH_LOONGSON_PCI_H_ | 23 | #ifndef __ASM_MACH_LOONGSON_PCI_H_ |
23 | #define __ASM_MACH_LOONGSON_PCI_H_ | 24 | #define __ASM_MACH_LOONGSON_PCI_H_ |
24 | 25 | ||
25 | extern struct pci_ops bonito64_pci_ops; | 26 | extern struct pci_ops loongson_pci_ops; |
26 | 27 | ||
27 | #ifdef CONFIG_LEMOTE_FULOONG2E | 28 | /* this is an offset from mips_io_port_base */ |
29 | #define LOONGSON_PCI_IO_START 0x00004000UL | ||
30 | |||
31 | #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG | ||
32 | |||
33 | /* | ||
34 | * we use address window2 to map cpu address space to pci space | ||
35 | * window2: cpu [1G, 2G] -> pci [1G, 2G] | ||
36 | * why not use window 0 & 1? because they are used by cpu when booting. | ||
37 | * window0: cpu [0, 256M] -> ddr [0, 256M] | ||
38 | * window1: cpu [256M, 512M] -> pci [256M, 512M] | ||
39 | */ | ||
40 | |||
41 | /* the smallest LOONGSON_CPU_MEM_SRC can be 512M */ | ||
42 | #define LOONGSON_CPU_MEM_SRC 0x40000000ul /* 1G */ | ||
43 | #define LOONGSON_PCI_MEM_DST LOONGSON_CPU_MEM_SRC | ||
44 | |||
45 | #define LOONGSON_PCI_MEM_START LOONGSON_PCI_MEM_DST | ||
46 | #define LOONGSON_PCI_MEM_END (0x80000000ul-1) /* 2G */ | ||
47 | |||
48 | #define MMAP_CPUTOPCI_SIZE (LOONGSON_PCI_MEM_END - \ | ||
49 | LOONGSON_PCI_MEM_START + 1) | ||
50 | |||
51 | #else /* loongson2f/32bit & loongson2e */ | ||
28 | 52 | ||
29 | /* this pci memory space is mapped by pcimap in pci.c */ | 53 | /* this pci memory space is mapped by pcimap in pci.c */ |
30 | #define LOONGSON_PCI_MEM_START BONITO_PCILO1_BASE | 54 | #define LOONGSON_PCI_MEM_START LOONGSON_PCILO1_BASE |
31 | #define LOONGSON_PCI_MEM_END (BONITO_PCILO1_BASE + 0x04000000 * 2) | 55 | #define LOONGSON_PCI_MEM_END (LOONGSON_PCILO1_BASE + 0x04000000 * 2) |
32 | /* this is an offset from mips_io_port_base */ | 56 | /* this is an offset from mips_io_port_base */ |
33 | #define LOONGSON_PCI_IO_START 0x00004000UL | 57 | #define LOONGSON_PCI_IO_START 0x00004000UL |
34 | 58 | ||
35 | #endif | 59 | #endif /* !CONFIG_CPU_SUPPORTS_ADDRWINCFG */ |
36 | 60 | ||
37 | #endif /* !__ASM_MACH_LOONGSON_PCI_H_ */ | 61 | #endif /* !__ASM_MACH_LOONGSON_PCI_H_ */ |
diff --git a/arch/mips/include/asm/mach-powertv/asic.h b/arch/mips/include/asm/mach-powertv/asic.h new file mode 100644 index 000000000000..bcad43a93ebf --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/asic.h | |||
@@ -0,0 +1,107 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | |||
19 | #ifndef _ASM_MACH_POWERTV_ASIC_H | ||
20 | #define _ASM_MACH_POWERTV_ASIC_H | ||
21 | |||
22 | #include <linux/ioport.h> | ||
23 | #include <asm/mach-powertv/asic_regs.h> | ||
24 | |||
25 | #define DVR_CAPABLE (1<<0) | ||
26 | #define PCIE_CAPABLE (1<<1) | ||
27 | #define FFS_CAPABLE (1<<2) | ||
28 | #define DISPLAY_CAPABLE (1<<3) | ||
29 | |||
30 | /* Platform Family types | ||
31 | * For compitability, the new value must be added in the end */ | ||
32 | enum family_type { | ||
33 | FAMILY_8500, | ||
34 | FAMILY_8500RNG, | ||
35 | FAMILY_4500, | ||
36 | FAMILY_1500, | ||
37 | FAMILY_8600, | ||
38 | FAMILY_4600, | ||
39 | FAMILY_4600VZA, | ||
40 | FAMILY_8600VZB, | ||
41 | FAMILY_1500VZE, | ||
42 | FAMILY_1500VZF, | ||
43 | FAMILIES | ||
44 | }; | ||
45 | |||
46 | /* Register maps for each ASIC */ | ||
47 | extern const struct register_map calliope_register_map; | ||
48 | extern const struct register_map cronus_register_map; | ||
49 | extern const struct register_map zeus_register_map; | ||
50 | |||
51 | extern struct resource dvr_cronus_resources[]; | ||
52 | extern struct resource dvr_zeus_resources[]; | ||
53 | extern struct resource non_dvr_calliope_resources[]; | ||
54 | extern struct resource non_dvr_cronus_resources[]; | ||
55 | extern struct resource non_dvr_cronuslite_resources[]; | ||
56 | extern struct resource non_dvr_vz_calliope_resources[]; | ||
57 | extern struct resource non_dvr_vze_calliope_resources[]; | ||
58 | extern struct resource non_dvr_vzf_calliope_resources[]; | ||
59 | extern struct resource non_dvr_zeus_resources[]; | ||
60 | |||
61 | extern void powertv_platform_init(void); | ||
62 | extern void platform_alloc_bootmem(void); | ||
63 | extern enum asic_type platform_get_asic(void); | ||
64 | extern enum family_type platform_get_family(void); | ||
65 | extern int platform_supports_dvr(void); | ||
66 | extern int platform_supports_ffs(void); | ||
67 | extern int platform_supports_pcie(void); | ||
68 | extern int platform_supports_display(void); | ||
69 | extern void configure_platform(void); | ||
70 | extern void platform_configure_usb_ehci(void); | ||
71 | extern void platform_unconfigure_usb_ehci(void); | ||
72 | extern void platform_configure_usb_ohci(void); | ||
73 | extern void platform_unconfigure_usb_ohci(void); | ||
74 | |||
75 | /* Platform Resources */ | ||
76 | #define ASIC_RESOURCE_GET_EXISTS 1 | ||
77 | extern struct resource *asic_resource_get(const char *name); | ||
78 | extern void platform_release_memory(void *baddr, int size); | ||
79 | |||
80 | /* Reboot Cause */ | ||
81 | extern void set_reboot_cause(char code, unsigned int data, unsigned int data2); | ||
82 | extern void set_locked_reboot_cause(char code, unsigned int data, | ||
83 | unsigned int data2); | ||
84 | |||
85 | enum sys_reboot_type { | ||
86 | sys_unknown_reboot = 0x00, /* Unknown reboot cause */ | ||
87 | sys_davic_change = 0x01, /* Reboot due to change in DAVIC | ||
88 | * mode */ | ||
89 | sys_user_reboot = 0x02, /* Reboot initiated by user */ | ||
90 | sys_system_reboot = 0x03, /* Reboot initiated by OS */ | ||
91 | sys_trap_reboot = 0x04, /* Reboot due to a CPU trap */ | ||
92 | sys_silent_reboot = 0x05, /* Silent reboot */ | ||
93 | sys_boot_ldr_reboot = 0x06, /* Bootloader reboot */ | ||
94 | sys_power_up_reboot = 0x07, /* Power on bootup. Older | ||
95 | * drivers may report as | ||
96 | * userReboot. */ | ||
97 | sys_code_change = 0x08, /* Reboot to take code change. | ||
98 | * Older drivers may report as | ||
99 | * userReboot. */ | ||
100 | sys_hardware_reset = 0x09, /* HW watchdog or front-panel | ||
101 | * reset button reset. Older | ||
102 | * drivers may report as | ||
103 | * userReboot. */ | ||
104 | sys_watchdogInterrupt = 0x0A /* Pre-watchdog interrupt */ | ||
105 | }; | ||
106 | |||
107 | #endif /* _ASM_MACH_POWERTV_ASIC_H */ | ||
diff --git a/arch/mips/include/asm/mach-powertv/asic_regs.h b/arch/mips/include/asm/mach-powertv/asic_regs.h new file mode 100644 index 000000000000..9a65c93782f9 --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/asic_regs.h | |||
@@ -0,0 +1,155 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | |||
19 | #ifndef __ASM_MACH_POWERTV_ASIC_H_ | ||
20 | #define __ASM_MACH_POWERTV_ASIC_H_ | ||
21 | #include <linux/io.h> | ||
22 | |||
23 | /* ASIC types */ | ||
24 | enum asic_type { | ||
25 | ASIC_UNKNOWN, | ||
26 | ASIC_ZEUS, | ||
27 | ASIC_CALLIOPE, | ||
28 | ASIC_CRONUS, | ||
29 | ASIC_CRONUSLITE, | ||
30 | ASICS | ||
31 | }; | ||
32 | |||
33 | /* hardcoded values read from Chip Version registers */ | ||
34 | #define CRONUS_10 0x0B4C1C20 | ||
35 | #define CRONUS_11 0x0B4C1C21 | ||
36 | #define CRONUSLITE_10 0x0B4C1C40 | ||
37 | |||
38 | #define NAND_FLASH_BASE 0x03000000 | ||
39 | #define ZEUS_IO_BASE 0x09000000 | ||
40 | #define CALLIOPE_IO_BASE 0x08000000 | ||
41 | #define CRONUS_IO_BASE 0x09000000 | ||
42 | #define ASIC_IO_SIZE 0x01000000 | ||
43 | |||
44 | /* Definitions for backward compatibility */ | ||
45 | #define UART1_INTSTAT uart1_intstat | ||
46 | #define UART1_INTEN uart1_inten | ||
47 | #define UART1_CONFIG1 uart1_config1 | ||
48 | #define UART1_CONFIG2 uart1_config2 | ||
49 | #define UART1_DIVISORHI uart1_divisorhi | ||
50 | #define UART1_DIVISORLO uart1_divisorlo | ||
51 | #define UART1_DATA uart1_data | ||
52 | #define UART1_STATUS uart1_status | ||
53 | |||
54 | /* ASIC register enumeration */ | ||
55 | struct register_map { | ||
56 | u32 eic_slow0_strt_add; | ||
57 | u32 eic_cfg_bits; | ||
58 | u32 eic_ready_status; | ||
59 | |||
60 | u32 chipver3; | ||
61 | u32 chipver2; | ||
62 | u32 chipver1; | ||
63 | u32 chipver0; | ||
64 | |||
65 | u32 uart1_intstat; | ||
66 | u32 uart1_inten; | ||
67 | u32 uart1_config1; | ||
68 | u32 uart1_config2; | ||
69 | u32 uart1_divisorhi; | ||
70 | u32 uart1_divisorlo; | ||
71 | u32 uart1_data; | ||
72 | u32 uart1_status; | ||
73 | |||
74 | u32 int_stat_3; | ||
75 | u32 int_stat_2; | ||
76 | u32 int_stat_1; | ||
77 | u32 int_stat_0; | ||
78 | u32 int_config; | ||
79 | u32 int_int_scan; | ||
80 | u32 ien_int_3; | ||
81 | u32 ien_int_2; | ||
82 | u32 ien_int_1; | ||
83 | u32 ien_int_0; | ||
84 | u32 int_level_3_3; | ||
85 | u32 int_level_3_2; | ||
86 | u32 int_level_3_1; | ||
87 | u32 int_level_3_0; | ||
88 | u32 int_level_2_3; | ||
89 | u32 int_level_2_2; | ||
90 | u32 int_level_2_1; | ||
91 | u32 int_level_2_0; | ||
92 | u32 int_level_1_3; | ||
93 | u32 int_level_1_2; | ||
94 | u32 int_level_1_1; | ||
95 | u32 int_level_1_0; | ||
96 | u32 int_level_0_3; | ||
97 | u32 int_level_0_2; | ||
98 | u32 int_level_0_1; | ||
99 | u32 int_level_0_0; | ||
100 | u32 int_docsis_en; | ||
101 | |||
102 | u32 mips_pll_setup; | ||
103 | u32 usb_fs; | ||
104 | u32 test_bus; | ||
105 | u32 crt_spare; | ||
106 | u32 usb2_ohci_int_mask; | ||
107 | u32 usb2_strap; | ||
108 | u32 ehci_hcapbase; | ||
109 | u32 ohci_hc_revision; | ||
110 | u32 bcm1_bs_lmi_steer; | ||
111 | u32 usb2_control; | ||
112 | u32 usb2_stbus_obc; | ||
113 | u32 usb2_stbus_mess_size; | ||
114 | u32 usb2_stbus_chunk_size; | ||
115 | |||
116 | u32 pcie_regs; | ||
117 | u32 tim_ch; | ||
118 | u32 tim_cl; | ||
119 | u32 gpio_dout; | ||
120 | u32 gpio_din; | ||
121 | u32 gpio_dir; | ||
122 | u32 watchdog; | ||
123 | u32 front_panel; | ||
124 | |||
125 | u32 register_maps; | ||
126 | }; | ||
127 | |||
128 | extern enum asic_type asic; | ||
129 | extern const struct register_map *register_map; | ||
130 | extern unsigned long asic_phy_base; /* Physical address of ASIC */ | ||
131 | extern unsigned long asic_base; /* Virtual address of ASIC */ | ||
132 | |||
133 | /* | ||
134 | * Macros to interface to registers through their ioremapped address | ||
135 | * asic_reg_offset Returns the offset of a given register from the start | ||
136 | * of the ASIC address space | ||
137 | * asic_reg_phys_addr Returns the physical address of the given register | ||
138 | * asic_reg_addr Returns the iomapped virtual address of the given | ||
139 | * register. | ||
140 | */ | ||
141 | #define asic_reg_offset(x) (register_map->x) | ||
142 | #define asic_reg_phys_addr(x) (asic_phy_base + asic_reg_offset(x)) | ||
143 | #define asic_reg_addr(x) \ | ||
144 | ((unsigned int *) (asic_base + asic_reg_offset(x))) | ||
145 | |||
146 | /* | ||
147 | * The asic_reg macro is gone. It should be replaced by either asic_read or | ||
148 | * asic_write, as appropriate. | ||
149 | */ | ||
150 | |||
151 | #define asic_read(x) readl(asic_reg_addr(x)) | ||
152 | #define asic_write(v, x) writel(v, asic_reg_addr(x)) | ||
153 | |||
154 | extern void asic_irq_init(void); | ||
155 | #endif | ||
diff --git a/arch/mips/include/asm/mach-powertv/dma-coherence.h b/arch/mips/include/asm/mach-powertv/dma-coherence.h new file mode 100644 index 000000000000..5b8d5ebeb838 --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/dma-coherence.h | |||
@@ -0,0 +1,119 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Version from mach-generic modified to support PowerTV port | ||
7 | * Portions Copyright (C) 2009 Cisco Systems, Inc. | ||
8 | * Copyright (C) 2006 Ralf Baechle <ralf@linux-mips.org> | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #ifndef __ASM_MACH_POWERTV_DMA_COHERENCE_H | ||
13 | #define __ASM_MACH_POWERTV_DMA_COHERENCE_H | ||
14 | |||
15 | #include <linux/sched.h> | ||
16 | #include <linux/version.h> | ||
17 | #include <linux/device.h> | ||
18 | #include <asm/mach-powertv/asic.h> | ||
19 | |||
20 | static inline bool is_kseg2(void *addr) | ||
21 | { | ||
22 | return (unsigned long)addr >= KSEG2; | ||
23 | } | ||
24 | |||
25 | static inline unsigned long virt_to_phys_from_pte(void *addr) | ||
26 | { | ||
27 | pgd_t *pgd; | ||
28 | pud_t *pud; | ||
29 | pmd_t *pmd; | ||
30 | pte_t *ptep, pte; | ||
31 | |||
32 | unsigned long virt_addr = (unsigned long)addr; | ||
33 | unsigned long phys_addr = 0UL; | ||
34 | |||
35 | /* get the page global directory. */ | ||
36 | pgd = pgd_offset_k(virt_addr); | ||
37 | |||
38 | if (!pgd_none(*pgd)) { | ||
39 | /* get the page upper directory */ | ||
40 | pud = pud_offset(pgd, virt_addr); | ||
41 | if (!pud_none(*pud)) { | ||
42 | /* get the page middle directory */ | ||
43 | pmd = pmd_offset(pud, virt_addr); | ||
44 | if (!pmd_none(*pmd)) { | ||
45 | /* get a pointer to the page table entry */ | ||
46 | ptep = pte_offset(pmd, virt_addr); | ||
47 | pte = *ptep; | ||
48 | /* check for a valid page */ | ||
49 | if (pte_present(pte)) { | ||
50 | /* get the physical address the page is | ||
51 | * refering to */ | ||
52 | phys_addr = (unsigned long) | ||
53 | page_to_phys(pte_page(pte)); | ||
54 | /* add the offset within the page */ | ||
55 | phys_addr |= (virt_addr & ~PAGE_MASK); | ||
56 | } | ||
57 | } | ||
58 | } | ||
59 | } | ||
60 | |||
61 | return phys_addr; | ||
62 | } | ||
63 | |||
64 | static inline dma_addr_t plat_map_dma_mem(struct device *dev, void *addr, | ||
65 | size_t size) | ||
66 | { | ||
67 | if (is_kseg2(addr)) | ||
68 | return phys_to_bus(virt_to_phys_from_pte(addr)); | ||
69 | else | ||
70 | return phys_to_bus(virt_to_phys(addr)); | ||
71 | } | ||
72 | |||
73 | static inline dma_addr_t plat_map_dma_mem_page(struct device *dev, | ||
74 | struct page *page) | ||
75 | { | ||
76 | return phys_to_bus(page_to_phys(page)); | ||
77 | } | ||
78 | |||
79 | static inline unsigned long plat_dma_addr_to_phys(struct device *dev, | ||
80 | dma_addr_t dma_addr) | ||
81 | { | ||
82 | return bus_to_phys(dma_addr); | ||
83 | } | ||
84 | |||
85 | static inline void plat_unmap_dma_mem(struct device *dev, dma_addr_t dma_addr, | ||
86 | size_t size, enum dma_data_direction direction) | ||
87 | { | ||
88 | } | ||
89 | |||
90 | static inline int plat_dma_supported(struct device *dev, u64 mask) | ||
91 | { | ||
92 | /* | ||
93 | * we fall back to GFP_DMA when the mask isn't all 1s, | ||
94 | * so we can't guarantee allocations that must be | ||
95 | * within a tighter range than GFP_DMA.. | ||
96 | */ | ||
97 | if (mask < DMA_BIT_MASK(24)) | ||
98 | return 0; | ||
99 | |||
100 | return 1; | ||
101 | } | ||
102 | |||
103 | static inline void plat_extra_sync_for_device(struct device *dev) | ||
104 | { | ||
105 | return; | ||
106 | } | ||
107 | |||
108 | static inline int plat_dma_mapping_error(struct device *dev, | ||
109 | dma_addr_t dma_addr) | ||
110 | { | ||
111 | return 0; | ||
112 | } | ||
113 | |||
114 | static inline int plat_device_is_coherent(struct device *dev) | ||
115 | { | ||
116 | return 0; | ||
117 | } | ||
118 | |||
119 | #endif /* __ASM_MACH_POWERTV_DMA_COHERENCE_H */ | ||
diff --git a/arch/mips/include/asm/mach-powertv/interrupts.h b/arch/mips/include/asm/mach-powertv/interrupts.h new file mode 100644 index 000000000000..629a57413657 --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/interrupts.h | |||
@@ -0,0 +1,254 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | |||
19 | #ifndef _ASM_MACH_POWERTV_INTERRUPTS_H_ | ||
20 | #define _ASM_MACH_POWERTV_INTERRUPTS_H_ | ||
21 | |||
22 | /* | ||
23 | * Defines for all of the interrupt lines | ||
24 | */ | ||
25 | |||
26 | /* Definitions for backward compatibility */ | ||
27 | #define kIrq_Uart1 irq_uart1 | ||
28 | |||
29 | #define ibase 0 | ||
30 | |||
31 | /*------------- Register: int_stat_3 */ | ||
32 | /* 126 unused (bit 31) */ | ||
33 | #define irq_asc2video (ibase+126) /* ASC 2 Video Interrupt */ | ||
34 | #define irq_asc1video (ibase+125) /* ASC 1 Video Interrupt */ | ||
35 | #define irq_comms_block_wd (ibase+124) /* ASC 1 Video Interrupt */ | ||
36 | #define irq_fdma_mailbox (ibase+123) /* FDMA Mailbox Output */ | ||
37 | #define irq_fdma_gp (ibase+122) /* FDMA GP Output */ | ||
38 | #define irq_mips_pic (ibase+121) /* MIPS Performance Counter | ||
39 | * Interrupt */ | ||
40 | #define irq_mips_timer (ibase+120) /* MIPS Timer Interrupt */ | ||
41 | #define irq_memory_protect (ibase+119) /* Memory Protection Interrupt | ||
42 | * -- Ored by glue logic inside | ||
43 | * SPARC ILC (see | ||
44 | * INT_MEM_PROT_STAT, below, | ||
45 | * for individual interrupts) | ||
46 | */ | ||
47 | /* 118 unused (bit 22) */ | ||
48 | #define irq_sbag (ibase+117) /* SBAG Interrupt -- Ored by | ||
49 | * glue logic inside SPARC ILC | ||
50 | * (see INT_SBAG_STAT, below, | ||
51 | * for individual interrupts) */ | ||
52 | #define irq_qam_b_fec (ibase+116) /* QAM B FEC Interrupt */ | ||
53 | #define irq_qam_a_fec (ibase+115) /* QAM A FEC Interrupt */ | ||
54 | /* 114 unused (bit 18) */ | ||
55 | #define irq_mailbox (ibase+113) /* Mailbox Debug Interrupt -- | ||
56 | * Ored by glue logic inside | ||
57 | * SPARC ILC (see | ||
58 | * INT_MAILBOX_STAT, below, for | ||
59 | * individual interrupts) */ | ||
60 | #define irq_fuse_stat1 (ibase+112) /* Fuse Status 1 */ | ||
61 | #define irq_fuse_stat2 (ibase+111) /* Fuse Status 2 */ | ||
62 | #define irq_fuse_stat3 (ibase+110) /* Blitter Interrupt / Fuse | ||
63 | * Status 3 */ | ||
64 | #define irq_blitter (ibase+110) /* Blitter Interrupt / Fuse | ||
65 | * Status 3 */ | ||
66 | #define irq_avc1_pp0 (ibase+109) /* AVC Decoder #1 PP0 | ||
67 | * Interrupt */ | ||
68 | #define irq_avc1_pp1 (ibase+108) /* AVC Decoder #1 PP1 | ||
69 | * Interrupt */ | ||
70 | #define irq_avc1_mbe (ibase+107) /* AVC Decoder #1 MBE | ||
71 | * Interrupt */ | ||
72 | #define irq_avc2_pp0 (ibase+106) /* AVC Decoder #2 PP0 | ||
73 | * Interrupt */ | ||
74 | #define irq_avc2_pp1 (ibase+105) /* AVC Decoder #2 PP1 | ||
75 | * Interrupt */ | ||
76 | #define irq_avc2_mbe (ibase+104) /* AVC Decoder #2 MBE | ||
77 | * Interrupt */ | ||
78 | #define irq_zbug_spi (ibase+103) /* Zbug SPI Slave Interrupt */ | ||
79 | #define irq_qam_mod2 (ibase+102) /* QAM Modulator 2 DMA | ||
80 | * Interrupt */ | ||
81 | #define irq_ir_rx (ibase+101) /* IR RX 2 Interrupt */ | ||
82 | #define irq_aud_dsp2 (ibase+100) /* Audio DSP #2 Interrupt */ | ||
83 | #define irq_aud_dsp1 (ibase+99) /* Audio DSP #1 Interrupt */ | ||
84 | #define irq_docsis (ibase+98) /* DOCSIS Debug Interrupt */ | ||
85 | #define irq_sd_dvp1 (ibase+97) /* SD DVP #1 Interrupt */ | ||
86 | #define irq_sd_dvp2 (ibase+96) /* SD DVP #2 Interrupt */ | ||
87 | /*------------- Register: int_stat_2 */ | ||
88 | #define irq_hd_dvp (ibase+95) /* HD DVP Interrupt */ | ||
89 | #define kIrq_Prewatchdog (ibase+94) /* watchdog Pre-Interrupt */ | ||
90 | #define irq_timer2 (ibase+93) /* Programmable Timer | ||
91 | * Interrupt 2 */ | ||
92 | #define irq_1394 (ibase+92) /* 1394 Firewire Interrupt */ | ||
93 | #define irq_usbohci (ibase+91) /* USB 2.0 OHCI Interrupt */ | ||
94 | #define irq_usbehci (ibase+90) /* USB 2.0 EHCI Interrupt */ | ||
95 | #define irq_pciexp (ibase+89) /* PCI Express 0 Interrupt */ | ||
96 | #define irq_pciexp0 (ibase+89) /* PCI Express 0 Interrupt */ | ||
97 | #define irq_afe1 (ibase+88) /* AFE 1 Interrupt */ | ||
98 | #define irq_sata (ibase+87) /* SATA 1 Interrupt */ | ||
99 | #define irq_sata1 (ibase+87) /* SATA 1 Interrupt */ | ||
100 | #define irq_dtcp (ibase+86) /* DTCP Interrupt */ | ||
101 | #define irq_pciexp1 (ibase+85) /* PCI Express 1 Interrupt */ | ||
102 | /* 84 unused (bit 20) */ | ||
103 | /* 83 unused (bit 19) */ | ||
104 | /* 82 unused (bit 18) */ | ||
105 | #define irq_sata2 (ibase+81) /* SATA2 Interrupt */ | ||
106 | #define irq_uart2 (ibase+80) /* UART2 Interrupt */ | ||
107 | #define irq_legacy_usb (ibase+79) /* Legacy USB Host ISR (1.1 | ||
108 | * Host module) */ | ||
109 | #define irq_pod (ibase+78) /* POD Interrupt */ | ||
110 | #define irq_slave_usb (ibase+77) /* Slave USB */ | ||
111 | #define irq_denc1 (ibase+76) /* DENC #1 VTG Interrupt */ | ||
112 | #define irq_vbi_vtg (ibase+75) /* VBI VTG Interrupt */ | ||
113 | #define irq_afe2 (ibase+74) /* AFE 2 Interrupt */ | ||
114 | #define irq_denc2 (ibase+73) /* DENC #2 VTG Interrupt */ | ||
115 | #define irq_asc2 (ibase+72) /* ASC #2 Interrupt */ | ||
116 | #define irq_asc1 (ibase+71) /* ASC #1 Interrupt */ | ||
117 | #define irq_mod_dma (ibase+70) /* Modulator DMA Interrupt */ | ||
118 | #define irq_byte_eng1 (ibase+69) /* Byte Engine Interrupt [1] */ | ||
119 | #define irq_byte_eng0 (ibase+68) /* Byte Engine Interrupt [0] */ | ||
120 | /* 67 unused (bit 03) */ | ||
121 | /* 66 unused (bit 02) */ | ||
122 | /* 65 unused (bit 01) */ | ||
123 | /* 64 unused (bit 00) */ | ||
124 | /*------------- Register: int_stat_1 */ | ||
125 | /* 63 unused (bit 31) */ | ||
126 | /* 62 unused (bit 30) */ | ||
127 | /* 61 unused (bit 29) */ | ||
128 | /* 60 unused (bit 28) */ | ||
129 | /* 59 unused (bit 27) */ | ||
130 | /* 58 unused (bit 26) */ | ||
131 | /* 57 unused (bit 25) */ | ||
132 | /* 56 unused (bit 24) */ | ||
133 | #define irq_buf_dma_mem2mem (ibase+55) /* BufDMA Memory to Memory | ||
134 | * Interrupt */ | ||
135 | #define irq_buf_dma_usbtransmit (ibase+54) /* BufDMA USB Transmit | ||
136 | * Interrupt */ | ||
137 | #define irq_buf_dma_qpskpodtransmit (ibase+53) /* BufDMA QPSK/POD Tramsit | ||
138 | * Interrupt */ | ||
139 | #define irq_buf_dma_transmit_error (ibase+52) /* BufDMA Transmit Error | ||
140 | * Interrupt */ | ||
141 | #define irq_buf_dma_usbrecv (ibase+51) /* BufDMA USB Receive | ||
142 | * Interrupt */ | ||
143 | #define irq_buf_dma_qpskpodrecv (ibase+50) /* BufDMA QPSK/POD Receive | ||
144 | * Interrupt */ | ||
145 | #define irq_buf_dma_recv_error (ibase+49) /* BufDMA Receive Error | ||
146 | * Interrupt */ | ||
147 | #define irq_qamdma_transmit_play (ibase+48) /* QAMDMA Transmit/Play | ||
148 | * Interrupt */ | ||
149 | #define irq_qamdma_transmit_error (ibase+47) /* QAMDMA Transmit Error | ||
150 | * Interrupt */ | ||
151 | #define irq_qamdma_recv2high (ibase+46) /* QAMDMA Receive 2 High | ||
152 | * (Chans 63-32) */ | ||
153 | #define irq_qamdma_recv2low (ibase+45) /* QAMDMA Receive 2 Low | ||
154 | * (Chans 31-0) */ | ||
155 | #define irq_qamdma_recv1high (ibase+44) /* QAMDMA Receive 1 High | ||
156 | * (Chans 63-32) */ | ||
157 | #define irq_qamdma_recv1low (ibase+43) /* QAMDMA Receive 1 Low | ||
158 | * (Chans 31-0) */ | ||
159 | #define irq_qamdma_recv_error (ibase+42) /* QAMDMA Receive Error | ||
160 | * Interrupt */ | ||
161 | #define irq_mpegsplice (ibase+41) /* MPEG Splice Interrupt */ | ||
162 | #define irq_deinterlace_rdy (ibase+40) /* Deinterlacer Frame Ready | ||
163 | * Interrupt */ | ||
164 | #define irq_ext_in0 (ibase+39) /* External Interrupt irq_in0 */ | ||
165 | #define irq_gpio3 (ibase+38) /* GP I/O IRQ 3 - From GP I/O | ||
166 | * Module */ | ||
167 | #define irq_gpio2 (ibase+37) /* GP I/O IRQ 2 - From GP I/O | ||
168 | * Module (ABE_intN) */ | ||
169 | #define irq_pcrcmplt1 (ibase+36) /* PCR Capture Complete or | ||
170 | * Discontinuity 1 */ | ||
171 | #define irq_pcrcmplt2 (ibase+35) /* PCR Capture Complete or | ||
172 | * Discontinuity 2 */ | ||
173 | #define irq_parse_peierr (ibase+34) /* PID Parser Error Detect | ||
174 | * (PEI) */ | ||
175 | #define irq_parse_cont_err (ibase+33) /* PID Parser continuity error | ||
176 | * detect */ | ||
177 | #define irq_ds1framer (ibase+32) /* DS1 Framer Interrupt */ | ||
178 | /*------------- Register: int_stat_0 */ | ||
179 | #define irq_gpio1 (ibase+31) /* GP I/O IRQ 1 - From GP I/O | ||
180 | * Module */ | ||
181 | #define irq_gpio0 (ibase+30) /* GP I/O IRQ 0 - From GP I/O | ||
182 | * Module */ | ||
183 | #define irq_qpsk_out_aloha (ibase+29) /* QPSK Output Slotted Aloha | ||
184 | * (chan 3) Transmission | ||
185 | * Completed OK */ | ||
186 | #define irq_qpsk_out_tdma (ibase+28) /* QPSK Output TDMA (chan 2) | ||
187 | * Transmission Completed OK */ | ||
188 | #define irq_qpsk_out_reserve (ibase+27) /* QPSK Output Reservation | ||
189 | * (chan 1) Transmission | ||
190 | * Completed OK */ | ||
191 | #define irq_qpsk_out_aloha_err (ibase+26) /* QPSK Output Slotted Aloha | ||
192 | * (chan 3)Transmission | ||
193 | * completed with Errors. */ | ||
194 | #define irq_qpsk_out_tdma_err (ibase+25) /* QPSK Output TDMA (chan 2) | ||
195 | * Transmission completed with | ||
196 | * Errors. */ | ||
197 | #define irq_qpsk_out_rsrv_err (ibase+24) /* QPSK Output Reservation | ||
198 | * (chan 1) Transmission | ||
199 | * completed with Errors */ | ||
200 | #define irq_aloha_fail (ibase+23) /* Unsuccessful Resend of Aloha | ||
201 | * for N times. Aloha retry | ||
202 | * timeout for channel 3. */ | ||
203 | #define irq_timer1 (ibase+22) /* Programmable Timer | ||
204 | * Interrupt */ | ||
205 | #define irq_keyboard (ibase+21) /* Keyboard Module Interrupt */ | ||
206 | #define irq_i2c (ibase+20) /* I2C Module Interrupt */ | ||
207 | #define irq_spi (ibase+19) /* SPI Module Interrupt */ | ||
208 | #define irq_irblaster (ibase+18) /* IR Blaster Interrupt */ | ||
209 | #define irq_splice_detect (ibase+17) /* PID Key Change Interrupt or | ||
210 | * Splice Detect Interrupt */ | ||
211 | #define irq_se_micro (ibase+16) /* Secure Micro I/F Module | ||
212 | * Interrupt */ | ||
213 | #define irq_uart1 (ibase+15) /* UART Interrupt */ | ||
214 | #define irq_irrecv (ibase+14) /* IR Receiver Interrupt */ | ||
215 | #define irq_host_int1 (ibase+13) /* Host-to-Host Interrupt 1 */ | ||
216 | #define irq_host_int0 (ibase+12) /* Host-to-Host Interrupt 0 */ | ||
217 | #define irq_qpsk_hecerr (ibase+11) /* QPSK HEC Error Interrupt */ | ||
218 | #define irq_qpsk_crcerr (ibase+10) /* QPSK AAL-5 CRC Error | ||
219 | * Interrupt */ | ||
220 | /* 9 unused (bit 09) */ | ||
221 | /* 8 unused (bit 08) */ | ||
222 | #define irq_psicrcerr (ibase+7) /* QAM PSI CRC Error | ||
223 | * Interrupt */ | ||
224 | #define irq_psilength_err (ibase+6) /* QAM PSI Length Error | ||
225 | * Interrupt */ | ||
226 | #define irq_esfforward (ibase+5) /* ESF Interrupt Mark From | ||
227 | * Forward Path Reference - | ||
228 | * every 3ms when forward Mbits | ||
229 | * and forward slot control | ||
230 | * bytes are updated. */ | ||
231 | #define irq_esfreverse (ibase+4) /* ESF Interrupt Mark from | ||
232 | * Reverse Path Reference - | ||
233 | * delayed from forward mark by | ||
234 | * the ranging delay plus a | ||
235 | * fixed amount. When reverse | ||
236 | * Mbits and reverse slot | ||
237 | * control bytes are updated. | ||
238 | * Occurs every 3ms for 3.0M and | ||
239 | * 1.554 M upstream rates and | ||
240 | * every 6 ms for 256K upstream | ||
241 | * rate. */ | ||
242 | #define irq_aloha_timeout (ibase+3) /* Slotted-Aloha timeout on | ||
243 | * Channel 1. */ | ||
244 | #define irq_reservation (ibase+2) /* Partial (or Incremental) | ||
245 | * Reservation Message Completed | ||
246 | * or Slotted aloha verify for | ||
247 | * channel 1. */ | ||
248 | #define irq_aloha3 (ibase+1) /* Slotted-Aloha Message Verify | ||
249 | * Interrupt or Reservation | ||
250 | * increment completed for | ||
251 | * channel 3. */ | ||
252 | #define irq_mpeg_d (ibase+0) /* MPEG Decoder Interrupt */ | ||
253 | #endif /* _ASM_MACH_POWERTV_INTERRUPTS_H_ */ | ||
254 | |||
diff --git a/arch/mips/include/asm/mach-powertv/ioremap.h b/arch/mips/include/asm/mach-powertv/ioremap.h new file mode 100644 index 000000000000..e6276d5146e8 --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/ioremap.h | |||
@@ -0,0 +1,90 @@ | |||
1 | /* | ||
2 | * This program is free software; you can redistribute it and/or | ||
3 | * modify it under the terms of the GNU General Public License | ||
4 | * as published by the Free Software Foundation; either version | ||
5 | * 2 of the License, or (at your option) any later version. | ||
6 | * | ||
7 | * Portions Copyright (C) Cisco Systems, Inc. | ||
8 | */ | ||
9 | #ifndef __ASM_MACH_POWERTV_IOREMAP_H | ||
10 | #define __ASM_MACH_POWERTV_IOREMAP_H | ||
11 | |||
12 | #include <linux/types.h> | ||
13 | |||
14 | #define LOW_MEM_BOUNDARY_PHYS 0x20000000 | ||
15 | #define LOW_MEM_BOUNDARY_MASK (~(LOW_MEM_BOUNDARY_PHYS - 1)) | ||
16 | |||
17 | /* | ||
18 | * The bus addresses are different than the physical addresses that | ||
19 | * the processor sees by an offset. This offset varies by ASIC | ||
20 | * version. Define a variable to hold the offset and some macros to | ||
21 | * make the conversion simpler. */ | ||
22 | extern unsigned long phys_to_bus_offset; | ||
23 | |||
24 | #ifdef CONFIG_HIGHMEM | ||
25 | #define MEM_GAP_PHYS 0x60000000 | ||
26 | /* | ||
27 | * TODO: We will use the hard code for conversion between physical and | ||
28 | * bus until the bootloader releases their device tree to us. | ||
29 | */ | ||
30 | #define phys_to_bus(x) (((x) < LOW_MEM_BOUNDARY_PHYS) ? \ | ||
31 | ((x) + phys_to_bus_offset) : (x)) | ||
32 | #define bus_to_phys(x) (((x) < MEM_GAP_PHYS_ADDR) ? \ | ||
33 | ((x) - phys_to_bus_offset) : (x)) | ||
34 | #else | ||
35 | #define phys_to_bus(x) ((x) + phys_to_bus_offset) | ||
36 | #define bus_to_phys(x) ((x) - phys_to_bus_offset) | ||
37 | #endif | ||
38 | |||
39 | /* | ||
40 | * Determine whether the address we are given is for an ASIC device | ||
41 | * Params: addr Address to check | ||
42 | * Returns: Zero if the address is not for ASIC devices, non-zero | ||
43 | * if it is. | ||
44 | */ | ||
45 | static inline int asic_is_device_addr(phys_t addr) | ||
46 | { | ||
47 | return !((phys_t)addr & (phys_t) LOW_MEM_BOUNDARY_MASK); | ||
48 | } | ||
49 | |||
50 | /* | ||
51 | * Determine whether the address we are given is external RAM mappable | ||
52 | * into KSEG1. | ||
53 | * Params: addr Address to check | ||
54 | * Returns: Zero if the address is not for external RAM and | ||
55 | */ | ||
56 | static inline int asic_is_lowmem_ram_addr(phys_t addr) | ||
57 | { | ||
58 | /* | ||
59 | * The RAM always starts at the following address in the processor's | ||
60 | * physical address space | ||
61 | */ | ||
62 | static const phys_t phys_ram_base = 0x10000000; | ||
63 | phys_t bus_ram_base; | ||
64 | |||
65 | bus_ram_base = phys_to_bus_offset + phys_ram_base; | ||
66 | |||
67 | return addr >= bus_ram_base && | ||
68 | addr < (bus_ram_base + (LOW_MEM_BOUNDARY_PHYS - phys_ram_base)); | ||
69 | } | ||
70 | |||
71 | /* | ||
72 | * Allow physical addresses to be fixed up to help peripherals located | ||
73 | * outside the low 32-bit range -- generic pass-through version. | ||
74 | */ | ||
75 | static inline phys_t fixup_bigphys_addr(phys_t phys_addr, phys_t size) | ||
76 | { | ||
77 | return phys_addr; | ||
78 | } | ||
79 | |||
80 | static inline void __iomem *plat_ioremap(phys_t offset, unsigned long size, | ||
81 | unsigned long flags) | ||
82 | { | ||
83 | return NULL; | ||
84 | } | ||
85 | |||
86 | static inline int plat_iounmap(const volatile void __iomem *addr) | ||
87 | { | ||
88 | return 0; | ||
89 | } | ||
90 | #endif /* __ASM_MACH_POWERTV_IOREMAP_H */ | ||
diff --git a/arch/mips/include/asm/mach-powertv/irq.h b/arch/mips/include/asm/mach-powertv/irq.h new file mode 100644 index 000000000000..4bd5d0c61a91 --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/irq.h | |||
@@ -0,0 +1,25 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | |||
19 | #ifndef _ASM_MACH_POWERTV_IRQ_H | ||
20 | #define _ASM_MACH_POWERTV_IRQ_H | ||
21 | #include <asm/mach-powertv/interrupts.h> | ||
22 | |||
23 | #define MIPS_CPU_IRQ_BASE ibase | ||
24 | #define NR_IRQS 127 | ||
25 | #endif | ||
diff --git a/arch/mips/include/asm/mach-powertv/powertv-clock.h b/arch/mips/include/asm/mach-powertv/powertv-clock.h new file mode 100644 index 000000000000..6f3e9a0fcf8c --- /dev/null +++ b/arch/mips/include/asm/mach-powertv/powertv-clock.h | |||
@@ -0,0 +1,29 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | */ | ||
18 | /* | ||
19 | * Local definitions for the powertv PCI code | ||
20 | */ | ||
21 | |||
22 | #ifndef _POWERTV_PCI_POWERTV_PCI_H_ | ||
23 | #define _POWERTV_PCI_POWERTV_PCI_H_ | ||
24 | extern int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
25 | extern int asic_pcie_init(void); | ||
26 | extern int asic_pcie_init(void); | ||
27 | |||
28 | extern int log_level; | ||
29 | #endif | ||
diff --git a/arch/mips/include/asm/mach-excite/war.h b/arch/mips/include/asm/mach-powertv/war.h index 1f82180c1598..7ac05ecc512b 100644 --- a/arch/mips/include/asm/mach-excite/war.h +++ b/arch/mips/include/asm/mach-powertv/war.h | |||
@@ -3,10 +3,13 @@ | |||
3 | * License. See the file "COPYING" in the main directory of this archive | 3 | * License. See the file "COPYING" in the main directory of this archive |
4 | * for more details. | 4 | * for more details. |
5 | * | 5 | * |
6 | * This version for the PowerTV platform copied from the Malta version. | ||
7 | * | ||
6 | * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> | 8 | * Copyright (C) 2002, 2004, 2007 by Ralf Baechle <ralf@linux-mips.org> |
9 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
7 | */ | 10 | */ |
8 | #ifndef __ASM_MIPS_MACH_EXCITE_WAR_H | 11 | #ifndef __ASM_MACH_POWERTV_WAR_H |
9 | #define __ASM_MIPS_MACH_EXCITE_WAR_H | 12 | #define __ASM_MACH_POWERTV_WAR_H |
10 | 13 | ||
11 | #define R4600_V1_INDEX_ICACHEOP_WAR 0 | 14 | #define R4600_V1_INDEX_ICACHEOP_WAR 0 |
12 | #define R4600_V1_HIT_CACHEOP_WAR 0 | 15 | #define R4600_V1_HIT_CACHEOP_WAR 0 |
@@ -14,12 +17,12 @@ | |||
14 | #define R5432_CP0_INTERRUPT_WAR 0 | 17 | #define R5432_CP0_INTERRUPT_WAR 0 |
15 | #define BCM1250_M3_WAR 0 | 18 | #define BCM1250_M3_WAR 0 |
16 | #define SIBYTE_1956_WAR 0 | 19 | #define SIBYTE_1956_WAR 0 |
17 | #define MIPS4K_ICACHE_REFILL_WAR 0 | 20 | #define MIPS4K_ICACHE_REFILL_WAR 1 |
18 | #define MIPS_CACHE_SYNC_WAR 0 | 21 | #define MIPS_CACHE_SYNC_WAR 1 |
19 | #define TX49XX_ICACHE_INDEX_INV_WAR 0 | 22 | #define TX49XX_ICACHE_INDEX_INV_WAR 0 |
20 | #define RM9000_CDEX_SMP_WAR 1 | 23 | #define RM9000_CDEX_SMP_WAR 0 |
21 | #define ICACHE_REFILLS_WORKAROUND_WAR 1 | 24 | #define ICACHE_REFILLS_WORKAROUND_WAR 1 |
22 | #define R10000_LLSC_WAR 0 | 25 | #define R10000_LLSC_WAR 0 |
23 | #define MIPS34K_MISSED_ITLB_WAR 0 | 26 | #define MIPS34K_MISSED_ITLB_WAR 0 |
24 | 27 | ||
25 | #endif /* __ASM_MIPS_MACH_EXCITE_WAR_H */ | 28 | #endif /* __ASM_MACH_POWERTV_WAR_H */ |
diff --git a/arch/mips/include/asm/mips-boards/bonito64.h b/arch/mips/include/asm/mips-boards/bonito64.h index a576ce044c3c..d14e2adc4be5 100644 --- a/arch/mips/include/asm/mips-boards/bonito64.h +++ b/arch/mips/include/asm/mips-boards/bonito64.h | |||
@@ -26,11 +26,6 @@ | |||
26 | /* offsets from base register */ | 26 | /* offsets from base register */ |
27 | #define BONITO(x) (x) | 27 | #define BONITO(x) (x) |
28 | 28 | ||
29 | #elif defined(CONFIG_LEMOTE_FULOONG2E) | ||
30 | |||
31 | #define BONITO(x) (*(volatile u32 *)((char *)CKSEG1ADDR(BONITO_REG_BASE) + (x))) | ||
32 | #define BONITO_IRQ_BASE 32 | ||
33 | |||
34 | #else | 29 | #else |
35 | 30 | ||
36 | /* | 31 | /* |
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h index 6083db586500..145bb81ccaa5 100644 --- a/arch/mips/include/asm/mmu_context.h +++ b/arch/mips/include/asm/mmu_context.h | |||
@@ -24,6 +24,33 @@ | |||
24 | #endif /* SMTC */ | 24 | #endif /* SMTC */ |
25 | #include <asm-generic/mm_hooks.h> | 25 | #include <asm-generic/mm_hooks.h> |
26 | 26 | ||
27 | #ifdef CONFIG_MIPS_PGD_C0_CONTEXT | ||
28 | |||
29 | #define TLBMISS_HANDLER_SETUP_PGD(pgd) \ | ||
30 | tlbmiss_handler_setup_pgd((unsigned long)(pgd)) | ||
31 | |||
32 | static inline void tlbmiss_handler_setup_pgd(unsigned long pgd) | ||
33 | { | ||
34 | /* Check for swapper_pg_dir and convert to physical address. */ | ||
35 | if ((pgd & CKSEG3) == CKSEG0) | ||
36 | pgd = CPHYSADDR(pgd); | ||
37 | write_c0_context(pgd << 11); | ||
38 | } | ||
39 | |||
40 | #define TLBMISS_HANDLER_SETUP() \ | ||
41 | do { \ | ||
42 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir); \ | ||
43 | write_c0_xcontext((unsigned long) smp_processor_id() << 51); \ | ||
44 | } while (0) | ||
45 | |||
46 | |||
47 | static inline unsigned long get_current_pgd(void) | ||
48 | { | ||
49 | return PHYS_TO_XKSEG_CACHED((read_c0_context() >> 11) & ~0xfffUL); | ||
50 | } | ||
51 | |||
52 | #else /* CONFIG_MIPS_PGD_C0_CONTEXT: using pgd_current*/ | ||
53 | |||
27 | /* | 54 | /* |
28 | * For the fast tlb miss handlers, we keep a per cpu array of pointers | 55 | * For the fast tlb miss handlers, we keep a per cpu array of pointers |
29 | * to the current pgd for each processor. Also, the proc. id is stuffed | 56 | * to the current pgd for each processor. Also, the proc. id is stuffed |
@@ -46,7 +73,7 @@ extern unsigned long pgd_current[]; | |||
46 | back_to_back_c0_hazard(); \ | 73 | back_to_back_c0_hazard(); \ |
47 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) | 74 | TLBMISS_HANDLER_SETUP_PGD(swapper_pg_dir) |
48 | #endif | 75 | #endif |
49 | 76 | #endif /* CONFIG_MIPS_PGD_C0_CONTEXT*/ | |
50 | #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) | 77 | #if defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) |
51 | 78 | ||
52 | #define ASID_INC 0x40 | 79 | #define ASID_INC 0x40 |
diff --git a/arch/mips/include/asm/octeon/cvmx-agl-defs.h b/arch/mips/include/asm/octeon/cvmx-agl-defs.h new file mode 100644 index 000000000000..ec94b9ab7be1 --- /dev/null +++ b/arch/mips/include/asm/octeon/cvmx-agl-defs.h | |||
@@ -0,0 +1,1194 @@ | |||
1 | /***********************license start*************** | ||
2 | * Author: Cavium Networks | ||
3 | * | ||
4 | * Contact: support@caviumnetworks.com | ||
5 | * This file is part of the OCTEON SDK | ||
6 | * | ||
7 | * Copyright (c) 2003-2008 Cavium Networks | ||
8 | * | ||
9 | * This file is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License, Version 2, as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | * This file is distributed in the hope that it will be useful, but | ||
14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or | ||
16 | * NONINFRINGEMENT. See the GNU General Public License for more | ||
17 | * details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this file; if not, write to the Free Software | ||
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
22 | * or visit http://www.gnu.org/licenses/. | ||
23 | * | ||
24 | * This file may also be available under a different license from Cavium. | ||
25 | * Contact Cavium Networks for more information | ||
26 | ***********************license end**************************************/ | ||
27 | |||
28 | #ifndef __CVMX_AGL_DEFS_H__ | ||
29 | #define __CVMX_AGL_DEFS_H__ | ||
30 | |||
31 | #define CVMX_AGL_GMX_BAD_REG \ | ||
32 | CVMX_ADD_IO_SEG(0x00011800E0000518ull) | ||
33 | #define CVMX_AGL_GMX_BIST \ | ||
34 | CVMX_ADD_IO_SEG(0x00011800E0000400ull) | ||
35 | #define CVMX_AGL_GMX_DRV_CTL \ | ||
36 | CVMX_ADD_IO_SEG(0x00011800E00007F0ull) | ||
37 | #define CVMX_AGL_GMX_INF_MODE \ | ||
38 | CVMX_ADD_IO_SEG(0x00011800E00007F8ull) | ||
39 | #define CVMX_AGL_GMX_PRTX_CFG(offset) \ | ||
40 | CVMX_ADD_IO_SEG(0x00011800E0000010ull + (((offset) & 1) * 2048)) | ||
41 | #define CVMX_AGL_GMX_RXX_ADR_CAM0(offset) \ | ||
42 | CVMX_ADD_IO_SEG(0x00011800E0000180ull + (((offset) & 1) * 2048)) | ||
43 | #define CVMX_AGL_GMX_RXX_ADR_CAM1(offset) \ | ||
44 | CVMX_ADD_IO_SEG(0x00011800E0000188ull + (((offset) & 1) * 2048)) | ||
45 | #define CVMX_AGL_GMX_RXX_ADR_CAM2(offset) \ | ||
46 | CVMX_ADD_IO_SEG(0x00011800E0000190ull + (((offset) & 1) * 2048)) | ||
47 | #define CVMX_AGL_GMX_RXX_ADR_CAM3(offset) \ | ||
48 | CVMX_ADD_IO_SEG(0x00011800E0000198ull + (((offset) & 1) * 2048)) | ||
49 | #define CVMX_AGL_GMX_RXX_ADR_CAM4(offset) \ | ||
50 | CVMX_ADD_IO_SEG(0x00011800E00001A0ull + (((offset) & 1) * 2048)) | ||
51 | #define CVMX_AGL_GMX_RXX_ADR_CAM5(offset) \ | ||
52 | CVMX_ADD_IO_SEG(0x00011800E00001A8ull + (((offset) & 1) * 2048)) | ||
53 | #define CVMX_AGL_GMX_RXX_ADR_CAM_EN(offset) \ | ||
54 | CVMX_ADD_IO_SEG(0x00011800E0000108ull + (((offset) & 1) * 2048)) | ||
55 | #define CVMX_AGL_GMX_RXX_ADR_CTL(offset) \ | ||
56 | CVMX_ADD_IO_SEG(0x00011800E0000100ull + (((offset) & 1) * 2048)) | ||
57 | #define CVMX_AGL_GMX_RXX_DECISION(offset) \ | ||
58 | CVMX_ADD_IO_SEG(0x00011800E0000040ull + (((offset) & 1) * 2048)) | ||
59 | #define CVMX_AGL_GMX_RXX_FRM_CHK(offset) \ | ||
60 | CVMX_ADD_IO_SEG(0x00011800E0000020ull + (((offset) & 1) * 2048)) | ||
61 | #define CVMX_AGL_GMX_RXX_FRM_CTL(offset) \ | ||
62 | CVMX_ADD_IO_SEG(0x00011800E0000018ull + (((offset) & 1) * 2048)) | ||
63 | #define CVMX_AGL_GMX_RXX_FRM_MAX(offset) \ | ||
64 | CVMX_ADD_IO_SEG(0x00011800E0000030ull + (((offset) & 1) * 2048)) | ||
65 | #define CVMX_AGL_GMX_RXX_FRM_MIN(offset) \ | ||
66 | CVMX_ADD_IO_SEG(0x00011800E0000028ull + (((offset) & 1) * 2048)) | ||
67 | #define CVMX_AGL_GMX_RXX_IFG(offset) \ | ||
68 | CVMX_ADD_IO_SEG(0x00011800E0000058ull + (((offset) & 1) * 2048)) | ||
69 | #define CVMX_AGL_GMX_RXX_INT_EN(offset) \ | ||
70 | CVMX_ADD_IO_SEG(0x00011800E0000008ull + (((offset) & 1) * 2048)) | ||
71 | #define CVMX_AGL_GMX_RXX_INT_REG(offset) \ | ||
72 | CVMX_ADD_IO_SEG(0x00011800E0000000ull + (((offset) & 1) * 2048)) | ||
73 | #define CVMX_AGL_GMX_RXX_JABBER(offset) \ | ||
74 | CVMX_ADD_IO_SEG(0x00011800E0000038ull + (((offset) & 1) * 2048)) | ||
75 | #define CVMX_AGL_GMX_RXX_PAUSE_DROP_TIME(offset) \ | ||
76 | CVMX_ADD_IO_SEG(0x00011800E0000068ull + (((offset) & 1) * 2048)) | ||
77 | #define CVMX_AGL_GMX_RXX_STATS_CTL(offset) \ | ||
78 | CVMX_ADD_IO_SEG(0x00011800E0000050ull + (((offset) & 1) * 2048)) | ||
79 | #define CVMX_AGL_GMX_RXX_STATS_OCTS(offset) \ | ||
80 | CVMX_ADD_IO_SEG(0x00011800E0000088ull + (((offset) & 1) * 2048)) | ||
81 | #define CVMX_AGL_GMX_RXX_STATS_OCTS_CTL(offset) \ | ||
82 | CVMX_ADD_IO_SEG(0x00011800E0000098ull + (((offset) & 1) * 2048)) | ||
83 | #define CVMX_AGL_GMX_RXX_STATS_OCTS_DMAC(offset) \ | ||
84 | CVMX_ADD_IO_SEG(0x00011800E00000A8ull + (((offset) & 1) * 2048)) | ||
85 | #define CVMX_AGL_GMX_RXX_STATS_OCTS_DRP(offset) \ | ||
86 | CVMX_ADD_IO_SEG(0x00011800E00000B8ull + (((offset) & 1) * 2048)) | ||
87 | #define CVMX_AGL_GMX_RXX_STATS_PKTS(offset) \ | ||
88 | CVMX_ADD_IO_SEG(0x00011800E0000080ull + (((offset) & 1) * 2048)) | ||
89 | #define CVMX_AGL_GMX_RXX_STATS_PKTS_BAD(offset) \ | ||
90 | CVMX_ADD_IO_SEG(0x00011800E00000C0ull + (((offset) & 1) * 2048)) | ||
91 | #define CVMX_AGL_GMX_RXX_STATS_PKTS_CTL(offset) \ | ||
92 | CVMX_ADD_IO_SEG(0x00011800E0000090ull + (((offset) & 1) * 2048)) | ||
93 | #define CVMX_AGL_GMX_RXX_STATS_PKTS_DMAC(offset) \ | ||
94 | CVMX_ADD_IO_SEG(0x00011800E00000A0ull + (((offset) & 1) * 2048)) | ||
95 | #define CVMX_AGL_GMX_RXX_STATS_PKTS_DRP(offset) \ | ||
96 | CVMX_ADD_IO_SEG(0x00011800E00000B0ull + (((offset) & 1) * 2048)) | ||
97 | #define CVMX_AGL_GMX_RXX_UDD_SKP(offset) \ | ||
98 | CVMX_ADD_IO_SEG(0x00011800E0000048ull + (((offset) & 1) * 2048)) | ||
99 | #define CVMX_AGL_GMX_RX_BP_DROPX(offset) \ | ||
100 | CVMX_ADD_IO_SEG(0x00011800E0000420ull + (((offset) & 1) * 8)) | ||
101 | #define CVMX_AGL_GMX_RX_BP_OFFX(offset) \ | ||
102 | CVMX_ADD_IO_SEG(0x00011800E0000460ull + (((offset) & 1) * 8)) | ||
103 | #define CVMX_AGL_GMX_RX_BP_ONX(offset) \ | ||
104 | CVMX_ADD_IO_SEG(0x00011800E0000440ull + (((offset) & 1) * 8)) | ||
105 | #define CVMX_AGL_GMX_RX_PRT_INFO \ | ||
106 | CVMX_ADD_IO_SEG(0x00011800E00004E8ull) | ||
107 | #define CVMX_AGL_GMX_RX_TX_STATUS \ | ||
108 | CVMX_ADD_IO_SEG(0x00011800E00007E8ull) | ||
109 | #define CVMX_AGL_GMX_SMACX(offset) \ | ||
110 | CVMX_ADD_IO_SEG(0x00011800E0000230ull + (((offset) & 1) * 2048)) | ||
111 | #define CVMX_AGL_GMX_STAT_BP \ | ||
112 | CVMX_ADD_IO_SEG(0x00011800E0000520ull) | ||
113 | #define CVMX_AGL_GMX_TXX_APPEND(offset) \ | ||
114 | CVMX_ADD_IO_SEG(0x00011800E0000218ull + (((offset) & 1) * 2048)) | ||
115 | #define CVMX_AGL_GMX_TXX_CTL(offset) \ | ||
116 | CVMX_ADD_IO_SEG(0x00011800E0000270ull + (((offset) & 1) * 2048)) | ||
117 | #define CVMX_AGL_GMX_TXX_MIN_PKT(offset) \ | ||
118 | CVMX_ADD_IO_SEG(0x00011800E0000240ull + (((offset) & 1) * 2048)) | ||
119 | #define CVMX_AGL_GMX_TXX_PAUSE_PKT_INTERVAL(offset) \ | ||
120 | CVMX_ADD_IO_SEG(0x00011800E0000248ull + (((offset) & 1) * 2048)) | ||
121 | #define CVMX_AGL_GMX_TXX_PAUSE_PKT_TIME(offset) \ | ||
122 | CVMX_ADD_IO_SEG(0x00011800E0000238ull + (((offset) & 1) * 2048)) | ||
123 | #define CVMX_AGL_GMX_TXX_PAUSE_TOGO(offset) \ | ||
124 | CVMX_ADD_IO_SEG(0x00011800E0000258ull + (((offset) & 1) * 2048)) | ||
125 | #define CVMX_AGL_GMX_TXX_PAUSE_ZERO(offset) \ | ||
126 | CVMX_ADD_IO_SEG(0x00011800E0000260ull + (((offset) & 1) * 2048)) | ||
127 | #define CVMX_AGL_GMX_TXX_SOFT_PAUSE(offset) \ | ||
128 | CVMX_ADD_IO_SEG(0x00011800E0000250ull + (((offset) & 1) * 2048)) | ||
129 | #define CVMX_AGL_GMX_TXX_STAT0(offset) \ | ||
130 | CVMX_ADD_IO_SEG(0x00011800E0000280ull + (((offset) & 1) * 2048)) | ||
131 | #define CVMX_AGL_GMX_TXX_STAT1(offset) \ | ||
132 | CVMX_ADD_IO_SEG(0x00011800E0000288ull + (((offset) & 1) * 2048)) | ||
133 | #define CVMX_AGL_GMX_TXX_STAT2(offset) \ | ||
134 | CVMX_ADD_IO_SEG(0x00011800E0000290ull + (((offset) & 1) * 2048)) | ||
135 | #define CVMX_AGL_GMX_TXX_STAT3(offset) \ | ||
136 | CVMX_ADD_IO_SEG(0x00011800E0000298ull + (((offset) & 1) * 2048)) | ||
137 | #define CVMX_AGL_GMX_TXX_STAT4(offset) \ | ||
138 | CVMX_ADD_IO_SEG(0x00011800E00002A0ull + (((offset) & 1) * 2048)) | ||
139 | #define CVMX_AGL_GMX_TXX_STAT5(offset) \ | ||
140 | CVMX_ADD_IO_SEG(0x00011800E00002A8ull + (((offset) & 1) * 2048)) | ||
141 | #define CVMX_AGL_GMX_TXX_STAT6(offset) \ | ||
142 | CVMX_ADD_IO_SEG(0x00011800E00002B0ull + (((offset) & 1) * 2048)) | ||
143 | #define CVMX_AGL_GMX_TXX_STAT7(offset) \ | ||
144 | CVMX_ADD_IO_SEG(0x00011800E00002B8ull + (((offset) & 1) * 2048)) | ||
145 | #define CVMX_AGL_GMX_TXX_STAT8(offset) \ | ||
146 | CVMX_ADD_IO_SEG(0x00011800E00002C0ull + (((offset) & 1) * 2048)) | ||
147 | #define CVMX_AGL_GMX_TXX_STAT9(offset) \ | ||
148 | CVMX_ADD_IO_SEG(0x00011800E00002C8ull + (((offset) & 1) * 2048)) | ||
149 | #define CVMX_AGL_GMX_TXX_STATS_CTL(offset) \ | ||
150 | CVMX_ADD_IO_SEG(0x00011800E0000268ull + (((offset) & 1) * 2048)) | ||
151 | #define CVMX_AGL_GMX_TXX_THRESH(offset) \ | ||
152 | CVMX_ADD_IO_SEG(0x00011800E0000210ull + (((offset) & 1) * 2048)) | ||
153 | #define CVMX_AGL_GMX_TX_BP \ | ||
154 | CVMX_ADD_IO_SEG(0x00011800E00004D0ull) | ||
155 | #define CVMX_AGL_GMX_TX_COL_ATTEMPT \ | ||
156 | CVMX_ADD_IO_SEG(0x00011800E0000498ull) | ||
157 | #define CVMX_AGL_GMX_TX_IFG \ | ||
158 | CVMX_ADD_IO_SEG(0x00011800E0000488ull) | ||
159 | #define CVMX_AGL_GMX_TX_INT_EN \ | ||
160 | CVMX_ADD_IO_SEG(0x00011800E0000508ull) | ||
161 | #define CVMX_AGL_GMX_TX_INT_REG \ | ||
162 | CVMX_ADD_IO_SEG(0x00011800E0000500ull) | ||
163 | #define CVMX_AGL_GMX_TX_JAM \ | ||
164 | CVMX_ADD_IO_SEG(0x00011800E0000490ull) | ||
165 | #define CVMX_AGL_GMX_TX_LFSR \ | ||
166 | CVMX_ADD_IO_SEG(0x00011800E00004F8ull) | ||
167 | #define CVMX_AGL_GMX_TX_OVR_BP \ | ||
168 | CVMX_ADD_IO_SEG(0x00011800E00004C8ull) | ||
169 | #define CVMX_AGL_GMX_TX_PAUSE_PKT_DMAC \ | ||
170 | CVMX_ADD_IO_SEG(0x00011800E00004A0ull) | ||
171 | #define CVMX_AGL_GMX_TX_PAUSE_PKT_TYPE \ | ||
172 | CVMX_ADD_IO_SEG(0x00011800E00004A8ull) | ||
173 | |||
174 | union cvmx_agl_gmx_bad_reg { | ||
175 | uint64_t u64; | ||
176 | struct cvmx_agl_gmx_bad_reg_s { | ||
177 | uint64_t reserved_38_63:26; | ||
178 | uint64_t txpsh1:1; | ||
179 | uint64_t txpop1:1; | ||
180 | uint64_t ovrflw1:1; | ||
181 | uint64_t txpsh:1; | ||
182 | uint64_t txpop:1; | ||
183 | uint64_t ovrflw:1; | ||
184 | uint64_t reserved_27_31:5; | ||
185 | uint64_t statovr:1; | ||
186 | uint64_t reserved_23_25:3; | ||
187 | uint64_t loststat:1; | ||
188 | uint64_t reserved_4_21:18; | ||
189 | uint64_t out_ovr:2; | ||
190 | uint64_t reserved_0_1:2; | ||
191 | } s; | ||
192 | struct cvmx_agl_gmx_bad_reg_s cn52xx; | ||
193 | struct cvmx_agl_gmx_bad_reg_s cn52xxp1; | ||
194 | struct cvmx_agl_gmx_bad_reg_cn56xx { | ||
195 | uint64_t reserved_35_63:29; | ||
196 | uint64_t txpsh:1; | ||
197 | uint64_t txpop:1; | ||
198 | uint64_t ovrflw:1; | ||
199 | uint64_t reserved_27_31:5; | ||
200 | uint64_t statovr:1; | ||
201 | uint64_t reserved_23_25:3; | ||
202 | uint64_t loststat:1; | ||
203 | uint64_t reserved_3_21:19; | ||
204 | uint64_t out_ovr:1; | ||
205 | uint64_t reserved_0_1:2; | ||
206 | } cn56xx; | ||
207 | struct cvmx_agl_gmx_bad_reg_cn56xx cn56xxp1; | ||
208 | }; | ||
209 | |||
210 | union cvmx_agl_gmx_bist { | ||
211 | uint64_t u64; | ||
212 | struct cvmx_agl_gmx_bist_s { | ||
213 | uint64_t reserved_10_63:54; | ||
214 | uint64_t status:10; | ||
215 | } s; | ||
216 | struct cvmx_agl_gmx_bist_s cn52xx; | ||
217 | struct cvmx_agl_gmx_bist_s cn52xxp1; | ||
218 | struct cvmx_agl_gmx_bist_s cn56xx; | ||
219 | struct cvmx_agl_gmx_bist_s cn56xxp1; | ||
220 | }; | ||
221 | |||
222 | union cvmx_agl_gmx_drv_ctl { | ||
223 | uint64_t u64; | ||
224 | struct cvmx_agl_gmx_drv_ctl_s { | ||
225 | uint64_t reserved_49_63:15; | ||
226 | uint64_t byp_en1:1; | ||
227 | uint64_t reserved_45_47:3; | ||
228 | uint64_t pctl1:5; | ||
229 | uint64_t reserved_37_39:3; | ||
230 | uint64_t nctl1:5; | ||
231 | uint64_t reserved_17_31:15; | ||
232 | uint64_t byp_en:1; | ||
233 | uint64_t reserved_13_15:3; | ||
234 | uint64_t pctl:5; | ||
235 | uint64_t reserved_5_7:3; | ||
236 | uint64_t nctl:5; | ||
237 | } s; | ||
238 | struct cvmx_agl_gmx_drv_ctl_s cn52xx; | ||
239 | struct cvmx_agl_gmx_drv_ctl_s cn52xxp1; | ||
240 | struct cvmx_agl_gmx_drv_ctl_cn56xx { | ||
241 | uint64_t reserved_17_63:47; | ||
242 | uint64_t byp_en:1; | ||
243 | uint64_t reserved_13_15:3; | ||
244 | uint64_t pctl:5; | ||
245 | uint64_t reserved_5_7:3; | ||
246 | uint64_t nctl:5; | ||
247 | } cn56xx; | ||
248 | struct cvmx_agl_gmx_drv_ctl_cn56xx cn56xxp1; | ||
249 | }; | ||
250 | |||
251 | union cvmx_agl_gmx_inf_mode { | ||
252 | uint64_t u64; | ||
253 | struct cvmx_agl_gmx_inf_mode_s { | ||
254 | uint64_t reserved_2_63:62; | ||
255 | uint64_t en:1; | ||
256 | uint64_t reserved_0_0:1; | ||
257 | } s; | ||
258 | struct cvmx_agl_gmx_inf_mode_s cn52xx; | ||
259 | struct cvmx_agl_gmx_inf_mode_s cn52xxp1; | ||
260 | struct cvmx_agl_gmx_inf_mode_s cn56xx; | ||
261 | struct cvmx_agl_gmx_inf_mode_s cn56xxp1; | ||
262 | }; | ||
263 | |||
264 | union cvmx_agl_gmx_prtx_cfg { | ||
265 | uint64_t u64; | ||
266 | struct cvmx_agl_gmx_prtx_cfg_s { | ||
267 | uint64_t reserved_6_63:58; | ||
268 | uint64_t tx_en:1; | ||
269 | uint64_t rx_en:1; | ||
270 | uint64_t slottime:1; | ||
271 | uint64_t duplex:1; | ||
272 | uint64_t speed:1; | ||
273 | uint64_t en:1; | ||
274 | } s; | ||
275 | struct cvmx_agl_gmx_prtx_cfg_s cn52xx; | ||
276 | struct cvmx_agl_gmx_prtx_cfg_s cn52xxp1; | ||
277 | struct cvmx_agl_gmx_prtx_cfg_s cn56xx; | ||
278 | struct cvmx_agl_gmx_prtx_cfg_s cn56xxp1; | ||
279 | }; | ||
280 | |||
281 | union cvmx_agl_gmx_rxx_adr_cam0 { | ||
282 | uint64_t u64; | ||
283 | struct cvmx_agl_gmx_rxx_adr_cam0_s { | ||
284 | uint64_t adr:64; | ||
285 | } s; | ||
286 | struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xx; | ||
287 | struct cvmx_agl_gmx_rxx_adr_cam0_s cn52xxp1; | ||
288 | struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xx; | ||
289 | struct cvmx_agl_gmx_rxx_adr_cam0_s cn56xxp1; | ||
290 | }; | ||
291 | |||
292 | union cvmx_agl_gmx_rxx_adr_cam1 { | ||
293 | uint64_t u64; | ||
294 | struct cvmx_agl_gmx_rxx_adr_cam1_s { | ||
295 | uint64_t adr:64; | ||
296 | } s; | ||
297 | struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xx; | ||
298 | struct cvmx_agl_gmx_rxx_adr_cam1_s cn52xxp1; | ||
299 | struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xx; | ||
300 | struct cvmx_agl_gmx_rxx_adr_cam1_s cn56xxp1; | ||
301 | }; | ||
302 | |||
303 | union cvmx_agl_gmx_rxx_adr_cam2 { | ||
304 | uint64_t u64; | ||
305 | struct cvmx_agl_gmx_rxx_adr_cam2_s { | ||
306 | uint64_t adr:64; | ||
307 | } s; | ||
308 | struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xx; | ||
309 | struct cvmx_agl_gmx_rxx_adr_cam2_s cn52xxp1; | ||
310 | struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xx; | ||
311 | struct cvmx_agl_gmx_rxx_adr_cam2_s cn56xxp1; | ||
312 | }; | ||
313 | |||
314 | union cvmx_agl_gmx_rxx_adr_cam3 { | ||
315 | uint64_t u64; | ||
316 | struct cvmx_agl_gmx_rxx_adr_cam3_s { | ||
317 | uint64_t adr:64; | ||
318 | } s; | ||
319 | struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xx; | ||
320 | struct cvmx_agl_gmx_rxx_adr_cam3_s cn52xxp1; | ||
321 | struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xx; | ||
322 | struct cvmx_agl_gmx_rxx_adr_cam3_s cn56xxp1; | ||
323 | }; | ||
324 | |||
325 | union cvmx_agl_gmx_rxx_adr_cam4 { | ||
326 | uint64_t u64; | ||
327 | struct cvmx_agl_gmx_rxx_adr_cam4_s { | ||
328 | uint64_t adr:64; | ||
329 | } s; | ||
330 | struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xx; | ||
331 | struct cvmx_agl_gmx_rxx_adr_cam4_s cn52xxp1; | ||
332 | struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xx; | ||
333 | struct cvmx_agl_gmx_rxx_adr_cam4_s cn56xxp1; | ||
334 | }; | ||
335 | |||
336 | union cvmx_agl_gmx_rxx_adr_cam5 { | ||
337 | uint64_t u64; | ||
338 | struct cvmx_agl_gmx_rxx_adr_cam5_s { | ||
339 | uint64_t adr:64; | ||
340 | } s; | ||
341 | struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xx; | ||
342 | struct cvmx_agl_gmx_rxx_adr_cam5_s cn52xxp1; | ||
343 | struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xx; | ||
344 | struct cvmx_agl_gmx_rxx_adr_cam5_s cn56xxp1; | ||
345 | }; | ||
346 | |||
347 | union cvmx_agl_gmx_rxx_adr_cam_en { | ||
348 | uint64_t u64; | ||
349 | struct cvmx_agl_gmx_rxx_adr_cam_en_s { | ||
350 | uint64_t reserved_8_63:56; | ||
351 | uint64_t en:8; | ||
352 | } s; | ||
353 | struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xx; | ||
354 | struct cvmx_agl_gmx_rxx_adr_cam_en_s cn52xxp1; | ||
355 | struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xx; | ||
356 | struct cvmx_agl_gmx_rxx_adr_cam_en_s cn56xxp1; | ||
357 | }; | ||
358 | |||
359 | union cvmx_agl_gmx_rxx_adr_ctl { | ||
360 | uint64_t u64; | ||
361 | struct cvmx_agl_gmx_rxx_adr_ctl_s { | ||
362 | uint64_t reserved_4_63:60; | ||
363 | uint64_t cam_mode:1; | ||
364 | uint64_t mcst:2; | ||
365 | uint64_t bcst:1; | ||
366 | } s; | ||
367 | struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xx; | ||
368 | struct cvmx_agl_gmx_rxx_adr_ctl_s cn52xxp1; | ||
369 | struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xx; | ||
370 | struct cvmx_agl_gmx_rxx_adr_ctl_s cn56xxp1; | ||
371 | }; | ||
372 | |||
373 | union cvmx_agl_gmx_rxx_decision { | ||
374 | uint64_t u64; | ||
375 | struct cvmx_agl_gmx_rxx_decision_s { | ||
376 | uint64_t reserved_5_63:59; | ||
377 | uint64_t cnt:5; | ||
378 | } s; | ||
379 | struct cvmx_agl_gmx_rxx_decision_s cn52xx; | ||
380 | struct cvmx_agl_gmx_rxx_decision_s cn52xxp1; | ||
381 | struct cvmx_agl_gmx_rxx_decision_s cn56xx; | ||
382 | struct cvmx_agl_gmx_rxx_decision_s cn56xxp1; | ||
383 | }; | ||
384 | |||
385 | union cvmx_agl_gmx_rxx_frm_chk { | ||
386 | uint64_t u64; | ||
387 | struct cvmx_agl_gmx_rxx_frm_chk_s { | ||
388 | uint64_t reserved_9_63:55; | ||
389 | uint64_t skperr:1; | ||
390 | uint64_t rcverr:1; | ||
391 | uint64_t lenerr:1; | ||
392 | uint64_t alnerr:1; | ||
393 | uint64_t fcserr:1; | ||
394 | uint64_t jabber:1; | ||
395 | uint64_t maxerr:1; | ||
396 | uint64_t reserved_1_1:1; | ||
397 | uint64_t minerr:1; | ||
398 | } s; | ||
399 | struct cvmx_agl_gmx_rxx_frm_chk_s cn52xx; | ||
400 | struct cvmx_agl_gmx_rxx_frm_chk_s cn52xxp1; | ||
401 | struct cvmx_agl_gmx_rxx_frm_chk_s cn56xx; | ||
402 | struct cvmx_agl_gmx_rxx_frm_chk_s cn56xxp1; | ||
403 | }; | ||
404 | |||
405 | union cvmx_agl_gmx_rxx_frm_ctl { | ||
406 | uint64_t u64; | ||
407 | struct cvmx_agl_gmx_rxx_frm_ctl_s { | ||
408 | uint64_t reserved_10_63:54; | ||
409 | uint64_t pre_align:1; | ||
410 | uint64_t pad_len:1; | ||
411 | uint64_t vlan_len:1; | ||
412 | uint64_t pre_free:1; | ||
413 | uint64_t ctl_smac:1; | ||
414 | uint64_t ctl_mcst:1; | ||
415 | uint64_t ctl_bck:1; | ||
416 | uint64_t ctl_drp:1; | ||
417 | uint64_t pre_strp:1; | ||
418 | uint64_t pre_chk:1; | ||
419 | } s; | ||
420 | struct cvmx_agl_gmx_rxx_frm_ctl_s cn52xx; | ||
421 | struct cvmx_agl_gmx_rxx_frm_ctl_s cn52xxp1; | ||
422 | struct cvmx_agl_gmx_rxx_frm_ctl_s cn56xx; | ||
423 | struct cvmx_agl_gmx_rxx_frm_ctl_s cn56xxp1; | ||
424 | }; | ||
425 | |||
426 | union cvmx_agl_gmx_rxx_frm_max { | ||
427 | uint64_t u64; | ||
428 | struct cvmx_agl_gmx_rxx_frm_max_s { | ||
429 | uint64_t reserved_16_63:48; | ||
430 | uint64_t len:16; | ||
431 | } s; | ||
432 | struct cvmx_agl_gmx_rxx_frm_max_s cn52xx; | ||
433 | struct cvmx_agl_gmx_rxx_frm_max_s cn52xxp1; | ||
434 | struct cvmx_agl_gmx_rxx_frm_max_s cn56xx; | ||
435 | struct cvmx_agl_gmx_rxx_frm_max_s cn56xxp1; | ||
436 | }; | ||
437 | |||
438 | union cvmx_agl_gmx_rxx_frm_min { | ||
439 | uint64_t u64; | ||
440 | struct cvmx_agl_gmx_rxx_frm_min_s { | ||
441 | uint64_t reserved_16_63:48; | ||
442 | uint64_t len:16; | ||
443 | } s; | ||
444 | struct cvmx_agl_gmx_rxx_frm_min_s cn52xx; | ||
445 | struct cvmx_agl_gmx_rxx_frm_min_s cn52xxp1; | ||
446 | struct cvmx_agl_gmx_rxx_frm_min_s cn56xx; | ||
447 | struct cvmx_agl_gmx_rxx_frm_min_s cn56xxp1; | ||
448 | }; | ||
449 | |||
450 | union cvmx_agl_gmx_rxx_ifg { | ||
451 | uint64_t u64; | ||
452 | struct cvmx_agl_gmx_rxx_ifg_s { | ||
453 | uint64_t reserved_4_63:60; | ||
454 | uint64_t ifg:4; | ||
455 | } s; | ||
456 | struct cvmx_agl_gmx_rxx_ifg_s cn52xx; | ||
457 | struct cvmx_agl_gmx_rxx_ifg_s cn52xxp1; | ||
458 | struct cvmx_agl_gmx_rxx_ifg_s cn56xx; | ||
459 | struct cvmx_agl_gmx_rxx_ifg_s cn56xxp1; | ||
460 | }; | ||
461 | |||
462 | union cvmx_agl_gmx_rxx_int_en { | ||
463 | uint64_t u64; | ||
464 | struct cvmx_agl_gmx_rxx_int_en_s { | ||
465 | uint64_t reserved_20_63:44; | ||
466 | uint64_t pause_drp:1; | ||
467 | uint64_t reserved_16_18:3; | ||
468 | uint64_t ifgerr:1; | ||
469 | uint64_t coldet:1; | ||
470 | uint64_t falerr:1; | ||
471 | uint64_t rsverr:1; | ||
472 | uint64_t pcterr:1; | ||
473 | uint64_t ovrerr:1; | ||
474 | uint64_t reserved_9_9:1; | ||
475 | uint64_t skperr:1; | ||
476 | uint64_t rcverr:1; | ||
477 | uint64_t lenerr:1; | ||
478 | uint64_t alnerr:1; | ||
479 | uint64_t fcserr:1; | ||
480 | uint64_t jabber:1; | ||
481 | uint64_t maxerr:1; | ||
482 | uint64_t reserved_1_1:1; | ||
483 | uint64_t minerr:1; | ||
484 | } s; | ||
485 | struct cvmx_agl_gmx_rxx_int_en_s cn52xx; | ||
486 | struct cvmx_agl_gmx_rxx_int_en_s cn52xxp1; | ||
487 | struct cvmx_agl_gmx_rxx_int_en_s cn56xx; | ||
488 | struct cvmx_agl_gmx_rxx_int_en_s cn56xxp1; | ||
489 | }; | ||
490 | |||
491 | union cvmx_agl_gmx_rxx_int_reg { | ||
492 | uint64_t u64; | ||
493 | struct cvmx_agl_gmx_rxx_int_reg_s { | ||
494 | uint64_t reserved_20_63:44; | ||
495 | uint64_t pause_drp:1; | ||
496 | uint64_t reserved_16_18:3; | ||
497 | uint64_t ifgerr:1; | ||
498 | uint64_t coldet:1; | ||
499 | uint64_t falerr:1; | ||
500 | uint64_t rsverr:1; | ||
501 | uint64_t pcterr:1; | ||
502 | uint64_t ovrerr:1; | ||
503 | uint64_t reserved_9_9:1; | ||
504 | uint64_t skperr:1; | ||
505 | uint64_t rcverr:1; | ||
506 | uint64_t lenerr:1; | ||
507 | uint64_t alnerr:1; | ||
508 | uint64_t fcserr:1; | ||
509 | uint64_t jabber:1; | ||
510 | uint64_t maxerr:1; | ||
511 | uint64_t reserved_1_1:1; | ||
512 | uint64_t minerr:1; | ||
513 | } s; | ||
514 | struct cvmx_agl_gmx_rxx_int_reg_s cn52xx; | ||
515 | struct cvmx_agl_gmx_rxx_int_reg_s cn52xxp1; | ||
516 | struct cvmx_agl_gmx_rxx_int_reg_s cn56xx; | ||
517 | struct cvmx_agl_gmx_rxx_int_reg_s cn56xxp1; | ||
518 | }; | ||
519 | |||
520 | union cvmx_agl_gmx_rxx_jabber { | ||
521 | uint64_t u64; | ||
522 | struct cvmx_agl_gmx_rxx_jabber_s { | ||
523 | uint64_t reserved_16_63:48; | ||
524 | uint64_t cnt:16; | ||
525 | } s; | ||
526 | struct cvmx_agl_gmx_rxx_jabber_s cn52xx; | ||
527 | struct cvmx_agl_gmx_rxx_jabber_s cn52xxp1; | ||
528 | struct cvmx_agl_gmx_rxx_jabber_s cn56xx; | ||
529 | struct cvmx_agl_gmx_rxx_jabber_s cn56xxp1; | ||
530 | }; | ||
531 | |||
532 | union cvmx_agl_gmx_rxx_pause_drop_time { | ||
533 | uint64_t u64; | ||
534 | struct cvmx_agl_gmx_rxx_pause_drop_time_s { | ||
535 | uint64_t reserved_16_63:48; | ||
536 | uint64_t status:16; | ||
537 | } s; | ||
538 | struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xx; | ||
539 | struct cvmx_agl_gmx_rxx_pause_drop_time_s cn52xxp1; | ||
540 | struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xx; | ||
541 | struct cvmx_agl_gmx_rxx_pause_drop_time_s cn56xxp1; | ||
542 | }; | ||
543 | |||
544 | union cvmx_agl_gmx_rxx_stats_ctl { | ||
545 | uint64_t u64; | ||
546 | struct cvmx_agl_gmx_rxx_stats_ctl_s { | ||
547 | uint64_t reserved_1_63:63; | ||
548 | uint64_t rd_clr:1; | ||
549 | } s; | ||
550 | struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xx; | ||
551 | struct cvmx_agl_gmx_rxx_stats_ctl_s cn52xxp1; | ||
552 | struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xx; | ||
553 | struct cvmx_agl_gmx_rxx_stats_ctl_s cn56xxp1; | ||
554 | }; | ||
555 | |||
556 | union cvmx_agl_gmx_rxx_stats_octs { | ||
557 | uint64_t u64; | ||
558 | struct cvmx_agl_gmx_rxx_stats_octs_s { | ||
559 | uint64_t reserved_48_63:16; | ||
560 | uint64_t cnt:48; | ||
561 | } s; | ||
562 | struct cvmx_agl_gmx_rxx_stats_octs_s cn52xx; | ||
563 | struct cvmx_agl_gmx_rxx_stats_octs_s cn52xxp1; | ||
564 | struct cvmx_agl_gmx_rxx_stats_octs_s cn56xx; | ||
565 | struct cvmx_agl_gmx_rxx_stats_octs_s cn56xxp1; | ||
566 | }; | ||
567 | |||
568 | union cvmx_agl_gmx_rxx_stats_octs_ctl { | ||
569 | uint64_t u64; | ||
570 | struct cvmx_agl_gmx_rxx_stats_octs_ctl_s { | ||
571 | uint64_t reserved_48_63:16; | ||
572 | uint64_t cnt:48; | ||
573 | } s; | ||
574 | struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xx; | ||
575 | struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn52xxp1; | ||
576 | struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xx; | ||
577 | struct cvmx_agl_gmx_rxx_stats_octs_ctl_s cn56xxp1; | ||
578 | }; | ||
579 | |||
580 | union cvmx_agl_gmx_rxx_stats_octs_dmac { | ||
581 | uint64_t u64; | ||
582 | struct cvmx_agl_gmx_rxx_stats_octs_dmac_s { | ||
583 | uint64_t reserved_48_63:16; | ||
584 | uint64_t cnt:48; | ||
585 | } s; | ||
586 | struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xx; | ||
587 | struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn52xxp1; | ||
588 | struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xx; | ||
589 | struct cvmx_agl_gmx_rxx_stats_octs_dmac_s cn56xxp1; | ||
590 | }; | ||
591 | |||
592 | union cvmx_agl_gmx_rxx_stats_octs_drp { | ||
593 | uint64_t u64; | ||
594 | struct cvmx_agl_gmx_rxx_stats_octs_drp_s { | ||
595 | uint64_t reserved_48_63:16; | ||
596 | uint64_t cnt:48; | ||
597 | } s; | ||
598 | struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xx; | ||
599 | struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn52xxp1; | ||
600 | struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xx; | ||
601 | struct cvmx_agl_gmx_rxx_stats_octs_drp_s cn56xxp1; | ||
602 | }; | ||
603 | |||
604 | union cvmx_agl_gmx_rxx_stats_pkts { | ||
605 | uint64_t u64; | ||
606 | struct cvmx_agl_gmx_rxx_stats_pkts_s { | ||
607 | uint64_t reserved_32_63:32; | ||
608 | uint64_t cnt:32; | ||
609 | } s; | ||
610 | struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xx; | ||
611 | struct cvmx_agl_gmx_rxx_stats_pkts_s cn52xxp1; | ||
612 | struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xx; | ||
613 | struct cvmx_agl_gmx_rxx_stats_pkts_s cn56xxp1; | ||
614 | }; | ||
615 | |||
616 | union cvmx_agl_gmx_rxx_stats_pkts_bad { | ||
617 | uint64_t u64; | ||
618 | struct cvmx_agl_gmx_rxx_stats_pkts_bad_s { | ||
619 | uint64_t reserved_32_63:32; | ||
620 | uint64_t cnt:32; | ||
621 | } s; | ||
622 | struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xx; | ||
623 | struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn52xxp1; | ||
624 | struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xx; | ||
625 | struct cvmx_agl_gmx_rxx_stats_pkts_bad_s cn56xxp1; | ||
626 | }; | ||
627 | |||
628 | union cvmx_agl_gmx_rxx_stats_pkts_ctl { | ||
629 | uint64_t u64; | ||
630 | struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s { | ||
631 | uint64_t reserved_32_63:32; | ||
632 | uint64_t cnt:32; | ||
633 | } s; | ||
634 | struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xx; | ||
635 | struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn52xxp1; | ||
636 | struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xx; | ||
637 | struct cvmx_agl_gmx_rxx_stats_pkts_ctl_s cn56xxp1; | ||
638 | }; | ||
639 | |||
640 | union cvmx_agl_gmx_rxx_stats_pkts_dmac { | ||
641 | uint64_t u64; | ||
642 | struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s { | ||
643 | uint64_t reserved_32_63:32; | ||
644 | uint64_t cnt:32; | ||
645 | } s; | ||
646 | struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xx; | ||
647 | struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn52xxp1; | ||
648 | struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xx; | ||
649 | struct cvmx_agl_gmx_rxx_stats_pkts_dmac_s cn56xxp1; | ||
650 | }; | ||
651 | |||
652 | union cvmx_agl_gmx_rxx_stats_pkts_drp { | ||
653 | uint64_t u64; | ||
654 | struct cvmx_agl_gmx_rxx_stats_pkts_drp_s { | ||
655 | uint64_t reserved_32_63:32; | ||
656 | uint64_t cnt:32; | ||
657 | } s; | ||
658 | struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xx; | ||
659 | struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn52xxp1; | ||
660 | struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xx; | ||
661 | struct cvmx_agl_gmx_rxx_stats_pkts_drp_s cn56xxp1; | ||
662 | }; | ||
663 | |||
664 | union cvmx_agl_gmx_rxx_udd_skp { | ||
665 | uint64_t u64; | ||
666 | struct cvmx_agl_gmx_rxx_udd_skp_s { | ||
667 | uint64_t reserved_9_63:55; | ||
668 | uint64_t fcssel:1; | ||
669 | uint64_t reserved_7_7:1; | ||
670 | uint64_t len:7; | ||
671 | } s; | ||
672 | struct cvmx_agl_gmx_rxx_udd_skp_s cn52xx; | ||
673 | struct cvmx_agl_gmx_rxx_udd_skp_s cn52xxp1; | ||
674 | struct cvmx_agl_gmx_rxx_udd_skp_s cn56xx; | ||
675 | struct cvmx_agl_gmx_rxx_udd_skp_s cn56xxp1; | ||
676 | }; | ||
677 | |||
678 | union cvmx_agl_gmx_rx_bp_dropx { | ||
679 | uint64_t u64; | ||
680 | struct cvmx_agl_gmx_rx_bp_dropx_s { | ||
681 | uint64_t reserved_6_63:58; | ||
682 | uint64_t mark:6; | ||
683 | } s; | ||
684 | struct cvmx_agl_gmx_rx_bp_dropx_s cn52xx; | ||
685 | struct cvmx_agl_gmx_rx_bp_dropx_s cn52xxp1; | ||
686 | struct cvmx_agl_gmx_rx_bp_dropx_s cn56xx; | ||
687 | struct cvmx_agl_gmx_rx_bp_dropx_s cn56xxp1; | ||
688 | }; | ||
689 | |||
690 | union cvmx_agl_gmx_rx_bp_offx { | ||
691 | uint64_t u64; | ||
692 | struct cvmx_agl_gmx_rx_bp_offx_s { | ||
693 | uint64_t reserved_6_63:58; | ||
694 | uint64_t mark:6; | ||
695 | } s; | ||
696 | struct cvmx_agl_gmx_rx_bp_offx_s cn52xx; | ||
697 | struct cvmx_agl_gmx_rx_bp_offx_s cn52xxp1; | ||
698 | struct cvmx_agl_gmx_rx_bp_offx_s cn56xx; | ||
699 | struct cvmx_agl_gmx_rx_bp_offx_s cn56xxp1; | ||
700 | }; | ||
701 | |||
702 | union cvmx_agl_gmx_rx_bp_onx { | ||
703 | uint64_t u64; | ||
704 | struct cvmx_agl_gmx_rx_bp_onx_s { | ||
705 | uint64_t reserved_9_63:55; | ||
706 | uint64_t mark:9; | ||
707 | } s; | ||
708 | struct cvmx_agl_gmx_rx_bp_onx_s cn52xx; | ||
709 | struct cvmx_agl_gmx_rx_bp_onx_s cn52xxp1; | ||
710 | struct cvmx_agl_gmx_rx_bp_onx_s cn56xx; | ||
711 | struct cvmx_agl_gmx_rx_bp_onx_s cn56xxp1; | ||
712 | }; | ||
713 | |||
714 | union cvmx_agl_gmx_rx_prt_info { | ||
715 | uint64_t u64; | ||
716 | struct cvmx_agl_gmx_rx_prt_info_s { | ||
717 | uint64_t reserved_18_63:46; | ||
718 | uint64_t drop:2; | ||
719 | uint64_t reserved_2_15:14; | ||
720 | uint64_t commit:2; | ||
721 | } s; | ||
722 | struct cvmx_agl_gmx_rx_prt_info_s cn52xx; | ||
723 | struct cvmx_agl_gmx_rx_prt_info_s cn52xxp1; | ||
724 | struct cvmx_agl_gmx_rx_prt_info_cn56xx { | ||
725 | uint64_t reserved_17_63:47; | ||
726 | uint64_t drop:1; | ||
727 | uint64_t reserved_1_15:15; | ||
728 | uint64_t commit:1; | ||
729 | } cn56xx; | ||
730 | struct cvmx_agl_gmx_rx_prt_info_cn56xx cn56xxp1; | ||
731 | }; | ||
732 | |||
733 | union cvmx_agl_gmx_rx_tx_status { | ||
734 | uint64_t u64; | ||
735 | struct cvmx_agl_gmx_rx_tx_status_s { | ||
736 | uint64_t reserved_6_63:58; | ||
737 | uint64_t tx:2; | ||
738 | uint64_t reserved_2_3:2; | ||
739 | uint64_t rx:2; | ||
740 | } s; | ||
741 | struct cvmx_agl_gmx_rx_tx_status_s cn52xx; | ||
742 | struct cvmx_agl_gmx_rx_tx_status_s cn52xxp1; | ||
743 | struct cvmx_agl_gmx_rx_tx_status_cn56xx { | ||
744 | uint64_t reserved_5_63:59; | ||
745 | uint64_t tx:1; | ||
746 | uint64_t reserved_1_3:3; | ||
747 | uint64_t rx:1; | ||
748 | } cn56xx; | ||
749 | struct cvmx_agl_gmx_rx_tx_status_cn56xx cn56xxp1; | ||
750 | }; | ||
751 | |||
752 | union cvmx_agl_gmx_smacx { | ||
753 | uint64_t u64; | ||
754 | struct cvmx_agl_gmx_smacx_s { | ||
755 | uint64_t reserved_48_63:16; | ||
756 | uint64_t smac:48; | ||
757 | } s; | ||
758 | struct cvmx_agl_gmx_smacx_s cn52xx; | ||
759 | struct cvmx_agl_gmx_smacx_s cn52xxp1; | ||
760 | struct cvmx_agl_gmx_smacx_s cn56xx; | ||
761 | struct cvmx_agl_gmx_smacx_s cn56xxp1; | ||
762 | }; | ||
763 | |||
764 | union cvmx_agl_gmx_stat_bp { | ||
765 | uint64_t u64; | ||
766 | struct cvmx_agl_gmx_stat_bp_s { | ||
767 | uint64_t reserved_17_63:47; | ||
768 | uint64_t bp:1; | ||
769 | uint64_t cnt:16; | ||
770 | } s; | ||
771 | struct cvmx_agl_gmx_stat_bp_s cn52xx; | ||
772 | struct cvmx_agl_gmx_stat_bp_s cn52xxp1; | ||
773 | struct cvmx_agl_gmx_stat_bp_s cn56xx; | ||
774 | struct cvmx_agl_gmx_stat_bp_s cn56xxp1; | ||
775 | }; | ||
776 | |||
777 | union cvmx_agl_gmx_txx_append { | ||
778 | uint64_t u64; | ||
779 | struct cvmx_agl_gmx_txx_append_s { | ||
780 | uint64_t reserved_4_63:60; | ||
781 | uint64_t force_fcs:1; | ||
782 | uint64_t fcs:1; | ||
783 | uint64_t pad:1; | ||
784 | uint64_t preamble:1; | ||
785 | } s; | ||
786 | struct cvmx_agl_gmx_txx_append_s cn52xx; | ||
787 | struct cvmx_agl_gmx_txx_append_s cn52xxp1; | ||
788 | struct cvmx_agl_gmx_txx_append_s cn56xx; | ||
789 | struct cvmx_agl_gmx_txx_append_s cn56xxp1; | ||
790 | }; | ||
791 | |||
792 | union cvmx_agl_gmx_txx_ctl { | ||
793 | uint64_t u64; | ||
794 | struct cvmx_agl_gmx_txx_ctl_s { | ||
795 | uint64_t reserved_2_63:62; | ||
796 | uint64_t xsdef_en:1; | ||
797 | uint64_t xscol_en:1; | ||
798 | } s; | ||
799 | struct cvmx_agl_gmx_txx_ctl_s cn52xx; | ||
800 | struct cvmx_agl_gmx_txx_ctl_s cn52xxp1; | ||
801 | struct cvmx_agl_gmx_txx_ctl_s cn56xx; | ||
802 | struct cvmx_agl_gmx_txx_ctl_s cn56xxp1; | ||
803 | }; | ||
804 | |||
805 | union cvmx_agl_gmx_txx_min_pkt { | ||
806 | uint64_t u64; | ||
807 | struct cvmx_agl_gmx_txx_min_pkt_s { | ||
808 | uint64_t reserved_8_63:56; | ||
809 | uint64_t min_size:8; | ||
810 | } s; | ||
811 | struct cvmx_agl_gmx_txx_min_pkt_s cn52xx; | ||
812 | struct cvmx_agl_gmx_txx_min_pkt_s cn52xxp1; | ||
813 | struct cvmx_agl_gmx_txx_min_pkt_s cn56xx; | ||
814 | struct cvmx_agl_gmx_txx_min_pkt_s cn56xxp1; | ||
815 | }; | ||
816 | |||
817 | union cvmx_agl_gmx_txx_pause_pkt_interval { | ||
818 | uint64_t u64; | ||
819 | struct cvmx_agl_gmx_txx_pause_pkt_interval_s { | ||
820 | uint64_t reserved_16_63:48; | ||
821 | uint64_t interval:16; | ||
822 | } s; | ||
823 | struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xx; | ||
824 | struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn52xxp1; | ||
825 | struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xx; | ||
826 | struct cvmx_agl_gmx_txx_pause_pkt_interval_s cn56xxp1; | ||
827 | }; | ||
828 | |||
829 | union cvmx_agl_gmx_txx_pause_pkt_time { | ||
830 | uint64_t u64; | ||
831 | struct cvmx_agl_gmx_txx_pause_pkt_time_s { | ||
832 | uint64_t reserved_16_63:48; | ||
833 | uint64_t time:16; | ||
834 | } s; | ||
835 | struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xx; | ||
836 | struct cvmx_agl_gmx_txx_pause_pkt_time_s cn52xxp1; | ||
837 | struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xx; | ||
838 | struct cvmx_agl_gmx_txx_pause_pkt_time_s cn56xxp1; | ||
839 | }; | ||
840 | |||
841 | union cvmx_agl_gmx_txx_pause_togo { | ||
842 | uint64_t u64; | ||
843 | struct cvmx_agl_gmx_txx_pause_togo_s { | ||
844 | uint64_t reserved_16_63:48; | ||
845 | uint64_t time:16; | ||
846 | } s; | ||
847 | struct cvmx_agl_gmx_txx_pause_togo_s cn52xx; | ||
848 | struct cvmx_agl_gmx_txx_pause_togo_s cn52xxp1; | ||
849 | struct cvmx_agl_gmx_txx_pause_togo_s cn56xx; | ||
850 | struct cvmx_agl_gmx_txx_pause_togo_s cn56xxp1; | ||
851 | }; | ||
852 | |||
853 | union cvmx_agl_gmx_txx_pause_zero { | ||
854 | uint64_t u64; | ||
855 | struct cvmx_agl_gmx_txx_pause_zero_s { | ||
856 | uint64_t reserved_1_63:63; | ||
857 | uint64_t send:1; | ||
858 | } s; | ||
859 | struct cvmx_agl_gmx_txx_pause_zero_s cn52xx; | ||
860 | struct cvmx_agl_gmx_txx_pause_zero_s cn52xxp1; | ||
861 | struct cvmx_agl_gmx_txx_pause_zero_s cn56xx; | ||
862 | struct cvmx_agl_gmx_txx_pause_zero_s cn56xxp1; | ||
863 | }; | ||
864 | |||
865 | union cvmx_agl_gmx_txx_soft_pause { | ||
866 | uint64_t u64; | ||
867 | struct cvmx_agl_gmx_txx_soft_pause_s { | ||
868 | uint64_t reserved_16_63:48; | ||
869 | uint64_t time:16; | ||
870 | } s; | ||
871 | struct cvmx_agl_gmx_txx_soft_pause_s cn52xx; | ||
872 | struct cvmx_agl_gmx_txx_soft_pause_s cn52xxp1; | ||
873 | struct cvmx_agl_gmx_txx_soft_pause_s cn56xx; | ||
874 | struct cvmx_agl_gmx_txx_soft_pause_s cn56xxp1; | ||
875 | }; | ||
876 | |||
877 | union cvmx_agl_gmx_txx_stat0 { | ||
878 | uint64_t u64; | ||
879 | struct cvmx_agl_gmx_txx_stat0_s { | ||
880 | uint64_t xsdef:32; | ||
881 | uint64_t xscol:32; | ||
882 | } s; | ||
883 | struct cvmx_agl_gmx_txx_stat0_s cn52xx; | ||
884 | struct cvmx_agl_gmx_txx_stat0_s cn52xxp1; | ||
885 | struct cvmx_agl_gmx_txx_stat0_s cn56xx; | ||
886 | struct cvmx_agl_gmx_txx_stat0_s cn56xxp1; | ||
887 | }; | ||
888 | |||
889 | union cvmx_agl_gmx_txx_stat1 { | ||
890 | uint64_t u64; | ||
891 | struct cvmx_agl_gmx_txx_stat1_s { | ||
892 | uint64_t scol:32; | ||
893 | uint64_t mcol:32; | ||
894 | } s; | ||
895 | struct cvmx_agl_gmx_txx_stat1_s cn52xx; | ||
896 | struct cvmx_agl_gmx_txx_stat1_s cn52xxp1; | ||
897 | struct cvmx_agl_gmx_txx_stat1_s cn56xx; | ||
898 | struct cvmx_agl_gmx_txx_stat1_s cn56xxp1; | ||
899 | }; | ||
900 | |||
901 | union cvmx_agl_gmx_txx_stat2 { | ||
902 | uint64_t u64; | ||
903 | struct cvmx_agl_gmx_txx_stat2_s { | ||
904 | uint64_t reserved_48_63:16; | ||
905 | uint64_t octs:48; | ||
906 | } s; | ||
907 | struct cvmx_agl_gmx_txx_stat2_s cn52xx; | ||
908 | struct cvmx_agl_gmx_txx_stat2_s cn52xxp1; | ||
909 | struct cvmx_agl_gmx_txx_stat2_s cn56xx; | ||
910 | struct cvmx_agl_gmx_txx_stat2_s cn56xxp1; | ||
911 | }; | ||
912 | |||
913 | union cvmx_agl_gmx_txx_stat3 { | ||
914 | uint64_t u64; | ||
915 | struct cvmx_agl_gmx_txx_stat3_s { | ||
916 | uint64_t reserved_32_63:32; | ||
917 | uint64_t pkts:32; | ||
918 | } s; | ||
919 | struct cvmx_agl_gmx_txx_stat3_s cn52xx; | ||
920 | struct cvmx_agl_gmx_txx_stat3_s cn52xxp1; | ||
921 | struct cvmx_agl_gmx_txx_stat3_s cn56xx; | ||
922 | struct cvmx_agl_gmx_txx_stat3_s cn56xxp1; | ||
923 | }; | ||
924 | |||
925 | union cvmx_agl_gmx_txx_stat4 { | ||
926 | uint64_t u64; | ||
927 | struct cvmx_agl_gmx_txx_stat4_s { | ||
928 | uint64_t hist1:32; | ||
929 | uint64_t hist0:32; | ||
930 | } s; | ||
931 | struct cvmx_agl_gmx_txx_stat4_s cn52xx; | ||
932 | struct cvmx_agl_gmx_txx_stat4_s cn52xxp1; | ||
933 | struct cvmx_agl_gmx_txx_stat4_s cn56xx; | ||
934 | struct cvmx_agl_gmx_txx_stat4_s cn56xxp1; | ||
935 | }; | ||
936 | |||
937 | union cvmx_agl_gmx_txx_stat5 { | ||
938 | uint64_t u64; | ||
939 | struct cvmx_agl_gmx_txx_stat5_s { | ||
940 | uint64_t hist3:32; | ||
941 | uint64_t hist2:32; | ||
942 | } s; | ||
943 | struct cvmx_agl_gmx_txx_stat5_s cn52xx; | ||
944 | struct cvmx_agl_gmx_txx_stat5_s cn52xxp1; | ||
945 | struct cvmx_agl_gmx_txx_stat5_s cn56xx; | ||
946 | struct cvmx_agl_gmx_txx_stat5_s cn56xxp1; | ||
947 | }; | ||
948 | |||
949 | union cvmx_agl_gmx_txx_stat6 { | ||
950 | uint64_t u64; | ||
951 | struct cvmx_agl_gmx_txx_stat6_s { | ||
952 | uint64_t hist5:32; | ||
953 | uint64_t hist4:32; | ||
954 | } s; | ||
955 | struct cvmx_agl_gmx_txx_stat6_s cn52xx; | ||
956 | struct cvmx_agl_gmx_txx_stat6_s cn52xxp1; | ||
957 | struct cvmx_agl_gmx_txx_stat6_s cn56xx; | ||
958 | struct cvmx_agl_gmx_txx_stat6_s cn56xxp1; | ||
959 | }; | ||
960 | |||
961 | union cvmx_agl_gmx_txx_stat7 { | ||
962 | uint64_t u64; | ||
963 | struct cvmx_agl_gmx_txx_stat7_s { | ||
964 | uint64_t hist7:32; | ||
965 | uint64_t hist6:32; | ||
966 | } s; | ||
967 | struct cvmx_agl_gmx_txx_stat7_s cn52xx; | ||
968 | struct cvmx_agl_gmx_txx_stat7_s cn52xxp1; | ||
969 | struct cvmx_agl_gmx_txx_stat7_s cn56xx; | ||
970 | struct cvmx_agl_gmx_txx_stat7_s cn56xxp1; | ||
971 | }; | ||
972 | |||
973 | union cvmx_agl_gmx_txx_stat8 { | ||
974 | uint64_t u64; | ||
975 | struct cvmx_agl_gmx_txx_stat8_s { | ||
976 | uint64_t mcst:32; | ||
977 | uint64_t bcst:32; | ||
978 | } s; | ||
979 | struct cvmx_agl_gmx_txx_stat8_s cn52xx; | ||
980 | struct cvmx_agl_gmx_txx_stat8_s cn52xxp1; | ||
981 | struct cvmx_agl_gmx_txx_stat8_s cn56xx; | ||
982 | struct cvmx_agl_gmx_txx_stat8_s cn56xxp1; | ||
983 | }; | ||
984 | |||
985 | union cvmx_agl_gmx_txx_stat9 { | ||
986 | uint64_t u64; | ||
987 | struct cvmx_agl_gmx_txx_stat9_s { | ||
988 | uint64_t undflw:32; | ||
989 | uint64_t ctl:32; | ||
990 | } s; | ||
991 | struct cvmx_agl_gmx_txx_stat9_s cn52xx; | ||
992 | struct cvmx_agl_gmx_txx_stat9_s cn52xxp1; | ||
993 | struct cvmx_agl_gmx_txx_stat9_s cn56xx; | ||
994 | struct cvmx_agl_gmx_txx_stat9_s cn56xxp1; | ||
995 | }; | ||
996 | |||
997 | union cvmx_agl_gmx_txx_stats_ctl { | ||
998 | uint64_t u64; | ||
999 | struct cvmx_agl_gmx_txx_stats_ctl_s { | ||
1000 | uint64_t reserved_1_63:63; | ||
1001 | uint64_t rd_clr:1; | ||
1002 | } s; | ||
1003 | struct cvmx_agl_gmx_txx_stats_ctl_s cn52xx; | ||
1004 | struct cvmx_agl_gmx_txx_stats_ctl_s cn52xxp1; | ||
1005 | struct cvmx_agl_gmx_txx_stats_ctl_s cn56xx; | ||
1006 | struct cvmx_agl_gmx_txx_stats_ctl_s cn56xxp1; | ||
1007 | }; | ||
1008 | |||
1009 | union cvmx_agl_gmx_txx_thresh { | ||
1010 | uint64_t u64; | ||
1011 | struct cvmx_agl_gmx_txx_thresh_s { | ||
1012 | uint64_t reserved_6_63:58; | ||
1013 | uint64_t cnt:6; | ||
1014 | } s; | ||
1015 | struct cvmx_agl_gmx_txx_thresh_s cn52xx; | ||
1016 | struct cvmx_agl_gmx_txx_thresh_s cn52xxp1; | ||
1017 | struct cvmx_agl_gmx_txx_thresh_s cn56xx; | ||
1018 | struct cvmx_agl_gmx_txx_thresh_s cn56xxp1; | ||
1019 | }; | ||
1020 | |||
1021 | union cvmx_agl_gmx_tx_bp { | ||
1022 | uint64_t u64; | ||
1023 | struct cvmx_agl_gmx_tx_bp_s { | ||
1024 | uint64_t reserved_2_63:62; | ||
1025 | uint64_t bp:2; | ||
1026 | } s; | ||
1027 | struct cvmx_agl_gmx_tx_bp_s cn52xx; | ||
1028 | struct cvmx_agl_gmx_tx_bp_s cn52xxp1; | ||
1029 | struct cvmx_agl_gmx_tx_bp_cn56xx { | ||
1030 | uint64_t reserved_1_63:63; | ||
1031 | uint64_t bp:1; | ||
1032 | } cn56xx; | ||
1033 | struct cvmx_agl_gmx_tx_bp_cn56xx cn56xxp1; | ||
1034 | }; | ||
1035 | |||
1036 | union cvmx_agl_gmx_tx_col_attempt { | ||
1037 | uint64_t u64; | ||
1038 | struct cvmx_agl_gmx_tx_col_attempt_s { | ||
1039 | uint64_t reserved_5_63:59; | ||
1040 | uint64_t limit:5; | ||
1041 | } s; | ||
1042 | struct cvmx_agl_gmx_tx_col_attempt_s cn52xx; | ||
1043 | struct cvmx_agl_gmx_tx_col_attempt_s cn52xxp1; | ||
1044 | struct cvmx_agl_gmx_tx_col_attempt_s cn56xx; | ||
1045 | struct cvmx_agl_gmx_tx_col_attempt_s cn56xxp1; | ||
1046 | }; | ||
1047 | |||
1048 | union cvmx_agl_gmx_tx_ifg { | ||
1049 | uint64_t u64; | ||
1050 | struct cvmx_agl_gmx_tx_ifg_s { | ||
1051 | uint64_t reserved_8_63:56; | ||
1052 | uint64_t ifg2:4; | ||
1053 | uint64_t ifg1:4; | ||
1054 | } s; | ||
1055 | struct cvmx_agl_gmx_tx_ifg_s cn52xx; | ||
1056 | struct cvmx_agl_gmx_tx_ifg_s cn52xxp1; | ||
1057 | struct cvmx_agl_gmx_tx_ifg_s cn56xx; | ||
1058 | struct cvmx_agl_gmx_tx_ifg_s cn56xxp1; | ||
1059 | }; | ||
1060 | |||
1061 | union cvmx_agl_gmx_tx_int_en { | ||
1062 | uint64_t u64; | ||
1063 | struct cvmx_agl_gmx_tx_int_en_s { | ||
1064 | uint64_t reserved_18_63:46; | ||
1065 | uint64_t late_col:2; | ||
1066 | uint64_t reserved_14_15:2; | ||
1067 | uint64_t xsdef:2; | ||
1068 | uint64_t reserved_10_11:2; | ||
1069 | uint64_t xscol:2; | ||
1070 | uint64_t reserved_4_7:4; | ||
1071 | uint64_t undflw:2; | ||
1072 | uint64_t reserved_1_1:1; | ||
1073 | uint64_t pko_nxa:1; | ||
1074 | } s; | ||
1075 | struct cvmx_agl_gmx_tx_int_en_s cn52xx; | ||
1076 | struct cvmx_agl_gmx_tx_int_en_s cn52xxp1; | ||
1077 | struct cvmx_agl_gmx_tx_int_en_cn56xx { | ||
1078 | uint64_t reserved_17_63:47; | ||
1079 | uint64_t late_col:1; | ||
1080 | uint64_t reserved_13_15:3; | ||
1081 | uint64_t xsdef:1; | ||
1082 | uint64_t reserved_9_11:3; | ||
1083 | uint64_t xscol:1; | ||
1084 | uint64_t reserved_3_7:5; | ||
1085 | uint64_t undflw:1; | ||
1086 | uint64_t reserved_1_1:1; | ||
1087 | uint64_t pko_nxa:1; | ||
1088 | } cn56xx; | ||
1089 | struct cvmx_agl_gmx_tx_int_en_cn56xx cn56xxp1; | ||
1090 | }; | ||
1091 | |||
1092 | union cvmx_agl_gmx_tx_int_reg { | ||
1093 | uint64_t u64; | ||
1094 | struct cvmx_agl_gmx_tx_int_reg_s { | ||
1095 | uint64_t reserved_18_63:46; | ||
1096 | uint64_t late_col:2; | ||
1097 | uint64_t reserved_14_15:2; | ||
1098 | uint64_t xsdef:2; | ||
1099 | uint64_t reserved_10_11:2; | ||
1100 | uint64_t xscol:2; | ||
1101 | uint64_t reserved_4_7:4; | ||
1102 | uint64_t undflw:2; | ||
1103 | uint64_t reserved_1_1:1; | ||
1104 | uint64_t pko_nxa:1; | ||
1105 | } s; | ||
1106 | struct cvmx_agl_gmx_tx_int_reg_s cn52xx; | ||
1107 | struct cvmx_agl_gmx_tx_int_reg_s cn52xxp1; | ||
1108 | struct cvmx_agl_gmx_tx_int_reg_cn56xx { | ||
1109 | uint64_t reserved_17_63:47; | ||
1110 | uint64_t late_col:1; | ||
1111 | uint64_t reserved_13_15:3; | ||
1112 | uint64_t xsdef:1; | ||
1113 | uint64_t reserved_9_11:3; | ||
1114 | uint64_t xscol:1; | ||
1115 | uint64_t reserved_3_7:5; | ||
1116 | uint64_t undflw:1; | ||
1117 | uint64_t reserved_1_1:1; | ||
1118 | uint64_t pko_nxa:1; | ||
1119 | } cn56xx; | ||
1120 | struct cvmx_agl_gmx_tx_int_reg_cn56xx cn56xxp1; | ||
1121 | }; | ||
1122 | |||
1123 | union cvmx_agl_gmx_tx_jam { | ||
1124 | uint64_t u64; | ||
1125 | struct cvmx_agl_gmx_tx_jam_s { | ||
1126 | uint64_t reserved_8_63:56; | ||
1127 | uint64_t jam:8; | ||
1128 | } s; | ||
1129 | struct cvmx_agl_gmx_tx_jam_s cn52xx; | ||
1130 | struct cvmx_agl_gmx_tx_jam_s cn52xxp1; | ||
1131 | struct cvmx_agl_gmx_tx_jam_s cn56xx; | ||
1132 | struct cvmx_agl_gmx_tx_jam_s cn56xxp1; | ||
1133 | }; | ||
1134 | |||
1135 | union cvmx_agl_gmx_tx_lfsr { | ||
1136 | uint64_t u64; | ||
1137 | struct cvmx_agl_gmx_tx_lfsr_s { | ||
1138 | uint64_t reserved_16_63:48; | ||
1139 | uint64_t lfsr:16; | ||
1140 | } s; | ||
1141 | struct cvmx_agl_gmx_tx_lfsr_s cn52xx; | ||
1142 | struct cvmx_agl_gmx_tx_lfsr_s cn52xxp1; | ||
1143 | struct cvmx_agl_gmx_tx_lfsr_s cn56xx; | ||
1144 | struct cvmx_agl_gmx_tx_lfsr_s cn56xxp1; | ||
1145 | }; | ||
1146 | |||
1147 | union cvmx_agl_gmx_tx_ovr_bp { | ||
1148 | uint64_t u64; | ||
1149 | struct cvmx_agl_gmx_tx_ovr_bp_s { | ||
1150 | uint64_t reserved_10_63:54; | ||
1151 | uint64_t en:2; | ||
1152 | uint64_t reserved_6_7:2; | ||
1153 | uint64_t bp:2; | ||
1154 | uint64_t reserved_2_3:2; | ||
1155 | uint64_t ign_full:2; | ||
1156 | } s; | ||
1157 | struct cvmx_agl_gmx_tx_ovr_bp_s cn52xx; | ||
1158 | struct cvmx_agl_gmx_tx_ovr_bp_s cn52xxp1; | ||
1159 | struct cvmx_agl_gmx_tx_ovr_bp_cn56xx { | ||
1160 | uint64_t reserved_9_63:55; | ||
1161 | uint64_t en:1; | ||
1162 | uint64_t reserved_5_7:3; | ||
1163 | uint64_t bp:1; | ||
1164 | uint64_t reserved_1_3:3; | ||
1165 | uint64_t ign_full:1; | ||
1166 | } cn56xx; | ||
1167 | struct cvmx_agl_gmx_tx_ovr_bp_cn56xx cn56xxp1; | ||
1168 | }; | ||
1169 | |||
1170 | union cvmx_agl_gmx_tx_pause_pkt_dmac { | ||
1171 | uint64_t u64; | ||
1172 | struct cvmx_agl_gmx_tx_pause_pkt_dmac_s { | ||
1173 | uint64_t reserved_48_63:16; | ||
1174 | uint64_t dmac:48; | ||
1175 | } s; | ||
1176 | struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xx; | ||
1177 | struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn52xxp1; | ||
1178 | struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xx; | ||
1179 | struct cvmx_agl_gmx_tx_pause_pkt_dmac_s cn56xxp1; | ||
1180 | }; | ||
1181 | |||
1182 | union cvmx_agl_gmx_tx_pause_pkt_type { | ||
1183 | uint64_t u64; | ||
1184 | struct cvmx_agl_gmx_tx_pause_pkt_type_s { | ||
1185 | uint64_t reserved_16_63:48; | ||
1186 | uint64_t type:16; | ||
1187 | } s; | ||
1188 | struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xx; | ||
1189 | struct cvmx_agl_gmx_tx_pause_pkt_type_s cn52xxp1; | ||
1190 | struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xx; | ||
1191 | struct cvmx_agl_gmx_tx_pause_pkt_type_s cn56xxp1; | ||
1192 | }; | ||
1193 | |||
1194 | #endif | ||
diff --git a/arch/mips/include/asm/octeon/cvmx-mixx-defs.h b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h new file mode 100644 index 000000000000..dab6dca492f9 --- /dev/null +++ b/arch/mips/include/asm/octeon/cvmx-mixx-defs.h | |||
@@ -0,0 +1,248 @@ | |||
1 | /***********************license start*************** | ||
2 | * Author: Cavium Networks | ||
3 | * | ||
4 | * Contact: support@caviumnetworks.com | ||
5 | * This file is part of the OCTEON SDK | ||
6 | * | ||
7 | * Copyright (c) 2003-2008 Cavium Networks | ||
8 | * | ||
9 | * This file is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License, Version 2, as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | * This file is distributed in the hope that it will be useful, but | ||
14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or | ||
16 | * NONINFRINGEMENT. See the GNU General Public License for more | ||
17 | * details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this file; if not, write to the Free Software | ||
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
22 | * or visit http://www.gnu.org/licenses/. | ||
23 | * | ||
24 | * This file may also be available under a different license from Cavium. | ||
25 | * Contact Cavium Networks for more information | ||
26 | ***********************license end**************************************/ | ||
27 | |||
28 | #ifndef __CVMX_MIXX_DEFS_H__ | ||
29 | #define __CVMX_MIXX_DEFS_H__ | ||
30 | |||
31 | #define CVMX_MIXX_BIST(offset) \ | ||
32 | CVMX_ADD_IO_SEG(0x0001070000100078ull + (((offset) & 1) * 2048)) | ||
33 | #define CVMX_MIXX_CTL(offset) \ | ||
34 | CVMX_ADD_IO_SEG(0x0001070000100020ull + (((offset) & 1) * 2048)) | ||
35 | #define CVMX_MIXX_INTENA(offset) \ | ||
36 | CVMX_ADD_IO_SEG(0x0001070000100050ull + (((offset) & 1) * 2048)) | ||
37 | #define CVMX_MIXX_IRCNT(offset) \ | ||
38 | CVMX_ADD_IO_SEG(0x0001070000100030ull + (((offset) & 1) * 2048)) | ||
39 | #define CVMX_MIXX_IRHWM(offset) \ | ||
40 | CVMX_ADD_IO_SEG(0x0001070000100028ull + (((offset) & 1) * 2048)) | ||
41 | #define CVMX_MIXX_IRING1(offset) \ | ||
42 | CVMX_ADD_IO_SEG(0x0001070000100010ull + (((offset) & 1) * 2048)) | ||
43 | #define CVMX_MIXX_IRING2(offset) \ | ||
44 | CVMX_ADD_IO_SEG(0x0001070000100018ull + (((offset) & 1) * 2048)) | ||
45 | #define CVMX_MIXX_ISR(offset) \ | ||
46 | CVMX_ADD_IO_SEG(0x0001070000100048ull + (((offset) & 1) * 2048)) | ||
47 | #define CVMX_MIXX_ORCNT(offset) \ | ||
48 | CVMX_ADD_IO_SEG(0x0001070000100040ull + (((offset) & 1) * 2048)) | ||
49 | #define CVMX_MIXX_ORHWM(offset) \ | ||
50 | CVMX_ADD_IO_SEG(0x0001070000100038ull + (((offset) & 1) * 2048)) | ||
51 | #define CVMX_MIXX_ORING1(offset) \ | ||
52 | CVMX_ADD_IO_SEG(0x0001070000100000ull + (((offset) & 1) * 2048)) | ||
53 | #define CVMX_MIXX_ORING2(offset) \ | ||
54 | CVMX_ADD_IO_SEG(0x0001070000100008ull + (((offset) & 1) * 2048)) | ||
55 | #define CVMX_MIXX_REMCNT(offset) \ | ||
56 | CVMX_ADD_IO_SEG(0x0001070000100058ull + (((offset) & 1) * 2048)) | ||
57 | |||
58 | union cvmx_mixx_bist { | ||
59 | uint64_t u64; | ||
60 | struct cvmx_mixx_bist_s { | ||
61 | uint64_t reserved_4_63:60; | ||
62 | uint64_t mrqdat:1; | ||
63 | uint64_t ipfdat:1; | ||
64 | uint64_t irfdat:1; | ||
65 | uint64_t orfdat:1; | ||
66 | } s; | ||
67 | struct cvmx_mixx_bist_s cn52xx; | ||
68 | struct cvmx_mixx_bist_s cn52xxp1; | ||
69 | struct cvmx_mixx_bist_s cn56xx; | ||
70 | struct cvmx_mixx_bist_s cn56xxp1; | ||
71 | }; | ||
72 | |||
73 | union cvmx_mixx_ctl { | ||
74 | uint64_t u64; | ||
75 | struct cvmx_mixx_ctl_s { | ||
76 | uint64_t reserved_8_63:56; | ||
77 | uint64_t crc_strip:1; | ||
78 | uint64_t busy:1; | ||
79 | uint64_t en:1; | ||
80 | uint64_t reset:1; | ||
81 | uint64_t lendian:1; | ||
82 | uint64_t nbtarb:1; | ||
83 | uint64_t mrq_hwm:2; | ||
84 | } s; | ||
85 | struct cvmx_mixx_ctl_s cn52xx; | ||
86 | struct cvmx_mixx_ctl_s cn52xxp1; | ||
87 | struct cvmx_mixx_ctl_s cn56xx; | ||
88 | struct cvmx_mixx_ctl_s cn56xxp1; | ||
89 | }; | ||
90 | |||
91 | union cvmx_mixx_intena { | ||
92 | uint64_t u64; | ||
93 | struct cvmx_mixx_intena_s { | ||
94 | uint64_t reserved_7_63:57; | ||
95 | uint64_t orunena:1; | ||
96 | uint64_t irunena:1; | ||
97 | uint64_t data_drpena:1; | ||
98 | uint64_t ithena:1; | ||
99 | uint64_t othena:1; | ||
100 | uint64_t ivfena:1; | ||
101 | uint64_t ovfena:1; | ||
102 | } s; | ||
103 | struct cvmx_mixx_intena_s cn52xx; | ||
104 | struct cvmx_mixx_intena_s cn52xxp1; | ||
105 | struct cvmx_mixx_intena_s cn56xx; | ||
106 | struct cvmx_mixx_intena_s cn56xxp1; | ||
107 | }; | ||
108 | |||
109 | union cvmx_mixx_ircnt { | ||
110 | uint64_t u64; | ||
111 | struct cvmx_mixx_ircnt_s { | ||
112 | uint64_t reserved_20_63:44; | ||
113 | uint64_t ircnt:20; | ||
114 | } s; | ||
115 | struct cvmx_mixx_ircnt_s cn52xx; | ||
116 | struct cvmx_mixx_ircnt_s cn52xxp1; | ||
117 | struct cvmx_mixx_ircnt_s cn56xx; | ||
118 | struct cvmx_mixx_ircnt_s cn56xxp1; | ||
119 | }; | ||
120 | |||
121 | union cvmx_mixx_irhwm { | ||
122 | uint64_t u64; | ||
123 | struct cvmx_mixx_irhwm_s { | ||
124 | uint64_t reserved_40_63:24; | ||
125 | uint64_t ibplwm:20; | ||
126 | uint64_t irhwm:20; | ||
127 | } s; | ||
128 | struct cvmx_mixx_irhwm_s cn52xx; | ||
129 | struct cvmx_mixx_irhwm_s cn52xxp1; | ||
130 | struct cvmx_mixx_irhwm_s cn56xx; | ||
131 | struct cvmx_mixx_irhwm_s cn56xxp1; | ||
132 | }; | ||
133 | |||
134 | union cvmx_mixx_iring1 { | ||
135 | uint64_t u64; | ||
136 | struct cvmx_mixx_iring1_s { | ||
137 | uint64_t reserved_60_63:4; | ||
138 | uint64_t isize:20; | ||
139 | uint64_t reserved_36_39:4; | ||
140 | uint64_t ibase:33; | ||
141 | uint64_t reserved_0_2:3; | ||
142 | } s; | ||
143 | struct cvmx_mixx_iring1_s cn52xx; | ||
144 | struct cvmx_mixx_iring1_s cn52xxp1; | ||
145 | struct cvmx_mixx_iring1_s cn56xx; | ||
146 | struct cvmx_mixx_iring1_s cn56xxp1; | ||
147 | }; | ||
148 | |||
149 | union cvmx_mixx_iring2 { | ||
150 | uint64_t u64; | ||
151 | struct cvmx_mixx_iring2_s { | ||
152 | uint64_t reserved_52_63:12; | ||
153 | uint64_t itlptr:20; | ||
154 | uint64_t reserved_20_31:12; | ||
155 | uint64_t idbell:20; | ||
156 | } s; | ||
157 | struct cvmx_mixx_iring2_s cn52xx; | ||
158 | struct cvmx_mixx_iring2_s cn52xxp1; | ||
159 | struct cvmx_mixx_iring2_s cn56xx; | ||
160 | struct cvmx_mixx_iring2_s cn56xxp1; | ||
161 | }; | ||
162 | |||
163 | union cvmx_mixx_isr { | ||
164 | uint64_t u64; | ||
165 | struct cvmx_mixx_isr_s { | ||
166 | uint64_t reserved_7_63:57; | ||
167 | uint64_t orun:1; | ||
168 | uint64_t irun:1; | ||
169 | uint64_t data_drp:1; | ||
170 | uint64_t irthresh:1; | ||
171 | uint64_t orthresh:1; | ||
172 | uint64_t idblovf:1; | ||
173 | uint64_t odblovf:1; | ||
174 | } s; | ||
175 | struct cvmx_mixx_isr_s cn52xx; | ||
176 | struct cvmx_mixx_isr_s cn52xxp1; | ||
177 | struct cvmx_mixx_isr_s cn56xx; | ||
178 | struct cvmx_mixx_isr_s cn56xxp1; | ||
179 | }; | ||
180 | |||
181 | union cvmx_mixx_orcnt { | ||
182 | uint64_t u64; | ||
183 | struct cvmx_mixx_orcnt_s { | ||
184 | uint64_t reserved_20_63:44; | ||
185 | uint64_t orcnt:20; | ||
186 | } s; | ||
187 | struct cvmx_mixx_orcnt_s cn52xx; | ||
188 | struct cvmx_mixx_orcnt_s cn52xxp1; | ||
189 | struct cvmx_mixx_orcnt_s cn56xx; | ||
190 | struct cvmx_mixx_orcnt_s cn56xxp1; | ||
191 | }; | ||
192 | |||
193 | union cvmx_mixx_orhwm { | ||
194 | uint64_t u64; | ||
195 | struct cvmx_mixx_orhwm_s { | ||
196 | uint64_t reserved_20_63:44; | ||
197 | uint64_t orhwm:20; | ||
198 | } s; | ||
199 | struct cvmx_mixx_orhwm_s cn52xx; | ||
200 | struct cvmx_mixx_orhwm_s cn52xxp1; | ||
201 | struct cvmx_mixx_orhwm_s cn56xx; | ||
202 | struct cvmx_mixx_orhwm_s cn56xxp1; | ||
203 | }; | ||
204 | |||
205 | union cvmx_mixx_oring1 { | ||
206 | uint64_t u64; | ||
207 | struct cvmx_mixx_oring1_s { | ||
208 | uint64_t reserved_60_63:4; | ||
209 | uint64_t osize:20; | ||
210 | uint64_t reserved_36_39:4; | ||
211 | uint64_t obase:33; | ||
212 | uint64_t reserved_0_2:3; | ||
213 | } s; | ||
214 | struct cvmx_mixx_oring1_s cn52xx; | ||
215 | struct cvmx_mixx_oring1_s cn52xxp1; | ||
216 | struct cvmx_mixx_oring1_s cn56xx; | ||
217 | struct cvmx_mixx_oring1_s cn56xxp1; | ||
218 | }; | ||
219 | |||
220 | union cvmx_mixx_oring2 { | ||
221 | uint64_t u64; | ||
222 | struct cvmx_mixx_oring2_s { | ||
223 | uint64_t reserved_52_63:12; | ||
224 | uint64_t otlptr:20; | ||
225 | uint64_t reserved_20_31:12; | ||
226 | uint64_t odbell:20; | ||
227 | } s; | ||
228 | struct cvmx_mixx_oring2_s cn52xx; | ||
229 | struct cvmx_mixx_oring2_s cn52xxp1; | ||
230 | struct cvmx_mixx_oring2_s cn56xx; | ||
231 | struct cvmx_mixx_oring2_s cn56xxp1; | ||
232 | }; | ||
233 | |||
234 | union cvmx_mixx_remcnt { | ||
235 | uint64_t u64; | ||
236 | struct cvmx_mixx_remcnt_s { | ||
237 | uint64_t reserved_52_63:12; | ||
238 | uint64_t iremcnt:20; | ||
239 | uint64_t reserved_20_31:12; | ||
240 | uint64_t oremcnt:20; | ||
241 | } s; | ||
242 | struct cvmx_mixx_remcnt_s cn52xx; | ||
243 | struct cvmx_mixx_remcnt_s cn52xxp1; | ||
244 | struct cvmx_mixx_remcnt_s cn56xx; | ||
245 | struct cvmx_mixx_remcnt_s cn56xxp1; | ||
246 | }; | ||
247 | |||
248 | #endif | ||
diff --git a/arch/mips/include/asm/octeon/cvmx-smix-defs.h b/arch/mips/include/asm/octeon/cvmx-smix-defs.h new file mode 100644 index 000000000000..9ae45fcbe3e3 --- /dev/null +++ b/arch/mips/include/asm/octeon/cvmx-smix-defs.h | |||
@@ -0,0 +1,178 @@ | |||
1 | /***********************license start*************** | ||
2 | * Author: Cavium Networks | ||
3 | * | ||
4 | * Contact: support@caviumnetworks.com | ||
5 | * This file is part of the OCTEON SDK | ||
6 | * | ||
7 | * Copyright (c) 2003-2008 Cavium Networks | ||
8 | * | ||
9 | * This file is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License, Version 2, as | ||
11 | * published by the Free Software Foundation. | ||
12 | * | ||
13 | * This file is distributed in the hope that it will be useful, but | ||
14 | * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty | ||
15 | * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or | ||
16 | * NONINFRINGEMENT. See the GNU General Public License for more | ||
17 | * details. | ||
18 | * | ||
19 | * You should have received a copy of the GNU General Public License | ||
20 | * along with this file; if not, write to the Free Software | ||
21 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
22 | * or visit http://www.gnu.org/licenses/. | ||
23 | * | ||
24 | * This file may also be available under a different license from Cavium. | ||
25 | * Contact Cavium Networks for more information | ||
26 | ***********************license end**************************************/ | ||
27 | |||
28 | #ifndef __CVMX_SMIX_DEFS_H__ | ||
29 | #define __CVMX_SMIX_DEFS_H__ | ||
30 | |||
31 | #define CVMX_SMIX_CLK(offset) \ | ||
32 | CVMX_ADD_IO_SEG(0x0001180000001818ull + (((offset) & 1) * 256)) | ||
33 | #define CVMX_SMIX_CMD(offset) \ | ||
34 | CVMX_ADD_IO_SEG(0x0001180000001800ull + (((offset) & 1) * 256)) | ||
35 | #define CVMX_SMIX_EN(offset) \ | ||
36 | CVMX_ADD_IO_SEG(0x0001180000001820ull + (((offset) & 1) * 256)) | ||
37 | #define CVMX_SMIX_RD_DAT(offset) \ | ||
38 | CVMX_ADD_IO_SEG(0x0001180000001810ull + (((offset) & 1) * 256)) | ||
39 | #define CVMX_SMIX_WR_DAT(offset) \ | ||
40 | CVMX_ADD_IO_SEG(0x0001180000001808ull + (((offset) & 1) * 256)) | ||
41 | |||
42 | union cvmx_smix_clk { | ||
43 | uint64_t u64; | ||
44 | struct cvmx_smix_clk_s { | ||
45 | uint64_t reserved_25_63:39; | ||
46 | uint64_t mode:1; | ||
47 | uint64_t reserved_21_23:3; | ||
48 | uint64_t sample_hi:5; | ||
49 | uint64_t sample_mode:1; | ||
50 | uint64_t reserved_14_14:1; | ||
51 | uint64_t clk_idle:1; | ||
52 | uint64_t preamble:1; | ||
53 | uint64_t sample:4; | ||
54 | uint64_t phase:8; | ||
55 | } s; | ||
56 | struct cvmx_smix_clk_cn30xx { | ||
57 | uint64_t reserved_21_63:43; | ||
58 | uint64_t sample_hi:5; | ||
59 | uint64_t reserved_14_15:2; | ||
60 | uint64_t clk_idle:1; | ||
61 | uint64_t preamble:1; | ||
62 | uint64_t sample:4; | ||
63 | uint64_t phase:8; | ||
64 | } cn30xx; | ||
65 | struct cvmx_smix_clk_cn30xx cn31xx; | ||
66 | struct cvmx_smix_clk_cn30xx cn38xx; | ||
67 | struct cvmx_smix_clk_cn30xx cn38xxp2; | ||
68 | struct cvmx_smix_clk_cn50xx { | ||
69 | uint64_t reserved_25_63:39; | ||
70 | uint64_t mode:1; | ||
71 | uint64_t reserved_21_23:3; | ||
72 | uint64_t sample_hi:5; | ||
73 | uint64_t reserved_14_15:2; | ||
74 | uint64_t clk_idle:1; | ||
75 | uint64_t preamble:1; | ||
76 | uint64_t sample:4; | ||
77 | uint64_t phase:8; | ||
78 | } cn50xx; | ||
79 | struct cvmx_smix_clk_s cn52xx; | ||
80 | struct cvmx_smix_clk_cn50xx cn52xxp1; | ||
81 | struct cvmx_smix_clk_s cn56xx; | ||
82 | struct cvmx_smix_clk_cn50xx cn56xxp1; | ||
83 | struct cvmx_smix_clk_cn30xx cn58xx; | ||
84 | struct cvmx_smix_clk_cn30xx cn58xxp1; | ||
85 | }; | ||
86 | |||
87 | union cvmx_smix_cmd { | ||
88 | uint64_t u64; | ||
89 | struct cvmx_smix_cmd_s { | ||
90 | uint64_t reserved_18_63:46; | ||
91 | uint64_t phy_op:2; | ||
92 | uint64_t reserved_13_15:3; | ||
93 | uint64_t phy_adr:5; | ||
94 | uint64_t reserved_5_7:3; | ||
95 | uint64_t reg_adr:5; | ||
96 | } s; | ||
97 | struct cvmx_smix_cmd_cn30xx { | ||
98 | uint64_t reserved_17_63:47; | ||
99 | uint64_t phy_op:1; | ||
100 | uint64_t reserved_13_15:3; | ||
101 | uint64_t phy_adr:5; | ||
102 | uint64_t reserved_5_7:3; | ||
103 | uint64_t reg_adr:5; | ||
104 | } cn30xx; | ||
105 | struct cvmx_smix_cmd_cn30xx cn31xx; | ||
106 | struct cvmx_smix_cmd_cn30xx cn38xx; | ||
107 | struct cvmx_smix_cmd_cn30xx cn38xxp2; | ||
108 | struct cvmx_smix_cmd_s cn50xx; | ||
109 | struct cvmx_smix_cmd_s cn52xx; | ||
110 | struct cvmx_smix_cmd_s cn52xxp1; | ||
111 | struct cvmx_smix_cmd_s cn56xx; | ||
112 | struct cvmx_smix_cmd_s cn56xxp1; | ||
113 | struct cvmx_smix_cmd_cn30xx cn58xx; | ||
114 | struct cvmx_smix_cmd_cn30xx cn58xxp1; | ||
115 | }; | ||
116 | |||
117 | union cvmx_smix_en { | ||
118 | uint64_t u64; | ||
119 | struct cvmx_smix_en_s { | ||
120 | uint64_t reserved_1_63:63; | ||
121 | uint64_t en:1; | ||
122 | } s; | ||
123 | struct cvmx_smix_en_s cn30xx; | ||
124 | struct cvmx_smix_en_s cn31xx; | ||
125 | struct cvmx_smix_en_s cn38xx; | ||
126 | struct cvmx_smix_en_s cn38xxp2; | ||
127 | struct cvmx_smix_en_s cn50xx; | ||
128 | struct cvmx_smix_en_s cn52xx; | ||
129 | struct cvmx_smix_en_s cn52xxp1; | ||
130 | struct cvmx_smix_en_s cn56xx; | ||
131 | struct cvmx_smix_en_s cn56xxp1; | ||
132 | struct cvmx_smix_en_s cn58xx; | ||
133 | struct cvmx_smix_en_s cn58xxp1; | ||
134 | }; | ||
135 | |||
136 | union cvmx_smix_rd_dat { | ||
137 | uint64_t u64; | ||
138 | struct cvmx_smix_rd_dat_s { | ||
139 | uint64_t reserved_18_63:46; | ||
140 | uint64_t pending:1; | ||
141 | uint64_t val:1; | ||
142 | uint64_t dat:16; | ||
143 | } s; | ||
144 | struct cvmx_smix_rd_dat_s cn30xx; | ||
145 | struct cvmx_smix_rd_dat_s cn31xx; | ||
146 | struct cvmx_smix_rd_dat_s cn38xx; | ||
147 | struct cvmx_smix_rd_dat_s cn38xxp2; | ||
148 | struct cvmx_smix_rd_dat_s cn50xx; | ||
149 | struct cvmx_smix_rd_dat_s cn52xx; | ||
150 | struct cvmx_smix_rd_dat_s cn52xxp1; | ||
151 | struct cvmx_smix_rd_dat_s cn56xx; | ||
152 | struct cvmx_smix_rd_dat_s cn56xxp1; | ||
153 | struct cvmx_smix_rd_dat_s cn58xx; | ||
154 | struct cvmx_smix_rd_dat_s cn58xxp1; | ||
155 | }; | ||
156 | |||
157 | union cvmx_smix_wr_dat { | ||
158 | uint64_t u64; | ||
159 | struct cvmx_smix_wr_dat_s { | ||
160 | uint64_t reserved_18_63:46; | ||
161 | uint64_t pending:1; | ||
162 | uint64_t val:1; | ||
163 | uint64_t dat:16; | ||
164 | } s; | ||
165 | struct cvmx_smix_wr_dat_s cn30xx; | ||
166 | struct cvmx_smix_wr_dat_s cn31xx; | ||
167 | struct cvmx_smix_wr_dat_s cn38xx; | ||
168 | struct cvmx_smix_wr_dat_s cn38xxp2; | ||
169 | struct cvmx_smix_wr_dat_s cn50xx; | ||
170 | struct cvmx_smix_wr_dat_s cn52xx; | ||
171 | struct cvmx_smix_wr_dat_s cn52xxp1; | ||
172 | struct cvmx_smix_wr_dat_s cn56xx; | ||
173 | struct cvmx_smix_wr_dat_s cn56xxp1; | ||
174 | struct cvmx_smix_wr_dat_s cn58xx; | ||
175 | struct cvmx_smix_wr_dat_s cn58xxp1; | ||
176 | }; | ||
177 | |||
178 | #endif | ||
diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h index cac9b1a206fc..4d0a8c61fc3e 100644 --- a/arch/mips/include/asm/octeon/octeon.h +++ b/arch/mips/include/asm/octeon/octeon.h | |||
@@ -47,6 +47,7 @@ struct octeon_cop2_state; | |||
47 | extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state); | 47 | extern unsigned long octeon_crypto_enable(struct octeon_cop2_state *state); |
48 | extern void octeon_crypto_disable(struct octeon_cop2_state *state, | 48 | extern void octeon_crypto_disable(struct octeon_cop2_state *state, |
49 | unsigned long flags); | 49 | unsigned long flags); |
50 | extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task); | ||
50 | 51 | ||
51 | extern void octeon_init_cvmcount(void); | 52 | extern void octeon_init_cvmcount(void); |
52 | 53 | ||
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h index d6eb6134abec..1854336e56a2 100644 --- a/arch/mips/include/asm/pgtable.h +++ b/arch/mips/include/asm/pgtable.h | |||
@@ -390,6 +390,19 @@ static inline int io_remap_pfn_range(struct vm_area_struct *vma, | |||
390 | #include <asm-generic/pgtable.h> | 390 | #include <asm-generic/pgtable.h> |
391 | 391 | ||
392 | /* | 392 | /* |
393 | * uncached accelerated TLB map for video memory access | ||
394 | */ | ||
395 | #ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED | ||
396 | #define __HAVE_PHYS_MEM_ACCESS_PROT | ||
397 | |||
398 | struct file; | ||
399 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | ||
400 | unsigned long size, pgprot_t vma_prot); | ||
401 | int phys_mem_access_prot_allowed(struct file *file, unsigned long pfn, | ||
402 | unsigned long size, pgprot_t *vma_prot); | ||
403 | #endif | ||
404 | |||
405 | /* | ||
393 | * We provide our own get_unmapped area to cope with the virtual aliasing | 406 | * We provide our own get_unmapped area to cope with the virtual aliasing |
394 | * constraints placed on us by the cache architecture. | 407 | * constraints placed on us by the cache architecture. |
395 | */ | 408 | */ |
diff --git a/arch/mips/include/asm/sgialib.h b/arch/mips/include/asm/sgialib.h index bfce5c786f1c..63741ca1e422 100644 --- a/arch/mips/include/asm/sgialib.h +++ b/arch/mips/include/asm/sgialib.h | |||
@@ -85,8 +85,7 @@ extern void prom_identify_arch(void); | |||
85 | extern PCHAR ArcGetEnvironmentVariable(PCHAR name); | 85 | extern PCHAR ArcGetEnvironmentVariable(PCHAR name); |
86 | extern LONG ArcSetEnvironmentVariable(PCHAR name, PCHAR value); | 86 | extern LONG ArcSetEnvironmentVariable(PCHAR name, PCHAR value); |
87 | 87 | ||
88 | /* ARCS command line acquisition and parsing. */ | 88 | /* ARCS command line parsing. */ |
89 | extern char *prom_getcmdline(void); | ||
90 | extern void prom_init_cmdline(void); | 89 | extern void prom_init_cmdline(void); |
91 | 90 | ||
92 | /* Acquiring info about the current time, etc. */ | 91 | /* Acquiring info about the current time, etc. */ |
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h index db0fa7b5aeaf..3b6da3330e32 100644 --- a/arch/mips/include/asm/stackframe.h +++ b/arch/mips/include/asm/stackframe.h | |||
@@ -51,9 +51,6 @@ | |||
51 | LONG_S v1, PT_ACX(sp) | 51 | LONG_S v1, PT_ACX(sp) |
52 | #else | 52 | #else |
53 | mfhi v1 | 53 | mfhi v1 |
54 | LONG_S v1, PT_HI(sp) | ||
55 | mflo v1 | ||
56 | LONG_S v1, PT_LO(sp) | ||
57 | #endif | 54 | #endif |
58 | #ifdef CONFIG_32BIT | 55 | #ifdef CONFIG_32BIT |
59 | LONG_S $8, PT_R8(sp) | 56 | LONG_S $8, PT_R8(sp) |
@@ -62,10 +59,17 @@ | |||
62 | LONG_S $10, PT_R10(sp) | 59 | LONG_S $10, PT_R10(sp) |
63 | LONG_S $11, PT_R11(sp) | 60 | LONG_S $11, PT_R11(sp) |
64 | LONG_S $12, PT_R12(sp) | 61 | LONG_S $12, PT_R12(sp) |
62 | #ifndef CONFIG_CPU_HAS_SMARTMIPS | ||
63 | LONG_S v1, PT_HI(sp) | ||
64 | mflo v1 | ||
65 | #endif | ||
65 | LONG_S $13, PT_R13(sp) | 66 | LONG_S $13, PT_R13(sp) |
66 | LONG_S $14, PT_R14(sp) | 67 | LONG_S $14, PT_R14(sp) |
67 | LONG_S $15, PT_R15(sp) | 68 | LONG_S $15, PT_R15(sp) |
68 | LONG_S $24, PT_R24(sp) | 69 | LONG_S $24, PT_R24(sp) |
70 | #ifndef CONFIG_CPU_HAS_SMARTMIPS | ||
71 | LONG_S v1, PT_LO(sp) | ||
72 | #endif | ||
69 | .endm | 73 | .endm |
70 | 74 | ||
71 | .macro SAVE_STATIC | 75 | .macro SAVE_STATIC |
@@ -83,15 +87,19 @@ | |||
83 | #ifdef CONFIG_SMP | 87 | #ifdef CONFIG_SMP |
84 | #ifdef CONFIG_MIPS_MT_SMTC | 88 | #ifdef CONFIG_MIPS_MT_SMTC |
85 | #define PTEBASE_SHIFT 19 /* TCBIND */ | 89 | #define PTEBASE_SHIFT 19 /* TCBIND */ |
90 | #define CPU_ID_REG CP0_TCBIND | ||
91 | #define CPU_ID_MFC0 mfc0 | ||
92 | #elif defined(CONFIG_MIPS_PGD_C0_CONTEXT) | ||
93 | #define PTEBASE_SHIFT 48 /* XCONTEXT */ | ||
94 | #define CPU_ID_REG CP0_XCONTEXT | ||
95 | #define CPU_ID_MFC0 MFC0 | ||
86 | #else | 96 | #else |
87 | #define PTEBASE_SHIFT 23 /* CONTEXT */ | 97 | #define PTEBASE_SHIFT 23 /* CONTEXT */ |
98 | #define CPU_ID_REG CP0_CONTEXT | ||
99 | #define CPU_ID_MFC0 MFC0 | ||
88 | #endif | 100 | #endif |
89 | .macro get_saved_sp /* SMP variation */ | 101 | .macro get_saved_sp /* SMP variation */ |
90 | #ifdef CONFIG_MIPS_MT_SMTC | 102 | CPU_ID_MFC0 k0, CPU_ID_REG |
91 | mfc0 k0, CP0_TCBIND | ||
92 | #else | ||
93 | MFC0 k0, CP0_CONTEXT | ||
94 | #endif | ||
95 | #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) | 103 | #if defined(CONFIG_32BIT) || defined(KBUILD_64BIT_SYM32) |
96 | lui k1, %hi(kernelsp) | 104 | lui k1, %hi(kernelsp) |
97 | #else | 105 | #else |
@@ -107,11 +115,7 @@ | |||
107 | .endm | 115 | .endm |
108 | 116 | ||
109 | .macro set_saved_sp stackp temp temp2 | 117 | .macro set_saved_sp stackp temp temp2 |
110 | #ifdef CONFIG_MIPS_MT_SMTC | 118 | CPU_ID_MFC0 \temp, CPU_ID_REG |
111 | mfc0 \temp, CP0_TCBIND | ||
112 | #else | ||
113 | MFC0 \temp, CP0_CONTEXT | ||
114 | #endif | ||
115 | LONG_SRL \temp, PTEBASE_SHIFT | 119 | LONG_SRL \temp, PTEBASE_SHIFT |
116 | LONG_S \stackp, kernelsp(\temp) | 120 | LONG_S \stackp, kernelsp(\temp) |
117 | .endm | 121 | .endm |
@@ -166,7 +170,6 @@ | |||
166 | LONG_S $0, PT_R0(sp) | 170 | LONG_S $0, PT_R0(sp) |
167 | mfc0 v1, CP0_STATUS | 171 | mfc0 v1, CP0_STATUS |
168 | LONG_S $2, PT_R2(sp) | 172 | LONG_S $2, PT_R2(sp) |
169 | LONG_S v1, PT_STATUS(sp) | ||
170 | #ifdef CONFIG_MIPS_MT_SMTC | 173 | #ifdef CONFIG_MIPS_MT_SMTC |
171 | /* | 174 | /* |
172 | * Ideally, these instructions would be shuffled in | 175 | * Ideally, these instructions would be shuffled in |
@@ -178,20 +181,21 @@ | |||
178 | LONG_S v1, PT_TCSTATUS(sp) | 181 | LONG_S v1, PT_TCSTATUS(sp) |
179 | #endif /* CONFIG_MIPS_MT_SMTC */ | 182 | #endif /* CONFIG_MIPS_MT_SMTC */ |
180 | LONG_S $4, PT_R4(sp) | 183 | LONG_S $4, PT_R4(sp) |
181 | mfc0 v1, CP0_CAUSE | ||
182 | LONG_S $5, PT_R5(sp) | 184 | LONG_S $5, PT_R5(sp) |
183 | LONG_S v1, PT_CAUSE(sp) | 185 | LONG_S v1, PT_STATUS(sp) |
186 | mfc0 v1, CP0_CAUSE | ||
184 | LONG_S $6, PT_R6(sp) | 187 | LONG_S $6, PT_R6(sp) |
185 | MFC0 v1, CP0_EPC | ||
186 | LONG_S $7, PT_R7(sp) | 188 | LONG_S $7, PT_R7(sp) |
189 | LONG_S v1, PT_CAUSE(sp) | ||
190 | MFC0 v1, CP0_EPC | ||
187 | #ifdef CONFIG_64BIT | 191 | #ifdef CONFIG_64BIT |
188 | LONG_S $8, PT_R8(sp) | 192 | LONG_S $8, PT_R8(sp) |
189 | LONG_S $9, PT_R9(sp) | 193 | LONG_S $9, PT_R9(sp) |
190 | #endif | 194 | #endif |
191 | LONG_S v1, PT_EPC(sp) | ||
192 | LONG_S $25, PT_R25(sp) | 195 | LONG_S $25, PT_R25(sp) |
193 | LONG_S $28, PT_R28(sp) | 196 | LONG_S $28, PT_R28(sp) |
194 | LONG_S $31, PT_R31(sp) | 197 | LONG_S $31, PT_R31(sp) |
198 | LONG_S v1, PT_EPC(sp) | ||
195 | ori $28, sp, _THREAD_MASK | 199 | ori $28, sp, _THREAD_MASK |
196 | xori $28, _THREAD_MASK | 200 | xori $28, _THREAD_MASK |
197 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | 201 | #ifdef CONFIG_CPU_CAVIUM_OCTEON |
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile index eecd2a9f155c..9326af5186fe 100644 --- a/arch/mips/kernel/Makefile +++ b/arch/mips/kernel/Makefile | |||
@@ -2,14 +2,17 @@ | |||
2 | # Makefile for the Linux/MIPS kernel. | 2 | # Makefile for the Linux/MIPS kernel. |
3 | # | 3 | # |
4 | 4 | ||
5 | CPPFLAGS_vmlinux.lds := $(KBUILD_CFLAGS) | ||
6 | |||
7 | extra-y := head.o init_task.o vmlinux.lds | 5 | extra-y := head.o init_task.o vmlinux.lds |
8 | 6 | ||
9 | obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ | 7 | obj-y += cpu-probe.o branch.o entry.o genex.o irq.o process.o \ |
10 | ptrace.o reset.o setup.o signal.o syscall.o \ | 8 | ptrace.o reset.o setup.o signal.o syscall.o \ |
11 | time.o topology.o traps.o unaligned.o watch.o | 9 | time.o topology.o traps.o unaligned.o watch.o |
12 | 10 | ||
11 | ifdef CONFIG_FUNCTION_TRACER | ||
12 | CFLAGS_REMOVE_ftrace.o = -pg | ||
13 | CFLAGS_REMOVE_early_printk.o = -pg | ||
14 | endif | ||
15 | |||
13 | obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o | 16 | obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o |
14 | obj-$(CONFIG_CEVT_R4K_LIB) += cevt-r4k.o | 17 | obj-$(CONFIG_CEVT_R4K_LIB) += cevt-r4k.o |
15 | obj-$(CONFIG_MIPS_MT_SMTC) += cevt-smtc.o | 18 | obj-$(CONFIG_MIPS_MT_SMTC) += cevt-smtc.o |
@@ -19,6 +22,7 @@ obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o | |||
19 | obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o | 22 | obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o |
20 | obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o | 23 | obj-$(CONFIG_CSRC_BCM1480) += csrc-bcm1480.o |
21 | obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o | 24 | obj-$(CONFIG_CSRC_IOASIC) += csrc-ioasic.o |
25 | obj-$(CONFIG_CSRC_POWERTV) += csrc-powertv.o | ||
22 | obj-$(CONFIG_CSRC_R4K_LIB) += csrc-r4k.o | 26 | obj-$(CONFIG_CSRC_R4K_LIB) += csrc-r4k.o |
23 | obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o | 27 | obj-$(CONFIG_CSRC_SB1250) += csrc-sb1250.o |
24 | obj-$(CONFIG_SYNC_R4K) += sync-r4k.o | 28 | obj-$(CONFIG_SYNC_R4K) += sync-r4k.o |
@@ -26,6 +30,8 @@ obj-$(CONFIG_SYNC_R4K) += sync-r4k.o | |||
26 | obj-$(CONFIG_STACKTRACE) += stacktrace.o | 30 | obj-$(CONFIG_STACKTRACE) += stacktrace.o |
27 | obj-$(CONFIG_MODULES) += mips_ksyms.o module.o | 31 | obj-$(CONFIG_MODULES) += mips_ksyms.o module.o |
28 | 32 | ||
33 | obj-$(CONFIG_FUNCTION_TRACER) += mcount.o ftrace.o | ||
34 | |||
29 | obj-$(CONFIG_CPU_LOONGSON2) += r4k_fpu.o r4k_switch.o | 35 | obj-$(CONFIG_CPU_LOONGSON2) += r4k_fpu.o r4k_switch.o |
30 | obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o | 36 | obj-$(CONFIG_CPU_MIPS32) += r4k_fpu.o r4k_switch.o |
31 | obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o | 37 | obj-$(CONFIG_CPU_MIPS64) += r4k_fpu.o r4k_switch.o |
@@ -92,4 +98,8 @@ CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(KBUILD_CFLAGS) -Wa,-mdaddi -c -o /dev/n | |||
92 | 98 | ||
93 | obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o | 99 | obj-$(CONFIG_HAVE_STD_PC_SERIAL_PORT) += 8250-platform.o |
94 | 100 | ||
101 | obj-$(CONFIG_MIPS_CPUFREQ) += cpufreq/ | ||
102 | |||
95 | EXTRA_CFLAGS += -Werror | 103 | EXTRA_CFLAGS += -Werror |
104 | |||
105 | CPPFLAGS_vmlinux.lds := $(KBUILD_CFLAGS) | ||
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c index 7a51866068a4..80e202eca056 100644 --- a/arch/mips/kernel/cpu-probe.c +++ b/arch/mips/kernel/cpu-probe.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/ptrace.h> | 16 | #include <linux/ptrace.h> |
17 | #include <linux/smp.h> | 17 | #include <linux/smp.h> |
18 | #include <linux/stddef.h> | 18 | #include <linux/stddef.h> |
19 | #include <linux/module.h> | ||
19 | 20 | ||
20 | #include <asm/bugs.h> | 21 | #include <asm/bugs.h> |
21 | #include <asm/cpu.h> | 22 | #include <asm/cpu.h> |
@@ -32,6 +33,7 @@ | |||
32 | * the CPU very much. | 33 | * the CPU very much. |
33 | */ | 34 | */ |
34 | void (*cpu_wait)(void); | 35 | void (*cpu_wait)(void); |
36 | EXPORT_SYMBOL(cpu_wait); | ||
35 | 37 | ||
36 | static void r3081_wait(void) | 38 | static void r3081_wait(void) |
37 | { | 39 | { |
diff --git a/arch/mips/kernel/cpufreq/Kconfig b/arch/mips/kernel/cpufreq/Kconfig new file mode 100644 index 000000000000..58c601eee6fd --- /dev/null +++ b/arch/mips/kernel/cpufreq/Kconfig | |||
@@ -0,0 +1,41 @@ | |||
1 | # | ||
2 | # CPU Frequency scaling | ||
3 | # | ||
4 | |||
5 | config MIPS_EXTERNAL_TIMER | ||
6 | bool | ||
7 | |||
8 | config MIPS_CPUFREQ | ||
9 | bool | ||
10 | default y | ||
11 | depends on CPU_SUPPORTS_CPUFREQ && MIPS_EXTERNAL_TIMER | ||
12 | |||
13 | if MIPS_CPUFREQ | ||
14 | |||
15 | menu "CPU Frequency scaling" | ||
16 | |||
17 | source "drivers/cpufreq/Kconfig" | ||
18 | |||
19 | if CPU_FREQ | ||
20 | |||
21 | comment "CPUFreq processor drivers" | ||
22 | |||
23 | config LOONGSON2_CPUFREQ | ||
24 | tristate "Loongson2 CPUFreq Driver" | ||
25 | select CPU_FREQ_TABLE | ||
26 | depends on MIPS_CPUFREQ | ||
27 | help | ||
28 | This option adds a CPUFreq driver for loongson processors which | ||
29 | support software configurable cpu frequency. | ||
30 | |||
31 | Loongson2F and it's successors support this feature. | ||
32 | |||
33 | For details, take a look at <file:Documentation/cpu-freq/>. | ||
34 | |||
35 | If in doubt, say N. | ||
36 | |||
37 | endif # CPU_FREQ | ||
38 | |||
39 | endmenu | ||
40 | |||
41 | endif # MIPS_CPUFREQ | ||
diff --git a/arch/mips/kernel/cpufreq/Makefile b/arch/mips/kernel/cpufreq/Makefile new file mode 100644 index 000000000000..c3479a432efe --- /dev/null +++ b/arch/mips/kernel/cpufreq/Makefile | |||
@@ -0,0 +1,5 @@ | |||
1 | # | ||
2 | # Makefile for the Linux/MIPS cpufreq. | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_LOONGSON2_CPUFREQ) += loongson2_cpufreq.o loongson2_clock.o | ||
diff --git a/arch/mips/kernel/cpufreq/loongson2_clock.c b/arch/mips/kernel/cpufreq/loongson2_clock.c new file mode 100644 index 000000000000..d7ca256e33ef --- /dev/null +++ b/arch/mips/kernel/cpufreq/loongson2_clock.c | |||
@@ -0,0 +1,166 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology | ||
3 | * Author: Yanhua, yanh@lemote.com | ||
4 | * | ||
5 | * This file is subject to the terms and conditions of the GNU General Public | ||
6 | * License. See the file "COPYING" in the main directory of this archive | ||
7 | * for more details. | ||
8 | */ | ||
9 | |||
10 | #include <linux/cpufreq.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | |||
13 | #include <asm/clock.h> | ||
14 | |||
15 | #include <loongson.h> | ||
16 | |||
17 | static LIST_HEAD(clock_list); | ||
18 | static DEFINE_SPINLOCK(clock_lock); | ||
19 | static DEFINE_MUTEX(clock_list_sem); | ||
20 | |||
21 | /* Minimum CLK support */ | ||
22 | enum { | ||
23 | DC_ZERO, DC_25PT = 2, DC_37PT, DC_50PT, DC_62PT, DC_75PT, | ||
24 | DC_87PT, DC_DISABLE, DC_RESV | ||
25 | }; | ||
26 | |||
27 | struct cpufreq_frequency_table loongson2_clockmod_table[] = { | ||
28 | {DC_RESV, CPUFREQ_ENTRY_INVALID}, | ||
29 | {DC_ZERO, CPUFREQ_ENTRY_INVALID}, | ||
30 | {DC_25PT, 0}, | ||
31 | {DC_37PT, 0}, | ||
32 | {DC_50PT, 0}, | ||
33 | {DC_62PT, 0}, | ||
34 | {DC_75PT, 0}, | ||
35 | {DC_87PT, 0}, | ||
36 | {DC_DISABLE, 0}, | ||
37 | {DC_RESV, CPUFREQ_TABLE_END}, | ||
38 | }; | ||
39 | EXPORT_SYMBOL_GPL(loongson2_clockmod_table); | ||
40 | |||
41 | static struct clk cpu_clk = { | ||
42 | .name = "cpu_clk", | ||
43 | .flags = CLK_ALWAYS_ENABLED | CLK_RATE_PROPAGATES, | ||
44 | .rate = 800000000, | ||
45 | }; | ||
46 | |||
47 | struct clk *clk_get(struct device *dev, const char *id) | ||
48 | { | ||
49 | return &cpu_clk; | ||
50 | } | ||
51 | EXPORT_SYMBOL(clk_get); | ||
52 | |||
53 | static void propagate_rate(struct clk *clk) | ||
54 | { | ||
55 | struct clk *clkp; | ||
56 | |||
57 | list_for_each_entry(clkp, &clock_list, node) { | ||
58 | if (likely(clkp->parent != clk)) | ||
59 | continue; | ||
60 | if (likely(clkp->ops && clkp->ops->recalc)) | ||
61 | clkp->ops->recalc(clkp); | ||
62 | if (unlikely(clkp->flags & CLK_RATE_PROPAGATES)) | ||
63 | propagate_rate(clkp); | ||
64 | } | ||
65 | } | ||
66 | |||
67 | int clk_enable(struct clk *clk) | ||
68 | { | ||
69 | return 0; | ||
70 | } | ||
71 | EXPORT_SYMBOL(clk_enable); | ||
72 | |||
73 | void clk_disable(struct clk *clk) | ||
74 | { | ||
75 | } | ||
76 | EXPORT_SYMBOL(clk_disable); | ||
77 | |||
78 | unsigned long clk_get_rate(struct clk *clk) | ||
79 | { | ||
80 | return (unsigned long)clk->rate; | ||
81 | } | ||
82 | EXPORT_SYMBOL(clk_get_rate); | ||
83 | |||
84 | void clk_put(struct clk *clk) | ||
85 | { | ||
86 | } | ||
87 | EXPORT_SYMBOL(clk_put); | ||
88 | |||
89 | int clk_set_rate(struct clk *clk, unsigned long rate) | ||
90 | { | ||
91 | return clk_set_rate_ex(clk, rate, 0); | ||
92 | } | ||
93 | EXPORT_SYMBOL_GPL(clk_set_rate); | ||
94 | |||
95 | int clk_set_rate_ex(struct clk *clk, unsigned long rate, int algo_id) | ||
96 | { | ||
97 | int ret = 0; | ||
98 | int regval; | ||
99 | int i; | ||
100 | |||
101 | if (likely(clk->ops && clk->ops->set_rate)) { | ||
102 | unsigned long flags; | ||
103 | |||
104 | spin_lock_irqsave(&clock_lock, flags); | ||
105 | ret = clk->ops->set_rate(clk, rate, algo_id); | ||
106 | spin_unlock_irqrestore(&clock_lock, flags); | ||
107 | } | ||
108 | |||
109 | if (unlikely(clk->flags & CLK_RATE_PROPAGATES)) | ||
110 | propagate_rate(clk); | ||
111 | |||
112 | for (i = 0; loongson2_clockmod_table[i].frequency != CPUFREQ_TABLE_END; | ||
113 | i++) { | ||
114 | if (loongson2_clockmod_table[i].frequency == | ||
115 | CPUFREQ_ENTRY_INVALID) | ||
116 | continue; | ||
117 | if (rate == loongson2_clockmod_table[i].frequency) | ||
118 | break; | ||
119 | } | ||
120 | if (rate != loongson2_clockmod_table[i].frequency) | ||
121 | return -ENOTSUPP; | ||
122 | |||
123 | clk->rate = rate; | ||
124 | |||
125 | regval = LOONGSON_CHIPCFG0; | ||
126 | regval = (regval & ~0x7) | (loongson2_clockmod_table[i].index - 1); | ||
127 | LOONGSON_CHIPCFG0 = regval; | ||
128 | |||
129 | return ret; | ||
130 | } | ||
131 | EXPORT_SYMBOL_GPL(clk_set_rate_ex); | ||
132 | |||
133 | long clk_round_rate(struct clk *clk, unsigned long rate) | ||
134 | { | ||
135 | if (likely(clk->ops && clk->ops->round_rate)) { | ||
136 | unsigned long flags, rounded; | ||
137 | |||
138 | spin_lock_irqsave(&clock_lock, flags); | ||
139 | rounded = clk->ops->round_rate(clk, rate); | ||
140 | spin_unlock_irqrestore(&clock_lock, flags); | ||
141 | |||
142 | return rounded; | ||
143 | } | ||
144 | |||
145 | return rate; | ||
146 | } | ||
147 | EXPORT_SYMBOL_GPL(clk_round_rate); | ||
148 | |||
149 | /* | ||
150 | * This is the simple version of Loongson-2 wait, Maybe we need do this in | ||
151 | * interrupt disabled content | ||
152 | */ | ||
153 | |||
154 | DEFINE_SPINLOCK(loongson2_wait_lock); | ||
155 | void loongson2_cpu_wait(void) | ||
156 | { | ||
157 | u32 cpu_freq; | ||
158 | unsigned long flags; | ||
159 | |||
160 | spin_lock_irqsave(&loongson2_wait_lock, flags); | ||
161 | cpu_freq = LOONGSON_CHIPCFG0; | ||
162 | LOONGSON_CHIPCFG0 &= ~0x7; /* Put CPU into wait mode */ | ||
163 | LOONGSON_CHIPCFG0 = cpu_freq; /* Restore CPU state */ | ||
164 | spin_unlock_irqrestore(&loongson2_wait_lock, flags); | ||
165 | } | ||
166 | EXPORT_SYMBOL_GPL(loongson2_cpu_wait); | ||
diff --git a/arch/mips/kernel/cpufreq/loongson2_cpufreq.c b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c new file mode 100644 index 000000000000..2f6a0b147ab8 --- /dev/null +++ b/arch/mips/kernel/cpufreq/loongson2_cpufreq.c | |||
@@ -0,0 +1,227 @@ | |||
1 | /* | ||
2 | * Cpufreq driver for the loongson-2 processors | ||
3 | * | ||
4 | * The 2E revision of loongson processor not support this feature. | ||
5 | * | ||
6 | * Copyright (C) 2006 - 2008 Lemote Inc. & Insititute of Computing Technology | ||
7 | * Author: Yanhua, yanh@lemote.com | ||
8 | * | ||
9 | * This file is subject to the terms and conditions of the GNU General Public | ||
10 | * License. See the file "COPYING" in the main directory of this archive | ||
11 | * for more details. | ||
12 | */ | ||
13 | #include <linux/cpufreq.h> | ||
14 | #include <linux/module.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/sched.h> /* set_cpus_allowed() */ | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/platform_device.h> | ||
19 | |||
20 | #include <asm/clock.h> | ||
21 | |||
22 | #include <loongson.h> | ||
23 | |||
24 | static uint nowait; | ||
25 | |||
26 | static struct clk *cpuclk; | ||
27 | |||
28 | static void (*saved_cpu_wait) (void); | ||
29 | |||
30 | static int loongson2_cpu_freq_notifier(struct notifier_block *nb, | ||
31 | unsigned long val, void *data); | ||
32 | |||
33 | static struct notifier_block loongson2_cpufreq_notifier_block = { | ||
34 | .notifier_call = loongson2_cpu_freq_notifier | ||
35 | }; | ||
36 | |||
37 | static int loongson2_cpu_freq_notifier(struct notifier_block *nb, | ||
38 | unsigned long val, void *data) | ||
39 | { | ||
40 | if (val == CPUFREQ_POSTCHANGE) | ||
41 | current_cpu_data.udelay_val = loops_per_jiffy; | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | static unsigned int loongson2_cpufreq_get(unsigned int cpu) | ||
47 | { | ||
48 | return clk_get_rate(cpuclk); | ||
49 | } | ||
50 | |||
51 | /* | ||
52 | * Here we notify other drivers of the proposed change and the final change. | ||
53 | */ | ||
54 | static int loongson2_cpufreq_target(struct cpufreq_policy *policy, | ||
55 | unsigned int target_freq, | ||
56 | unsigned int relation) | ||
57 | { | ||
58 | unsigned int cpu = policy->cpu; | ||
59 | unsigned int newstate = 0; | ||
60 | cpumask_t cpus_allowed; | ||
61 | struct cpufreq_freqs freqs; | ||
62 | unsigned int freq; | ||
63 | |||
64 | if (!cpu_online(cpu)) | ||
65 | return -ENODEV; | ||
66 | |||
67 | cpus_allowed = current->cpus_allowed; | ||
68 | set_cpus_allowed(current, cpumask_of_cpu(cpu)); | ||
69 | |||
70 | if (cpufreq_frequency_table_target | ||
71 | (policy, &loongson2_clockmod_table[0], target_freq, relation, | ||
72 | &newstate)) | ||
73 | return -EINVAL; | ||
74 | |||
75 | freq = | ||
76 | ((cpu_clock_freq / 1000) * | ||
77 | loongson2_clockmod_table[newstate].index) / 8; | ||
78 | if (freq < policy->min || freq > policy->max) | ||
79 | return -EINVAL; | ||
80 | |||
81 | pr_debug("cpufreq: requested frequency %u Hz\n", target_freq * 1000); | ||
82 | |||
83 | freqs.cpu = cpu; | ||
84 | freqs.old = loongson2_cpufreq_get(cpu); | ||
85 | freqs.new = freq; | ||
86 | freqs.flags = 0; | ||
87 | |||
88 | if (freqs.new == freqs.old) | ||
89 | return 0; | ||
90 | |||
91 | /* notifiers */ | ||
92 | cpufreq_notify_transition(&freqs, CPUFREQ_PRECHANGE); | ||
93 | |||
94 | set_cpus_allowed(current, cpus_allowed); | ||
95 | |||
96 | /* setting the cpu frequency */ | ||
97 | clk_set_rate(cpuclk, freq); | ||
98 | |||
99 | /* notifiers */ | ||
100 | cpufreq_notify_transition(&freqs, CPUFREQ_POSTCHANGE); | ||
101 | |||
102 | pr_debug("cpufreq: set frequency %u kHz\n", freq); | ||
103 | |||
104 | return 0; | ||
105 | } | ||
106 | |||
107 | static int loongson2_cpufreq_cpu_init(struct cpufreq_policy *policy) | ||
108 | { | ||
109 | int i; | ||
110 | |||
111 | if (!cpu_online(policy->cpu)) | ||
112 | return -ENODEV; | ||
113 | |||
114 | cpuclk = clk_get(NULL, "cpu_clk"); | ||
115 | if (IS_ERR(cpuclk)) { | ||
116 | printk(KERN_ERR "cpufreq: couldn't get CPU clk\n"); | ||
117 | return PTR_ERR(cpuclk); | ||
118 | } | ||
119 | |||
120 | cpuclk->rate = cpu_clock_freq / 1000; | ||
121 | if (!cpuclk->rate) | ||
122 | return -EINVAL; | ||
123 | |||
124 | /* clock table init */ | ||
125 | for (i = 2; | ||
126 | (loongson2_clockmod_table[i].frequency != CPUFREQ_TABLE_END); | ||
127 | i++) | ||
128 | loongson2_clockmod_table[i].frequency = (cpuclk->rate * i) / 8; | ||
129 | |||
130 | policy->cur = loongson2_cpufreq_get(policy->cpu); | ||
131 | |||
132 | cpufreq_frequency_table_get_attr(&loongson2_clockmod_table[0], | ||
133 | policy->cpu); | ||
134 | |||
135 | return cpufreq_frequency_table_cpuinfo(policy, | ||
136 | &loongson2_clockmod_table[0]); | ||
137 | } | ||
138 | |||
139 | static int loongson2_cpufreq_verify(struct cpufreq_policy *policy) | ||
140 | { | ||
141 | return cpufreq_frequency_table_verify(policy, | ||
142 | &loongson2_clockmod_table[0]); | ||
143 | } | ||
144 | |||
145 | static int loongson2_cpufreq_exit(struct cpufreq_policy *policy) | ||
146 | { | ||
147 | clk_put(cpuclk); | ||
148 | return 0; | ||
149 | } | ||
150 | |||
151 | static struct freq_attr *loongson2_table_attr[] = { | ||
152 | &cpufreq_freq_attr_scaling_available_freqs, | ||
153 | NULL, | ||
154 | }; | ||
155 | |||
156 | static struct cpufreq_driver loongson2_cpufreq_driver = { | ||
157 | .owner = THIS_MODULE, | ||
158 | .name = "loongson2", | ||
159 | .init = loongson2_cpufreq_cpu_init, | ||
160 | .verify = loongson2_cpufreq_verify, | ||
161 | .target = loongson2_cpufreq_target, | ||
162 | .get = loongson2_cpufreq_get, | ||
163 | .exit = loongson2_cpufreq_exit, | ||
164 | .attr = loongson2_table_attr, | ||
165 | }; | ||
166 | |||
167 | static struct platform_device_id platform_device_ids[] = { | ||
168 | { | ||
169 | .name = "loongson2_cpufreq", | ||
170 | }, | ||
171 | {} | ||
172 | }; | ||
173 | |||
174 | MODULE_DEVICE_TABLE(platform, platform_device_ids); | ||
175 | |||
176 | static struct platform_driver platform_driver = { | ||
177 | .driver = { | ||
178 | .name = "loongson2_cpufreq", | ||
179 | .owner = THIS_MODULE, | ||
180 | }, | ||
181 | .id_table = platform_device_ids, | ||
182 | }; | ||
183 | |||
184 | static int __init cpufreq_init(void) | ||
185 | { | ||
186 | int ret; | ||
187 | |||
188 | /* Register platform stuff */ | ||
189 | ret = platform_driver_register(&platform_driver); | ||
190 | if (ret) | ||
191 | return ret; | ||
192 | |||
193 | pr_info("cpufreq: Loongson-2F CPU frequency driver.\n"); | ||
194 | |||
195 | cpufreq_register_notifier(&loongson2_cpufreq_notifier_block, | ||
196 | CPUFREQ_TRANSITION_NOTIFIER); | ||
197 | |||
198 | ret = cpufreq_register_driver(&loongson2_cpufreq_driver); | ||
199 | |||
200 | if (!ret && !nowait) { | ||
201 | saved_cpu_wait = cpu_wait; | ||
202 | cpu_wait = loongson2_cpu_wait; | ||
203 | } | ||
204 | |||
205 | return ret; | ||
206 | } | ||
207 | |||
208 | static void __exit cpufreq_exit(void) | ||
209 | { | ||
210 | if (!nowait && saved_cpu_wait) | ||
211 | cpu_wait = saved_cpu_wait; | ||
212 | cpufreq_unregister_driver(&loongson2_cpufreq_driver); | ||
213 | cpufreq_unregister_notifier(&loongson2_cpufreq_notifier_block, | ||
214 | CPUFREQ_TRANSITION_NOTIFIER); | ||
215 | |||
216 | platform_driver_unregister(&platform_driver); | ||
217 | } | ||
218 | |||
219 | module_init(cpufreq_init); | ||
220 | module_exit(cpufreq_exit); | ||
221 | |||
222 | module_param(nowait, uint, 0644); | ||
223 | MODULE_PARM_DESC(nowait, "Disable Loongson-2F specific wait"); | ||
224 | |||
225 | MODULE_AUTHOR("Yanhua <yanh@lemote.com>"); | ||
226 | MODULE_DESCRIPTION("cpufreq driver for Loongson2F"); | ||
227 | MODULE_LICENSE("GPL"); | ||
diff --git a/arch/mips/kernel/csrc-powertv.c b/arch/mips/kernel/csrc-powertv.c new file mode 100644 index 000000000000..a27c16c8690e --- /dev/null +++ b/arch/mips/kernel/csrc-powertv.c | |||
@@ -0,0 +1,180 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Scientific-Atlanta, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or | ||
5 | * modify it under the terms of the GNU General Public License | ||
6 | * as published by the Free Software Foundation; either version 2 | ||
7 | * of the License, or (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
17 | */ | ||
18 | /* | ||
19 | * The file comes from kernel/csrc-r4k.c | ||
20 | */ | ||
21 | #include <linux/clocksource.h> | ||
22 | #include <linux/init.h> | ||
23 | |||
24 | #include <asm/time.h> /* Not included in linux/time.h */ | ||
25 | |||
26 | #include <asm/mach-powertv/asic_regs.h> | ||
27 | #include "powertv-clock.h" | ||
28 | |||
29 | /* MIPS PLL Register Definitions */ | ||
30 | #define PLL_GET_M(x) (((x) >> 8) & 0x000000FF) | ||
31 | #define PLL_GET_N(x) (((x) >> 16) & 0x000000FF) | ||
32 | #define PLL_GET_P(x) (((x) >> 24) & 0x00000007) | ||
33 | |||
34 | /* | ||
35 | * returns: Clock frequency in kHz | ||
36 | */ | ||
37 | unsigned int __init mips_get_pll_freq(void) | ||
38 | { | ||
39 | unsigned int pll_reg, m, n, p; | ||
40 | unsigned int fin = 54000; /* Base frequency in kHz */ | ||
41 | unsigned int fout; | ||
42 | |||
43 | /* Read PLL register setting */ | ||
44 | pll_reg = asic_read(mips_pll_setup); | ||
45 | m = PLL_GET_M(pll_reg); | ||
46 | n = PLL_GET_N(pll_reg); | ||
47 | p = PLL_GET_P(pll_reg); | ||
48 | pr_info("MIPS PLL Register:0x%x M=%d N=%d P=%d\n", pll_reg, m, n, p); | ||
49 | |||
50 | /* Calculate clock frequency = (2 * N * 54MHz) / (M * (2**P)) */ | ||
51 | fout = ((2 * n * fin) / (m * (0x01 << p))); | ||
52 | |||
53 | pr_info("MIPS Clock Freq=%d kHz\n", fout); | ||
54 | |||
55 | return fout; | ||
56 | } | ||
57 | |||
58 | static cycle_t c0_hpt_read(struct clocksource *cs) | ||
59 | { | ||
60 | return read_c0_count(); | ||
61 | } | ||
62 | |||
63 | static struct clocksource clocksource_mips = { | ||
64 | .name = "powertv-counter", | ||
65 | .read = c0_hpt_read, | ||
66 | .mask = CLOCKSOURCE_MASK(32), | ||
67 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
68 | }; | ||
69 | |||
70 | static void __init powertv_c0_hpt_clocksource_init(void) | ||
71 | { | ||
72 | unsigned int pll_freq = mips_get_pll_freq(); | ||
73 | |||
74 | pr_info("CPU frequency %d.%02d MHz\n", pll_freq / 1000, | ||
75 | (pll_freq % 1000) * 100 / 1000); | ||
76 | |||
77 | mips_hpt_frequency = pll_freq / 2 * 1000; | ||
78 | |||
79 | clocksource_mips.rating = 200 + mips_hpt_frequency / 10000000; | ||
80 | |||
81 | clocksource_set_clock(&clocksource_mips, mips_hpt_frequency); | ||
82 | |||
83 | clocksource_register(&clocksource_mips); | ||
84 | } | ||
85 | |||
86 | /** | ||
87 | * struct tim_c - free running counter | ||
88 | * @hi: High 16 bits of the counter | ||
89 | * @lo: Low 32 bits of the counter | ||
90 | * | ||
91 | * Lays out the structure of the free running counter in memory. This counter | ||
92 | * increments at a rate of 27 MHz/8 on all platforms. | ||
93 | */ | ||
94 | struct tim_c { | ||
95 | unsigned int hi; | ||
96 | unsigned int lo; | ||
97 | }; | ||
98 | |||
99 | static struct tim_c *tim_c; | ||
100 | |||
101 | static cycle_t tim_c_read(struct clocksource *cs) | ||
102 | { | ||
103 | unsigned int hi; | ||
104 | unsigned int next_hi; | ||
105 | unsigned int lo; | ||
106 | |||
107 | hi = readl(&tim_c->hi); | ||
108 | |||
109 | for (;;) { | ||
110 | lo = readl(&tim_c->lo); | ||
111 | next_hi = readl(&tim_c->hi); | ||
112 | if (next_hi == hi) | ||
113 | break; | ||
114 | hi = next_hi; | ||
115 | } | ||
116 | |||
117 | pr_crit("%s: read %llx\n", __func__, ((u64) hi << 32) | lo); | ||
118 | return ((u64) hi << 32) | lo; | ||
119 | } | ||
120 | |||
121 | #define TIM_C_SIZE 48 /* # bits in the timer */ | ||
122 | |||
123 | static struct clocksource clocksource_tim_c = { | ||
124 | .name = "powertv-tim_c", | ||
125 | .read = tim_c_read, | ||
126 | .mask = CLOCKSOURCE_MASK(TIM_C_SIZE), | ||
127 | .flags = CLOCK_SOURCE_IS_CONTINUOUS, | ||
128 | }; | ||
129 | |||
130 | /** | ||
131 | * powertv_tim_c_clocksource_init - set up a clock source for the TIM_C clock | ||
132 | * | ||
133 | * The hard part here is coming up with a constant k and shift s such that | ||
134 | * the 48-bit TIM_C value multiplied by k doesn't overflow and that value, | ||
135 | * when shifted right by s, yields the corresponding number of nanoseconds. | ||
136 | * We know that TIM_C counts at 27 MHz/8, so each cycle corresponds to | ||
137 | * 1 / (27,000,000/8) seconds. Multiply that by a billion and you get the | ||
138 | * number of nanoseconds. Since the TIM_C value has 48 bits and the math is | ||
139 | * done in 64 bits, avoiding an overflow means that k must be less than | ||
140 | * 64 - 48 = 16 bits. | ||
141 | */ | ||
142 | static void __init powertv_tim_c_clocksource_init(void) | ||
143 | { | ||
144 | int prescale; | ||
145 | unsigned long dividend; | ||
146 | unsigned long k; | ||
147 | int s; | ||
148 | const int max_k_bits = (64 - 48) - 1; | ||
149 | const unsigned long billion = 1000000000; | ||
150 | const unsigned long counts_per_second = 27000000 / 8; | ||
151 | |||
152 | prescale = BITS_PER_LONG - ilog2(billion) - 1; | ||
153 | dividend = billion << prescale; | ||
154 | k = dividend / counts_per_second; | ||
155 | s = ilog2(k) - max_k_bits; | ||
156 | |||
157 | if (s < 0) | ||
158 | s = prescale; | ||
159 | |||
160 | else { | ||
161 | k >>= s; | ||
162 | s += prescale; | ||
163 | } | ||
164 | |||
165 | clocksource_tim_c.mult = k; | ||
166 | clocksource_tim_c.shift = s; | ||
167 | clocksource_tim_c.rating = 200; | ||
168 | |||
169 | clocksource_register(&clocksource_tim_c); | ||
170 | tim_c = (struct tim_c *) asic_reg_addr(tim_ch); | ||
171 | } | ||
172 | |||
173 | /** | ||
174 | powertv_clocksource_init - initialize all clocksources | ||
175 | */ | ||
176 | void __init powertv_clocksource_init(void) | ||
177 | { | ||
178 | powertv_c0_hpt_clocksource_init(); | ||
179 | powertv_tim_c_clocksource_init(); | ||
180 | } | ||
diff --git a/arch/mips/kernel/ftrace.c b/arch/mips/kernel/ftrace.c new file mode 100644 index 000000000000..68b067040d8b --- /dev/null +++ b/arch/mips/kernel/ftrace.c | |||
@@ -0,0 +1,275 @@ | |||
1 | /* | ||
2 | * Code for replacing ftrace calls with jumps. | ||
3 | * | ||
4 | * Copyright (C) 2007-2008 Steven Rostedt <srostedt@redhat.com> | ||
5 | * Copyright (C) 2009 DSLab, Lanzhou University, China | ||
6 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
7 | * | ||
8 | * Thanks goes to Steven Rostedt for writing the original x86 version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/uaccess.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/ftrace.h> | ||
14 | |||
15 | #include <asm/cacheflush.h> | ||
16 | #include <asm/asm.h> | ||
17 | #include <asm/asm-offsets.h> | ||
18 | |||
19 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
20 | |||
21 | #define JAL 0x0c000000 /* jump & link: ip --> ra, jump to target */ | ||
22 | #define ADDR_MASK 0x03ffffff /* op_code|addr : 31...26|25 ....0 */ | ||
23 | #define jump_insn_encode(op_code, addr) \ | ||
24 | ((unsigned int)((op_code) | (((addr) >> 2) & ADDR_MASK))) | ||
25 | |||
26 | static unsigned int ftrace_nop = 0x00000000; | ||
27 | |||
28 | static int ftrace_modify_code(unsigned long ip, unsigned int new_code) | ||
29 | { | ||
30 | int faulted; | ||
31 | |||
32 | /* *(unsigned int *)ip = new_code; */ | ||
33 | safe_store_code(new_code, ip, faulted); | ||
34 | |||
35 | if (unlikely(faulted)) | ||
36 | return -EFAULT; | ||
37 | |||
38 | flush_icache_range(ip, ip + 8); | ||
39 | |||
40 | return 0; | ||
41 | } | ||
42 | |||
43 | static int lui_v1; | ||
44 | static int jal_mcount; | ||
45 | |||
46 | int ftrace_make_nop(struct module *mod, | ||
47 | struct dyn_ftrace *rec, unsigned long addr) | ||
48 | { | ||
49 | unsigned int new; | ||
50 | int faulted; | ||
51 | unsigned long ip = rec->ip; | ||
52 | |||
53 | /* We have compiled module with -mlong-calls, but compiled the kernel | ||
54 | * without it, we need to cope with them respectively. */ | ||
55 | if (ip & 0x40000000) { | ||
56 | /* record it for ftrace_make_call */ | ||
57 | if (lui_v1 == 0) { | ||
58 | /* lui_v1 = *(unsigned int *)ip; */ | ||
59 | safe_load_code(lui_v1, ip, faulted); | ||
60 | |||
61 | if (unlikely(faulted)) | ||
62 | return -EFAULT; | ||
63 | } | ||
64 | |||
65 | /* lui v1, hi_16bit_of_mcount --> b 1f (0x10000004) | ||
66 | * addiu v1, v1, low_16bit_of_mcount | ||
67 | * move at, ra | ||
68 | * jalr v1 | ||
69 | * nop | ||
70 | * 1f: (ip + 12) | ||
71 | */ | ||
72 | new = 0x10000004; | ||
73 | } else { | ||
74 | /* record/calculate it for ftrace_make_call */ | ||
75 | if (jal_mcount == 0) { | ||
76 | /* We can record it directly like this: | ||
77 | * jal_mcount = *(unsigned int *)ip; | ||
78 | * Herein, jump over the first two nop instructions */ | ||
79 | jal_mcount = jump_insn_encode(JAL, (MCOUNT_ADDR + 8)); | ||
80 | } | ||
81 | |||
82 | /* move at, ra | ||
83 | * jalr v1 --> nop | ||
84 | */ | ||
85 | new = ftrace_nop; | ||
86 | } | ||
87 | return ftrace_modify_code(ip, new); | ||
88 | } | ||
89 | |||
90 | static int modified; /* initialized as 0 by default */ | ||
91 | |||
92 | int ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr) | ||
93 | { | ||
94 | unsigned int new; | ||
95 | unsigned long ip = rec->ip; | ||
96 | |||
97 | /* We just need to remove the "b ftrace_stub" at the fist time! */ | ||
98 | if (modified == 0) { | ||
99 | modified = 1; | ||
100 | ftrace_modify_code(addr, ftrace_nop); | ||
101 | } | ||
102 | /* ip, module: 0xc0000000, kernel: 0x80000000 */ | ||
103 | new = (ip & 0x40000000) ? lui_v1 : jal_mcount; | ||
104 | |||
105 | return ftrace_modify_code(ip, new); | ||
106 | } | ||
107 | |||
108 | #define FTRACE_CALL_IP ((unsigned long)(&ftrace_call)) | ||
109 | |||
110 | int ftrace_update_ftrace_func(ftrace_func_t func) | ||
111 | { | ||
112 | unsigned int new; | ||
113 | |||
114 | new = jump_insn_encode(JAL, (unsigned long)func); | ||
115 | |||
116 | return ftrace_modify_code(FTRACE_CALL_IP, new); | ||
117 | } | ||
118 | |||
119 | int __init ftrace_dyn_arch_init(void *data) | ||
120 | { | ||
121 | /* The return code is retured via data */ | ||
122 | *(unsigned long *)data = 0; | ||
123 | |||
124 | return 0; | ||
125 | } | ||
126 | #endif /* CONFIG_DYNAMIC_FTRACE */ | ||
127 | |||
128 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
129 | |||
130 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
131 | |||
132 | extern void ftrace_graph_call(void); | ||
133 | #define JMP 0x08000000 /* jump to target directly */ | ||
134 | #define CALL_FTRACE_GRAPH_CALLER \ | ||
135 | jump_insn_encode(JMP, (unsigned long)(&ftrace_graph_caller)) | ||
136 | #define FTRACE_GRAPH_CALL_IP ((unsigned long)(&ftrace_graph_call)) | ||
137 | |||
138 | int ftrace_enable_ftrace_graph_caller(void) | ||
139 | { | ||
140 | return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, | ||
141 | CALL_FTRACE_GRAPH_CALLER); | ||
142 | } | ||
143 | |||
144 | int ftrace_disable_ftrace_graph_caller(void) | ||
145 | { | ||
146 | return ftrace_modify_code(FTRACE_GRAPH_CALL_IP, ftrace_nop); | ||
147 | } | ||
148 | |||
149 | #endif /* !CONFIG_DYNAMIC_FTRACE */ | ||
150 | |||
151 | #ifndef KBUILD_MCOUNT_RA_ADDRESS | ||
152 | #define S_RA_SP (0xafbf << 16) /* s{d,w} ra, offset(sp) */ | ||
153 | #define S_R_SP (0xafb0 << 16) /* s{d,w} R, offset(sp) */ | ||
154 | #define OFFSET_MASK 0xffff /* stack offset range: 0 ~ PT_SIZE */ | ||
155 | |||
156 | unsigned long ftrace_get_parent_addr(unsigned long self_addr, | ||
157 | unsigned long parent, | ||
158 | unsigned long parent_addr, | ||
159 | unsigned long fp) | ||
160 | { | ||
161 | unsigned long sp, ip, ra; | ||
162 | unsigned int code; | ||
163 | int faulted; | ||
164 | |||
165 | /* in module or kernel? */ | ||
166 | if (self_addr & 0x40000000) { | ||
167 | /* module: move to the instruction "lui v1, HI_16BIT_OF_MCOUNT" */ | ||
168 | ip = self_addr - 20; | ||
169 | } else { | ||
170 | /* kernel: move to the instruction "move ra, at" */ | ||
171 | ip = self_addr - 12; | ||
172 | } | ||
173 | |||
174 | /* search the text until finding the non-store instruction or "s{d,w} | ||
175 | * ra, offset(sp)" instruction */ | ||
176 | do { | ||
177 | ip -= 4; | ||
178 | |||
179 | /* get the code at "ip": code = *(unsigned int *)ip; */ | ||
180 | safe_load_code(code, ip, faulted); | ||
181 | |||
182 | if (unlikely(faulted)) | ||
183 | return 0; | ||
184 | |||
185 | /* If we hit the non-store instruction before finding where the | ||
186 | * ra is stored, then this is a leaf function and it does not | ||
187 | * store the ra on the stack. */ | ||
188 | if ((code & S_R_SP) != S_R_SP) | ||
189 | return parent_addr; | ||
190 | |||
191 | } while (((code & S_RA_SP) != S_RA_SP)); | ||
192 | |||
193 | sp = fp + (code & OFFSET_MASK); | ||
194 | |||
195 | /* ra = *(unsigned long *)sp; */ | ||
196 | safe_load_stack(ra, sp, faulted); | ||
197 | if (unlikely(faulted)) | ||
198 | return 0; | ||
199 | |||
200 | if (ra == parent) | ||
201 | return sp; | ||
202 | return 0; | ||
203 | } | ||
204 | |||
205 | #endif | ||
206 | |||
207 | /* | ||
208 | * Hook the return address and push it in the stack of return addrs | ||
209 | * in current thread info. | ||
210 | */ | ||
211 | void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr, | ||
212 | unsigned long fp) | ||
213 | { | ||
214 | unsigned long old; | ||
215 | struct ftrace_graph_ent trace; | ||
216 | unsigned long return_hooker = (unsigned long) | ||
217 | &return_to_handler; | ||
218 | int faulted; | ||
219 | |||
220 | if (unlikely(atomic_read(¤t->tracing_graph_pause))) | ||
221 | return; | ||
222 | |||
223 | /* "parent" is the stack address saved the return address of the caller | ||
224 | * of _mcount. | ||
225 | * | ||
226 | * if the gcc < 4.5, a leaf function does not save the return address | ||
227 | * in the stack address, so, we "emulate" one in _mcount's stack space, | ||
228 | * and hijack it directly, but for a non-leaf function, it save the | ||
229 | * return address to the its own stack space, we can not hijack it | ||
230 | * directly, but need to find the real stack address, | ||
231 | * ftrace_get_parent_addr() does it! | ||
232 | * | ||
233 | * if gcc>= 4.5, with the new -mmcount-ra-address option, for a | ||
234 | * non-leaf function, the location of the return address will be saved | ||
235 | * to $12 for us, and for a leaf function, only put a zero into $12. we | ||
236 | * do it in ftrace_graph_caller of mcount.S. | ||
237 | */ | ||
238 | |||
239 | /* old = *parent; */ | ||
240 | safe_load_stack(old, parent, faulted); | ||
241 | if (unlikely(faulted)) | ||
242 | goto out; | ||
243 | #ifndef KBUILD_MCOUNT_RA_ADDRESS | ||
244 | parent = (unsigned long *)ftrace_get_parent_addr(self_addr, old, | ||
245 | (unsigned long)parent, | ||
246 | fp); | ||
247 | /* If fails when getting the stack address of the non-leaf function's | ||
248 | * ra, stop function graph tracer and return */ | ||
249 | if (parent == 0) | ||
250 | goto out; | ||
251 | #endif | ||
252 | /* *parent = return_hooker; */ | ||
253 | safe_store_stack(return_hooker, parent, faulted); | ||
254 | if (unlikely(faulted)) | ||
255 | goto out; | ||
256 | |||
257 | if (ftrace_push_return_trace(old, self_addr, &trace.depth, fp) == | ||
258 | -EBUSY) { | ||
259 | *parent = old; | ||
260 | return; | ||
261 | } | ||
262 | |||
263 | trace.func = self_addr; | ||
264 | |||
265 | /* Only trace if the calling function expects to */ | ||
266 | if (!ftrace_graph_entry(&trace)) { | ||
267 | current->curr_ret_stack--; | ||
268 | *parent = old; | ||
269 | } | ||
270 | return; | ||
271 | out: | ||
272 | ftrace_graph_stop(); | ||
273 | WARN_ON(1); | ||
274 | } | ||
275 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c index 8b0b4181219f..981f86c26168 100644 --- a/arch/mips/kernel/irq.c +++ b/arch/mips/kernel/irq.c | |||
@@ -22,6 +22,7 @@ | |||
22 | #include <linux/seq_file.h> | 22 | #include <linux/seq_file.h> |
23 | #include <linux/kallsyms.h> | 23 | #include <linux/kallsyms.h> |
24 | #include <linux/kgdb.h> | 24 | #include <linux/kgdb.h> |
25 | #include <linux/ftrace.h> | ||
25 | 26 | ||
26 | #include <asm/atomic.h> | 27 | #include <asm/atomic.h> |
27 | #include <asm/system.h> | 28 | #include <asm/system.h> |
@@ -150,3 +151,32 @@ void __init init_IRQ(void) | |||
150 | kgdb_early_setup = 1; | 151 | kgdb_early_setup = 1; |
151 | #endif | 152 | #endif |
152 | } | 153 | } |
154 | |||
155 | /* | ||
156 | * do_IRQ handles all normal device IRQ's (the special | ||
157 | * SMP cross-CPU interrupts have their own specific | ||
158 | * handlers). | ||
159 | */ | ||
160 | void __irq_entry do_IRQ(unsigned int irq) | ||
161 | { | ||
162 | irq_enter(); | ||
163 | __DO_IRQ_SMTC_HOOK(irq); | ||
164 | generic_handle_irq(irq); | ||
165 | irq_exit(); | ||
166 | } | ||
167 | |||
168 | #ifdef CONFIG_MIPS_MT_SMTC_IRQAFF | ||
169 | /* | ||
170 | * To avoid inefficient and in some cases pathological re-checking of | ||
171 | * IRQ affinity, we have this variant that skips the affinity check. | ||
172 | */ | ||
173 | |||
174 | void __irq_entry do_IRQ_no_affinity(unsigned int irq) | ||
175 | { | ||
176 | irq_enter(); | ||
177 | __NO_AFFINITY_IRQ_SMTC_HOOK(irq); | ||
178 | generic_handle_irq(irq); | ||
179 | irq_exit(); | ||
180 | } | ||
181 | |||
182 | #endif /* CONFIG_MIPS_MT_SMTC_IRQAFF */ | ||
diff --git a/arch/mips/kernel/mcount.S b/arch/mips/kernel/mcount.S new file mode 100644 index 000000000000..0a9cfdb271dd --- /dev/null +++ b/arch/mips/kernel/mcount.S | |||
@@ -0,0 +1,189 @@ | |||
1 | /* | ||
2 | * MIPS specific _mcount support | ||
3 | * | ||
4 | * This file is subject to the terms and conditions of the GNU General Public | ||
5 | * License. See the file "COPYING" in the main directory of this archive for | ||
6 | * more details. | ||
7 | * | ||
8 | * Copyright (C) 2009 Lemote Inc. & DSLab, Lanzhou University, China | ||
9 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
10 | */ | ||
11 | |||
12 | #include <asm/regdef.h> | ||
13 | #include <asm/stackframe.h> | ||
14 | #include <asm/ftrace.h> | ||
15 | |||
16 | .text | ||
17 | .set noreorder | ||
18 | .set noat | ||
19 | |||
20 | .macro MCOUNT_SAVE_REGS | ||
21 | PTR_SUBU sp, PT_SIZE | ||
22 | PTR_S ra, PT_R31(sp) | ||
23 | PTR_S AT, PT_R1(sp) | ||
24 | PTR_S a0, PT_R4(sp) | ||
25 | PTR_S a1, PT_R5(sp) | ||
26 | PTR_S a2, PT_R6(sp) | ||
27 | PTR_S a3, PT_R7(sp) | ||
28 | #ifdef CONFIG_64BIT | ||
29 | PTR_S a4, PT_R8(sp) | ||
30 | PTR_S a5, PT_R9(sp) | ||
31 | PTR_S a6, PT_R10(sp) | ||
32 | PTR_S a7, PT_R11(sp) | ||
33 | #endif | ||
34 | .endm | ||
35 | |||
36 | .macro MCOUNT_RESTORE_REGS | ||
37 | PTR_L ra, PT_R31(sp) | ||
38 | PTR_L AT, PT_R1(sp) | ||
39 | PTR_L a0, PT_R4(sp) | ||
40 | PTR_L a1, PT_R5(sp) | ||
41 | PTR_L a2, PT_R6(sp) | ||
42 | PTR_L a3, PT_R7(sp) | ||
43 | #ifdef CONFIG_64BIT | ||
44 | PTR_L a4, PT_R8(sp) | ||
45 | PTR_L a5, PT_R9(sp) | ||
46 | PTR_L a6, PT_R10(sp) | ||
47 | PTR_L a7, PT_R11(sp) | ||
48 | #endif | ||
49 | #ifdef CONFIG_64BIT | ||
50 | PTR_ADDIU sp, PT_SIZE | ||
51 | #else | ||
52 | PTR_ADDIU sp, (PT_SIZE + 8) | ||
53 | #endif | ||
54 | .endm | ||
55 | |||
56 | .macro RETURN_BACK | ||
57 | jr ra | ||
58 | move ra, AT | ||
59 | .endm | ||
60 | |||
61 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
62 | |||
63 | NESTED(ftrace_caller, PT_SIZE, ra) | ||
64 | .globl _mcount | ||
65 | _mcount: | ||
66 | b ftrace_stub | ||
67 | nop | ||
68 | lw t1, function_trace_stop | ||
69 | bnez t1, ftrace_stub | ||
70 | nop | ||
71 | |||
72 | MCOUNT_SAVE_REGS | ||
73 | #ifdef KBUILD_MCOUNT_RA_ADDRESS | ||
74 | PTR_S t0, PT_R12(sp) /* t0 saved the location of the return address(at) by -mmcount-ra-address */ | ||
75 | #endif | ||
76 | |||
77 | move a0, ra /* arg1: next ip, selfaddr */ | ||
78 | .globl ftrace_call | ||
79 | ftrace_call: | ||
80 | nop /* a placeholder for the call to a real tracing function */ | ||
81 | move a1, AT /* arg2: the caller's next ip, parent */ | ||
82 | |||
83 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
84 | .globl ftrace_graph_call | ||
85 | ftrace_graph_call: | ||
86 | nop | ||
87 | nop | ||
88 | #endif | ||
89 | |||
90 | MCOUNT_RESTORE_REGS | ||
91 | .globl ftrace_stub | ||
92 | ftrace_stub: | ||
93 | RETURN_BACK | ||
94 | END(ftrace_caller) | ||
95 | |||
96 | #else /* ! CONFIG_DYNAMIC_FTRACE */ | ||
97 | |||
98 | NESTED(_mcount, PT_SIZE, ra) | ||
99 | lw t1, function_trace_stop | ||
100 | bnez t1, ftrace_stub | ||
101 | nop | ||
102 | PTR_LA t1, ftrace_stub | ||
103 | PTR_L t2, ftrace_trace_function /* Prepare t2 for (1) */ | ||
104 | bne t1, t2, static_trace | ||
105 | nop | ||
106 | |||
107 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
108 | PTR_L t3, ftrace_graph_return | ||
109 | bne t1, t3, ftrace_graph_caller | ||
110 | nop | ||
111 | PTR_LA t1, ftrace_graph_entry_stub | ||
112 | PTR_L t3, ftrace_graph_entry | ||
113 | bne t1, t3, ftrace_graph_caller | ||
114 | nop | ||
115 | #endif | ||
116 | b ftrace_stub | ||
117 | nop | ||
118 | |||
119 | static_trace: | ||
120 | MCOUNT_SAVE_REGS | ||
121 | |||
122 | move a0, ra /* arg1: next ip, selfaddr */ | ||
123 | jalr t2 /* (1) call *ftrace_trace_function */ | ||
124 | move a1, AT /* arg2: the caller's next ip, parent */ | ||
125 | |||
126 | MCOUNT_RESTORE_REGS | ||
127 | .globl ftrace_stub | ||
128 | ftrace_stub: | ||
129 | RETURN_BACK | ||
130 | END(_mcount) | ||
131 | |||
132 | #endif /* ! CONFIG_DYNAMIC_FTRACE */ | ||
133 | |||
134 | #ifdef CONFIG_FUNCTION_GRAPH_TRACER | ||
135 | |||
136 | NESTED(ftrace_graph_caller, PT_SIZE, ra) | ||
137 | #ifdef CONFIG_DYNAMIC_FTRACE | ||
138 | PTR_L a1, PT_R31(sp) /* load the original ra from the stack */ | ||
139 | #ifdef KBUILD_MCOUNT_RA_ADDRESS | ||
140 | PTR_L t0, PT_R12(sp) /* load the original t0 from the stack */ | ||
141 | #endif | ||
142 | #else | ||
143 | MCOUNT_SAVE_REGS | ||
144 | move a1, ra /* arg2: next ip, selfaddr */ | ||
145 | #endif | ||
146 | |||
147 | #ifdef KBUILD_MCOUNT_RA_ADDRESS | ||
148 | bnez t0, 1f /* non-leaf func: t0 saved the location of the return address */ | ||
149 | nop | ||
150 | PTR_LA t0, PT_R1(sp) /* leaf func: get the location of at(old ra) from our own stack */ | ||
151 | 1: move a0, t0 /* arg1: the location of the return address */ | ||
152 | #else | ||
153 | PTR_LA a0, PT_R1(sp) /* arg1: &AT -> a0 */ | ||
154 | #endif | ||
155 | jal prepare_ftrace_return | ||
156 | #ifdef CONFIG_FRAME_POINTER | ||
157 | move a2, fp /* arg3: frame pointer */ | ||
158 | #else | ||
159 | #ifdef CONFIG_64BIT | ||
160 | PTR_LA a2, PT_SIZE(sp) | ||
161 | #else | ||
162 | PTR_LA a2, (PT_SIZE+8)(sp) | ||
163 | #endif | ||
164 | #endif | ||
165 | |||
166 | MCOUNT_RESTORE_REGS | ||
167 | RETURN_BACK | ||
168 | END(ftrace_graph_caller) | ||
169 | |||
170 | .align 2 | ||
171 | .globl return_to_handler | ||
172 | return_to_handler: | ||
173 | PTR_SUBU sp, PT_SIZE | ||
174 | PTR_S v0, PT_R2(sp) | ||
175 | |||
176 | jal ftrace_return_to_handler | ||
177 | PTR_S v1, PT_R3(sp) | ||
178 | |||
179 | /* restore the real parent address: v0 -> ra */ | ||
180 | move ra, v0 | ||
181 | |||
182 | PTR_L v0, PT_R2(sp) | ||
183 | PTR_L v1, PT_R3(sp) | ||
184 | jr ra | ||
185 | PTR_ADDIU sp, PT_SIZE | ||
186 | #endif /* CONFIG_FUNCTION_GRAPH_TRACER */ | ||
187 | |||
188 | .set at | ||
189 | .set reorder | ||
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c index 225755d0c1f6..1d04807874db 100644 --- a/arch/mips/kernel/mips_ksyms.c +++ b/arch/mips/kernel/mips_ksyms.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <asm/checksum.h> | 13 | #include <asm/checksum.h> |
14 | #include <asm/pgtable.h> | 14 | #include <asm/pgtable.h> |
15 | #include <asm/uaccess.h> | 15 | #include <asm/uaccess.h> |
16 | #include <asm/ftrace.h> | ||
16 | 17 | ||
17 | extern void *__bzero(void *__s, size_t __count); | 18 | extern void *__bzero(void *__s, size_t __count); |
18 | extern long __strncpy_from_user_nocheck_asm(char *__to, | 19 | extern long __strncpy_from_user_nocheck_asm(char *__to, |
@@ -51,3 +52,7 @@ EXPORT_SYMBOL(csum_partial_copy_nocheck); | |||
51 | EXPORT_SYMBOL(__csum_partial_copy_user); | 52 | EXPORT_SYMBOL(__csum_partial_copy_user); |
52 | 53 | ||
53 | EXPORT_SYMBOL(invalid_pte_table); | 54 | EXPORT_SYMBOL(invalid_pte_table); |
55 | #ifdef CONFIG_FUNCTION_TRACER | ||
56 | /* _mcount is defined in arch/mips/kernel/mcount.S */ | ||
57 | EXPORT_SYMBOL(_mcount); | ||
58 | #endif | ||
diff --git a/arch/mips/kernel/setup.c b/arch/mips/kernel/setup.c index 2b290d70083e..f9513f9e61d3 100644 --- a/arch/mips/kernel/setup.c +++ b/arch/mips/kernel/setup.c | |||
@@ -58,8 +58,12 @@ EXPORT_SYMBOL(mips_machtype); | |||
58 | 58 | ||
59 | struct boot_mem_map boot_mem_map; | 59 | struct boot_mem_map boot_mem_map; |
60 | 60 | ||
61 | static char command_line[CL_SIZE]; | 61 | static char __initdata command_line[COMMAND_LINE_SIZE]; |
62 | char arcs_cmdline[CL_SIZE]=CONFIG_CMDLINE; | 62 | char __initdata arcs_cmdline[COMMAND_LINE_SIZE]; |
63 | |||
64 | #ifdef CONFIG_CMDLINE_BOOL | ||
65 | static char __initdata builtin_cmdline[COMMAND_LINE_SIZE] = CONFIG_CMDLINE; | ||
66 | #endif | ||
63 | 67 | ||
64 | /* | 68 | /* |
65 | * mips_io_port_base is the begin of the address space to which x86 style | 69 | * mips_io_port_base is the begin of the address space to which x86 style |
@@ -166,26 +170,8 @@ static unsigned long __init init_initrd(void) | |||
166 | * already set up initrd_start and initrd_end. In these cases | 170 | * already set up initrd_start and initrd_end. In these cases |
167 | * perfom sanity checks and use them if all looks good. | 171 | * perfom sanity checks and use them if all looks good. |
168 | */ | 172 | */ |
169 | if (!initrd_start || initrd_end <= initrd_start) { | 173 | if (!initrd_start || initrd_end <= initrd_start) |
170 | #ifdef CONFIG_PROBE_INITRD_HEADER | ||
171 | u32 *initrd_header; | ||
172 | |||
173 | /* | ||
174 | * See if initrd has been added to the kernel image by | ||
175 | * arch/mips/boot/addinitrd.c. In that case a header is | ||
176 | * prepended to initrd and is made up by 8 bytes. The first | ||
177 | * word is a magic number and the second one is the size of | ||
178 | * initrd. Initrd start must be page aligned in any cases. | ||
179 | */ | ||
180 | initrd_header = __va(PAGE_ALIGN(__pa_symbol(&_end) + 8)) - 8; | ||
181 | if (initrd_header[0] != 0x494E5244) | ||
182 | goto disable; | ||
183 | initrd_start = (unsigned long)(initrd_header + 2); | ||
184 | initrd_end = initrd_start + initrd_header[1]; | ||
185 | #else | ||
186 | goto disable; | 174 | goto disable; |
187 | #endif | ||
188 | } | ||
189 | 175 | ||
190 | if (initrd_start & ~PAGE_MASK) { | 176 | if (initrd_start & ~PAGE_MASK) { |
191 | pr_err("initrd start must be page aligned\n"); | 177 | pr_err("initrd start must be page aligned\n"); |
@@ -476,8 +462,20 @@ static void __init arch_mem_init(char **cmdline_p) | |||
476 | pr_info("Determined physical RAM map:\n"); | 462 | pr_info("Determined physical RAM map:\n"); |
477 | print_memory_map(); | 463 | print_memory_map(); |
478 | 464 | ||
479 | strlcpy(command_line, arcs_cmdline, sizeof(command_line)); | 465 | #ifdef CONFIG_CMDLINE_BOOL |
480 | strlcpy(boot_command_line, command_line, COMMAND_LINE_SIZE); | 466 | #ifdef CONFIG_CMDLINE_OVERRIDE |
467 | strlcpy(boot_command_line, builtin_cmdline, COMMAND_LINE_SIZE); | ||
468 | #else | ||
469 | if (builtin_cmdline[0]) { | ||
470 | strlcat(arcs_cmdline, " ", COMMAND_LINE_SIZE); | ||
471 | strlcat(arcs_cmdline, builtin_cmdline, COMMAND_LINE_SIZE); | ||
472 | } | ||
473 | strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); | ||
474 | #endif | ||
475 | #else | ||
476 | strlcpy(boot_command_line, arcs_cmdline, COMMAND_LINE_SIZE); | ||
477 | #endif | ||
478 | strlcpy(command_line, boot_command_line, COMMAND_LINE_SIZE); | ||
481 | 479 | ||
482 | *cmdline_p = command_line; | 480 | *cmdline_p = command_line; |
483 | 481 | ||
diff --git a/arch/mips/kernel/signal.c b/arch/mips/kernel/signal.c index 6254041b942f..d0c68b5d717b 100644 --- a/arch/mips/kernel/signal.c +++ b/arch/mips/kernel/signal.c | |||
@@ -35,6 +35,15 @@ | |||
35 | 35 | ||
36 | #include "signal-common.h" | 36 | #include "signal-common.h" |
37 | 37 | ||
38 | static int (*save_fp_context)(struct sigcontext __user *sc); | ||
39 | static int (*restore_fp_context)(struct sigcontext __user *sc); | ||
40 | |||
41 | extern asmlinkage int _save_fp_context(struct sigcontext __user *sc); | ||
42 | extern asmlinkage int _restore_fp_context(struct sigcontext __user *sc); | ||
43 | |||
44 | extern asmlinkage int fpu_emulator_save_context(struct sigcontext __user *sc); | ||
45 | extern asmlinkage int fpu_emulator_restore_context(struct sigcontext __user *sc); | ||
46 | |||
38 | /* | 47 | /* |
39 | * Horribly complicated - with the bloody RM9000 workarounds enabled | 48 | * Horribly complicated - with the bloody RM9000 workarounds enabled |
40 | * the signal trampolines is moving to the end of the structure so we can | 49 | * the signal trampolines is moving to the end of the structure so we can |
@@ -709,3 +718,40 @@ asmlinkage void do_notify_resume(struct pt_regs *regs, void *unused, | |||
709 | key_replace_session_keyring(); | 718 | key_replace_session_keyring(); |
710 | } | 719 | } |
711 | } | 720 | } |
721 | |||
722 | #ifdef CONFIG_SMP | ||
723 | static int smp_save_fp_context(struct sigcontext __user *sc) | ||
724 | { | ||
725 | return raw_cpu_has_fpu | ||
726 | ? _save_fp_context(sc) | ||
727 | : fpu_emulator_save_context(sc); | ||
728 | } | ||
729 | |||
730 | static int smp_restore_fp_context(struct sigcontext __user *sc) | ||
731 | { | ||
732 | return raw_cpu_has_fpu | ||
733 | ? _restore_fp_context(sc) | ||
734 | : fpu_emulator_restore_context(sc); | ||
735 | } | ||
736 | #endif | ||
737 | |||
738 | static int signal_setup(void) | ||
739 | { | ||
740 | #ifdef CONFIG_SMP | ||
741 | /* For now just do the cpu_has_fpu check when the functions are invoked */ | ||
742 | save_fp_context = smp_save_fp_context; | ||
743 | restore_fp_context = smp_restore_fp_context; | ||
744 | #else | ||
745 | if (cpu_has_fpu) { | ||
746 | save_fp_context = _save_fp_context; | ||
747 | restore_fp_context = _restore_fp_context; | ||
748 | } else { | ||
749 | save_fp_context = fpu_emulator_save_context; | ||
750 | restore_fp_context = fpu_emulator_restore_context; | ||
751 | } | ||
752 | #endif | ||
753 | |||
754 | return 0; | ||
755 | } | ||
756 | |||
757 | arch_initcall(signal_setup); | ||
diff --git a/arch/mips/kernel/signal32.c b/arch/mips/kernel/signal32.c index 2e74075ac0ca..03abaf048f09 100644 --- a/arch/mips/kernel/signal32.c +++ b/arch/mips/kernel/signal32.c | |||
@@ -35,6 +35,15 @@ | |||
35 | 35 | ||
36 | #include "signal-common.h" | 36 | #include "signal-common.h" |
37 | 37 | ||
38 | static int (*save_fp_context32)(struct sigcontext32 __user *sc); | ||
39 | static int (*restore_fp_context32)(struct sigcontext32 __user *sc); | ||
40 | |||
41 | extern asmlinkage int _save_fp_context32(struct sigcontext32 __user *sc); | ||
42 | extern asmlinkage int _restore_fp_context32(struct sigcontext32 __user *sc); | ||
43 | |||
44 | extern asmlinkage int fpu_emulator_save_context32(struct sigcontext32 __user *sc); | ||
45 | extern asmlinkage int fpu_emulator_restore_context32(struct sigcontext32 __user *sc); | ||
46 | |||
38 | /* | 47 | /* |
39 | * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... | 48 | * Including <asm/unistd.h> would give use the 64-bit syscall numbers ... |
40 | */ | 49 | */ |
@@ -828,3 +837,18 @@ SYSCALL_DEFINE5(32_waitid, int, which, compat_pid_t, pid, | |||
828 | info.si_code |= __SI_CHLD; | 837 | info.si_code |= __SI_CHLD; |
829 | return copy_siginfo_to_user32(uinfo, &info); | 838 | return copy_siginfo_to_user32(uinfo, &info); |
830 | } | 839 | } |
840 | |||
841 | static int signal32_init(void) | ||
842 | { | ||
843 | if (cpu_has_fpu) { | ||
844 | save_fp_context32 = _save_fp_context32; | ||
845 | restore_fp_context32 = _restore_fp_context32; | ||
846 | } else { | ||
847 | save_fp_context32 = fpu_emulator_save_context32; | ||
848 | restore_fp_context32 = fpu_emulator_restore_context32; | ||
849 | } | ||
850 | |||
851 | return 0; | ||
852 | } | ||
853 | |||
854 | arch_initcall(signal32_init); | ||
diff --git a/arch/mips/kernel/smp.c b/arch/mips/kernel/smp.c index e72e6844d134..6cdca1956b77 100644 --- a/arch/mips/kernel/smp.c +++ b/arch/mips/kernel/smp.c | |||
@@ -32,6 +32,7 @@ | |||
32 | #include <linux/cpumask.h> | 32 | #include <linux/cpumask.h> |
33 | #include <linux/cpu.h> | 33 | #include <linux/cpu.h> |
34 | #include <linux/err.h> | 34 | #include <linux/err.h> |
35 | #include <linux/ftrace.h> | ||
35 | 36 | ||
36 | #include <asm/atomic.h> | 37 | #include <asm/atomic.h> |
37 | #include <asm/cpu.h> | 38 | #include <asm/cpu.h> |
@@ -130,7 +131,7 @@ asmlinkage __cpuinit void start_secondary(void) | |||
130 | /* | 131 | /* |
131 | * Call into both interrupt handlers, as we share the IPI for them | 132 | * Call into both interrupt handlers, as we share the IPI for them |
132 | */ | 133 | */ |
133 | void smp_call_function_interrupt(void) | 134 | void __irq_entry smp_call_function_interrupt(void) |
134 | { | 135 | { |
135 | irq_enter(); | 136 | irq_enter(); |
136 | generic_smp_call_function_single_interrupt(); | 137 | generic_smp_call_function_single_interrupt(); |
diff --git a/arch/mips/kernel/smtc.c b/arch/mips/kernel/smtc.c index a38e3ee95515..23499b5bd9c3 100644 --- a/arch/mips/kernel/smtc.c +++ b/arch/mips/kernel/smtc.c | |||
@@ -25,6 +25,7 @@ | |||
25 | #include <linux/interrupt.h> | 25 | #include <linux/interrupt.h> |
26 | #include <linux/kernel_stat.h> | 26 | #include <linux/kernel_stat.h> |
27 | #include <linux/module.h> | 27 | #include <linux/module.h> |
28 | #include <linux/ftrace.h> | ||
28 | 29 | ||
29 | #include <asm/cpu.h> | 30 | #include <asm/cpu.h> |
30 | #include <asm/processor.h> | 31 | #include <asm/processor.h> |
@@ -939,23 +940,29 @@ static void ipi_call_interrupt(void) | |||
939 | 940 | ||
940 | DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device); | 941 | DECLARE_PER_CPU(struct clock_event_device, mips_clockevent_device); |
941 | 942 | ||
942 | void ipi_decode(struct smtc_ipi *pipi) | 943 | static void __irq_entry smtc_clock_tick_interrupt(void) |
943 | { | 944 | { |
944 | unsigned int cpu = smp_processor_id(); | 945 | unsigned int cpu = smp_processor_id(); |
945 | struct clock_event_device *cd; | 946 | struct clock_event_device *cd; |
947 | int irq = MIPS_CPU_IRQ_BASE + 1; | ||
948 | |||
949 | irq_enter(); | ||
950 | kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq)); | ||
951 | cd = &per_cpu(mips_clockevent_device, cpu); | ||
952 | cd->event_handler(cd); | ||
953 | irq_exit(); | ||
954 | } | ||
955 | |||
956 | void ipi_decode(struct smtc_ipi *pipi) | ||
957 | { | ||
946 | void *arg_copy = pipi->arg; | 958 | void *arg_copy = pipi->arg; |
947 | int type_copy = pipi->type; | 959 | int type_copy = pipi->type; |
948 | int irq = MIPS_CPU_IRQ_BASE + 1; | ||
949 | 960 | ||
950 | smtc_ipi_nq(&freeIPIq, pipi); | 961 | smtc_ipi_nq(&freeIPIq, pipi); |
951 | 962 | ||
952 | switch (type_copy) { | 963 | switch (type_copy) { |
953 | case SMTC_CLOCK_TICK: | 964 | case SMTC_CLOCK_TICK: |
954 | irq_enter(); | 965 | smtc_clock_tick_interrupt(); |
955 | kstat_incr_irqs_this_cpu(irq, irq_to_desc(irq)); | ||
956 | cd = &per_cpu(mips_clockevent_device, cpu); | ||
957 | cd->event_handler(cd); | ||
958 | irq_exit(); | ||
959 | break; | 966 | break; |
960 | 967 | ||
961 | case LINUX_SMP_IPI: | 968 | case LINUX_SMP_IPI: |
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c index 0a18b4c62afb..308e43460864 100644 --- a/arch/mips/kernel/traps.c +++ b/arch/mips/kernel/traps.c | |||
@@ -25,10 +25,12 @@ | |||
25 | #include <linux/ptrace.h> | 25 | #include <linux/ptrace.h> |
26 | #include <linux/kgdb.h> | 26 | #include <linux/kgdb.h> |
27 | #include <linux/kdebug.h> | 27 | #include <linux/kdebug.h> |
28 | #include <linux/notifier.h> | ||
28 | 29 | ||
29 | #include <asm/bootinfo.h> | 30 | #include <asm/bootinfo.h> |
30 | #include <asm/branch.h> | 31 | #include <asm/branch.h> |
31 | #include <asm/break.h> | 32 | #include <asm/break.h> |
33 | #include <asm/cop2.h> | ||
32 | #include <asm/cpu.h> | 34 | #include <asm/cpu.h> |
33 | #include <asm/dsp.h> | 35 | #include <asm/dsp.h> |
34 | #include <asm/fpu.h> | 36 | #include <asm/fpu.h> |
@@ -79,10 +81,6 @@ extern asmlinkage void handle_reserved(void); | |||
79 | extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, | 81 | extern int fpu_emulator_cop1Handler(struct pt_regs *xcp, |
80 | struct mips_fpu_struct *ctx, int has_fpu); | 82 | struct mips_fpu_struct *ctx, int has_fpu); |
81 | 83 | ||
82 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | ||
83 | extern asmlinkage void octeon_cop2_restore(struct octeon_cop2_state *task); | ||
84 | #endif | ||
85 | |||
86 | void (*board_be_init)(void); | 84 | void (*board_be_init)(void); |
87 | int (*board_be_handler)(struct pt_regs *regs, int is_fixup); | 85 | int (*board_be_handler)(struct pt_regs *regs, int is_fixup); |
88 | void (*board_nmi_handler_setup)(void); | 86 | void (*board_nmi_handler_setup)(void); |
@@ -857,6 +855,44 @@ static void mt_ase_fp_affinity(void) | |||
857 | #endif /* CONFIG_MIPS_MT_FPAFF */ | 855 | #endif /* CONFIG_MIPS_MT_FPAFF */ |
858 | } | 856 | } |
859 | 857 | ||
858 | /* | ||
859 | * No lock; only written during early bootup by CPU 0. | ||
860 | */ | ||
861 | static RAW_NOTIFIER_HEAD(cu2_chain); | ||
862 | |||
863 | int __ref register_cu2_notifier(struct notifier_block *nb) | ||
864 | { | ||
865 | return raw_notifier_chain_register(&cu2_chain, nb); | ||
866 | } | ||
867 | |||
868 | int cu2_notifier_call_chain(unsigned long val, void *v) | ||
869 | { | ||
870 | return raw_notifier_call_chain(&cu2_chain, val, v); | ||
871 | } | ||
872 | |||
873 | static int default_cu2_call(struct notifier_block *nfb, unsigned long action, | ||
874 | void *data) | ||
875 | { | ||
876 | struct pt_regs *regs = data; | ||
877 | |||
878 | switch (action) { | ||
879 | default: | ||
880 | die_if_kernel("Unhandled kernel unaligned access or invalid " | ||
881 | "instruction", regs); | ||
882 | /* Fall through */ | ||
883 | |||
884 | case CU2_EXCEPTION: | ||
885 | force_sig(SIGILL, current); | ||
886 | } | ||
887 | |||
888 | return NOTIFY_OK; | ||
889 | } | ||
890 | |||
891 | static struct notifier_block default_cu2_notifier = { | ||
892 | .notifier_call = default_cu2_call, | ||
893 | .priority = 0x80000000, /* Run last */ | ||
894 | }; | ||
895 | |||
860 | asmlinkage void do_cpu(struct pt_regs *regs) | 896 | asmlinkage void do_cpu(struct pt_regs *regs) |
861 | { | 897 | { |
862 | unsigned int __user *epc; | 898 | unsigned int __user *epc; |
@@ -920,17 +956,9 @@ asmlinkage void do_cpu(struct pt_regs *regs) | |||
920 | return; | 956 | return; |
921 | 957 | ||
922 | case 2: | 958 | case 2: |
923 | #ifdef CONFIG_CPU_CAVIUM_OCTEON | 959 | raw_notifier_call_chain(&cu2_chain, CU2_EXCEPTION, regs); |
924 | prefetch(¤t->thread.cp2); | 960 | break; |
925 | local_irq_save(flags); | 961 | |
926 | KSTK_STATUS(current) |= ST0_CU2; | ||
927 | status = read_c0_status(); | ||
928 | write_c0_status(status | ST0_CU2); | ||
929 | octeon_cop2_restore(&(current->thread.cp2)); | ||
930 | write_c0_status(status & ~ST0_CU2); | ||
931 | local_irq_restore(flags); | ||
932 | return; | ||
933 | #endif | ||
934 | case 3: | 962 | case 3: |
935 | break; | 963 | break; |
936 | } | 964 | } |
@@ -1367,77 +1395,6 @@ void *set_vi_handler(int n, vi_handler_t addr) | |||
1367 | return set_vi_srs_handler(n, addr, 0); | 1395 | return set_vi_srs_handler(n, addr, 0); |
1368 | } | 1396 | } |
1369 | 1397 | ||
1370 | /* | ||
1371 | * This is used by native signal handling | ||
1372 | */ | ||
1373 | asmlinkage int (*save_fp_context)(struct sigcontext __user *sc); | ||
1374 | asmlinkage int (*restore_fp_context)(struct sigcontext __user *sc); | ||
1375 | |||
1376 | extern asmlinkage int _save_fp_context(struct sigcontext __user *sc); | ||
1377 | extern asmlinkage int _restore_fp_context(struct sigcontext __user *sc); | ||
1378 | |||
1379 | extern asmlinkage int fpu_emulator_save_context(struct sigcontext __user *sc); | ||
1380 | extern asmlinkage int fpu_emulator_restore_context(struct sigcontext __user *sc); | ||
1381 | |||
1382 | #ifdef CONFIG_SMP | ||
1383 | static int smp_save_fp_context(struct sigcontext __user *sc) | ||
1384 | { | ||
1385 | return raw_cpu_has_fpu | ||
1386 | ? _save_fp_context(sc) | ||
1387 | : fpu_emulator_save_context(sc); | ||
1388 | } | ||
1389 | |||
1390 | static int smp_restore_fp_context(struct sigcontext __user *sc) | ||
1391 | { | ||
1392 | return raw_cpu_has_fpu | ||
1393 | ? _restore_fp_context(sc) | ||
1394 | : fpu_emulator_restore_context(sc); | ||
1395 | } | ||
1396 | #endif | ||
1397 | |||
1398 | static inline void signal_init(void) | ||
1399 | { | ||
1400 | #ifdef CONFIG_SMP | ||
1401 | /* For now just do the cpu_has_fpu check when the functions are invoked */ | ||
1402 | save_fp_context = smp_save_fp_context; | ||
1403 | restore_fp_context = smp_restore_fp_context; | ||
1404 | #else | ||
1405 | if (cpu_has_fpu) { | ||
1406 | save_fp_context = _save_fp_context; | ||
1407 | restore_fp_context = _restore_fp_context; | ||
1408 | } else { | ||
1409 | save_fp_context = fpu_emulator_save_context; | ||
1410 | restore_fp_context = fpu_emulator_restore_context; | ||
1411 | } | ||
1412 | #endif | ||
1413 | } | ||
1414 | |||
1415 | #ifdef CONFIG_MIPS32_COMPAT | ||
1416 | |||
1417 | /* | ||
1418 | * This is used by 32-bit signal stuff on the 64-bit kernel | ||
1419 | */ | ||
1420 | asmlinkage int (*save_fp_context32)(struct sigcontext32 __user *sc); | ||
1421 | asmlinkage int (*restore_fp_context32)(struct sigcontext32 __user *sc); | ||
1422 | |||
1423 | extern asmlinkage int _save_fp_context32(struct sigcontext32 __user *sc); | ||
1424 | extern asmlinkage int _restore_fp_context32(struct sigcontext32 __user *sc); | ||
1425 | |||
1426 | extern asmlinkage int fpu_emulator_save_context32(struct sigcontext32 __user *sc); | ||
1427 | extern asmlinkage int fpu_emulator_restore_context32(struct sigcontext32 __user *sc); | ||
1428 | |||
1429 | static inline void signal32_init(void) | ||
1430 | { | ||
1431 | if (cpu_has_fpu) { | ||
1432 | save_fp_context32 = _save_fp_context32; | ||
1433 | restore_fp_context32 = _restore_fp_context32; | ||
1434 | } else { | ||
1435 | save_fp_context32 = fpu_emulator_save_context32; | ||
1436 | restore_fp_context32 = fpu_emulator_restore_context32; | ||
1437 | } | ||
1438 | } | ||
1439 | #endif | ||
1440 | |||
1441 | extern void cpu_cache_init(void); | 1398 | extern void cpu_cache_init(void); |
1442 | extern void tlb_init(void); | 1399 | extern void tlb_init(void); |
1443 | extern void flush_tlb_handlers(void); | 1400 | extern void flush_tlb_handlers(void); |
@@ -1751,13 +1708,10 @@ void __init trap_init(void) | |||
1751 | else | 1708 | else |
1752 | memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80); | 1709 | memcpy((void *)(ebase + 0x080), &except_vec3_generic, 0x80); |
1753 | 1710 | ||
1754 | signal_init(); | ||
1755 | #ifdef CONFIG_MIPS32_COMPAT | ||
1756 | signal32_init(); | ||
1757 | #endif | ||
1758 | |||
1759 | local_flush_icache_range(ebase, ebase + 0x400); | 1711 | local_flush_icache_range(ebase, ebase + 0x400); |
1760 | flush_tlb_handlers(); | 1712 | flush_tlb_handlers(); |
1761 | 1713 | ||
1762 | sort_extable(__start___dbe_table, __stop___dbe_table); | 1714 | sort_extable(__start___dbe_table, __stop___dbe_table); |
1715 | |||
1716 | register_cu2_notifier(&default_cu2_notifier); | ||
1763 | } | 1717 | } |
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c index 67bd626942ab..69b039ca8d83 100644 --- a/arch/mips/kernel/unaligned.c +++ b/arch/mips/kernel/unaligned.c | |||
@@ -81,6 +81,7 @@ | |||
81 | #include <asm/asm.h> | 81 | #include <asm/asm.h> |
82 | #include <asm/branch.h> | 82 | #include <asm/branch.h> |
83 | #include <asm/byteorder.h> | 83 | #include <asm/byteorder.h> |
84 | #include <asm/cop2.h> | ||
84 | #include <asm/inst.h> | 85 | #include <asm/inst.h> |
85 | #include <asm/uaccess.h> | 86 | #include <asm/uaccess.h> |
86 | #include <asm/system.h> | 87 | #include <asm/system.h> |
@@ -451,17 +452,27 @@ static void emulate_load_store_insn(struct pt_regs *regs, | |||
451 | */ | 452 | */ |
452 | goto sigbus; | 453 | goto sigbus; |
453 | 454 | ||
455 | /* | ||
456 | * COP2 is available to implementor for application specific use. | ||
457 | * It's up to applications to register a notifier chain and do | ||
458 | * whatever they have to do, including possible sending of signals. | ||
459 | */ | ||
454 | case lwc2_op: | 460 | case lwc2_op: |
461 | cu2_notifier_call_chain(CU2_LWC2_OP, regs); | ||
462 | break; | ||
463 | |||
455 | case ldc2_op: | 464 | case ldc2_op: |
465 | cu2_notifier_call_chain(CU2_LDC2_OP, regs); | ||
466 | break; | ||
467 | |||
456 | case swc2_op: | 468 | case swc2_op: |
469 | cu2_notifier_call_chain(CU2_SWC2_OP, regs); | ||
470 | break; | ||
471 | |||
457 | case sdc2_op: | 472 | case sdc2_op: |
458 | /* | 473 | cu2_notifier_call_chain(CU2_SDC2_OP, regs); |
459 | * These are the coprocessor 2 load/stores. The current | 474 | break; |
460 | * implementations don't use cp2 and cp2 should always be | 475 | |
461 | * disabled in c0_status. So send SIGILL. | ||
462 | * (No longer true: The Sony Praystation uses cp2 for | ||
463 | * 3D matrix operations. Dunno if that thingy has a MMU ...) | ||
464 | */ | ||
465 | default: | 476 | default: |
466 | /* | 477 | /* |
467 | * Pheeee... We encountered an yet unknown instruction or | 478 | * Pheeee... We encountered an yet unknown instruction or |
diff --git a/arch/mips/kernel/vmlinux.lds.S b/arch/mips/kernel/vmlinux.lds.S index 162b29954baa..f25df73db923 100644 --- a/arch/mips/kernel/vmlinux.lds.S +++ b/arch/mips/kernel/vmlinux.lds.S | |||
@@ -46,6 +46,7 @@ SECTIONS | |||
46 | SCHED_TEXT | 46 | SCHED_TEXT |
47 | LOCK_TEXT | 47 | LOCK_TEXT |
48 | KPROBES_TEXT | 48 | KPROBES_TEXT |
49 | IRQENTRY_TEXT | ||
49 | *(.text.*) | 50 | *(.text.*) |
50 | *(.fixup) | 51 | *(.fixup) |
51 | *(.gnu.warning) | 52 | *(.gnu.warning) |
diff --git a/arch/mips/lasat/picvue_proc.c b/arch/mips/lasat/picvue_proc.c index 0bb6037afba3..8e388da1926f 100644 --- a/arch/mips/lasat/picvue_proc.c +++ b/arch/mips/lasat/picvue_proc.c | |||
@@ -4,12 +4,14 @@ | |||
4 | * Brian Murphy <brian.murphy@eicon.com> | 4 | * Brian Murphy <brian.murphy@eicon.com> |
5 | * | 5 | * |
6 | */ | 6 | */ |
7 | #include <linux/bug.h> | ||
7 | #include <linux/kernel.h> | 8 | #include <linux/kernel.h> |
8 | #include <linux/module.h> | 9 | #include <linux/module.h> |
9 | #include <linux/init.h> | 10 | #include <linux/init.h> |
10 | #include <linux/errno.h> | 11 | #include <linux/errno.h> |
11 | 12 | ||
12 | #include <linux/proc_fs.h> | 13 | #include <linux/proc_fs.h> |
14 | #include <linux/seq_file.h> | ||
13 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
14 | 16 | ||
15 | #include <linux/timer.h> | 17 | #include <linux/timer.h> |
@@ -38,12 +40,9 @@ static void pvc_display(unsigned long data) | |||
38 | 40 | ||
39 | static DECLARE_TASKLET(pvc_display_tasklet, &pvc_display, 0); | 41 | static DECLARE_TASKLET(pvc_display_tasklet, &pvc_display, 0); |
40 | 42 | ||
41 | static int pvc_proc_read_line(char *page, char **start, | 43 | static int pvc_line_proc_show(struct seq_file *m, void *v) |
42 | off_t off, int count, | ||
43 | int *eof, void *data) | ||
44 | { | 44 | { |
45 | char *origpage = page; | 45 | int lineno = *(int *)m->private; |
46 | int lineno = *(int *)data; | ||
47 | 46 | ||
48 | if (lineno < 0 || lineno > PVC_NLINES) { | 47 | if (lineno < 0 || lineno > PVC_NLINES) { |
49 | printk(KERN_WARNING "proc_read_line: invalid lineno %d\n", lineno); | 48 | printk(KERN_WARNING "proc_read_line: invalid lineno %d\n", lineno); |
@@ -51,45 +50,66 @@ static int pvc_proc_read_line(char *page, char **start, | |||
51 | } | 50 | } |
52 | 51 | ||
53 | mutex_lock(&pvc_mutex); | 52 | mutex_lock(&pvc_mutex); |
54 | page += sprintf(page, "%s\n", pvc_lines[lineno]); | 53 | seq_printf(m, "%s\n", pvc_lines[lineno]); |
55 | mutex_unlock(&pvc_mutex); | 54 | mutex_unlock(&pvc_mutex); |
56 | 55 | ||
57 | return page - origpage; | 56 | return 0; |
58 | } | 57 | } |
59 | 58 | ||
60 | static int pvc_proc_write_line(struct file *file, const char *buffer, | 59 | static int pvc_line_proc_open(struct inode *inode, struct file *file) |
61 | unsigned long count, void *data) | ||
62 | { | 60 | { |
63 | int origcount = count; | 61 | return single_open(file, pvc_line_proc_show, PDE(inode)->data); |
64 | int lineno = *(int *)data; | 62 | } |
65 | 63 | ||
66 | if (lineno < 0 || lineno > PVC_NLINES) { | 64 | static ssize_t pvc_line_proc_write(struct file *file, const char __user *buf, |
67 | printk(KERN_WARNING "proc_write_line: invalid lineno %d\n", | 65 | size_t count, loff_t *pos) |
68 | lineno); | 66 | { |
69 | return origcount; | 67 | int lineno = *(int *)PDE(file->f_path.dentry->d_inode)->data; |
70 | } | 68 | char kbuf[PVC_LINELEN]; |
69 | size_t len; | ||
70 | |||
71 | BUG_ON(lineno < 0 || lineno > PVC_NLINES); | ||
71 | 72 | ||
72 | if (count > PVC_LINELEN) | 73 | len = min(count, sizeof(kbuf) - 1); |
73 | count = PVC_LINELEN; | 74 | if (copy_from_user(kbuf, buf, len)) |
75 | return -EFAULT; | ||
76 | kbuf[len] = '\0'; | ||
74 | 77 | ||
75 | if (buffer[count-1] == '\n') | 78 | if (len > 0 && kbuf[len - 1] == '\n') |
76 | count--; | 79 | len--; |
77 | 80 | ||
78 | mutex_lock(&pvc_mutex); | 81 | mutex_lock(&pvc_mutex); |
79 | strncpy(pvc_lines[lineno], buffer, count); | 82 | strncpy(pvc_lines[lineno], kbuf, len); |
80 | pvc_lines[lineno][count] = '\0'; | 83 | pvc_lines[lineno][len] = '\0'; |
81 | mutex_unlock(&pvc_mutex); | 84 | mutex_unlock(&pvc_mutex); |
82 | 85 | ||
83 | tasklet_schedule(&pvc_display_tasklet); | 86 | tasklet_schedule(&pvc_display_tasklet); |
84 | 87 | ||
85 | return origcount; | 88 | return count; |
86 | } | 89 | } |
87 | 90 | ||
88 | static int pvc_proc_write_scroll(struct file *file, const char *buffer, | 91 | static const struct file_operations pvc_line_proc_fops = { |
89 | unsigned long count, void *data) | 92 | .owner = THIS_MODULE, |
93 | .open = pvc_line_proc_open, | ||
94 | .read = seq_read, | ||
95 | .llseek = seq_lseek, | ||
96 | .release = single_release, | ||
97 | .write = pvc_line_proc_write, | ||
98 | }; | ||
99 | |||
100 | static ssize_t pvc_scroll_proc_write(struct file *file, const char __user *buf, | ||
101 | size_t count, loff_t *pos) | ||
90 | { | 102 | { |
91 | int origcount = count; | 103 | char kbuf[42]; |
92 | int cmd = simple_strtol(buffer, NULL, 10); | 104 | size_t len; |
105 | int cmd; | ||
106 | |||
107 | len = min(count, sizeof(kbuf) - 1); | ||
108 | if (copy_from_user(kbuf, buf, len)) | ||
109 | return -EFAULT; | ||
110 | kbuf[len] = '\0'; | ||
111 | |||
112 | cmd = simple_strtol(kbuf, NULL, 10); | ||
93 | 113 | ||
94 | mutex_lock(&pvc_mutex); | 114 | mutex_lock(&pvc_mutex); |
95 | if (scroll_interval != 0) | 115 | if (scroll_interval != 0) |
@@ -110,22 +130,31 @@ static int pvc_proc_write_scroll(struct file *file, const char *buffer, | |||
110 | } | 130 | } |
111 | mutex_unlock(&pvc_mutex); | 131 | mutex_unlock(&pvc_mutex); |
112 | 132 | ||
113 | return origcount; | 133 | return count; |
114 | } | 134 | } |
115 | 135 | ||
116 | static int pvc_proc_read_scroll(char *page, char **start, | 136 | static int pvc_scroll_proc_show(struct seq_file *m, void *v) |
117 | off_t off, int count, | ||
118 | int *eof, void *data) | ||
119 | { | 137 | { |
120 | char *origpage = page; | ||
121 | |||
122 | mutex_lock(&pvc_mutex); | 138 | mutex_lock(&pvc_mutex); |
123 | page += sprintf(page, "%d\n", scroll_dir * scroll_interval); | 139 | seq_printf(m, "%d\n", scroll_dir * scroll_interval); |
124 | mutex_unlock(&pvc_mutex); | 140 | mutex_unlock(&pvc_mutex); |
125 | 141 | ||
126 | return page - origpage; | 142 | return 0; |
127 | } | 143 | } |
128 | 144 | ||
145 | static int pvc_scroll_proc_open(struct inode *inode, struct file *file) | ||
146 | { | ||
147 | return single_open(file, pvc_scroll_proc_show, NULL); | ||
148 | } | ||
149 | |||
150 | static const struct file_operations pvc_scroll_proc_fops = { | ||
151 | .owner = THIS_MODULE, | ||
152 | .open = pvc_scroll_proc_open, | ||
153 | .read = seq_read, | ||
154 | .llseek = seq_lseek, | ||
155 | .release = single_release, | ||
156 | .write = pvc_scroll_proc_write, | ||
157 | }; | ||
129 | 158 | ||
130 | void pvc_proc_timerfunc(unsigned long data) | 159 | void pvc_proc_timerfunc(unsigned long data) |
131 | { | 160 | { |
@@ -163,22 +192,16 @@ static int __init pvc_proc_init(void) | |||
163 | pvc_linedata[i] = i; | 192 | pvc_linedata[i] = i; |
164 | } | 193 | } |
165 | for (i = 0; i < PVC_NLINES; i++) { | 194 | for (i = 0; i < PVC_NLINES; i++) { |
166 | proc_entry = create_proc_entry(pvc_linename[i], 0644, | 195 | proc_entry = proc_create_data(pvc_linename[i], 0644, pvc_display_dir, |
167 | pvc_display_dir); | 196 | &pvc_line_proc_fops, &pvc_linedata[i]); |
168 | if (proc_entry == NULL) | 197 | if (proc_entry == NULL) |
169 | goto error; | 198 | goto error; |
170 | |||
171 | proc_entry->read_proc = pvc_proc_read_line; | ||
172 | proc_entry->write_proc = pvc_proc_write_line; | ||
173 | proc_entry->data = &pvc_linedata[i]; | ||
174 | } | 199 | } |
175 | proc_entry = create_proc_entry("scroll", 0644, pvc_display_dir); | 200 | proc_entry = proc_create("scroll", 0644, pvc_display_dir, |
201 | &pvc_scroll_proc_fops); | ||
176 | if (proc_entry == NULL) | 202 | if (proc_entry == NULL) |
177 | goto error; | 203 | goto error; |
178 | 204 | ||
179 | proc_entry->write_proc = pvc_proc_write_scroll; | ||
180 | proc_entry->read_proc = pvc_proc_read_scroll; | ||
181 | |||
182 | init_timer(&timer); | 205 | init_timer(&timer); |
183 | timer.function = pvc_proc_timerfunc; | 206 | timer.function = pvc_proc_timerfunc; |
184 | 207 | ||
diff --git a/arch/mips/lasat/prom.c b/arch/mips/lasat/prom.c index 6acc6cb85f0a..20fde19a5fbf 100644 --- a/arch/mips/lasat/prom.c +++ b/arch/mips/lasat/prom.c | |||
@@ -100,8 +100,8 @@ void __init prom_init(void) | |||
100 | 100 | ||
101 | /* Get the command line */ | 101 | /* Get the command line */ |
102 | if (argc > 0) { | 102 | if (argc > 0) { |
103 | strncpy(arcs_cmdline, argv[0], CL_SIZE-1); | 103 | strncpy(arcs_cmdline, argv[0], COMMAND_LINE_SIZE-1); |
104 | arcs_cmdline[CL_SIZE-1] = '\0'; | 104 | arcs_cmdline[COMMAND_LINE_SIZE-1] = '\0'; |
105 | } | 105 | } |
106 | 106 | ||
107 | /* Set the I/O base address */ | 107 | /* Set the I/O base address */ |
diff --git a/arch/mips/lasat/sysctl.c b/arch/mips/lasat/sysctl.c index 14b9a28a4aec..d87ffd04cb0a 100644 --- a/arch/mips/lasat/sysctl.c +++ b/arch/mips/lasat/sysctl.c | |||
@@ -204,7 +204,7 @@ static ctl_table lasat_table[] = { | |||
204 | .maxlen = sizeof(int), | 204 | .maxlen = sizeof(int), |
205 | .mode = 0644, | 205 | .mode = 0644, |
206 | .proc_handler = proc_lasat_prid, | 206 | .proc_handler = proc_lasat_prid, |
207 | . }, | 207 | }, |
208 | #ifdef CONFIG_INET | 208 | #ifdef CONFIG_INET |
209 | { | 209 | { |
210 | .procname = "ipaddr", | 210 | .procname = "ipaddr", |
diff --git a/arch/mips/loongson/Kconfig b/arch/mips/loongson/Kconfig index d45092505fa1..3df1967dea08 100644 --- a/arch/mips/loongson/Kconfig +++ b/arch/mips/loongson/Kconfig | |||
@@ -1,31 +1,85 @@ | |||
1 | choice | 1 | choice |
2 | prompt "Machine Type" | 2 | prompt "Machine Type" |
3 | depends on MACH_LOONGSON | 3 | depends on MACH_LOONGSON |
4 | 4 | ||
5 | config LEMOTE_FULOONG2E | 5 | config LEMOTE_FULOONG2E |
6 | bool "Lemote Fuloong(2e) mini-PC" | 6 | bool "Lemote Fuloong(2e) mini-PC" |
7 | select ARCH_SPARSEMEM_ENABLE | 7 | select ARCH_SPARSEMEM_ENABLE |
8 | select CEVT_R4K | 8 | select CEVT_R4K |
9 | select CSRC_R4K | 9 | select CSRC_R4K |
10 | select SYS_HAS_CPU_LOONGSON2E | 10 | select SYS_HAS_CPU_LOONGSON2E |
11 | select DMA_NONCOHERENT | 11 | select DMA_NONCOHERENT |
12 | select BOOT_ELF32 | 12 | select BOOT_ELF32 |
13 | select BOARD_SCACHE | 13 | select BOARD_SCACHE |
14 | select HW_HAS_PCI | 14 | select HW_HAS_PCI |
15 | select I8259 | 15 | select I8259 |
16 | select ISA | 16 | select ISA |
17 | select IRQ_CPU | 17 | select IRQ_CPU |
18 | select SYS_SUPPORTS_32BIT_KERNEL | 18 | select SYS_SUPPORTS_32BIT_KERNEL |
19 | select SYS_SUPPORTS_64BIT_KERNEL | 19 | select SYS_SUPPORTS_64BIT_KERNEL |
20 | select SYS_SUPPORTS_LITTLE_ENDIAN | 20 | select SYS_SUPPORTS_LITTLE_ENDIAN |
21 | select SYS_SUPPORTS_HIGHMEM | 21 | select SYS_SUPPORTS_HIGHMEM |
22 | select SYS_HAS_EARLY_PRINTK | 22 | select SYS_HAS_EARLY_PRINTK |
23 | select GENERIC_HARDIRQS_NO__DO_IRQ | 23 | select GENERIC_HARDIRQS_NO__DO_IRQ |
24 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | 24 | select GENERIC_ISA_DMA_SUPPORT_BROKEN |
25 | select CPU_HAS_WB | 25 | select CPU_HAS_WB |
26 | help | 26 | help |
27 | Lemote Fuloong(2e) mini-PC board based on the Chinese Loongson-2E CPU and | 27 | Lemote Fuloong(2e) mini-PC board based on the Chinese Loongson-2E CPU and |
28 | an FPGA northbridge | 28 | an FPGA northbridge |
29 | 29 | ||
30 | Lemote Fuloong(2e) mini PC have a VIA686B south bridge. | 30 | Lemote Fuloong(2e) mini PC have a VIA686B south bridge. |
31 | |||
32 | config LEMOTE_MACH2F | ||
33 | bool "Lemote Loongson 2F family machines" | ||
34 | select ARCH_SPARSEMEM_ENABLE | ||
35 | select BOARD_SCACHE | ||
36 | select BOOT_ELF32 | ||
37 | select CEVT_R4K if ! MIPS_EXTERNAL_TIMER | ||
38 | select CPU_HAS_WB | ||
39 | select CS5536 | ||
40 | select CSRC_R4K if ! MIPS_EXTERNAL_TIMER | ||
41 | select DMA_NONCOHERENT | ||
42 | select GENERIC_HARDIRQS_NO__DO_IRQ | ||
43 | select GENERIC_ISA_DMA_SUPPORT_BROKEN | ||
44 | select HW_HAS_PCI | ||
45 | select I8259 | ||
46 | select IRQ_CPU | ||
47 | select ISA | ||
48 | select SYS_HAS_CPU_LOONGSON2F | ||
49 | select SYS_HAS_EARLY_PRINTK | ||
50 | select SYS_SUPPORTS_32BIT_KERNEL | ||
51 | select SYS_SUPPORTS_64BIT_KERNEL | ||
52 | select SYS_SUPPORTS_HIGHMEM | ||
53 | select SYS_SUPPORTS_LITTLE_ENDIAN | ||
54 | help | ||
55 | Lemote Loongson 2F family machines utilize the 2F revision of | ||
56 | Loongson processor and the AMD CS5536 south bridge. | ||
57 | |||
58 | These family machines include fuloong2f mini PC, yeeloong2f notebook, | ||
59 | LingLoong allinone PC and so forth. | ||
31 | endchoice | 60 | endchoice |
61 | |||
62 | config CS5536 | ||
63 | bool | ||
64 | |||
65 | config CS5536_MFGPT | ||
66 | bool "CS5536 MFGPT Timer" | ||
67 | depends on CS5536 | ||
68 | select MIPS_EXTERNAL_TIMER | ||
69 | help | ||
70 | This option enables the mfgpt0 timer of AMD CS5536. | ||
71 | |||
72 | If you want to enable the Loongson2 CPUFreq Driver, Please enable | ||
73 | this option at first, otherwise, You will get wrong system time. | ||
74 | |||
75 | If unsure, say Yes. | ||
76 | |||
77 | config LOONGSON_SUSPEND | ||
78 | bool | ||
79 | default y | ||
80 | depends on CPU_SUPPORTS_CPUFREQ && SUSPEND | ||
81 | |||
82 | config LOONGSON_UART_BASE | ||
83 | bool | ||
84 | default y | ||
85 | depends on EARLY_PRINTK || SERIAL_8250 | ||
diff --git a/arch/mips/loongson/Makefile b/arch/mips/loongson/Makefile index 39048c455d7d..2b76cb0fb07d 100644 --- a/arch/mips/loongson/Makefile +++ b/arch/mips/loongson/Makefile | |||
@@ -9,3 +9,9 @@ obj-$(CONFIG_MACH_LOONGSON) += common/ | |||
9 | # | 9 | # |
10 | 10 | ||
11 | obj-$(CONFIG_LEMOTE_FULOONG2E) += fuloong-2e/ | 11 | obj-$(CONFIG_LEMOTE_FULOONG2E) += fuloong-2e/ |
12 | |||
13 | # | ||
14 | # Lemote loongson2f family machines | ||
15 | # | ||
16 | |||
17 | obj-$(CONFIG_LEMOTE_MACH2F) += lemote-2f/ | ||
diff --git a/arch/mips/loongson/common/Makefile b/arch/mips/loongson/common/Makefile index 656b3cc0a2a6..7668c4de1151 100644 --- a/arch/mips/loongson/common/Makefile +++ b/arch/mips/loongson/common/Makefile | |||
@@ -3,9 +3,23 @@ | |||
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \ | 5 | obj-y += setup.o init.o cmdline.o env.o time.o reset.o irq.o \ |
6 | pci.o bonito-irq.o mem.o machtype.o | 6 | pci.o bonito-irq.o mem.o machtype.o platform.o |
7 | 7 | ||
8 | # | 8 | # |
9 | # Early printk support | 9 | # Serial port support |
10 | # | 10 | # |
11 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o | 11 | obj-$(CONFIG_EARLY_PRINTK) += early_printk.o |
12 | obj-$(CONFIG_SERIAL_8250) += serial.o | ||
13 | obj-$(CONFIG_LOONGSON_UART_BASE) += uart_base.o | ||
14 | |||
15 | # | ||
16 | # Enable CS5536 Virtual Support Module(VSM) to virtulize the PCI configure | ||
17 | # space | ||
18 | # | ||
19 | obj-$(CONFIG_CS5536) += cs5536/ | ||
20 | |||
21 | # | ||
22 | # Suspend Support | ||
23 | # | ||
24 | |||
25 | obj-$(CONFIG_LOONGSON_SUSPEND) += pm.o | ||
diff --git a/arch/mips/loongson/common/bonito-irq.c b/arch/mips/loongson/common/bonito-irq.c index 3e31e7ad713e..2dc2a4cc632a 100644 --- a/arch/mips/loongson/common/bonito-irq.c +++ b/arch/mips/loongson/common/bonito-irq.c | |||
@@ -12,18 +12,19 @@ | |||
12 | * option) any later version. | 12 | * option) any later version. |
13 | */ | 13 | */ |
14 | #include <linux/interrupt.h> | 14 | #include <linux/interrupt.h> |
15 | #include <linux/compiler.h> | ||
15 | 16 | ||
16 | #include <loongson.h> | 17 | #include <loongson.h> |
17 | 18 | ||
18 | static inline void bonito_irq_enable(unsigned int irq) | 19 | static inline void bonito_irq_enable(unsigned int irq) |
19 | { | 20 | { |
20 | BONITO_INTENSET = (1 << (irq - BONITO_IRQ_BASE)); | 21 | LOONGSON_INTENSET = (1 << (irq - LOONGSON_IRQ_BASE)); |
21 | mmiowb(); | 22 | mmiowb(); |
22 | } | 23 | } |
23 | 24 | ||
24 | static inline void bonito_irq_disable(unsigned int irq) | 25 | static inline void bonito_irq_disable(unsigned int irq) |
25 | { | 26 | { |
26 | BONITO_INTENCLR = (1 << (irq - BONITO_IRQ_BASE)); | 27 | LOONGSON_INTENCLR = (1 << (irq - LOONGSON_IRQ_BASE)); |
27 | mmiowb(); | 28 | mmiowb(); |
28 | } | 29 | } |
29 | 30 | ||
@@ -35,7 +36,7 @@ static struct irq_chip bonito_irq_type = { | |||
35 | .unmask = bonito_irq_enable, | 36 | .unmask = bonito_irq_enable, |
36 | }; | 37 | }; |
37 | 38 | ||
38 | static struct irqaction dma_timeout_irqaction = { | 39 | static struct irqaction __maybe_unused dma_timeout_irqaction = { |
39 | .handler = no_action, | 40 | .handler = no_action, |
40 | .name = "dma_timeout", | 41 | .name = "dma_timeout", |
41 | }; | 42 | }; |
@@ -44,8 +45,10 @@ void bonito_irq_init(void) | |||
44 | { | 45 | { |
45 | u32 i; | 46 | u32 i; |
46 | 47 | ||
47 | for (i = BONITO_IRQ_BASE; i < BONITO_IRQ_BASE + 32; i++) | 48 | for (i = LOONGSON_IRQ_BASE; i < LOONGSON_IRQ_BASE + 32; i++) |
48 | set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); | 49 | set_irq_chip_and_handler(i, &bonito_irq_type, handle_level_irq); |
49 | 50 | ||
50 | setup_irq(BONITO_IRQ_BASE + 10, &dma_timeout_irqaction); | 51 | #ifdef CONFIG_CPU_LOONGSON2E |
52 | setup_irq(LOONGSON_IRQ_BASE + 10, &dma_timeout_irqaction); | ||
53 | #endif | ||
51 | } | 54 | } |
diff --git a/arch/mips/loongson/common/cmdline.c b/arch/mips/loongson/common/cmdline.c index 75f1b243ee4e..7ad47f227477 100644 --- a/arch/mips/loongson/common/cmdline.c +++ b/arch/mips/loongson/common/cmdline.c | |||
@@ -9,7 +9,7 @@ | |||
9 | * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology | 9 | * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology |
10 | * Author: Fuxin Zhang, zhangfx@lemote.com | 10 | * Author: Fuxin Zhang, zhangfx@lemote.com |
11 | * | 11 | * |
12 | * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology | 12 | * Copyright (C) 2009 Lemote Inc. |
13 | * Author: Wu Zhangjin, wuzj@lemote.com | 13 | * Author: Wu Zhangjin, wuzj@lemote.com |
14 | * | 14 | * |
15 | * This program is free software; you can redistribute it and/or modify it | 15 | * This program is free software; you can redistribute it and/or modify it |
@@ -49,4 +49,6 @@ void __init prom_init_cmdline(void) | |||
49 | strcat(arcs_cmdline, " console=ttyS0,115200"); | 49 | strcat(arcs_cmdline, " console=ttyS0,115200"); |
50 | if ((strstr(arcs_cmdline, "root=")) == NULL) | 50 | if ((strstr(arcs_cmdline, "root=")) == NULL) |
51 | strcat(arcs_cmdline, " root=/dev/hda1"); | 51 | strcat(arcs_cmdline, " root=/dev/hda1"); |
52 | |||
53 | prom_init_machtype(); | ||
52 | } | 54 | } |
diff --git a/arch/mips/loongson/common/cs5536/Makefile b/arch/mips/loongson/common/cs5536/Makefile new file mode 100644 index 000000000000..510d4cdc2378 --- /dev/null +++ b/arch/mips/loongson/common/cs5536/Makefile | |||
@@ -0,0 +1,13 @@ | |||
1 | # | ||
2 | # Makefile for CS5536 support. | ||
3 | # | ||
4 | |||
5 | obj-$(CONFIG_CS5536) += cs5536_pci.o cs5536_ide.o cs5536_acc.o cs5536_ohci.o \ | ||
6 | cs5536_isa.o cs5536_ehci.o | ||
7 | |||
8 | # | ||
9 | # Enable cs5536 mfgpt Timer | ||
10 | # | ||
11 | obj-$(CONFIG_CS5536_MFGPT) += cs5536_mfgpt.o | ||
12 | |||
13 | EXTRA_CFLAGS += -Werror | ||
diff --git a/arch/mips/loongson/common/cs5536/cs5536_acc.c b/arch/mips/loongson/common/cs5536/cs5536_acc.c new file mode 100644 index 000000000000..b49485f187e0 --- /dev/null +++ b/arch/mips/loongson/common/cs5536/cs5536_acc.c | |||
@@ -0,0 +1,140 @@ | |||
1 | /* | ||
2 | * the ACC Virtual Support Module of AMD CS5536 | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote, Inc. | ||
5 | * Author : jlliu, liujl@lemote.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <cs5536/cs5536.h> | ||
17 | #include <cs5536/cs5536_pci.h> | ||
18 | |||
19 | void pci_acc_write_reg(int reg, u32 value) | ||
20 | { | ||
21 | u32 hi = 0, lo = value; | ||
22 | |||
23 | switch (reg) { | ||
24 | case PCI_COMMAND: | ||
25 | _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); | ||
26 | if (value & PCI_COMMAND_MASTER) | ||
27 | lo |= (0x03 << 8); | ||
28 | else | ||
29 | lo &= ~(0x03 << 8); | ||
30 | _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); | ||
31 | break; | ||
32 | case PCI_STATUS: | ||
33 | if (value & PCI_STATUS_PARITY) { | ||
34 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
35 | if (lo & SB_PARE_ERR_FLAG) { | ||
36 | lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG; | ||
37 | _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); | ||
38 | } | ||
39 | } | ||
40 | break; | ||
41 | case PCI_BAR0_REG: | ||
42 | if (value == PCI_BAR_RANGE_MASK) { | ||
43 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
44 | lo |= SOFT_BAR_ACC_FLAG; | ||
45 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
46 | } else if (value & 0x01) { | ||
47 | value &= 0xfffffffc; | ||
48 | hi = 0xA0000000 | ((value & 0x000ff000) >> 12); | ||
49 | lo = 0x000fff80 | ((value & 0x00000fff) << 20); | ||
50 | _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM1), hi, lo); | ||
51 | } | ||
52 | break; | ||
53 | case PCI_ACC_INT_REG: | ||
54 | _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo); | ||
55 | /* disable all the usb interrupt in PIC */ | ||
56 | lo &= ~(0xf << PIC_YSEL_LOW_ACC_SHIFT); | ||
57 | if (value) /* enable all the acc interrupt in PIC */ | ||
58 | lo |= (CS5536_ACC_INTR << PIC_YSEL_LOW_ACC_SHIFT); | ||
59 | _wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo); | ||
60 | break; | ||
61 | default: | ||
62 | break; | ||
63 | } | ||
64 | } | ||
65 | |||
66 | u32 pci_acc_read_reg(int reg) | ||
67 | { | ||
68 | u32 hi, lo; | ||
69 | u32 conf_data = 0; | ||
70 | |||
71 | switch (reg) { | ||
72 | case PCI_VENDOR_ID: | ||
73 | conf_data = | ||
74 | CFG_PCI_VENDOR_ID(CS5536_ACC_DEVICE_ID, CS5536_VENDOR_ID); | ||
75 | break; | ||
76 | case PCI_COMMAND: | ||
77 | _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo); | ||
78 | if (((lo & 0xfff00000) || (hi & 0x000000ff)) | ||
79 | && ((hi & 0xf0000000) == 0xa0000000)) | ||
80 | conf_data |= PCI_COMMAND_IO; | ||
81 | _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); | ||
82 | if ((lo & 0x300) == 0x300) | ||
83 | conf_data |= PCI_COMMAND_MASTER; | ||
84 | break; | ||
85 | case PCI_STATUS: | ||
86 | conf_data |= PCI_STATUS_66MHZ; | ||
87 | conf_data |= PCI_STATUS_FAST_BACK; | ||
88 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
89 | if (lo & SB_PARE_ERR_FLAG) | ||
90 | conf_data |= PCI_STATUS_PARITY; | ||
91 | conf_data |= PCI_STATUS_DEVSEL_MEDIUM; | ||
92 | break; | ||
93 | case PCI_CLASS_REVISION: | ||
94 | _rdmsr(ACC_MSR_REG(ACC_CAP), &hi, &lo); | ||
95 | conf_data = lo & 0x000000ff; | ||
96 | conf_data |= (CS5536_ACC_CLASS_CODE << 8); | ||
97 | break; | ||
98 | case PCI_CACHE_LINE_SIZE: | ||
99 | conf_data = | ||
100 | CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, | ||
101 | PCI_NORMAL_LATENCY_TIMER); | ||
102 | break; | ||
103 | case PCI_BAR0_REG: | ||
104 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
105 | if (lo & SOFT_BAR_ACC_FLAG) { | ||
106 | conf_data = CS5536_ACC_RANGE | | ||
107 | PCI_BASE_ADDRESS_SPACE_IO; | ||
108 | lo &= ~SOFT_BAR_ACC_FLAG; | ||
109 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
110 | } else { | ||
111 | _rdmsr(GLIU_MSR_REG(GLIU_IOD_BM1), &hi, &lo); | ||
112 | conf_data = (hi & 0x000000ff) << 12; | ||
113 | conf_data |= (lo & 0xfff00000) >> 20; | ||
114 | conf_data |= 0x01; | ||
115 | conf_data &= ~0x02; | ||
116 | } | ||
117 | break; | ||
118 | case PCI_CARDBUS_CIS: | ||
119 | conf_data = PCI_CARDBUS_CIS_POINTER; | ||
120 | break; | ||
121 | case PCI_SUBSYSTEM_VENDOR_ID: | ||
122 | conf_data = | ||
123 | CFG_PCI_VENDOR_ID(CS5536_ACC_SUB_ID, CS5536_SUB_VENDOR_ID); | ||
124 | break; | ||
125 | case PCI_ROM_ADDRESS: | ||
126 | conf_data = PCI_EXPANSION_ROM_BAR; | ||
127 | break; | ||
128 | case PCI_CAPABILITY_LIST: | ||
129 | conf_data = PCI_CAPLIST_USB_POINTER; | ||
130 | break; | ||
131 | case PCI_INTERRUPT_LINE: | ||
132 | conf_data = | ||
133 | CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_ACC_INTR); | ||
134 | break; | ||
135 | default: | ||
136 | break; | ||
137 | } | ||
138 | |||
139 | return conf_data; | ||
140 | } | ||
diff --git a/arch/mips/loongson/common/cs5536/cs5536_ehci.c b/arch/mips/loongson/common/cs5536/cs5536_ehci.c new file mode 100644 index 000000000000..74f9c59d36af --- /dev/null +++ b/arch/mips/loongson/common/cs5536/cs5536_ehci.c | |||
@@ -0,0 +1,158 @@ | |||
1 | /* | ||
2 | * the EHCI Virtual Support Module of AMD CS5536 | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote, Inc. | ||
5 | * Author : jlliu, liujl@lemote.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <cs5536/cs5536.h> | ||
17 | #include <cs5536/cs5536_pci.h> | ||
18 | |||
19 | void pci_ehci_write_reg(int reg, u32 value) | ||
20 | { | ||
21 | u32 hi = 0, lo = value; | ||
22 | |||
23 | switch (reg) { | ||
24 | case PCI_COMMAND: | ||
25 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
26 | if (value & PCI_COMMAND_MASTER) | ||
27 | hi |= PCI_COMMAND_MASTER; | ||
28 | else | ||
29 | hi &= ~PCI_COMMAND_MASTER; | ||
30 | |||
31 | if (value & PCI_COMMAND_MEMORY) | ||
32 | hi |= PCI_COMMAND_MEMORY; | ||
33 | else | ||
34 | hi &= ~PCI_COMMAND_MEMORY; | ||
35 | _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo); | ||
36 | break; | ||
37 | case PCI_STATUS: | ||
38 | if (value & PCI_STATUS_PARITY) { | ||
39 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
40 | if (lo & SB_PARE_ERR_FLAG) { | ||
41 | lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG; | ||
42 | _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); | ||
43 | } | ||
44 | } | ||
45 | break; | ||
46 | case PCI_BAR0_REG: | ||
47 | if (value == PCI_BAR_RANGE_MASK) { | ||
48 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
49 | lo |= SOFT_BAR_EHCI_FLAG; | ||
50 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
51 | } else if ((value & 0x01) == 0x00) { | ||
52 | _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo); | ||
53 | |||
54 | value &= 0xfffffff0; | ||
55 | hi = 0x40000000 | ((value & 0xff000000) >> 24); | ||
56 | lo = 0x000fffff | ((value & 0x00fff000) << 8); | ||
57 | _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM4), hi, lo); | ||
58 | } | ||
59 | break; | ||
60 | case PCI_EHCI_LEGSMIEN_REG: | ||
61 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
62 | hi &= 0x003f0000; | ||
63 | hi |= (value & 0x3f) << 16; | ||
64 | _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo); | ||
65 | break; | ||
66 | case PCI_EHCI_FLADJ_REG: | ||
67 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
68 | hi &= ~0x00003f00; | ||
69 | hi |= value & 0x00003f00; | ||
70 | _wrmsr(USB_MSR_REG(USB_EHCI), hi, lo); | ||
71 | break; | ||
72 | default: | ||
73 | break; | ||
74 | } | ||
75 | } | ||
76 | |||
77 | u32 pci_ehci_read_reg(int reg) | ||
78 | { | ||
79 | u32 conf_data = 0; | ||
80 | u32 hi, lo; | ||
81 | |||
82 | switch (reg) { | ||
83 | case PCI_VENDOR_ID: | ||
84 | conf_data = | ||
85 | CFG_PCI_VENDOR_ID(CS5536_EHCI_DEVICE_ID, CS5536_VENDOR_ID); | ||
86 | break; | ||
87 | case PCI_COMMAND: | ||
88 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
89 | if (hi & PCI_COMMAND_MASTER) | ||
90 | conf_data |= PCI_COMMAND_MASTER; | ||
91 | if (hi & PCI_COMMAND_MEMORY) | ||
92 | conf_data |= PCI_COMMAND_MEMORY; | ||
93 | break; | ||
94 | case PCI_STATUS: | ||
95 | conf_data |= PCI_STATUS_66MHZ; | ||
96 | conf_data |= PCI_STATUS_FAST_BACK; | ||
97 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
98 | if (lo & SB_PARE_ERR_FLAG) | ||
99 | conf_data |= PCI_STATUS_PARITY; | ||
100 | conf_data |= PCI_STATUS_DEVSEL_MEDIUM; | ||
101 | break; | ||
102 | case PCI_CLASS_REVISION: | ||
103 | _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo); | ||
104 | conf_data = lo & 0x000000ff; | ||
105 | conf_data |= (CS5536_EHCI_CLASS_CODE << 8); | ||
106 | break; | ||
107 | case PCI_CACHE_LINE_SIZE: | ||
108 | conf_data = | ||
109 | CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, | ||
110 | PCI_NORMAL_LATENCY_TIMER); | ||
111 | break; | ||
112 | case PCI_BAR0_REG: | ||
113 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
114 | if (lo & SOFT_BAR_EHCI_FLAG) { | ||
115 | conf_data = CS5536_EHCI_RANGE | | ||
116 | PCI_BASE_ADDRESS_SPACE_MEMORY; | ||
117 | lo &= ~SOFT_BAR_EHCI_FLAG; | ||
118 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
119 | } else { | ||
120 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
121 | conf_data = lo & 0xfffff000; | ||
122 | } | ||
123 | break; | ||
124 | case PCI_CARDBUS_CIS: | ||
125 | conf_data = PCI_CARDBUS_CIS_POINTER; | ||
126 | break; | ||
127 | case PCI_SUBSYSTEM_VENDOR_ID: | ||
128 | conf_data = | ||
129 | CFG_PCI_VENDOR_ID(CS5536_EHCI_SUB_ID, CS5536_SUB_VENDOR_ID); | ||
130 | break; | ||
131 | case PCI_ROM_ADDRESS: | ||
132 | conf_data = PCI_EXPANSION_ROM_BAR; | ||
133 | break; | ||
134 | case PCI_CAPABILITY_LIST: | ||
135 | conf_data = PCI_CAPLIST_USB_POINTER; | ||
136 | break; | ||
137 | case PCI_INTERRUPT_LINE: | ||
138 | conf_data = | ||
139 | CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR); | ||
140 | break; | ||
141 | case PCI_EHCI_LEGSMIEN_REG: | ||
142 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
143 | conf_data = (hi & 0x003f0000) >> 16; | ||
144 | break; | ||
145 | case PCI_EHCI_LEGSMISTS_REG: | ||
146 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
147 | conf_data = (hi & 0x3f000000) >> 24; | ||
148 | break; | ||
149 | case PCI_EHCI_FLADJ_REG: | ||
150 | _rdmsr(USB_MSR_REG(USB_EHCI), &hi, &lo); | ||
151 | conf_data = hi & 0x00003f00; | ||
152 | break; | ||
153 | default: | ||
154 | break; | ||
155 | } | ||
156 | |||
157 | return conf_data; | ||
158 | } | ||
diff --git a/arch/mips/loongson/common/cs5536/cs5536_ide.c b/arch/mips/loongson/common/cs5536/cs5536_ide.c new file mode 100644 index 000000000000..3f61594b3884 --- /dev/null +++ b/arch/mips/loongson/common/cs5536/cs5536_ide.c | |||
@@ -0,0 +1,179 @@ | |||
1 | /* | ||
2 | * the IDE Virtual Support Module of AMD CS5536 | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote, Inc. | ||
5 | * Author : jlliu, liujl@lemote.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <cs5536/cs5536.h> | ||
17 | #include <cs5536/cs5536_pci.h> | ||
18 | |||
19 | void pci_ide_write_reg(int reg, u32 value) | ||
20 | { | ||
21 | u32 hi = 0, lo = value; | ||
22 | |||
23 | switch (reg) { | ||
24 | case PCI_COMMAND: | ||
25 | _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); | ||
26 | if (value & PCI_COMMAND_MASTER) | ||
27 | lo |= (0x03 << 4); | ||
28 | else | ||
29 | lo &= ~(0x03 << 4); | ||
30 | _wrmsr(GLIU_MSR_REG(GLIU_PAE), hi, lo); | ||
31 | break; | ||
32 | case PCI_STATUS: | ||
33 | if (value & PCI_STATUS_PARITY) { | ||
34 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
35 | if (lo & SB_PARE_ERR_FLAG) { | ||
36 | lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG; | ||
37 | _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); | ||
38 | } | ||
39 | } | ||
40 | break; | ||
41 | case PCI_CACHE_LINE_SIZE: | ||
42 | value &= 0x0000ff00; | ||
43 | _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo); | ||
44 | hi &= 0xffffff00; | ||
45 | hi |= (value >> 8); | ||
46 | _wrmsr(SB_MSR_REG(SB_CTRL), hi, lo); | ||
47 | break; | ||
48 | case PCI_BAR4_REG: | ||
49 | if (value == PCI_BAR_RANGE_MASK) { | ||
50 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
51 | lo |= SOFT_BAR_IDE_FLAG; | ||
52 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
53 | } else if (value & 0x01) { | ||
54 | lo = (value & 0xfffffff0) | 0x1; | ||
55 | _wrmsr(IDE_MSR_REG(IDE_IO_BAR), hi, lo); | ||
56 | |||
57 | value &= 0xfffffffc; | ||
58 | hi = 0x60000000 | ((value & 0x000ff000) >> 12); | ||
59 | lo = 0x000ffff0 | ((value & 0x00000fff) << 20); | ||
60 | _wrmsr(GLIU_MSR_REG(GLIU_IOD_BM2), hi, lo); | ||
61 | } | ||
62 | break; | ||
63 | case PCI_IDE_CFG_REG: | ||
64 | if (value == CS5536_IDE_FLASH_SIGNATURE) { | ||
65 | _rdmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), &hi, &lo); | ||
66 | lo |= 0x01; | ||
67 | _wrmsr(DIVIL_MSR_REG(DIVIL_BALL_OPTS), hi, lo); | ||
68 | } else | ||
69 | _wrmsr(IDE_MSR_REG(IDE_CFG), hi, lo); | ||
70 | break; | ||
71 | case PCI_IDE_DTC_REG: | ||
72 | _wrmsr(IDE_MSR_REG(IDE_DTC), hi, lo); | ||
73 | break; | ||
74 | case PCI_IDE_CAST_REG: | ||
75 | _wrmsr(IDE_MSR_REG(IDE_CAST), hi, lo); | ||
76 | break; | ||
77 | case PCI_IDE_ETC_REG: | ||
78 | _wrmsr(IDE_MSR_REG(IDE_ETC), hi, lo); | ||
79 | break; | ||
80 | case PCI_IDE_PM_REG: | ||
81 | _wrmsr(IDE_MSR_REG(IDE_INTERNAL_PM), hi, lo); | ||
82 | break; | ||
83 | default: | ||
84 | break; | ||
85 | } | ||
86 | } | ||
87 | |||
88 | u32 pci_ide_read_reg(int reg) | ||
89 | { | ||
90 | u32 conf_data = 0; | ||
91 | u32 hi, lo; | ||
92 | |||
93 | switch (reg) { | ||
94 | case PCI_VENDOR_ID: | ||
95 | conf_data = | ||
96 | CFG_PCI_VENDOR_ID(CS5536_IDE_DEVICE_ID, CS5536_VENDOR_ID); | ||
97 | break; | ||
98 | case PCI_COMMAND: | ||
99 | _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo); | ||
100 | if (lo & 0xfffffff0) | ||
101 | conf_data |= PCI_COMMAND_IO; | ||
102 | _rdmsr(GLIU_MSR_REG(GLIU_PAE), &hi, &lo); | ||
103 | if ((lo & 0x30) == 0x30) | ||
104 | conf_data |= PCI_COMMAND_MASTER; | ||
105 | break; | ||
106 | case PCI_STATUS: | ||
107 | conf_data |= PCI_STATUS_66MHZ; | ||
108 | conf_data |= PCI_STATUS_FAST_BACK; | ||
109 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
110 | if (lo & SB_PARE_ERR_FLAG) | ||
111 | conf_data |= PCI_STATUS_PARITY; | ||
112 | conf_data |= PCI_STATUS_DEVSEL_MEDIUM; | ||
113 | break; | ||
114 | case PCI_CLASS_REVISION: | ||
115 | _rdmsr(IDE_MSR_REG(IDE_CAP), &hi, &lo); | ||
116 | conf_data = lo & 0x000000ff; | ||
117 | conf_data |= (CS5536_IDE_CLASS_CODE << 8); | ||
118 | break; | ||
119 | case PCI_CACHE_LINE_SIZE: | ||
120 | _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo); | ||
121 | hi &= 0x000000f8; | ||
122 | conf_data = CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, hi); | ||
123 | break; | ||
124 | case PCI_BAR4_REG: | ||
125 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
126 | if (lo & SOFT_BAR_IDE_FLAG) { | ||
127 | conf_data = CS5536_IDE_RANGE | | ||
128 | PCI_BASE_ADDRESS_SPACE_IO; | ||
129 | lo &= ~SOFT_BAR_IDE_FLAG; | ||
130 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
131 | } else { | ||
132 | _rdmsr(IDE_MSR_REG(IDE_IO_BAR), &hi, &lo); | ||
133 | conf_data = lo & 0xfffffff0; | ||
134 | conf_data |= 0x01; | ||
135 | conf_data &= ~0x02; | ||
136 | } | ||
137 | break; | ||
138 | case PCI_CARDBUS_CIS: | ||
139 | conf_data = PCI_CARDBUS_CIS_POINTER; | ||
140 | break; | ||
141 | case PCI_SUBSYSTEM_VENDOR_ID: | ||
142 | conf_data = | ||
143 | CFG_PCI_VENDOR_ID(CS5536_IDE_SUB_ID, CS5536_SUB_VENDOR_ID); | ||
144 | break; | ||
145 | case PCI_ROM_ADDRESS: | ||
146 | conf_data = PCI_EXPANSION_ROM_BAR; | ||
147 | break; | ||
148 | case PCI_CAPABILITY_LIST: | ||
149 | conf_data = PCI_CAPLIST_POINTER; | ||
150 | break; | ||
151 | case PCI_INTERRUPT_LINE: | ||
152 | conf_data = | ||
153 | CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_IDE_INTR); | ||
154 | break; | ||
155 | case PCI_IDE_CFG_REG: | ||
156 | _rdmsr(IDE_MSR_REG(IDE_CFG), &hi, &lo); | ||
157 | conf_data = lo; | ||
158 | break; | ||
159 | case PCI_IDE_DTC_REG: | ||
160 | _rdmsr(IDE_MSR_REG(IDE_DTC), &hi, &lo); | ||
161 | conf_data = lo; | ||
162 | break; | ||
163 | case PCI_IDE_CAST_REG: | ||
164 | _rdmsr(IDE_MSR_REG(IDE_CAST), &hi, &lo); | ||
165 | conf_data = lo; | ||
166 | break; | ||
167 | case PCI_IDE_ETC_REG: | ||
168 | _rdmsr(IDE_MSR_REG(IDE_ETC), &hi, &lo); | ||
169 | conf_data = lo; | ||
170 | case PCI_IDE_PM_REG: | ||
171 | _rdmsr(IDE_MSR_REG(IDE_INTERNAL_PM), &hi, &lo); | ||
172 | conf_data = lo; | ||
173 | break; | ||
174 | default: | ||
175 | break; | ||
176 | } | ||
177 | |||
178 | return conf_data; | ||
179 | } | ||
diff --git a/arch/mips/loongson/common/cs5536/cs5536_isa.c b/arch/mips/loongson/common/cs5536/cs5536_isa.c new file mode 100644 index 000000000000..b6f17f538e48 --- /dev/null +++ b/arch/mips/loongson/common/cs5536/cs5536_isa.c | |||
@@ -0,0 +1,316 @@ | |||
1 | /* | ||
2 | * the ISA Virtual Support Module of AMD CS5536 | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote, Inc. | ||
5 | * Author : jlliu, liujl@lemote.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <cs5536/cs5536.h> | ||
17 | #include <cs5536/cs5536_pci.h> | ||
18 | |||
19 | /* common variables for PCI_ISA_READ/WRITE_BAR */ | ||
20 | static const u32 divil_msr_reg[6] = { | ||
21 | DIVIL_MSR_REG(DIVIL_LBAR_SMB), DIVIL_MSR_REG(DIVIL_LBAR_GPIO), | ||
22 | DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), DIVIL_MSR_REG(DIVIL_LBAR_IRQ), | ||
23 | DIVIL_MSR_REG(DIVIL_LBAR_PMS), DIVIL_MSR_REG(DIVIL_LBAR_ACPI), | ||
24 | }; | ||
25 | |||
26 | static const u32 soft_bar_flag[6] = { | ||
27 | SOFT_BAR_SMB_FLAG, SOFT_BAR_GPIO_FLAG, SOFT_BAR_MFGPT_FLAG, | ||
28 | SOFT_BAR_IRQ_FLAG, SOFT_BAR_PMS_FLAG, SOFT_BAR_ACPI_FLAG, | ||
29 | }; | ||
30 | |||
31 | static const u32 sb_msr_reg[6] = { | ||
32 | SB_MSR_REG(SB_R0), SB_MSR_REG(SB_R1), SB_MSR_REG(SB_R2), | ||
33 | SB_MSR_REG(SB_R3), SB_MSR_REG(SB_R4), SB_MSR_REG(SB_R5), | ||
34 | }; | ||
35 | |||
36 | static const u32 bar_space_range[6] = { | ||
37 | CS5536_SMB_RANGE, CS5536_GPIO_RANGE, CS5536_MFGPT_RANGE, | ||
38 | CS5536_IRQ_RANGE, CS5536_PMS_RANGE, CS5536_ACPI_RANGE, | ||
39 | }; | ||
40 | |||
41 | static const int bar_space_len[6] = { | ||
42 | CS5536_SMB_LENGTH, CS5536_GPIO_LENGTH, CS5536_MFGPT_LENGTH, | ||
43 | CS5536_IRQ_LENGTH, CS5536_PMS_LENGTH, CS5536_ACPI_LENGTH, | ||
44 | }; | ||
45 | |||
46 | /* | ||
47 | * enable the divil module bar space. | ||
48 | * | ||
49 | * For all the DIVIL module LBAR, you should control the DIVIL LBAR reg | ||
50 | * and the RCONFx(0~5) reg to use the modules. | ||
51 | */ | ||
52 | static void divil_lbar_enable(void) | ||
53 | { | ||
54 | u32 hi, lo; | ||
55 | int offset; | ||
56 | |||
57 | /* | ||
58 | * The DIVIL IRQ is not used yet. and make the RCONF0 reserved. | ||
59 | */ | ||
60 | |||
61 | for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) { | ||
62 | _rdmsr(DIVIL_MSR_REG(offset), &hi, &lo); | ||
63 | hi |= 0x01; | ||
64 | _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo); | ||
65 | } | ||
66 | } | ||
67 | |||
68 | /* | ||
69 | * disable the divil module bar space. | ||
70 | */ | ||
71 | static void divil_lbar_disable(void) | ||
72 | { | ||
73 | u32 hi, lo; | ||
74 | int offset; | ||
75 | |||
76 | for (offset = DIVIL_LBAR_SMB; offset <= DIVIL_LBAR_PMS; offset++) { | ||
77 | _rdmsr(DIVIL_MSR_REG(offset), &hi, &lo); | ||
78 | hi &= ~0x01; | ||
79 | _wrmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), hi, lo); | ||
80 | } | ||
81 | } | ||
82 | |||
83 | /* | ||
84 | * BAR write: write value to the n BAR | ||
85 | */ | ||
86 | |||
87 | void pci_isa_write_bar(int n, u32 value) | ||
88 | { | ||
89 | u32 hi = 0, lo = value; | ||
90 | |||
91 | if (value == PCI_BAR_RANGE_MASK) { | ||
92 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
93 | lo |= soft_bar_flag[n]; | ||
94 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
95 | } else if (value & 0x01) { | ||
96 | /* NATIVE reg */ | ||
97 | hi = 0x0000f001; | ||
98 | lo &= bar_space_range[n]; | ||
99 | _wrmsr(divil_msr_reg[n], hi, lo); | ||
100 | |||
101 | /* RCONFx is 4bytes in units for I/O space */ | ||
102 | hi = ((value & 0x000ffffc) << 12) | | ||
103 | ((bar_space_len[n] - 4) << 12) | 0x01; | ||
104 | lo = ((value & 0x000ffffc) << 12) | 0x01; | ||
105 | _wrmsr(sb_msr_reg[n], hi, lo); | ||
106 | } | ||
107 | } | ||
108 | |||
109 | /* | ||
110 | * BAR read: read the n BAR | ||
111 | */ | ||
112 | |||
113 | u32 pci_isa_read_bar(int n) | ||
114 | { | ||
115 | u32 conf_data = 0; | ||
116 | u32 hi, lo; | ||
117 | |||
118 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
119 | if (lo & soft_bar_flag[n]) { | ||
120 | conf_data = bar_space_range[n] | PCI_BASE_ADDRESS_SPACE_IO; | ||
121 | lo &= ~soft_bar_flag[n]; | ||
122 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
123 | } else { | ||
124 | _rdmsr(divil_msr_reg[n], &hi, &lo); | ||
125 | conf_data = lo & bar_space_range[n]; | ||
126 | conf_data |= 0x01; | ||
127 | conf_data &= ~0x02; | ||
128 | } | ||
129 | return conf_data; | ||
130 | } | ||
131 | |||
132 | /* | ||
133 | * isa_write: ISA write transfer | ||
134 | * | ||
135 | * We assume that this is not a bus master transfer. | ||
136 | */ | ||
137 | void pci_isa_write_reg(int reg, u32 value) | ||
138 | { | ||
139 | u32 hi = 0, lo = value; | ||
140 | u32 temp; | ||
141 | |||
142 | switch (reg) { | ||
143 | case PCI_COMMAND: | ||
144 | if (value & PCI_COMMAND_IO) | ||
145 | divil_lbar_enable(); | ||
146 | else | ||
147 | divil_lbar_disable(); | ||
148 | break; | ||
149 | case PCI_STATUS: | ||
150 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
151 | temp = lo & 0x0000ffff; | ||
152 | if ((value & PCI_STATUS_SIG_TARGET_ABORT) && | ||
153 | (lo & SB_TAS_ERR_EN)) | ||
154 | temp |= SB_TAS_ERR_FLAG; | ||
155 | |||
156 | if ((value & PCI_STATUS_REC_TARGET_ABORT) && | ||
157 | (lo & SB_TAR_ERR_EN)) | ||
158 | temp |= SB_TAR_ERR_FLAG; | ||
159 | |||
160 | if ((value & PCI_STATUS_REC_MASTER_ABORT) | ||
161 | && (lo & SB_MAR_ERR_EN)) | ||
162 | temp |= SB_MAR_ERR_FLAG; | ||
163 | |||
164 | if ((value & PCI_STATUS_DETECTED_PARITY) | ||
165 | && (lo & SB_PARE_ERR_EN)) | ||
166 | temp |= SB_PARE_ERR_FLAG; | ||
167 | |||
168 | lo = temp; | ||
169 | _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); | ||
170 | break; | ||
171 | case PCI_CACHE_LINE_SIZE: | ||
172 | value &= 0x0000ff00; | ||
173 | _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo); | ||
174 | hi &= 0xffffff00; | ||
175 | hi |= (value >> 8); | ||
176 | _wrmsr(SB_MSR_REG(SB_CTRL), hi, lo); | ||
177 | break; | ||
178 | case PCI_BAR0_REG: | ||
179 | pci_isa_write_bar(0, value); | ||
180 | break; | ||
181 | case PCI_BAR1_REG: | ||
182 | pci_isa_write_bar(1, value); | ||
183 | break; | ||
184 | case PCI_BAR2_REG: | ||
185 | pci_isa_write_bar(2, value); | ||
186 | break; | ||
187 | case PCI_BAR3_REG: | ||
188 | pci_isa_write_bar(3, value); | ||
189 | break; | ||
190 | case PCI_BAR4_REG: | ||
191 | pci_isa_write_bar(4, value); | ||
192 | break; | ||
193 | case PCI_BAR5_REG: | ||
194 | pci_isa_write_bar(5, value); | ||
195 | break; | ||
196 | case PCI_UART1_INT_REG: | ||
197 | _rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo); | ||
198 | /* disable uart1 interrupt in PIC */ | ||
199 | lo &= ~(0xf << 24); | ||
200 | if (value) /* enable uart1 interrupt in PIC */ | ||
201 | lo |= (CS5536_UART1_INTR << 24); | ||
202 | _wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo); | ||
203 | break; | ||
204 | case PCI_UART2_INT_REG: | ||
205 | _rdmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), &hi, &lo); | ||
206 | /* disable uart2 interrupt in PIC */ | ||
207 | lo &= ~(0xf << 28); | ||
208 | if (value) /* enable uart2 interrupt in PIC */ | ||
209 | lo |= (CS5536_UART2_INTR << 28); | ||
210 | _wrmsr(DIVIL_MSR_REG(PIC_YSEL_HIGH), hi, lo); | ||
211 | break; | ||
212 | case PCI_ISA_FIXUP_REG: | ||
213 | if (value) { | ||
214 | /* enable the TARGET ABORT/MASTER ABORT etc. */ | ||
215 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
216 | lo |= 0x00000063; | ||
217 | _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); | ||
218 | } | ||
219 | |||
220 | default: | ||
221 | /* ALL OTHER PCI CONFIG SPACE HEADER IS NOT IMPLEMENTED. */ | ||
222 | break; | ||
223 | } | ||
224 | } | ||
225 | |||
226 | /* | ||
227 | * isa_read: ISA read transfers | ||
228 | * | ||
229 | * We assume that this is not a bus master transfer. | ||
230 | */ | ||
231 | u32 pci_isa_read_reg(int reg) | ||
232 | { | ||
233 | u32 conf_data = 0; | ||
234 | u32 hi, lo; | ||
235 | |||
236 | switch (reg) { | ||
237 | case PCI_VENDOR_ID: | ||
238 | conf_data = | ||
239 | CFG_PCI_VENDOR_ID(CS5536_ISA_DEVICE_ID, CS5536_VENDOR_ID); | ||
240 | break; | ||
241 | case PCI_COMMAND: | ||
242 | /* we just check the first LBAR for the IO enable bit, */ | ||
243 | /* maybe we should changed later. */ | ||
244 | _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_SMB), &hi, &lo); | ||
245 | if (hi & 0x01) | ||
246 | conf_data |= PCI_COMMAND_IO; | ||
247 | break; | ||
248 | case PCI_STATUS: | ||
249 | conf_data |= PCI_STATUS_66MHZ; | ||
250 | conf_data |= PCI_STATUS_DEVSEL_MEDIUM; | ||
251 | conf_data |= PCI_STATUS_FAST_BACK; | ||
252 | |||
253 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
254 | if (lo & SB_TAS_ERR_FLAG) | ||
255 | conf_data |= PCI_STATUS_SIG_TARGET_ABORT; | ||
256 | if (lo & SB_TAR_ERR_FLAG) | ||
257 | conf_data |= PCI_STATUS_REC_TARGET_ABORT; | ||
258 | if (lo & SB_MAR_ERR_FLAG) | ||
259 | conf_data |= PCI_STATUS_REC_MASTER_ABORT; | ||
260 | if (lo & SB_PARE_ERR_FLAG) | ||
261 | conf_data |= PCI_STATUS_DETECTED_PARITY; | ||
262 | break; | ||
263 | case PCI_CLASS_REVISION: | ||
264 | _rdmsr(GLCP_MSR_REG(GLCP_CHIP_REV_ID), &hi, &lo); | ||
265 | conf_data = lo & 0x000000ff; | ||
266 | conf_data |= (CS5536_ISA_CLASS_CODE << 8); | ||
267 | break; | ||
268 | case PCI_CACHE_LINE_SIZE: | ||
269 | _rdmsr(SB_MSR_REG(SB_CTRL), &hi, &lo); | ||
270 | hi &= 0x000000f8; | ||
271 | conf_data = CFG_PCI_CACHE_LINE_SIZE(PCI_BRIDGE_HEADER_TYPE, hi); | ||
272 | break; | ||
273 | /* | ||
274 | * we only use the LBAR of DIVIL, no RCONF used. | ||
275 | * all of them are IO space. | ||
276 | */ | ||
277 | case PCI_BAR0_REG: | ||
278 | return pci_isa_read_bar(0); | ||
279 | break; | ||
280 | case PCI_BAR1_REG: | ||
281 | return pci_isa_read_bar(1); | ||
282 | break; | ||
283 | case PCI_BAR2_REG: | ||
284 | return pci_isa_read_bar(2); | ||
285 | break; | ||
286 | case PCI_BAR3_REG: | ||
287 | break; | ||
288 | case PCI_BAR4_REG: | ||
289 | return pci_isa_read_bar(4); | ||
290 | break; | ||
291 | case PCI_BAR5_REG: | ||
292 | return pci_isa_read_bar(5); | ||
293 | break; | ||
294 | case PCI_CARDBUS_CIS: | ||
295 | conf_data = PCI_CARDBUS_CIS_POINTER; | ||
296 | break; | ||
297 | case PCI_SUBSYSTEM_VENDOR_ID: | ||
298 | conf_data = | ||
299 | CFG_PCI_VENDOR_ID(CS5536_ISA_SUB_ID, CS5536_SUB_VENDOR_ID); | ||
300 | break; | ||
301 | case PCI_ROM_ADDRESS: | ||
302 | conf_data = PCI_EXPANSION_ROM_BAR; | ||
303 | break; | ||
304 | case PCI_CAPABILITY_LIST: | ||
305 | conf_data = PCI_CAPLIST_POINTER; | ||
306 | break; | ||
307 | case PCI_INTERRUPT_LINE: | ||
308 | /* no interrupt used here */ | ||
309 | conf_data = CFG_PCI_INTERRUPT_LINE(0x00, 0x00); | ||
310 | break; | ||
311 | default: | ||
312 | break; | ||
313 | } | ||
314 | |||
315 | return conf_data; | ||
316 | } | ||
diff --git a/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c new file mode 100644 index 000000000000..6cb44dbaeec2 --- /dev/null +++ b/arch/mips/loongson/common/cs5536/cs5536_mfgpt.c | |||
@@ -0,0 +1,217 @@ | |||
1 | /* | ||
2 | * CS5536 General timer functions | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote Inc. & Insititute of Computing Technology | ||
5 | * Author: Yanhua, yanh@lemote.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote Inc. | ||
8 | * Author: Wu zhangjin, wuzj@lemote.com | ||
9 | * | ||
10 | * Reference: AMD Geode(TM) CS5536 Companion Device Data Book | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or modify it | ||
13 | * under the terms of the GNU General Public License as published by the | ||
14 | * Free Software Foundation; either version 2 of the License, or (at your | ||
15 | * option) any later version. | ||
16 | */ | ||
17 | |||
18 | #include <linux/io.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/module.h> | ||
21 | #include <linux/jiffies.h> | ||
22 | #include <linux/spinlock.h> | ||
23 | #include <linux/interrupt.h> | ||
24 | #include <linux/clockchips.h> | ||
25 | |||
26 | #include <asm/time.h> | ||
27 | |||
28 | #include <cs5536/cs5536_mfgpt.h> | ||
29 | |||
30 | DEFINE_SPINLOCK(mfgpt_lock); | ||
31 | EXPORT_SYMBOL(mfgpt_lock); | ||
32 | |||
33 | static u32 mfgpt_base; | ||
34 | |||
35 | /* | ||
36 | * Initialize the MFGPT timer. | ||
37 | * | ||
38 | * This is also called after resume to bring the MFGPT into operation again. | ||
39 | */ | ||
40 | |||
41 | /* disable counter */ | ||
42 | void disable_mfgpt0_counter(void) | ||
43 | { | ||
44 | outw(inw(MFGPT0_SETUP) & 0x7fff, MFGPT0_SETUP); | ||
45 | } | ||
46 | EXPORT_SYMBOL(disable_mfgpt0_counter); | ||
47 | |||
48 | /* enable counter, comparator2 to event mode, 14.318MHz clock */ | ||
49 | void enable_mfgpt0_counter(void) | ||
50 | { | ||
51 | outw(0xe310, MFGPT0_SETUP); | ||
52 | } | ||
53 | EXPORT_SYMBOL(enable_mfgpt0_counter); | ||
54 | |||
55 | static void init_mfgpt_timer(enum clock_event_mode mode, | ||
56 | struct clock_event_device *evt) | ||
57 | { | ||
58 | spin_lock(&mfgpt_lock); | ||
59 | |||
60 | switch (mode) { | ||
61 | case CLOCK_EVT_MODE_PERIODIC: | ||
62 | outw(COMPARE, MFGPT0_CMP2); /* set comparator2 */ | ||
63 | outw(0, MFGPT0_CNT); /* set counter to 0 */ | ||
64 | enable_mfgpt0_counter(); | ||
65 | break; | ||
66 | |||
67 | case CLOCK_EVT_MODE_SHUTDOWN: | ||
68 | case CLOCK_EVT_MODE_UNUSED: | ||
69 | if (evt->mode == CLOCK_EVT_MODE_PERIODIC || | ||
70 | evt->mode == CLOCK_EVT_MODE_ONESHOT) | ||
71 | disable_mfgpt0_counter(); | ||
72 | break; | ||
73 | |||
74 | case CLOCK_EVT_MODE_ONESHOT: | ||
75 | /* The oneshot mode have very high deviation, Not use it! */ | ||
76 | break; | ||
77 | |||
78 | case CLOCK_EVT_MODE_RESUME: | ||
79 | /* Nothing to do here */ | ||
80 | break; | ||
81 | } | ||
82 | spin_unlock(&mfgpt_lock); | ||
83 | } | ||
84 | |||
85 | static struct clock_event_device mfgpt_clockevent = { | ||
86 | .name = "mfgpt", | ||
87 | .features = CLOCK_EVT_FEAT_PERIODIC, | ||
88 | .set_mode = init_mfgpt_timer, | ||
89 | .irq = CS5536_MFGPT_INTR, | ||
90 | }; | ||
91 | |||
92 | static irqreturn_t timer_interrupt(int irq, void *dev_id) | ||
93 | { | ||
94 | u32 basehi; | ||
95 | |||
96 | /* | ||
97 | * get MFGPT base address | ||
98 | * | ||
99 | * NOTE: do not remove me, it's need for the value of mfgpt_base is | ||
100 | * variable | ||
101 | */ | ||
102 | _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), &basehi, &mfgpt_base); | ||
103 | |||
104 | /* ack */ | ||
105 | outw(inw(MFGPT0_SETUP) | 0x4000, MFGPT0_SETUP); | ||
106 | |||
107 | mfgpt_clockevent.event_handler(&mfgpt_clockevent); | ||
108 | |||
109 | return IRQ_HANDLED; | ||
110 | } | ||
111 | |||
112 | static struct irqaction irq5 = { | ||
113 | .handler = timer_interrupt, | ||
114 | .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER, | ||
115 | .name = "timer" | ||
116 | }; | ||
117 | |||
118 | /* | ||
119 | * Initialize the conversion factor and the min/max deltas of the clock event | ||
120 | * structure and register the clock event source with the framework. | ||
121 | */ | ||
122 | void __init setup_mfgpt0_timer(void) | ||
123 | { | ||
124 | u32 basehi; | ||
125 | struct clock_event_device *cd = &mfgpt_clockevent; | ||
126 | unsigned int cpu = smp_processor_id(); | ||
127 | |||
128 | cd->cpumask = cpumask_of(cpu); | ||
129 | clockevent_set_clock(cd, MFGPT_TICK_RATE); | ||
130 | cd->max_delta_ns = clockevent_delta2ns(0xffff, cd); | ||
131 | cd->min_delta_ns = clockevent_delta2ns(0xf, cd); | ||
132 | |||
133 | /* Enable MFGPT0 Comparator 2 Output to the Interrupt Mapper */ | ||
134 | _wrmsr(DIVIL_MSR_REG(MFGPT_IRQ), 0, 0x100); | ||
135 | |||
136 | /* Enable Interrupt Gate 5 */ | ||
137 | _wrmsr(DIVIL_MSR_REG(PIC_ZSEL_LOW), 0, 0x50000); | ||
138 | |||
139 | /* get MFGPT base address */ | ||
140 | _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_MFGPT), &basehi, &mfgpt_base); | ||
141 | |||
142 | clockevents_register_device(cd); | ||
143 | |||
144 | setup_irq(CS5536_MFGPT_INTR, &irq5); | ||
145 | } | ||
146 | |||
147 | /* | ||
148 | * Since the MFGPT overflows every tick, its not very useful | ||
149 | * to just read by itself. So use jiffies to emulate a free | ||
150 | * running counter: | ||
151 | */ | ||
152 | static cycle_t mfgpt_read(struct clocksource *cs) | ||
153 | { | ||
154 | unsigned long flags; | ||
155 | int count; | ||
156 | u32 jifs; | ||
157 | static int old_count; | ||
158 | static u32 old_jifs; | ||
159 | |||
160 | spin_lock_irqsave(&mfgpt_lock, flags); | ||
161 | /* | ||
162 | * Although our caller may have the read side of xtime_lock, | ||
163 | * this is now a seqlock, and we are cheating in this routine | ||
164 | * by having side effects on state that we cannot undo if | ||
165 | * there is a collision on the seqlock and our caller has to | ||
166 | * retry. (Namely, old_jifs and old_count.) So we must treat | ||
167 | * jiffies as volatile despite the lock. We read jiffies | ||
168 | * before latching the timer count to guarantee that although | ||
169 | * the jiffies value might be older than the count (that is, | ||
170 | * the counter may underflow between the last point where | ||
171 | * jiffies was incremented and the point where we latch the | ||
172 | * count), it cannot be newer. | ||
173 | */ | ||
174 | jifs = jiffies; | ||
175 | /* read the count */ | ||
176 | count = inw(MFGPT0_CNT); | ||
177 | |||
178 | /* | ||
179 | * It's possible for count to appear to go the wrong way for this | ||
180 | * reason: | ||
181 | * | ||
182 | * The timer counter underflows, but we haven't handled the resulting | ||
183 | * interrupt and incremented jiffies yet. | ||
184 | * | ||
185 | * Previous attempts to handle these cases intelligently were buggy, so | ||
186 | * we just do the simple thing now. | ||
187 | */ | ||
188 | if (count < old_count && jifs == old_jifs) | ||
189 | count = old_count; | ||
190 | |||
191 | old_count = count; | ||
192 | old_jifs = jifs; | ||
193 | |||
194 | spin_unlock_irqrestore(&mfgpt_lock, flags); | ||
195 | |||
196 | return (cycle_t) (jifs * COMPARE) + count; | ||
197 | } | ||
198 | |||
199 | static struct clocksource clocksource_mfgpt = { | ||
200 | .name = "mfgpt", | ||
201 | .rating = 120, /* Functional for real use, but not desired */ | ||
202 | .read = mfgpt_read, | ||
203 | .mask = CLOCKSOURCE_MASK(32), | ||
204 | .mult = 0, | ||
205 | .shift = 22, | ||
206 | }; | ||
207 | |||
208 | int __init init_mfgpt_clocksource(void) | ||
209 | { | ||
210 | if (num_possible_cpus() > 1) /* MFGPT does not scale! */ | ||
211 | return 0; | ||
212 | |||
213 | clocksource_mfgpt.mult = clocksource_hz2mult(MFGPT_TICK_RATE, 22); | ||
214 | return clocksource_register(&clocksource_mfgpt); | ||
215 | } | ||
216 | |||
217 | arch_initcall(init_mfgpt_clocksource); | ||
diff --git a/arch/mips/loongson/common/cs5536/cs5536_ohci.c b/arch/mips/loongson/common/cs5536/cs5536_ohci.c new file mode 100644 index 000000000000..8fdb02b6e90f --- /dev/null +++ b/arch/mips/loongson/common/cs5536/cs5536_ohci.c | |||
@@ -0,0 +1,147 @@ | |||
1 | /* | ||
2 | * the OHCI Virtual Support Module of AMD CS5536 | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote, Inc. | ||
5 | * Author : jlliu, liujl@lemote.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <cs5536/cs5536.h> | ||
17 | #include <cs5536/cs5536_pci.h> | ||
18 | |||
19 | void pci_ohci_write_reg(int reg, u32 value) | ||
20 | { | ||
21 | u32 hi = 0, lo = value; | ||
22 | |||
23 | switch (reg) { | ||
24 | case PCI_COMMAND: | ||
25 | _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo); | ||
26 | if (value & PCI_COMMAND_MASTER) | ||
27 | hi |= PCI_COMMAND_MASTER; | ||
28 | else | ||
29 | hi &= ~PCI_COMMAND_MASTER; | ||
30 | |||
31 | if (value & PCI_COMMAND_MEMORY) | ||
32 | hi |= PCI_COMMAND_MEMORY; | ||
33 | else | ||
34 | hi &= ~PCI_COMMAND_MEMORY; | ||
35 | _wrmsr(USB_MSR_REG(USB_OHCI), hi, lo); | ||
36 | break; | ||
37 | case PCI_STATUS: | ||
38 | if (value & PCI_STATUS_PARITY) { | ||
39 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
40 | if (lo & SB_PARE_ERR_FLAG) { | ||
41 | lo = (lo & 0x0000ffff) | SB_PARE_ERR_FLAG; | ||
42 | _wrmsr(SB_MSR_REG(SB_ERROR), hi, lo); | ||
43 | } | ||
44 | } | ||
45 | break; | ||
46 | case PCI_BAR0_REG: | ||
47 | if (value == PCI_BAR_RANGE_MASK) { | ||
48 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
49 | lo |= SOFT_BAR_OHCI_FLAG; | ||
50 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
51 | } else if ((value & 0x01) == 0x00) { | ||
52 | _wrmsr(USB_MSR_REG(USB_OHCI), hi, lo); | ||
53 | |||
54 | value &= 0xfffffff0; | ||
55 | hi = 0x40000000 | ((value & 0xff000000) >> 24); | ||
56 | lo = 0x000fffff | ((value & 0x00fff000) << 8); | ||
57 | _wrmsr(GLIU_MSR_REG(GLIU_P2D_BM3), hi, lo); | ||
58 | } | ||
59 | break; | ||
60 | case PCI_OHCI_INT_REG: | ||
61 | _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo); | ||
62 | lo &= ~(0xf << PIC_YSEL_LOW_USB_SHIFT); | ||
63 | if (value) /* enable all the usb interrupt in PIC */ | ||
64 | lo |= (CS5536_USB_INTR << PIC_YSEL_LOW_USB_SHIFT); | ||
65 | _wrmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), hi, lo); | ||
66 | break; | ||
67 | default: | ||
68 | break; | ||
69 | } | ||
70 | } | ||
71 | |||
72 | u32 pci_ohci_read_reg(int reg) | ||
73 | { | ||
74 | u32 conf_data = 0; | ||
75 | u32 hi, lo; | ||
76 | |||
77 | switch (reg) { | ||
78 | case PCI_VENDOR_ID: | ||
79 | conf_data = | ||
80 | CFG_PCI_VENDOR_ID(CS5536_OHCI_DEVICE_ID, CS5536_VENDOR_ID); | ||
81 | break; | ||
82 | case PCI_COMMAND: | ||
83 | _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo); | ||
84 | if (hi & PCI_COMMAND_MASTER) | ||
85 | conf_data |= PCI_COMMAND_MASTER; | ||
86 | if (hi & PCI_COMMAND_MEMORY) | ||
87 | conf_data |= PCI_COMMAND_MEMORY; | ||
88 | break; | ||
89 | case PCI_STATUS: | ||
90 | conf_data |= PCI_STATUS_66MHZ; | ||
91 | conf_data |= PCI_STATUS_FAST_BACK; | ||
92 | _rdmsr(SB_MSR_REG(SB_ERROR), &hi, &lo); | ||
93 | if (lo & SB_PARE_ERR_FLAG) | ||
94 | conf_data |= PCI_STATUS_PARITY; | ||
95 | conf_data |= PCI_STATUS_DEVSEL_MEDIUM; | ||
96 | break; | ||
97 | case PCI_CLASS_REVISION: | ||
98 | _rdmsr(USB_MSR_REG(USB_CAP), &hi, &lo); | ||
99 | conf_data = lo & 0x000000ff; | ||
100 | conf_data |= (CS5536_OHCI_CLASS_CODE << 8); | ||
101 | break; | ||
102 | case PCI_CACHE_LINE_SIZE: | ||
103 | conf_data = | ||
104 | CFG_PCI_CACHE_LINE_SIZE(PCI_NORMAL_HEADER_TYPE, | ||
105 | PCI_NORMAL_LATENCY_TIMER); | ||
106 | break; | ||
107 | case PCI_BAR0_REG: | ||
108 | _rdmsr(GLCP_MSR_REG(GLCP_SOFT_COM), &hi, &lo); | ||
109 | if (lo & SOFT_BAR_OHCI_FLAG) { | ||
110 | conf_data = CS5536_OHCI_RANGE | | ||
111 | PCI_BASE_ADDRESS_SPACE_MEMORY; | ||
112 | lo &= ~SOFT_BAR_OHCI_FLAG; | ||
113 | _wrmsr(GLCP_MSR_REG(GLCP_SOFT_COM), hi, lo); | ||
114 | } else { | ||
115 | _rdmsr(USB_MSR_REG(USB_OHCI), &hi, &lo); | ||
116 | conf_data = lo & 0xffffff00; | ||
117 | conf_data &= ~0x0000000f; /* 32bit mem */ | ||
118 | } | ||
119 | break; | ||
120 | case PCI_CARDBUS_CIS: | ||
121 | conf_data = PCI_CARDBUS_CIS_POINTER; | ||
122 | break; | ||
123 | case PCI_SUBSYSTEM_VENDOR_ID: | ||
124 | conf_data = | ||
125 | CFG_PCI_VENDOR_ID(CS5536_OHCI_SUB_ID, CS5536_SUB_VENDOR_ID); | ||
126 | break; | ||
127 | case PCI_ROM_ADDRESS: | ||
128 | conf_data = PCI_EXPANSION_ROM_BAR; | ||
129 | break; | ||
130 | case PCI_CAPABILITY_LIST: | ||
131 | conf_data = PCI_CAPLIST_USB_POINTER; | ||
132 | break; | ||
133 | case PCI_INTERRUPT_LINE: | ||
134 | conf_data = | ||
135 | CFG_PCI_INTERRUPT_LINE(PCI_DEFAULT_PIN, CS5536_USB_INTR); | ||
136 | break; | ||
137 | case PCI_OHCI_INT_REG: | ||
138 | _rdmsr(DIVIL_MSR_REG(PIC_YSEL_LOW), &hi, &lo); | ||
139 | if ((lo & 0x00000f00) == CS5536_USB_INTR) | ||
140 | conf_data = 1; | ||
141 | break; | ||
142 | default: | ||
143 | break; | ||
144 | } | ||
145 | |||
146 | return conf_data; | ||
147 | } | ||
diff --git a/arch/mips/loongson/common/cs5536/cs5536_pci.c b/arch/mips/loongson/common/cs5536/cs5536_pci.c new file mode 100644 index 000000000000..e23f3d7d2c1d --- /dev/null +++ b/arch/mips/loongson/common/cs5536/cs5536_pci.c | |||
@@ -0,0 +1,87 @@ | |||
1 | /* | ||
2 | * read/write operation to the PCI config space of CS5536 | ||
3 | * | ||
4 | * Copyright (C) 2007 Lemote, Inc. | ||
5 | * Author : jlliu, liujl@lemote.com | ||
6 | * | ||
7 | * Copyright (C) 2009 Lemote, Inc. | ||
8 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | * | ||
15 | * the Virtual Support Module(VSM) for virtulizing the PCI | ||
16 | * configure space are defined in cs5536_modulename.c respectively, | ||
17 | * | ||
18 | * after this virtulizing, user can access the PCI configure space | ||
19 | * directly as a normal multi-function PCI device which follows | ||
20 | * the PCI-2.2 spec. | ||
21 | */ | ||
22 | |||
23 | #include <linux/types.h> | ||
24 | #include <cs5536/cs5536_vsm.h> | ||
25 | |||
26 | enum { | ||
27 | CS5536_FUNC_START = -1, | ||
28 | CS5536_ISA_FUNC, | ||
29 | reserved_func, | ||
30 | CS5536_IDE_FUNC, | ||
31 | CS5536_ACC_FUNC, | ||
32 | CS5536_OHCI_FUNC, | ||
33 | CS5536_EHCI_FUNC, | ||
34 | CS5536_FUNC_END, | ||
35 | }; | ||
36 | |||
37 | static const cs5536_pci_vsm_write vsm_conf_write[] = { | ||
38 | [CS5536_ISA_FUNC] pci_isa_write_reg, | ||
39 | [reserved_func] NULL, | ||
40 | [CS5536_IDE_FUNC] pci_ide_write_reg, | ||
41 | [CS5536_ACC_FUNC] pci_acc_write_reg, | ||
42 | [CS5536_OHCI_FUNC] pci_ohci_write_reg, | ||
43 | [CS5536_EHCI_FUNC] pci_ehci_write_reg, | ||
44 | }; | ||
45 | |||
46 | static const cs5536_pci_vsm_read vsm_conf_read[] = { | ||
47 | [CS5536_ISA_FUNC] pci_isa_read_reg, | ||
48 | [reserved_func] NULL, | ||
49 | [CS5536_IDE_FUNC] pci_ide_read_reg, | ||
50 | [CS5536_ACC_FUNC] pci_acc_read_reg, | ||
51 | [CS5536_OHCI_FUNC] pci_ohci_read_reg, | ||
52 | [CS5536_EHCI_FUNC] pci_ehci_read_reg, | ||
53 | }; | ||
54 | |||
55 | /* | ||
56 | * write to PCI config space and transfer it to MSR write. | ||
57 | */ | ||
58 | void cs5536_pci_conf_write4(int function, int reg, u32 value) | ||
59 | { | ||
60 | if ((function <= CS5536_FUNC_START) || (function >= CS5536_FUNC_END)) | ||
61 | return; | ||
62 | if ((reg < 0) || (reg > 0x100) || ((reg & 0x03) != 0)) | ||
63 | return; | ||
64 | |||
65 | if (vsm_conf_write[function] != NULL) | ||
66 | vsm_conf_write[function](reg, value); | ||
67 | } | ||
68 | |||
69 | /* | ||
70 | * read PCI config space and transfer it to MSR access. | ||
71 | */ | ||
72 | u32 cs5536_pci_conf_read4(int function, int reg) | ||
73 | { | ||
74 | u32 data = 0; | ||
75 | |||
76 | if ((function <= CS5536_FUNC_START) || (function >= CS5536_FUNC_END)) | ||
77 | return 0; | ||
78 | if ((reg < 0) || ((reg & 0x03) != 0)) | ||
79 | return 0; | ||
80 | if (reg > 0x100) | ||
81 | return 0xffffffff; | ||
82 | |||
83 | if (vsm_conf_read[function] != NULL) | ||
84 | data = vsm_conf_read[function](reg); | ||
85 | |||
86 | return data; | ||
87 | } | ||
diff --git a/arch/mips/loongson/common/early_printk.c b/arch/mips/loongson/common/early_printk.c index bc73edc0cfd8..23e7a8f8897f 100644 --- a/arch/mips/loongson/common/early_printk.c +++ b/arch/mips/loongson/common/early_printk.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* early printk support | 1 | /* early printk support |
2 | * | 2 | * |
3 | * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca> | 3 | * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca> |
4 | * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology | 4 | * Copyright (c) 2009 Lemote Inc. |
5 | * Author: Wu Zhangjin, wuzj@lemote.com | 5 | * Author: Wu Zhangjin, wuzj@lemote.com |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
@@ -12,26 +12,29 @@ | |||
12 | #include <linux/serial_reg.h> | 12 | #include <linux/serial_reg.h> |
13 | 13 | ||
14 | #include <loongson.h> | 14 | #include <loongson.h> |
15 | #include <machine.h> | ||
16 | 15 | ||
17 | #define PORT(base, offset) (u8 *)(base + offset) | 16 | #define PORT(base, offset) (u8 *)(base + offset) |
18 | 17 | ||
19 | static inline unsigned int serial_in(phys_addr_t base, int offset) | 18 | static inline unsigned int serial_in(unsigned char *base, int offset) |
20 | { | 19 | { |
21 | return readb(PORT(base, offset)); | 20 | return readb(PORT(base, offset)); |
22 | } | 21 | } |
23 | 22 | ||
24 | static inline void serial_out(phys_addr_t base, int offset, int value) | 23 | static inline void serial_out(unsigned char *base, int offset, int value) |
25 | { | 24 | { |
26 | writeb(value, PORT(base, offset)); | 25 | writeb(value, PORT(base, offset)); |
27 | } | 26 | } |
28 | 27 | ||
29 | void prom_putchar(char c) | 28 | void prom_putchar(char c) |
30 | { | 29 | { |
31 | phys_addr_t uart_base = | 30 | int timeout; |
32 | (phys_addr_t) ioremap_nocache(LOONGSON_UART_BASE, 8); | 31 | unsigned char *uart_base; |
33 | 32 | ||
34 | while ((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) | 33 | uart_base = (unsigned char *)_loongson_uart_base; |
34 | timeout = 1024; | ||
35 | |||
36 | while (((serial_in(uart_base, UART_LSR) & UART_LSR_THRE) == 0) && | ||
37 | (timeout-- > 0)) | ||
35 | ; | 38 | ; |
36 | 39 | ||
37 | serial_out(uart_base, UART_TX, c); | 40 | serial_out(uart_base, UART_TX, c); |
diff --git a/arch/mips/loongson/common/env.c b/arch/mips/loongson/common/env.c index b9ef50385541..196d947d929a 100644 --- a/arch/mips/loongson/common/env.c +++ b/arch/mips/loongson/common/env.c | |||
@@ -17,11 +17,14 @@ | |||
17 | * Free Software Foundation; either version 2 of the License, or (at your | 17 | * Free Software Foundation; either version 2 of the License, or (at your |
18 | * option) any later version. | 18 | * option) any later version. |
19 | */ | 19 | */ |
20 | #include <linux/module.h> | ||
21 | |||
20 | #include <asm/bootinfo.h> | 22 | #include <asm/bootinfo.h> |
21 | 23 | ||
22 | #include <loongson.h> | 24 | #include <loongson.h> |
23 | 25 | ||
24 | unsigned long bus_clock, cpu_clock_freq; | 26 | unsigned long bus_clock, cpu_clock_freq; |
27 | EXPORT_SYMBOL(cpu_clock_freq); | ||
25 | unsigned long memsize, highmemsize; | 28 | unsigned long memsize, highmemsize; |
26 | 29 | ||
27 | /* pmon passes arguments in 32bit pointers */ | 30 | /* pmon passes arguments in 32bit pointers */ |
diff --git a/arch/mips/loongson/common/init.c b/arch/mips/loongson/common/init.c index 3abe927422a3..a2abd9355737 100644 --- a/arch/mips/loongson/common/init.c +++ b/arch/mips/loongson/common/init.c | |||
@@ -1,5 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology | 2 | * Copyright (C) 2009 Lemote Inc. |
3 | * Author: Wu Zhangjin, wuzj@lemote.com | 3 | * Author: Wu Zhangjin, wuzj@lemote.com |
4 | * | 4 | * |
5 | * This program is free software; you can redistribute it and/or modify it | 5 | * This program is free software; you can redistribute it and/or modify it |
@@ -10,19 +10,28 @@ | |||
10 | 10 | ||
11 | #include <linux/bootmem.h> | 11 | #include <linux/bootmem.h> |
12 | 12 | ||
13 | #include <asm/bootinfo.h> | ||
14 | |||
15 | #include <loongson.h> | 13 | #include <loongson.h> |
16 | 14 | ||
15 | /* Loongson CPU address windows config space base address */ | ||
16 | unsigned long __maybe_unused _loongson_addrwincfg_base; | ||
17 | |||
17 | void __init prom_init(void) | 18 | void __init prom_init(void) |
18 | { | 19 | { |
19 | /* init base address of io space */ | 20 | /* init base address of io space */ |
20 | set_io_port_base((unsigned long) | 21 | set_io_port_base((unsigned long) |
21 | ioremap(BONITO_PCIIO_BASE, BONITO_PCIIO_SIZE)); | 22 | ioremap(LOONGSON_PCIIO_BASE, LOONGSON_PCIIO_SIZE)); |
23 | |||
24 | #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG | ||
25 | _loongson_addrwincfg_base = (unsigned long) | ||
26 | ioremap(LOONGSON_ADDRWINCFG_BASE, LOONGSON_ADDRWINCFG_SIZE); | ||
27 | #endif | ||
22 | 28 | ||
23 | prom_init_cmdline(); | 29 | prom_init_cmdline(); |
24 | prom_init_env(); | 30 | prom_init_env(); |
25 | prom_init_memory(); | 31 | prom_init_memory(); |
32 | |||
33 | /*init the uart base address */ | ||
34 | prom_init_uart_base(); | ||
26 | } | 35 | } |
27 | 36 | ||
28 | void __init prom_free_prom_memory(void) | 37 | void __init prom_free_prom_memory(void) |
diff --git a/arch/mips/loongson/common/irq.c b/arch/mips/loongson/common/irq.c index b32b4a3e5137..20e732831978 100644 --- a/arch/mips/loongson/common/irq.c +++ b/arch/mips/loongson/common/irq.c | |||
@@ -20,21 +20,21 @@ void bonito_irqdispatch(void) | |||
20 | int i; | 20 | int i; |
21 | 21 | ||
22 | /* workaround the IO dma problem: let cpu looping to allow DMA finish */ | 22 | /* workaround the IO dma problem: let cpu looping to allow DMA finish */ |
23 | int_status = BONITO_INTISR; | 23 | int_status = LOONGSON_INTISR; |
24 | if (int_status & (1 << 10)) { | 24 | if (int_status & (1 << 10)) { |
25 | while (int_status & (1 << 10)) { | 25 | while (int_status & (1 << 10)) { |
26 | udelay(1); | 26 | udelay(1); |
27 | int_status = BONITO_INTISR; | 27 | int_status = LOONGSON_INTISR; |
28 | } | 28 | } |
29 | } | 29 | } |
30 | 30 | ||
31 | /* Get pending sources, masked by current enables */ | 31 | /* Get pending sources, masked by current enables */ |
32 | int_status = BONITO_INTISR & BONITO_INTEN; | 32 | int_status = LOONGSON_INTISR & LOONGSON_INTEN; |
33 | 33 | ||
34 | if (int_status != 0) { | 34 | if (int_status != 0) { |
35 | i = __ffs(int_status); | 35 | i = __ffs(int_status); |
36 | int_status &= ~(1 << i); | 36 | int_status &= ~(1 << i); |
37 | do_IRQ(BONITO_IRQ_BASE + i); | 37 | do_IRQ(LOONGSON_IRQ_BASE + i); |
38 | } | 38 | } |
39 | } | 39 | } |
40 | 40 | ||
@@ -60,13 +60,13 @@ void __init arch_init_irq(void) | |||
60 | set_irq_trigger_mode(); | 60 | set_irq_trigger_mode(); |
61 | 61 | ||
62 | /* no steer */ | 62 | /* no steer */ |
63 | BONITO_INTSTEER = 0; | 63 | LOONGSON_INTSTEER = 0; |
64 | 64 | ||
65 | /* | 65 | /* |
66 | * Mask out all interrupt by writing "1" to all bit position in | 66 | * Mask out all interrupt by writing "1" to all bit position in |
67 | * the interrupt reset reg. | 67 | * the interrupt reset reg. |
68 | */ | 68 | */ |
69 | BONITO_INTENCLR = ~0; | 69 | LOONGSON_INTENCLR = ~0; |
70 | 70 | ||
71 | /* machine specific irq init */ | 71 | /* machine specific irq init */ |
72 | mach_init_irq(); | 72 | mach_init_irq(); |
diff --git a/arch/mips/loongson/common/machtype.c b/arch/mips/loongson/common/machtype.c index 7b348248de7d..0ed52b3f5314 100644 --- a/arch/mips/loongson/common/machtype.c +++ b/arch/mips/loongson/common/machtype.c | |||
@@ -15,6 +15,9 @@ | |||
15 | #include <loongson.h> | 15 | #include <loongson.h> |
16 | #include <machine.h> | 16 | #include <machine.h> |
17 | 17 | ||
18 | /* please ensure the length of the machtype string is less than 50 */ | ||
19 | #define MACHTYPE_LEN 50 | ||
20 | |||
18 | static const char *system_types[] = { | 21 | static const char *system_types[] = { |
19 | [MACH_LOONGSON_UNKNOWN] "unknown loongson machine", | 22 | [MACH_LOONGSON_UNKNOWN] "unknown loongson machine", |
20 | [MACH_LEMOTE_FL2E] "lemote-fuloong-2e-box", | 23 | [MACH_LEMOTE_FL2E] "lemote-fuloong-2e-box", |
@@ -22,29 +25,35 @@ static const char *system_types[] = { | |||
22 | [MACH_LEMOTE_ML2F7] "lemote-mengloong-2f-7inches", | 25 | [MACH_LEMOTE_ML2F7] "lemote-mengloong-2f-7inches", |
23 | [MACH_LEMOTE_YL2F89] "lemote-yeeloong-2f-8.9inches", | 26 | [MACH_LEMOTE_YL2F89] "lemote-yeeloong-2f-8.9inches", |
24 | [MACH_DEXXON_GDIUM2F10] "dexxon-gidum-2f-10inches", | 27 | [MACH_DEXXON_GDIUM2F10] "dexxon-gidum-2f-10inches", |
28 | [MACH_LEMOTE_NAS] "lemote-nas-2f", | ||
29 | [MACH_LEMOTE_LL2F] "lemote-lynloong-2f", | ||
25 | [MACH_LOONGSON_END] NULL, | 30 | [MACH_LOONGSON_END] NULL, |
26 | }; | 31 | }; |
27 | 32 | ||
28 | const char *get_system_type(void) | 33 | const char *get_system_type(void) |
29 | { | 34 | { |
30 | if (mips_machtype == MACH_UNKNOWN) | ||
31 | mips_machtype = LOONGSON_MACHTYPE; | ||
32 | |||
33 | return system_types[mips_machtype]; | 35 | return system_types[mips_machtype]; |
34 | } | 36 | } |
35 | 37 | ||
36 | static __init int machtype_setup(char *str) | 38 | void __init prom_init_machtype(void) |
37 | { | 39 | { |
40 | char *p, str[MACHTYPE_LEN]; | ||
38 | int machtype = MACH_LEMOTE_FL2E; | 41 | int machtype = MACH_LEMOTE_FL2E; |
39 | 42 | ||
40 | if (!str) | 43 | mips_machtype = LOONGSON_MACHTYPE; |
41 | return -EINVAL; | 44 | |
45 | p = strstr(arcs_cmdline, "machtype="); | ||
46 | if (!p) | ||
47 | return; | ||
48 | p += strlen("machtype="); | ||
49 | strncpy(str, p, MACHTYPE_LEN); | ||
50 | p = strstr(str, " "); | ||
51 | if (p) | ||
52 | *p = '\0'; | ||
42 | 53 | ||
43 | for (; system_types[machtype]; machtype++) | 54 | for (; system_types[machtype]; machtype++) |
44 | if (strstr(system_types[machtype], str)) { | 55 | if (strstr(system_types[machtype], str)) { |
45 | mips_machtype = machtype; | 56 | mips_machtype = machtype; |
46 | break; | 57 | break; |
47 | } | 58 | } |
48 | return 0; | ||
49 | } | 59 | } |
50 | __setup("machtype=", machtype_setup); | ||
diff --git a/arch/mips/loongson/common/mem.c b/arch/mips/loongson/common/mem.c index e94ef158f980..ceacd092b446 100644 --- a/arch/mips/loongson/common/mem.c +++ b/arch/mips/loongson/common/mem.c | |||
@@ -12,15 +12,40 @@ | |||
12 | 12 | ||
13 | #include <loongson.h> | 13 | #include <loongson.h> |
14 | #include <mem.h> | 14 | #include <mem.h> |
15 | #include <pci.h> | ||
15 | 16 | ||
16 | void __init prom_init_memory(void) | 17 | void __init prom_init_memory(void) |
17 | { | 18 | { |
18 | add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); | 19 | add_memory_region(0x0, (memsize << 20), BOOT_MEM_RAM); |
20 | |||
21 | add_memory_region(memsize << 20, LOONGSON_PCI_MEM_START - (memsize << | ||
22 | 20), BOOT_MEM_RESERVED); | ||
23 | #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG | ||
24 | { | ||
25 | int bit; | ||
26 | |||
27 | bit = fls(memsize + highmemsize); | ||
28 | if (bit != ffs(memsize + highmemsize)) | ||
29 | bit += 20; | ||
30 | else | ||
31 | bit = bit + 20 - 1; | ||
32 | |||
33 | /* set cpu window3 to map CPU to DDR: 2G -> 2G */ | ||
34 | LOONGSON_ADDRWIN_CPUTODDR(ADDRWIN_WIN3, 0x80000000ul, | ||
35 | 0x80000000ul, (1 << bit)); | ||
36 | mmiowb(); | ||
37 | } | ||
38 | #endif /* !CONFIG_CPU_SUPPORTS_ADDRWINCFG */ | ||
39 | |||
19 | #ifdef CONFIG_64BIT | 40 | #ifdef CONFIG_64BIT |
20 | if (highmemsize > 0) | 41 | if (highmemsize > 0) |
21 | add_memory_region(LOONGSON_HIGHMEM_START, | 42 | add_memory_region(LOONGSON_HIGHMEM_START, |
22 | highmemsize << 20, BOOT_MEM_RAM); | 43 | highmemsize << 20, BOOT_MEM_RAM); |
23 | #endif /* CONFIG_64BIT */ | 44 | |
45 | add_memory_region(LOONGSON_PCI_MEM_END + 1, LOONGSON_HIGHMEM_START - | ||
46 | LOONGSON_PCI_MEM_END - 1, BOOT_MEM_RESERVED); | ||
47 | |||
48 | #endif /* !CONFIG_64BIT */ | ||
24 | } | 49 | } |
25 | 50 | ||
26 | /* override of arch/mips/mm/cache.c: __uncached_access */ | 51 | /* override of arch/mips/mm/cache.c: __uncached_access */ |
@@ -33,3 +58,61 @@ int __uncached_access(struct file *file, unsigned long addr) | |||
33 | ((addr >= LOONGSON_MMIO_MEM_START) && | 58 | ((addr >= LOONGSON_MMIO_MEM_START) && |
34 | (addr < LOONGSON_MMIO_MEM_END)); | 59 | (addr < LOONGSON_MMIO_MEM_END)); |
35 | } | 60 | } |
61 | |||
62 | #ifdef CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED | ||
63 | |||
64 | #include <linux/pci.h> | ||
65 | #include <linux/sched.h> | ||
66 | #include <asm/current.h> | ||
67 | |||
68 | static unsigned long uca_start, uca_end; | ||
69 | |||
70 | pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn, | ||
71 | unsigned long size, pgprot_t vma_prot) | ||
72 | { | ||
73 | unsigned long offset = pfn << PAGE_SHIFT; | ||
74 | unsigned long end = offset + size; | ||
75 | |||
76 | if (__uncached_access(file, offset)) { | ||
77 | if (((uca_start && offset) >= uca_start) && | ||
78 | (end <= uca_end)) | ||
79 | return __pgprot((pgprot_val(vma_prot) & | ||
80 | ~_CACHE_MASK) | | ||
81 | _CACHE_UNCACHED_ACCELERATED); | ||
82 | else | ||
83 | return pgprot_noncached(vma_prot); | ||
84 | } | ||
85 | return vma_prot; | ||
86 | } | ||
87 | |||
88 | static int __init find_vga_mem_init(void) | ||
89 | { | ||
90 | struct pci_dev *dev = 0; | ||
91 | struct resource *r; | ||
92 | int idx; | ||
93 | |||
94 | if (uca_start) | ||
95 | return 0; | ||
96 | |||
97 | for_each_pci_dev(dev) { | ||
98 | if ((dev->class >> 8) == PCI_CLASS_DISPLAY_VGA) { | ||
99 | for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) { | ||
100 | r = &dev->resource[idx]; | ||
101 | if (!r->start && r->end) | ||
102 | continue; | ||
103 | if (r->flags & IORESOURCE_IO) | ||
104 | continue; | ||
105 | if (r->flags & IORESOURCE_MEM) { | ||
106 | uca_start = r->start; | ||
107 | uca_end = r->end; | ||
108 | return 0; | ||
109 | } | ||
110 | } | ||
111 | } | ||
112 | } | ||
113 | |||
114 | return 0; | ||
115 | } | ||
116 | |||
117 | late_initcall(find_vga_mem_init); | ||
118 | #endif /* !CONFIG_CPU_SUPPORTS_UNCACHED_ACCELERATED */ | ||
diff --git a/arch/mips/loongson/common/pci.c b/arch/mips/loongson/common/pci.c index a3a4abfb6c9a..31d8c5ecd16c 100644 --- a/arch/mips/loongson/common/pci.c +++ b/arch/mips/loongson/common/pci.c | |||
@@ -27,7 +27,7 @@ static struct resource loongson_pci_io_resource = { | |||
27 | }; | 27 | }; |
28 | 28 | ||
29 | static struct pci_controller loongson_pci_controller = { | 29 | static struct pci_controller loongson_pci_controller = { |
30 | .pci_ops = &bonito64_pci_ops, | 30 | .pci_ops = &loongson_pci_ops, |
31 | .io_resource = &loongson_pci_io_resource, | 31 | .io_resource = &loongson_pci_io_resource, |
32 | .mem_resource = &loongson_pci_mem_resource, | 32 | .mem_resource = &loongson_pci_mem_resource, |
33 | .mem_offset = 0x00000000UL, | 33 | .mem_offset = 0x00000000UL, |
@@ -44,15 +44,15 @@ static void __init setup_pcimap(void) | |||
44 | * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0 | 44 | * pcimap: PCI_MAP2 PCI_Mem_Lo2 PCI_Mem_Lo1 PCI_Mem_Lo0 |
45 | * [<2G] [384M,448M] [320M,384M] [0M,64M] | 45 | * [<2G] [384M,448M] [320M,384M] [0M,64M] |
46 | */ | 46 | */ |
47 | BONITO_PCIMAP = BONITO_PCIMAP_PCIMAP_2 | | 47 | LOONGSON_PCIMAP = LOONGSON_PCIMAP_PCIMAP_2 | |
48 | BONITO_PCIMAP_WIN(2, BONITO_PCILO2_BASE) | | 48 | LOONGSON_PCIMAP_WIN(2, LOONGSON_PCILO2_BASE) | |
49 | BONITO_PCIMAP_WIN(1, BONITO_PCILO1_BASE) | | 49 | LOONGSON_PCIMAP_WIN(1, LOONGSON_PCILO1_BASE) | |
50 | BONITO_PCIMAP_WIN(0, 0); | 50 | LOONGSON_PCIMAP_WIN(0, 0); |
51 | 51 | ||
52 | /* | 52 | /* |
53 | * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] | 53 | * PCI-DMA to local mapping: [2G,2G+256M] -> [0M,256M] |
54 | */ | 54 | */ |
55 | BONITO_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ | 55 | LOONGSON_PCIBASE0 = 0x80000000ul; /* base: 2G -> mmap: 0M */ |
56 | /* size: 256M, burst transmission, pre-fetch enable, 64bit */ | 56 | /* size: 256M, burst transmission, pre-fetch enable, 64bit */ |
57 | LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul; | 57 | LOONGSON_PCI_HIT0_SEL_L = 0xc000000cul; |
58 | LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful; | 58 | LOONGSON_PCI_HIT0_SEL_H = 0xfffffffful; |
@@ -67,6 +67,14 @@ static void __init setup_pcimap(void) | |||
67 | /* can not change gnt to break pci transfer when device's gnt not | 67 | /* can not change gnt to break pci transfer when device's gnt not |
68 | deassert for some broken device */ | 68 | deassert for some broken device */ |
69 | LOONGSON_PXARB_CFG = 0x00fe0105ul; | 69 | LOONGSON_PXARB_CFG = 0x00fe0105ul; |
70 | |||
71 | #ifdef CONFIG_CPU_SUPPORTS_ADDRWINCFG | ||
72 | /* | ||
73 | * set cpu addr window2 to map CPU address space to PCI address space | ||
74 | */ | ||
75 | LOONGSON_ADDRWIN_CPUTOPCI(ADDRWIN_WIN2, LOONGSON_CPU_MEM_SRC, | ||
76 | LOONGSON_PCI_MEM_DST, MMAP_CPUTOPCI_SIZE); | ||
77 | #endif | ||
70 | } | 78 | } |
71 | 79 | ||
72 | static int __init pcibios_init(void) | 80 | static int __init pcibios_init(void) |
diff --git a/arch/mips/loongson/common/platform.c b/arch/mips/loongson/common/platform.c new file mode 100644 index 000000000000..be81777eb94d --- /dev/null +++ b/arch/mips/loongson/common/platform.c | |||
@@ -0,0 +1,30 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Lemote Inc. | ||
3 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/err.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | |||
14 | static struct platform_device loongson2_cpufreq_device = { | ||
15 | .name = "loongson2_cpufreq", | ||
16 | .id = -1, | ||
17 | }; | ||
18 | |||
19 | static int __init loongson2_cpufreq_init(void) | ||
20 | { | ||
21 | struct cpuinfo_mips *c = ¤t_cpu_data; | ||
22 | |||
23 | /* Only 2F revision and it's successors support CPUFreq */ | ||
24 | if ((c->processor_id & PRID_REV_MASK) >= PRID_REV_LOONGSON2F) | ||
25 | return platform_device_register(&loongson2_cpufreq_device); | ||
26 | |||
27 | return -ENODEV; | ||
28 | } | ||
29 | |||
30 | arch_initcall(loongson2_cpufreq_init); | ||
diff --git a/arch/mips/loongson/common/pm.c b/arch/mips/loongson/common/pm.c new file mode 100644 index 000000000000..b625fec8a4d5 --- /dev/null +++ b/arch/mips/loongson/common/pm.c | |||
@@ -0,0 +1,161 @@ | |||
1 | /* | ||
2 | * loongson-specific suspend support | ||
3 | * | ||
4 | * Copyright (C) 2009 Lemote Inc. | ||
5 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | #include <linux/suspend.h> | ||
13 | #include <linux/interrupt.h> | ||
14 | #include <linux/pm.h> | ||
15 | |||
16 | #include <asm/i8259.h> | ||
17 | #include <asm/mipsregs.h> | ||
18 | |||
19 | #include <loongson.h> | ||
20 | |||
21 | static unsigned int __maybe_unused cached_master_mask; /* i8259A */ | ||
22 | static unsigned int __maybe_unused cached_slave_mask; | ||
23 | static unsigned int __maybe_unused cached_bonito_irq_mask; /* bonito */ | ||
24 | |||
25 | void arch_suspend_disable_irqs(void) | ||
26 | { | ||
27 | /* disable all mips events */ | ||
28 | local_irq_disable(); | ||
29 | |||
30 | #ifdef CONFIG_I8259 | ||
31 | /* disable all events of i8259A */ | ||
32 | cached_slave_mask = inb(PIC_SLAVE_IMR); | ||
33 | cached_master_mask = inb(PIC_MASTER_IMR); | ||
34 | |||
35 | outb(0xff, PIC_SLAVE_IMR); | ||
36 | inb(PIC_SLAVE_IMR); | ||
37 | outb(0xff, PIC_MASTER_IMR); | ||
38 | inb(PIC_MASTER_IMR); | ||
39 | #endif | ||
40 | /* disable all events of bonito */ | ||
41 | cached_bonito_irq_mask = LOONGSON_INTEN; | ||
42 | LOONGSON_INTENCLR = 0xffff; | ||
43 | (void)LOONGSON_INTENCLR; | ||
44 | } | ||
45 | |||
46 | void arch_suspend_enable_irqs(void) | ||
47 | { | ||
48 | /* enable all mips events */ | ||
49 | local_irq_enable(); | ||
50 | #ifdef CONFIG_I8259 | ||
51 | /* only enable the cached events of i8259A */ | ||
52 | outb(cached_slave_mask, PIC_SLAVE_IMR); | ||
53 | outb(cached_master_mask, PIC_MASTER_IMR); | ||
54 | #endif | ||
55 | /* enable all cached events of bonito */ | ||
56 | LOONGSON_INTENSET = cached_bonito_irq_mask; | ||
57 | (void)LOONGSON_INTENSET; | ||
58 | } | ||
59 | |||
60 | /* | ||
61 | * Setup the board-specific events for waking up loongson from wait mode | ||
62 | */ | ||
63 | void __weak setup_wakeup_events(void) | ||
64 | { | ||
65 | } | ||
66 | |||
67 | /* | ||
68 | * Check wakeup events | ||
69 | */ | ||
70 | int __weak wakeup_loongson(void) | ||
71 | { | ||
72 | return 1; | ||
73 | } | ||
74 | |||
75 | /* | ||
76 | * If the events are really what we want to wakeup the CPU, wake it up | ||
77 | * otherwise put the CPU asleep again. | ||
78 | */ | ||
79 | static void wait_for_wakeup_events(void) | ||
80 | { | ||
81 | while (!wakeup_loongson()) | ||
82 | LOONGSON_CHIPCFG0 &= ~0x7; | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * Stop all perf counters | ||
87 | * | ||
88 | * $24 is the control register of Loongson perf counter | ||
89 | */ | ||
90 | static inline void stop_perf_counters(void) | ||
91 | { | ||
92 | __write_64bit_c0_register($24, 0, 0); | ||
93 | } | ||
94 | |||
95 | |||
96 | static void loongson_suspend_enter(void) | ||
97 | { | ||
98 | static unsigned int cached_cpu_freq; | ||
99 | |||
100 | /* setup wakeup events via enabling the IRQs */ | ||
101 | setup_wakeup_events(); | ||
102 | |||
103 | stop_perf_counters(); | ||
104 | |||
105 | cached_cpu_freq = LOONGSON_CHIPCFG0; | ||
106 | |||
107 | /* Put CPU into wait mode */ | ||
108 | LOONGSON_CHIPCFG0 &= ~0x7; | ||
109 | |||
110 | /* wait for the given events to wakeup cpu from wait mode */ | ||
111 | wait_for_wakeup_events(); | ||
112 | |||
113 | LOONGSON_CHIPCFG0 = cached_cpu_freq; | ||
114 | mmiowb(); | ||
115 | } | ||
116 | |||
117 | void __weak mach_suspend(void) | ||
118 | { | ||
119 | } | ||
120 | |||
121 | void __weak mach_resume(void) | ||
122 | { | ||
123 | } | ||
124 | |||
125 | static int loongson_pm_enter(suspend_state_t state) | ||
126 | { | ||
127 | mach_suspend(); | ||
128 | |||
129 | /* processor specific suspend */ | ||
130 | loongson_suspend_enter(); | ||
131 | |||
132 | mach_resume(); | ||
133 | |||
134 | return 0; | ||
135 | } | ||
136 | |||
137 | static int loongson_pm_valid_state(suspend_state_t state) | ||
138 | { | ||
139 | switch (state) { | ||
140 | case PM_SUSPEND_ON: | ||
141 | case PM_SUSPEND_STANDBY: | ||
142 | case PM_SUSPEND_MEM: | ||
143 | return 1; | ||
144 | |||
145 | default: | ||
146 | return 0; | ||
147 | } | ||
148 | } | ||
149 | |||
150 | static struct platform_suspend_ops loongson_pm_ops = { | ||
151 | .valid = loongson_pm_valid_state, | ||
152 | .enter = loongson_pm_enter, | ||
153 | }; | ||
154 | |||
155 | static int __init loongson_pm_init(void) | ||
156 | { | ||
157 | suspend_set_ops(&loongson_pm_ops); | ||
158 | |||
159 | return 0; | ||
160 | } | ||
161 | arch_initcall(loongson_pm_init); | ||
diff --git a/arch/mips/loongson/common/reset.c b/arch/mips/loongson/common/reset.c index 97e918251edd..d57f1719da95 100644 --- a/arch/mips/loongson/common/reset.c +++ b/arch/mips/loongson/common/reset.c | |||
@@ -22,7 +22,7 @@ static void loongson_restart(char *command) | |||
22 | mach_prepare_reboot(); | 22 | mach_prepare_reboot(); |
23 | 23 | ||
24 | /* reboot via jumping to boot base address */ | 24 | /* reboot via jumping to boot base address */ |
25 | ((void (*)(void))ioremap_nocache(BONITO_BOOT_BASE, 4)) (); | 25 | ((void (*)(void))ioremap_nocache(LOONGSON_BOOT_BASE, 4)) (); |
26 | } | 26 | } |
27 | 27 | ||
28 | static void loongson_halt(void) | 28 | static void loongson_halt(void) |
diff --git a/arch/mips/loongson/common/serial.c b/arch/mips/loongson/common/serial.c new file mode 100644 index 000000000000..23b66a5f88cb --- /dev/null +++ b/arch/mips/loongson/common/serial.c | |||
@@ -0,0 +1,76 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2007 Ralf Baechle (ralf@linux-mips.org) | ||
7 | * | ||
8 | * Copyright (C) 2009 Lemote, Inc. | ||
9 | * Author: Yan hua (yanhua@lemote.com) | ||
10 | * Author: Wu Zhangjin (wuzj@lemote.com) | ||
11 | */ | ||
12 | |||
13 | #include <linux/io.h> | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/serial_8250.h> | ||
16 | |||
17 | #include <asm/bootinfo.h> | ||
18 | |||
19 | #include <loongson.h> | ||
20 | #include <machine.h> | ||
21 | |||
22 | #define PORT(int) \ | ||
23 | { \ | ||
24 | .irq = int, \ | ||
25 | .uartclk = 1843200, \ | ||
26 | .iotype = UPIO_PORT, \ | ||
27 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \ | ||
28 | .regshift = 0, \ | ||
29 | } | ||
30 | |||
31 | #define PORT_M(int) \ | ||
32 | { \ | ||
33 | .irq = MIPS_CPU_IRQ_BASE + (int), \ | ||
34 | .uartclk = 3686400, \ | ||
35 | .iotype = UPIO_MEM, \ | ||
36 | .membase = (void __iomem *)NULL, \ | ||
37 | .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, \ | ||
38 | .regshift = 0, \ | ||
39 | } | ||
40 | |||
41 | static struct plat_serial8250_port uart8250_data[][2] = { | ||
42 | [MACH_LOONGSON_UNKNOWN] {}, | ||
43 | [MACH_LEMOTE_FL2E] {PORT(4), {} }, | ||
44 | [MACH_LEMOTE_FL2F] {PORT(3), {} }, | ||
45 | [MACH_LEMOTE_ML2F7] {PORT_M(3), {} }, | ||
46 | [MACH_LEMOTE_YL2F89] {PORT_M(3), {} }, | ||
47 | [MACH_DEXXON_GDIUM2F10] {PORT_M(3), {} }, | ||
48 | [MACH_LEMOTE_NAS] {PORT_M(3), {} }, | ||
49 | [MACH_LEMOTE_LL2F] {PORT(3), {} }, | ||
50 | [MACH_LOONGSON_END] {}, | ||
51 | }; | ||
52 | |||
53 | static struct platform_device uart8250_device = { | ||
54 | .name = "serial8250", | ||
55 | .id = PLAT8250_DEV_PLATFORM, | ||
56 | }; | ||
57 | |||
58 | static int __init serial_init(void) | ||
59 | { | ||
60 | unsigned char iotype; | ||
61 | |||
62 | iotype = uart8250_data[mips_machtype][0].iotype; | ||
63 | |||
64 | if (UPIO_MEM == iotype) | ||
65 | uart8250_data[mips_machtype][0].membase = | ||
66 | (void __iomem *)_loongson_uart_base; | ||
67 | else if (UPIO_PORT == iotype) | ||
68 | uart8250_data[mips_machtype][0].iobase = | ||
69 | loongson_uart_base - LOONGSON_PCIIO_BASE; | ||
70 | |||
71 | uart8250_device.dev.platform_data = uart8250_data[mips_machtype]; | ||
72 | |||
73 | return platform_device_register(&uart8250_device); | ||
74 | } | ||
75 | |||
76 | device_initcall(serial_init); | ||
diff --git a/arch/mips/loongson/common/time.c b/arch/mips/loongson/common/time.c index 6e08c8270abe..35f0b66a94f5 100644 --- a/arch/mips/loongson/common/time.c +++ b/arch/mips/loongson/common/time.c | |||
@@ -14,11 +14,14 @@ | |||
14 | #include <asm/time.h> | 14 | #include <asm/time.h> |
15 | 15 | ||
16 | #include <loongson.h> | 16 | #include <loongson.h> |
17 | #include <cs5536/cs5536_mfgpt.h> | ||
17 | 18 | ||
18 | void __init plat_time_init(void) | 19 | void __init plat_time_init(void) |
19 | { | 20 | { |
20 | /* setup mips r4k timer */ | 21 | /* setup mips r4k timer */ |
21 | mips_hpt_frequency = cpu_clock_freq / 2; | 22 | mips_hpt_frequency = cpu_clock_freq / 2; |
23 | |||
24 | setup_mfgpt0_timer(); | ||
22 | } | 25 | } |
23 | 26 | ||
24 | void read_persistent_clock(struct timespec *ts) | 27 | void read_persistent_clock(struct timespec *ts) |
diff --git a/arch/mips/loongson/common/uart_base.c b/arch/mips/loongson/common/uart_base.c new file mode 100644 index 000000000000..78ff66ae749e --- /dev/null +++ b/arch/mips/loongson/common/uart_base.c | |||
@@ -0,0 +1,45 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Lemote Inc. | ||
3 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/module.h> | ||
12 | #include <asm/bootinfo.h> | ||
13 | |||
14 | #include <loongson.h> | ||
15 | |||
16 | /* ioremapped */ | ||
17 | unsigned long _loongson_uart_base; | ||
18 | EXPORT_SYMBOL(_loongson_uart_base); | ||
19 | /* raw */ | ||
20 | unsigned long loongson_uart_base; | ||
21 | EXPORT_SYMBOL(loongson_uart_base); | ||
22 | |||
23 | void prom_init_loongson_uart_base(void) | ||
24 | { | ||
25 | switch (mips_machtype) { | ||
26 | case MACH_LEMOTE_FL2E: | ||
27 | loongson_uart_base = LOONGSON_PCIIO_BASE + 0x3f8; | ||
28 | break; | ||
29 | case MACH_LEMOTE_FL2F: | ||
30 | case MACH_LEMOTE_LL2F: | ||
31 | loongson_uart_base = LOONGSON_PCIIO_BASE + 0x2f8; | ||
32 | break; | ||
33 | case MACH_LEMOTE_ML2F7: | ||
34 | case MACH_LEMOTE_YL2F89: | ||
35 | case MACH_DEXXON_GDIUM2F10: | ||
36 | case MACH_LEMOTE_NAS: | ||
37 | default: | ||
38 | /* The CPU provided serial port */ | ||
39 | loongson_uart_base = LOONGSON_LIO1_BASE + 0x3f8; | ||
40 | break; | ||
41 | } | ||
42 | |||
43 | _loongson_uart_base = | ||
44 | (unsigned long)ioremap_nocache(loongson_uart_base, 8); | ||
45 | } | ||
diff --git a/arch/mips/loongson/fuloong-2e/irq.c b/arch/mips/loongson/fuloong-2e/irq.c index 7888cf69424a..320e9379bdd7 100644 --- a/arch/mips/loongson/fuloong-2e/irq.c +++ b/arch/mips/loongson/fuloong-2e/irq.c | |||
@@ -47,8 +47,8 @@ static struct irqaction cascade_irqaction = { | |||
47 | void __init set_irq_trigger_mode(void) | 47 | void __init set_irq_trigger_mode(void) |
48 | { | 48 | { |
49 | /* most bonito irq should be level triggered */ | 49 | /* most bonito irq should be level triggered */ |
50 | BONITO_INTEDGE = BONITO_ICU_SYSTEMERR | BONITO_ICU_MASTERERR | | 50 | LOONGSON_INTEDGE = LOONGSON_ICU_SYSTEMERR | LOONGSON_ICU_MASTERERR | |
51 | BONITO_ICU_RETRYERR | BONITO_ICU_MBOXES; | 51 | LOONGSON_ICU_RETRYERR | LOONGSON_ICU_MBOXES; |
52 | } | 52 | } |
53 | 53 | ||
54 | void __init mach_init_irq(void) | 54 | void __init mach_init_irq(void) |
diff --git a/arch/mips/loongson/fuloong-2e/reset.c b/arch/mips/loongson/fuloong-2e/reset.c index 677fe186db95..fc16c677d476 100644 --- a/arch/mips/loongson/fuloong-2e/reset.c +++ b/arch/mips/loongson/fuloong-2e/reset.c | |||
@@ -14,8 +14,8 @@ | |||
14 | 14 | ||
15 | void mach_prepare_reboot(void) | 15 | void mach_prepare_reboot(void) |
16 | { | 16 | { |
17 | BONITO_BONGENCFG &= ~(1 << 2); | 17 | LOONGSON_GENCFG &= ~(1 << 2); |
18 | BONITO_BONGENCFG |= (1 << 2); | 18 | LOONGSON_GENCFG |= (1 << 2); |
19 | } | 19 | } |
20 | 20 | ||
21 | void mach_prepare_shutdown(void) | 21 | void mach_prepare_shutdown(void) |
diff --git a/arch/mips/loongson/lemote-2f/Makefile b/arch/mips/loongson/lemote-2f/Makefile new file mode 100644 index 000000000000..4d84b27dc41b --- /dev/null +++ b/arch/mips/loongson/lemote-2f/Makefile | |||
@@ -0,0 +1,11 @@ | |||
1 | # | ||
2 | # Makefile for lemote loongson2f family machines | ||
3 | # | ||
4 | |||
5 | obj-y += irq.o reset.o ec_kb3310b.o | ||
6 | |||
7 | # | ||
8 | # Suspend Support | ||
9 | # | ||
10 | |||
11 | obj-$(CONFIG_LOONGSON_SUSPEND) += pm.o | ||
diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.c b/arch/mips/loongson/lemote-2f/ec_kb3310b.c new file mode 100644 index 000000000000..4d84111a2cd4 --- /dev/null +++ b/arch/mips/loongson/lemote-2f/ec_kb3310b.c | |||
@@ -0,0 +1,130 @@ | |||
1 | /* | ||
2 | * Basic KB3310B Embedded Controller support for the YeeLoong 2F netbook | ||
3 | * | ||
4 | * Copyright (C) 2008 Lemote Inc. | ||
5 | * Author: liujl <liujl@lemote.com>, 2008-04-20 | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/module.h> | ||
14 | #include <linux/spinlock.h> | ||
15 | #include <linux/delay.h> | ||
16 | |||
17 | #include "ec_kb3310b.h" | ||
18 | |||
19 | static DEFINE_SPINLOCK(index_access_lock); | ||
20 | static DEFINE_SPINLOCK(port_access_lock); | ||
21 | |||
22 | unsigned char ec_read(unsigned short addr) | ||
23 | { | ||
24 | unsigned char value; | ||
25 | unsigned long flags; | ||
26 | |||
27 | spin_lock_irqsave(&index_access_lock, flags); | ||
28 | outb((addr & 0xff00) >> 8, EC_IO_PORT_HIGH); | ||
29 | outb((addr & 0x00ff), EC_IO_PORT_LOW); | ||
30 | value = inb(EC_IO_PORT_DATA); | ||
31 | spin_unlock_irqrestore(&index_access_lock, flags); | ||
32 | |||
33 | return value; | ||
34 | } | ||
35 | EXPORT_SYMBOL_GPL(ec_read); | ||
36 | |||
37 | void ec_write(unsigned short addr, unsigned char val) | ||
38 | { | ||
39 | unsigned long flags; | ||
40 | |||
41 | spin_lock_irqsave(&index_access_lock, flags); | ||
42 | outb((addr & 0xff00) >> 8, EC_IO_PORT_HIGH); | ||
43 | outb((addr & 0x00ff), EC_IO_PORT_LOW); | ||
44 | outb(val, EC_IO_PORT_DATA); | ||
45 | /* flush the write action */ | ||
46 | inb(EC_IO_PORT_DATA); | ||
47 | spin_unlock_irqrestore(&index_access_lock, flags); | ||
48 | |||
49 | return; | ||
50 | } | ||
51 | EXPORT_SYMBOL_GPL(ec_write); | ||
52 | |||
53 | /* | ||
54 | * This function is used for EC command writes and corresponding status queries. | ||
55 | */ | ||
56 | int ec_query_seq(unsigned char cmd) | ||
57 | { | ||
58 | int timeout; | ||
59 | unsigned char status; | ||
60 | unsigned long flags; | ||
61 | int ret = 0; | ||
62 | |||
63 | spin_lock_irqsave(&port_access_lock, flags); | ||
64 | |||
65 | /* make chip goto reset mode */ | ||
66 | udelay(EC_REG_DELAY); | ||
67 | outb(cmd, EC_CMD_PORT); | ||
68 | udelay(EC_REG_DELAY); | ||
69 | |||
70 | /* check if the command is received by ec */ | ||
71 | timeout = EC_CMD_TIMEOUT; | ||
72 | status = inb(EC_STS_PORT); | ||
73 | while (timeout-- && (status & (1 << 1))) { | ||
74 | status = inb(EC_STS_PORT); | ||
75 | udelay(EC_REG_DELAY); | ||
76 | } | ||
77 | |||
78 | if (timeout <= 0) { | ||
79 | printk(KERN_ERR "%s: deadable error : timeout...\n", __func__); | ||
80 | ret = -EINVAL; | ||
81 | } else | ||
82 | printk(KERN_INFO | ||
83 | "(%x/%d)ec issued command %d status : 0x%x\n", | ||
84 | timeout, EC_CMD_TIMEOUT - timeout, cmd, status); | ||
85 | |||
86 | spin_unlock_irqrestore(&port_access_lock, flags); | ||
87 | |||
88 | return ret; | ||
89 | } | ||
90 | EXPORT_SYMBOL_GPL(ec_query_seq); | ||
91 | |||
92 | /* | ||
93 | * Send query command to EC to get the proper event number | ||
94 | */ | ||
95 | int ec_query_event_num(void) | ||
96 | { | ||
97 | return ec_query_seq(CMD_GET_EVENT_NUM); | ||
98 | } | ||
99 | EXPORT_SYMBOL(ec_query_event_num); | ||
100 | |||
101 | /* | ||
102 | * Get event number from EC | ||
103 | * | ||
104 | * NOTE: This routine must follow the query_event_num function in the | ||
105 | * interrupt. | ||
106 | */ | ||
107 | int ec_get_event_num(void) | ||
108 | { | ||
109 | int timeout = 100; | ||
110 | unsigned char value; | ||
111 | unsigned char status; | ||
112 | |||
113 | udelay(EC_REG_DELAY); | ||
114 | status = inb(EC_STS_PORT); | ||
115 | udelay(EC_REG_DELAY); | ||
116 | while (timeout-- && !(status & (1 << 0))) { | ||
117 | status = inb(EC_STS_PORT); | ||
118 | udelay(EC_REG_DELAY); | ||
119 | } | ||
120 | if (timeout <= 0) { | ||
121 | pr_info("%s: get event number timeout.\n", __func__); | ||
122 | |||
123 | return -EINVAL; | ||
124 | } | ||
125 | value = inb(EC_DAT_PORT); | ||
126 | udelay(EC_REG_DELAY); | ||
127 | |||
128 | return value; | ||
129 | } | ||
130 | EXPORT_SYMBOL(ec_get_event_num); | ||
diff --git a/arch/mips/loongson/lemote-2f/ec_kb3310b.h b/arch/mips/loongson/lemote-2f/ec_kb3310b.h new file mode 100644 index 000000000000..1595a21b315b --- /dev/null +++ b/arch/mips/loongson/lemote-2f/ec_kb3310b.h | |||
@@ -0,0 +1,188 @@ | |||
1 | /* | ||
2 | * KB3310B Embedded Controller | ||
3 | * | ||
4 | * Copyright (C) 2008 Lemote Inc. | ||
5 | * Author: liujl <liujl@lemote.com>, 2008-03-14 | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #ifndef _EC_KB3310B_H | ||
14 | #define _EC_KB3310B_H | ||
15 | |||
16 | extern unsigned char ec_read(unsigned short addr); | ||
17 | extern void ec_write(unsigned short addr, unsigned char val); | ||
18 | extern int ec_query_seq(unsigned char cmd); | ||
19 | extern int ec_query_event_num(void); | ||
20 | extern int ec_get_event_num(void); | ||
21 | |||
22 | typedef int (*sci_handler) (int status); | ||
23 | extern sci_handler yeeloong_report_lid_status; | ||
24 | |||
25 | #define SCI_IRQ_NUM 0x0A | ||
26 | |||
27 | /* | ||
28 | * The following registers are determined by the EC index configuration. | ||
29 | * 1, fill the PORT_HIGH as EC register high part. | ||
30 | * 2, fill the PORT_LOW as EC register low part. | ||
31 | * 3, fill the PORT_DATA as EC register write data or get the data from it. | ||
32 | */ | ||
33 | #define EC_IO_PORT_HIGH 0x0381 | ||
34 | #define EC_IO_PORT_LOW 0x0382 | ||
35 | #define EC_IO_PORT_DATA 0x0383 | ||
36 | |||
37 | /* | ||
38 | * EC delay time is 500us for register and status access | ||
39 | */ | ||
40 | #define EC_REG_DELAY 500 /* unit : us */ | ||
41 | #define EC_CMD_TIMEOUT 0x1000 | ||
42 | |||
43 | /* | ||
44 | * EC access port for SCI communication | ||
45 | */ | ||
46 | #define EC_CMD_PORT 0x66 | ||
47 | #define EC_STS_PORT 0x66 | ||
48 | #define EC_DAT_PORT 0x62 | ||
49 | #define CMD_INIT_IDLE_MODE 0xdd | ||
50 | #define CMD_EXIT_IDLE_MODE 0xdf | ||
51 | #define CMD_INIT_RESET_MODE 0xd8 | ||
52 | #define CMD_REBOOT_SYSTEM 0x8c | ||
53 | #define CMD_GET_EVENT_NUM 0x84 | ||
54 | #define CMD_PROGRAM_PIECE 0xda | ||
55 | |||
56 | /* temperature & fan registers */ | ||
57 | #define REG_TEMPERATURE_VALUE 0xF458 | ||
58 | #define REG_FAN_AUTO_MAN_SWITCH 0xF459 | ||
59 | #define BIT_FAN_AUTO 0 | ||
60 | #define BIT_FAN_MANUAL 1 | ||
61 | #define REG_FAN_CONTROL 0xF4D2 | ||
62 | #define BIT_FAN_CONTROL_ON (1 << 0) | ||
63 | #define BIT_FAN_CONTROL_OFF (0 << 0) | ||
64 | #define REG_FAN_STATUS 0xF4DA | ||
65 | #define BIT_FAN_STATUS_ON (1 << 0) | ||
66 | #define BIT_FAN_STATUS_OFF (0 << 0) | ||
67 | #define REG_FAN_SPEED_HIGH 0xFE22 | ||
68 | #define REG_FAN_SPEED_LOW 0xFE23 | ||
69 | #define REG_FAN_SPEED_LEVEL 0xF4CC | ||
70 | /* fan speed divider */ | ||
71 | #define FAN_SPEED_DIVIDER 480000 /* (60*1000*1000/62.5/2)*/ | ||
72 | |||
73 | /* battery registers */ | ||
74 | #define REG_BAT_DESIGN_CAP_HIGH 0xF77D | ||
75 | #define REG_BAT_DESIGN_CAP_LOW 0xF77E | ||
76 | #define REG_BAT_FULLCHG_CAP_HIGH 0xF780 | ||
77 | #define REG_BAT_FULLCHG_CAP_LOW 0xF781 | ||
78 | #define REG_BAT_DESIGN_VOL_HIGH 0xF782 | ||
79 | #define REG_BAT_DESIGN_VOL_LOW 0xF783 | ||
80 | #define REG_BAT_CURRENT_HIGH 0xF784 | ||
81 | #define REG_BAT_CURRENT_LOW 0xF785 | ||
82 | #define REG_BAT_VOLTAGE_HIGH 0xF786 | ||
83 | #define REG_BAT_VOLTAGE_LOW 0xF787 | ||
84 | #define REG_BAT_TEMPERATURE_HIGH 0xF788 | ||
85 | #define REG_BAT_TEMPERATURE_LOW 0xF789 | ||
86 | #define REG_BAT_RELATIVE_CAP_HIGH 0xF492 | ||
87 | #define REG_BAT_RELATIVE_CAP_LOW 0xF493 | ||
88 | #define REG_BAT_VENDOR 0xF4C4 | ||
89 | #define FLAG_BAT_VENDOR_SANYO 0x01 | ||
90 | #define FLAG_BAT_VENDOR_SIMPLO 0x02 | ||
91 | #define REG_BAT_CELL_COUNT 0xF4C6 | ||
92 | #define FLAG_BAT_CELL_3S1P 0x03 | ||
93 | #define FLAG_BAT_CELL_3S2P 0x06 | ||
94 | #define REG_BAT_CHARGE 0xF4A2 | ||
95 | #define FLAG_BAT_CHARGE_DISCHARGE 0x01 | ||
96 | #define FLAG_BAT_CHARGE_CHARGE 0x02 | ||
97 | #define FLAG_BAT_CHARGE_ACPOWER 0x00 | ||
98 | #define REG_BAT_STATUS 0xF4B0 | ||
99 | #define BIT_BAT_STATUS_LOW (1 << 5) | ||
100 | #define BIT_BAT_STATUS_DESTROY (1 << 2) | ||
101 | #define BIT_BAT_STATUS_FULL (1 << 1) | ||
102 | #define BIT_BAT_STATUS_IN (1 << 0) | ||
103 | #define REG_BAT_CHARGE_STATUS 0xF4B1 | ||
104 | #define BIT_BAT_CHARGE_STATUS_OVERTEMP (1 << 2) | ||
105 | #define BIT_BAT_CHARGE_STATUS_PRECHG (1 << 1) | ||
106 | #define REG_BAT_STATE 0xF482 | ||
107 | #define BIT_BAT_STATE_CHARGING (1 << 1) | ||
108 | #define BIT_BAT_STATE_DISCHARGING (1 << 0) | ||
109 | #define REG_BAT_POWER 0xF440 | ||
110 | #define BIT_BAT_POWER_S3 (1 << 2) | ||
111 | #define BIT_BAT_POWER_ON (1 << 1) | ||
112 | #define BIT_BAT_POWER_ACIN (1 << 0) | ||
113 | |||
114 | /* other registers */ | ||
115 | /* Audio: rd/wr */ | ||
116 | #define REG_AUDIO_VOLUME 0xF46C | ||
117 | #define REG_AUDIO_MUTE 0xF4E7 | ||
118 | #define REG_AUDIO_BEEP 0xF4D0 | ||
119 | /* USB port power or not: rd/wr */ | ||
120 | #define REG_USB0_FLAG 0xF461 | ||
121 | #define REG_USB1_FLAG 0xF462 | ||
122 | #define REG_USB2_FLAG 0xF463 | ||
123 | #define BIT_USB_FLAG_ON 1 | ||
124 | #define BIT_USB_FLAG_OFF 0 | ||
125 | /* LID */ | ||
126 | #define REG_LID_DETECT 0xF4BD | ||
127 | #define BIT_LID_DETECT_ON 1 | ||
128 | #define BIT_LID_DETECT_OFF 0 | ||
129 | /* CRT */ | ||
130 | #define REG_CRT_DETECT 0xF4AD | ||
131 | #define BIT_CRT_DETECT_PLUG 1 | ||
132 | #define BIT_CRT_DETECT_UNPLUG 0 | ||
133 | /* LCD backlight brightness adjust: 9 levels */ | ||
134 | #define REG_DISPLAY_BRIGHTNESS 0xF4F5 | ||
135 | /* Black screen Status */ | ||
136 | #define BIT_DISPLAY_LCD_ON 1 | ||
137 | #define BIT_DISPLAY_LCD_OFF 0 | ||
138 | /* LCD backlight control: off/restore */ | ||
139 | #define REG_BACKLIGHT_CTRL 0xF7BD | ||
140 | #define BIT_BACKLIGHT_ON 1 | ||
141 | #define BIT_BACKLIGHT_OFF 0 | ||
142 | /* Reset the machine auto-clear: rd/wr */ | ||
143 | #define REG_RESET 0xF4EC | ||
144 | #define BIT_RESET_ON 1 | ||
145 | /* Light the led: rd/wr */ | ||
146 | #define REG_LED 0xF4C8 | ||
147 | #define BIT_LED_RED_POWER (1 << 0) | ||
148 | #define BIT_LED_ORANGE_POWER (1 << 1) | ||
149 | #define BIT_LED_GREEN_CHARGE (1 << 2) | ||
150 | #define BIT_LED_RED_CHARGE (1 << 3) | ||
151 | #define BIT_LED_NUMLOCK (1 << 4) | ||
152 | /* Test led mode, all led on/off */ | ||
153 | #define REG_LED_TEST 0xF4C2 | ||
154 | #define BIT_LED_TEST_IN 1 | ||
155 | #define BIT_LED_TEST_OUT 0 | ||
156 | /* Camera on/off */ | ||
157 | #define REG_CAMERA_STATUS 0xF46A | ||
158 | #define BIT_CAMERA_STATUS_ON 1 | ||
159 | #define BIT_CAMERA_STATUS_OFF 0 | ||
160 | #define REG_CAMERA_CONTROL 0xF7B7 | ||
161 | #define BIT_CAMERA_CONTROL_OFF 0 | ||
162 | #define BIT_CAMERA_CONTROL_ON 1 | ||
163 | /* Wlan Status */ | ||
164 | #define REG_WLAN 0xF4FA | ||
165 | #define BIT_WLAN_ON 1 | ||
166 | #define BIT_WLAN_OFF 0 | ||
167 | #define REG_DISPLAY_LCD 0xF79F | ||
168 | |||
169 | /* SCI Event Number from EC */ | ||
170 | enum { | ||
171 | EVENT_LID = 0x23, /* LID open/close */ | ||
172 | EVENT_DISPLAY_TOGGLE, /* Fn+F3 for display switch */ | ||
173 | EVENT_SLEEP, /* Fn+F1 for entering sleep mode */ | ||
174 | EVENT_OVERTEMP, /* Over-temperature happened */ | ||
175 | EVENT_CRT_DETECT, /* CRT is connected */ | ||
176 | EVENT_CAMERA, /* Camera on/off */ | ||
177 | EVENT_USB_OC2, /* USB2 Over Current occurred */ | ||
178 | EVENT_USB_OC0, /* USB0 Over Current occurred */ | ||
179 | EVENT_BLACK_SCREEN, /* Turn on/off backlight */ | ||
180 | EVENT_AUDIO_MUTE, /* Mute on/off */ | ||
181 | EVENT_DISPLAY_BRIGHTNESS,/* LCD backlight brightness adjust */ | ||
182 | EVENT_AC_BAT, /* AC & Battery relative issue */ | ||
183 | EVENT_AUDIO_VOLUME, /* Volume adjust */ | ||
184 | EVENT_WLAN, /* Wlan on/off */ | ||
185 | EVENT_END | ||
186 | }; | ||
187 | |||
188 | #endif /* !_EC_KB3310B_H */ | ||
diff --git a/arch/mips/loongson/lemote-2f/irq.c b/arch/mips/loongson/lemote-2f/irq.c new file mode 100644 index 000000000000..77d32f9cf31e --- /dev/null +++ b/arch/mips/loongson/lemote-2f/irq.c | |||
@@ -0,0 +1,134 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007 Lemote Inc. | ||
3 | * Author: Fuxin Zhang, zhangfx@lemote.com | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify it | ||
6 | * under the terms of the GNU General Public License as published by the | ||
7 | * Free Software Foundation; either version 2 of the License, or (at your | ||
8 | * option) any later version. | ||
9 | */ | ||
10 | |||
11 | #include <linux/interrupt.h> | ||
12 | #include <linux/module.h> | ||
13 | |||
14 | #include <asm/irq_cpu.h> | ||
15 | #include <asm/i8259.h> | ||
16 | #include <asm/mipsregs.h> | ||
17 | |||
18 | #include <loongson.h> | ||
19 | #include <machine.h> | ||
20 | |||
21 | #define LOONGSON_TIMER_IRQ (MIPS_CPU_IRQ_BASE + 7) /* cpu timer */ | ||
22 | #define LOONGSON_PERFCNT_IRQ (MIPS_CPU_IRQ_BASE + 6) /* cpu perf counter */ | ||
23 | #define LOONGSON_NORTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 6) /* bonito */ | ||
24 | #define LOONGSON_UART_IRQ (MIPS_CPU_IRQ_BASE + 3) /* cpu serial port */ | ||
25 | #define LOONGSON_SOUTH_BRIDGE_IRQ (MIPS_CPU_IRQ_BASE + 2) /* i8259 */ | ||
26 | |||
27 | #define LOONGSON_INT_BIT_INT0 (1 << 11) | ||
28 | #define LOONGSON_INT_BIT_INT1 (1 << 12) | ||
29 | |||
30 | /* | ||
31 | * The generic i8259_irq() make the kernel hang on booting. Since we cannot | ||
32 | * get the irq via the IRR directly, we access the ISR instead. | ||
33 | */ | ||
34 | int mach_i8259_irq(void) | ||
35 | { | ||
36 | int irq, isr; | ||
37 | |||
38 | irq = -1; | ||
39 | |||
40 | if ((LOONGSON_INTISR & LOONGSON_INTEN) & LOONGSON_INT_BIT_INT0) { | ||
41 | spin_lock(&i8259A_lock); | ||
42 | isr = inb(PIC_MASTER_CMD) & | ||
43 | ~inb(PIC_MASTER_IMR) & ~(1 << PIC_CASCADE_IR); | ||
44 | if (!isr) | ||
45 | isr = (inb(PIC_SLAVE_CMD) & ~inb(PIC_SLAVE_IMR)) << 8; | ||
46 | irq = ffs(isr) - 1; | ||
47 | if (unlikely(irq == 7)) { | ||
48 | /* | ||
49 | * This may be a spurious interrupt. | ||
50 | * | ||
51 | * Read the interrupt status register (ISR). If the most | ||
52 | * significant bit is not set then there is no valid | ||
53 | * interrupt. | ||
54 | */ | ||
55 | outb(0x0B, PIC_MASTER_ISR); /* ISR register */ | ||
56 | if (~inb(PIC_MASTER_ISR) & 0x80) | ||
57 | irq = -1; | ||
58 | } | ||
59 | spin_unlock(&i8259A_lock); | ||
60 | } | ||
61 | |||
62 | return irq; | ||
63 | } | ||
64 | EXPORT_SYMBOL(mach_i8259_irq); | ||
65 | |||
66 | static void i8259_irqdispatch(void) | ||
67 | { | ||
68 | int irq; | ||
69 | |||
70 | irq = mach_i8259_irq(); | ||
71 | if (irq >= 0) | ||
72 | do_IRQ(irq); | ||
73 | else | ||
74 | spurious_interrupt(); | ||
75 | } | ||
76 | |||
77 | void mach_irq_dispatch(unsigned int pending) | ||
78 | { | ||
79 | if (pending & CAUSEF_IP7) | ||
80 | do_IRQ(LOONGSON_TIMER_IRQ); | ||
81 | else if (pending & CAUSEF_IP6) { /* North Bridge, Perf counter */ | ||
82 | #ifdef CONFIG_OPROFILE | ||
83 | do_IRQ(LOONGSON2_PERFCNT_IRQ); | ||
84 | #endif | ||
85 | bonito_irqdispatch(); | ||
86 | } else if (pending & CAUSEF_IP3) /* CPU UART */ | ||
87 | do_IRQ(LOONGSON_UART_IRQ); | ||
88 | else if (pending & CAUSEF_IP2) /* South Bridge */ | ||
89 | i8259_irqdispatch(); | ||
90 | else | ||
91 | spurious_interrupt(); | ||
92 | } | ||
93 | |||
94 | void __init set_irq_trigger_mode(void) | ||
95 | { | ||
96 | /* setup cs5536 as high level trigger */ | ||
97 | LOONGSON_INTPOL = LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1; | ||
98 | LOONGSON_INTEDGE &= ~(LOONGSON_INT_BIT_INT0 | LOONGSON_INT_BIT_INT1); | ||
99 | } | ||
100 | |||
101 | static irqreturn_t ip6_action(int cpl, void *dev_id) | ||
102 | { | ||
103 | return IRQ_HANDLED; | ||
104 | } | ||
105 | |||
106 | struct irqaction ip6_irqaction = { | ||
107 | .handler = ip6_action, | ||
108 | .name = "cascade", | ||
109 | .flags = IRQF_SHARED, | ||
110 | }; | ||
111 | |||
112 | struct irqaction cascade_irqaction = { | ||
113 | .handler = no_action, | ||
114 | .name = "cascade", | ||
115 | }; | ||
116 | |||
117 | void __init mach_init_irq(void) | ||
118 | { | ||
119 | /* init all controller | ||
120 | * 0-15 ------> i8259 interrupt | ||
121 | * 16-23 ------> mips cpu interrupt | ||
122 | * 32-63 ------> bonito irq | ||
123 | */ | ||
124 | |||
125 | /* Sets the first-level interrupt dispatcher. */ | ||
126 | mips_cpu_irq_init(); | ||
127 | init_i8259_irqs(); | ||
128 | bonito_irq_init(); | ||
129 | |||
130 | /* setup north bridge irq (bonito) */ | ||
131 | setup_irq(LOONGSON_NORTH_BRIDGE_IRQ, &ip6_irqaction); | ||
132 | /* setup source bridge irq (i8259) */ | ||
133 | setup_irq(LOONGSON_SOUTH_BRIDGE_IRQ, &cascade_irqaction); | ||
134 | } | ||
diff --git a/arch/mips/loongson/lemote-2f/pm.c b/arch/mips/loongson/lemote-2f/pm.c new file mode 100644 index 000000000000..d7af2e616592 --- /dev/null +++ b/arch/mips/loongson/lemote-2f/pm.c | |||
@@ -0,0 +1,149 @@ | |||
1 | /* | ||
2 | * Lemote loongson2f family machines' specific suspend support | ||
3 | * | ||
4 | * Copyright (C) 2009 Lemote Inc. | ||
5 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License as published by | ||
9 | * the Free Software Foundation; either version 2 of the License, or | ||
10 | * (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/suspend.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/pm.h> | ||
16 | #include <linux/i8042.h> | ||
17 | #include <linux/module.h> | ||
18 | |||
19 | #include <asm/i8259.h> | ||
20 | #include <asm/mipsregs.h> | ||
21 | #include <asm/bootinfo.h> | ||
22 | |||
23 | #include <loongson.h> | ||
24 | |||
25 | #include <cs5536/cs5536_mfgpt.h> | ||
26 | #include "ec_kb3310b.h" | ||
27 | |||
28 | #define I8042_KBD_IRQ 1 | ||
29 | #define I8042_CTR_KBDINT 0x01 | ||
30 | #define I8042_CTR_KBDDIS 0x10 | ||
31 | |||
32 | static unsigned char i8042_ctr; | ||
33 | |||
34 | static int i8042_enable_kbd_port(void) | ||
35 | { | ||
36 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_RCTR)) { | ||
37 | pr_err("i8042.c: Can't read CTR while enabling i8042 kbd port." | ||
38 | "\n"); | ||
39 | return -EIO; | ||
40 | } | ||
41 | |||
42 | i8042_ctr &= ~I8042_CTR_KBDDIS; | ||
43 | i8042_ctr |= I8042_CTR_KBDINT; | ||
44 | |||
45 | if (i8042_command(&i8042_ctr, I8042_CMD_CTL_WCTR)) { | ||
46 | i8042_ctr &= ~I8042_CTR_KBDINT; | ||
47 | i8042_ctr |= I8042_CTR_KBDDIS; | ||
48 | pr_err("i8042.c: Failed to enable KBD port.\n"); | ||
49 | |||
50 | return -EIO; | ||
51 | } | ||
52 | |||
53 | return 0; | ||
54 | } | ||
55 | |||
56 | void setup_wakeup_events(void) | ||
57 | { | ||
58 | int irq_mask; | ||
59 | |||
60 | switch (mips_machtype) { | ||
61 | case MACH_LEMOTE_ML2F7: | ||
62 | case MACH_LEMOTE_YL2F89: | ||
63 | /* open the keyboard irq in i8259A */ | ||
64 | outb((0xff & ~(1 << I8042_KBD_IRQ)), PIC_MASTER_IMR); | ||
65 | irq_mask = inb(PIC_MASTER_IMR); | ||
66 | |||
67 | /* enable keyboard port */ | ||
68 | i8042_enable_kbd_port(); | ||
69 | |||
70 | /* Wakeup CPU via SCI lid open event */ | ||
71 | outb(irq_mask & ~(1 << PIC_CASCADE_IR), PIC_MASTER_IMR); | ||
72 | inb(PIC_MASTER_IMR); | ||
73 | outb(0xff & ~(1 << (SCI_IRQ_NUM - 8)), PIC_SLAVE_IMR); | ||
74 | inb(PIC_SLAVE_IMR); | ||
75 | |||
76 | break; | ||
77 | |||
78 | default: | ||
79 | break; | ||
80 | } | ||
81 | } | ||
82 | |||
83 | static struct delayed_work lid_task; | ||
84 | static int initialized; | ||
85 | /* yeeloong_report_lid_status will be implemented in yeeloong_laptop.c */ | ||
86 | sci_handler yeeloong_report_lid_status; | ||
87 | EXPORT_SYMBOL(yeeloong_report_lid_status); | ||
88 | static void yeeloong_lid_update_task(struct work_struct *work) | ||
89 | { | ||
90 | if (yeeloong_report_lid_status) | ||
91 | yeeloong_report_lid_status(BIT_LID_DETECT_ON); | ||
92 | } | ||
93 | |||
94 | int wakeup_loongson(void) | ||
95 | { | ||
96 | int irq; | ||
97 | |||
98 | /* query the interrupt number */ | ||
99 | irq = mach_i8259_irq(); | ||
100 | if (irq < 0) | ||
101 | return 0; | ||
102 | |||
103 | printk(KERN_INFO "%s: irq = %d\n", __func__, irq); | ||
104 | |||
105 | if (irq == I8042_KBD_IRQ) | ||
106 | return 1; | ||
107 | else if (irq == SCI_IRQ_NUM) { | ||
108 | int ret, sci_event; | ||
109 | /* query the event number */ | ||
110 | ret = ec_query_seq(CMD_GET_EVENT_NUM); | ||
111 | if (ret < 0) | ||
112 | return 0; | ||
113 | sci_event = ec_get_event_num(); | ||
114 | if (sci_event < 0) | ||
115 | return 0; | ||
116 | if (sci_event == EVENT_LID) { | ||
117 | int lid_status; | ||
118 | /* check the LID status */ | ||
119 | lid_status = ec_read(REG_LID_DETECT); | ||
120 | /* wakeup cpu when people open the LID */ | ||
121 | if (lid_status == BIT_LID_DETECT_ON) { | ||
122 | /* If we call it directly here, the WARNING | ||
123 | * will be sent out by getnstimeofday | ||
124 | * via "WARN_ON(timekeeping_suspended);" | ||
125 | * because we can not schedule in suspend mode. | ||
126 | */ | ||
127 | if (initialized == 0) { | ||
128 | INIT_DELAYED_WORK(&lid_task, | ||
129 | yeeloong_lid_update_task); | ||
130 | initialized = 1; | ||
131 | } | ||
132 | schedule_delayed_work(&lid_task, 1); | ||
133 | return 1; | ||
134 | } | ||
135 | } | ||
136 | } | ||
137 | |||
138 | return 0; | ||
139 | } | ||
140 | |||
141 | void __weak mach_suspend(void) | ||
142 | { | ||
143 | disable_mfgpt0_counter(); | ||
144 | } | ||
145 | |||
146 | void __weak mach_resume(void) | ||
147 | { | ||
148 | enable_mfgpt0_counter(); | ||
149 | } | ||
diff --git a/arch/mips/loongson/lemote-2f/reset.c b/arch/mips/loongson/lemote-2f/reset.c new file mode 100644 index 000000000000..51d1a60d5349 --- /dev/null +++ b/arch/mips/loongson/lemote-2f/reset.c | |||
@@ -0,0 +1,159 @@ | |||
1 | /* Board-specific reboot/shutdown routines | ||
2 | * | ||
3 | * Copyright (c) 2009 Philippe Vachon <philippe@cowpig.ca> | ||
4 | * | ||
5 | * Copyright (C) 2009 Lemote Inc. | ||
6 | * Author: Wu Zhangjin, wuzj@lemote.com | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/io.h> | ||
15 | #include <linux/delay.h> | ||
16 | #include <linux/types.h> | ||
17 | |||
18 | #include <asm/bootinfo.h> | ||
19 | |||
20 | #include <loongson.h> | ||
21 | |||
22 | #include <cs5536/cs5536.h> | ||
23 | #include "ec_kb3310b.h" | ||
24 | |||
25 | static void reset_cpu(void) | ||
26 | { | ||
27 | /* | ||
28 | * reset cpu to full speed, this is needed when enabling cpu frequency | ||
29 | * scalling | ||
30 | */ | ||
31 | LOONGSON_CHIPCFG0 |= 0x7; | ||
32 | } | ||
33 | |||
34 | /* reset support for fuloong2f */ | ||
35 | |||
36 | static void fl2f_reboot(void) | ||
37 | { | ||
38 | reset_cpu(); | ||
39 | |||
40 | /* send a reset signal to south bridge. | ||
41 | * | ||
42 | * NOTE: if enable "Power Management" in kernel, rtl8169 will not reset | ||
43 | * normally with this reset operation and it will not work in PMON, but | ||
44 | * you can type halt command and then reboot, seems the hardware reset | ||
45 | * logic not work normally. | ||
46 | */ | ||
47 | { | ||
48 | u32 hi, lo; | ||
49 | _rdmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), &hi, &lo); | ||
50 | lo |= 0x00000001; | ||
51 | _wrmsr(DIVIL_MSR_REG(DIVIL_SOFT_RESET), hi, lo); | ||
52 | } | ||
53 | } | ||
54 | |||
55 | static void fl2f_shutdown(void) | ||
56 | { | ||
57 | u32 hi, lo, val; | ||
58 | int gpio_base; | ||
59 | |||
60 | /* get gpio base */ | ||
61 | _rdmsr(DIVIL_MSR_REG(DIVIL_LBAR_GPIO), &hi, &lo); | ||
62 | gpio_base = lo & 0xff00; | ||
63 | |||
64 | /* make cs5536 gpio13 output enable */ | ||
65 | val = inl(gpio_base + GPIOL_OUT_EN); | ||
66 | val &= ~(1 << (16 + 13)); | ||
67 | val |= (1 << 13); | ||
68 | outl(val, gpio_base + GPIOL_OUT_EN); | ||
69 | mmiowb(); | ||
70 | /* make cs5536 gpio13 output low level voltage. */ | ||
71 | val = inl(gpio_base + GPIOL_OUT_VAL) & ~(1 << (13)); | ||
72 | val |= (1 << (16 + 13)); | ||
73 | outl(val, gpio_base + GPIOL_OUT_VAL); | ||
74 | mmiowb(); | ||
75 | } | ||
76 | |||
77 | /* reset support for yeeloong2f and mengloong2f notebook */ | ||
78 | |||
79 | void ml2f_reboot(void) | ||
80 | { | ||
81 | reset_cpu(); | ||
82 | |||
83 | /* sending an reset signal to EC(embedded controller) */ | ||
84 | ec_write(REG_RESET, BIT_RESET_ON); | ||
85 | } | ||
86 | |||
87 | #define yl2f89_reboot ml2f_reboot | ||
88 | |||
89 | /* menglong(7inches) laptop has different shutdown logic from 8.9inches */ | ||
90 | #define EC_SHUTDOWN_IO_PORT_HIGH 0xff2d | ||
91 | #define EC_SHUTDOWN_IO_PORT_LOW 0xff2e | ||
92 | #define EC_SHUTDOWN_IO_PORT_DATA 0xff2f | ||
93 | #define REG_SHUTDOWN_HIGH 0xFC | ||
94 | #define REG_SHUTDOWN_LOW 0x29 | ||
95 | #define BIT_SHUTDOWN_ON (1 << 1) | ||
96 | |||
97 | static void ml2f_shutdown(void) | ||
98 | { | ||
99 | u8 val; | ||
100 | u64 i; | ||
101 | |||
102 | outb(REG_SHUTDOWN_HIGH, EC_SHUTDOWN_IO_PORT_HIGH); | ||
103 | outb(REG_SHUTDOWN_LOW, EC_SHUTDOWN_IO_PORT_LOW); | ||
104 | mmiowb(); | ||
105 | val = inb(EC_SHUTDOWN_IO_PORT_DATA); | ||
106 | outb(val & (~BIT_SHUTDOWN_ON), EC_SHUTDOWN_IO_PORT_DATA); | ||
107 | mmiowb(); | ||
108 | /* need enough wait here... how many microseconds needs? */ | ||
109 | for (i = 0; i < 0x10000; i++) | ||
110 | delay(); | ||
111 | outb(val | BIT_SHUTDOWN_ON, EC_SHUTDOWN_IO_PORT_DATA); | ||
112 | mmiowb(); | ||
113 | } | ||
114 | |||
115 | static void yl2f89_shutdown(void) | ||
116 | { | ||
117 | /* cpu-gpio0 output low */ | ||
118 | LOONGSON_GPIODATA &= ~0x00000001; | ||
119 | /* cpu-gpio0 as output */ | ||
120 | LOONGSON_GPIOIE &= ~0x00000001; | ||
121 | } | ||
122 | |||
123 | void mach_prepare_reboot(void) | ||
124 | { | ||
125 | switch (mips_machtype) { | ||
126 | case MACH_LEMOTE_FL2F: | ||
127 | case MACH_LEMOTE_NAS: | ||
128 | case MACH_LEMOTE_LL2F: | ||
129 | fl2f_reboot(); | ||
130 | break; | ||
131 | case MACH_LEMOTE_ML2F7: | ||
132 | ml2f_reboot(); | ||
133 | break; | ||
134 | case MACH_LEMOTE_YL2F89: | ||
135 | yl2f89_reboot(); | ||
136 | break; | ||
137 | default: | ||
138 | break; | ||
139 | } | ||
140 | } | ||
141 | |||
142 | void mach_prepare_shutdown(void) | ||
143 | { | ||
144 | switch (mips_machtype) { | ||
145 | case MACH_LEMOTE_FL2F: | ||
146 | case MACH_LEMOTE_NAS: | ||
147 | case MACH_LEMOTE_LL2F: | ||
148 | fl2f_shutdown(); | ||
149 | break; | ||
150 | case MACH_LEMOTE_ML2F7: | ||
151 | ml2f_shutdown(); | ||
152 | break; | ||
153 | case MACH_LEMOTE_YL2F89: | ||
154 | yl2f89_shutdown(); | ||
155 | break; | ||
156 | default: | ||
157 | break; | ||
158 | } | ||
159 | } | ||
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c index 454b53924490..8f2f8e9d8b21 100644 --- a/arch/mips/math-emu/cp1emu.c +++ b/arch/mips/math-emu/cp1emu.c | |||
@@ -35,6 +35,7 @@ | |||
35 | * better performance by compiling with -msoft-float! | 35 | * better performance by compiling with -msoft-float! |
36 | */ | 36 | */ |
37 | #include <linux/sched.h> | 37 | #include <linux/sched.h> |
38 | #include <linux/module.h> | ||
38 | #include <linux/debugfs.h> | 39 | #include <linux/debugfs.h> |
39 | 40 | ||
40 | #include <asm/inst.h> | 41 | #include <asm/inst.h> |
@@ -68,7 +69,9 @@ static int fpux_emu(struct pt_regs *, | |||
68 | 69 | ||
69 | /* Further private data for which no space exists in mips_fpu_struct */ | 70 | /* Further private data for which no space exists in mips_fpu_struct */ |
70 | 71 | ||
71 | struct mips_fpu_emulator_stats fpuemustats; | 72 | #ifdef CONFIG_DEBUG_FS |
73 | DEFINE_PER_CPU(struct mips_fpu_emulator_stats, fpuemustats); | ||
74 | #endif | ||
72 | 75 | ||
73 | /* Control registers */ | 76 | /* Control registers */ |
74 | 77 | ||
@@ -209,7 +212,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
209 | unsigned int cond; | 212 | unsigned int cond; |
210 | 213 | ||
211 | if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) { | 214 | if (get_user(ir, (mips_instruction __user *) xcp->cp0_epc)) { |
212 | fpuemustats.errors++; | 215 | MIPS_FPU_EMU_INC_STATS(errors); |
213 | return SIGBUS; | 216 | return SIGBUS; |
214 | } | 217 | } |
215 | 218 | ||
@@ -240,7 +243,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
240 | return SIGILL; | 243 | return SIGILL; |
241 | } | 244 | } |
242 | if (get_user(ir, (mips_instruction __user *) emulpc)) { | 245 | if (get_user(ir, (mips_instruction __user *) emulpc)) { |
243 | fpuemustats.errors++; | 246 | MIPS_FPU_EMU_INC_STATS(errors); |
244 | return SIGBUS; | 247 | return SIGBUS; |
245 | } | 248 | } |
246 | /* __compute_return_epc() will have updated cp0_epc */ | 249 | /* __compute_return_epc() will have updated cp0_epc */ |
@@ -253,16 +256,16 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
253 | } | 256 | } |
254 | 257 | ||
255 | emul: | 258 | emul: |
256 | fpuemustats.emulated++; | 259 | MIPS_FPU_EMU_INC_STATS(emulated); |
257 | switch (MIPSInst_OPCODE(ir)) { | 260 | switch (MIPSInst_OPCODE(ir)) { |
258 | case ldc1_op:{ | 261 | case ldc1_op:{ |
259 | u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + | 262 | u64 __user *va = (u64 __user *) (xcp->regs[MIPSInst_RS(ir)] + |
260 | MIPSInst_SIMM(ir)); | 263 | MIPSInst_SIMM(ir)); |
261 | u64 val; | 264 | u64 val; |
262 | 265 | ||
263 | fpuemustats.loads++; | 266 | MIPS_FPU_EMU_INC_STATS(loads); |
264 | if (get_user(val, va)) { | 267 | if (get_user(val, va)) { |
265 | fpuemustats.errors++; | 268 | MIPS_FPU_EMU_INC_STATS(errors); |
266 | return SIGBUS; | 269 | return SIGBUS; |
267 | } | 270 | } |
268 | DITOREG(val, MIPSInst_RT(ir)); | 271 | DITOREG(val, MIPSInst_RT(ir)); |
@@ -274,10 +277,10 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
274 | MIPSInst_SIMM(ir)); | 277 | MIPSInst_SIMM(ir)); |
275 | u64 val; | 278 | u64 val; |
276 | 279 | ||
277 | fpuemustats.stores++; | 280 | MIPS_FPU_EMU_INC_STATS(stores); |
278 | DIFROMREG(val, MIPSInst_RT(ir)); | 281 | DIFROMREG(val, MIPSInst_RT(ir)); |
279 | if (put_user(val, va)) { | 282 | if (put_user(val, va)) { |
280 | fpuemustats.errors++; | 283 | MIPS_FPU_EMU_INC_STATS(errors); |
281 | return SIGBUS; | 284 | return SIGBUS; |
282 | } | 285 | } |
283 | break; | 286 | break; |
@@ -288,9 +291,9 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
288 | MIPSInst_SIMM(ir)); | 291 | MIPSInst_SIMM(ir)); |
289 | u32 val; | 292 | u32 val; |
290 | 293 | ||
291 | fpuemustats.loads++; | 294 | MIPS_FPU_EMU_INC_STATS(loads); |
292 | if (get_user(val, va)) { | 295 | if (get_user(val, va)) { |
293 | fpuemustats.errors++; | 296 | MIPS_FPU_EMU_INC_STATS(errors); |
294 | return SIGBUS; | 297 | return SIGBUS; |
295 | } | 298 | } |
296 | SITOREG(val, MIPSInst_RT(ir)); | 299 | SITOREG(val, MIPSInst_RT(ir)); |
@@ -302,10 +305,10 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
302 | MIPSInst_SIMM(ir)); | 305 | MIPSInst_SIMM(ir)); |
303 | u32 val; | 306 | u32 val; |
304 | 307 | ||
305 | fpuemustats.stores++; | 308 | MIPS_FPU_EMU_INC_STATS(stores); |
306 | SIFROMREG(val, MIPSInst_RT(ir)); | 309 | SIFROMREG(val, MIPSInst_RT(ir)); |
307 | if (put_user(val, va)) { | 310 | if (put_user(val, va)) { |
308 | fpuemustats.errors++; | 311 | MIPS_FPU_EMU_INC_STATS(errors); |
309 | return SIGBUS; | 312 | return SIGBUS; |
310 | } | 313 | } |
311 | break; | 314 | break; |
@@ -429,7 +432,7 @@ static int cop1Emulate(struct pt_regs *xcp, struct mips_fpu_struct *ctx) | |||
429 | 432 | ||
430 | if (get_user(ir, | 433 | if (get_user(ir, |
431 | (mips_instruction __user *) xcp->cp0_epc)) { | 434 | (mips_instruction __user *) xcp->cp0_epc)) { |
432 | fpuemustats.errors++; | 435 | MIPS_FPU_EMU_INC_STATS(errors); |
433 | return SIGBUS; | 436 | return SIGBUS; |
434 | } | 437 | } |
435 | 438 | ||
@@ -595,7 +598,7 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
595 | { | 598 | { |
596 | unsigned rcsr = 0; /* resulting csr */ | 599 | unsigned rcsr = 0; /* resulting csr */ |
597 | 600 | ||
598 | fpuemustats.cp1xops++; | 601 | MIPS_FPU_EMU_INC_STATS(cp1xops); |
599 | 602 | ||
600 | switch (MIPSInst_FMA_FFMT(ir)) { | 603 | switch (MIPSInst_FMA_FFMT(ir)) { |
601 | case s_fmt:{ /* 0 */ | 604 | case s_fmt:{ /* 0 */ |
@@ -610,9 +613,9 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
610 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + | 613 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
611 | xcp->regs[MIPSInst_FT(ir)]); | 614 | xcp->regs[MIPSInst_FT(ir)]); |
612 | 615 | ||
613 | fpuemustats.loads++; | 616 | MIPS_FPU_EMU_INC_STATS(loads); |
614 | if (get_user(val, va)) { | 617 | if (get_user(val, va)) { |
615 | fpuemustats.errors++; | 618 | MIPS_FPU_EMU_INC_STATS(errors); |
616 | return SIGBUS; | 619 | return SIGBUS; |
617 | } | 620 | } |
618 | SITOREG(val, MIPSInst_FD(ir)); | 621 | SITOREG(val, MIPSInst_FD(ir)); |
@@ -622,11 +625,11 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
622 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + | 625 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
623 | xcp->regs[MIPSInst_FT(ir)]); | 626 | xcp->regs[MIPSInst_FT(ir)]); |
624 | 627 | ||
625 | fpuemustats.stores++; | 628 | MIPS_FPU_EMU_INC_STATS(stores); |
626 | 629 | ||
627 | SIFROMREG(val, MIPSInst_FS(ir)); | 630 | SIFROMREG(val, MIPSInst_FS(ir)); |
628 | if (put_user(val, va)) { | 631 | if (put_user(val, va)) { |
629 | fpuemustats.errors++; | 632 | MIPS_FPU_EMU_INC_STATS(errors); |
630 | return SIGBUS; | 633 | return SIGBUS; |
631 | } | 634 | } |
632 | break; | 635 | break; |
@@ -687,9 +690,9 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
687 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + | 690 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
688 | xcp->regs[MIPSInst_FT(ir)]); | 691 | xcp->regs[MIPSInst_FT(ir)]); |
689 | 692 | ||
690 | fpuemustats.loads++; | 693 | MIPS_FPU_EMU_INC_STATS(loads); |
691 | if (get_user(val, va)) { | 694 | if (get_user(val, va)) { |
692 | fpuemustats.errors++; | 695 | MIPS_FPU_EMU_INC_STATS(errors); |
693 | return SIGBUS; | 696 | return SIGBUS; |
694 | } | 697 | } |
695 | DITOREG(val, MIPSInst_FD(ir)); | 698 | DITOREG(val, MIPSInst_FD(ir)); |
@@ -699,10 +702,10 @@ static int fpux_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
699 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + | 702 | va = (void __user *) (xcp->regs[MIPSInst_FR(ir)] + |
700 | xcp->regs[MIPSInst_FT(ir)]); | 703 | xcp->regs[MIPSInst_FT(ir)]); |
701 | 704 | ||
702 | fpuemustats.stores++; | 705 | MIPS_FPU_EMU_INC_STATS(stores); |
703 | DIFROMREG(val, MIPSInst_FS(ir)); | 706 | DIFROMREG(val, MIPSInst_FS(ir)); |
704 | if (put_user(val, va)) { | 707 | if (put_user(val, va)) { |
705 | fpuemustats.errors++; | 708 | MIPS_FPU_EMU_INC_STATS(errors); |
706 | return SIGBUS; | 709 | return SIGBUS; |
707 | } | 710 | } |
708 | break; | 711 | break; |
@@ -769,7 +772,7 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
769 | #endif | 772 | #endif |
770 | } rv; /* resulting value */ | 773 | } rv; /* resulting value */ |
771 | 774 | ||
772 | fpuemustats.cp1ops++; | 775 | MIPS_FPU_EMU_INC_STATS(cp1ops); |
773 | switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) { | 776 | switch (rfmt = (MIPSInst_FFMT(ir) & 0xf)) { |
774 | case s_fmt:{ /* 0 */ | 777 | case s_fmt:{ /* 0 */ |
775 | union { | 778 | union { |
@@ -1240,7 +1243,7 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
1240 | prevepc = xcp->cp0_epc; | 1243 | prevepc = xcp->cp0_epc; |
1241 | 1244 | ||
1242 | if (get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) { | 1245 | if (get_user(insn, (mips_instruction __user *) xcp->cp0_epc)) { |
1243 | fpuemustats.errors++; | 1246 | MIPS_FPU_EMU_INC_STATS(errors); |
1244 | return SIGBUS; | 1247 | return SIGBUS; |
1245 | } | 1248 | } |
1246 | if (insn == 0) | 1249 | if (insn == 0) |
@@ -1276,33 +1279,50 @@ int fpu_emulator_cop1Handler(struct pt_regs *xcp, struct mips_fpu_struct *ctx, | |||
1276 | } | 1279 | } |
1277 | 1280 | ||
1278 | #ifdef CONFIG_DEBUG_FS | 1281 | #ifdef CONFIG_DEBUG_FS |
1282 | |||
1283 | static int fpuemu_stat_get(void *data, u64 *val) | ||
1284 | { | ||
1285 | int cpu; | ||
1286 | unsigned long sum = 0; | ||
1287 | for_each_online_cpu(cpu) { | ||
1288 | struct mips_fpu_emulator_stats *ps; | ||
1289 | local_t *pv; | ||
1290 | ps = &per_cpu(fpuemustats, cpu); | ||
1291 | pv = (void *)ps + (unsigned long)data; | ||
1292 | sum += local_read(pv); | ||
1293 | } | ||
1294 | *val = sum; | ||
1295 | return 0; | ||
1296 | } | ||
1297 | DEFINE_SIMPLE_ATTRIBUTE(fops_fpuemu_stat, fpuemu_stat_get, NULL, "%llu\n"); | ||
1298 | |||
1279 | extern struct dentry *mips_debugfs_dir; | 1299 | extern struct dentry *mips_debugfs_dir; |
1280 | static int __init debugfs_fpuemu(void) | 1300 | static int __init debugfs_fpuemu(void) |
1281 | { | 1301 | { |
1282 | struct dentry *d, *dir; | 1302 | struct dentry *d, *dir; |
1283 | int i; | ||
1284 | static struct { | ||
1285 | const char *name; | ||
1286 | unsigned int *v; | ||
1287 | } vars[] __initdata = { | ||
1288 | { "emulated", &fpuemustats.emulated }, | ||
1289 | { "loads", &fpuemustats.loads }, | ||
1290 | { "stores", &fpuemustats.stores }, | ||
1291 | { "cp1ops", &fpuemustats.cp1ops }, | ||
1292 | { "cp1xops", &fpuemustats.cp1xops }, | ||
1293 | { "errors", &fpuemustats.errors }, | ||
1294 | }; | ||
1295 | 1303 | ||
1296 | if (!mips_debugfs_dir) | 1304 | if (!mips_debugfs_dir) |
1297 | return -ENODEV; | 1305 | return -ENODEV; |
1298 | dir = debugfs_create_dir("fpuemustats", mips_debugfs_dir); | 1306 | dir = debugfs_create_dir("fpuemustats", mips_debugfs_dir); |
1299 | if (!dir) | 1307 | if (!dir) |
1300 | return -ENOMEM; | 1308 | return -ENOMEM; |
1301 | for (i = 0; i < ARRAY_SIZE(vars); i++) { | 1309 | |
1302 | d = debugfs_create_u32(vars[i].name, S_IRUGO, dir, vars[i].v); | 1310 | #define FPU_STAT_CREATE(M) \ |
1303 | if (!d) | 1311 | do { \ |
1304 | return -ENOMEM; | 1312 | d = debugfs_create_file(#M , S_IRUGO, dir, \ |
1305 | } | 1313 | (void *)offsetof(struct mips_fpu_emulator_stats, M), \ |
1314 | &fops_fpuemu_stat); \ | ||
1315 | if (!d) \ | ||
1316 | return -ENOMEM; \ | ||
1317 | } while (0) | ||
1318 | |||
1319 | FPU_STAT_CREATE(emulated); | ||
1320 | FPU_STAT_CREATE(loads); | ||
1321 | FPU_STAT_CREATE(stores); | ||
1322 | FPU_STAT_CREATE(cp1ops); | ||
1323 | FPU_STAT_CREATE(cp1xops); | ||
1324 | FPU_STAT_CREATE(errors); | ||
1325 | |||
1306 | return 0; | 1326 | return 0; |
1307 | } | 1327 | } |
1308 | __initcall(debugfs_fpuemu); | 1328 | __initcall(debugfs_fpuemu); |
diff --git a/arch/mips/math-emu/dsemul.c b/arch/mips/math-emu/dsemul.c index df7b9d928efc..36d975ae08f8 100644 --- a/arch/mips/math-emu/dsemul.c +++ b/arch/mips/math-emu/dsemul.c | |||
@@ -98,7 +98,7 @@ int mips_dsemul(struct pt_regs *regs, mips_instruction ir, unsigned long cpc) | |||
98 | err |= __put_user(cpc, &fr->epc); | 98 | err |= __put_user(cpc, &fr->epc); |
99 | 99 | ||
100 | if (unlikely(err)) { | 100 | if (unlikely(err)) { |
101 | fpuemustats.errors++; | 101 | MIPS_FPU_EMU_INC_STATS(errors); |
102 | return SIGBUS; | 102 | return SIGBUS; |
103 | } | 103 | } |
104 | 104 | ||
@@ -136,7 +136,7 @@ int do_dsemulret(struct pt_regs *xcp) | |||
136 | err |= __get_user(cookie, &fr->cookie); | 136 | err |= __get_user(cookie, &fr->cookie); |
137 | 137 | ||
138 | if (unlikely(err || (insn != BREAK_MATH) || (cookie != BD_COOKIE))) { | 138 | if (unlikely(err || (insn != BREAK_MATH) || (cookie != BD_COOKIE))) { |
139 | fpuemustats.errors++; | 139 | MIPS_FPU_EMU_INC_STATS(errors); |
140 | return 0; | 140 | return 0; |
141 | } | 141 | } |
142 | 142 | ||
diff --git a/arch/mips/mipssim/Makefile b/arch/mips/mipssim/Makefile index 57f43c1c7882..41b96571315e 100644 --- a/arch/mips/mipssim/Makefile +++ b/arch/mips/mipssim/Makefile | |||
@@ -17,8 +17,7 @@ | |||
17 | # 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | 17 | # 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
18 | # | 18 | # |
19 | 19 | ||
20 | obj-y := sim_platform.o sim_setup.o sim_mem.o sim_time.o sim_int.o \ | 20 | obj-y := sim_platform.o sim_setup.o sim_mem.o sim_time.o sim_int.o |
21 | sim_cmdline.o | ||
22 | 21 | ||
23 | obj-$(CONFIG_EARLY_PRINTK) += sim_console.o | 22 | obj-$(CONFIG_EARLY_PRINTK) += sim_console.o |
24 | obj-$(CONFIG_MIPS_MT_SMTC) += sim_smtc.o | 23 | obj-$(CONFIG_MIPS_MT_SMTC) += sim_smtc.o |
diff --git a/arch/mips/mipssim/sim_setup.c b/arch/mips/mipssim/sim_setup.c index 2877675c5f0d..0824f6af4777 100644 --- a/arch/mips/mipssim/sim_setup.c +++ b/arch/mips/mipssim/sim_setup.c | |||
@@ -61,7 +61,6 @@ void __init prom_init(void) | |||
61 | set_io_port_base(0xbfd00000); | 61 | set_io_port_base(0xbfd00000); |
62 | 62 | ||
63 | pr_info("\nLINUX started...\n"); | 63 | pr_info("\nLINUX started...\n"); |
64 | prom_init_cmdline(); | ||
65 | prom_meminit(); | 64 | prom_meminit(); |
66 | 65 | ||
67 | #ifdef CONFIG_MIPS_MT_SMP | 66 | #ifdef CONFIG_MIPS_MT_SMP |
diff --git a/arch/mips/mm/cerr-sb1.c b/arch/mips/mm/cerr-sb1.c index 1bd1f18ac23c..3571090ba178 100644 --- a/arch/mips/mm/cerr-sb1.c +++ b/arch/mips/mm/cerr-sb1.c | |||
@@ -567,13 +567,10 @@ static uint32_t extract_dc(unsigned short addr, int data) | |||
567 | datalo = ((unsigned long long)datalohi << 32) | datalolo; | 567 | datalo = ((unsigned long long)datalohi << 32) | datalolo; |
568 | ecc = dc_ecc(datalo); | 568 | ecc = dc_ecc(datalo); |
569 | if (ecc != datahi) { | 569 | if (ecc != datahi) { |
570 | int bits = 0; | 570 | int bits; |
571 | bad_ecc |= 1 << (3-offset); | 571 | bad_ecc |= 1 << (3-offset); |
572 | ecc ^= datahi; | 572 | ecc ^= datahi; |
573 | while (ecc) { | 573 | bits = hweight8(ecc); |
574 | if (ecc & 1) bits++; | ||
575 | ecc >>= 1; | ||
576 | } | ||
577 | res |= (bits == 1) ? CP0_CERRD_DATA_SBE : CP0_CERRD_DATA_DBE; | 574 | res |= (bits == 1) ? CP0_CERRD_DATA_SBE : CP0_CERRD_DATA_DBE; |
578 | } | 575 | } |
579 | printk(" %02X-%016llX", datahi, datalo); | 576 | printk(" %02X-%016llX", datahi, datalo); |
diff --git a/arch/mips/mm/init.c b/arch/mips/mm/init.c index 8d1f4f363049..9e8d00389eef 100644 --- a/arch/mips/mm/init.c +++ b/arch/mips/mm/init.c | |||
@@ -462,7 +462,9 @@ void __init_refok free_initmem(void) | |||
462 | __pa_symbol(&__init_end)); | 462 | __pa_symbol(&__init_end)); |
463 | } | 463 | } |
464 | 464 | ||
465 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT | ||
465 | unsigned long pgd_current[NR_CPUS]; | 466 | unsigned long pgd_current[NR_CPUS]; |
467 | #endif | ||
466 | /* | 468 | /* |
467 | * On 64-bit we've got three-level pagetables with a slightly | 469 | * On 64-bit we've got three-level pagetables with a slightly |
468 | * different layout ... | 470 | * different layout ... |
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c index bb1719a55d22..3d0baa4a842d 100644 --- a/arch/mips/mm/tlbex.c +++ b/arch/mips/mm/tlbex.c | |||
@@ -160,6 +160,12 @@ static u32 tlb_handler[128] __cpuinitdata; | |||
160 | static struct uasm_label labels[128] __cpuinitdata; | 160 | static struct uasm_label labels[128] __cpuinitdata; |
161 | static struct uasm_reloc relocs[128] __cpuinitdata; | 161 | static struct uasm_reloc relocs[128] __cpuinitdata; |
162 | 162 | ||
163 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT | ||
164 | /* | ||
165 | * CONFIG_MIPS_PGD_C0_CONTEXT implies 64 bit and lack of pgd_current, | ||
166 | * we cannot do r3000 under these circumstances. | ||
167 | */ | ||
168 | |||
163 | /* | 169 | /* |
164 | * The R3000 TLB handler is simple. | 170 | * The R3000 TLB handler is simple. |
165 | */ | 171 | */ |
@@ -199,6 +205,7 @@ static void __cpuinit build_r3000_tlb_refill_handler(void) | |||
199 | 205 | ||
200 | dump_handler((u32 *)ebase, 32); | 206 | dump_handler((u32 *)ebase, 32); |
201 | } | 207 | } |
208 | #endif /* CONFIG_MIPS_PGD_C0_CONTEXT */ | ||
202 | 209 | ||
203 | /* | 210 | /* |
204 | * The R4000 TLB handler is much more complicated. We have two | 211 | * The R4000 TLB handler is much more complicated. We have two |
@@ -497,8 +504,9 @@ static void __cpuinit | |||
497 | build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, | 504 | build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, |
498 | unsigned int tmp, unsigned int ptr) | 505 | unsigned int tmp, unsigned int ptr) |
499 | { | 506 | { |
507 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT | ||
500 | long pgdc = (long)pgd_current; | 508 | long pgdc = (long)pgd_current; |
501 | 509 | #endif | |
502 | /* | 510 | /* |
503 | * The vmalloc handling is not in the hotpath. | 511 | * The vmalloc handling is not in the hotpath. |
504 | */ | 512 | */ |
@@ -506,7 +514,15 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, | |||
506 | uasm_il_bltz(p, r, tmp, label_vmalloc); | 514 | uasm_il_bltz(p, r, tmp, label_vmalloc); |
507 | /* No uasm_i_nop needed here, since the next insn doesn't touch TMP. */ | 515 | /* No uasm_i_nop needed here, since the next insn doesn't touch TMP. */ |
508 | 516 | ||
509 | #ifdef CONFIG_SMP | 517 | #ifdef CONFIG_MIPS_PGD_C0_CONTEXT |
518 | /* | ||
519 | * &pgd << 11 stored in CONTEXT [23..63]. | ||
520 | */ | ||
521 | UASM_i_MFC0(p, ptr, C0_CONTEXT); | ||
522 | uasm_i_dins(p, ptr, 0, 0, 23); /* Clear lower 23 bits of context. */ | ||
523 | uasm_i_ori(p, ptr, ptr, 0x540); /* 1 0 1 0 1 << 6 xkphys cached */ | ||
524 | uasm_i_drotr(p, ptr, ptr, 11); | ||
525 | #elif defined(CONFIG_SMP) | ||
510 | # ifdef CONFIG_MIPS_MT_SMTC | 526 | # ifdef CONFIG_MIPS_MT_SMTC |
511 | /* | 527 | /* |
512 | * SMTC uses TCBind value as "CPU" index | 528 | * SMTC uses TCBind value as "CPU" index |
@@ -520,7 +536,7 @@ build_get_pmde64(u32 **p, struct uasm_label **l, struct uasm_reloc **r, | |||
520 | */ | 536 | */ |
521 | uasm_i_dmfc0(p, ptr, C0_CONTEXT); | 537 | uasm_i_dmfc0(p, ptr, C0_CONTEXT); |
522 | uasm_i_dsrl(p, ptr, ptr, 23); | 538 | uasm_i_dsrl(p, ptr, ptr, 23); |
523 | #endif | 539 | # endif |
524 | UASM_i_LA_mostly(p, tmp, pgdc); | 540 | UASM_i_LA_mostly(p, tmp, pgdc); |
525 | uasm_i_daddu(p, ptr, ptr, tmp); | 541 | uasm_i_daddu(p, ptr, ptr, tmp); |
526 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); | 542 | uasm_i_dmfc0(p, tmp, C0_BADVADDR); |
@@ -1033,6 +1049,7 @@ build_pte_modifiable(u32 **p, struct uasm_reloc **r, | |||
1033 | iPTE_LW(p, pte, ptr); | 1049 | iPTE_LW(p, pte, ptr); |
1034 | } | 1050 | } |
1035 | 1051 | ||
1052 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT | ||
1036 | /* | 1053 | /* |
1037 | * R3000 style TLB load/store/modify handlers. | 1054 | * R3000 style TLB load/store/modify handlers. |
1038 | */ | 1055 | */ |
@@ -1184,6 +1201,7 @@ static void __cpuinit build_r3000_tlb_modify_handler(void) | |||
1184 | 1201 | ||
1185 | dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); | 1202 | dump_handler(handle_tlbm, ARRAY_SIZE(handle_tlbm)); |
1186 | } | 1203 | } |
1204 | #endif /* CONFIG_MIPS_PGD_C0_CONTEXT */ | ||
1187 | 1205 | ||
1188 | /* | 1206 | /* |
1189 | * R4000 style TLB load/store/modify handlers. | 1207 | * R4000 style TLB load/store/modify handlers. |
@@ -1400,6 +1418,7 @@ void __cpuinit build_tlb_refill_handler(void) | |||
1400 | case CPU_TX3912: | 1418 | case CPU_TX3912: |
1401 | case CPU_TX3922: | 1419 | case CPU_TX3922: |
1402 | case CPU_TX3927: | 1420 | case CPU_TX3927: |
1421 | #ifndef CONFIG_MIPS_PGD_C0_CONTEXT | ||
1403 | build_r3000_tlb_refill_handler(); | 1422 | build_r3000_tlb_refill_handler(); |
1404 | if (!run_once) { | 1423 | if (!run_once) { |
1405 | build_r3000_tlb_load_handler(); | 1424 | build_r3000_tlb_load_handler(); |
@@ -1407,6 +1426,9 @@ void __cpuinit build_tlb_refill_handler(void) | |||
1407 | build_r3000_tlb_modify_handler(); | 1426 | build_r3000_tlb_modify_handler(); |
1408 | run_once++; | 1427 | run_once++; |
1409 | } | 1428 | } |
1429 | #else | ||
1430 | panic("No R3000 TLB refill handler"); | ||
1431 | #endif | ||
1410 | break; | 1432 | break; |
1411 | 1433 | ||
1412 | case CPU_R6000: | 1434 | case CPU_R6000: |
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c index f467199676a8..0a165c5179a1 100644 --- a/arch/mips/mm/uasm.c +++ b/arch/mips/mm/uasm.c | |||
@@ -60,11 +60,11 @@ enum opcode { | |||
60 | insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl, | 60 | insn_beql, insn_bgez, insn_bgezl, insn_bltz, insn_bltzl, |
61 | insn_bne, insn_cache, insn_daddu, insn_daddiu, insn_dmfc0, | 61 | insn_bne, insn_cache, insn_daddu, insn_daddiu, insn_dmfc0, |
62 | insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, | 62 | insn_dmtc0, insn_dsll, insn_dsll32, insn_dsra, insn_dsrl, |
63 | insn_dsrl32, insn_dsubu, insn_eret, insn_j, insn_jal, insn_jr, | 63 | insn_dsrl32, insn_drotr, insn_dsubu, insn_eret, insn_j, insn_jal, |
64 | insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, | 64 | insn_jr, insn_ld, insn_ll, insn_lld, insn_lui, insn_lw, insn_mfc0, |
65 | insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, | 65 | insn_mtc0, insn_ori, insn_pref, insn_rfe, insn_sc, insn_scd, |
66 | insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, | 66 | insn_sd, insn_sll, insn_sra, insn_srl, insn_subu, insn_sw, |
67 | insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori | 67 | insn_tlbp, insn_tlbwi, insn_tlbwr, insn_xor, insn_xori, insn_dins |
68 | }; | 68 | }; |
69 | 69 | ||
70 | struct insn { | 70 | struct insn { |
@@ -104,6 +104,7 @@ static struct insn insn_table[] __cpuinitdata = { | |||
104 | { insn_dsra, M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE }, | 104 | { insn_dsra, M(spec_op, 0, 0, 0, 0, dsra_op), RT | RD | RE }, |
105 | { insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE }, | 105 | { insn_dsrl, M(spec_op, 0, 0, 0, 0, dsrl_op), RT | RD | RE }, |
106 | { insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE }, | 106 | { insn_dsrl32, M(spec_op, 0, 0, 0, 0, dsrl32_op), RT | RD | RE }, |
107 | { insn_drotr, M(spec_op, 1, 0, 0, 0, dsrl_op), RT | RD | RE }, | ||
107 | { insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD }, | 108 | { insn_dsubu, M(spec_op, 0, 0, 0, 0, dsubu_op), RS | RT | RD }, |
108 | { insn_eret, M(cop0_op, cop_op, 0, 0, 0, eret_op), 0 }, | 109 | { insn_eret, M(cop0_op, cop_op, 0, 0, 0, eret_op), 0 }, |
109 | { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM }, | 110 | { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM }, |
@@ -132,6 +133,7 @@ static struct insn insn_table[] __cpuinitdata = { | |||
132 | { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, | 133 | { insn_tlbwr, M(cop0_op, cop_op, 0, 0, 0, tlbwr_op), 0 }, |
133 | { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, | 134 | { insn_xor, M(spec_op, 0, 0, 0, 0, xor_op), RS | RT | RD }, |
134 | { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, | 135 | { insn_xori, M(xori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, |
136 | { insn_dins, M(spec3_op, 0, 0, 0, 0, dins_op), RS | RT | RD | RE }, | ||
135 | { insn_invalid, 0, 0 } | 137 | { insn_invalid, 0, 0 } |
136 | }; | 138 | }; |
137 | 139 | ||
@@ -304,6 +306,12 @@ Ip_u2u1s3(op) \ | |||
304 | build_insn(buf, insn##op, b, a, c); \ | 306 | build_insn(buf, insn##op, b, a, c); \ |
305 | } | 307 | } |
306 | 308 | ||
309 | #define I_u2u1msbu3(op) \ | ||
310 | Ip_u2u1msbu3(op) \ | ||
311 | { \ | ||
312 | build_insn(buf, insn##op, b, a, c+d-1, c); \ | ||
313 | } | ||
314 | |||
307 | #define I_u1u2(op) \ | 315 | #define I_u1u2(op) \ |
308 | Ip_u1u2(op) \ | 316 | Ip_u1u2(op) \ |
309 | { \ | 317 | { \ |
@@ -349,6 +357,7 @@ I_u2u1u3(_dsll32) | |||
349 | I_u2u1u3(_dsra) | 357 | I_u2u1u3(_dsra) |
350 | I_u2u1u3(_dsrl) | 358 | I_u2u1u3(_dsrl) |
351 | I_u2u1u3(_dsrl32) | 359 | I_u2u1u3(_dsrl32) |
360 | I_u2u1u3(_drotr) | ||
352 | I_u3u1u2(_dsubu) | 361 | I_u3u1u2(_dsubu) |
353 | I_0(_eret) | 362 | I_0(_eret) |
354 | I_u1(_j) | 363 | I_u1(_j) |
@@ -377,6 +386,7 @@ I_0(_tlbwi) | |||
377 | I_0(_tlbwr) | 386 | I_0(_tlbwr) |
378 | I_u3u1u2(_xor) | 387 | I_u3u1u2(_xor) |
379 | I_u2u1u3(_xori) | 388 | I_u2u1u3(_xori) |
389 | I_u2u1msbu3(_dins); | ||
380 | 390 | ||
381 | /* Handle labels. */ | 391 | /* Handle labels. */ |
382 | void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid) | 392 | void __cpuinit uasm_build_label(struct uasm_label **lab, u32 *addr, int lid) |
diff --git a/arch/mips/mm/uasm.h b/arch/mips/mm/uasm.h index c6d1e3dd82d4..3d153edaa51e 100644 --- a/arch/mips/mm/uasm.h +++ b/arch/mips/mm/uasm.h | |||
@@ -34,6 +34,11 @@ uasm_i##op(u32 **buf, unsigned int a, signed int b, unsigned int c) | |||
34 | void __cpuinit \ | 34 | void __cpuinit \ |
35 | uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c) | 35 | uasm_i##op(u32 **buf, unsigned int a, unsigned int b, signed int c) |
36 | 36 | ||
37 | #define Ip_u2u1msbu3(op) \ | ||
38 | void __cpuinit \ | ||
39 | uasm_i##op(u32 **buf, unsigned int a, unsigned int b, unsigned int c, \ | ||
40 | unsigned int d) | ||
41 | |||
37 | #define Ip_u1u2(op) \ | 42 | #define Ip_u1u2(op) \ |
38 | void __cpuinit uasm_i##op(u32 **buf, unsigned int a, unsigned int b) | 43 | void __cpuinit uasm_i##op(u32 **buf, unsigned int a, unsigned int b) |
39 | 44 | ||
@@ -65,6 +70,7 @@ Ip_u2u1u3(_dsll32); | |||
65 | Ip_u2u1u3(_dsra); | 70 | Ip_u2u1u3(_dsra); |
66 | Ip_u2u1u3(_dsrl); | 71 | Ip_u2u1u3(_dsrl); |
67 | Ip_u2u1u3(_dsrl32); | 72 | Ip_u2u1u3(_dsrl32); |
73 | Ip_u2u1u3(_drotr); | ||
68 | Ip_u3u1u2(_dsubu); | 74 | Ip_u3u1u2(_dsubu); |
69 | Ip_0(_eret); | 75 | Ip_0(_eret); |
70 | Ip_u1(_j); | 76 | Ip_u1(_j); |
@@ -93,6 +99,7 @@ Ip_0(_tlbwi); | |||
93 | Ip_0(_tlbwr); | 99 | Ip_0(_tlbwr); |
94 | Ip_u3u1u2(_xor); | 100 | Ip_u3u1u2(_xor); |
95 | Ip_u2u1u3(_xori); | 101 | Ip_u2u1u3(_xori); |
102 | Ip_u2u1msbu3(_dins); | ||
96 | 103 | ||
97 | /* Handle labels. */ | 104 | /* Handle labels. */ |
98 | struct uasm_label { | 105 | struct uasm_label { |
diff --git a/arch/mips/mti-malta/malta-memory.c b/arch/mips/mti-malta/malta-memory.c index 9035c64bc5ed..b27419c84919 100644 --- a/arch/mips/mti-malta/malta-memory.c +++ b/arch/mips/mti-malta/malta-memory.c | |||
@@ -55,7 +55,7 @@ static struct prom_pmemblock * __init prom_getmdesc(void) | |||
55 | char *memsize_str; | 55 | char *memsize_str; |
56 | unsigned int memsize; | 56 | unsigned int memsize; |
57 | char *ptr; | 57 | char *ptr; |
58 | static char cmdline[CL_SIZE] __initdata; | 58 | static char cmdline[COMMAND_LINE_SIZE] __initdata; |
59 | 59 | ||
60 | /* otherwise look in the environment */ | 60 | /* otherwise look in the environment */ |
61 | memsize_str = prom_getenv("memsize"); | 61 | memsize_str = prom_getenv("memsize"); |
diff --git a/arch/mips/nxp/pnx833x/common/interrupts.c b/arch/mips/nxp/pnx833x/common/interrupts.c index 30533ba200e2..3a467c04f811 100644 --- a/arch/mips/nxp/pnx833x/common/interrupts.c +++ b/arch/mips/nxp/pnx833x/common/interrupts.c | |||
@@ -295,7 +295,7 @@ static int pnx833x_set_type_gpio_irq(unsigned int irq, unsigned int flow_type) | |||
295 | } | 295 | } |
296 | 296 | ||
297 | static struct irq_chip pnx833x_pic_irq_type = { | 297 | static struct irq_chip pnx833x_pic_irq_type = { |
298 | .typename = "PNX-PIC", | 298 | .name = "PNX-PIC", |
299 | .startup = pnx833x_startup_pic_irq, | 299 | .startup = pnx833x_startup_pic_irq, |
300 | .shutdown = pnx833x_shutdown_pic_irq, | 300 | .shutdown = pnx833x_shutdown_pic_irq, |
301 | .enable = pnx833x_enable_pic_irq, | 301 | .enable = pnx833x_enable_pic_irq, |
@@ -305,7 +305,7 @@ static struct irq_chip pnx833x_pic_irq_type = { | |||
305 | }; | 305 | }; |
306 | 306 | ||
307 | static struct irq_chip pnx833x_gpio_irq_type = { | 307 | static struct irq_chip pnx833x_gpio_irq_type = { |
308 | .typename = "PNX-GPIO", | 308 | .name = "PNX-GPIO", |
309 | .startup = pnx833x_startup_gpio_irq, | 309 | .startup = pnx833x_startup_gpio_irq, |
310 | .shutdown = pnx833x_disable_gpio_irq, | 310 | .shutdown = pnx833x_disable_gpio_irq, |
311 | .enable = pnx833x_enable_gpio_irq, | 311 | .enable = pnx833x_enable_gpio_irq, |
diff --git a/arch/mips/oprofile/op_model_loongson2.c b/arch/mips/oprofile/op_model_loongson2.c index 575cd1473475..475ff46712ab 100644 --- a/arch/mips/oprofile/op_model_loongson2.c +++ b/arch/mips/oprofile/op_model_loongson2.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Loongson2 performance counter driver for oprofile | 2 | * Loongson2 performance counter driver for oprofile |
3 | * | 3 | * |
4 | * Copyright (C) 2009 Lemote Inc. & Insititute of Computing Technology | 4 | * Copyright (C) 2009 Lemote Inc. |
5 | * Author: Yanhua <yanh@lemote.com> | 5 | * Author: Yanhua <yanh@lemote.com> |
6 | * Author: Wu Zhangjin <wuzj@lemote.com> | 6 | * Author: Wu Zhangjin <wuzj@lemote.com> |
7 | * | 7 | * |
@@ -125,6 +125,9 @@ static irqreturn_t loongson2_perfcount_handler(int irq, void *dev_id) | |||
125 | */ | 125 | */ |
126 | 126 | ||
127 | /* Check whether the irq belongs to me */ | 127 | /* Check whether the irq belongs to me */ |
128 | enabled = read_c0_perfcnt() & LOONGSON2_PERFCNT_INT_EN; | ||
129 | if (!enabled) | ||
130 | return IRQ_NONE; | ||
128 | enabled = reg.cnt1_enabled | reg.cnt2_enabled; | 131 | enabled = reg.cnt1_enabled | reg.cnt2_enabled; |
129 | if (!enabled) | 132 | if (!enabled) |
130 | return IRQ_NONE; | 133 | return IRQ_NONE; |
diff --git a/arch/mips/pci/Makefile b/arch/mips/pci/Makefile index 91bfe73a7f60..c9209ca6c8e7 100644 --- a/arch/mips/pci/Makefile +++ b/arch/mips/pci/Makefile | |||
@@ -22,13 +22,13 @@ obj-$(CONFIG_BCM63XX) += pci-bcm63xx.o fixup-bcm63xx.o \ | |||
22 | # | 22 | # |
23 | # These are still pretty much in the old state, watch, go blind. | 23 | # These are still pretty much in the old state, watch, go blind. |
24 | # | 24 | # |
25 | obj-$(CONFIG_BASLER_EXCITE) += ops-titan.o pci-excite.o fixup-excite.o | ||
26 | obj-$(CONFIG_LASAT) += pci-lasat.o | 25 | obj-$(CONFIG_LASAT) += pci-lasat.o |
27 | obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o | 26 | obj-$(CONFIG_MIPS_COBALT) += fixup-cobalt.o |
28 | obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o | 27 | obj-$(CONFIG_SOC_AU1500) += fixup-au1000.o ops-au1000.o |
29 | obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o | 28 | obj-$(CONFIG_SOC_AU1550) += fixup-au1000.o ops-au1000.o |
30 | obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o | 29 | obj-$(CONFIG_SOC_PNX8550) += fixup-pnx8550.o ops-pnx8550.o |
31 | obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-bonito64.o | 30 | obj-$(CONFIG_LEMOTE_FULOONG2E) += fixup-fuloong2e.o ops-loongson2.o |
31 | obj-$(CONFIG_LEMOTE_MACH2F) += fixup-lemote2f.o ops-loongson2.o | ||
32 | obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o | 32 | obj-$(CONFIG_MIPS_MALTA) += fixup-malta.o |
33 | obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o | 33 | obj-$(CONFIG_PMC_MSP7120_GW) += fixup-pmcmsp.o ops-pmcmsp.o |
34 | obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o | 34 | obj-$(CONFIG_PMC_MSP7120_EVAL) += fixup-pmcmsp.o ops-pmcmsp.o |
diff --git a/arch/mips/pci/fixup-excite.c b/arch/mips/pci/fixup-excite.c deleted file mode 100644 index cd64d9f177c4..000000000000 --- a/arch/mips/pci/fixup-excite.c +++ /dev/null | |||
@@ -1,36 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004 by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; either version 2 of the License, or | ||
8 | * (at your option) any later version. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/pci.h> | ||
22 | #include <excite.h> | ||
23 | |||
24 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | ||
25 | { | ||
26 | if (pin == 0) | ||
27 | return -1; | ||
28 | |||
29 | return USB_IRQ; /* USB controller is the only PCI device */ | ||
30 | } | ||
31 | |||
32 | /* Do platform specific device initialization at pci_enable_device() time */ | ||
33 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
34 | { | ||
35 | return 0; | ||
36 | } | ||
diff --git a/arch/mips/pci/fixup-fuloong2e.c b/arch/mips/pci/fixup-fuloong2e.c index 0c4c7a81213f..4f6d8da07f93 100644 --- a/arch/mips/pci/fixup-fuloong2e.c +++ b/arch/mips/pci/fixup-fuloong2e.c | |||
@@ -13,7 +13,8 @@ | |||
13 | */ | 13 | */ |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/pci.h> | 15 | #include <linux/pci.h> |
16 | #include <asm/mips-boards/bonito64.h> | 16 | |
17 | #include <loongson.h> | ||
17 | 18 | ||
18 | /* South bridge slot number is set by the pci probe process */ | 19 | /* South bridge slot number is set by the pci probe process */ |
19 | static u8 sb_slot = 5; | 20 | static u8 sb_slot = 5; |
@@ -35,7 +36,7 @@ int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | |||
35 | break; | 36 | break; |
36 | } | 37 | } |
37 | } else { | 38 | } else { |
38 | irq = BONITO_IRQ_BASE + 25 + pin; | 39 | irq = LOONGSON_IRQ_BASE + 25 + pin; |
39 | } | 40 | } |
40 | return irq; | 41 | return irq; |
41 | 42 | ||
diff --git a/arch/mips/pci/fixup-lemote2f.c b/arch/mips/pci/fixup-lemote2f.c new file mode 100644 index 000000000000..caf2edeb02f0 --- /dev/null +++ b/arch/mips/pci/fixup-lemote2f.c | |||
@@ -0,0 +1,160 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Lemote Technology | ||
3 | * Copyright (C) 2004 ICT CAS | ||
4 | * Author: Li xiaoyu, lixy@ict.ac.cn | ||
5 | * | ||
6 | * Copyright (C) 2007 Lemote, Inc. | ||
7 | * Author: Fuxin Zhang, zhangfx@lemote.com | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | */ | ||
14 | #include <linux/init.h> | ||
15 | #include <linux/pci.h> | ||
16 | |||
17 | #include <loongson.h> | ||
18 | #include <cs5536/cs5536.h> | ||
19 | #include <cs5536/cs5536_pci.h> | ||
20 | |||
21 | /* PCI interrupt pins | ||
22 | * | ||
23 | * These should not be changed, or you should consider loongson2f interrupt | ||
24 | * register and your pci card dispatch | ||
25 | */ | ||
26 | |||
27 | #define PCIA 4 | ||
28 | #define PCIB 5 | ||
29 | #define PCIC 6 | ||
30 | #define PCID 7 | ||
31 | |||
32 | /* all the pci device has the PCIA pin, check the datasheet. */ | ||
33 | static char irq_tab[][5] __initdata = { | ||
34 | /* INTA INTB INTC INTD */ | ||
35 | {0, 0, 0, 0, 0}, /* 11: Unused */ | ||
36 | {0, 0, 0, 0, 0}, /* 12: Unused */ | ||
37 | {0, 0, 0, 0, 0}, /* 13: Unused */ | ||
38 | {0, 0, 0, 0, 0}, /* 14: Unused */ | ||
39 | {0, 0, 0, 0, 0}, /* 15: Unused */ | ||
40 | {0, 0, 0, 0, 0}, /* 16: Unused */ | ||
41 | {0, PCIA, 0, 0, 0}, /* 17: RTL8110-0 */ | ||
42 | {0, PCIB, 0, 0, 0}, /* 18: RTL8110-1 */ | ||
43 | {0, PCIC, 0, 0, 0}, /* 19: SiI3114 */ | ||
44 | {0, PCID, 0, 0, 0}, /* 20: 3-ports nec usb */ | ||
45 | {0, PCIA, PCIB, PCIC, PCID}, /* 21: PCI-SLOT */ | ||
46 | {0, 0, 0, 0, 0}, /* 22: Unused */ | ||
47 | {0, 0, 0, 0, 0}, /* 23: Unused */ | ||
48 | {0, 0, 0, 0, 0}, /* 24: Unused */ | ||
49 | {0, 0, 0, 0, 0}, /* 25: Unused */ | ||
50 | {0, 0, 0, 0, 0}, /* 26: Unused */ | ||
51 | {0, 0, 0, 0, 0}, /* 27: Unused */ | ||
52 | }; | ||
53 | |||
54 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | ||
55 | { | ||
56 | int virq; | ||
57 | |||
58 | if ((PCI_SLOT(dev->devfn) != PCI_IDSEL_CS5536) | ||
59 | && (PCI_SLOT(dev->devfn) < 32)) { | ||
60 | virq = irq_tab[slot][pin]; | ||
61 | printk(KERN_INFO "slot: %d, pin: %d, irq: %d\n", slot, pin, | ||
62 | virq + LOONGSON_IRQ_BASE); | ||
63 | if (virq != 0) | ||
64 | return LOONGSON_IRQ_BASE + virq; | ||
65 | else | ||
66 | return 0; | ||
67 | } else if (PCI_SLOT(dev->devfn) == PCI_IDSEL_CS5536) { /* cs5536 */ | ||
68 | switch (PCI_FUNC(dev->devfn)) { | ||
69 | case 2: | ||
70 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, | ||
71 | CS5536_IDE_INTR); | ||
72 | return CS5536_IDE_INTR; /* for IDE */ | ||
73 | case 3: | ||
74 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, | ||
75 | CS5536_ACC_INTR); | ||
76 | return CS5536_ACC_INTR; /* for AUDIO */ | ||
77 | case 4: /* for OHCI */ | ||
78 | case 5: /* for EHCI */ | ||
79 | case 6: /* for UDC */ | ||
80 | case 7: /* for OTG */ | ||
81 | pci_write_config_byte(dev, PCI_INTERRUPT_LINE, | ||
82 | CS5536_USB_INTR); | ||
83 | return CS5536_USB_INTR; | ||
84 | } | ||
85 | return dev->irq; | ||
86 | } else { | ||
87 | printk(KERN_INFO " strange pci slot number.\n"); | ||
88 | return 0; | ||
89 | } | ||
90 | } | ||
91 | |||
92 | /* Do platform specific device initialization at pci_enable_device() time */ | ||
93 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
94 | { | ||
95 | return 0; | ||
96 | } | ||
97 | |||
98 | /* CS5536 SPEC. fixup */ | ||
99 | static void __init loongson_cs5536_isa_fixup(struct pci_dev *pdev) | ||
100 | { | ||
101 | /* the uart1 and uart2 interrupt in PIC is enabled as default */ | ||
102 | pci_write_config_dword(pdev, PCI_UART1_INT_REG, 1); | ||
103 | pci_write_config_dword(pdev, PCI_UART2_INT_REG, 1); | ||
104 | } | ||
105 | |||
106 | static void __init loongson_cs5536_ide_fixup(struct pci_dev *pdev) | ||
107 | { | ||
108 | /* setting the mutex pin as IDE function */ | ||
109 | pci_write_config_dword(pdev, PCI_IDE_CFG_REG, | ||
110 | CS5536_IDE_FLASH_SIGNATURE); | ||
111 | } | ||
112 | |||
113 | static void __init loongson_cs5536_acc_fixup(struct pci_dev *pdev) | ||
114 | { | ||
115 | /* enable the AUDIO interrupt in PIC */ | ||
116 | pci_write_config_dword(pdev, PCI_ACC_INT_REG, 1); | ||
117 | |||
118 | pci_write_config_byte(pdev, PCI_LATENCY_TIMER, 0xc0); | ||
119 | } | ||
120 | |||
121 | static void __init loongson_cs5536_ohci_fixup(struct pci_dev *pdev) | ||
122 | { | ||
123 | /* enable the OHCI interrupt in PIC */ | ||
124 | /* THE OHCI, EHCI, UDC, OTG are shared with interrupt in PIC */ | ||
125 | pci_write_config_dword(pdev, PCI_OHCI_INT_REG, 1); | ||
126 | } | ||
127 | |||
128 | static void __init loongson_cs5536_ehci_fixup(struct pci_dev *pdev) | ||
129 | { | ||
130 | u32 hi, lo; | ||
131 | |||
132 | /* Serial short detect enable */ | ||
133 | _rdmsr(USB_MSR_REG(USB_CONFIG), &hi, &lo); | ||
134 | _wrmsr(USB_MSR_REG(USB_CONFIG), (1 << 1) | (1 << 2) | (1 << 3), lo); | ||
135 | |||
136 | /* setting the USB2.0 micro frame length */ | ||
137 | pci_write_config_dword(pdev, PCI_EHCI_FLADJ_REG, 0x2000); | ||
138 | } | ||
139 | |||
140 | static void __init loongson_nec_fixup(struct pci_dev *pdev) | ||
141 | { | ||
142 | unsigned int val; | ||
143 | |||
144 | pci_read_config_dword(pdev, 0xe0, &val); | ||
145 | /* Only 2 port be used */ | ||
146 | pci_write_config_dword(pdev, 0xe0, (val & ~3) | 0x2); | ||
147 | } | ||
148 | |||
149 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA, | ||
150 | loongson_cs5536_isa_fixup); | ||
151 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_OHC, | ||
152 | loongson_cs5536_ohci_fixup); | ||
153 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_EHC, | ||
154 | loongson_cs5536_ehci_fixup); | ||
155 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_AUDIO, | ||
156 | loongson_cs5536_acc_fixup); | ||
157 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_IDE, | ||
158 | loongson_cs5536_ide_fixup); | ||
159 | DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NEC, PCI_DEVICE_ID_NEC_USB, | ||
160 | loongson_nec_fixup); | ||
diff --git a/arch/mips/pci/ops-bonito64.c b/arch/mips/pci/ops-bonito64.c index 54e55e7a2431..1b3e03f20c54 100644 --- a/arch/mips/pci/ops-bonito64.c +++ b/arch/mips/pci/ops-bonito64.c | |||
@@ -29,13 +29,8 @@ | |||
29 | #define PCI_ACCESS_READ 0 | 29 | #define PCI_ACCESS_READ 0 |
30 | #define PCI_ACCESS_WRITE 1 | 30 | #define PCI_ACCESS_WRITE 1 |
31 | 31 | ||
32 | #ifdef CONFIG_LEMOTE_FULOONG2E | ||
33 | #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(BONITO_PCICFG_BASE | (offset)) | ||
34 | #define ID_SEL_BEGIN 11 | ||
35 | #else | ||
36 | #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset)) | 32 | #define CFG_SPACE_REG(offset) (void *)CKSEG1ADDR(_pcictrl_bonito_pcicfg + (offset)) |
37 | #define ID_SEL_BEGIN 10 | 33 | #define ID_SEL_BEGIN 10 |
38 | #endif | ||
39 | #define MAX_DEV_NUM (31 - ID_SEL_BEGIN) | 34 | #define MAX_DEV_NUM (31 - ID_SEL_BEGIN) |
40 | 35 | ||
41 | 36 | ||
@@ -77,10 +72,8 @@ static int bonito64_pcibios_config_access(unsigned char access_type, | |||
77 | addrp = CFG_SPACE_REG(addr & 0xffff); | 72 | addrp = CFG_SPACE_REG(addr & 0xffff); |
78 | if (access_type == PCI_ACCESS_WRITE) { | 73 | if (access_type == PCI_ACCESS_WRITE) { |
79 | writel(cpu_to_le32(*data), addrp); | 74 | writel(cpu_to_le32(*data), addrp); |
80 | #ifndef CONFIG_LEMOTE_FULOONG2E | ||
81 | /* Wait till done */ | 75 | /* Wait till done */ |
82 | while (BONITO_PCIMSTAT & 0xF); | 76 | while (BONITO_PCIMSTAT & 0xF); |
83 | #endif | ||
84 | } else { | 77 | } else { |
85 | *data = le32_to_cpu(readl(addrp)); | 78 | *data = le32_to_cpu(readl(addrp)); |
86 | } | 79 | } |
diff --git a/arch/mips/pci/ops-loongson2.c b/arch/mips/pci/ops-loongson2.c new file mode 100644 index 000000000000..aa5d3da27212 --- /dev/null +++ b/arch/mips/pci/ops-loongson2.c | |||
@@ -0,0 +1,208 @@ | |||
1 | /* | ||
2 | * fuloong2e specific PCI support. | ||
3 | * | ||
4 | * Copyright (C) 1999, 2000, 2004 MIPS Technologies, Inc. | ||
5 | * All rights reserved. | ||
6 | * Authors: Carsten Langgaard <carstenl@mips.com> | ||
7 | * Maciej W. Rozycki <macro@mips.com> | ||
8 | * | ||
9 | * Copyright (C) 2009 Lemote Inc. | ||
10 | * Author: Wu Zhangjin <wuzj@lemote.com> | ||
11 | * | ||
12 | * This program is free software; you can distribute it and/or modify it | ||
13 | * under the terms of the GNU General Public License (Version 2) as | ||
14 | * published by the Free Software Foundation. | ||
15 | */ | ||
16 | #include <linux/types.h> | ||
17 | #include <linux/pci.h> | ||
18 | #include <linux/kernel.h> | ||
19 | #include <linux/init.h> | ||
20 | |||
21 | #include <loongson.h> | ||
22 | |||
23 | #ifdef CONFIG_CS5536 | ||
24 | #include <cs5536/cs5536_pci.h> | ||
25 | #include <cs5536/cs5536.h> | ||
26 | #endif | ||
27 | |||
28 | #define PCI_ACCESS_READ 0 | ||
29 | #define PCI_ACCESS_WRITE 1 | ||
30 | |||
31 | #define CFG_SPACE_REG(offset) \ | ||
32 | (void *)CKSEG1ADDR(LOONGSON_PCICFG_BASE | (offset)) | ||
33 | #define ID_SEL_BEGIN 11 | ||
34 | #define MAX_DEV_NUM (31 - ID_SEL_BEGIN) | ||
35 | |||
36 | |||
37 | static int loongson_pcibios_config_access(unsigned char access_type, | ||
38 | struct pci_bus *bus, | ||
39 | unsigned int devfn, int where, | ||
40 | u32 *data) | ||
41 | { | ||
42 | u32 busnum = bus->number; | ||
43 | u32 addr, type; | ||
44 | u32 dummy; | ||
45 | void *addrp; | ||
46 | int device = PCI_SLOT(devfn); | ||
47 | int function = PCI_FUNC(devfn); | ||
48 | int reg = where & ~3; | ||
49 | |||
50 | if (busnum == 0) { | ||
51 | /* board-specific part,currently,only fuloong2f,yeeloong2f | ||
52 | * use CS5536, fuloong2e use via686b, gdium has no | ||
53 | * south bridge | ||
54 | */ | ||
55 | #ifdef CONFIG_CS5536 | ||
56 | /* cs5536_pci_conf_read4/write4() will call _rdmsr/_wrmsr() to | ||
57 | * access the regsters PCI_MSR_ADDR, PCI_MSR_DATA_LO, | ||
58 | * PCI_MSR_DATA_HI, which is bigger than PCI_MSR_CTRL, so, it | ||
59 | * will not go this branch, but the others. so, no calling dead | ||
60 | * loop here. | ||
61 | */ | ||
62 | if ((PCI_IDSEL_CS5536 == device) && (reg < PCI_MSR_CTRL)) { | ||
63 | switch (access_type) { | ||
64 | case PCI_ACCESS_READ: | ||
65 | *data = cs5536_pci_conf_read4(function, reg); | ||
66 | break; | ||
67 | case PCI_ACCESS_WRITE: | ||
68 | cs5536_pci_conf_write4(function, reg, *data); | ||
69 | break; | ||
70 | } | ||
71 | return 0; | ||
72 | } | ||
73 | #endif | ||
74 | /* Type 0 configuration for onboard PCI bus */ | ||
75 | if (device > MAX_DEV_NUM) | ||
76 | return -1; | ||
77 | |||
78 | addr = (1 << (device + ID_SEL_BEGIN)) | (function << 8) | reg; | ||
79 | type = 0; | ||
80 | } else { | ||
81 | /* Type 1 configuration for offboard PCI bus */ | ||
82 | addr = (busnum << 16) | (device << 11) | (function << 8) | reg; | ||
83 | type = 0x10000; | ||
84 | } | ||
85 | |||
86 | /* Clear aborts */ | ||
87 | LOONGSON_PCICMD |= LOONGSON_PCICMD_MABORT_CLR | \ | ||
88 | LOONGSON_PCICMD_MTABORT_CLR; | ||
89 | |||
90 | LOONGSON_PCIMAP_CFG = (addr >> 16) | type; | ||
91 | |||
92 | /* Flush Bonito register block */ | ||
93 | dummy = LOONGSON_PCIMAP_CFG; | ||
94 | mmiowb(); | ||
95 | |||
96 | addrp = CFG_SPACE_REG(addr & 0xffff); | ||
97 | if (access_type == PCI_ACCESS_WRITE) | ||
98 | writel(cpu_to_le32(*data), addrp); | ||
99 | else | ||
100 | *data = le32_to_cpu(readl(addrp)); | ||
101 | |||
102 | /* Detect Master/Target abort */ | ||
103 | if (LOONGSON_PCICMD & (LOONGSON_PCICMD_MABORT_CLR | | ||
104 | LOONGSON_PCICMD_MTABORT_CLR)) { | ||
105 | /* Error occurred */ | ||
106 | |||
107 | /* Clear bits */ | ||
108 | LOONGSON_PCICMD |= (LOONGSON_PCICMD_MABORT_CLR | | ||
109 | LOONGSON_PCICMD_MTABORT_CLR); | ||
110 | |||
111 | return -1; | ||
112 | } | ||
113 | |||
114 | return 0; | ||
115 | |||
116 | } | ||
117 | |||
118 | |||
119 | /* | ||
120 | * We can't address 8 and 16 bit words directly. Instead we have to | ||
121 | * read/write a 32bit word and mask/modify the data we actually want. | ||
122 | */ | ||
123 | static int loongson_pcibios_read(struct pci_bus *bus, unsigned int devfn, | ||
124 | int where, int size, u32 *val) | ||
125 | { | ||
126 | u32 data = 0; | ||
127 | |||
128 | if ((size == 2) && (where & 1)) | ||
129 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
130 | else if ((size == 4) && (where & 3)) | ||
131 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
132 | |||
133 | if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, where, | ||
134 | &data)) | ||
135 | return -1; | ||
136 | |||
137 | if (size == 1) | ||
138 | *val = (data >> ((where & 3) << 3)) & 0xff; | ||
139 | else if (size == 2) | ||
140 | *val = (data >> ((where & 3) << 3)) & 0xffff; | ||
141 | else | ||
142 | *val = data; | ||
143 | |||
144 | return PCIBIOS_SUCCESSFUL; | ||
145 | } | ||
146 | |||
147 | static int loongson_pcibios_write(struct pci_bus *bus, unsigned int devfn, | ||
148 | int where, int size, u32 val) | ||
149 | { | ||
150 | u32 data = 0; | ||
151 | |||
152 | if ((size == 2) && (where & 1)) | ||
153 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
154 | else if ((size == 4) && (where & 3)) | ||
155 | return PCIBIOS_BAD_REGISTER_NUMBER; | ||
156 | |||
157 | if (size == 4) | ||
158 | data = val; | ||
159 | else { | ||
160 | if (loongson_pcibios_config_access(PCI_ACCESS_READ, bus, devfn, | ||
161 | where, &data)) | ||
162 | return -1; | ||
163 | |||
164 | if (size == 1) | ||
165 | data = (data & ~(0xff << ((where & 3) << 3))) | | ||
166 | (val << ((where & 3) << 3)); | ||
167 | else if (size == 2) | ||
168 | data = (data & ~(0xffff << ((where & 3) << 3))) | | ||
169 | (val << ((where & 3) << 3)); | ||
170 | } | ||
171 | |||
172 | if (loongson_pcibios_config_access(PCI_ACCESS_WRITE, bus, devfn, where, | ||
173 | &data)) | ||
174 | return -1; | ||
175 | |||
176 | return PCIBIOS_SUCCESSFUL; | ||
177 | } | ||
178 | |||
179 | struct pci_ops loongson_pci_ops = { | ||
180 | .read = loongson_pcibios_read, | ||
181 | .write = loongson_pcibios_write | ||
182 | }; | ||
183 | |||
184 | #ifdef CONFIG_CS5536 | ||
185 | void _rdmsr(u32 msr, u32 *hi, u32 *lo) | ||
186 | { | ||
187 | struct pci_bus bus = { | ||
188 | .number = PCI_BUS_CS5536 | ||
189 | }; | ||
190 | u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); | ||
191 | loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); | ||
192 | loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); | ||
193 | loongson_pcibios_read(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); | ||
194 | } | ||
195 | EXPORT_SYMBOL(_rdmsr); | ||
196 | |||
197 | void _wrmsr(u32 msr, u32 hi, u32 lo) | ||
198 | { | ||
199 | struct pci_bus bus = { | ||
200 | .number = PCI_BUS_CS5536 | ||
201 | }; | ||
202 | u32 devfn = PCI_DEVFN(PCI_IDSEL_CS5536, 0); | ||
203 | loongson_pcibios_write(&bus, devfn, PCI_MSR_ADDR, 4, msr); | ||
204 | loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_LO, 4, lo); | ||
205 | loongson_pcibios_write(&bus, devfn, PCI_MSR_DATA_HI, 4, hi); | ||
206 | } | ||
207 | EXPORT_SYMBOL(_wrmsr); | ||
208 | #endif | ||
diff --git a/arch/mips/pci/pci-excite.c b/arch/mips/pci/pci-excite.c deleted file mode 100644 index 8a56876afcc6..000000000000 --- a/arch/mips/pci/pci-excite.c +++ /dev/null | |||
@@ -1,149 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2004 by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | ||
4 | * Based on the PMC-Sierra Yosemite board support by Ralf Baechle. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/kernel.h> | ||
22 | #include <linux/types.h> | ||
23 | #include <linux/pci.h> | ||
24 | #include <linux/bitops.h> | ||
25 | #include <asm/rm9k-ocd.h> | ||
26 | #include <excite.h> | ||
27 | |||
28 | |||
29 | extern struct pci_ops titan_pci_ops; | ||
30 | |||
31 | |||
32 | static struct resource | ||
33 | mem_resource = { | ||
34 | .name = "PCI memory", | ||
35 | .start = EXCITE_PHYS_PCI_MEM, | ||
36 | .end = EXCITE_PHYS_PCI_MEM + EXCITE_SIZE_PCI_MEM - 1, | ||
37 | .flags = IORESOURCE_MEM | ||
38 | }, | ||
39 | io_resource = { | ||
40 | .name = "PCI I/O", | ||
41 | .start = EXCITE_PHYS_PCI_IO, | ||
42 | .end = EXCITE_PHYS_PCI_IO + EXCITE_SIZE_PCI_IO - 1, | ||
43 | .flags = IORESOURCE_IO | ||
44 | }; | ||
45 | |||
46 | |||
47 | static struct pci_controller bx_controller = { | ||
48 | .pci_ops = &titan_pci_ops, | ||
49 | .mem_resource = &mem_resource, | ||
50 | .mem_offset = 0x00000000UL, | ||
51 | .io_resource = &io_resource, | ||
52 | .io_offset = 0x00000000UL | ||
53 | }; | ||
54 | |||
55 | |||
56 | static char | ||
57 | iopage_failed[] __initdata = "Cannot allocate PCI I/O page", | ||
58 | modebits_no_pci[] __initdata = "PCI is not configured in mode bits"; | ||
59 | |||
60 | #define RM9000x2_OCD_HTSC 0x0604 | ||
61 | #define RM9000x2_OCD_HTBHL 0x060c | ||
62 | #define RM9000x2_OCD_PCIHRST 0x078c | ||
63 | |||
64 | #define RM9K_OCD_MODEBIT1 0x00d4 /* (MODEBIT1) Mode Bit 1 */ | ||
65 | #define RM9K_OCD_CPHDCR 0x00f4 /* CPU-PCI/HT Data Control. */ | ||
66 | |||
67 | #define PCISC_FB2B 0x00000200 | ||
68 | #define PCISC_MWICG 0x00000010 | ||
69 | #define PCISC_EMC 0x00000004 | ||
70 | #define PCISC_ERMA 0x00000002 | ||
71 | |||
72 | |||
73 | |||
74 | static int __init basler_excite_pci_setup(void) | ||
75 | { | ||
76 | const unsigned int fullbars = memsize / (256 << 20); | ||
77 | unsigned int i; | ||
78 | |||
79 | /* Check modebits to see if PCI is really enabled. */ | ||
80 | if (!((ocd_readl(RM9K_OCD_MODEBIT1) >> (47-32)) & 0x1)) | ||
81 | panic(modebits_no_pci); | ||
82 | |||
83 | if (NULL == request_mem_region(EXCITE_PHYS_PCI_IO, EXCITE_SIZE_PCI_IO, | ||
84 | "Memory-mapped PCI I/O page")) | ||
85 | panic(iopage_failed); | ||
86 | |||
87 | /* Enable PCI 0 as master for config cycles */ | ||
88 | ocd_writel(PCISC_EMC | PCISC_ERMA, RM9000x2_OCD_HTSC); | ||
89 | |||
90 | |||
91 | /* Set up latency timer */ | ||
92 | ocd_writel(0x8008, RM9000x2_OCD_HTBHL); | ||
93 | |||
94 | /* Setup host IO and Memory space */ | ||
95 | ocd_writel((EXCITE_PHYS_PCI_IO >> 4) | 1, LKB7); | ||
96 | ocd_writel(((EXCITE_SIZE_PCI_IO >> 4) & 0x7fffff00) - 0x100, LKM7); | ||
97 | ocd_writel((EXCITE_PHYS_PCI_MEM >> 4) | 1, LKB8); | ||
98 | ocd_writel(((EXCITE_SIZE_PCI_MEM >> 4) & 0x7fffff00) - 0x100, LKM8); | ||
99 | |||
100 | /* Set up PCI BARs to map all installed memory */ | ||
101 | for (i = 0; i < 6; i++) { | ||
102 | const unsigned int bar = 0x610 + i * 4; | ||
103 | |||
104 | if (i < fullbars) { | ||
105 | ocd_writel(0x10000000 * i, bar); | ||
106 | ocd_writel(0x01000000 * i, bar + 0x140); | ||
107 | ocd_writel(0x0ffff029, bar + 0x100); | ||
108 | continue; | ||
109 | } | ||
110 | |||
111 | if (i == fullbars) { | ||
112 | int o; | ||
113 | u32 mask; | ||
114 | |||
115 | const unsigned long rem = memsize - i * 0x10000000; | ||
116 | if (!rem) { | ||
117 | ocd_writel(0x00000000, bar + 0x100); | ||
118 | continue; | ||
119 | } | ||
120 | |||
121 | o = ffs(rem) - 1; | ||
122 | if (rem & ~(0x1 << o)) | ||
123 | o++; | ||
124 | mask = ((0x1 << o) & 0x0ffff000) - 0x1000; | ||
125 | ocd_writel(0x10000000 * i, bar); | ||
126 | ocd_writel(0x01000000 * i, bar + 0x140); | ||
127 | ocd_writel(0x00000029 | mask, bar + 0x100); | ||
128 | continue; | ||
129 | } | ||
130 | |||
131 | ocd_writel(0x00000000, bar + 0x100); | ||
132 | } | ||
133 | |||
134 | /* Finally, enable the PCI interrupt */ | ||
135 | #if USB_IRQ > 7 | ||
136 | set_c0_intcontrol(1 << USB_IRQ); | ||
137 | #else | ||
138 | set_c0_status(1 << (USB_IRQ + 8)); | ||
139 | #endif | ||
140 | |||
141 | ioport_resource.start = EXCITE_PHYS_PCI_IO; | ||
142 | ioport_resource.end = EXCITE_PHYS_PCI_IO + EXCITE_SIZE_PCI_IO - 1; | ||
143 | set_io_port_base((unsigned long) ioremap_nocache(EXCITE_PHYS_PCI_IO, EXCITE_SIZE_PCI_IO)); | ||
144 | register_pci_controller(&bx_controller); | ||
145 | return 0; | ||
146 | } | ||
147 | |||
148 | |||
149 | arch_initcall(basler_excite_pci_setup); | ||
diff --git a/arch/mips/powertv/Kconfig b/arch/mips/powertv/Kconfig new file mode 100644 index 000000000000..ff0e7e3e6954 --- /dev/null +++ b/arch/mips/powertv/Kconfig | |||
@@ -0,0 +1,21 @@ | |||
1 | source "arch/mips/powertv/asic/Kconfig" | ||
2 | |||
3 | config BOOTLOADER_DRIVER | ||
4 | bool "PowerTV Bootloader Driver Support" | ||
5 | default n | ||
6 | depends on POWERTV | ||
7 | help | ||
8 | Use this option if you want to load bootloader driver. | ||
9 | |||
10 | config BOOTLOADER_FAMILY | ||
11 | string "POWERTV Bootloader Family string" | ||
12 | default "85" | ||
13 | depends on POWERTV && !BOOTLOADER_DRIVER | ||
14 | help | ||
15 | This value should be specified when the bootloader driver is disabled | ||
16 | and must be exactly two characters long. Families supported are: | ||
17 | R1 - RNG-100 R2 - RNG-200 | ||
18 | A1 - Class A B1 - Class B | ||
19 | E1 - Class E F1 - Class F | ||
20 | 44 - 45xx 46 - 46xx | ||
21 | 85 - 85xx 86 - 86xx | ||
diff --git a/arch/mips/powertv/Makefile b/arch/mips/powertv/Makefile new file mode 100644 index 000000000000..2c516718affe --- /dev/null +++ b/arch/mips/powertv/Makefile | |||
@@ -0,0 +1,28 @@ | |||
1 | # | ||
2 | # Carsten Langgaard, carstenl@mips.com | ||
3 | # Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | # | ||
5 | # Carsten Langgaard, carstenl@mips.com | ||
6 | # Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | ||
7 | # Portions copyright (C) 2009 Cisco Systems, Inc. | ||
8 | # | ||
9 | # This program is free software; you can distribute it and/or modify it | ||
10 | # under the terms of the GNU General Public License (Version 2) as | ||
11 | # published by the Free Software Foundation. | ||
12 | # | ||
13 | # This program is distributed in the hope it will be useful, but WITHOUT | ||
14 | # ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
15 | # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
16 | # for more details. | ||
17 | # | ||
18 | # You should have received a copy of the GNU General Public License along | ||
19 | # with this program; if not, write to the Free Software Foundation, Inc., | ||
20 | # 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
21 | # | ||
22 | # Makefile for the Cisco PowerTV-specific kernel interface routines | ||
23 | # under Linux. | ||
24 | # | ||
25 | |||
26 | obj-y += cmdline.o init.o memory.o reset.o time.o powertv_setup.o asic/ pci/ | ||
27 | |||
28 | EXTRA_CFLAGS += -Wall -Werror | ||
diff --git a/arch/mips/powertv/asic/Kconfig b/arch/mips/powertv/asic/Kconfig new file mode 100644 index 000000000000..2016bfe94d66 --- /dev/null +++ b/arch/mips/powertv/asic/Kconfig | |||
@@ -0,0 +1,28 @@ | |||
1 | config MIN_RUNTIME_RESOURCES | ||
2 | bool "Support for minimum runtime resources" | ||
3 | default n | ||
4 | depends on POWERTV | ||
5 | help | ||
6 | Enables support for minimizing the number of (SA asic) runtime | ||
7 | resources that are preallocated by the kernel. | ||
8 | |||
9 | config MIN_RUNTIME_DOCSIS | ||
10 | bool "Support for minimum DOCSIS resource" | ||
11 | default y | ||
12 | depends on MIN_RUNTIME_RESOURCES | ||
13 | help | ||
14 | Enables support for the preallocated DOCSIS resource. | ||
15 | |||
16 | config MIN_RUNTIME_PMEM | ||
17 | bool "Support for minimum PMEM resource" | ||
18 | default y | ||
19 | depends on MIN_RUNTIME_RESOURCES | ||
20 | help | ||
21 | Enables support for the preallocated Memory resource. | ||
22 | |||
23 | config MIN_RUNTIME_TFTP | ||
24 | bool "Support for minimum TFTP resource" | ||
25 | default y | ||
26 | depends on MIN_RUNTIME_RESOURCES | ||
27 | help | ||
28 | Enables support for the preallocated TFTP resource. | ||
diff --git a/arch/mips/powertv/asic/Makefile b/arch/mips/powertv/asic/Makefile new file mode 100644 index 000000000000..bebfdcff0443 --- /dev/null +++ b/arch/mips/powertv/asic/Makefile | |||
@@ -0,0 +1,23 @@ | |||
1 | # | ||
2 | # Copyright (C) 2009 Scientific-Atlanta, Inc. | ||
3 | # | ||
4 | # This program is free software; you can redistribute it and/or modify | ||
5 | # it under the terms of the GNU General Public License as published by | ||
6 | # the Free Software Foundation; either version 2 of the License, or | ||
7 | # (at your option) any later version. | ||
8 | # | ||
9 | # This program is distributed in the hope that it will be useful, | ||
10 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | # GNU General Public License for more details. | ||
13 | # | ||
14 | # You should have received a copy of the GNU General Public License | ||
15 | # along with this program; if not, write to the Free Software | ||
16 | # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | # | ||
18 | |||
19 | obj-y += asic-calliope.o asic-cronus.o asic-zeus.o asic_devices.o asic_int.o \ | ||
20 | irq_asic.o prealloc-calliope.o prealloc-cronus.o \ | ||
21 | prealloc-cronuslite.o prealloc-zeus.o | ||
22 | |||
23 | EXTRA_CFLAGS += -Wall -Werror | ||
diff --git a/arch/mips/powertv/asic/asic-calliope.c b/arch/mips/powertv/asic/asic-calliope.c new file mode 100644 index 000000000000..03d3884c6270 --- /dev/null +++ b/arch/mips/powertv/asic/asic-calliope.c | |||
@@ -0,0 +1,98 @@ | |||
1 | /* | ||
2 | * Locations of devices in the Calliope ASIC. | ||
3 | * | ||
4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: Ken Eppinett | ||
21 | * David Schleef <ds@schleef.org> | ||
22 | * | ||
23 | * Description: Defines the platform resources for the SA settop. | ||
24 | */ | ||
25 | |||
26 | #include <asm/mach-powertv/asic.h> | ||
27 | |||
28 | const struct register_map calliope_register_map = { | ||
29 | .eic_slow0_strt_add = 0x800000, | ||
30 | .eic_cfg_bits = 0x800038, | ||
31 | .eic_ready_status = 0x80004c, | ||
32 | |||
33 | .chipver3 = 0xA00800, | ||
34 | .chipver2 = 0xA00804, | ||
35 | .chipver1 = 0xA00808, | ||
36 | .chipver0 = 0xA0080c, | ||
37 | |||
38 | /* The registers of IRBlaster */ | ||
39 | .uart1_intstat = 0xA01800, | ||
40 | .uart1_inten = 0xA01804, | ||
41 | .uart1_config1 = 0xA01808, | ||
42 | .uart1_config2 = 0xA0180C, | ||
43 | .uart1_divisorhi = 0xA01810, | ||
44 | .uart1_divisorlo = 0xA01814, | ||
45 | .uart1_data = 0xA01818, | ||
46 | .uart1_status = 0xA0181C, | ||
47 | |||
48 | .int_stat_3 = 0xA02800, | ||
49 | .int_stat_2 = 0xA02804, | ||
50 | .int_stat_1 = 0xA02808, | ||
51 | .int_stat_0 = 0xA0280c, | ||
52 | .int_config = 0xA02810, | ||
53 | .int_int_scan = 0xA02818, | ||
54 | .ien_int_3 = 0xA02830, | ||
55 | .ien_int_2 = 0xA02834, | ||
56 | .ien_int_1 = 0xA02838, | ||
57 | .ien_int_0 = 0xA0283c, | ||
58 | .int_level_3_3 = 0xA02880, | ||
59 | .int_level_3_2 = 0xA02884, | ||
60 | .int_level_3_1 = 0xA02888, | ||
61 | .int_level_3_0 = 0xA0288c, | ||
62 | .int_level_2_3 = 0xA02890, | ||
63 | .int_level_2_2 = 0xA02894, | ||
64 | .int_level_2_1 = 0xA02898, | ||
65 | .int_level_2_0 = 0xA0289c, | ||
66 | .int_level_1_3 = 0xA028a0, | ||
67 | .int_level_1_2 = 0xA028a4, | ||
68 | .int_level_1_1 = 0xA028a8, | ||
69 | .int_level_1_0 = 0xA028ac, | ||
70 | .int_level_0_3 = 0xA028b0, | ||
71 | .int_level_0_2 = 0xA028b4, | ||
72 | .int_level_0_1 = 0xA028b8, | ||
73 | .int_level_0_0 = 0xA028bc, | ||
74 | .int_docsis_en = 0xA028F4, | ||
75 | |||
76 | .mips_pll_setup = 0x980000, | ||
77 | .usb_fs = 0x980030, /* -default 72800028- */ | ||
78 | .test_bus = 0x9800CC, | ||
79 | .crt_spare = 0x9800d4, | ||
80 | .usb2_ohci_int_mask = 0x9A000c, | ||
81 | .usb2_strap = 0x9A0014, | ||
82 | .ehci_hcapbase = 0x9BFE00, | ||
83 | .ohci_hc_revision = 0x9BFC00, | ||
84 | .bcm1_bs_lmi_steer = 0x9E0004, | ||
85 | .usb2_control = 0x9E0054, | ||
86 | .usb2_stbus_obc = 0x9BFF00, | ||
87 | .usb2_stbus_mess_size = 0x9BFF04, | ||
88 | .usb2_stbus_chunk_size = 0x9BFF08, | ||
89 | |||
90 | .pcie_regs = 0x000000, /* -doesn't exist- */ | ||
91 | .tim_ch = 0xA02C10, | ||
92 | .tim_cl = 0xA02C14, | ||
93 | .gpio_dout = 0xA02c20, | ||
94 | .gpio_din = 0xA02c24, | ||
95 | .gpio_dir = 0xA02c2C, | ||
96 | .watchdog = 0xA02c30, | ||
97 | .front_panel = 0x000000, /* -not used- */ | ||
98 | }; | ||
diff --git a/arch/mips/powertv/asic/asic-cronus.c b/arch/mips/powertv/asic/asic-cronus.c new file mode 100644 index 000000000000..5f4589c9f83d --- /dev/null +++ b/arch/mips/powertv/asic/asic-cronus.c | |||
@@ -0,0 +1,98 @@ | |||
1 | /* | ||
2 | * Locations of devices in the Cronus ASIC | ||
3 | * | ||
4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: Ken Eppinett | ||
21 | * David Schleef <ds@schleef.org> | ||
22 | * | ||
23 | * Description: Defines the platform resources for the SA settop. | ||
24 | */ | ||
25 | |||
26 | #include <asm/mach-powertv/asic.h> | ||
27 | |||
28 | const struct register_map cronus_register_map = { | ||
29 | .eic_slow0_strt_add = 0x000000, | ||
30 | .eic_cfg_bits = 0x000038, | ||
31 | .eic_ready_status = 0x00004C, | ||
32 | |||
33 | .chipver3 = 0x2A0800, | ||
34 | .chipver2 = 0x2A0804, | ||
35 | .chipver1 = 0x2A0808, | ||
36 | .chipver0 = 0x2A080C, | ||
37 | |||
38 | /* The registers of IRBlaster */ | ||
39 | .uart1_intstat = 0x2A1800, | ||
40 | .uart1_inten = 0x2A1804, | ||
41 | .uart1_config1 = 0x2A1808, | ||
42 | .uart1_config2 = 0x2A180C, | ||
43 | .uart1_divisorhi = 0x2A1810, | ||
44 | .uart1_divisorlo = 0x2A1814, | ||
45 | .uart1_data = 0x2A1818, | ||
46 | .uart1_status = 0x2A181C, | ||
47 | |||
48 | .int_stat_3 = 0x2A2800, | ||
49 | .int_stat_2 = 0x2A2804, | ||
50 | .int_stat_1 = 0x2A2808, | ||
51 | .int_stat_0 = 0x2A280C, | ||
52 | .int_config = 0x2A2810, | ||
53 | .int_int_scan = 0x2A2818, | ||
54 | .ien_int_3 = 0x2A2830, | ||
55 | .ien_int_2 = 0x2A2834, | ||
56 | .ien_int_1 = 0x2A2838, | ||
57 | .ien_int_0 = 0x2A283C, | ||
58 | .int_level_3_3 = 0x2A2880, | ||
59 | .int_level_3_2 = 0x2A2884, | ||
60 | .int_level_3_1 = 0x2A2888, | ||
61 | .int_level_3_0 = 0x2A288C, | ||
62 | .int_level_2_3 = 0x2A2890, | ||
63 | .int_level_2_2 = 0x2A2894, | ||
64 | .int_level_2_1 = 0x2A2898, | ||
65 | .int_level_2_0 = 0x2A289C, | ||
66 | .int_level_1_3 = 0x2A28A0, | ||
67 | .int_level_1_2 = 0x2A28A4, | ||
68 | .int_level_1_1 = 0x2A28A8, | ||
69 | .int_level_1_0 = 0x2A28AC, | ||
70 | .int_level_0_3 = 0x2A28B0, | ||
71 | .int_level_0_2 = 0x2A28B4, | ||
72 | .int_level_0_1 = 0x2A28B8, | ||
73 | .int_level_0_0 = 0x2A28BC, | ||
74 | .int_docsis_en = 0x2A28F4, | ||
75 | |||
76 | .mips_pll_setup = 0x1C0000, | ||
77 | .usb_fs = 0x1C0018, | ||
78 | .test_bus = 0x1C00CC, | ||
79 | .crt_spare = 0x1c00d4, | ||
80 | .usb2_ohci_int_mask = 0x20000C, | ||
81 | .usb2_strap = 0x200014, | ||
82 | .ehci_hcapbase = 0x21FE00, | ||
83 | .ohci_hc_revision = 0x1E0000, | ||
84 | .bcm1_bs_lmi_steer = 0x2E0008, | ||
85 | .usb2_control = 0x2E004C, | ||
86 | .usb2_stbus_obc = 0x21FF00, | ||
87 | .usb2_stbus_mess_size = 0x21FF04, | ||
88 | .usb2_stbus_chunk_size = 0x21FF08, | ||
89 | |||
90 | .pcie_regs = 0x220000, | ||
91 | .tim_ch = 0x2A2C10, | ||
92 | .tim_cl = 0x2A2C14, | ||
93 | .gpio_dout = 0x2A2C20, | ||
94 | .gpio_din = 0x2A2C24, | ||
95 | .gpio_dir = 0x2A2C2C, | ||
96 | .watchdog = 0x2A2C30, | ||
97 | .front_panel = 0x2A3800, | ||
98 | }; | ||
diff --git a/arch/mips/powertv/asic/asic-zeus.c b/arch/mips/powertv/asic/asic-zeus.c new file mode 100644 index 000000000000..1469daab920e --- /dev/null +++ b/arch/mips/powertv/asic/asic-zeus.c | |||
@@ -0,0 +1,98 @@ | |||
1 | /* | ||
2 | * Locations of devices in the Zeus ASIC | ||
3 | * | ||
4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: Ken Eppinett | ||
21 | * David Schleef <ds@schleef.org> | ||
22 | * | ||
23 | * Description: Defines the platform resources for the SA settop. | ||
24 | */ | ||
25 | |||
26 | #include <asm/mach-powertv/asic.h> | ||
27 | |||
28 | const struct register_map zeus_register_map = { | ||
29 | .eic_slow0_strt_add = 0x000000, | ||
30 | .eic_cfg_bits = 0x000038, | ||
31 | .eic_ready_status = 0x00004c, | ||
32 | |||
33 | .chipver3 = 0x280800, | ||
34 | .chipver2 = 0x280804, | ||
35 | .chipver1 = 0x280808, | ||
36 | .chipver0 = 0x28080c, | ||
37 | |||
38 | /* The registers of IRBlaster */ | ||
39 | .uart1_intstat = 0x281800, | ||
40 | .uart1_inten = 0x281804, | ||
41 | .uart1_config1 = 0x281808, | ||
42 | .uart1_config2 = 0x28180C, | ||
43 | .uart1_divisorhi = 0x281810, | ||
44 | .uart1_divisorlo = 0x281814, | ||
45 | .uart1_data = 0x281818, | ||
46 | .uart1_status = 0x28181C, | ||
47 | |||
48 | .int_stat_3 = 0x282800, | ||
49 | .int_stat_2 = 0x282804, | ||
50 | .int_stat_1 = 0x282808, | ||
51 | .int_stat_0 = 0x28280c, | ||
52 | .int_config = 0x282810, | ||
53 | .int_int_scan = 0x282818, | ||
54 | .ien_int_3 = 0x282830, | ||
55 | .ien_int_2 = 0x282834, | ||
56 | .ien_int_1 = 0x282838, | ||
57 | .ien_int_0 = 0x28283c, | ||
58 | .int_level_3_3 = 0x282880, | ||
59 | .int_level_3_2 = 0x282884, | ||
60 | .int_level_3_1 = 0x282888, | ||
61 | .int_level_3_0 = 0x28288c, | ||
62 | .int_level_2_3 = 0x282890, | ||
63 | .int_level_2_2 = 0x282894, | ||
64 | .int_level_2_1 = 0x282898, | ||
65 | .int_level_2_0 = 0x28289c, | ||
66 | .int_level_1_3 = 0x2828a0, | ||
67 | .int_level_1_2 = 0x2828a4, | ||
68 | .int_level_1_1 = 0x2828a8, | ||
69 | .int_level_1_0 = 0x2828ac, | ||
70 | .int_level_0_3 = 0x2828b0, | ||
71 | .int_level_0_2 = 0x2828b4, | ||
72 | .int_level_0_1 = 0x2828b8, | ||
73 | .int_level_0_0 = 0x2828bc, | ||
74 | .int_docsis_en = 0x2828F4, | ||
75 | |||
76 | .mips_pll_setup = 0x1a0000, | ||
77 | .usb_fs = 0x1a0018, | ||
78 | .test_bus = 0x1a0238, | ||
79 | .crt_spare = 0x1a0090, | ||
80 | .usb2_ohci_int_mask = 0x1e000c, | ||
81 | .usb2_strap = 0x1e0014, | ||
82 | .ehci_hcapbase = 0x1FFE00, | ||
83 | .ohci_hc_revision = 0x1FFC00, | ||
84 | .bcm1_bs_lmi_steer = 0x2C0008, | ||
85 | .usb2_control = 0x2c01a0, | ||
86 | .usb2_stbus_obc = 0x1FFF00, | ||
87 | .usb2_stbus_mess_size = 0x1FFF04, | ||
88 | .usb2_stbus_chunk_size = 0x1FFF08, | ||
89 | |||
90 | .pcie_regs = 0x200000, | ||
91 | .tim_ch = 0x282C10, | ||
92 | .tim_cl = 0x282C14, | ||
93 | .gpio_dout = 0x282c20, | ||
94 | .gpio_din = 0x282c24, | ||
95 | .gpio_dir = 0x282c2C, | ||
96 | .watchdog = 0x282c30, | ||
97 | .front_panel = 0x283800, | ||
98 | }; | ||
diff --git a/arch/mips/powertv/asic/asic_devices.c b/arch/mips/powertv/asic/asic_devices.c new file mode 100644 index 000000000000..bae82880b6b5 --- /dev/null +++ b/arch/mips/powertv/asic/asic_devices.c | |||
@@ -0,0 +1,787 @@ | |||
1 | /* | ||
2 | * ASIC Device List Intialization | ||
3 | * | ||
4 | * Description: Defines the platform resources for the SA settop. | ||
5 | * | ||
6 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
21 | * | ||
22 | * Author: Ken Eppinett | ||
23 | * David Schleef <ds@schleef.org> | ||
24 | * | ||
25 | * Description: Defines the platform resources for the SA settop. | ||
26 | * | ||
27 | * NOTE: The bootloader allocates persistent memory at an address which is | ||
28 | * 16 MiB below the end of the highest address in KSEG0. All fixed | ||
29 | * address memory reservations must avoid this region. | ||
30 | */ | ||
31 | |||
32 | #include <linux/device.h> | ||
33 | #include <linux/kernel.h> | ||
34 | #include <linux/init.h> | ||
35 | #include <linux/resource.h> | ||
36 | #include <linux/serial_reg.h> | ||
37 | #include <linux/io.h> | ||
38 | #include <linux/bootmem.h> | ||
39 | #include <linux/mm.h> | ||
40 | #include <linux/platform_device.h> | ||
41 | #include <linux/module.h> | ||
42 | #include <asm/page.h> | ||
43 | #include <linux/swap.h> | ||
44 | #include <linux/highmem.h> | ||
45 | #include <linux/dma-mapping.h> | ||
46 | |||
47 | #include <asm/mach-powertv/asic.h> | ||
48 | #include <asm/mach-powertv/asic_regs.h> | ||
49 | #include <asm/mach-powertv/interrupts.h> | ||
50 | |||
51 | #ifdef CONFIG_BOOTLOADER_DRIVER | ||
52 | #include <asm/mach-powertv/kbldr.h> | ||
53 | #endif | ||
54 | #include <asm/bootinfo.h> | ||
55 | |||
56 | #define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0)) | ||
57 | |||
58 | /* | ||
59 | * Forward Prototypes | ||
60 | */ | ||
61 | static void pmem_setup_resource(void); | ||
62 | |||
63 | /* | ||
64 | * Global Variables | ||
65 | */ | ||
66 | enum asic_type asic; | ||
67 | |||
68 | unsigned int platform_features; | ||
69 | unsigned int platform_family; | ||
70 | const struct register_map *register_map; | ||
71 | EXPORT_SYMBOL(register_map); /* Exported for testing */ | ||
72 | unsigned long asic_phy_base; | ||
73 | unsigned long asic_base; | ||
74 | EXPORT_SYMBOL(asic_base); /* Exported for testing */ | ||
75 | struct resource *gp_resources; | ||
76 | static bool usb_configured; | ||
77 | |||
78 | /* | ||
79 | * Don't recommend to use it directly, it is usually used by kernel internally. | ||
80 | * Portable code should be using interfaces such as ioremp, dma_map_single, etc. | ||
81 | */ | ||
82 | unsigned long phys_to_bus_offset; | ||
83 | EXPORT_SYMBOL(phys_to_bus_offset); | ||
84 | |||
85 | /* | ||
86 | * | ||
87 | * IO Resource Definition | ||
88 | * | ||
89 | */ | ||
90 | |||
91 | struct resource asic_resource = { | ||
92 | .name = "ASIC Resource", | ||
93 | .start = 0, | ||
94 | .end = ASIC_IO_SIZE, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }; | ||
97 | |||
98 | /* | ||
99 | * | ||
100 | * USB Host Resource Definition | ||
101 | * | ||
102 | */ | ||
103 | |||
104 | static struct resource ehci_resources[] = { | ||
105 | { | ||
106 | .parent = &asic_resource, | ||
107 | .start = 0, | ||
108 | .end = 0xff, | ||
109 | .flags = IORESOURCE_MEM, | ||
110 | }, | ||
111 | { | ||
112 | .start = irq_usbehci, | ||
113 | .end = irq_usbehci, | ||
114 | .flags = IORESOURCE_IRQ, | ||
115 | }, | ||
116 | }; | ||
117 | |||
118 | static u64 ehci_dmamask = DMA_BIT_MASK(32); | ||
119 | |||
120 | static struct platform_device ehci_device = { | ||
121 | .name = "powertv-ehci", | ||
122 | .id = 0, | ||
123 | .num_resources = 2, | ||
124 | .resource = ehci_resources, | ||
125 | .dev = { | ||
126 | .dma_mask = &ehci_dmamask, | ||
127 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
128 | }, | ||
129 | }; | ||
130 | |||
131 | static struct resource ohci_resources[] = { | ||
132 | { | ||
133 | .parent = &asic_resource, | ||
134 | .start = 0, | ||
135 | .end = 0xff, | ||
136 | .flags = IORESOURCE_MEM, | ||
137 | }, | ||
138 | { | ||
139 | .start = irq_usbohci, | ||
140 | .end = irq_usbohci, | ||
141 | .flags = IORESOURCE_IRQ, | ||
142 | }, | ||
143 | }; | ||
144 | |||
145 | static u64 ohci_dmamask = DMA_BIT_MASK(32); | ||
146 | |||
147 | static struct platform_device ohci_device = { | ||
148 | .name = "powertv-ohci", | ||
149 | .id = 0, | ||
150 | .num_resources = 2, | ||
151 | .resource = ohci_resources, | ||
152 | .dev = { | ||
153 | .dma_mask = &ohci_dmamask, | ||
154 | .coherent_dma_mask = DMA_BIT_MASK(32), | ||
155 | }, | ||
156 | }; | ||
157 | |||
158 | static struct platform_device *platform_devices[] = { | ||
159 | &ehci_device, | ||
160 | &ohci_device, | ||
161 | }; | ||
162 | |||
163 | /* | ||
164 | * | ||
165 | * Platform Configuration and Device Initialization | ||
166 | * | ||
167 | */ | ||
168 | static void __init fs_update(int pe, int md, int sdiv, int disable_div_by_3) | ||
169 | { | ||
170 | int en_prg, byp, pwr, nsb, val; | ||
171 | int sout; | ||
172 | |||
173 | sout = 1; | ||
174 | en_prg = 1; | ||
175 | byp = 0; | ||
176 | nsb = 1; | ||
177 | pwr = 1; | ||
178 | |||
179 | val = ((sdiv << 29) | (md << 24) | (pe<<8) | (sout<<3) | (byp<<2) | | ||
180 | (nsb<<1) | (disable_div_by_3<<5)); | ||
181 | |||
182 | asic_write(val, usb_fs); | ||
183 | asic_write(val | (en_prg<<4), usb_fs); | ||
184 | asic_write(val | (en_prg<<4) | pwr, usb_fs); | ||
185 | } | ||
186 | |||
187 | /* | ||
188 | * Allow override of bootloader-specified model | ||
189 | */ | ||
190 | static char __initdata cmdline[COMMAND_LINE_SIZE]; | ||
191 | |||
192 | #define FORCEFAMILY_PARAM "forcefamily" | ||
193 | |||
194 | static __init int check_forcefamily(unsigned char forced_family[2]) | ||
195 | { | ||
196 | const char *p; | ||
197 | |||
198 | forced_family[0] = '\0'; | ||
199 | forced_family[1] = '\0'; | ||
200 | |||
201 | /* Check the command line for a forcefamily directive */ | ||
202 | strncpy(cmdline, arcs_cmdline, COMMAND_LINE_SIZE - 1); | ||
203 | p = strstr(cmdline, FORCEFAMILY_PARAM); | ||
204 | if (p && (p != cmdline) && (*(p - 1) != ' ')) | ||
205 | p = strstr(p, " " FORCEFAMILY_PARAM "="); | ||
206 | |||
207 | if (p) { | ||
208 | p += strlen(FORCEFAMILY_PARAM "="); | ||
209 | |||
210 | if (*p == '\0' || *(p + 1) == '\0' || | ||
211 | (*(p + 2) != '\0' && *(p + 2) != ' ')) | ||
212 | pr_err(FORCEFAMILY_PARAM " must be exactly two " | ||
213 | "characters long, ignoring value\n"); | ||
214 | |||
215 | else { | ||
216 | forced_family[0] = *p; | ||
217 | forced_family[1] = *(p + 1); | ||
218 | } | ||
219 | } | ||
220 | |||
221 | return 0; | ||
222 | } | ||
223 | |||
224 | /* | ||
225 | * platform_set_family - determine major platform family type. | ||
226 | * | ||
227 | * Returns family type; -1 if none | ||
228 | * Returns the family type; -1 if none | ||
229 | * | ||
230 | */ | ||
231 | static __init noinline void platform_set_family(void) | ||
232 | { | ||
233 | #define BOOTLDRFAMILY(byte1, byte0) (((byte1) << 8) | (byte0)) | ||
234 | |||
235 | unsigned char forced_family[2]; | ||
236 | unsigned short bootldr_family; | ||
237 | |||
238 | check_forcefamily(forced_family); | ||
239 | |||
240 | if (forced_family[0] != '\0' && forced_family[1] != '\0') | ||
241 | bootldr_family = BOOTLDRFAMILY(forced_family[0], | ||
242 | forced_family[1]); | ||
243 | else { | ||
244 | |||
245 | #ifdef CONFIG_BOOTLOADER_DRIVER | ||
246 | bootldr_family = (unsigned short) kbldr_GetSWFamily(); | ||
247 | #else | ||
248 | #if defined(CONFIG_BOOTLOADER_FAMILY) | ||
249 | bootldr_family = (unsigned short) BOOTLDRFAMILY( | ||
250 | CONFIG_BOOTLOADER_FAMILY[0], | ||
251 | CONFIG_BOOTLOADER_FAMILY[1]); | ||
252 | #else | ||
253 | #error "Unknown Bootloader Family" | ||
254 | #endif | ||
255 | #endif | ||
256 | } | ||
257 | |||
258 | pr_info("Bootloader Family = 0x%04X\n", bootldr_family); | ||
259 | |||
260 | switch (bootldr_family) { | ||
261 | case BOOTLDRFAMILY('R', '1'): | ||
262 | platform_family = FAMILY_1500; | ||
263 | break; | ||
264 | case BOOTLDRFAMILY('4', '4'): | ||
265 | platform_family = FAMILY_4500; | ||
266 | break; | ||
267 | case BOOTLDRFAMILY('4', '6'): | ||
268 | platform_family = FAMILY_4600; | ||
269 | break; | ||
270 | case BOOTLDRFAMILY('A', '1'): | ||
271 | platform_family = FAMILY_4600VZA; | ||
272 | break; | ||
273 | case BOOTLDRFAMILY('8', '5'): | ||
274 | platform_family = FAMILY_8500; | ||
275 | break; | ||
276 | case BOOTLDRFAMILY('R', '2'): | ||
277 | platform_family = FAMILY_8500RNG; | ||
278 | break; | ||
279 | case BOOTLDRFAMILY('8', '6'): | ||
280 | platform_family = FAMILY_8600; | ||
281 | break; | ||
282 | case BOOTLDRFAMILY('B', '1'): | ||
283 | platform_family = FAMILY_8600VZB; | ||
284 | break; | ||
285 | case BOOTLDRFAMILY('E', '1'): | ||
286 | platform_family = FAMILY_1500VZE; | ||
287 | break; | ||
288 | case BOOTLDRFAMILY('F', '1'): | ||
289 | platform_family = FAMILY_1500VZF; | ||
290 | break; | ||
291 | default: | ||
292 | platform_family = -1; | ||
293 | } | ||
294 | } | ||
295 | |||
296 | unsigned int platform_get_family(void) | ||
297 | { | ||
298 | return platform_family; | ||
299 | } | ||
300 | EXPORT_SYMBOL(platform_get_family); | ||
301 | |||
302 | /* | ||
303 | * \brief usb_eye_configure() for optimizing the USB eye on Calliope. | ||
304 | * | ||
305 | * \param unsigned int value saved to the register. | ||
306 | * | ||
307 | * \return none | ||
308 | * | ||
309 | */ | ||
310 | static void __init usb_eye_configure(unsigned int value) | ||
311 | { | ||
312 | asic_write(asic_read(crt_spare) | value, crt_spare); | ||
313 | } | ||
314 | |||
315 | /* | ||
316 | * platform_get_asic - determine the ASIC type. | ||
317 | * | ||
318 | * \param none | ||
319 | * | ||
320 | * \return ASIC type; ASIC_UNKNOWN if none | ||
321 | * | ||
322 | */ | ||
323 | enum asic_type platform_get_asic(void) | ||
324 | { | ||
325 | return asic; | ||
326 | } | ||
327 | EXPORT_SYMBOL(platform_get_asic); | ||
328 | |||
329 | /* | ||
330 | * platform_configure_usb - usb configuration based on platform type. | ||
331 | * @bcm1_usb2_ctl: value for the BCM1_USB2_CTL register, which is | ||
332 | * quirky | ||
333 | */ | ||
334 | static void __init platform_configure_usb(void) | ||
335 | { | ||
336 | u32 bcm1_usb2_ctl; | ||
337 | |||
338 | if (usb_configured) | ||
339 | return; | ||
340 | |||
341 | switch (asic) { | ||
342 | case ASIC_ZEUS: | ||
343 | fs_update(0x0000, 0x11, 0x02, 0); | ||
344 | bcm1_usb2_ctl = 0x803; | ||
345 | break; | ||
346 | |||
347 | case ASIC_CRONUS: | ||
348 | case ASIC_CRONUSLITE: | ||
349 | fs_update(0x0000, 0x11, 0x02, 0); | ||
350 | bcm1_usb2_ctl = 0x803; | ||
351 | break; | ||
352 | |||
353 | case ASIC_CALLIOPE: | ||
354 | fs_update(0x0000, 0x11, 0x02, 1); | ||
355 | |||
356 | switch (platform_family) { | ||
357 | case FAMILY_1500VZE: | ||
358 | break; | ||
359 | |||
360 | case FAMILY_1500VZF: | ||
361 | usb_eye_configure(0x003c0000); | ||
362 | break; | ||
363 | |||
364 | default: | ||
365 | usb_eye_configure(0x00300000); | ||
366 | break; | ||
367 | } | ||
368 | |||
369 | bcm1_usb2_ctl = 0x803; | ||
370 | break; | ||
371 | |||
372 | default: | ||
373 | pr_err("Unknown ASIC type: %d\n", asic); | ||
374 | break; | ||
375 | } | ||
376 | |||
377 | /* turn on USB power */ | ||
378 | asic_write(0, usb2_strap); | ||
379 | /* Enable all OHCI interrupts */ | ||
380 | asic_write(bcm1_usb2_ctl, usb2_control); | ||
381 | /* USB2_STBUS_OBC store32/load32 */ | ||
382 | asic_write(3, usb2_stbus_obc); | ||
383 | /* USB2_STBUS_MESS_SIZE 2 packets */ | ||
384 | asic_write(1, usb2_stbus_mess_size); | ||
385 | /* USB2_STBUS_CHUNK_SIZE 2 packets */ | ||
386 | asic_write(1, usb2_stbus_chunk_size); | ||
387 | |||
388 | usb_configured = true; | ||
389 | } | ||
390 | |||
391 | /* | ||
392 | * Set up the USB EHCI interface | ||
393 | */ | ||
394 | void platform_configure_usb_ehci() | ||
395 | { | ||
396 | platform_configure_usb(); | ||
397 | } | ||
398 | |||
399 | /* | ||
400 | * Set up the USB OHCI interface | ||
401 | */ | ||
402 | void platform_configure_usb_ohci() | ||
403 | { | ||
404 | platform_configure_usb(); | ||
405 | } | ||
406 | |||
407 | /* | ||
408 | * Shut the USB EHCI interface down--currently a NOP | ||
409 | */ | ||
410 | void platform_unconfigure_usb_ehci() | ||
411 | { | ||
412 | } | ||
413 | |||
414 | /* | ||
415 | * Shut the USB OHCI interface down--currently a NOP | ||
416 | */ | ||
417 | void platform_unconfigure_usb_ohci() | ||
418 | { | ||
419 | } | ||
420 | |||
421 | /** | ||
422 | * configure_platform - configuration based on platform type. | ||
423 | */ | ||
424 | void __init configure_platform(void) | ||
425 | { | ||
426 | platform_set_family(); | ||
427 | |||
428 | switch (platform_family) { | ||
429 | case FAMILY_1500: | ||
430 | case FAMILY_1500VZE: | ||
431 | case FAMILY_1500VZF: | ||
432 | platform_features = FFS_CAPABLE; | ||
433 | asic = ASIC_CALLIOPE; | ||
434 | asic_phy_base = CALLIOPE_IO_BASE; | ||
435 | register_map = &calliope_register_map; | ||
436 | asic_base = (unsigned long)ioremap_nocache(asic_phy_base, | ||
437 | ASIC_IO_SIZE); | ||
438 | |||
439 | if (platform_family == FAMILY_1500VZE) { | ||
440 | gp_resources = non_dvr_vze_calliope_resources; | ||
441 | pr_info("Platform: 1500/Vz Class E - " | ||
442 | "CALLIOPE, NON_DVR_CAPABLE\n"); | ||
443 | } else if (platform_family == FAMILY_1500VZF) { | ||
444 | gp_resources = non_dvr_vzf_calliope_resources; | ||
445 | pr_info("Platform: 1500/Vz Class F - " | ||
446 | "CALLIOPE, NON_DVR_CAPABLE\n"); | ||
447 | } else { | ||
448 | gp_resources = non_dvr_calliope_resources; | ||
449 | pr_info("Platform: 1500/RNG100 - CALLIOPE, " | ||
450 | "NON_DVR_CAPABLE\n"); | ||
451 | } | ||
452 | break; | ||
453 | |||
454 | case FAMILY_4500: | ||
455 | platform_features = FFS_CAPABLE | PCIE_CAPABLE | | ||
456 | DISPLAY_CAPABLE; | ||
457 | asic = ASIC_ZEUS; | ||
458 | asic_phy_base = ZEUS_IO_BASE; | ||
459 | register_map = &zeus_register_map; | ||
460 | asic_base = (unsigned long)ioremap_nocache(asic_phy_base, | ||
461 | ASIC_IO_SIZE); | ||
462 | gp_resources = non_dvr_zeus_resources; | ||
463 | |||
464 | pr_info("Platform: 4500 - ZEUS, NON_DVR_CAPABLE\n"); | ||
465 | break; | ||
466 | |||
467 | case FAMILY_4600: | ||
468 | { | ||
469 | unsigned int chipversion = 0; | ||
470 | |||
471 | /* The settop has PCIE but it isn't used, so don't advertise | ||
472 | * it*/ | ||
473 | platform_features = FFS_CAPABLE | DISPLAY_CAPABLE; | ||
474 | asic_phy_base = CRONUS_IO_BASE; /* same as Cronus */ | ||
475 | register_map = &cronus_register_map; /* same as Cronus */ | ||
476 | asic_base = (unsigned long)ioremap_nocache(asic_phy_base, | ||
477 | ASIC_IO_SIZE); | ||
478 | gp_resources = non_dvr_cronuslite_resources; | ||
479 | |||
480 | /* ASIC version will determine if this is a real CronusLite or | ||
481 | * Castrati(Cronus) */ | ||
482 | chipversion = asic_read(chipver3) << 24; | ||
483 | chipversion |= asic_read(chipver2) << 16; | ||
484 | chipversion |= asic_read(chipver1) << 8; | ||
485 | chipversion |= asic_read(chipver0); | ||
486 | |||
487 | if ((chipversion == CRONUS_10) || (chipversion == CRONUS_11)) | ||
488 | asic = ASIC_CRONUS; | ||
489 | else | ||
490 | asic = ASIC_CRONUSLITE; | ||
491 | |||
492 | pr_info("Platform: 4600 - %s, NON_DVR_CAPABLE, " | ||
493 | "chipversion=0x%08X\n", | ||
494 | (asic == ASIC_CRONUS) ? "CRONUS" : "CRONUS LITE", | ||
495 | chipversion); | ||
496 | break; | ||
497 | } | ||
498 | case FAMILY_4600VZA: | ||
499 | platform_features = FFS_CAPABLE | DISPLAY_CAPABLE; | ||
500 | asic = ASIC_CRONUS; | ||
501 | asic_phy_base = CRONUS_IO_BASE; | ||
502 | register_map = &cronus_register_map; | ||
503 | asic_base = (unsigned long)ioremap_nocache(asic_phy_base, | ||
504 | ASIC_IO_SIZE); | ||
505 | gp_resources = non_dvr_cronus_resources; | ||
506 | |||
507 | pr_info("Platform: Vz Class A - CRONUS, NON_DVR_CAPABLE\n"); | ||
508 | break; | ||
509 | |||
510 | case FAMILY_8500: | ||
511 | case FAMILY_8500RNG: | ||
512 | platform_features = DVR_CAPABLE | PCIE_CAPABLE | | ||
513 | DISPLAY_CAPABLE; | ||
514 | asic = ASIC_ZEUS; | ||
515 | asic_phy_base = ZEUS_IO_BASE; | ||
516 | register_map = &zeus_register_map; | ||
517 | asic_base = (unsigned long)ioremap_nocache(asic_phy_base, | ||
518 | ASIC_IO_SIZE); | ||
519 | gp_resources = dvr_zeus_resources; | ||
520 | |||
521 | pr_info("Platform: 8500/RNG200 - ZEUS, DVR_CAPABLE\n"); | ||
522 | break; | ||
523 | |||
524 | case FAMILY_8600: | ||
525 | case FAMILY_8600VZB: | ||
526 | platform_features = DVR_CAPABLE | PCIE_CAPABLE | | ||
527 | DISPLAY_CAPABLE; | ||
528 | asic = ASIC_CRONUS; | ||
529 | asic_phy_base = CRONUS_IO_BASE; | ||
530 | register_map = &cronus_register_map; | ||
531 | asic_base = (unsigned long)ioremap_nocache(asic_phy_base, | ||
532 | ASIC_IO_SIZE); | ||
533 | gp_resources = dvr_cronus_resources; | ||
534 | |||
535 | pr_info("Platform: 8600/Vz Class B - CRONUS, " | ||
536 | "DVR_CAPABLE\n"); | ||
537 | break; | ||
538 | |||
539 | default: | ||
540 | pr_crit("Platform: UNKNOWN PLATFORM\n"); | ||
541 | break; | ||
542 | } | ||
543 | |||
544 | switch (asic) { | ||
545 | case ASIC_ZEUS: | ||
546 | phys_to_bus_offset = 0x30000000; | ||
547 | break; | ||
548 | case ASIC_CALLIOPE: | ||
549 | phys_to_bus_offset = 0x10000000; | ||
550 | break; | ||
551 | case ASIC_CRONUSLITE: | ||
552 | /* Fall through */ | ||
553 | case ASIC_CRONUS: | ||
554 | /* | ||
555 | * TODO: We suppose 0x10000000 aliases into 0x20000000- | ||
556 | * 0x2XXXXXXX. If 0x10000000 aliases into 0x60000000- | ||
557 | * 0x6XXXXXXX, the offset should be 0x50000000, not 0x10000000. | ||
558 | */ | ||
559 | phys_to_bus_offset = 0x10000000; | ||
560 | break; | ||
561 | default: | ||
562 | phys_to_bus_offset = 0x00000000; | ||
563 | break; | ||
564 | } | ||
565 | } | ||
566 | |||
567 | /** | ||
568 | * platform_devices_init - sets up USB device resourse. | ||
569 | */ | ||
570 | static int __init platform_devices_init(void) | ||
571 | { | ||
572 | pr_notice("%s: ----- Initializing USB resources -----\n", __func__); | ||
573 | |||
574 | asic_resource.start = asic_phy_base; | ||
575 | asic_resource.end += asic_resource.start; | ||
576 | |||
577 | ehci_resources[0].start = asic_reg_phys_addr(ehci_hcapbase); | ||
578 | ehci_resources[0].end += ehci_resources[0].start; | ||
579 | |||
580 | ohci_resources[0].start = asic_reg_phys_addr(ohci_hc_revision); | ||
581 | ohci_resources[0].end += ohci_resources[0].start; | ||
582 | |||
583 | set_io_port_base(0); | ||
584 | |||
585 | platform_add_devices(platform_devices, ARRAY_SIZE(platform_devices)); | ||
586 | |||
587 | return 0; | ||
588 | } | ||
589 | |||
590 | arch_initcall(platform_devices_init); | ||
591 | |||
592 | /* | ||
593 | * | ||
594 | * BOOTMEM ALLOCATION | ||
595 | * | ||
596 | */ | ||
597 | /* | ||
598 | * Allocates/reserves the Platform memory resources early in the boot process. | ||
599 | * This ignores any resources that are designated IORESOURCE_IO | ||
600 | */ | ||
601 | void __init platform_alloc_bootmem(void) | ||
602 | { | ||
603 | int i; | ||
604 | int total = 0; | ||
605 | |||
606 | /* Get persistent memory data from command line before allocating | ||
607 | * resources. This need to happen before normal command line parsing | ||
608 | * has been done */ | ||
609 | pmem_setup_resource(); | ||
610 | |||
611 | /* Loop through looking for resources that want a particular address */ | ||
612 | for (i = 0; gp_resources[i].flags != 0; i++) { | ||
613 | int size = gp_resources[i].end - gp_resources[i].start + 1; | ||
614 | if ((gp_resources[i].start != 0) && | ||
615 | ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) { | ||
616 | reserve_bootmem(bus_to_phys(gp_resources[i].start), | ||
617 | size, 0); | ||
618 | total += gp_resources[i].end - | ||
619 | gp_resources[i].start + 1; | ||
620 | pr_info("reserve resource %s at %08x (%u bytes)\n", | ||
621 | gp_resources[i].name, gp_resources[i].start, | ||
622 | gp_resources[i].end - | ||
623 | gp_resources[i].start + 1); | ||
624 | } | ||
625 | } | ||
626 | |||
627 | /* Loop through assigning addresses for those that are left */ | ||
628 | for (i = 0; gp_resources[i].flags != 0; i++) { | ||
629 | int size = gp_resources[i].end - gp_resources[i].start + 1; | ||
630 | if ((gp_resources[i].start == 0) && | ||
631 | ((gp_resources[i].flags & IORESOURCE_MEM) != 0)) { | ||
632 | void *mem = alloc_bootmem_pages(size); | ||
633 | |||
634 | if (mem == NULL) | ||
635 | pr_err("Unable to allocate bootmem pages " | ||
636 | "for %s\n", gp_resources[i].name); | ||
637 | |||
638 | else { | ||
639 | gp_resources[i].start = | ||
640 | phys_to_bus(virt_to_phys(mem)); | ||
641 | gp_resources[i].end = | ||
642 | gp_resources[i].start + size - 1; | ||
643 | total += size; | ||
644 | pr_info("allocate resource %s at %08x " | ||
645 | "(%u bytes)\n", | ||
646 | gp_resources[i].name, | ||
647 | gp_resources[i].start, size); | ||
648 | } | ||
649 | } | ||
650 | } | ||
651 | |||
652 | pr_info("Total Platform driver memory allocation: 0x%08x\n", total); | ||
653 | |||
654 | /* indicate resources that are platform I/O related */ | ||
655 | for (i = 0; gp_resources[i].flags != 0; i++) { | ||
656 | if ((gp_resources[i].start != 0) && | ||
657 | ((gp_resources[i].flags & IORESOURCE_IO) != 0)) { | ||
658 | pr_info("reserved platform resource %s at %08x\n", | ||
659 | gp_resources[i].name, gp_resources[i].start); | ||
660 | } | ||
661 | } | ||
662 | } | ||
663 | |||
664 | /* | ||
665 | * | ||
666 | * PERSISTENT MEMORY (PMEM) CONFIGURATION | ||
667 | * | ||
668 | */ | ||
669 | static unsigned long pmemaddr __initdata; | ||
670 | |||
671 | static int __init early_param_pmemaddr(char *p) | ||
672 | { | ||
673 | pmemaddr = (unsigned long)simple_strtoul(p, NULL, 0); | ||
674 | return 0; | ||
675 | } | ||
676 | early_param("pmemaddr", early_param_pmemaddr); | ||
677 | |||
678 | static long pmemlen __initdata; | ||
679 | |||
680 | static int __init early_param_pmemlen(char *p) | ||
681 | { | ||
682 | /* TODO: we can use this code when and if the bootloader ever changes this */ | ||
683 | #if 0 | ||
684 | pmemlen = (unsigned long)simple_strtoul(p, NULL, 0); | ||
685 | #else | ||
686 | pmemlen = 0x20000; | ||
687 | #endif | ||
688 | return 0; | ||
689 | } | ||
690 | early_param("pmemlen", early_param_pmemlen); | ||
691 | |||
692 | /* | ||
693 | * Set up persistent memory. If we were given values, we patch the array of | ||
694 | * resources. Otherwise, persistent memory may be allocated anywhere at all. | ||
695 | */ | ||
696 | static void __init pmem_setup_resource(void) | ||
697 | { | ||
698 | struct resource *resource; | ||
699 | resource = asic_resource_get("DiagPersistentMemory"); | ||
700 | |||
701 | if (resource && pmemaddr && pmemlen) { | ||
702 | /* The address provided by bootloader is in kseg0. Convert to | ||
703 | * a bus address. */ | ||
704 | resource->start = phys_to_bus(pmemaddr - 0x80000000); | ||
705 | resource->end = resource->start + pmemlen - 1; | ||
706 | |||
707 | pr_info("persistent memory: start=0x%x end=0x%x\n", | ||
708 | resource->start, resource->end); | ||
709 | } | ||
710 | } | ||
711 | |||
712 | /* | ||
713 | * | ||
714 | * RESOURCE ACCESS FUNCTIONS | ||
715 | * | ||
716 | */ | ||
717 | |||
718 | /** | ||
719 | * asic_resource_get - retrieves parameters for a platform resource. | ||
720 | * @name: string to match resource | ||
721 | * | ||
722 | * Returns a pointer to a struct resource corresponding to the given name. | ||
723 | * | ||
724 | * CANNOT BE NAMED platform_resource_get, which would be the obvious choice, | ||
725 | * as this function name is already declared | ||
726 | */ | ||
727 | struct resource *asic_resource_get(const char *name) | ||
728 | { | ||
729 | int i; | ||
730 | |||
731 | for (i = 0; gp_resources[i].flags != 0; i++) { | ||
732 | if (strcmp(gp_resources[i].name, name) == 0) | ||
733 | return &gp_resources[i]; | ||
734 | } | ||
735 | |||
736 | return NULL; | ||
737 | } | ||
738 | EXPORT_SYMBOL(asic_resource_get); | ||
739 | |||
740 | /** | ||
741 | * platform_release_memory - release pre-allocated memory | ||
742 | * @ptr: pointer to memory to release | ||
743 | * @size: size of resource | ||
744 | * | ||
745 | * This must only be called for memory allocated or reserved via the boot | ||
746 | * memory allocator. | ||
747 | */ | ||
748 | void platform_release_memory(void *ptr, int size) | ||
749 | { | ||
750 | unsigned long addr; | ||
751 | unsigned long end; | ||
752 | |||
753 | addr = ((unsigned long)ptr + (PAGE_SIZE - 1)) & PAGE_MASK; | ||
754 | end = ((unsigned long)ptr + size) & PAGE_MASK; | ||
755 | |||
756 | for (; addr < end; addr += PAGE_SIZE) { | ||
757 | ClearPageReserved(virt_to_page(__va(addr))); | ||
758 | init_page_count(virt_to_page(__va(addr))); | ||
759 | free_page((unsigned long)__va(addr)); | ||
760 | } | ||
761 | } | ||
762 | EXPORT_SYMBOL(platform_release_memory); | ||
763 | |||
764 | /* | ||
765 | * | ||
766 | * FEATURE AVAILABILITY FUNCTIONS | ||
767 | * | ||
768 | */ | ||
769 | int platform_supports_dvr(void) | ||
770 | { | ||
771 | return (platform_features & DVR_CAPABLE) != 0; | ||
772 | } | ||
773 | |||
774 | int platform_supports_ffs(void) | ||
775 | { | ||
776 | return (platform_features & FFS_CAPABLE) != 0; | ||
777 | } | ||
778 | |||
779 | int platform_supports_pcie(void) | ||
780 | { | ||
781 | return (platform_features & PCIE_CAPABLE) != 0; | ||
782 | } | ||
783 | |||
784 | int platform_supports_display(void) | ||
785 | { | ||
786 | return (platform_features & DISPLAY_CAPABLE) != 0; | ||
787 | } | ||
diff --git a/arch/mips/powertv/asic/asic_int.c b/arch/mips/powertv/asic/asic_int.c new file mode 100644 index 000000000000..80b2eed21ac3 --- /dev/null +++ b/arch/mips/powertv/asic/asic_int.c | |||
@@ -0,0 +1,125 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 2000, 2001, 2004 MIPS Technologies, Inc. | ||
4 | * Copyright (C) 2001 Ralf Baechle | ||
5 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
6 | * | ||
7 | * This program is free software; you can distribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License (Version 2) as | ||
9 | * published by the Free Software Foundation. | ||
10 | * | ||
11 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
12 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
13 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
14 | * for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License along | ||
17 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
18 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
19 | * | ||
20 | * Routines for generic manipulation of the interrupts found on the PowerTV | ||
21 | * platform. | ||
22 | * | ||
23 | * The interrupt controller is located in the South Bridge a PIIX4 device | ||
24 | * with two internal 82C95 interrupt controllers. | ||
25 | */ | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/irq.h> | ||
28 | #include <linux/sched.h> | ||
29 | #include <linux/slab.h> | ||
30 | #include <linux/interrupt.h> | ||
31 | #include <linux/kernel_stat.h> | ||
32 | #include <linux/kernel.h> | ||
33 | #include <linux/random.h> | ||
34 | |||
35 | #include <asm/irq_cpu.h> | ||
36 | #include <linux/io.h> | ||
37 | #include <asm/irq_regs.h> | ||
38 | #include <asm/mips-boards/generic.h> | ||
39 | |||
40 | #include <asm/mach-powertv/asic_regs.h> | ||
41 | |||
42 | static DEFINE_SPINLOCK(asic_irq_lock); | ||
43 | |||
44 | static inline int get_int(void) | ||
45 | { | ||
46 | unsigned long flags; | ||
47 | int irq; | ||
48 | |||
49 | spin_lock_irqsave(&asic_irq_lock, flags); | ||
50 | |||
51 | irq = (asic_read(int_int_scan) >> 4) - 1; | ||
52 | |||
53 | if (irq == 0 || irq >= NR_IRQS) | ||
54 | irq = -1; | ||
55 | |||
56 | spin_unlock_irqrestore(&asic_irq_lock, flags); | ||
57 | |||
58 | return irq; | ||
59 | } | ||
60 | |||
61 | static void asic_irqdispatch(void) | ||
62 | { | ||
63 | int irq; | ||
64 | |||
65 | irq = get_int(); | ||
66 | if (irq < 0) | ||
67 | return; /* interrupt has already been cleared */ | ||
68 | |||
69 | do_IRQ(irq); | ||
70 | } | ||
71 | |||
72 | static inline int clz(unsigned long x) | ||
73 | { | ||
74 | __asm__( | ||
75 | " .set push \n" | ||
76 | " .set mips32 \n" | ||
77 | " clz %0, %1 \n" | ||
78 | " .set pop \n" | ||
79 | : "=r" (x) | ||
80 | : "r" (x)); | ||
81 | |||
82 | return x; | ||
83 | } | ||
84 | |||
85 | /* | ||
86 | * Version of ffs that only looks at bits 12..15. | ||
87 | */ | ||
88 | static inline unsigned int irq_ffs(unsigned int pending) | ||
89 | { | ||
90 | return fls(pending) - 1 + CAUSEB_IP; | ||
91 | } | ||
92 | |||
93 | /* | ||
94 | * TODO: check how it works under EIC mode. | ||
95 | */ | ||
96 | asmlinkage void plat_irq_dispatch(void) | ||
97 | { | ||
98 | unsigned int pending = read_c0_cause() & read_c0_status() & ST0_IM; | ||
99 | int irq; | ||
100 | |||
101 | irq = irq_ffs(pending); | ||
102 | |||
103 | if (irq == CAUSEF_IP3) | ||
104 | asic_irqdispatch(); | ||
105 | else if (irq >= 0) | ||
106 | do_IRQ(irq); | ||
107 | else | ||
108 | spurious_interrupt(); | ||
109 | } | ||
110 | |||
111 | void __init arch_init_irq(void) | ||
112 | { | ||
113 | int i; | ||
114 | |||
115 | asic_irq_init(); | ||
116 | |||
117 | /* | ||
118 | * Initialize interrupt exception vectors. | ||
119 | */ | ||
120 | if (cpu_has_veic || cpu_has_vint) { | ||
121 | int nvec = cpu_has_veic ? 64 : 8; | ||
122 | for (i = 0; i < nvec; i++) | ||
123 | set_vi_handler(i, asic_irqdispatch); | ||
124 | } | ||
125 | } | ||
diff --git a/arch/mips/powertv/asic/irq_asic.c b/arch/mips/powertv/asic/irq_asic.c new file mode 100644 index 000000000000..b54d24499b06 --- /dev/null +++ b/arch/mips/powertv/asic/irq_asic.c | |||
@@ -0,0 +1,116 @@ | |||
1 | /* | ||
2 | * Portions copyright (C) 2005-2009 Scientific Atlanta | ||
3 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
4 | * | ||
5 | * Modified from arch/mips/kernel/irq-rm7000.c: | ||
6 | * Copyright (C) 2003 Ralf Baechle | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | #include <linux/init.h> | ||
14 | #include <linux/interrupt.h> | ||
15 | #include <linux/kernel.h> | ||
16 | |||
17 | #include <asm/irq_cpu.h> | ||
18 | #include <asm/mipsregs.h> | ||
19 | #include <asm/system.h> | ||
20 | |||
21 | #include <asm/mach-powertv/asic_regs.h> | ||
22 | |||
23 | static inline void unmask_asic_irq(unsigned int irq) | ||
24 | { | ||
25 | unsigned long enable_bit; | ||
26 | |||
27 | enable_bit = (1 << (irq & 0x1f)); | ||
28 | |||
29 | switch (irq >> 5) { | ||
30 | case 0: | ||
31 | asic_write(asic_read(ien_int_0) | enable_bit, ien_int_0); | ||
32 | break; | ||
33 | case 1: | ||
34 | asic_write(asic_read(ien_int_1) | enable_bit, ien_int_1); | ||
35 | break; | ||
36 | case 2: | ||
37 | asic_write(asic_read(ien_int_2) | enable_bit, ien_int_2); | ||
38 | break; | ||
39 | case 3: | ||
40 | asic_write(asic_read(ien_int_3) | enable_bit, ien_int_3); | ||
41 | break; | ||
42 | default: | ||
43 | BUG(); | ||
44 | } | ||
45 | } | ||
46 | |||
47 | static inline void mask_asic_irq(unsigned int irq) | ||
48 | { | ||
49 | unsigned long disable_mask; | ||
50 | |||
51 | disable_mask = ~(1 << (irq & 0x1f)); | ||
52 | |||
53 | switch (irq >> 5) { | ||
54 | case 0: | ||
55 | asic_write(asic_read(ien_int_0) & disable_mask, ien_int_0); | ||
56 | break; | ||
57 | case 1: | ||
58 | asic_write(asic_read(ien_int_1) & disable_mask, ien_int_1); | ||
59 | break; | ||
60 | case 2: | ||
61 | asic_write(asic_read(ien_int_2) & disable_mask, ien_int_2); | ||
62 | break; | ||
63 | case 3: | ||
64 | asic_write(asic_read(ien_int_3) & disable_mask, ien_int_3); | ||
65 | break; | ||
66 | default: | ||
67 | BUG(); | ||
68 | } | ||
69 | } | ||
70 | |||
71 | static struct irq_chip asic_irq_chip = { | ||
72 | .name = "ASIC Level", | ||
73 | .ack = mask_asic_irq, | ||
74 | .mask = mask_asic_irq, | ||
75 | .mask_ack = mask_asic_irq, | ||
76 | .unmask = unmask_asic_irq, | ||
77 | .eoi = unmask_asic_irq, | ||
78 | }; | ||
79 | |||
80 | void __init asic_irq_init(void) | ||
81 | { | ||
82 | int i; | ||
83 | |||
84 | /* set priority to 0 */ | ||
85 | write_c0_status(read_c0_status() & ~(0x0000fc00)); | ||
86 | |||
87 | asic_write(0, ien_int_0); | ||
88 | asic_write(0, ien_int_1); | ||
89 | asic_write(0, ien_int_2); | ||
90 | asic_write(0, ien_int_3); | ||
91 | |||
92 | asic_write(0x0fffffff, int_level_3_3); | ||
93 | asic_write(0xffffffff, int_level_3_2); | ||
94 | asic_write(0xffffffff, int_level_3_1); | ||
95 | asic_write(0xffffffff, int_level_3_0); | ||
96 | asic_write(0xffffffff, int_level_2_3); | ||
97 | asic_write(0xffffffff, int_level_2_2); | ||
98 | asic_write(0xffffffff, int_level_2_1); | ||
99 | asic_write(0xffffffff, int_level_2_0); | ||
100 | asic_write(0xffffffff, int_level_1_3); | ||
101 | asic_write(0xffffffff, int_level_1_2); | ||
102 | asic_write(0xffffffff, int_level_1_1); | ||
103 | asic_write(0xffffffff, int_level_1_0); | ||
104 | asic_write(0xffffffff, int_level_0_3); | ||
105 | asic_write(0xffffffff, int_level_0_2); | ||
106 | asic_write(0xffffffff, int_level_0_1); | ||
107 | asic_write(0xffffffff, int_level_0_0); | ||
108 | |||
109 | asic_write(0xf, int_int_scan); | ||
110 | |||
111 | /* | ||
112 | * Initialize interrupt handlers. | ||
113 | */ | ||
114 | for (i = 0; i < NR_IRQS; i++) | ||
115 | set_irq_chip_and_handler(i, &asic_irq_chip, handle_level_irq); | ||
116 | } | ||
diff --git a/arch/mips/powertv/asic/prealloc-calliope.c b/arch/mips/powertv/asic/prealloc-calliope.c new file mode 100644 index 000000000000..cd5b76a1c951 --- /dev/null +++ b/arch/mips/powertv/asic/prealloc-calliope.c | |||
@@ -0,0 +1,620 @@ | |||
1 | /* | ||
2 | * Memory pre-allocations for Calliope boxes. | ||
3 | * | ||
4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: Ken Eppinett | ||
21 | * David Schleef <ds@schleef.org> | ||
22 | */ | ||
23 | |||
24 | #include <linux/init.h> | ||
25 | #include <asm/mach-powertv/asic.h> | ||
26 | |||
27 | /* | ||
28 | * NON_DVR_CAPABLE CALLIOPE RESOURCES | ||
29 | */ | ||
30 | struct resource non_dvr_calliope_resources[] __initdata = | ||
31 | { | ||
32 | /* | ||
33 | * VIDEO / LX1 | ||
34 | */ | ||
35 | { | ||
36 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
37 | .start = 0x24000000, | ||
38 | .end = 0x24200000 - 1, /*2MiB */ | ||
39 | .flags = IORESOURCE_MEM, | ||
40 | }, | ||
41 | { | ||
42 | .name = "ST231aMonitor", /*8KiB block ST231a monitor */ | ||
43 | .start = 0x24200000, | ||
44 | .end = 0x24202000 - 1, | ||
45 | .flags = IORESOURCE_MEM, | ||
46 | }, | ||
47 | { | ||
48 | .name = "MediaMemory1", | ||
49 | .start = 0x24202000, | ||
50 | .end = 0x26700000 - 1, /*~36.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
51 | .flags = IORESOURCE_MEM, | ||
52 | }, | ||
53 | /* | ||
54 | * Sysaudio Driver | ||
55 | */ | ||
56 | { | ||
57 | .name = "DSP_Image_Buff", | ||
58 | .start = 0x00000000, | ||
59 | .end = 0x000FFFFF, | ||
60 | .flags = IORESOURCE_MEM, | ||
61 | }, | ||
62 | { | ||
63 | .name = "ADSC_CPU_PCM_Buff", | ||
64 | .start = 0x00000000, | ||
65 | .end = 0x00009FFF, | ||
66 | .flags = IORESOURCE_MEM, | ||
67 | }, | ||
68 | { | ||
69 | .name = "ADSC_AUX_Buff", | ||
70 | .start = 0x00000000, | ||
71 | .end = 0x00003FFF, | ||
72 | .flags = IORESOURCE_MEM, | ||
73 | }, | ||
74 | { | ||
75 | .name = "ADSC_Main_Buff", | ||
76 | .start = 0x00000000, | ||
77 | .end = 0x00003FFF, | ||
78 | .flags = IORESOURCE_MEM, | ||
79 | }, | ||
80 | /* | ||
81 | * STAVEM driver/STAPI | ||
82 | */ | ||
83 | { | ||
84 | .name = "AVMEMPartition0", | ||
85 | .start = 0x00000000, | ||
86 | .end = 0x00600000 - 1, /* 6 MB total */ | ||
87 | .flags = IORESOURCE_MEM, | ||
88 | }, | ||
89 | /* | ||
90 | * DOCSIS Subsystem | ||
91 | */ | ||
92 | { | ||
93 | .name = "Docsis", | ||
94 | .start = 0x22000000, | ||
95 | .end = 0x22700000 - 1, | ||
96 | .flags = IORESOURCE_MEM, | ||
97 | }, | ||
98 | /* | ||
99 | * GHW HAL Driver | ||
100 | */ | ||
101 | { | ||
102 | .name = "GraphicsHeap", | ||
103 | .start = 0x22700000, | ||
104 | .end = 0x23500000 - 1, /* 14 MB total */ | ||
105 | .flags = IORESOURCE_MEM, | ||
106 | }, | ||
107 | /* | ||
108 | * multi com buffer area | ||
109 | */ | ||
110 | { | ||
111 | .name = "MulticomSHM", | ||
112 | .start = 0x23700000, | ||
113 | .end = 0x23720000 - 1, | ||
114 | .flags = IORESOURCE_MEM, | ||
115 | }, | ||
116 | /* | ||
117 | * DMA Ring buffer (don't need recording buffers) | ||
118 | */ | ||
119 | { | ||
120 | .name = "BMM_Buffer", | ||
121 | .start = 0x00000000, | ||
122 | .end = 0x000AA000 - 1, | ||
123 | .flags = IORESOURCE_MEM, | ||
124 | }, | ||
125 | /* | ||
126 | * Display bins buffer for unit0 | ||
127 | */ | ||
128 | { | ||
129 | .name = "DisplayBins0", | ||
130 | .start = 0x00000000, | ||
131 | .end = 0x00000FFF, /* 4 KB total */ | ||
132 | .flags = IORESOURCE_MEM, | ||
133 | }, | ||
134 | /* | ||
135 | * | ||
136 | * AVFS: player HAL memory | ||
137 | * | ||
138 | * | ||
139 | */ | ||
140 | { | ||
141 | .name = "AvfsDmaMem", | ||
142 | .start = 0x00000000, | ||
143 | .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ | ||
144 | .flags = IORESOURCE_MEM, | ||
145 | }, | ||
146 | /* | ||
147 | * PMEM | ||
148 | */ | ||
149 | { | ||
150 | .name = "DiagPersistentMemory", | ||
151 | .start = 0x00000000, | ||
152 | .end = 0x10000 - 1, | ||
153 | .flags = IORESOURCE_MEM, | ||
154 | }, | ||
155 | /* | ||
156 | * Smartcard | ||
157 | */ | ||
158 | { | ||
159 | .name = "SmartCardInfo", | ||
160 | .start = 0x00000000, | ||
161 | .end = 0x2800 - 1, | ||
162 | .flags = IORESOURCE_MEM, | ||
163 | }, | ||
164 | /* | ||
165 | * NAND Flash | ||
166 | */ | ||
167 | { | ||
168 | .name = "NandFlash", | ||
169 | .start = NAND_FLASH_BASE, | ||
170 | .end = NAND_FLASH_BASE + 0x400 - 1, | ||
171 | .flags = IORESOURCE_IO, | ||
172 | }, | ||
173 | /* | ||
174 | * Synopsys GMAC Memory Region | ||
175 | */ | ||
176 | { | ||
177 | .name = "GMAC", | ||
178 | .start = 0x00000000, | ||
179 | .end = 0x00010000 - 1, | ||
180 | .flags = IORESOURCE_MEM, | ||
181 | }, | ||
182 | /* | ||
183 | * Add other resources here | ||
184 | * | ||
185 | */ | ||
186 | { }, | ||
187 | }; | ||
188 | |||
189 | struct resource non_dvr_vz_calliope_resources[] __initdata = | ||
190 | { | ||
191 | /* | ||
192 | * VIDEO / LX1 | ||
193 | */ | ||
194 | { | ||
195 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
196 | .start = 0x24000000, | ||
197 | .end = 0x24200000 - 1, /*2 Meg */ | ||
198 | .flags = IORESOURCE_MEM, | ||
199 | }, | ||
200 | { | ||
201 | .name = "ST231aMonitor", /* 8k block ST231a monitor */ | ||
202 | .start = 0x24200000, | ||
203 | .end = 0x24202000 - 1, | ||
204 | .flags = IORESOURCE_MEM, | ||
205 | }, | ||
206 | { | ||
207 | .name = "MediaMemory1", | ||
208 | .start = 0x22202000, | ||
209 | .end = 0x22C20B85 - 1, /* 10.12 Meg */ | ||
210 | .flags = IORESOURCE_MEM, | ||
211 | }, | ||
212 | /* | ||
213 | * Sysaudio Driver | ||
214 | */ | ||
215 | { | ||
216 | .name = "DSP_Image_Buff", | ||
217 | .start = 0x00000000, | ||
218 | .end = 0x000FFFFF, | ||
219 | .flags = IORESOURCE_MEM, | ||
220 | }, | ||
221 | { | ||
222 | .name = "ADSC_CPU_PCM_Buff", | ||
223 | .start = 0x00000000, | ||
224 | .end = 0x00009FFF, | ||
225 | .flags = IORESOURCE_MEM, | ||
226 | }, | ||
227 | { | ||
228 | .name = "ADSC_AUX_Buff", | ||
229 | .start = 0x00000000, | ||
230 | .end = 0x00003FFF, | ||
231 | .flags = IORESOURCE_MEM, | ||
232 | }, | ||
233 | { | ||
234 | .name = "ADSC_Main_Buff", | ||
235 | .start = 0x00000000, | ||
236 | .end = 0x00003FFF, | ||
237 | .flags = IORESOURCE_MEM, | ||
238 | }, | ||
239 | /* | ||
240 | * STAVEM driver/STAPI | ||
241 | */ | ||
242 | { | ||
243 | .name = "AVMEMPartition0", | ||
244 | .start = 0x20300000, | ||
245 | .end = 0x20620000-1, /*3.125 MB total */ | ||
246 | .flags = IORESOURCE_MEM, | ||
247 | }, | ||
248 | /* | ||
249 | * GHW HAL Driver | ||
250 | */ | ||
251 | { | ||
252 | .name = "GraphicsHeap", | ||
253 | .start = 0x20100000, | ||
254 | .end = 0x20300000 - 1, | ||
255 | .flags = IORESOURCE_MEM, | ||
256 | }, | ||
257 | /* | ||
258 | * multi com buffer area | ||
259 | */ | ||
260 | { | ||
261 | .name = "MulticomSHM", | ||
262 | .start = 0x23900000, | ||
263 | .end = 0x23920000 - 1, | ||
264 | .flags = IORESOURCE_MEM, | ||
265 | }, | ||
266 | /* | ||
267 | * DMA Ring buffer | ||
268 | */ | ||
269 | { | ||
270 | .name = "BMM_Buffer", | ||
271 | .start = 0x00000000, | ||
272 | .end = 0x000AA000 - 1, | ||
273 | .flags = IORESOURCE_MEM, | ||
274 | }, | ||
275 | /* | ||
276 | * Display bins buffer for unit0 | ||
277 | */ | ||
278 | { | ||
279 | .name = "DisplayBins0", | ||
280 | .start = 0x00000000, | ||
281 | .end = 0x00000FFF, | ||
282 | .flags = IORESOURCE_MEM, | ||
283 | }, | ||
284 | /* | ||
285 | * PMEM | ||
286 | */ | ||
287 | { | ||
288 | .name = "DiagPersistentMemory", | ||
289 | .start = 0x00000000, | ||
290 | .end = 0x10000 - 1, | ||
291 | .flags = IORESOURCE_MEM, | ||
292 | }, | ||
293 | /* | ||
294 | * Smartcard | ||
295 | */ | ||
296 | { | ||
297 | .name = "SmartCardInfo", | ||
298 | .start = 0x00000000, | ||
299 | .end = 0x2800 - 1, | ||
300 | .flags = IORESOURCE_MEM, | ||
301 | }, | ||
302 | /* | ||
303 | * NAND Flash | ||
304 | */ | ||
305 | { | ||
306 | .name = "NandFlash", | ||
307 | .start = NAND_FLASH_BASE, | ||
308 | .end = NAND_FLASH_BASE+0x400 - 1, | ||
309 | .flags = IORESOURCE_IO, | ||
310 | }, | ||
311 | /* | ||
312 | * Synopsys GMAC Memory Region | ||
313 | */ | ||
314 | { | ||
315 | .name = "GMAC", | ||
316 | .start = 0x00000000, | ||
317 | .end = 0x00010000 - 1, | ||
318 | .flags = IORESOURCE_MEM, | ||
319 | }, | ||
320 | /* | ||
321 | * Add other resources here | ||
322 | */ | ||
323 | { }, | ||
324 | }; | ||
325 | |||
326 | struct resource non_dvr_vze_calliope_resources[] __initdata = | ||
327 | { | ||
328 | /* | ||
329 | * VIDEO / LX1 | ||
330 | */ | ||
331 | { | ||
332 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
333 | .start = 0x22000000, | ||
334 | .end = 0x22200000 - 1, /*2 Meg */ | ||
335 | .flags = IORESOURCE_MEM, | ||
336 | }, | ||
337 | { | ||
338 | .name = "ST231aMonitor", /* 8k block ST231a monitor */ | ||
339 | .start = 0x22200000, | ||
340 | .end = 0x22202000 - 1, | ||
341 | .flags = IORESOURCE_MEM, | ||
342 | }, | ||
343 | { | ||
344 | .name = "MediaMemory1", | ||
345 | .start = 0x22202000, | ||
346 | .end = 0x22C20B85 - 1, /* 10.12 Meg */ | ||
347 | .flags = IORESOURCE_MEM, | ||
348 | }, | ||
349 | /* | ||
350 | * Sysaudio Driver | ||
351 | */ | ||
352 | { | ||
353 | .name = "DSP_Image_Buff", | ||
354 | .start = 0x00000000, | ||
355 | .end = 0x000FFFFF, | ||
356 | .flags = IORESOURCE_MEM, | ||
357 | }, | ||
358 | { | ||
359 | .name = "ADSC_CPU_PCM_Buff", | ||
360 | .start = 0x00000000, | ||
361 | .end = 0x00009FFF, | ||
362 | .flags = IORESOURCE_MEM, | ||
363 | }, | ||
364 | { | ||
365 | .name = "ADSC_AUX_Buff", | ||
366 | .start = 0x00000000, | ||
367 | .end = 0x00003FFF, | ||
368 | .flags = IORESOURCE_MEM, | ||
369 | }, | ||
370 | { | ||
371 | .name = "ADSC_Main_Buff", | ||
372 | .start = 0x00000000, | ||
373 | .end = 0x00003FFF, | ||
374 | .flags = IORESOURCE_MEM, | ||
375 | }, | ||
376 | /* | ||
377 | * STAVEM driver/STAPI | ||
378 | */ | ||
379 | { | ||
380 | .name = "AVMEMPartition0", | ||
381 | .start = 0x20396000, | ||
382 | .end = 0x206B6000 - 1, /* 3.125 MB total */ | ||
383 | .flags = IORESOURCE_MEM, | ||
384 | }, | ||
385 | /* | ||
386 | * GHW HAL Driver | ||
387 | */ | ||
388 | { | ||
389 | .name = "GraphicsHeap", | ||
390 | .start = 0x20100000, | ||
391 | .end = 0x20396000 - 1, | ||
392 | .flags = IORESOURCE_MEM, | ||
393 | }, | ||
394 | /* | ||
395 | * multi com buffer area | ||
396 | */ | ||
397 | { | ||
398 | .name = "MulticomSHM", | ||
399 | .start = 0x206B6000, | ||
400 | .end = 0x206D6000 - 1, | ||
401 | .flags = IORESOURCE_MEM, | ||
402 | }, | ||
403 | /* | ||
404 | * DMA Ring buffer | ||
405 | */ | ||
406 | { | ||
407 | .name = "BMM_Buffer", | ||
408 | .start = 0x00000000, | ||
409 | .end = 0x000AA000 - 1, | ||
410 | .flags = IORESOURCE_MEM, | ||
411 | }, | ||
412 | /* | ||
413 | * Display bins buffer for unit0 | ||
414 | */ | ||
415 | { | ||
416 | .name = "DisplayBins0", | ||
417 | .start = 0x00000000, | ||
418 | .end = 0x00000FFF, | ||
419 | .flags = IORESOURCE_MEM, | ||
420 | }, | ||
421 | /* | ||
422 | * PMEM | ||
423 | */ | ||
424 | { | ||
425 | .name = "DiagPersistentMemory", | ||
426 | .start = 0x00000000, | ||
427 | .end = 0x10000 - 1, | ||
428 | .flags = IORESOURCE_MEM, | ||
429 | }, | ||
430 | /* | ||
431 | * Smartcard | ||
432 | */ | ||
433 | { | ||
434 | .name = "SmartCardInfo", | ||
435 | .start = 0x00000000, | ||
436 | .end = 0x2800 - 1, | ||
437 | .flags = IORESOURCE_MEM, | ||
438 | }, | ||
439 | /* | ||
440 | * NAND Flash | ||
441 | */ | ||
442 | { | ||
443 | .name = "NandFlash", | ||
444 | .start = NAND_FLASH_BASE, | ||
445 | .end = NAND_FLASH_BASE+0x400 - 1, | ||
446 | .flags = IORESOURCE_MEM, | ||
447 | }, | ||
448 | /* | ||
449 | * Synopsys GMAC Memory Region | ||
450 | */ | ||
451 | { | ||
452 | .name = "GMAC", | ||
453 | .start = 0x00000000, | ||
454 | .end = 0x00010000 - 1, | ||
455 | .flags = IORESOURCE_MEM, | ||
456 | }, | ||
457 | /* | ||
458 | * Add other resources here | ||
459 | */ | ||
460 | { }, | ||
461 | }; | ||
462 | |||
463 | struct resource non_dvr_vzf_calliope_resources[] __initdata = | ||
464 | { | ||
465 | /* | ||
466 | * VIDEO / LX1 | ||
467 | */ | ||
468 | { | ||
469 | .name = "ST231aImage", /*Delta-Mu 1 image and ram */ | ||
470 | .start = 0x24000000, | ||
471 | .end = 0x24200000 - 1, /*2MiB */ | ||
472 | .flags = IORESOURCE_MEM, | ||
473 | }, | ||
474 | { | ||
475 | .name = "ST231aMonitor", /*8KiB block ST231a monitor */ | ||
476 | .start = 0x24200000, | ||
477 | .end = 0x24202000 - 1, | ||
478 | .flags = IORESOURCE_MEM, | ||
479 | }, | ||
480 | { | ||
481 | .name = "MediaMemory1", | ||
482 | .start = 0x24202000, | ||
483 | /* ~19.4 (21.5MiB - (2MiB + 8KiB)) */ | ||
484 | .end = 0x25580000 - 1, | ||
485 | .flags = IORESOURCE_MEM, | ||
486 | }, | ||
487 | /* | ||
488 | * Sysaudio Driver | ||
489 | */ | ||
490 | { | ||
491 | .name = "DSP_Image_Buff", | ||
492 | .start = 0x00000000, | ||
493 | .end = 0x000FFFFF, | ||
494 | .flags = IORESOURCE_MEM, | ||
495 | }, | ||
496 | { | ||
497 | .name = "ADSC_CPU_PCM_Buff", | ||
498 | .start = 0x00000000, | ||
499 | .end = 0x00009FFF, | ||
500 | .flags = IORESOURCE_MEM, | ||
501 | }, | ||
502 | { | ||
503 | .name = "ADSC_AUX_Buff", | ||
504 | .start = 0x00000000, | ||
505 | .end = 0x00003FFF, | ||
506 | .flags = IORESOURCE_MEM, | ||
507 | }, | ||
508 | { | ||
509 | .name = "ADSC_Main_Buff", | ||
510 | .start = 0x00000000, | ||
511 | .end = 0x00003FFF, | ||
512 | .flags = IORESOURCE_MEM, | ||
513 | }, | ||
514 | /* | ||
515 | * STAVEM driver/STAPI | ||
516 | */ | ||
517 | { | ||
518 | .name = "AVMEMPartition0", | ||
519 | .start = 0x00000000, | ||
520 | .end = 0x00480000 - 1, /* 4.5 MB total */ | ||
521 | .flags = IORESOURCE_MEM, | ||
522 | }, | ||
523 | /* | ||
524 | * GHW HAL Driver | ||
525 | */ | ||
526 | { | ||
527 | .name = "GraphicsHeap", | ||
528 | .start = 0x22700000, | ||
529 | .end = 0x23500000 - 1, /* 14 MB total */ | ||
530 | .flags = IORESOURCE_MEM, | ||
531 | }, | ||
532 | /* | ||
533 | * multi com buffer area | ||
534 | */ | ||
535 | { | ||
536 | .name = "MulticomSHM", | ||
537 | .start = 0x23700000, | ||
538 | .end = 0x23720000 - 1, | ||
539 | .flags = IORESOURCE_MEM, | ||
540 | }, | ||
541 | /* | ||
542 | * DMA Ring buffer (don't need recording buffers) | ||
543 | */ | ||
544 | { | ||
545 | .name = "BMM_Buffer", | ||
546 | .start = 0x00000000, | ||
547 | .end = 0x000AA000 - 1, | ||
548 | .flags = IORESOURCE_MEM, | ||
549 | }, | ||
550 | /* | ||
551 | * Display bins buffer for unit0 | ||
552 | */ | ||
553 | { | ||
554 | .name = "DisplayBins0", | ||
555 | .start = 0x00000000, | ||
556 | .end = 0x00000FFF, /* 4 KB total */ | ||
557 | .flags = IORESOURCE_MEM, | ||
558 | }, | ||
559 | /* | ||
560 | * Display bins buffer for unit1 | ||
561 | */ | ||
562 | { | ||
563 | .name = "DisplayBins1", | ||
564 | .start = 0x00000000, | ||
565 | .end = 0x00000FFF, /* 4 KB total */ | ||
566 | .flags = IORESOURCE_MEM, | ||
567 | }, | ||
568 | /* | ||
569 | * | ||
570 | * AVFS: player HAL memory | ||
571 | * | ||
572 | * | ||
573 | */ | ||
574 | { | ||
575 | .name = "AvfsDmaMem", | ||
576 | .start = 0x00000000, | ||
577 | .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ | ||
578 | .flags = IORESOURCE_MEM, | ||
579 | }, | ||
580 | /* | ||
581 | * PMEM | ||
582 | */ | ||
583 | { | ||
584 | .name = "DiagPersistentMemory", | ||
585 | .start = 0x00000000, | ||
586 | .end = 0x10000 - 1, | ||
587 | .flags = IORESOURCE_MEM, | ||
588 | }, | ||
589 | /* | ||
590 | * Smartcard | ||
591 | */ | ||
592 | { | ||
593 | .name = "SmartCardInfo", | ||
594 | .start = 0x00000000, | ||
595 | .end = 0x2800 - 1, | ||
596 | .flags = IORESOURCE_MEM, | ||
597 | }, | ||
598 | /* | ||
599 | * NAND Flash | ||
600 | */ | ||
601 | { | ||
602 | .name = "NandFlash", | ||
603 | .start = NAND_FLASH_BASE, | ||
604 | .end = NAND_FLASH_BASE + 0x400 - 1, | ||
605 | .flags = IORESOURCE_MEM, | ||
606 | }, | ||
607 | /* | ||
608 | * Synopsys GMAC Memory Region | ||
609 | */ | ||
610 | { | ||
611 | .name = "GMAC", | ||
612 | .start = 0x00000000, | ||
613 | .end = 0x00010000 - 1, | ||
614 | .flags = IORESOURCE_MEM, | ||
615 | }, | ||
616 | /* | ||
617 | * Add other resources here | ||
618 | */ | ||
619 | { }, | ||
620 | }; | ||
diff --git a/arch/mips/powertv/asic/prealloc-cronus.c b/arch/mips/powertv/asic/prealloc-cronus.c new file mode 100644 index 000000000000..45a5c3ea718c --- /dev/null +++ b/arch/mips/powertv/asic/prealloc-cronus.c | |||
@@ -0,0 +1,608 @@ | |||
1 | /* | ||
2 | * Memory pre-allocations for Cronus boxes. | ||
3 | * | ||
4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: Ken Eppinett | ||
21 | * David Schleef <ds@schleef.org> | ||
22 | */ | ||
23 | |||
24 | #include <linux/init.h> | ||
25 | #include <asm/mach-powertv/asic.h> | ||
26 | |||
27 | /* | ||
28 | * DVR_CAPABLE CRONUS RESOURCES | ||
29 | */ | ||
30 | struct resource dvr_cronus_resources[] __initdata = | ||
31 | { | ||
32 | /* | ||
33 | * | ||
34 | * VIDEO1 / LX1 | ||
35 | * | ||
36 | */ | ||
37 | { | ||
38 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
39 | .start = 0x24000000, | ||
40 | .end = 0x241FFFFF, /* 2MiB */ | ||
41 | .flags = IORESOURCE_MEM, | ||
42 | }, | ||
43 | { | ||
44 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | ||
45 | .start = 0x24200000, | ||
46 | .end = 0x24201FFF, | ||
47 | .flags = IORESOURCE_MEM, | ||
48 | }, | ||
49 | { | ||
50 | .name = "MediaMemory1", | ||
51 | .start = 0x24202000, | ||
52 | .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
53 | .flags = IORESOURCE_MEM, | ||
54 | }, | ||
55 | /* | ||
56 | * | ||
57 | * VIDEO2 / LX2 | ||
58 | * | ||
59 | */ | ||
60 | { | ||
61 | .name = "ST231bImage", /* Delta-Mu 2 image and ram */ | ||
62 | .start = 0x60000000, | ||
63 | .end = 0x601FFFFF, /* 2MiB */ | ||
64 | .flags = IORESOURCE_IO, | ||
65 | }, | ||
66 | { | ||
67 | .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ | ||
68 | .start = 0x60200000, | ||
69 | .end = 0x60201FFF, | ||
70 | .flags = IORESOURCE_IO, | ||
71 | }, | ||
72 | { | ||
73 | .name = "MediaMemory2", | ||
74 | .start = 0x60202000, | ||
75 | .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
76 | .flags = IORESOURCE_IO, | ||
77 | }, | ||
78 | /* | ||
79 | * | ||
80 | * Sysaudio Driver | ||
81 | * | ||
82 | * This driver requires: | ||
83 | * | ||
84 | * Arbitrary Based Buffers: | ||
85 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
86 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
87 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
88 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
89 | * | ||
90 | */ | ||
91 | { | ||
92 | .name = "DSP_Image_Buff", | ||
93 | .start = 0x00000000, | ||
94 | .end = 0x000FFFFF, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | { | ||
98 | .name = "ADSC_CPU_PCM_Buff", | ||
99 | .start = 0x00000000, | ||
100 | .end = 0x00009FFF, | ||
101 | .flags = IORESOURCE_MEM, | ||
102 | }, | ||
103 | { | ||
104 | .name = "ADSC_AUX_Buff", | ||
105 | .start = 0x00000000, | ||
106 | .end = 0x00003FFF, | ||
107 | .flags = IORESOURCE_MEM, | ||
108 | }, | ||
109 | { | ||
110 | .name = "ADSC_Main_Buff", | ||
111 | .start = 0x00000000, | ||
112 | .end = 0x00003FFF, | ||
113 | .flags = IORESOURCE_MEM, | ||
114 | }, | ||
115 | /* | ||
116 | * | ||
117 | * STAVEM driver/STAPI | ||
118 | * | ||
119 | * This driver requires: | ||
120 | * | ||
121 | * Arbitrary Based Buffers: | ||
122 | * This memory area is used for allocating buffers for Video decoding | ||
123 | * purposes. Allocation/De-allocation within this buffer is managed | ||
124 | * by the STAVMEM driver of the STAPI. They could be Decimated | ||
125 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | ||
126 | * video decoding purposes, for any video decoders on Zeus. | ||
127 | * | ||
128 | */ | ||
129 | { | ||
130 | .name = "AVMEMPartition0", | ||
131 | .start = 0x63580000, | ||
132 | .end = 0x64180000 - 1, /* 12 MB total */ | ||
133 | .flags = IORESOURCE_IO, | ||
134 | }, | ||
135 | /* | ||
136 | * | ||
137 | * DOCSIS Subsystem | ||
138 | * | ||
139 | * This driver requires: | ||
140 | * | ||
141 | * Arbitrary Based Buffers: | ||
142 | * Docsis - | ||
143 | * | ||
144 | */ | ||
145 | { | ||
146 | .name = "Docsis", | ||
147 | .start = 0x62000000, | ||
148 | .end = 0x62700000 - 1, /* 7 MB total */ | ||
149 | .flags = IORESOURCE_IO, | ||
150 | }, | ||
151 | /* | ||
152 | * | ||
153 | * GHW HAL Driver | ||
154 | * | ||
155 | * This driver requires: | ||
156 | * | ||
157 | * Arbitrary Based Buffers: | ||
158 | * GraphicsHeap - PowerTV Graphics Heap | ||
159 | * | ||
160 | */ | ||
161 | { | ||
162 | .name = "GraphicsHeap", | ||
163 | .start = 0x62700000, | ||
164 | .end = 0x63500000 - 1, /* 14 MB total */ | ||
165 | .flags = IORESOURCE_IO, | ||
166 | }, | ||
167 | /* | ||
168 | * | ||
169 | * multi com buffer area | ||
170 | * | ||
171 | * This driver requires: | ||
172 | * | ||
173 | * Arbitrary Based Buffers: | ||
174 | * Docsis - | ||
175 | * | ||
176 | */ | ||
177 | { | ||
178 | .name = "MulticomSHM", | ||
179 | .start = 0x26000000, | ||
180 | .end = 0x26020000 - 1, | ||
181 | .flags = IORESOURCE_MEM, | ||
182 | }, | ||
183 | /* | ||
184 | * | ||
185 | * DMA Ring buffer | ||
186 | * | ||
187 | * This driver requires: | ||
188 | * | ||
189 | * Arbitrary Based Buffers: | ||
190 | * Docsis - | ||
191 | * | ||
192 | */ | ||
193 | { | ||
194 | .name = "BMM_Buffer", | ||
195 | .start = 0x00000000, | ||
196 | .end = 0x00280000 - 1, | ||
197 | .flags = IORESOURCE_MEM, | ||
198 | }, | ||
199 | /* | ||
200 | * | ||
201 | * Display bins buffer for unit0 | ||
202 | * | ||
203 | * This driver requires: | ||
204 | * | ||
205 | * Arbitrary Based Buffers: | ||
206 | * Display Bins for unit0 | ||
207 | * | ||
208 | */ | ||
209 | { | ||
210 | .name = "DisplayBins0", | ||
211 | .start = 0x00000000, | ||
212 | .end = 0x00000FFF, /* 4 KB total */ | ||
213 | .flags = IORESOURCE_MEM, | ||
214 | }, | ||
215 | /* | ||
216 | * | ||
217 | * Display bins buffer | ||
218 | * | ||
219 | * This driver requires: | ||
220 | * | ||
221 | * Arbitrary Based Buffers: | ||
222 | * Display Bins for unit1 | ||
223 | * | ||
224 | */ | ||
225 | { | ||
226 | .name = "DisplayBins1", | ||
227 | .start = 0x64AD4000, | ||
228 | .end = 0x64AD5000 - 1, /* 4 KB total */ | ||
229 | .flags = IORESOURCE_IO, | ||
230 | }, | ||
231 | /* | ||
232 | * | ||
233 | * ITFS | ||
234 | * | ||
235 | * This driver requires: | ||
236 | * | ||
237 | * Arbitrary Based Buffers: | ||
238 | * Docsis - | ||
239 | * | ||
240 | */ | ||
241 | { | ||
242 | .name = "ITFS", | ||
243 | .start = 0x64180000, | ||
244 | /* 815,104 bytes each for 2 ITFS partitions. */ | ||
245 | .end = 0x6430DFFF, | ||
246 | .flags = IORESOURCE_IO, | ||
247 | }, | ||
248 | /* | ||
249 | * | ||
250 | * AVFS | ||
251 | * | ||
252 | * This driver requires: | ||
253 | * | ||
254 | * Arbitrary Based Buffers: | ||
255 | * Docsis - | ||
256 | * | ||
257 | */ | ||
258 | { | ||
259 | .name = "AvfsDmaMem", | ||
260 | .start = 0x6430E000, | ||
261 | /* (945K * 8) = (128K *3) 5 playbacks / 3 server */ | ||
262 | .end = 0x64AD0000 - 1, | ||
263 | .flags = IORESOURCE_IO, | ||
264 | }, | ||
265 | { | ||
266 | .name = "AvfsFileSys", | ||
267 | .start = 0x64AD0000, | ||
268 | .end = 0x64AD1000 - 1, /* 4K */ | ||
269 | .flags = IORESOURCE_IO, | ||
270 | }, | ||
271 | /* | ||
272 | * | ||
273 | * PMEM | ||
274 | * | ||
275 | * This driver requires: | ||
276 | * | ||
277 | * Arbitrary Based Buffers: | ||
278 | * Persistent memory for diagnostics. | ||
279 | * | ||
280 | */ | ||
281 | { | ||
282 | .name = "DiagPersistentMemory", | ||
283 | .start = 0x00000000, | ||
284 | .end = 0x10000 - 1, | ||
285 | .flags = IORESOURCE_MEM, | ||
286 | }, | ||
287 | /* | ||
288 | * | ||
289 | * Smartcard | ||
290 | * | ||
291 | * This driver requires: | ||
292 | * | ||
293 | * Arbitrary Based Buffers: | ||
294 | * Read and write buffers for Internal/External cards | ||
295 | * | ||
296 | */ | ||
297 | { | ||
298 | .name = "SmartCardInfo", | ||
299 | .start = 0x64AD1000, | ||
300 | .end = 0x64AD3800 - 1, | ||
301 | .flags = IORESOURCE_IO, | ||
302 | }, | ||
303 | /* | ||
304 | * | ||
305 | * KAVNET | ||
306 | * NP Reset Vector - must be of the form xxCxxxxx | ||
307 | * NP Image - must be video bank 1 | ||
308 | * NP IPC - must be video bank 2 | ||
309 | */ | ||
310 | { | ||
311 | .name = "NP_Reset_Vector", | ||
312 | .start = 0x27c00000, | ||
313 | .end = 0x27c01000 - 1, | ||
314 | .flags = IORESOURCE_MEM, | ||
315 | }, | ||
316 | { | ||
317 | .name = "NP_Image", | ||
318 | .start = 0x27020000, | ||
319 | .end = 0x27060000 - 1, | ||
320 | .flags = IORESOURCE_MEM, | ||
321 | }, | ||
322 | { | ||
323 | .name = "NP_IPC", | ||
324 | .start = 0x63500000, | ||
325 | .end = 0x63580000 - 1, | ||
326 | .flags = IORESOURCE_IO, | ||
327 | }, | ||
328 | /* | ||
329 | * Add other resources here | ||
330 | */ | ||
331 | { }, | ||
332 | }; | ||
333 | |||
334 | /* | ||
335 | * NON_DVR_CAPABLE CRONUS RESOURCES | ||
336 | */ | ||
337 | struct resource non_dvr_cronus_resources[] __initdata = | ||
338 | { | ||
339 | /* | ||
340 | * | ||
341 | * VIDEO1 / LX1 | ||
342 | * | ||
343 | */ | ||
344 | { | ||
345 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
346 | .start = 0x24000000, | ||
347 | .end = 0x241FFFFF, /* 2MiB */ | ||
348 | .flags = IORESOURCE_MEM, | ||
349 | }, | ||
350 | { | ||
351 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | ||
352 | .start = 0x24200000, | ||
353 | .end = 0x24201FFF, | ||
354 | .flags = IORESOURCE_MEM, | ||
355 | }, | ||
356 | { | ||
357 | .name = "MediaMemory1", | ||
358 | .start = 0x24202000, | ||
359 | .end = 0x25FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
360 | .flags = IORESOURCE_MEM, | ||
361 | }, | ||
362 | /* | ||
363 | * | ||
364 | * VIDEO2 / LX2 | ||
365 | * | ||
366 | */ | ||
367 | { | ||
368 | .name = "ST231bImage", /* Delta-Mu 2 image and ram */ | ||
369 | .start = 0x60000000, | ||
370 | .end = 0x601FFFFF, /* 2MiB */ | ||
371 | .flags = IORESOURCE_IO, | ||
372 | }, | ||
373 | { | ||
374 | .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ | ||
375 | .start = 0x60200000, | ||
376 | .end = 0x60201FFF, | ||
377 | .flags = IORESOURCE_IO, | ||
378 | }, | ||
379 | { | ||
380 | .name = "MediaMemory2", | ||
381 | .start = 0x60202000, | ||
382 | .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
383 | .flags = IORESOURCE_IO, | ||
384 | }, | ||
385 | /* | ||
386 | * | ||
387 | * Sysaudio Driver | ||
388 | * | ||
389 | * This driver requires: | ||
390 | * | ||
391 | * Arbitrary Based Buffers: | ||
392 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
393 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
394 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
395 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
396 | * | ||
397 | */ | ||
398 | { | ||
399 | .name = "DSP_Image_Buff", | ||
400 | .start = 0x00000000, | ||
401 | .end = 0x000FFFFF, | ||
402 | .flags = IORESOURCE_MEM, | ||
403 | }, | ||
404 | { | ||
405 | .name = "ADSC_CPU_PCM_Buff", | ||
406 | .start = 0x00000000, | ||
407 | .end = 0x00009FFF, | ||
408 | .flags = IORESOURCE_MEM, | ||
409 | }, | ||
410 | { | ||
411 | .name = "ADSC_AUX_Buff", | ||
412 | .start = 0x00000000, | ||
413 | .end = 0x00003FFF, | ||
414 | .flags = IORESOURCE_MEM, | ||
415 | }, | ||
416 | { | ||
417 | .name = "ADSC_Main_Buff", | ||
418 | .start = 0x00000000, | ||
419 | .end = 0x00003FFF, | ||
420 | .flags = IORESOURCE_MEM, | ||
421 | }, | ||
422 | /* | ||
423 | * | ||
424 | * STAVEM driver/STAPI | ||
425 | * | ||
426 | * This driver requires: | ||
427 | * | ||
428 | * Arbitrary Based Buffers: | ||
429 | * This memory area is used for allocating buffers for Video decoding | ||
430 | * purposes. Allocation/De-allocation within this buffer is managed | ||
431 | * by the STAVMEM driver of the STAPI. They could be Decimated | ||
432 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | ||
433 | * video decoding purposes, for any video decoders on Zeus. | ||
434 | * | ||
435 | */ | ||
436 | { | ||
437 | .name = "AVMEMPartition0", | ||
438 | .start = 0x63580000, | ||
439 | .end = 0x64180000 - 1, /* 12 MB total */ | ||
440 | .flags = IORESOURCE_IO, | ||
441 | }, | ||
442 | /* | ||
443 | * | ||
444 | * DOCSIS Subsystem | ||
445 | * | ||
446 | * This driver requires: | ||
447 | * | ||
448 | * Arbitrary Based Buffers: | ||
449 | * Docsis - | ||
450 | * | ||
451 | */ | ||
452 | { | ||
453 | .name = "Docsis", | ||
454 | .start = 0x62000000, | ||
455 | .end = 0x62700000 - 1, /* 7 MB total */ | ||
456 | .flags = IORESOURCE_IO, | ||
457 | }, | ||
458 | /* | ||
459 | * | ||
460 | * GHW HAL Driver | ||
461 | * | ||
462 | * This driver requires: | ||
463 | * | ||
464 | * Arbitrary Based Buffers: | ||
465 | * GraphicsHeap - PowerTV Graphics Heap | ||
466 | * | ||
467 | */ | ||
468 | { | ||
469 | .name = "GraphicsHeap", | ||
470 | .start = 0x62700000, | ||
471 | .end = 0x63500000 - 1, /* 14 MB total */ | ||
472 | .flags = IORESOURCE_IO, | ||
473 | }, | ||
474 | /* | ||
475 | * | ||
476 | * multi com buffer area | ||
477 | * | ||
478 | * This driver requires: | ||
479 | * | ||
480 | * Arbitrary Based Buffers: | ||
481 | * Docsis - | ||
482 | * | ||
483 | */ | ||
484 | { | ||
485 | .name = "MulticomSHM", | ||
486 | .start = 0x26000000, | ||
487 | .end = 0x26020000 - 1, | ||
488 | .flags = IORESOURCE_MEM, | ||
489 | }, | ||
490 | /* | ||
491 | * | ||
492 | * DMA Ring buffer | ||
493 | * | ||
494 | * This driver requires: | ||
495 | * | ||
496 | * Arbitrary Based Buffers: | ||
497 | * Docsis - | ||
498 | * | ||
499 | */ | ||
500 | { | ||
501 | .name = "BMM_Buffer", | ||
502 | .start = 0x00000000, | ||
503 | .end = 0x000AA000 - 1, | ||
504 | .flags = IORESOURCE_MEM, | ||
505 | }, | ||
506 | /* | ||
507 | * | ||
508 | * Display bins buffer for unit0 | ||
509 | * | ||
510 | * This driver requires: | ||
511 | * | ||
512 | * Arbitrary Based Buffers: | ||
513 | * Display Bins for unit0 | ||
514 | * | ||
515 | */ | ||
516 | { | ||
517 | .name = "DisplayBins0", | ||
518 | .start = 0x00000000, | ||
519 | .end = 0x00000FFF, /* 4 KB total */ | ||
520 | .flags = IORESOURCE_MEM, | ||
521 | }, | ||
522 | /* | ||
523 | * | ||
524 | * Display bins buffer | ||
525 | * | ||
526 | * This driver requires: | ||
527 | * | ||
528 | * Arbitrary Based Buffers: | ||
529 | * Display Bins for unit1 | ||
530 | * | ||
531 | */ | ||
532 | { | ||
533 | .name = "DisplayBins1", | ||
534 | .start = 0x64AD4000, | ||
535 | .end = 0x64AD5000 - 1, /* 4 KB total */ | ||
536 | .flags = IORESOURCE_IO, | ||
537 | }, | ||
538 | /* | ||
539 | * | ||
540 | * AVFS: player HAL memory | ||
541 | * | ||
542 | * | ||
543 | */ | ||
544 | { | ||
545 | .name = "AvfsDmaMem", | ||
546 | .start = 0x6430E000, | ||
547 | .end = 0x645D2C00 - 1, /* 945K * 3 for playback */ | ||
548 | .flags = IORESOURCE_IO, | ||
549 | }, | ||
550 | /* | ||
551 | * | ||
552 | * PMEM | ||
553 | * | ||
554 | * This driver requires: | ||
555 | * | ||
556 | * Arbitrary Based Buffers: | ||
557 | * Persistent memory for diagnostics. | ||
558 | * | ||
559 | */ | ||
560 | { | ||
561 | .name = "DiagPersistentMemory", | ||
562 | .start = 0x00000000, | ||
563 | .end = 0x10000 - 1, | ||
564 | .flags = IORESOURCE_MEM, | ||
565 | }, | ||
566 | /* | ||
567 | * | ||
568 | * Smartcard | ||
569 | * | ||
570 | * This driver requires: | ||
571 | * | ||
572 | * Arbitrary Based Buffers: | ||
573 | * Read and write buffers for Internal/External cards | ||
574 | * | ||
575 | */ | ||
576 | { | ||
577 | .name = "SmartCardInfo", | ||
578 | .start = 0x64AD1000, | ||
579 | .end = 0x64AD3800 - 1, | ||
580 | .flags = IORESOURCE_IO, | ||
581 | }, | ||
582 | /* | ||
583 | * | ||
584 | * KAVNET | ||
585 | * NP Reset Vector - must be of the form xxCxxxxx | ||
586 | * NP Image - must be video bank 1 | ||
587 | * NP IPC - must be video bank 2 | ||
588 | */ | ||
589 | { | ||
590 | .name = "NP_Reset_Vector", | ||
591 | .start = 0x27c00000, | ||
592 | .end = 0x27c01000 - 1, | ||
593 | .flags = IORESOURCE_MEM, | ||
594 | }, | ||
595 | { | ||
596 | .name = "NP_Image", | ||
597 | .start = 0x27020000, | ||
598 | .end = 0x27060000 - 1, | ||
599 | .flags = IORESOURCE_MEM, | ||
600 | }, | ||
601 | { | ||
602 | .name = "NP_IPC", | ||
603 | .start = 0x63500000, | ||
604 | .end = 0x63580000 - 1, | ||
605 | .flags = IORESOURCE_IO, | ||
606 | }, | ||
607 | { }, | ||
608 | }; | ||
diff --git a/arch/mips/powertv/asic/prealloc-cronuslite.c b/arch/mips/powertv/asic/prealloc-cronuslite.c new file mode 100644 index 000000000000..23a905613c04 --- /dev/null +++ b/arch/mips/powertv/asic/prealloc-cronuslite.c | |||
@@ -0,0 +1,290 @@ | |||
1 | /* | ||
2 | * Memory pre-allocations for Cronus Lite boxes. | ||
3 | * | ||
4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: Ken Eppinett | ||
21 | * David Schleef <ds@schleef.org> | ||
22 | */ | ||
23 | |||
24 | #include <linux/init.h> | ||
25 | #include <asm/mach-powertv/asic.h> | ||
26 | |||
27 | /* | ||
28 | * NON_DVR_CAPABLE CRONUSLITE RESOURCES | ||
29 | */ | ||
30 | struct resource non_dvr_cronuslite_resources[] __initdata = | ||
31 | { | ||
32 | /* | ||
33 | * | ||
34 | * VIDEO2 / LX2 | ||
35 | * | ||
36 | */ | ||
37 | { | ||
38 | .name = "ST231aImage", /* Delta-Mu 2 image and ram */ | ||
39 | .start = 0x60000000, | ||
40 | .end = 0x601FFFFF, /* 2MiB */ | ||
41 | .flags = IORESOURCE_IO, | ||
42 | }, | ||
43 | { | ||
44 | .name = "ST231aMonitor", /* 8KiB block ST231b monitor */ | ||
45 | .start = 0x60200000, | ||
46 | .end = 0x60201FFF, | ||
47 | .flags = IORESOURCE_IO, | ||
48 | }, | ||
49 | { | ||
50 | .name = "MediaMemory1", | ||
51 | .start = 0x60202000, | ||
52 | .end = 0x61FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
53 | .flags = IORESOURCE_IO, | ||
54 | }, | ||
55 | /* | ||
56 | * | ||
57 | * Sysaudio Driver | ||
58 | * | ||
59 | * This driver requires: | ||
60 | * | ||
61 | * Arbitrary Based Buffers: | ||
62 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
63 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
64 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
65 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
66 | * | ||
67 | */ | ||
68 | { | ||
69 | .name = "DSP_Image_Buff", | ||
70 | .start = 0x00000000, | ||
71 | .end = 0x000FFFFF, | ||
72 | .flags = IORESOURCE_MEM, | ||
73 | }, | ||
74 | { | ||
75 | .name = "ADSC_CPU_PCM_Buff", | ||
76 | .start = 0x00000000, | ||
77 | .end = 0x00009FFF, | ||
78 | .flags = IORESOURCE_MEM, | ||
79 | }, | ||
80 | { | ||
81 | .name = "ADSC_AUX_Buff", | ||
82 | .start = 0x00000000, | ||
83 | .end = 0x00003FFF, | ||
84 | .flags = IORESOURCE_MEM, | ||
85 | }, | ||
86 | { | ||
87 | .name = "ADSC_Main_Buff", | ||
88 | .start = 0x00000000, | ||
89 | .end = 0x00003FFF, | ||
90 | .flags = IORESOURCE_MEM, | ||
91 | }, | ||
92 | /* | ||
93 | * | ||
94 | * STAVEM driver/STAPI | ||
95 | * | ||
96 | * This driver requires: | ||
97 | * | ||
98 | * Arbitrary Based Buffers: | ||
99 | * This memory area is used for allocating buffers for Video decoding | ||
100 | * purposes. Allocation/De-allocation within this buffer is managed | ||
101 | * by the STAVMEM driver of the STAPI. They could be Decimated | ||
102 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | ||
103 | * video decoding purposes, for any video decoders on Zeus. | ||
104 | * | ||
105 | */ | ||
106 | { | ||
107 | .name = "AVMEMPartition0", | ||
108 | .start = 0x63580000, | ||
109 | .end = 0x63B80000 - 1, /* 6 MB total */ | ||
110 | .flags = IORESOURCE_IO, | ||
111 | }, | ||
112 | /* | ||
113 | * | ||
114 | * DOCSIS Subsystem | ||
115 | * | ||
116 | * This driver requires: | ||
117 | * | ||
118 | * Arbitrary Based Buffers: | ||
119 | * Docsis - | ||
120 | * | ||
121 | */ | ||
122 | { | ||
123 | .name = "Docsis", | ||
124 | .start = 0x62000000, | ||
125 | .end = 0x62700000 - 1, /* 7 MB total */ | ||
126 | .flags = IORESOURCE_IO, | ||
127 | }, | ||
128 | /* | ||
129 | * | ||
130 | * GHW HAL Driver | ||
131 | * | ||
132 | * This driver requires: | ||
133 | * | ||
134 | * Arbitrary Based Buffers: | ||
135 | * GraphicsHeap - PowerTV Graphics Heap | ||
136 | * | ||
137 | */ | ||
138 | { | ||
139 | .name = "GraphicsHeap", | ||
140 | .start = 0x62700000, | ||
141 | .end = 0x63500000 - 1, /* 14 MB total */ | ||
142 | .flags = IORESOURCE_IO, | ||
143 | }, | ||
144 | /* | ||
145 | * | ||
146 | * multi com buffer area | ||
147 | * | ||
148 | * This driver requires: | ||
149 | * | ||
150 | * Arbitrary Based Buffers: | ||
151 | * Docsis - | ||
152 | * | ||
153 | */ | ||
154 | { | ||
155 | .name = "MulticomSHM", | ||
156 | .start = 0x26000000, | ||
157 | .end = 0x26020000 - 1, | ||
158 | .flags = IORESOURCE_MEM, | ||
159 | }, | ||
160 | /* | ||
161 | * | ||
162 | * DMA Ring buffer | ||
163 | * | ||
164 | * This driver requires: | ||
165 | * | ||
166 | * Arbitrary Based Buffers: | ||
167 | * Docsis - | ||
168 | * | ||
169 | */ | ||
170 | { | ||
171 | .name = "BMM_Buffer", | ||
172 | .start = 0x00000000, | ||
173 | .end = 0x000AA000 - 1, | ||
174 | .flags = IORESOURCE_MEM, | ||
175 | }, | ||
176 | /* | ||
177 | * | ||
178 | * Display bins buffer for unit0 | ||
179 | * | ||
180 | * This driver requires: | ||
181 | * | ||
182 | * Arbitrary Based Buffers: | ||
183 | * Display Bins for unit0 | ||
184 | * | ||
185 | */ | ||
186 | { | ||
187 | .name = "DisplayBins0", | ||
188 | .start = 0x00000000, | ||
189 | .end = 0x00000FFF, /* 4 KB total */ | ||
190 | .flags = IORESOURCE_MEM, | ||
191 | }, | ||
192 | /* | ||
193 | * | ||
194 | * Display bins buffer | ||
195 | * | ||
196 | * This driver requires: | ||
197 | * | ||
198 | * Arbitrary Based Buffers: | ||
199 | * Display Bins for unit1 | ||
200 | * | ||
201 | */ | ||
202 | { | ||
203 | .name = "DisplayBins1", | ||
204 | .start = 0x63B83000, | ||
205 | .end = 0x63B84000 - 1, /* 4 KB total */ | ||
206 | .flags = IORESOURCE_IO, | ||
207 | }, | ||
208 | /* | ||
209 | * | ||
210 | * AVFS: player HAL memory | ||
211 | * | ||
212 | * | ||
213 | */ | ||
214 | { | ||
215 | .name = "AvfsDmaMem", | ||
216 | .start = 0x63B84000, | ||
217 | .end = 0x63E48C00 - 1, /* 945K * 3 for playback */ | ||
218 | .flags = IORESOURCE_IO, | ||
219 | }, | ||
220 | /* | ||
221 | * | ||
222 | * PMEM | ||
223 | * | ||
224 | * This driver requires: | ||
225 | * | ||
226 | * Arbitrary Based Buffers: | ||
227 | * Persistent memory for diagnostics. | ||
228 | * | ||
229 | */ | ||
230 | { | ||
231 | .name = "DiagPersistentMemory", | ||
232 | .start = 0x00000000, | ||
233 | .end = 0x10000 - 1, | ||
234 | .flags = IORESOURCE_MEM, | ||
235 | }, | ||
236 | /* | ||
237 | * | ||
238 | * Smartcard | ||
239 | * | ||
240 | * This driver requires: | ||
241 | * | ||
242 | * Arbitrary Based Buffers: | ||
243 | * Read and write buffers for Internal/External cards | ||
244 | * | ||
245 | */ | ||
246 | { | ||
247 | .name = "SmartCardInfo", | ||
248 | .start = 0x63B80000, | ||
249 | .end = 0x63B82800 - 1, | ||
250 | .flags = IORESOURCE_IO, | ||
251 | }, | ||
252 | /* | ||
253 | * | ||
254 | * KAVNET | ||
255 | * NP Reset Vector - must be of the form xxCxxxxx | ||
256 | * NP Image - must be video bank 1 | ||
257 | * NP IPC - must be video bank 2 | ||
258 | */ | ||
259 | { | ||
260 | .name = "NP_Reset_Vector", | ||
261 | .start = 0x27c00000, | ||
262 | .end = 0x27c01000 - 1, | ||
263 | .flags = IORESOURCE_MEM, | ||
264 | }, | ||
265 | { | ||
266 | .name = "NP_Image", | ||
267 | .start = 0x27020000, | ||
268 | .end = 0x27060000 - 1, | ||
269 | .flags = IORESOURCE_MEM, | ||
270 | }, | ||
271 | { | ||
272 | .name = "NP_IPC", | ||
273 | .start = 0x63500000, | ||
274 | .end = 0x63580000 - 1, | ||
275 | .flags = IORESOURCE_IO, | ||
276 | }, | ||
277 | /* | ||
278 | * NAND Flash | ||
279 | */ | ||
280 | { | ||
281 | .name = "NandFlash", | ||
282 | .start = NAND_FLASH_BASE, | ||
283 | .end = NAND_FLASH_BASE + 0x400 - 1, | ||
284 | .flags = IORESOURCE_IO, | ||
285 | }, | ||
286 | /* | ||
287 | * Add other resources here | ||
288 | */ | ||
289 | { }, | ||
290 | }; | ||
diff --git a/arch/mips/powertv/asic/prealloc-zeus.c b/arch/mips/powertv/asic/prealloc-zeus.c new file mode 100644 index 000000000000..018d4514dbe3 --- /dev/null +++ b/arch/mips/powertv/asic/prealloc-zeus.c | |||
@@ -0,0 +1,459 @@ | |||
1 | /* | ||
2 | * Memory pre-allocations for Zeus boxes. | ||
3 | * | ||
4 | * Copyright (C) 2005-2009 Scientific-Atlanta, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: Ken Eppinett | ||
21 | * David Schleef <ds@schleef.org> | ||
22 | */ | ||
23 | |||
24 | #include <linux/init.h> | ||
25 | #include <asm/mach-powertv/asic.h> | ||
26 | |||
27 | /* | ||
28 | * DVR_CAPABLE RESOURCES | ||
29 | */ | ||
30 | struct resource dvr_zeus_resources[] __initdata = | ||
31 | { | ||
32 | /* | ||
33 | * | ||
34 | * VIDEO1 / LX1 | ||
35 | * | ||
36 | */ | ||
37 | { | ||
38 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
39 | .start = 0x20000000, | ||
40 | .end = 0x201FFFFF, /* 2MiB */ | ||
41 | .flags = IORESOURCE_IO, | ||
42 | }, | ||
43 | { | ||
44 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | ||
45 | .start = 0x20200000, | ||
46 | .end = 0x20201FFF, | ||
47 | .flags = IORESOURCE_IO, | ||
48 | }, | ||
49 | { | ||
50 | .name = "MediaMemory1", | ||
51 | .start = 0x20202000, | ||
52 | .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
53 | .flags = IORESOURCE_IO, | ||
54 | }, | ||
55 | /* | ||
56 | * | ||
57 | * VIDEO2 / LX2 | ||
58 | * | ||
59 | */ | ||
60 | { | ||
61 | .name = "ST231bImage", /* Delta-Mu 2 image and ram */ | ||
62 | .start = 0x30000000, | ||
63 | .end = 0x301FFFFF, /* 2MiB */ | ||
64 | .flags = IORESOURCE_IO, | ||
65 | }, | ||
66 | { | ||
67 | .name = "ST231bMonitor", /* 8KiB block ST231b monitor */ | ||
68 | .start = 0x30200000, | ||
69 | .end = 0x30201FFF, | ||
70 | .flags = IORESOURCE_IO, | ||
71 | }, | ||
72 | { | ||
73 | .name = "MediaMemory2", | ||
74 | .start = 0x30202000, | ||
75 | .end = 0x31FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
76 | .flags = IORESOURCE_IO, | ||
77 | }, | ||
78 | /* | ||
79 | * | ||
80 | * Sysaudio Driver | ||
81 | * | ||
82 | * This driver requires: | ||
83 | * | ||
84 | * Arbitrary Based Buffers: | ||
85 | * DSP_Image_Buff - DSP code and data images (1MB) | ||
86 | * ADSC_CPU_PCM_Buff - ADSC CPU PCM buffer (40KB) | ||
87 | * ADSC_AUX_Buff - ADSC AUX buffer (16KB) | ||
88 | * ADSC_Main_Buff - ADSC Main buffer (16KB) | ||
89 | * | ||
90 | */ | ||
91 | { | ||
92 | .name = "DSP_Image_Buff", | ||
93 | .start = 0x00000000, | ||
94 | .end = 0x000FFFFF, | ||
95 | .flags = IORESOURCE_MEM, | ||
96 | }, | ||
97 | { | ||
98 | .name = "ADSC_CPU_PCM_Buff", | ||
99 | .start = 0x00000000, | ||
100 | .end = 0x00009FFF, | ||
101 | .flags = IORESOURCE_MEM, | ||
102 | }, | ||
103 | { | ||
104 | .name = "ADSC_AUX_Buff", | ||
105 | .start = 0x00000000, | ||
106 | .end = 0x00003FFF, | ||
107 | .flags = IORESOURCE_MEM, | ||
108 | }, | ||
109 | { | ||
110 | .name = "ADSC_Main_Buff", | ||
111 | .start = 0x00000000, | ||
112 | .end = 0x00003FFF, | ||
113 | .flags = IORESOURCE_MEM, | ||
114 | }, | ||
115 | /* | ||
116 | * | ||
117 | * STAVEM driver/STAPI | ||
118 | * | ||
119 | * This driver requires: | ||
120 | * | ||
121 | * Arbitrary Based Buffers: | ||
122 | * This memory area is used for allocating buffers for Video decoding | ||
123 | * purposes. Allocation/De-allocation within this buffer is managed | ||
124 | * by the STAVMEM driver of the STAPI. They could be Decimated | ||
125 | * Picture Buffers, Intermediate Buffers, as deemed necessary for | ||
126 | * video decoding purposes, for any video decoders on Zeus. | ||
127 | * | ||
128 | */ | ||
129 | { | ||
130 | .name = "AVMEMPartition0", | ||
131 | .start = 0x00000000, | ||
132 | .end = 0x00c00000 - 1, /* 12 MB total */ | ||
133 | .flags = IORESOURCE_MEM, | ||
134 | }, | ||
135 | /* | ||
136 | * | ||
137 | * DOCSIS Subsystem | ||
138 | * | ||
139 | * This driver requires: | ||
140 | * | ||
141 | * Arbitrary Based Buffers: | ||
142 | * Docsis - | ||
143 | * | ||
144 | */ | ||
145 | { | ||
146 | .name = "Docsis", | ||
147 | .start = 0x40100000, | ||
148 | .end = 0x407fffff, | ||
149 | .flags = IORESOURCE_MEM, | ||
150 | }, | ||
151 | /* | ||
152 | * | ||
153 | * GHW HAL Driver | ||
154 | * | ||
155 | * This driver requires: | ||
156 | * | ||
157 | * Arbitrary Based Buffers: | ||
158 | * GraphicsHeap - PowerTV Graphics Heap | ||
159 | * | ||
160 | */ | ||
161 | { | ||
162 | .name = "GraphicsHeap", | ||
163 | .start = 0x46900000, | ||
164 | .end = 0x47700000 - 1, /* 14 MB total */ | ||
165 | .flags = IORESOURCE_MEM, | ||
166 | }, | ||
167 | /* | ||
168 | * | ||
169 | * multi com buffer area | ||
170 | * | ||
171 | * This driver requires: | ||
172 | * | ||
173 | * Arbitrary Based Buffers: | ||
174 | * Docsis - | ||
175 | * | ||
176 | */ | ||
177 | { | ||
178 | .name = "MulticomSHM", | ||
179 | .start = 0x47900000, | ||
180 | .end = 0x47920000 - 1, | ||
181 | .flags = IORESOURCE_MEM, | ||
182 | }, | ||
183 | /* | ||
184 | * | ||
185 | * DMA Ring buffer | ||
186 | * | ||
187 | * This driver requires: | ||
188 | * | ||
189 | * Arbitrary Based Buffers: | ||
190 | * Docsis - | ||
191 | * | ||
192 | */ | ||
193 | { | ||
194 | .name = "BMM_Buffer", | ||
195 | .start = 0x00000000, | ||
196 | .end = 0x00280000 - 1, | ||
197 | .flags = IORESOURCE_MEM, | ||
198 | }, | ||
199 | /* | ||
200 | * | ||
201 | * Display bins buffer for unit0 | ||
202 | * | ||
203 | * This driver requires: | ||
204 | * | ||
205 | * Arbitrary Based Buffers: | ||
206 | * Display Bins for unit0 | ||
207 | * | ||
208 | */ | ||
209 | { | ||
210 | .name = "DisplayBins0", | ||
211 | .start = 0x00000000, | ||
212 | .end = 0x00000FFF, /* 4 KB total */ | ||
213 | .flags = IORESOURCE_MEM, | ||
214 | }, | ||
215 | /* | ||
216 | * | ||
217 | * Display bins buffer | ||
218 | * | ||
219 | * This driver requires: | ||
220 | * | ||
221 | * Arbitrary Based Buffers: | ||
222 | * Display Bins for unit1 | ||
223 | * | ||
224 | */ | ||
225 | { | ||
226 | .name = "DisplayBins1", | ||
227 | .start = 0x00000000, | ||
228 | .end = 0x00000FFF, /* 4 KB total */ | ||
229 | .flags = IORESOURCE_MEM, | ||
230 | }, | ||
231 | /* | ||
232 | * | ||
233 | * ITFS | ||
234 | * | ||
235 | * This driver requires: | ||
236 | * | ||
237 | * Arbitrary Based Buffers: | ||
238 | * Docsis - | ||
239 | * | ||
240 | */ | ||
241 | { | ||
242 | .name = "ITFS", | ||
243 | .start = 0x00000000, | ||
244 | /* 815,104 bytes each for 2 ITFS partitions. */ | ||
245 | .end = 0x0018DFFF, | ||
246 | .flags = IORESOURCE_MEM, | ||
247 | }, | ||
248 | /* | ||
249 | * | ||
250 | * AVFS | ||
251 | * | ||
252 | * This driver requires: | ||
253 | * | ||
254 | * Arbitrary Based Buffers: | ||
255 | * Docsis - | ||
256 | * | ||
257 | */ | ||
258 | { | ||
259 | .name = "AvfsDmaMem", | ||
260 | .start = 0x00000000, | ||
261 | /* (945K * 8) = (128K * 3) 5 playbacks / 3 server */ | ||
262 | .end = 0x007c2000 - 1, | ||
263 | .flags = IORESOURCE_MEM, | ||
264 | }, | ||
265 | { | ||
266 | .name = "AvfsFileSys", | ||
267 | .start = 0x00000000, | ||
268 | .end = 0x00001000 - 1, /* 4K */ | ||
269 | .flags = IORESOURCE_MEM, | ||
270 | }, | ||
271 | /* | ||
272 | * | ||
273 | * PMEM | ||
274 | * | ||
275 | * This driver requires: | ||
276 | * | ||
277 | * Arbitrary Based Buffers: | ||
278 | * Persistent memory for diagnostics. | ||
279 | * | ||
280 | */ | ||
281 | { | ||
282 | .name = "DiagPersistentMemory", | ||
283 | .start = 0x00000000, | ||
284 | .end = 0x10000 - 1, | ||
285 | .flags = IORESOURCE_MEM, | ||
286 | }, | ||
287 | /* | ||
288 | * | ||
289 | * Smartcard | ||
290 | * | ||
291 | * This driver requires: | ||
292 | * | ||
293 | * Arbitrary Based Buffers: | ||
294 | * Read and write buffers for Internal/External cards | ||
295 | * | ||
296 | */ | ||
297 | { | ||
298 | .name = "SmartCardInfo", | ||
299 | .start = 0x00000000, | ||
300 | .end = 0x2800 - 1, | ||
301 | .flags = IORESOURCE_MEM, | ||
302 | }, | ||
303 | /* | ||
304 | * Add other resources here | ||
305 | */ | ||
306 | { }, | ||
307 | }; | ||
308 | |||
309 | /* | ||
310 | * NON_DVR_CAPABLE ZEUS RESOURCES | ||
311 | */ | ||
312 | struct resource non_dvr_zeus_resources[] __initdata = | ||
313 | { | ||
314 | /* | ||
315 | * VIDEO1 / LX1 | ||
316 | */ | ||
317 | { | ||
318 | .name = "ST231aImage", /* Delta-Mu 1 image and ram */ | ||
319 | .start = 0x20000000, | ||
320 | .end = 0x201FFFFF, /* 2MiB */ | ||
321 | .flags = IORESOURCE_IO, | ||
322 | }, | ||
323 | { | ||
324 | .name = "ST231aMonitor", /* 8KiB block ST231a monitor */ | ||
325 | .start = 0x20200000, | ||
326 | .end = 0x20201FFF, | ||
327 | .flags = IORESOURCE_IO, | ||
328 | }, | ||
329 | { | ||
330 | .name = "MediaMemory1", | ||
331 | .start = 0x20202000, | ||
332 | .end = 0x21FFFFFF, /*~29.9MiB (32MiB - (2MiB + 8KiB)) */ | ||
333 | .flags = IORESOURCE_IO, | ||
334 | }, | ||
335 | /* | ||
336 | * Sysaudio Driver | ||
337 | */ | ||
338 | { | ||
339 | .name = "DSP_Image_Buff", | ||
340 | .start = 0x00000000, | ||
341 | .end = 0x000FFFFF, | ||
342 | .flags = IORESOURCE_MEM, | ||
343 | }, | ||
344 | { | ||
345 | .name = "ADSC_CPU_PCM_Buff", | ||
346 | .start = 0x00000000, | ||
347 | .end = 0x00009FFF, | ||
348 | .flags = IORESOURCE_MEM, | ||
349 | }, | ||
350 | { | ||
351 | .name = "ADSC_AUX_Buff", | ||
352 | .start = 0x00000000, | ||
353 | .end = 0x00003FFF, | ||
354 | .flags = IORESOURCE_MEM, | ||
355 | }, | ||
356 | { | ||
357 | .name = "ADSC_Main_Buff", | ||
358 | .start = 0x00000000, | ||
359 | .end = 0x00003FFF, | ||
360 | .flags = IORESOURCE_MEM, | ||
361 | }, | ||
362 | /* | ||
363 | * STAVEM driver/STAPI | ||
364 | */ | ||
365 | { | ||
366 | .name = "AVMEMPartition0", | ||
367 | .start = 0x00000000, | ||
368 | .end = 0x00600000 - 1, /* 6 MB total */ | ||
369 | .flags = IORESOURCE_MEM, | ||
370 | }, | ||
371 | /* | ||
372 | * DOCSIS Subsystem | ||
373 | */ | ||
374 | { | ||
375 | .name = "Docsis", | ||
376 | .start = 0x40100000, | ||
377 | .end = 0x407fffff, | ||
378 | .flags = IORESOURCE_MEM, | ||
379 | }, | ||
380 | /* | ||
381 | * GHW HAL Driver | ||
382 | */ | ||
383 | { | ||
384 | .name = "GraphicsHeap", | ||
385 | .start = 0x46900000, | ||
386 | .end = 0x47700000 - 1, /* 14 MB total */ | ||
387 | .flags = IORESOURCE_MEM, | ||
388 | }, | ||
389 | /* | ||
390 | * multi com buffer area | ||
391 | */ | ||
392 | { | ||
393 | .name = "MulticomSHM", | ||
394 | .start = 0x47900000, | ||
395 | .end = 0x47920000 - 1, | ||
396 | .flags = IORESOURCE_MEM, | ||
397 | }, | ||
398 | /* | ||
399 | * DMA Ring buffer | ||
400 | */ | ||
401 | { | ||
402 | .name = "BMM_Buffer", | ||
403 | .start = 0x00000000, | ||
404 | .end = 0x00280000 - 1, | ||
405 | .flags = IORESOURCE_MEM, | ||
406 | }, | ||
407 | /* | ||
408 | * Display bins buffer for unit0 | ||
409 | */ | ||
410 | { | ||
411 | .name = "DisplayBins0", | ||
412 | .start = 0x00000000, | ||
413 | .end = 0x00000FFF, /* 4 KB total */ | ||
414 | .flags = IORESOURCE_MEM, | ||
415 | }, | ||
416 | /* | ||
417 | * | ||
418 | * AVFS: player HAL memory | ||
419 | * | ||
420 | * | ||
421 | */ | ||
422 | { | ||
423 | .name = "AvfsDmaMem", | ||
424 | .start = 0x00000000, | ||
425 | .end = 0x002c4c00 - 1, /* 945K * 3 for playback */ | ||
426 | .flags = IORESOURCE_MEM, | ||
427 | }, | ||
428 | /* | ||
429 | * PMEM | ||
430 | */ | ||
431 | { | ||
432 | .name = "DiagPersistentMemory", | ||
433 | .start = 0x00000000, | ||
434 | .end = 0x10000 - 1, | ||
435 | .flags = IORESOURCE_MEM, | ||
436 | }, | ||
437 | /* | ||
438 | * Smartcard | ||
439 | */ | ||
440 | { | ||
441 | .name = "SmartCardInfo", | ||
442 | .start = 0x00000000, | ||
443 | .end = 0x2800 - 1, | ||
444 | .flags = IORESOURCE_MEM, | ||
445 | }, | ||
446 | /* | ||
447 | * NAND Flash | ||
448 | */ | ||
449 | { | ||
450 | .name = "NandFlash", | ||
451 | .start = NAND_FLASH_BASE, | ||
452 | .end = NAND_FLASH_BASE + 0x400 - 1, | ||
453 | .flags = IORESOURCE_IO, | ||
454 | }, | ||
455 | /* | ||
456 | * Add other resources here | ||
457 | */ | ||
458 | { }, | ||
459 | }; | ||
diff --git a/arch/mips/powertv/cmdline.c b/arch/mips/powertv/cmdline.c new file mode 100644 index 000000000000..98d73cb0d452 --- /dev/null +++ b/arch/mips/powertv/cmdline.c | |||
@@ -0,0 +1,52 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can distribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License (Version 2) as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
13 | * for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along | ||
16 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
18 | * | ||
19 | * Kernel command line creation using the prom monitor (YAMON) argc/argv. | ||
20 | */ | ||
21 | #include <linux/init.h> | ||
22 | #include <linux/string.h> | ||
23 | |||
24 | #include <asm/bootinfo.h> | ||
25 | |||
26 | #include "init.h" | ||
27 | |||
28 | /* | ||
29 | * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer. | ||
30 | * This macro take care of sign extension. | ||
31 | */ | ||
32 | #define prom_argv(index) ((char *)(long)_prom_argv[(index)]) | ||
33 | |||
34 | char * __init prom_getcmdline(void) | ||
35 | { | ||
36 | return &(arcs_cmdline[0]); | ||
37 | } | ||
38 | |||
39 | void __init prom_init_cmdline(void) | ||
40 | { | ||
41 | int len; | ||
42 | |||
43 | if (prom_argc != 1) | ||
44 | return; | ||
45 | |||
46 | len = strlen(arcs_cmdline); | ||
47 | |||
48 | arcs_cmdline[len] = ' '; | ||
49 | |||
50 | strlcpy(arcs_cmdline + len + 1, (char *)_prom_argv, | ||
51 | COMMAND_LINE_SIZE - len - 1); | ||
52 | } | ||
diff --git a/arch/mips/powertv/init.c b/arch/mips/powertv/init.c new file mode 100644 index 000000000000..5f4e4c304e48 --- /dev/null +++ b/arch/mips/powertv/init.c | |||
@@ -0,0 +1,128 @@ | |||
1 | /* | ||
2 | * Copyright (C) 1999, 2000, 2004, 2005 MIPS Technologies, Inc. | ||
3 | * All rights reserved. | ||
4 | * Authors: Carsten Langgaard <carstenl@mips.com> | ||
5 | * Maciej W. Rozycki <macro@mips.com> | ||
6 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
7 | * | ||
8 | * This program is free software; you can distribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License (Version 2) as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
15 | * for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along | ||
18 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
19 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
20 | * | ||
21 | * PROM library initialisation code. | ||
22 | */ | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/string.h> | ||
25 | #include <linux/kernel.h> | ||
26 | |||
27 | #include <asm/bootinfo.h> | ||
28 | #include <linux/io.h> | ||
29 | #include <asm/system.h> | ||
30 | #include <asm/cacheflush.h> | ||
31 | #include <asm/traps.h> | ||
32 | |||
33 | #include <asm/mips-boards/prom.h> | ||
34 | #include <asm/mips-boards/generic.h> | ||
35 | #include <asm/mach-powertv/asic.h> | ||
36 | |||
37 | #include "init.h" | ||
38 | |||
39 | int prom_argc; | ||
40 | int *_prom_argv, *_prom_envp; | ||
41 | unsigned long _prom_memsize; | ||
42 | |||
43 | /* | ||
44 | * YAMON (32-bit PROM) pass arguments and environment as 32-bit pointer. | ||
45 | * This macro take care of sign extension, if running in 64-bit mode. | ||
46 | */ | ||
47 | #define prom_envp(index) ((char *)(long)_prom_envp[(index)]) | ||
48 | |||
49 | char *prom_getenv(char *envname) | ||
50 | { | ||
51 | char *result = NULL; | ||
52 | |||
53 | if (_prom_envp != NULL) { | ||
54 | /* | ||
55 | * Return a pointer to the given environment variable. | ||
56 | * In 64-bit mode: we're using 64-bit pointers, but all pointers | ||
57 | * in the PROM structures are only 32-bit, so we need some | ||
58 | * workarounds, if we are running in 64-bit mode. | ||
59 | */ | ||
60 | int i, index = 0; | ||
61 | |||
62 | i = strlen(envname); | ||
63 | |||
64 | while (prom_envp(index)) { | ||
65 | if (strncmp(envname, prom_envp(index), i) == 0) { | ||
66 | result = prom_envp(index + 1); | ||
67 | break; | ||
68 | } | ||
69 | index += 2; | ||
70 | } | ||
71 | } | ||
72 | |||
73 | return result; | ||
74 | } | ||
75 | |||
76 | /* TODO: Verify on linux-mips mailing list that the following two */ | ||
77 | /* functions are correct */ | ||
78 | /* TODO: Copy NMI and EJTAG exception vectors to memory from the */ | ||
79 | /* BootROM exception vectors. Flush their cache entries. test it. */ | ||
80 | |||
81 | static void __init mips_nmi_setup(void) | ||
82 | { | ||
83 | void *base; | ||
84 | #if defined(CONFIG_CPU_MIPS32_R1) | ||
85 | base = cpu_has_veic ? | ||
86 | (void *)(CAC_BASE + 0xa80) : | ||
87 | (void *)(CAC_BASE + 0x380); | ||
88 | #elif defined(CONFIG_CPU_MIPS32_R2) | ||
89 | base = (void *)0xbfc00000; | ||
90 | #else | ||
91 | #error NMI exception handler address not defined | ||
92 | #endif | ||
93 | } | ||
94 | |||
95 | static void __init mips_ejtag_setup(void) | ||
96 | { | ||
97 | void *base; | ||
98 | |||
99 | #if defined(CONFIG_CPU_MIPS32_R1) | ||
100 | base = cpu_has_veic ? | ||
101 | (void *)(CAC_BASE + 0xa00) : | ||
102 | (void *)(CAC_BASE + 0x300); | ||
103 | #elif defined(CONFIG_CPU_MIPS32_R2) | ||
104 | base = (void *)0xbfc00480; | ||
105 | #else | ||
106 | #error EJTAG exception handler address not defined | ||
107 | #endif | ||
108 | } | ||
109 | |||
110 | void __init prom_init(void) | ||
111 | { | ||
112 | prom_argc = fw_arg0; | ||
113 | _prom_argv = (int *) fw_arg1; | ||
114 | _prom_envp = (int *) fw_arg2; | ||
115 | _prom_memsize = (unsigned long) fw_arg3; | ||
116 | |||
117 | board_nmi_handler_setup = mips_nmi_setup; | ||
118 | board_ejtag_handler_setup = mips_ejtag_setup; | ||
119 | |||
120 | pr_info("\nLINUX started...\n"); | ||
121 | prom_init_cmdline(); | ||
122 | configure_platform(); | ||
123 | prom_meminit(); | ||
124 | |||
125 | #ifndef CONFIG_BOOTLOADER_DRIVER | ||
126 | pr_info("\nBootloader driver isn't loaded...\n"); | ||
127 | #endif | ||
128 | } | ||
diff --git a/arch/mips/powertv/init.h b/arch/mips/powertv/init.h new file mode 100644 index 000000000000..7af6bf25008c --- /dev/null +++ b/arch/mips/powertv/init.h | |||
@@ -0,0 +1,28 @@ | |||
1 | /* | ||
2 | * Definitions from powertv init.c file | ||
3 | * | ||
4 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: David VomLehn | ||
21 | */ | ||
22 | |||
23 | #ifndef _POWERTV_INIT_H | ||
24 | #define _POWERTV_INIT_H | ||
25 | extern int prom_argc; | ||
26 | extern int *_prom_argv; | ||
27 | extern unsigned long _prom_memsize; | ||
28 | #endif | ||
diff --git a/arch/mips/powertv/memory.c b/arch/mips/powertv/memory.c new file mode 100644 index 000000000000..28d06605fff6 --- /dev/null +++ b/arch/mips/powertv/memory.c | |||
@@ -0,0 +1,186 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can distribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License (Version 2) as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
13 | * for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along | ||
16 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
18 | * | ||
19 | * Apparently originally from arch/mips/malta-memory.c. Modified to work | ||
20 | * with the PowerTV bootloader. | ||
21 | */ | ||
22 | #include <linux/init.h> | ||
23 | #include <linux/mm.h> | ||
24 | #include <linux/bootmem.h> | ||
25 | #include <linux/pfn.h> | ||
26 | #include <linux/string.h> | ||
27 | |||
28 | #include <asm/bootinfo.h> | ||
29 | #include <asm/page.h> | ||
30 | #include <asm/sections.h> | ||
31 | |||
32 | #include <asm/mips-boards/prom.h> | ||
33 | |||
34 | #include "init.h" | ||
35 | |||
36 | /* Memory constants */ | ||
37 | #define KIBIBYTE(n) ((n) * 1024) /* Number of kibibytes */ | ||
38 | #define MEBIBYTE(n) ((n) * KIBIBYTE(1024)) /* Number of mebibytes */ | ||
39 | #define DEFAULT_MEMSIZE MEBIBYTE(256) /* If no memsize provided */ | ||
40 | #define LOW_MEM_MAX MEBIBYTE(252) /* Max usable low mem */ | ||
41 | #define RES_BOOTLDR_MEMSIZE MEBIBYTE(1) /* Memory reserved for bldr */ | ||
42 | #define BOOT_MEM_SIZE KIBIBYTE(256) /* Memory reserved for bldr */ | ||
43 | #define PHYS_MEM_START 0x10000000 /* Start of physical memory */ | ||
44 | |||
45 | unsigned long ptv_memsize; | ||
46 | |||
47 | char __initdata cmdline[COMMAND_LINE_SIZE]; | ||
48 | |||
49 | void __init prom_meminit(void) | ||
50 | { | ||
51 | char *memsize_str; | ||
52 | unsigned long memsize = 0; | ||
53 | unsigned int physend; | ||
54 | char *ptr; | ||
55 | int low_mem; | ||
56 | int high_mem; | ||
57 | |||
58 | /* Check the command line first for a memsize directive */ | ||
59 | strcpy(cmdline, arcs_cmdline); | ||
60 | ptr = strstr(cmdline, "memsize="); | ||
61 | if (ptr && (ptr != cmdline) && (*(ptr - 1) != ' ')) | ||
62 | ptr = strstr(ptr, " memsize="); | ||
63 | |||
64 | if (ptr) { | ||
65 | memsize = memparse(ptr + 8, &ptr); | ||
66 | } else { | ||
67 | /* otherwise look in the environment */ | ||
68 | memsize_str = prom_getenv("memsize"); | ||
69 | |||
70 | if (memsize_str != NULL) { | ||
71 | pr_info("prom memsize = %s\n", memsize_str); | ||
72 | memsize = simple_strtol(memsize_str, NULL, 0); | ||
73 | } | ||
74 | |||
75 | if (memsize == 0) { | ||
76 | if (_prom_memsize != 0) { | ||
77 | memsize = _prom_memsize; | ||
78 | pr_info("_prom_memsize = 0x%lx\n", memsize); | ||
79 | /* add in memory that the bootloader doesn't | ||
80 | * report */ | ||
81 | memsize += BOOT_MEM_SIZE; | ||
82 | } else { | ||
83 | memsize = DEFAULT_MEMSIZE; | ||
84 | pr_info("Memsize not passed by bootloader, " | ||
85 | "defaulting to 0x%lx\n", memsize); | ||
86 | } | ||
87 | } | ||
88 | } | ||
89 | |||
90 | /* Store memsize for diagnostic purposes */ | ||
91 | ptv_memsize = memsize; | ||
92 | |||
93 | physend = PFN_ALIGN(&_end) - 0x80000000; | ||
94 | if (memsize > LOW_MEM_MAX) { | ||
95 | low_mem = LOW_MEM_MAX; | ||
96 | high_mem = memsize - low_mem; | ||
97 | } else { | ||
98 | low_mem = memsize; | ||
99 | high_mem = 0; | ||
100 | } | ||
101 | |||
102 | /* | ||
103 | * TODO: We will use the hard code for memory configuration until | ||
104 | * the bootloader releases their device tree to us. | ||
105 | */ | ||
106 | /* | ||
107 | * Add the memory reserved for use by the bootloader to the | ||
108 | * memory map. | ||
109 | */ | ||
110 | add_memory_region(PHYS_MEM_START, RES_BOOTLDR_MEMSIZE, | ||
111 | BOOT_MEM_RESERVED); | ||
112 | #ifdef CONFIG_HIGHMEM_256_128 | ||
113 | /* | ||
114 | * Add memory in low for general use by the kernel and its friends | ||
115 | * (like drivers, applications, etc). | ||
116 | */ | ||
117 | add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE, | ||
118 | LOW_MEM_MAX - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM); | ||
119 | /* | ||
120 | * Add the memory reserved for reset vector. | ||
121 | */ | ||
122 | add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED); | ||
123 | /* | ||
124 | * Add the memory reserved. | ||
125 | */ | ||
126 | add_memory_region(0x20000000, MEBIBYTE(1024 + 75), BOOT_MEM_RESERVED); | ||
127 | /* | ||
128 | * Add memory in high for general use by the kernel and its friends | ||
129 | * (like drivers, applications, etc). | ||
130 | * | ||
131 | * 75MB is reserved for devices which are using the memory in high. | ||
132 | */ | ||
133 | add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75), | ||
134 | BOOT_MEM_RAM); | ||
135 | #elif defined CONFIG_HIGHMEM_128_128 | ||
136 | /* | ||
137 | * Add memory in low for general use by the kernel and its friends | ||
138 | * (like drivers, applications, etc). | ||
139 | */ | ||
140 | add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE, | ||
141 | MEBIBYTE(128) - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM); | ||
142 | /* | ||
143 | * Add the memory reserved. | ||
144 | */ | ||
145 | add_memory_region(PHYS_MEM_START + MEBIBYTE(128), | ||
146 | MEBIBYTE(128 + 1024 + 75), BOOT_MEM_RESERVED); | ||
147 | /* | ||
148 | * Add memory in high for general use by the kernel and its friends | ||
149 | * (like drivers, applications, etc). | ||
150 | * | ||
151 | * 75MB is reserved for devices which are using the memory in high. | ||
152 | */ | ||
153 | add_memory_region(0x60000000 + MEBIBYTE(75), MEBIBYTE(128 - 75), | ||
154 | BOOT_MEM_RAM); | ||
155 | #else | ||
156 | /* Add low memory regions for either: | ||
157 | * - no-highmemory configuration case -OR- | ||
158 | * - highmemory "HIGHMEM_LOWBANK_ONLY" case | ||
159 | */ | ||
160 | /* | ||
161 | * Add memory for general use by the kernel and its friends | ||
162 | * (like drivers, applications, etc). | ||
163 | */ | ||
164 | add_memory_region(PHYS_MEM_START + RES_BOOTLDR_MEMSIZE, | ||
165 | low_mem - RES_BOOTLDR_MEMSIZE, BOOT_MEM_RAM); | ||
166 | /* | ||
167 | * Add the memory reserved for reset vector. | ||
168 | */ | ||
169 | add_memory_region(0x1fc00000, MEBIBYTE(4), BOOT_MEM_RESERVED); | ||
170 | #endif | ||
171 | } | ||
172 | |||
173 | void __init prom_free_prom_memory(void) | ||
174 | { | ||
175 | unsigned long addr; | ||
176 | int i; | ||
177 | |||
178 | for (i = 0; i < boot_mem_map.nr_map; i++) { | ||
179 | if (boot_mem_map.map[i].type != BOOT_MEM_ROM_DATA) | ||
180 | continue; | ||
181 | |||
182 | addr = boot_mem_map.map[i].addr; | ||
183 | free_init_pages("prom memory", | ||
184 | addr, addr + boot_mem_map.map[i].size); | ||
185 | } | ||
186 | } | ||
diff --git a/arch/mips/powertv/pci/Makefile b/arch/mips/powertv/pci/Makefile new file mode 100644 index 000000000000..f5c62462fc9d --- /dev/null +++ b/arch/mips/powertv/pci/Makefile | |||
@@ -0,0 +1,21 @@ | |||
1 | # | ||
2 | # Copyright (C) 2009 Scientific-Atlanta, Inc. | ||
3 | # | ||
4 | # This program is free software; you can redistribute it and/or modify | ||
5 | # it under the terms of the GNU General Public License as published by | ||
6 | # the Free Software Foundation; either version 2 of the License, or | ||
7 | # (at your option) any later version. | ||
8 | # | ||
9 | # This program is distributed in the hope that it will be useful, | ||
10 | # but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | # MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | # GNU General Public License for more details. | ||
13 | # | ||
14 | # You should have received a copy of the GNU General Public License | ||
15 | # along with this program; if not, write to the Free Software | ||
16 | # Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | # | ||
18 | |||
19 | obj-$(CONFIG_PCI) += fixup-powertv.o | ||
20 | |||
21 | EXTRA_CFLAGS += -Wall -Werror | ||
diff --git a/arch/mips/powertv/pci/fixup-powertv.c b/arch/mips/powertv/pci/fixup-powertv.c new file mode 100644 index 000000000000..726bc2e824b3 --- /dev/null +++ b/arch/mips/powertv/pci/fixup-powertv.c | |||
@@ -0,0 +1,36 @@ | |||
1 | #include <linux/init.h> | ||
2 | #include <linux/pci.h> | ||
3 | #include <asm/mach-powertv/interrupts.h> | ||
4 | #include "powertv-pci.h" | ||
5 | |||
6 | int __init pcibios_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | ||
7 | { | ||
8 | return asic_pcie_map_irq(dev, slot, pin); | ||
9 | } | ||
10 | |||
11 | /* Do platform specific device initialization at pci_enable_device() time */ | ||
12 | int pcibios_plat_dev_init(struct pci_dev *dev) | ||
13 | { | ||
14 | return 0; | ||
15 | } | ||
16 | |||
17 | /* | ||
18 | * asic_pcie_map_irq | ||
19 | * | ||
20 | * Parameters: | ||
21 | * *dev - pointer to a pci_dev structure (not used) | ||
22 | * slot - slot number (not used) | ||
23 | * pin - pin number (not used) | ||
24 | * | ||
25 | * Return Value: | ||
26 | * Returns: IRQ number (always the PCI Express IRQ number) | ||
27 | * | ||
28 | * Description: | ||
29 | * asic_pcie_map_irq will return the IRQ number of the PCI Express interrupt. | ||
30 | * | ||
31 | */ | ||
32 | int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin) | ||
33 | { | ||
34 | return irq_pciexp; | ||
35 | } | ||
36 | EXPORT_SYMBOL(asic_pcie_map_irq); | ||
diff --git a/arch/mips/powertv/pci/powertv-pci.h b/arch/mips/powertv/pci/powertv-pci.h new file mode 100644 index 000000000000..1b5886bbd759 --- /dev/null +++ b/arch/mips/powertv/pci/powertv-pci.h | |||
@@ -0,0 +1,31 @@ | |||
1 | /* | ||
2 | * powertv-pci.c | ||
3 | * | ||
4 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | */ | ||
20 | /* | ||
21 | * Local definitions for the powertv PCI code | ||
22 | */ | ||
23 | |||
24 | #ifndef _POWERTV_PCI_POWERTV_PCI_H_ | ||
25 | #define _POWERTV_PCI_POWERTV_PCI_H_ | ||
26 | extern int asic_pcie_map_irq(const struct pci_dev *dev, u8 slot, u8 pin); | ||
27 | extern int asic_pcie_init(void); | ||
28 | extern int asic_pcie_init(void); | ||
29 | |||
30 | extern int log_level; | ||
31 | #endif | ||
diff --git a/arch/mips/powertv/powertv-clock.h b/arch/mips/powertv/powertv-clock.h new file mode 100644 index 000000000000..d94c54311485 --- /dev/null +++ b/arch/mips/powertv/powertv-clock.h | |||
@@ -0,0 +1,26 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
3 | * | ||
4 | * This program is free software; you can redistribute it and/or modify | ||
5 | * it under the terms of the GNU General Public License as published by | ||
6 | * the Free Software Foundation; either version 2 of the License, or | ||
7 | * (at your option) any later version. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
12 | * GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
17 | * | ||
18 | * Author: David VomLehn | ||
19 | */ | ||
20 | |||
21 | #ifndef _POWERTV_POWERTV_CLOCK_H | ||
22 | #define _POWERTV_POWERTV_CLOCK_H | ||
23 | extern int powertv_clockevent_init(void); | ||
24 | extern void powertv_clocksource_init(void); | ||
25 | extern unsigned int mips_get_pll_freq(void); | ||
26 | #endif | ||
diff --git a/arch/mips/powertv/powertv_setup.c b/arch/mips/powertv/powertv_setup.c new file mode 100644 index 000000000000..bd8ebf128f29 --- /dev/null +++ b/arch/mips/powertv/powertv_setup.c | |||
@@ -0,0 +1,351 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can distribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License (Version 2) as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
13 | * for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along | ||
16 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
18 | */ | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/sched.h> | ||
21 | #include <linux/ioport.h> | ||
22 | #include <linux/pci.h> | ||
23 | #include <linux/screen_info.h> | ||
24 | #include <linux/notifier.h> | ||
25 | #include <linux/etherdevice.h> | ||
26 | #include <linux/if_ether.h> | ||
27 | #include <linux/ctype.h> | ||
28 | |||
29 | #include <linux/cpu.h> | ||
30 | #include <asm/bootinfo.h> | ||
31 | #include <asm/irq.h> | ||
32 | #include <asm/mips-boards/generic.h> | ||
33 | #include <asm/mips-boards/prom.h> | ||
34 | #include <asm/dma.h> | ||
35 | #include <linux/time.h> | ||
36 | #include <asm/traps.h> | ||
37 | #include <asm/asm-offsets.h> | ||
38 | #include "reset.h" | ||
39 | |||
40 | #define VAL(n) STR(n) | ||
41 | |||
42 | /* | ||
43 | * Macros for loading addresses and storing registers: | ||
44 | * PTR_LA Load the address into a register | ||
45 | * LONG_S Store the full width of the given register. | ||
46 | * LONG_L Load the full width of the given register | ||
47 | * PTR_ADDIU Add a constant value to a register used as a pointer | ||
48 | * REG_SIZE Number of 8-bit bytes in a full width register | ||
49 | */ | ||
50 | #ifdef CONFIG_64BIT | ||
51 | #warning TODO: 64-bit code needs to be verified | ||
52 | #define PTR_LA "dla " | ||
53 | #define LONG_S "sd " | ||
54 | #define LONG_L "ld " | ||
55 | #define PTR_ADDIU "daddiu " | ||
56 | #define REG_SIZE "8" /* In bytes */ | ||
57 | #endif | ||
58 | |||
59 | #ifdef CONFIG_32BIT | ||
60 | #define PTR_LA "la " | ||
61 | #define LONG_S "sw " | ||
62 | #define LONG_L "lw " | ||
63 | #define PTR_ADDIU "addiu " | ||
64 | #define REG_SIZE "4" /* In bytes */ | ||
65 | #endif | ||
66 | |||
67 | static struct pt_regs die_regs; | ||
68 | static bool have_die_regs; | ||
69 | |||
70 | static void register_panic_notifier(void); | ||
71 | static int panic_handler(struct notifier_block *notifier_block, | ||
72 | unsigned long event, void *cause_string); | ||
73 | |||
74 | const char *get_system_type(void) | ||
75 | { | ||
76 | return "PowerTV"; | ||
77 | } | ||
78 | |||
79 | void __init plat_mem_setup(void) | ||
80 | { | ||
81 | panic_on_oops = 1; | ||
82 | register_panic_notifier(); | ||
83 | |||
84 | #if 0 | ||
85 | mips_pcibios_init(); | ||
86 | #endif | ||
87 | mips_reboot_setup(); | ||
88 | } | ||
89 | |||
90 | /* | ||
91 | * Install a panic notifier for platform-specific diagnostics | ||
92 | */ | ||
93 | static void register_panic_notifier() | ||
94 | { | ||
95 | static struct notifier_block panic_notifier = { | ||
96 | .notifier_call = panic_handler, | ||
97 | .next = NULL, | ||
98 | .priority = INT_MAX | ||
99 | }; | ||
100 | atomic_notifier_chain_register(&panic_notifier_list, &panic_notifier); | ||
101 | } | ||
102 | |||
103 | static int panic_handler(struct notifier_block *notifier_block, | ||
104 | unsigned long event, void *cause_string) | ||
105 | { | ||
106 | struct pt_regs my_regs; | ||
107 | |||
108 | /* Save all of the registers */ | ||
109 | { | ||
110 | unsigned long at, v0, v1; /* Must be on the stack */ | ||
111 | |||
112 | /* Start by saving $at and v0 on the stack. We use $at | ||
113 | * ourselves, but it looks like the compiler may use v0 or v1 | ||
114 | * to load the address of the pt_regs structure. We'll come | ||
115 | * back later to store the registers in the pt_regs | ||
116 | * structure. */ | ||
117 | __asm__ __volatile__ ( | ||
118 | ".set noat\n" | ||
119 | LONG_S "$at, %[at]\n" | ||
120 | LONG_S "$2, %[v0]\n" | ||
121 | LONG_S "$3, %[v1]\n" | ||
122 | : | ||
123 | [at] "=m" (at), | ||
124 | [v0] "=m" (v0), | ||
125 | [v1] "=m" (v1) | ||
126 | : | ||
127 | : "at" | ||
128 | ); | ||
129 | |||
130 | __asm__ __volatile__ ( | ||
131 | ".set noat\n" | ||
132 | "move $at, %[pt_regs]\n" | ||
133 | |||
134 | /* Argument registers */ | ||
135 | LONG_S "$4, " VAL(PT_R4) "($at)\n" | ||
136 | LONG_S "$5, " VAL(PT_R5) "($at)\n" | ||
137 | LONG_S "$6, " VAL(PT_R6) "($at)\n" | ||
138 | LONG_S "$7, " VAL(PT_R7) "($at)\n" | ||
139 | |||
140 | /* Temporary regs */ | ||
141 | LONG_S "$8, " VAL(PT_R8) "($at)\n" | ||
142 | LONG_S "$9, " VAL(PT_R9) "($at)\n" | ||
143 | LONG_S "$10, " VAL(PT_R10) "($at)\n" | ||
144 | LONG_S "$11, " VAL(PT_R11) "($at)\n" | ||
145 | LONG_S "$12, " VAL(PT_R12) "($at)\n" | ||
146 | LONG_S "$13, " VAL(PT_R13) "($at)\n" | ||
147 | LONG_S "$14, " VAL(PT_R14) "($at)\n" | ||
148 | LONG_S "$15, " VAL(PT_R15) "($at)\n" | ||
149 | |||
150 | /* "Saved" registers */ | ||
151 | LONG_S "$16, " VAL(PT_R16) "($at)\n" | ||
152 | LONG_S "$17, " VAL(PT_R17) "($at)\n" | ||
153 | LONG_S "$18, " VAL(PT_R18) "($at)\n" | ||
154 | LONG_S "$19, " VAL(PT_R19) "($at)\n" | ||
155 | LONG_S "$20, " VAL(PT_R20) "($at)\n" | ||
156 | LONG_S "$21, " VAL(PT_R21) "($at)\n" | ||
157 | LONG_S "$22, " VAL(PT_R22) "($at)\n" | ||
158 | LONG_S "$23, " VAL(PT_R23) "($at)\n" | ||
159 | |||
160 | /* Add'l temp regs */ | ||
161 | LONG_S "$24, " VAL(PT_R24) "($at)\n" | ||
162 | LONG_S "$25, " VAL(PT_R25) "($at)\n" | ||
163 | |||
164 | /* Kernel temp regs */ | ||
165 | LONG_S "$26, " VAL(PT_R26) "($at)\n" | ||
166 | LONG_S "$27, " VAL(PT_R27) "($at)\n" | ||
167 | |||
168 | /* Global pointer, stack pointer, frame pointer and | ||
169 | * return address */ | ||
170 | LONG_S "$gp, " VAL(PT_R28) "($at)\n" | ||
171 | LONG_S "$sp, " VAL(PT_R29) "($at)\n" | ||
172 | LONG_S "$fp, " VAL(PT_R30) "($at)\n" | ||
173 | LONG_S "$ra, " VAL(PT_R31) "($at)\n" | ||
174 | |||
175 | /* Now we can get the $at and v0 registers back and | ||
176 | * store them */ | ||
177 | LONG_L "$8, %[at]\n" | ||
178 | LONG_S "$8, " VAL(PT_R1) "($at)\n" | ||
179 | LONG_L "$8, %[v0]\n" | ||
180 | LONG_S "$8, " VAL(PT_R2) "($at)\n" | ||
181 | LONG_L "$8, %[v1]\n" | ||
182 | LONG_S "$8, " VAL(PT_R3) "($at)\n" | ||
183 | : | ||
184 | : | ||
185 | [at] "m" (at), | ||
186 | [v0] "m" (v0), | ||
187 | [v1] "m" (v1), | ||
188 | [pt_regs] "r" (&my_regs) | ||
189 | : "at", "t0" | ||
190 | ); | ||
191 | |||
192 | /* Set the current EPC value to be the current location in this | ||
193 | * function */ | ||
194 | __asm__ __volatile__ ( | ||
195 | ".set noat\n" | ||
196 | "1:\n" | ||
197 | PTR_LA "$at, 1b\n" | ||
198 | LONG_S "$at, %[cp0_epc]\n" | ||
199 | : | ||
200 | [cp0_epc] "=m" (my_regs.cp0_epc) | ||
201 | : | ||
202 | : "at" | ||
203 | ); | ||
204 | |||
205 | my_regs.cp0_cause = read_c0_cause(); | ||
206 | my_regs.cp0_status = read_c0_status(); | ||
207 | } | ||
208 | |||
209 | #ifdef CONFIG_DIAGNOSTICS | ||
210 | failure_report((char *) cause_string, | ||
211 | have_die_regs ? &die_regs : &my_regs); | ||
212 | have_die_regs = false; | ||
213 | #else | ||
214 | pr_crit("I'm feeling a bit sleepy. hmmmmm... perhaps a nap would... " | ||
215 | "zzzz... \n"); | ||
216 | #endif | ||
217 | |||
218 | return NOTIFY_DONE; | ||
219 | } | ||
220 | |||
221 | /** | ||
222 | * Platform-specific handling of oops | ||
223 | * @str: Pointer to the oops string | ||
224 | * @regs: Pointer to the oops registers | ||
225 | * All we do here is to save the registers for subsequent printing through | ||
226 | * the panic notifier. | ||
227 | */ | ||
228 | void platform_die(const char *str, const struct pt_regs *regs) | ||
229 | { | ||
230 | /* If we already have saved registers, don't overwrite them as they | ||
231 | * they apply to the initial fault */ | ||
232 | |||
233 | if (!have_die_regs) { | ||
234 | have_die_regs = true; | ||
235 | die_regs = *regs; | ||
236 | } | ||
237 | } | ||
238 | |||
239 | /* Information about the RF MAC address, if one was supplied on the | ||
240 | * command line. */ | ||
241 | static bool have_rfmac; | ||
242 | static u8 rfmac[ETH_ALEN]; | ||
243 | |||
244 | static int rfmac_param(char *p) | ||
245 | { | ||
246 | u8 *q; | ||
247 | bool is_high_nibble; | ||
248 | int c; | ||
249 | |||
250 | /* Skip a leading "0x", if present */ | ||
251 | if (*p == '0' && *(p+1) == 'x') | ||
252 | p += 2; | ||
253 | |||
254 | q = rfmac; | ||
255 | is_high_nibble = true; | ||
256 | |||
257 | for (c = (unsigned char) *p++; | ||
258 | isxdigit(c) && q - rfmac < ETH_ALEN; | ||
259 | c = (unsigned char) *p++) { | ||
260 | int nibble; | ||
261 | |||
262 | nibble = (isdigit(c) ? (c - '0') : | ||
263 | (isupper(c) ? c - 'A' + 10 : c - 'a' + 10)); | ||
264 | |||
265 | if (is_high_nibble) | ||
266 | *q = nibble << 4; | ||
267 | else | ||
268 | *q++ |= nibble; | ||
269 | |||
270 | is_high_nibble = !is_high_nibble; | ||
271 | } | ||
272 | |||
273 | /* If we parsed all the way to the end of the parameter value and | ||
274 | * parsed all ETH_ALEN bytes, we have a usable RF MAC address */ | ||
275 | have_rfmac = (c == '\0' && q - rfmac == ETH_ALEN); | ||
276 | |||
277 | return 0; | ||
278 | } | ||
279 | |||
280 | early_param("rfmac", rfmac_param); | ||
281 | |||
282 | /* | ||
283 | * Generate an Ethernet MAC address that has a good chance of being unique. | ||
284 | * @addr: Pointer to six-byte array containing the Ethernet address | ||
285 | * Generates an Ethernet MAC address that is highly likely to be unique for | ||
286 | * this particular system on a network with other systems of the same type. | ||
287 | * | ||
288 | * The problem we are solving is that, when random_ether_addr() is used to | ||
289 | * generate MAC addresses at startup, there isn't much entropy for the random | ||
290 | * number generator to use and the addresses it produces are fairly likely to | ||
291 | * be the same as those of other identical systems on the same local network. | ||
292 | * This is true even for relatively small numbers of systems (for the reason | ||
293 | * why, see the Wikipedia entry for "Birthday problem" at: | ||
294 | * http://en.wikipedia.org/wiki/Birthday_problem | ||
295 | * | ||
296 | * The good news is that we already have a MAC address known to be unique, the | ||
297 | * RF MAC address. The bad news is that this address is already in use on the | ||
298 | * RF interface. Worse, the obvious trick, taking the RF MAC address and | ||
299 | * turning on the locally managed bit, has already been used for other devices. | ||
300 | * Still, this does give us something to work with. | ||
301 | * | ||
302 | * The approach we take is: | ||
303 | * 1. If we can't get the RF MAC Address, just call random_ether_addr. | ||
304 | * 2. Use the 24-bit NIC-specific bits of the RF MAC address as the last 24 | ||
305 | * bits of the new address. This is very likely to be unique, except for | ||
306 | * the current box. | ||
307 | * 3. To avoid using addresses already on the current box, we set the top | ||
308 | * six bits of the address with a value different from any currently | ||
309 | * registered Scientific Atlanta organizationally unique identifyer | ||
310 | * (OUI). This avoids duplication with any addresses on the system that | ||
311 | * were generated from valid Scientific Atlanta-registered address by | ||
312 | * simply flipping the locally managed bit. | ||
313 | * 4. We aren't generating a multicast address, so we leave the multicast | ||
314 | * bit off. Since we aren't using a registered address, we have to set | ||
315 | * the locally managed bit. | ||
316 | * 5. We then randomly generate the remaining 16-bits. This does two | ||
317 | * things: | ||
318 | * a. It allows us to call this function for more than one device | ||
319 | * in this system | ||
320 | * b. It ensures that things will probably still work even if | ||
321 | * some device on the device network has a locally managed | ||
322 | * address that matches the top six bits from step 2. | ||
323 | */ | ||
324 | void platform_random_ether_addr(u8 addr[ETH_ALEN]) | ||
325 | { | ||
326 | const int num_random_bytes = 2; | ||
327 | const unsigned char non_sciatl_oui_bits = 0xc0u; | ||
328 | const unsigned char mac_addr_locally_managed = (1 << 1); | ||
329 | |||
330 | if (!have_rfmac) { | ||
331 | pr_warning("rfmac not available on command line; " | ||
332 | "generating random MAC address\n"); | ||
333 | random_ether_addr(addr); | ||
334 | } | ||
335 | |||
336 | else { | ||
337 | int i; | ||
338 | |||
339 | /* Set the first byte to something that won't match a Scientific | ||
340 | * Atlanta OUI, is locally managed, and isn't a multicast | ||
341 | * address */ | ||
342 | addr[0] = non_sciatl_oui_bits | mac_addr_locally_managed; | ||
343 | |||
344 | /* Get some bytes of random address information */ | ||
345 | get_random_bytes(&addr[1], num_random_bytes); | ||
346 | |||
347 | /* Copy over the NIC-specific bits of the RF MAC address */ | ||
348 | for (i = 1 + num_random_bytes; i < ETH_ALEN; i++) | ||
349 | addr[i] = rfmac[i]; | ||
350 | } | ||
351 | } | ||
diff --git a/arch/mips/powertv/reset.c b/arch/mips/powertv/reset.c new file mode 100644 index 000000000000..494c652c984b --- /dev/null +++ b/arch/mips/powertv/reset.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * Carsten Langgaard, carstenl@mips.com | ||
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can distribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License (Version 2) as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License | ||
13 | * for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along | ||
16 | * with this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | ||
18 | */ | ||
19 | #include <linux/pm.h> | ||
20 | |||
21 | #include <linux/io.h> | ||
22 | #include <asm/reboot.h> /* Not included by linux/reboot.h */ | ||
23 | |||
24 | #ifdef CONFIG_BOOTLOADER_DRIVER | ||
25 | #include <asm/mach-powertv/kbldr.h> | ||
26 | #endif | ||
27 | |||
28 | #include <asm/mach-powertv/asic_regs.h> | ||
29 | #include "reset.h" | ||
30 | |||
31 | static void mips_machine_restart(char *command); | ||
32 | static void mips_machine_halt(void); | ||
33 | |||
34 | static void mips_machine_restart(char *command) | ||
35 | { | ||
36 | #ifdef CONFIG_BOOTLOADER_DRIVER | ||
37 | /* | ||
38 | * Call the bootloader's reset function to ensure | ||
39 | * that persistent data is flushed before hard reset | ||
40 | */ | ||
41 | kbldr_SetCauseAndReset(); | ||
42 | #else | ||
43 | writel(0x1, asic_reg_addr(watchdog)); | ||
44 | #endif | ||
45 | } | ||
46 | |||
47 | static void mips_machine_halt(void) | ||
48 | { | ||
49 | #ifdef CONFIG_BOOTLOADER_DRIVER | ||
50 | /* | ||
51 | * Call the bootloader's reset function to ensure | ||
52 | * that persistent data is flushed before hard reset | ||
53 | */ | ||
54 | kbldr_SetCauseAndReset(); | ||
55 | #else | ||
56 | writel(0x1, asic_reg_addr(watchdog)); | ||
57 | #endif | ||
58 | } | ||
59 | |||
60 | void mips_reboot_setup(void) | ||
61 | { | ||
62 | _machine_restart = mips_machine_restart; | ||
63 | _machine_halt = mips_machine_halt; | ||
64 | pm_power_off = mips_machine_halt; | ||
65 | } | ||
diff --git a/arch/mips/powertv/reset.h b/arch/mips/powertv/reset.h new file mode 100644 index 000000000000..888fd09e2620 --- /dev/null +++ b/arch/mips/powertv/reset.h | |||
@@ -0,0 +1,26 @@ | |||
1 | /* | ||
2 | * Definitions from powertv reset.c file | ||
3 | * | ||
4 | * Copyright (C) 2009 Cisco Systems, Inc. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | ||
19 | * | ||
20 | * Author: David VomLehn | ||
21 | */ | ||
22 | |||
23 | #ifndef _POWERTV_POWERTV_RESET_H | ||
24 | #define _POWERTV_POWERTV_RESET_H | ||
25 | extern void mips_reboot_setup(void); | ||
26 | #endif | ||
diff --git a/arch/mips/mipssim/sim_cmdline.c b/arch/mips/powertv/time.c index 74240e1ce5a5..1e0a5ef4c8c7 100644 --- a/arch/mips/mipssim/sim_cmdline.c +++ b/arch/mips/powertv/time.c | |||
@@ -1,5 +1,7 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (C) 2005 MIPS Technologies, Inc. All rights reserved. | 2 | * Carsten Langgaard, carstenl@mips.com |
3 | * Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved. | ||
4 | * Portions copyright (C) 2009 Cisco Systems, Inc. | ||
3 | * | 5 | * |
4 | * This program is free software; you can distribute it and/or modify it | 6 | * This program is free software; you can distribute it and/or modify it |
5 | * under the terms of the GNU General Public License (Version 2) as | 7 | * under the terms of the GNU General Public License (Version 2) as |
@@ -14,19 +16,22 @@ | |||
14 | * with this program; if not, write to the Free Software Foundation, Inc., | 16 | * with this program; if not, write to the Free Software Foundation, Inc., |
15 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. | 17 | * 59 Temple Place - Suite 330, Boston MA 02111-1307, USA. |
16 | * | 18 | * |
19 | * Setting up the clock on the MIPS boards. | ||
17 | */ | 20 | */ |
21 | |||
18 | #include <linux/init.h> | 22 | #include <linux/init.h> |
19 | #include <linux/string.h> | 23 | #include <asm/mach-powertv/interrupts.h> |
20 | #include <asm/bootinfo.h> | 24 | #include <asm/time.h> |
21 | 25 | ||
22 | extern char arcs_cmdline[]; | 26 | #include "powertv-clock.h" |
23 | 27 | ||
24 | char * __init prom_getcmdline(void) | 28 | unsigned int __cpuinit get_c0_compare_int(void) |
25 | { | 29 | { |
26 | return arcs_cmdline; | 30 | return irq_mips_timer; |
27 | } | 31 | } |
28 | 32 | ||
29 | void __init prom_init_cmdline(void) | 33 | void __init plat_time_init(void) |
30 | { | 34 | { |
31 | /* XXX: Get boot line from environment? */ | 35 | powertv_clocksource_init(); |
36 | r4k_clockevent_init(); | ||
32 | } | 37 | } |
diff --git a/arch/mips/rb532/prom.c b/arch/mips/rb532/prom.c index ad5bd1097974..d7c26d00cfef 100644 --- a/arch/mips/rb532/prom.c +++ b/arch/mips/rb532/prom.c | |||
@@ -69,7 +69,7 @@ static inline unsigned long tag2ul(char *arg, const char *tag) | |||
69 | 69 | ||
70 | void __init prom_setup_cmdline(void) | 70 | void __init prom_setup_cmdline(void) |
71 | { | 71 | { |
72 | static char cmd_line[CL_SIZE] __initdata; | 72 | static char cmd_line[COMMAND_LINE_SIZE] __initdata; |
73 | char *cp, *board; | 73 | char *cp, *board; |
74 | int prom_argc; | 74 | int prom_argc; |
75 | char **prom_argv, **prom_envp; | 75 | char **prom_argv, **prom_envp; |
@@ -115,7 +115,7 @@ void __init prom_setup_cmdline(void) | |||
115 | strcpy(cp, arcs_cmdline); | 115 | strcpy(cp, arcs_cmdline); |
116 | cp += strlen(arcs_cmdline); | 116 | cp += strlen(arcs_cmdline); |
117 | } | 117 | } |
118 | cmd_line[CL_SIZE-1] = '\0'; | 118 | cmd_line[COMMAND_LINE_SIZE - 1] = '\0'; |
119 | 119 | ||
120 | strcpy(arcs_cmdline, cmd_line); | 120 | strcpy(arcs_cmdline, cmd_line); |
121 | } | 121 | } |
diff --git a/arch/mips/sgi-ip22/ip22-eisa.c b/arch/mips/sgi-ip22/ip22-eisa.c index 1617241d2737..da44ccb20829 100644 --- a/arch/mips/sgi-ip22/ip22-eisa.c +++ b/arch/mips/sgi-ip22/ip22-eisa.c | |||
@@ -50,9 +50,9 @@ | |||
50 | 50 | ||
51 | static char __init *decode_eisa_sig(unsigned long addr) | 51 | static char __init *decode_eisa_sig(unsigned long addr) |
52 | { | 52 | { |
53 | static char sig_str[EISA_SIG_LEN]; | 53 | static char sig_str[EISA_SIG_LEN] __initdata; |
54 | u8 sig[4]; | 54 | u8 sig[4]; |
55 | u16 rev; | 55 | u16 rev; |
56 | int i; | 56 | int i; |
57 | 57 | ||
58 | for (i = 0; i < 4; i++) { | 58 | for (i = 0; i < 4; i++) { |
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c index 0ecd5fe9486e..383f11d7f442 100644 --- a/arch/mips/sgi-ip22/ip22-int.c +++ b/arch/mips/sgi-ip22/ip22-int.c | |||
@@ -13,6 +13,7 @@ | |||
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/kernel_stat.h> | 14 | #include <linux/kernel_stat.h> |
15 | #include <linux/interrupt.h> | 15 | #include <linux/interrupt.h> |
16 | #include <linux/ftrace.h> | ||
16 | 17 | ||
17 | #include <asm/irq_cpu.h> | 18 | #include <asm/irq_cpu.h> |
18 | #include <asm/sgi/hpc3.h> | 19 | #include <asm/sgi/hpc3.h> |
@@ -150,7 +151,7 @@ static void indy_local1_irqdispatch(void) | |||
150 | 151 | ||
151 | extern void ip22_be_interrupt(int irq); | 152 | extern void ip22_be_interrupt(int irq); |
152 | 153 | ||
153 | static void indy_buserror_irq(void) | 154 | static void __irq_entry indy_buserror_irq(void) |
154 | { | 155 | { |
155 | int irq = SGI_BUSERR_IRQ; | 156 | int irq = SGI_BUSERR_IRQ; |
156 | 157 | ||
diff --git a/arch/mips/sgi-ip22/ip22-setup.c b/arch/mips/sgi-ip22/ip22-setup.c index b9a931358e23..5deeb68b6c9c 100644 --- a/arch/mips/sgi-ip22/ip22-setup.c +++ b/arch/mips/sgi-ip22/ip22-setup.c | |||
@@ -67,7 +67,7 @@ void __init plat_mem_setup(void) | |||
67 | cserial = ArcGetEnvironmentVariable("ConsoleOut"); | 67 | cserial = ArcGetEnvironmentVariable("ConsoleOut"); |
68 | 68 | ||
69 | if ((ctype && *ctype == 'd') || (cserial && *cserial == 's')) { | 69 | if ((ctype && *ctype == 'd') || (cserial && *cserial == 's')) { |
70 | static char options[8]; | 70 | static char options[8] __initdata; |
71 | char *baud = ArcGetEnvironmentVariable("dbaud"); | 71 | char *baud = ArcGetEnvironmentVariable("dbaud"); |
72 | if (baud) | 72 | if (baud) |
73 | strcpy(options, baud); | 73 | strcpy(options, baud); |
diff --git a/arch/mips/sgi-ip22/ip22-time.c b/arch/mips/sgi-ip22/ip22-time.c index c8f7d2328b24..603fc91c1030 100644 --- a/arch/mips/sgi-ip22/ip22-time.c +++ b/arch/mips/sgi-ip22/ip22-time.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <linux/interrupt.h> | 16 | #include <linux/interrupt.h> |
17 | #include <linux/kernel_stat.h> | 17 | #include <linux/kernel_stat.h> |
18 | #include <linux/time.h> | 18 | #include <linux/time.h> |
19 | #include <linux/ftrace.h> | ||
19 | 20 | ||
20 | #include <asm/cpu.h> | 21 | #include <asm/cpu.h> |
21 | #include <asm/mipsregs.h> | 22 | #include <asm/mipsregs.h> |
@@ -115,7 +116,7 @@ __init void plat_time_init(void) | |||
115 | } | 116 | } |
116 | 117 | ||
117 | /* Generic SGI handler for (spurious) 8254 interrupts */ | 118 | /* Generic SGI handler for (spurious) 8254 interrupts */ |
118 | void indy_8254timer_irq(void) | 119 | void __irq_entry indy_8254timer_irq(void) |
119 | { | 120 | { |
120 | int irq = SGI_8254_0_IRQ; | 121 | int irq = SGI_8254_0_IRQ; |
121 | ULONG cnt; | 122 | ULONG cnt; |
diff --git a/arch/mips/sgi-ip32/ip32-setup.c b/arch/mips/sgi-ip32/ip32-setup.c index c5a5d4a31b4b..3abd1465ec02 100644 --- a/arch/mips/sgi-ip32/ip32-setup.c +++ b/arch/mips/sgi-ip32/ip32-setup.c | |||
@@ -90,7 +90,7 @@ void __init plat_mem_setup(void) | |||
90 | { | 90 | { |
91 | char* con = ArcGetEnvironmentVariable("console"); | 91 | char* con = ArcGetEnvironmentVariable("console"); |
92 | if (con && *con == 'd') { | 92 | if (con && *con == 'd') { |
93 | static char options[8]; | 93 | static char options[8] __initdata; |
94 | char *baud = ArcGetEnvironmentVariable("dbaud"); | 94 | char *baud = ArcGetEnvironmentVariable("dbaud"); |
95 | if (baud) | 95 | if (baud) |
96 | strcpy(options, baud); | 96 | strcpy(options, baud); |
diff --git a/arch/mips/sibyte/common/cfe.c b/arch/mips/sibyte/common/cfe.c index eb5396cf81bb..6343011e9902 100644 --- a/arch/mips/sibyte/common/cfe.c +++ b/arch/mips/sibyte/common/cfe.c | |||
@@ -287,7 +287,7 @@ void __init prom_init(void) | |||
287 | * boot console | 287 | * boot console |
288 | */ | 288 | */ |
289 | cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE); | 289 | cfe_cons_handle = cfe_getstdhandle(CFE_STDHANDLE_CONSOLE); |
290 | if (cfe_getenv("LINUX_CMDLINE", arcs_cmdline, CL_SIZE) < 0) { | 290 | if (cfe_getenv("LINUX_CMDLINE", arcs_cmdline, COMMAND_LINE_SIZE) < 0) { |
291 | if (argc >= 0) { | 291 | if (argc >= 0) { |
292 | /* The loader should have set the command line */ | 292 | /* The loader should have set the command line */ |
293 | /* too early for panic to do any good */ | 293 | /* too early for panic to do any good */ |
@@ -318,7 +318,7 @@ void __init prom_init(void) | |||
318 | #endif /* CONFIG_BLK_DEV_INITRD */ | 318 | #endif /* CONFIG_BLK_DEV_INITRD */ |
319 | 319 | ||
320 | /* Not sure this is needed, but it's the safe way. */ | 320 | /* Not sure this is needed, but it's the safe way. */ |
321 | arcs_cmdline[CL_SIZE-1] = 0; | 321 | arcs_cmdline[COMMAND_LINE_SIZE-1] = 0; |
322 | 322 | ||
323 | prom_meminit(); | 323 | prom_meminit(); |
324 | 324 | ||
diff --git a/arch/mips/sni/a20r.c b/arch/mips/sni/a20r.c index 7dd76fb3b645..e6980892834a 100644 --- a/arch/mips/sni/a20r.c +++ b/arch/mips/sni/a20r.c | |||
@@ -188,7 +188,7 @@ static void end_a20r_irq(unsigned int irq) | |||
188 | } | 188 | } |
189 | 189 | ||
190 | static struct irq_chip a20r_irq_type = { | 190 | static struct irq_chip a20r_irq_type = { |
191 | .typename = "A20R", | 191 | .name = "A20R", |
192 | .ack = mask_a20r_irq, | 192 | .ack = mask_a20r_irq, |
193 | .mask = mask_a20r_irq, | 193 | .mask = mask_a20r_irq, |
194 | .mask_ack = mask_a20r_irq, | 194 | .mask_ack = mask_a20r_irq, |
diff --git a/arch/mips/sni/pcimt.c b/arch/mips/sni/pcimt.c index 74e6c67982fb..51e62bbaa23b 100644 --- a/arch/mips/sni/pcimt.c +++ b/arch/mips/sni/pcimt.c | |||
@@ -214,7 +214,7 @@ static void end_pcimt_irq(unsigned int irq) | |||
214 | } | 214 | } |
215 | 215 | ||
216 | static struct irq_chip pcimt_irq_type = { | 216 | static struct irq_chip pcimt_irq_type = { |
217 | .typename = "PCIMT", | 217 | .name = "PCIMT", |
218 | .ack = disable_pcimt_irq, | 218 | .ack = disable_pcimt_irq, |
219 | .mask = disable_pcimt_irq, | 219 | .mask = disable_pcimt_irq, |
220 | .mask_ack = disable_pcimt_irq, | 220 | .mask_ack = disable_pcimt_irq, |
diff --git a/arch/mips/sni/pcit.c b/arch/mips/sni/pcit.c index 071a9573ac7f..f4699d35858b 100644 --- a/arch/mips/sni/pcit.c +++ b/arch/mips/sni/pcit.c | |||
@@ -176,7 +176,7 @@ void end_pcit_irq(unsigned int irq) | |||
176 | } | 176 | } |
177 | 177 | ||
178 | static struct irq_chip pcit_irq_type = { | 178 | static struct irq_chip pcit_irq_type = { |
179 | .typename = "PCIT", | 179 | .name = "PCIT", |
180 | .ack = disable_pcit_irq, | 180 | .ack = disable_pcit_irq, |
181 | .mask = disable_pcit_irq, | 181 | .mask = disable_pcit_irq, |
182 | .mask_ack = disable_pcit_irq, | 182 | .mask_ack = disable_pcit_irq, |
diff --git a/arch/mips/sni/rm200.c b/arch/mips/sni/rm200.c index 5e687819cbc2..46f00691f448 100644 --- a/arch/mips/sni/rm200.c +++ b/arch/mips/sni/rm200.c | |||
@@ -449,7 +449,7 @@ void end_rm200_irq(unsigned int irq) | |||
449 | } | 449 | } |
450 | 450 | ||
451 | static struct irq_chip rm200_irq_type = { | 451 | static struct irq_chip rm200_irq_type = { |
452 | .typename = "RM200", | 452 | .name = "RM200", |
453 | .ack = disable_rm200_irq, | 453 | .ack = disable_rm200_irq, |
454 | .mask = disable_rm200_irq, | 454 | .mask = disable_rm200_irq, |
455 | .mask_ack = disable_rm200_irq, | 455 | .mask_ack = disable_rm200_irq, |
diff --git a/arch/mips/sni/setup.c b/arch/mips/sni/setup.c index a49272ce7ef5..d16b462154c3 100644 --- a/arch/mips/sni/setup.c +++ b/arch/mips/sni/setup.c | |||
@@ -60,7 +60,7 @@ static void __init sni_console_setup(void) | |||
60 | char *cdev; | 60 | char *cdev; |
61 | char *baud; | 61 | char *baud; |
62 | int port; | 62 | int port; |
63 | static char options[8]; | 63 | static char options[8] __initdata; |
64 | 64 | ||
65 | cdev = prom_getenv("console_dev"); | 65 | cdev = prom_getenv("console_dev"); |
66 | if (strncmp(cdev, "tty", 3) == 0) { | 66 | if (strncmp(cdev, "tty", 3) == 0) { |
diff --git a/arch/mips/txx9/generic/setup.c b/arch/mips/txx9/generic/setup.c index d66802edebb2..06e801c7e258 100644 --- a/arch/mips/txx9/generic/setup.c +++ b/arch/mips/txx9/generic/setup.c | |||
@@ -160,7 +160,7 @@ static void __init prom_init_cmdline(void) | |||
160 | int argc; | 160 | int argc; |
161 | int *argv32; | 161 | int *argv32; |
162 | int i; /* Always ignore the "-c" at argv[0] */ | 162 | int i; /* Always ignore the "-c" at argv[0] */ |
163 | static char builtin[CL_SIZE] __initdata; | 163 | static char builtin[COMMAND_LINE_SIZE] __initdata; |
164 | 164 | ||
165 | if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { | 165 | if (fw_arg0 >= CKSEG0 || fw_arg1 < CKSEG0) { |
166 | /* | 166 | /* |
@@ -315,7 +315,7 @@ static inline void txx9_cache_fixup(void) | |||
315 | 315 | ||
316 | static void __init preprocess_cmdline(void) | 316 | static void __init preprocess_cmdline(void) |
317 | { | 317 | { |
318 | static char cmdline[CL_SIZE] __initdata; | 318 | static char cmdline[COMMAND_LINE_SIZE] __initdata; |
319 | char *s; | 319 | char *s; |
320 | 320 | ||
321 | strcpy(cmdline, arcs_cmdline); | 321 | strcpy(cmdline, arcs_cmdline); |
diff --git a/arch/mn10300/include/asm/asm-offsets.h b/arch/mn10300/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/mn10300/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/parisc/include/asm/asm-offsets.h b/arch/parisc/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/parisc/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/powerpc/include/asm/asm-offsets.h b/arch/powerpc/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/powerpc/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/powerpc/platforms/52xx/efika.c b/arch/powerpc/platforms/52xx/efika.c index bcc69e1f77c1..45c0cb9b67e6 100644 --- a/arch/powerpc/platforms/52xx/efika.c +++ b/arch/powerpc/platforms/52xx/efika.c | |||
@@ -10,7 +10,7 @@ | |||
10 | */ | 10 | */ |
11 | 11 | ||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/utsrelease.h> | 13 | #include <generated/utsrelease.h> |
14 | #include <linux/pci.h> | 14 | #include <linux/pci.h> |
15 | #include <linux/of.h> | 15 | #include <linux/of.h> |
16 | #include <asm/prom.h> | 16 | #include <asm/prom.h> |
diff --git a/arch/powerpc/platforms/amigaone/setup.c b/arch/powerpc/platforms/amigaone/setup.c index 9290a7a442d0..fb4eb0df054c 100644 --- a/arch/powerpc/platforms/amigaone/setup.c +++ b/arch/powerpc/platforms/amigaone/setup.c | |||
@@ -14,7 +14,7 @@ | |||
14 | 14 | ||
15 | #include <linux/kernel.h> | 15 | #include <linux/kernel.h> |
16 | #include <linux/seq_file.h> | 16 | #include <linux/seq_file.h> |
17 | #include <linux/utsrelease.h> | 17 | #include <generated/utsrelease.h> |
18 | 18 | ||
19 | #include <asm/machdep.h> | 19 | #include <asm/machdep.h> |
20 | #include <asm/cputable.h> | 20 | #include <asm/cputable.h> |
diff --git a/arch/powerpc/platforms/cell/spufs/Makefile b/arch/powerpc/platforms/cell/spufs/Makefile index b93f877ba504..b9d5d678aa44 100644 --- a/arch/powerpc/platforms/cell/spufs/Makefile +++ b/arch/powerpc/platforms/cell/spufs/Makefile | |||
@@ -13,10 +13,8 @@ SPU_CC := $(SPU_CROSS)gcc | |||
13 | SPU_AS := $(SPU_CROSS)gcc | 13 | SPU_AS := $(SPU_CROSS)gcc |
14 | SPU_LD := $(SPU_CROSS)ld | 14 | SPU_LD := $(SPU_CROSS)ld |
15 | SPU_OBJCOPY := $(SPU_CROSS)objcopy | 15 | SPU_OBJCOPY := $(SPU_CROSS)objcopy |
16 | SPU_CFLAGS := -O2 -Wall -I$(srctree)/include \ | 16 | SPU_CFLAGS := -O2 -Wall -I$(srctree)/include -D__KERNEL__ |
17 | -I$(objtree)/include2 -D__KERNEL__ | 17 | SPU_AFLAGS := -c -D__ASSEMBLY__ -I$(srctree)/include -D__KERNEL__ |
18 | SPU_AFLAGS := -c -D__ASSEMBLY__ -I$(srctree)/include \ | ||
19 | -I$(objtree)/include2 -D__KERNEL__ | ||
20 | SPU_LDFLAGS := -N -Ttext=0x0 | 18 | SPU_LDFLAGS := -N -Ttext=0x0 |
21 | 19 | ||
22 | $(obj)/switch.o: $(obj)/spu_save_dump.h $(obj)/spu_restore_dump.h | 20 | $(obj)/switch.o: $(obj)/spu_save_dump.h $(obj)/spu_restore_dump.h |
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 52f3df3b4ca0..8f41685d8f42 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/reboot.h> | 23 | #include <linux/reboot.h> |
24 | #include <linux/init.h> | 24 | #include <linux/init.h> |
25 | #include <linux/pci.h> | 25 | #include <linux/pci.h> |
26 | #include <linux/utsrelease.h> | 26 | #include <generated/utsrelease.h> |
27 | #include <linux/adb.h> | 27 | #include <linux/adb.h> |
28 | #include <linux/module.h> | 28 | #include <linux/module.h> |
29 | #include <linux/delay.h> | 29 | #include <linux/delay.h> |
diff --git a/arch/powerpc/platforms/powermac/bootx_init.c b/arch/powerpc/platforms/powermac/bootx_init.c index cf660916ae0b..9dd789a7370d 100644 --- a/arch/powerpc/platforms/powermac/bootx_init.c +++ b/arch/powerpc/platforms/powermac/bootx_init.c | |||
@@ -12,7 +12,7 @@ | |||
12 | #include <linux/kernel.h> | 12 | #include <linux/kernel.h> |
13 | #include <linux/string.h> | 13 | #include <linux/string.h> |
14 | #include <linux/init.h> | 14 | #include <linux/init.h> |
15 | #include <linux/utsrelease.h> | 15 | #include <generated/utsrelease.h> |
16 | #include <asm/sections.h> | 16 | #include <asm/sections.h> |
17 | #include <asm/prom.h> | 17 | #include <asm/prom.h> |
18 | #include <asm/page.h> | 18 | #include <asm/page.h> |
diff --git a/arch/s390/crypto/aes_s390.c b/arch/s390/crypto/aes_s390.c index 6118890c946d..6be4503201ac 100644 --- a/arch/s390/crypto/aes_s390.c +++ b/arch/s390/crypto/aes_s390.c | |||
@@ -174,7 +174,7 @@ static int fallback_init_cip(struct crypto_tfm *tfm) | |||
174 | if (IS_ERR(sctx->fallback.cip)) { | 174 | if (IS_ERR(sctx->fallback.cip)) { |
175 | pr_err("Allocating AES fallback algorithm %s failed\n", | 175 | pr_err("Allocating AES fallback algorithm %s failed\n", |
176 | name); | 176 | name); |
177 | return PTR_ERR(sctx->fallback.blk); | 177 | return PTR_ERR(sctx->fallback.cip); |
178 | } | 178 | } |
179 | 179 | ||
180 | return 0; | 180 | return 0; |
diff --git a/arch/s390/hypfs/hypfs_diag.c b/arch/s390/hypfs/hypfs_diag.c index 77df726180ba..2b92d501425f 100644 --- a/arch/s390/hypfs/hypfs_diag.c +++ b/arch/s390/hypfs/hypfs_diag.c | |||
@@ -164,7 +164,7 @@ static inline void part_hdr__part_name(enum diag204_format type, void *hdr, | |||
164 | LPAR_NAME_LEN); | 164 | LPAR_NAME_LEN); |
165 | EBCASC(name, LPAR_NAME_LEN); | 165 | EBCASC(name, LPAR_NAME_LEN); |
166 | name[LPAR_NAME_LEN] = 0; | 166 | name[LPAR_NAME_LEN] = 0; |
167 | strstrip(name); | 167 | strim(name); |
168 | } | 168 | } |
169 | 169 | ||
170 | struct cpu_info { | 170 | struct cpu_info { |
@@ -523,7 +523,7 @@ static int diag224_idx2name(int index, char *name) | |||
523 | memcpy(name, diag224_cpu_names + ((index + 1) * CPU_NAME_LEN), | 523 | memcpy(name, diag224_cpu_names + ((index + 1) * CPU_NAME_LEN), |
524 | CPU_NAME_LEN); | 524 | CPU_NAME_LEN); |
525 | name[CPU_NAME_LEN] = 0; | 525 | name[CPU_NAME_LEN] = 0; |
526 | strstrip(name); | 526 | strim(name); |
527 | return 0; | 527 | return 0; |
528 | } | 528 | } |
529 | 529 | ||
diff --git a/arch/s390/hypfs/hypfs_vm.c b/arch/s390/hypfs/hypfs_vm.c index d01fc8f799f0..f0b0d31f0b48 100644 --- a/arch/s390/hypfs/hypfs_vm.c +++ b/arch/s390/hypfs/hypfs_vm.c | |||
@@ -124,7 +124,7 @@ static int hpyfs_vm_create_guest(struct super_block *sb, | |||
124 | /* guest dir */ | 124 | /* guest dir */ |
125 | memcpy(guest_name, data->guest_name, NAME_LEN); | 125 | memcpy(guest_name, data->guest_name, NAME_LEN); |
126 | EBCASC(guest_name, NAME_LEN); | 126 | EBCASC(guest_name, NAME_LEN); |
127 | strstrip(guest_name); | 127 | strim(guest_name); |
128 | guest_dir = hypfs_mkdir(sb, systems_dir, guest_name); | 128 | guest_dir = hypfs_mkdir(sb, systems_dir, guest_name); |
129 | if (IS_ERR(guest_dir)) | 129 | if (IS_ERR(guest_dir)) |
130 | return PTR_ERR(guest_dir); | 130 | return PTR_ERR(guest_dir); |
diff --git a/arch/s390/include/asm/asm-offsets.h b/arch/s390/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/s390/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h index cb5232df151e..192a7203a14f 100644 --- a/arch/s390/include/asm/unistd.h +++ b/arch/s390/include/asm/unistd.h | |||
@@ -269,7 +269,8 @@ | |||
269 | #define __NR_pwritev 329 | 269 | #define __NR_pwritev 329 |
270 | #define __NR_rt_tgsigqueueinfo 330 | 270 | #define __NR_rt_tgsigqueueinfo 330 |
271 | #define __NR_perf_event_open 331 | 271 | #define __NR_perf_event_open 331 |
272 | #define NR_syscalls 332 | 272 | #define __NR_recvmmsg 332 |
273 | #define NR_syscalls 333 | ||
273 | 274 | ||
274 | /* | 275 | /* |
275 | * There are some system calls that are not present on 64 bit, some | 276 | * There are some system calls that are not present on 64 bit, some |
diff --git a/arch/s390/kernel/compat_wrapper.S b/arch/s390/kernel/compat_wrapper.S index 30de2d0e52bb..faeaccc7d7d9 100644 --- a/arch/s390/kernel/compat_wrapper.S +++ b/arch/s390/kernel/compat_wrapper.S | |||
@@ -1853,3 +1853,12 @@ sys32_execve_wrapper: | |||
1853 | llgtr %r3,%r3 # compat_uptr_t * | 1853 | llgtr %r3,%r3 # compat_uptr_t * |
1854 | llgtr %r4,%r4 # compat_uptr_t * | 1854 | llgtr %r4,%r4 # compat_uptr_t * |
1855 | jg sys32_execve # branch to system call | 1855 | jg sys32_execve # branch to system call |
1856 | |||
1857 | .globl compat_sys_recvmmsg_wrapper | ||
1858 | compat_sys_recvmmsg_wrapper: | ||
1859 | lgfr %r2,%r2 # int | ||
1860 | llgtr %r3,%r3 # struct compat_mmsghdr * | ||
1861 | llgfr %r4,%r4 # unsigned int | ||
1862 | llgfr %r5,%r5 # unsigned int | ||
1863 | llgtr %r6,%r6 # struct compat_timespec * | ||
1864 | jg compat_sys_recvmmsg | ||
diff --git a/arch/s390/kernel/ipl.c b/arch/s390/kernel/ipl.c index 4890ac6d7faa..4d73296fed74 100644 --- a/arch/s390/kernel/ipl.c +++ b/arch/s390/kernel/ipl.c | |||
@@ -221,7 +221,7 @@ static ssize_t sys_##_prefix##_##_name##_store(struct kobject *kobj, \ | |||
221 | const char *buf, size_t len) \ | 221 | const char *buf, size_t len) \ |
222 | { \ | 222 | { \ |
223 | strncpy(_value, buf, sizeof(_value) - 1); \ | 223 | strncpy(_value, buf, sizeof(_value) - 1); \ |
224 | strstrip(_value); \ | 224 | strim(_value); \ |
225 | return len; \ | 225 | return len; \ |
226 | } \ | 226 | } \ |
227 | static struct kobj_attribute sys_##_prefix##_##_name##_attr = \ | 227 | static struct kobj_attribute sys_##_prefix##_##_name##_attr = \ |
@@ -472,7 +472,7 @@ static ssize_t ipl_ccw_loadparm_show(struct kobject *kobj, | |||
472 | return sprintf(page, "#unknown#\n"); | 472 | return sprintf(page, "#unknown#\n"); |
473 | memcpy(loadparm, &sclp_ipl_info.loadparm, LOADPARM_LEN); | 473 | memcpy(loadparm, &sclp_ipl_info.loadparm, LOADPARM_LEN); |
474 | EBCASC(loadparm, LOADPARM_LEN); | 474 | EBCASC(loadparm, LOADPARM_LEN); |
475 | strstrip(loadparm); | 475 | strim(loadparm); |
476 | return sprintf(page, "%s\n", loadparm); | 476 | return sprintf(page, "%s\n", loadparm); |
477 | } | 477 | } |
478 | 478 | ||
@@ -776,7 +776,7 @@ static void reipl_get_ascii_loadparm(char *loadparm, | |||
776 | memcpy(loadparm, ibp->ipl_info.ccw.load_parm, LOADPARM_LEN); | 776 | memcpy(loadparm, ibp->ipl_info.ccw.load_parm, LOADPARM_LEN); |
777 | EBCASC(loadparm, LOADPARM_LEN); | 777 | EBCASC(loadparm, LOADPARM_LEN); |
778 | loadparm[LOADPARM_LEN] = 0; | 778 | loadparm[LOADPARM_LEN] = 0; |
779 | strstrip(loadparm); | 779 | strim(loadparm); |
780 | } | 780 | } |
781 | 781 | ||
782 | static ssize_t reipl_generic_loadparm_show(struct ipl_parameter_block *ipb, | 782 | static ssize_t reipl_generic_loadparm_show(struct ipl_parameter_block *ipb, |
diff --git a/arch/s390/kernel/ptrace.c b/arch/s390/kernel/ptrace.c index 653c6a178740..13815d39f7dd 100644 --- a/arch/s390/kernel/ptrace.c +++ b/arch/s390/kernel/ptrace.c | |||
@@ -959,7 +959,7 @@ static const struct user_regset s390_compat_regsets[] = { | |||
959 | .set = s390_fpregs_set, | 959 | .set = s390_fpregs_set, |
960 | }, | 960 | }, |
961 | [REGSET_GENERAL_EXTENDED] = { | 961 | [REGSET_GENERAL_EXTENDED] = { |
962 | .core_note_type = NT_PRXSTATUS, | 962 | .core_note_type = NT_S390_HIGH_GPRS, |
963 | .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t), | 963 | .n = sizeof(s390_compat_regs_high) / sizeof(compat_long_t), |
964 | .size = sizeof(compat_long_t), | 964 | .size = sizeof(compat_long_t), |
965 | .align = sizeof(compat_long_t), | 965 | .align = sizeof(compat_long_t), |
diff --git a/arch/s390/kernel/syscalls.S b/arch/s390/kernel/syscalls.S index 30eca070d426..4f292c936872 100644 --- a/arch/s390/kernel/syscalls.S +++ b/arch/s390/kernel/syscalls.S | |||
@@ -340,3 +340,4 @@ SYSCALL(sys_preadv,sys_preadv,compat_sys_preadv_wrapper) | |||
340 | SYSCALL(sys_pwritev,sys_pwritev,compat_sys_pwritev_wrapper) | 340 | SYSCALL(sys_pwritev,sys_pwritev,compat_sys_pwritev_wrapper) |
341 | SYSCALL(sys_rt_tgsigqueueinfo,sys_rt_tgsigqueueinfo,compat_sys_rt_tgsigqueueinfo_wrapper) /* 330 */ | 341 | SYSCALL(sys_rt_tgsigqueueinfo,sys_rt_tgsigqueueinfo,compat_sys_rt_tgsigqueueinfo_wrapper) /* 330 */ |
342 | SYSCALL(sys_perf_event_open,sys_perf_event_open,sys_perf_event_open_wrapper) | 342 | SYSCALL(sys_perf_event_open,sys_perf_event_open,sys_perf_event_open_wrapper) |
343 | SYSCALL(sys_recvmmsg,sys_recvmmsg,compat_sys_recvmmsg_wrapper) | ||
diff --git a/arch/s390/kernel/traps.c b/arch/s390/kernel/traps.c index c2e42cc65ce7..6e7ad63854c0 100644 --- a/arch/s390/kernel/traps.c +++ b/arch/s390/kernel/traps.c | |||
@@ -18,7 +18,7 @@ | |||
18 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
19 | #include <linux/string.h> | 19 | #include <linux/string.h> |
20 | #include <linux/errno.h> | 20 | #include <linux/errno.h> |
21 | #include <linux/ptrace.h> | 21 | #include <linux/tracehook.h> |
22 | #include <linux/timer.h> | 22 | #include <linux/timer.h> |
23 | #include <linux/mm.h> | 23 | #include <linux/mm.h> |
24 | #include <linux/smp.h> | 24 | #include <linux/smp.h> |
@@ -382,7 +382,7 @@ void __kprobes do_single_step(struct pt_regs *regs) | |||
382 | SIGTRAP) == NOTIFY_STOP){ | 382 | SIGTRAP) == NOTIFY_STOP){ |
383 | return; | 383 | return; |
384 | } | 384 | } |
385 | if ((current->ptrace & PT_PTRACED) != 0) | 385 | if (tracehook_consider_fatal_signal(current, SIGTRAP)) |
386 | force_sig(SIGTRAP, current); | 386 | force_sig(SIGTRAP, current); |
387 | } | 387 | } |
388 | 388 | ||
@@ -483,7 +483,7 @@ static void illegal_op(struct pt_regs * regs, long interruption_code) | |||
483 | if (get_user(*((__u16 *) opcode), (__u16 __user *) location)) | 483 | if (get_user(*((__u16 *) opcode), (__u16 __user *) location)) |
484 | return; | 484 | return; |
485 | if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) { | 485 | if (*((__u16 *) opcode) == S390_BREAKPOINT_U16) { |
486 | if (current->ptrace & PT_PTRACED) | 486 | if (tracehook_consider_fatal_signal(current, SIGTRAP)) |
487 | force_sig(SIGTRAP, current); | 487 | force_sig(SIGTRAP, current); |
488 | else | 488 | else |
489 | signal = SIGILL; | 489 | signal = SIGILL; |
diff --git a/arch/score/include/asm/asm-offsets.h b/arch/score/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/score/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/score/include/asm/cacheflush.h b/arch/score/include/asm/cacheflush.h index caaba24036e3..1d545d0ce206 100644 --- a/arch/score/include/asm/cacheflush.h +++ b/arch/score/include/asm/cacheflush.h | |||
@@ -14,10 +14,12 @@ extern void flush_cache_sigtramp(unsigned long addr); | |||
14 | extern void flush_icache_all(void); | 14 | extern void flush_icache_all(void); |
15 | extern void flush_icache_range(unsigned long start, unsigned long end); | 15 | extern void flush_icache_range(unsigned long start, unsigned long end); |
16 | extern void flush_dcache_range(unsigned long start, unsigned long end); | 16 | extern void flush_dcache_range(unsigned long start, unsigned long end); |
17 | extern void flush_dcache_page(struct page *page); | ||
18 | |||
19 | #define PG_dcache_dirty PG_arch_1 | ||
17 | 20 | ||
18 | #define flush_cache_dup_mm(mm) do {} while (0) | 21 | #define flush_cache_dup_mm(mm) do {} while (0) |
19 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 | 22 | #define ARCH_IMPLEMENTS_FLUSH_DCACHE_PAGE 0 |
20 | #define flush_dcache_page(page) do {} while (0) | ||
21 | #define flush_dcache_mmap_lock(mapping) do {} while (0) | 23 | #define flush_dcache_mmap_lock(mapping) do {} while (0) |
22 | #define flush_dcache_mmap_unlock(mapping) do {} while (0) | 24 | #define flush_dcache_mmap_unlock(mapping) do {} while (0) |
23 | #define flush_cache_vmap(start, end) do {} while (0) | 25 | #define flush_cache_vmap(start, end) do {} while (0) |
diff --git a/arch/score/include/asm/delay.h b/arch/score/include/asm/delay.h index 6726ec199dc0..529e494712a5 100644 --- a/arch/score/include/asm/delay.h +++ b/arch/score/include/asm/delay.h | |||
@@ -1,6 +1,8 @@ | |||
1 | #ifndef _ASM_SCORE_DELAY_H | 1 | #ifndef _ASM_SCORE_DELAY_H |
2 | #define _ASM_SCORE_DELAY_H | 2 | #define _ASM_SCORE_DELAY_H |
3 | 3 | ||
4 | #include <asm-generic/param.h> | ||
5 | |||
4 | static inline void __delay(unsigned long loops) | 6 | static inline void __delay(unsigned long loops) |
5 | { | 7 | { |
6 | /* 3 cycles per loop. */ | 8 | /* 3 cycles per loop. */ |
diff --git a/arch/score/include/asm/page.h b/arch/score/include/asm/page.h index d92a5a2d36d4..1e9ade8e77e6 100644 --- a/arch/score/include/asm/page.h +++ b/arch/score/include/asm/page.h | |||
@@ -74,7 +74,7 @@ extern unsigned long max_pfn; | |||
74 | #define page_to_bus(page) (page_to_phys(page)) | 74 | #define page_to_bus(page) (page_to_phys(page)) |
75 | #define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) | 75 | #define phys_to_page(paddr) (pfn_to_page(phys_to_pfn(paddr))) |
76 | 76 | ||
77 | #define pfn_valid(pfn) ((pfn) >= min_low_pfn && (pfn) < max_mapnr) | 77 | #define pfn_valid(pfn) (((pfn) >= min_low_pfn) && ((pfn) < max_low_pfn)) |
78 | 78 | ||
79 | #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) | 79 | #define ARCH_PFN_OFFSET (PAGE_OFFSET >> PAGE_SHIFT) |
80 | 80 | ||
diff --git a/arch/score/kernel/setup.c b/arch/score/kernel/setup.c index 6a2503c75c4e..6f898c057878 100644 --- a/arch/score/kernel/setup.c +++ b/arch/score/kernel/setup.c | |||
@@ -49,6 +49,7 @@ static void __init bootmem_init(void) | |||
49 | 49 | ||
50 | min_low_pfn = PFN_UP(MEMORY_START); | 50 | min_low_pfn = PFN_UP(MEMORY_START); |
51 | max_low_pfn = PFN_UP(MEMORY_START + MEMORY_SIZE); | 51 | max_low_pfn = PFN_UP(MEMORY_START + MEMORY_SIZE); |
52 | max_mapnr = max_low_pfn - min_low_pfn; | ||
52 | 53 | ||
53 | /* Initialize the boot-time allocator with low memory only. */ | 54 | /* Initialize the boot-time allocator with low memory only. */ |
54 | bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, | 55 | bootmap_size = init_bootmem_node(NODE_DATA(0), start_pfn, |
diff --git a/arch/score/mm/cache.c b/arch/score/mm/cache.c index dbac9d9dfddd..b25e95743600 100644 --- a/arch/score/mm/cache.c +++ b/arch/score/mm/cache.c | |||
@@ -29,6 +29,7 @@ | |||
29 | #include <linux/mm.h> | 29 | #include <linux/mm.h> |
30 | #include <linux/module.h> | 30 | #include <linux/module.h> |
31 | #include <linux/sched.h> | 31 | #include <linux/sched.h> |
32 | #include <linux/fs.h> | ||
32 | 33 | ||
33 | #include <asm/mmu_context.h> | 34 | #include <asm/mmu_context.h> |
34 | 35 | ||
@@ -51,6 +52,27 @@ static void flush_data_cache_page(unsigned long addr) | |||
51 | } | 52 | } |
52 | } | 53 | } |
53 | 54 | ||
55 | void flush_dcache_page(struct page *page) | ||
56 | { | ||
57 | struct address_space *mapping = page_mapping(page); | ||
58 | unsigned long addr; | ||
59 | |||
60 | if (PageHighMem(page)) | ||
61 | return; | ||
62 | if (mapping && !mapping_mapped(mapping)) { | ||
63 | set_bit(PG_dcache_dirty, &(page)->flags); | ||
64 | return; | ||
65 | } | ||
66 | |||
67 | /* | ||
68 | * We could delay the flush for the !page_mapping case too. But that | ||
69 | * case is for exec env/arg pages and those are %99 certainly going to | ||
70 | * get faulted into the tlb (and thus flushed) anyways. | ||
71 | */ | ||
72 | addr = (unsigned long) page_address(page); | ||
73 | flush_data_cache_page(addr); | ||
74 | } | ||
75 | |||
54 | /* called by update_mmu_cache. */ | 76 | /* called by update_mmu_cache. */ |
55 | void __update_cache(struct vm_area_struct *vma, unsigned long address, | 77 | void __update_cache(struct vm_area_struct *vma, unsigned long address, |
56 | pte_t pte) | 78 | pte_t pte) |
@@ -63,11 +85,11 @@ void __update_cache(struct vm_area_struct *vma, unsigned long address, | |||
63 | if (unlikely(!pfn_valid(pfn))) | 85 | if (unlikely(!pfn_valid(pfn))) |
64 | return; | 86 | return; |
65 | page = pfn_to_page(pfn); | 87 | page = pfn_to_page(pfn); |
66 | if (page_mapping(page) && test_bit(PG_arch_1, &page->flags)) { | 88 | if (page_mapping(page) && test_bit(PG_dcache_dirty, &(page)->flags)) { |
67 | addr = (unsigned long) page_address(page); | 89 | addr = (unsigned long) page_address(page); |
68 | if (exec) | 90 | if (exec) |
69 | flush_data_cache_page(addr); | 91 | flush_data_cache_page(addr); |
70 | clear_bit(PG_arch_1, &page->flags); | 92 | clear_bit(PG_dcache_dirty, &(page)->flags); |
71 | } | 93 | } |
72 | } | 94 | } |
73 | 95 | ||
diff --git a/arch/score/mm/init.c b/arch/score/mm/init.c index 4e3dcd0c4716..8c15b2c85d5a 100644 --- a/arch/score/mm/init.c +++ b/arch/score/mm/init.c | |||
@@ -83,7 +83,6 @@ void __init mem_init(void) | |||
83 | unsigned long codesize, reservedpages, datasize, initsize; | 83 | unsigned long codesize, reservedpages, datasize, initsize; |
84 | unsigned long tmp, ram = 0; | 84 | unsigned long tmp, ram = 0; |
85 | 85 | ||
86 | max_mapnr = max_low_pfn; | ||
87 | high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); | 86 | high_memory = (void *) __va(max_low_pfn << PAGE_SHIFT); |
88 | totalram_pages += free_all_bootmem(); | 87 | totalram_pages += free_all_bootmem(); |
89 | totalram_pages -= setup_zero_page(); /* Setup zeroed pages. */ | 88 | totalram_pages -= setup_zero_page(); /* Setup zeroed pages. */ |
@@ -101,10 +100,6 @@ void __init mem_init(void) | |||
101 | datasize = (unsigned long) &_edata - (unsigned long) &_etext; | 100 | datasize = (unsigned long) &_edata - (unsigned long) &_etext; |
102 | initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; | 101 | initsize = (unsigned long) &__init_end - (unsigned long) &__init_begin; |
103 | 102 | ||
104 | kclist_add(&kcore_mem, __va(0), max_low_pfn << PAGE_SHIFT); | ||
105 | kclist_add(&kcore_vmalloc, (void *) VMALLOC_START, | ||
106 | VMALLOC_END - VMALLOC_START); | ||
107 | |||
108 | printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " | 103 | printk(KERN_INFO "Memory: %luk/%luk available (%ldk kernel code, " |
109 | "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n", | 104 | "%ldk reserved, %ldk data, %ldk init, %ldk highmem)\n", |
110 | (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), | 105 | (unsigned long) nr_free_pages() << (PAGE_SHIFT-10), |
diff --git a/arch/sh/Makefile b/arch/sh/Makefile index ac17c5ac550e..db91925c79d1 100644 --- a/arch/sh/Makefile +++ b/arch/sh/Makefile | |||
@@ -205,10 +205,7 @@ libs-$(CONFIG_SUPERH64) := arch/sh/lib64/ $(libs-y) | |||
205 | 205 | ||
206 | BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec uImage.bin \ | 206 | BOOT_TARGETS = uImage uImage.bz2 uImage.gz uImage.lzma uImage.srec uImage.bin \ |
207 | zImage vmlinux.srec romImage | 207 | zImage vmlinux.srec romImage |
208 | PHONY += maketools $(BOOT_TARGETS) FORCE | 208 | PHONY += $(BOOT_TARGETS) |
209 | |||
210 | maketools: include/linux/version.h FORCE | ||
211 | $(Q)$(MAKE) $(build)=arch/sh/tools include/asm-sh/machtypes.h | ||
212 | 209 | ||
213 | all: $(KBUILD_IMAGE) | 210 | all: $(KBUILD_IMAGE) |
214 | 211 | ||
@@ -217,7 +214,8 @@ $(BOOT_TARGETS): vmlinux | |||
217 | 214 | ||
218 | compressed: zImage | 215 | compressed: zImage |
219 | 216 | ||
220 | archprepare: maketools | 217 | archprepare: |
218 | $(Q)$(MAKE) $(build)=arch/sh/tools include/generated/machtypes.h | ||
221 | 219 | ||
222 | archclean: | 220 | archclean: |
223 | $(Q)$(MAKE) $(clean)=$(boot) | 221 | $(Q)$(MAKE) $(clean)=$(boot) |
@@ -234,5 +232,3 @@ define archhelp | |||
234 | @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)' | 232 | @echo ' uImage.bz2 - Kernel-only image for U-Boot (bzip2)' |
235 | @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)' | 233 | @echo ' uImage.lzma - Kernel-only image for U-Boot (lzma)' |
236 | endef | 234 | endef |
237 | |||
238 | CLEAN_FILES += include/asm-sh/machtypes.h | ||
diff --git a/arch/sh/drivers/pci/fixups-rts7751r2d.c b/arch/sh/drivers/pci/fixups-rts7751r2d.c index 052b354236dc..7898f14d6641 100644 --- a/arch/sh/drivers/pci/fixups-rts7751r2d.c +++ b/arch/sh/drivers/pci/fixups-rts7751r2d.c | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <mach/lboxre2.h> | 15 | #include <mach/lboxre2.h> |
16 | #include <mach/r2d.h> | 16 | #include <mach/r2d.h> |
17 | #include "pci-sh4.h" | 17 | #include "pci-sh4.h" |
18 | #include <asm/machtypes.h> | 18 | #include <generated/machtypes.h> |
19 | 19 | ||
20 | #define PCIMCR_MRSET_OFF 0xBFFFFFFF | 20 | #define PCIMCR_MRSET_OFF 0xBFFFFFFF |
21 | #define PCIMCR_RFSH_OFF 0xFFFFFFFB | 21 | #define PCIMCR_RFSH_OFF 0xFFFFFFFB |
diff --git a/arch/sh/include/asm/.gitignore b/arch/sh/include/asm/.gitignore deleted file mode 100644 index 378db779fb6c..000000000000 --- a/arch/sh/include/asm/.gitignore +++ /dev/null | |||
@@ -1 +0,0 @@ | |||
1 | machtypes.h | ||
diff --git a/arch/sh/include/asm/asm-offsets.h b/arch/sh/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/sh/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/sh/include/asm/machvec.h b/arch/sh/include/asm/machvec.h index 84dd37761f56..9c30955630ff 100644 --- a/arch/sh/include/asm/machvec.h +++ b/arch/sh/include/asm/machvec.h | |||
@@ -12,7 +12,7 @@ | |||
12 | 12 | ||
13 | #include <linux/types.h> | 13 | #include <linux/types.h> |
14 | #include <linux/time.h> | 14 | #include <linux/time.h> |
15 | #include <asm/machtypes.h> | 15 | #include <generated/machtypes.h> |
16 | 16 | ||
17 | struct sh_machine_vector { | 17 | struct sh_machine_vector { |
18 | void (*mv_setup)(char **cmdline_p); | 18 | void (*mv_setup)(char **cmdline_p); |
diff --git a/arch/sh/tools/Makefile b/arch/sh/tools/Makefile index 567516b58acc..558a56bcc7cf 100644 --- a/arch/sh/tools/Makefile +++ b/arch/sh/tools/Makefile | |||
@@ -10,7 +10,7 @@ | |||
10 | # Shamelessly cloned from ARM. | 10 | # Shamelessly cloned from ARM. |
11 | # | 11 | # |
12 | 12 | ||
13 | include/asm-sh/machtypes.h: $(src)/gen-mach-types $(src)/mach-types | 13 | include/generated/machtypes.h: $(src)/gen-mach-types $(src)/mach-types |
14 | @echo ' Generating $@' | 14 | @echo ' Generating $@' |
15 | $(Q)if [ ! -d include/asm-sh ]; then mkdir -p include/asm-sh; fi | 15 | $(Q)mkdir -p $(dir $@) |
16 | $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } | 16 | $(Q)$(AWK) -f $^ > $@ || { rm -f $@; /bin/false; } |
diff --git a/arch/sh/tools/gen-mach-types b/arch/sh/tools/gen-mach-types index 65161e368353..f5ff7c5d8913 100644 --- a/arch/sh/tools/gen-mach-types +++ b/arch/sh/tools/gen-mach-types | |||
@@ -1,6 +1,6 @@ | |||
1 | #!/bin/awk | 1 | #!/bin/awk |
2 | # | 2 | # |
3 | # Awk script to generate include/asm-sh/machtypes.h | 3 | # Awk script to generate include/generated/machtypes.h |
4 | # Heavily based on arch/arm/tools/gen-mach-types | 4 | # Heavily based on arch/arm/tools/gen-mach-types |
5 | # | 5 | # |
6 | BEGIN { nr = 0 } | 6 | BEGIN { nr = 0 } |
diff --git a/arch/sparc/include/asm/asm-offsets.h b/arch/sparc/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/sparc/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/sparc/include/asm/fcntl.h b/arch/sparc/include/asm/fcntl.h index 3b9cfb39175e..38f37b333cc7 100644 --- a/arch/sparc/include/asm/fcntl.h +++ b/arch/sparc/include/asm/fcntl.h | |||
@@ -19,7 +19,7 @@ | |||
19 | #define O_NOATIME 0x200000 | 19 | #define O_NOATIME 0x200000 |
20 | #define O_CLOEXEC 0x400000 | 20 | #define O_CLOEXEC 0x400000 |
21 | /* | 21 | /* |
22 | * Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using | 22 | * Before Linux 2.6.33 only O_DSYNC semantics were implemented, but using |
23 | * the O_SYNC flag. We continue to use the existing numerical value | 23 | * the O_SYNC flag. We continue to use the existing numerical value |
24 | * for O_DSYNC semantics now, but using the correct symbolic name for it. | 24 | * for O_DSYNC semantics now, but using the correct symbolic name for it. |
25 | * This new value is used to request true Posix O_SYNC semantics. It is | 25 | * This new value is used to request true Posix O_SYNC semantics. It is |
diff --git a/arch/um/Makefile b/arch/um/Makefile index fc633dbacf84..fab8121d2b32 100644 --- a/arch/um/Makefile +++ b/arch/um/Makefile | |||
@@ -149,6 +149,6 @@ $(SHARED_HEADERS)/user_constants.h: $(ARCH_DIR)/sys-$(SUBARCH)/user-offsets.s | |||
149 | 149 | ||
150 | $(SHARED_HEADERS)/kern_constants.h: | 150 | $(SHARED_HEADERS)/kern_constants.h: |
151 | $(Q)mkdir -p $(dir $@) | 151 | $(Q)mkdir -p $(dir $@) |
152 | $(Q)echo '#include "../../../../include/asm/asm-offsets.h"' >$@ | 152 | $(Q)echo '#include "../../../../include/generated/asm-offsets.h"' >$@ |
153 | 153 | ||
154 | export SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS HEADER_ARCH DEV_NULL_PATH | 154 | export SUBARCH USER_CFLAGS CFLAGS_NO_HARDENING OS HEADER_ARCH DEV_NULL_PATH |
diff --git a/arch/um/include/asm/asm-offsets.h b/arch/um/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/um/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/x86/boot/header.S b/arch/x86/boot/header.S index b31cc54b4641..93e689f4bd86 100644 --- a/arch/x86/boot/header.S +++ b/arch/x86/boot/header.S | |||
@@ -16,7 +16,7 @@ | |||
16 | */ | 16 | */ |
17 | 17 | ||
18 | #include <asm/segment.h> | 18 | #include <asm/segment.h> |
19 | #include <linux/utsrelease.h> | 19 | #include <generated/utsrelease.h> |
20 | #include <asm/boot.h> | 20 | #include <asm/boot.h> |
21 | #include <asm/e820.h> | 21 | #include <asm/e820.h> |
22 | #include <asm/page_types.h> | 22 | #include <asm/page_types.h> |
diff --git a/arch/x86/boot/version.c b/arch/x86/boot/version.c index 2723d9b5ce43..2b15aa488ffb 100644 --- a/arch/x86/boot/version.c +++ b/arch/x86/boot/version.c | |||
@@ -13,8 +13,8 @@ | |||
13 | */ | 13 | */ |
14 | 14 | ||
15 | #include "boot.h" | 15 | #include "boot.h" |
16 | #include <linux/utsrelease.h> | 16 | #include <generated/utsrelease.h> |
17 | #include <linux/compile.h> | 17 | #include <generated/compile.h> |
18 | 18 | ||
19 | const char kernel_version[] = | 19 | const char kernel_version[] = |
20 | UTS_RELEASE " (" LINUX_COMPILE_BY "@" LINUX_COMPILE_HOST ") " | 20 | UTS_RELEASE " (" LINUX_COMPILE_BY "@" LINUX_COMPILE_HOST ") " |
diff --git a/arch/x86/include/asm/asm-offsets.h b/arch/x86/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/x86/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h index 613700f27a4a..637e1ec963c3 100644 --- a/arch/x86/include/asm/cpufeature.h +++ b/arch/x86/include/asm/cpufeature.h | |||
@@ -153,6 +153,7 @@ | |||
153 | #define X86_FEATURE_SSE5 (6*32+11) /* SSE-5 */ | 153 | #define X86_FEATURE_SSE5 (6*32+11) /* SSE-5 */ |
154 | #define X86_FEATURE_SKINIT (6*32+12) /* SKINIT/STGI instructions */ | 154 | #define X86_FEATURE_SKINIT (6*32+12) /* SKINIT/STGI instructions */ |
155 | #define X86_FEATURE_WDT (6*32+13) /* Watchdog timer */ | 155 | #define X86_FEATURE_WDT (6*32+13) /* Watchdog timer */ |
156 | #define X86_FEATURE_NODEID_MSR (6*32+19) /* NodeId MSR */ | ||
156 | 157 | ||
157 | /* | 158 | /* |
158 | * Auxiliary flags: Linux defined - For features scattered in various | 159 | * Auxiliary flags: Linux defined - For features scattered in various |
diff --git a/arch/x86/include/asm/hw_irq.h b/arch/x86/include/asm/hw_irq.h index 08c48a81841f..eeac829a0f44 100644 --- a/arch/x86/include/asm/hw_irq.h +++ b/arch/x86/include/asm/hw_irq.h | |||
@@ -103,7 +103,8 @@ extern int assign_irq_vector(int, struct irq_cfg *, const struct cpumask *); | |||
103 | extern void send_cleanup_vector(struct irq_cfg *); | 103 | extern void send_cleanup_vector(struct irq_cfg *); |
104 | 104 | ||
105 | struct irq_desc; | 105 | struct irq_desc; |
106 | extern unsigned int set_desc_affinity(struct irq_desc *, const struct cpumask *); | 106 | extern unsigned int set_desc_affinity(struct irq_desc *, const struct cpumask *, |
107 | unsigned int *dest_id); | ||
107 | extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin, struct io_apic_irq_attr *irq_attr); | 108 | extern int IO_APIC_get_PCI_irq_vector(int bus, int devfn, int pin, struct io_apic_irq_attr *irq_attr); |
108 | extern void setup_ioapic_dest(void); | 109 | extern void setup_ioapic_dest(void); |
109 | 110 | ||
diff --git a/arch/x86/include/asm/msr-index.h b/arch/x86/include/asm/msr-index.h index 4ffe09b2ad75..1cd58cdbc03f 100644 --- a/arch/x86/include/asm/msr-index.h +++ b/arch/x86/include/asm/msr-index.h | |||
@@ -12,6 +12,7 @@ | |||
12 | #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ | 12 | #define MSR_FS_BASE 0xc0000100 /* 64bit FS base */ |
13 | #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ | 13 | #define MSR_GS_BASE 0xc0000101 /* 64bit GS base */ |
14 | #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ | 14 | #define MSR_KERNEL_GS_BASE 0xc0000102 /* SwapGS GS shadow */ |
15 | #define MSR_TSC_AUX 0xc0000103 /* Auxiliary TSC */ | ||
15 | 16 | ||
16 | /* EFER bits: */ | 17 | /* EFER bits: */ |
17 | #define _EFER_SCE 0 /* SYSCALL/SYSRET */ | 18 | #define _EFER_SCE 0 /* SYSCALL/SYSRET */ |
@@ -123,6 +124,7 @@ | |||
123 | #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2 | 124 | #define FAM10H_MMIO_CONF_BUSRANGE_SHIFT 2 |
124 | #define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff | 125 | #define FAM10H_MMIO_CONF_BASE_MASK 0xfffffff |
125 | #define FAM10H_MMIO_CONF_BASE_SHIFT 20 | 126 | #define FAM10H_MMIO_CONF_BASE_SHIFT 20 |
127 | #define MSR_FAM10H_NODE_ID 0xc001100c | ||
126 | 128 | ||
127 | /* K8 MSRs */ | 129 | /* K8 MSRs */ |
128 | #define MSR_K8_TOP_MEM1 0xc001001a | 130 | #define MSR_K8_TOP_MEM1 0xc001001a |
diff --git a/arch/x86/include/asm/msr.h b/arch/x86/include/asm/msr.h index 2d228fc9b4b7..c5bc4c2d33f5 100644 --- a/arch/x86/include/asm/msr.h +++ b/arch/x86/include/asm/msr.h | |||
@@ -27,6 +27,18 @@ struct msr { | |||
27 | }; | 27 | }; |
28 | }; | 28 | }; |
29 | 29 | ||
30 | struct msr_info { | ||
31 | u32 msr_no; | ||
32 | struct msr reg; | ||
33 | struct msr *msrs; | ||
34 | int err; | ||
35 | }; | ||
36 | |||
37 | struct msr_regs_info { | ||
38 | u32 *regs; | ||
39 | int err; | ||
40 | }; | ||
41 | |||
30 | static inline unsigned long long native_read_tscp(unsigned int *aux) | 42 | static inline unsigned long long native_read_tscp(unsigned int *aux) |
31 | { | 43 | { |
32 | unsigned long low, high; | 44 | unsigned long low, high; |
@@ -240,9 +252,9 @@ do { \ | |||
240 | #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \ | 252 | #define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \ |
241 | (u32)((val) >> 32)) | 253 | (u32)((val) >> 32)) |
242 | 254 | ||
243 | #define write_tsc(val1, val2) wrmsr(0x10, (val1), (val2)) | 255 | #define write_tsc(val1, val2) wrmsr(MSR_IA32_TSC, (val1), (val2)) |
244 | 256 | ||
245 | #define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0) | 257 | #define write_rdtscp_aux(val) wrmsr(MSR_TSC_AUX, (val), 0) |
246 | 258 | ||
247 | struct msr *msrs_alloc(void); | 259 | struct msr *msrs_alloc(void); |
248 | void msrs_free(struct msr *msrs); | 260 | void msrs_free(struct msr *msrs); |
diff --git a/arch/x86/include/asm/processor.h b/arch/x86/include/asm/processor.h index 6f8ec1c37e0a..fc801bab1b3b 100644 --- a/arch/x86/include/asm/processor.h +++ b/arch/x86/include/asm/processor.h | |||
@@ -181,7 +181,7 @@ static inline void native_cpuid(unsigned int *eax, unsigned int *ebx, | |||
181 | unsigned int *ecx, unsigned int *edx) | 181 | unsigned int *ecx, unsigned int *edx) |
182 | { | 182 | { |
183 | /* ecx is often an input as well as an output. */ | 183 | /* ecx is often an input as well as an output. */ |
184 | asm("cpuid" | 184 | asm volatile("cpuid" |
185 | : "=a" (*eax), | 185 | : "=a" (*eax), |
186 | "=b" (*ebx), | 186 | "=b" (*ebx), |
187 | "=c" (*ecx), | 187 | "=c" (*ecx), |
diff --git a/arch/x86/kernel/apic/apic_flat_64.c b/arch/x86/kernel/apic/apic_flat_64.c index d0c99abc26c3..eacbd2b31d27 100644 --- a/arch/x86/kernel/apic/apic_flat_64.c +++ b/arch/x86/kernel/apic/apic_flat_64.c | |||
@@ -306,10 +306,7 @@ physflat_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
306 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 306 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
307 | break; | 307 | break; |
308 | } | 308 | } |
309 | if (cpu < nr_cpu_ids) | 309 | return per_cpu(x86_cpu_to_apicid, cpu); |
310 | return per_cpu(x86_cpu_to_apicid, cpu); | ||
311 | |||
312 | return BAD_APICID; | ||
313 | } | 310 | } |
314 | 311 | ||
315 | struct apic apic_physflat = { | 312 | struct apic apic_physflat = { |
diff --git a/arch/x86/kernel/apic/bigsmp_32.c b/arch/x86/kernel/apic/bigsmp_32.c index 38dcecfa5818..cb804c5091b9 100644 --- a/arch/x86/kernel/apic/bigsmp_32.c +++ b/arch/x86/kernel/apic/bigsmp_32.c | |||
@@ -131,10 +131,7 @@ static unsigned int bigsmp_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
131 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 131 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
132 | break; | 132 | break; |
133 | } | 133 | } |
134 | if (cpu < nr_cpu_ids) | 134 | return bigsmp_cpu_to_logical_apicid(cpu); |
135 | return bigsmp_cpu_to_logical_apicid(cpu); | ||
136 | |||
137 | return BAD_APICID; | ||
138 | } | 135 | } |
139 | 136 | ||
140 | static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb) | 137 | static int bigsmp_phys_pkg_id(int cpuid_apic, int index_msb) |
diff --git a/arch/x86/kernel/apic/io_apic.c b/arch/x86/kernel/apic/io_apic.c index 11a5851f1f50..de00c4619a55 100644 --- a/arch/x86/kernel/apic/io_apic.c +++ b/arch/x86/kernel/apic/io_apic.c | |||
@@ -2276,26 +2276,28 @@ static void __target_IO_APIC_irq(unsigned int irq, unsigned int dest, struct irq | |||
2276 | 2276 | ||
2277 | /* | 2277 | /* |
2278 | * Either sets desc->affinity to a valid value, and returns | 2278 | * Either sets desc->affinity to a valid value, and returns |
2279 | * ->cpu_mask_to_apicid of that, or returns BAD_APICID and | 2279 | * ->cpu_mask_to_apicid of that in dest_id, or returns -1 and |
2280 | * leaves desc->affinity untouched. | 2280 | * leaves desc->affinity untouched. |
2281 | */ | 2281 | */ |
2282 | unsigned int | 2282 | unsigned int |
2283 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask) | 2283 | set_desc_affinity(struct irq_desc *desc, const struct cpumask *mask, |
2284 | unsigned int *dest_id) | ||
2284 | { | 2285 | { |
2285 | struct irq_cfg *cfg; | 2286 | struct irq_cfg *cfg; |
2286 | unsigned int irq; | 2287 | unsigned int irq; |
2287 | 2288 | ||
2288 | if (!cpumask_intersects(mask, cpu_online_mask)) | 2289 | if (!cpumask_intersects(mask, cpu_online_mask)) |
2289 | return BAD_APICID; | 2290 | return -1; |
2290 | 2291 | ||
2291 | irq = desc->irq; | 2292 | irq = desc->irq; |
2292 | cfg = desc->chip_data; | 2293 | cfg = desc->chip_data; |
2293 | if (assign_irq_vector(irq, cfg, mask)) | 2294 | if (assign_irq_vector(irq, cfg, mask)) |
2294 | return BAD_APICID; | 2295 | return -1; |
2295 | 2296 | ||
2296 | cpumask_copy(desc->affinity, mask); | 2297 | cpumask_copy(desc->affinity, mask); |
2297 | 2298 | ||
2298 | return apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); | 2299 | *dest_id = apic->cpu_mask_to_apicid_and(desc->affinity, cfg->domain); |
2300 | return 0; | ||
2299 | } | 2301 | } |
2300 | 2302 | ||
2301 | static int | 2303 | static int |
@@ -2311,12 +2313,11 @@ set_ioapic_affinity_irq_desc(struct irq_desc *desc, const struct cpumask *mask) | |||
2311 | cfg = desc->chip_data; | 2313 | cfg = desc->chip_data; |
2312 | 2314 | ||
2313 | spin_lock_irqsave(&ioapic_lock, flags); | 2315 | spin_lock_irqsave(&ioapic_lock, flags); |
2314 | dest = set_desc_affinity(desc, mask); | 2316 | ret = set_desc_affinity(desc, mask, &dest); |
2315 | if (dest != BAD_APICID) { | 2317 | if (!ret) { |
2316 | /* Only the high 8 bits are valid. */ | 2318 | /* Only the high 8 bits are valid. */ |
2317 | dest = SET_APIC_LOGICAL_ID(dest); | 2319 | dest = SET_APIC_LOGICAL_ID(dest); |
2318 | __target_IO_APIC_irq(irq, dest, cfg); | 2320 | __target_IO_APIC_irq(irq, dest, cfg); |
2319 | ret = 0; | ||
2320 | } | 2321 | } |
2321 | spin_unlock_irqrestore(&ioapic_lock, flags); | 2322 | spin_unlock_irqrestore(&ioapic_lock, flags); |
2322 | 2323 | ||
@@ -3351,8 +3352,7 @@ static int set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3351 | struct msi_msg msg; | 3352 | struct msi_msg msg; |
3352 | unsigned int dest; | 3353 | unsigned int dest; |
3353 | 3354 | ||
3354 | dest = set_desc_affinity(desc, mask); | 3355 | if (set_desc_affinity(desc, mask, &dest)) |
3355 | if (dest == BAD_APICID) | ||
3356 | return -1; | 3356 | return -1; |
3357 | 3357 | ||
3358 | cfg = desc->chip_data; | 3358 | cfg = desc->chip_data; |
@@ -3384,8 +3384,7 @@ ir_set_msi_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3384 | if (get_irte(irq, &irte)) | 3384 | if (get_irte(irq, &irte)) |
3385 | return -1; | 3385 | return -1; |
3386 | 3386 | ||
3387 | dest = set_desc_affinity(desc, mask); | 3387 | if (set_desc_affinity(desc, mask, &dest)) |
3388 | if (dest == BAD_APICID) | ||
3389 | return -1; | 3388 | return -1; |
3390 | 3389 | ||
3391 | irte.vector = cfg->vector; | 3390 | irte.vector = cfg->vector; |
@@ -3567,8 +3566,7 @@ static int dmar_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3567 | struct msi_msg msg; | 3566 | struct msi_msg msg; |
3568 | unsigned int dest; | 3567 | unsigned int dest; |
3569 | 3568 | ||
3570 | dest = set_desc_affinity(desc, mask); | 3569 | if (set_desc_affinity(desc, mask, &dest)) |
3571 | if (dest == BAD_APICID) | ||
3572 | return -1; | 3570 | return -1; |
3573 | 3571 | ||
3574 | cfg = desc->chip_data; | 3572 | cfg = desc->chip_data; |
@@ -3623,8 +3621,7 @@ static int hpet_msi_set_affinity(unsigned int irq, const struct cpumask *mask) | |||
3623 | struct msi_msg msg; | 3621 | struct msi_msg msg; |
3624 | unsigned int dest; | 3622 | unsigned int dest; |
3625 | 3623 | ||
3626 | dest = set_desc_affinity(desc, mask); | 3624 | if (set_desc_affinity(desc, mask, &dest)) |
3627 | if (dest == BAD_APICID) | ||
3628 | return -1; | 3625 | return -1; |
3629 | 3626 | ||
3630 | cfg = desc->chip_data; | 3627 | cfg = desc->chip_data; |
@@ -3730,8 +3727,7 @@ static int set_ht_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
3730 | struct irq_cfg *cfg; | 3727 | struct irq_cfg *cfg; |
3731 | unsigned int dest; | 3728 | unsigned int dest; |
3732 | 3729 | ||
3733 | dest = set_desc_affinity(desc, mask); | 3730 | if (set_desc_affinity(desc, mask, &dest)) |
3734 | if (dest == BAD_APICID) | ||
3735 | return -1; | 3731 | return -1; |
3736 | 3732 | ||
3737 | cfg = desc->chip_data; | 3733 | cfg = desc->chip_data; |
diff --git a/arch/x86/kernel/apic/x2apic_cluster.c b/arch/x86/kernel/apic/x2apic_cluster.c index a5371ec36776..cf69c59f4910 100644 --- a/arch/x86/kernel/apic/x2apic_cluster.c +++ b/arch/x86/kernel/apic/x2apic_cluster.c | |||
@@ -148,10 +148,7 @@ x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
148 | break; | 148 | break; |
149 | } | 149 | } |
150 | 150 | ||
151 | if (cpu < nr_cpu_ids) | 151 | return per_cpu(x86_cpu_to_logical_apicid, cpu); |
152 | return per_cpu(x86_cpu_to_logical_apicid, cpu); | ||
153 | |||
154 | return BAD_APICID; | ||
155 | } | 152 | } |
156 | 153 | ||
157 | static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x) | 154 | static unsigned int x2apic_cluster_phys_get_apic_id(unsigned long x) |
diff --git a/arch/x86/kernel/apic/x2apic_phys.c b/arch/x86/kernel/apic/x2apic_phys.c index a8989aadc99a..8972f38c5ced 100644 --- a/arch/x86/kernel/apic/x2apic_phys.c +++ b/arch/x86/kernel/apic/x2apic_phys.c | |||
@@ -146,10 +146,7 @@ x2apic_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
146 | break; | 146 | break; |
147 | } | 147 | } |
148 | 148 | ||
149 | if (cpu < nr_cpu_ids) | 149 | return per_cpu(x86_cpu_to_apicid, cpu); |
150 | return per_cpu(x86_cpu_to_apicid, cpu); | ||
151 | |||
152 | return BAD_APICID; | ||
153 | } | 150 | } |
154 | 151 | ||
155 | static unsigned int x2apic_phys_get_apic_id(unsigned long x) | 152 | static unsigned int x2apic_phys_get_apic_id(unsigned long x) |
diff --git a/arch/x86/kernel/apic/x2apic_uv_x.c b/arch/x86/kernel/apic/x2apic_uv_x.c index b684bb303cbf..d56b0efb2057 100644 --- a/arch/x86/kernel/apic/x2apic_uv_x.c +++ b/arch/x86/kernel/apic/x2apic_uv_x.c | |||
@@ -225,10 +225,7 @@ uv_cpu_mask_to_apicid_and(const struct cpumask *cpumask, | |||
225 | if (cpumask_test_cpu(cpu, cpu_online_mask)) | 225 | if (cpumask_test_cpu(cpu, cpu_online_mask)) |
226 | break; | 226 | break; |
227 | } | 227 | } |
228 | if (cpu < nr_cpu_ids) | 228 | return per_cpu(x86_cpu_to_apicid, cpu); |
229 | return per_cpu(x86_cpu_to_apicid, cpu); | ||
230 | |||
231 | return BAD_APICID; | ||
232 | } | 229 | } |
233 | 230 | ||
234 | static unsigned int x2apic_get_apic_id(unsigned long x) | 231 | static unsigned int x2apic_get_apic_id(unsigned long x) |
diff --git a/arch/x86/kernel/cpu/amd.c b/arch/x86/kernel/cpu/amd.c index 8dc3ea145c97..e485825130d2 100644 --- a/arch/x86/kernel/cpu/amd.c +++ b/arch/x86/kernel/cpu/amd.c | |||
@@ -254,59 +254,36 @@ static int __cpuinit nearby_node(int apicid) | |||
254 | 254 | ||
255 | /* | 255 | /* |
256 | * Fixup core topology information for AMD multi-node processors. | 256 | * Fixup core topology information for AMD multi-node processors. |
257 | * Assumption 1: Number of cores in each internal node is the same. | 257 | * Assumption: Number of cores in each internal node is the same. |
258 | * Assumption 2: Mixed systems with both single-node and dual-node | ||
259 | * processors are not supported. | ||
260 | */ | 258 | */ |
261 | #ifdef CONFIG_X86_HT | 259 | #ifdef CONFIG_X86_HT |
262 | static void __cpuinit amd_fixup_dcm(struct cpuinfo_x86 *c) | 260 | static void __cpuinit amd_fixup_dcm(struct cpuinfo_x86 *c) |
263 | { | 261 | { |
264 | #ifdef CONFIG_PCI | 262 | unsigned long long value; |
265 | u32 t, cpn; | 263 | u32 nodes, cores_per_node; |
266 | u8 n, n_id; | ||
267 | int cpu = smp_processor_id(); | 264 | int cpu = smp_processor_id(); |
268 | 265 | ||
266 | if (!cpu_has(c, X86_FEATURE_NODEID_MSR)) | ||
267 | return; | ||
268 | |||
269 | /* fixup topology information only once for a core */ | 269 | /* fixup topology information only once for a core */ |
270 | if (cpu_has(c, X86_FEATURE_AMD_DCM)) | 270 | if (cpu_has(c, X86_FEATURE_AMD_DCM)) |
271 | return; | 271 | return; |
272 | 272 | ||
273 | /* check for multi-node processor on boot cpu */ | 273 | rdmsrl(MSR_FAM10H_NODE_ID, value); |
274 | t = read_pci_config(0, 24, 3, 0xe8); | 274 | |
275 | if (!(t & (1 << 29))) | 275 | nodes = ((value >> 3) & 7) + 1; |
276 | if (nodes == 1) | ||
276 | return; | 277 | return; |
277 | 278 | ||
278 | set_cpu_cap(c, X86_FEATURE_AMD_DCM); | 279 | set_cpu_cap(c, X86_FEATURE_AMD_DCM); |
280 | cores_per_node = c->x86_max_cores / nodes; | ||
279 | 281 | ||
280 | /* cores per node: each internal node has half the number of cores */ | 282 | /* store NodeID, use llc_shared_map to store sibling info */ |
281 | cpn = c->x86_max_cores >> 1; | 283 | per_cpu(cpu_llc_id, cpu) = value & 7; |
282 | 284 | ||
283 | /* even-numbered NB_id of this dual-node processor */ | 285 | /* fixup core id to be in range from 0 to (cores_per_node - 1) */ |
284 | n = c->phys_proc_id << 1; | 286 | c->cpu_core_id = c->cpu_core_id % cores_per_node; |
285 | |||
286 | /* | ||
287 | * determine internal node id and assign cores fifty-fifty to | ||
288 | * each node of the dual-node processor | ||
289 | */ | ||
290 | t = read_pci_config(0, 24 + n, 3, 0xe8); | ||
291 | n = (t>>30) & 0x3; | ||
292 | if (n == 0) { | ||
293 | if (c->cpu_core_id < cpn) | ||
294 | n_id = 0; | ||
295 | else | ||
296 | n_id = 1; | ||
297 | } else { | ||
298 | if (c->cpu_core_id < cpn) | ||
299 | n_id = 1; | ||
300 | else | ||
301 | n_id = 0; | ||
302 | } | ||
303 | |||
304 | /* compute entire NodeID, use llc_shared_map to store sibling info */ | ||
305 | per_cpu(cpu_llc_id, cpu) = (c->phys_proc_id << 1) + n_id; | ||
306 | |||
307 | /* fixup core id to be in range from 0 to cpn */ | ||
308 | c->cpu_core_id = c->cpu_core_id % cpn; | ||
309 | #endif | ||
310 | } | 287 | } |
311 | #endif | 288 | #endif |
312 | 289 | ||
diff --git a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c index a9df9441a9a2..f125e5c551c0 100644 --- a/arch/x86/kernel/cpu/cpufreq/powernow-k8.c +++ b/arch/x86/kernel/cpu/cpufreq/powernow-k8.c | |||
@@ -1136,7 +1136,7 @@ static int powernowk8_target(struct cpufreq_policy *pol, | |||
1136 | if (!alloc_cpumask_var(&oldmask, GFP_KERNEL)) | 1136 | if (!alloc_cpumask_var(&oldmask, GFP_KERNEL)) |
1137 | return -ENOMEM; | 1137 | return -ENOMEM; |
1138 | 1138 | ||
1139 | cpumask_copy(oldmask, tsk_cpumask(current)); | 1139 | cpumask_copy(oldmask, tsk_cpus_allowed(current)); |
1140 | set_cpus_allowed_ptr(current, cpumask_of(pol->cpu)); | 1140 | set_cpus_allowed_ptr(current, cpumask_of(pol->cpu)); |
1141 | 1141 | ||
1142 | if (smp_processor_id() != pol->cpu) { | 1142 | if (smp_processor_id() != pol->cpu) { |
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c index 9c31e8b09d2c..879666f4d871 100644 --- a/arch/x86/kernel/cpu/intel.c +++ b/arch/x86/kernel/cpu/intel.c | |||
@@ -70,7 +70,6 @@ static void __cpuinit early_init_intel(struct cpuinfo_x86 *c) | |||
70 | if (c->x86_power & (1 << 8)) { | 70 | if (c->x86_power & (1 << 8)) { |
71 | set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); | 71 | set_cpu_cap(c, X86_FEATURE_CONSTANT_TSC); |
72 | set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); | 72 | set_cpu_cap(c, X86_FEATURE_NONSTOP_TSC); |
73 | set_cpu_cap(c, X86_FEATURE_TSC_RELIABLE); | ||
74 | sched_clock_stable = 1; | 73 | sched_clock_stable = 1; |
75 | } | 74 | } |
76 | 75 | ||
diff --git a/arch/x86/kernel/cpuid.c b/arch/x86/kernel/cpuid.c index 7ef24a796992..cb27fd6136c9 100644 --- a/arch/x86/kernel/cpuid.c +++ b/arch/x86/kernel/cpuid.c | |||
@@ -187,7 +187,8 @@ static int __init cpuid_init(void) | |||
187 | int i, err = 0; | 187 | int i, err = 0; |
188 | i = 0; | 188 | i = 0; |
189 | 189 | ||
190 | if (register_chrdev(CPUID_MAJOR, "cpu/cpuid", &cpuid_fops)) { | 190 | if (__register_chrdev(CPUID_MAJOR, 0, NR_CPUS, |
191 | "cpu/cpuid", &cpuid_fops)) { | ||
191 | printk(KERN_ERR "cpuid: unable to get major %d for cpuid\n", | 192 | printk(KERN_ERR "cpuid: unable to get major %d for cpuid\n", |
192 | CPUID_MAJOR); | 193 | CPUID_MAJOR); |
193 | err = -EBUSY; | 194 | err = -EBUSY; |
@@ -216,7 +217,7 @@ out_class: | |||
216 | } | 217 | } |
217 | class_destroy(cpuid_class); | 218 | class_destroy(cpuid_class); |
218 | out_chrdev: | 219 | out_chrdev: |
219 | unregister_chrdev(CPUID_MAJOR, "cpu/cpuid"); | 220 | __unregister_chrdev(CPUID_MAJOR, 0, NR_CPUS, "cpu/cpuid"); |
220 | out: | 221 | out: |
221 | return err; | 222 | return err; |
222 | } | 223 | } |
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index f50447d961c0..05ed7ab2ca48 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c | |||
@@ -724,7 +724,7 @@ core_initcall(e820_mark_nvs_memory); | |||
724 | /* | 724 | /* |
725 | * Early reserved memory areas. | 725 | * Early reserved memory areas. |
726 | */ | 726 | */ |
727 | #define MAX_EARLY_RES 20 | 727 | #define MAX_EARLY_RES 32 |
728 | 728 | ||
729 | struct early_res { | 729 | struct early_res { |
730 | u64 start, end; | 730 | u64 start, end; |
diff --git a/arch/x86/kernel/msr.c b/arch/x86/kernel/msr.c index 572b07eee3f4..4bd93c9b2b27 100644 --- a/arch/x86/kernel/msr.c +++ b/arch/x86/kernel/msr.c | |||
@@ -246,7 +246,7 @@ static int __init msr_init(void) | |||
246 | int i, err = 0; | 246 | int i, err = 0; |
247 | i = 0; | 247 | i = 0; |
248 | 248 | ||
249 | if (register_chrdev(MSR_MAJOR, "cpu/msr", &msr_fops)) { | 249 | if (__register_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr", &msr_fops)) { |
250 | printk(KERN_ERR "msr: unable to get major %d for msr\n", | 250 | printk(KERN_ERR "msr: unable to get major %d for msr\n", |
251 | MSR_MAJOR); | 251 | MSR_MAJOR); |
252 | err = -EBUSY; | 252 | err = -EBUSY; |
@@ -274,7 +274,7 @@ out_class: | |||
274 | msr_device_destroy(i); | 274 | msr_device_destroy(i); |
275 | class_destroy(msr_class); | 275 | class_destroy(msr_class); |
276 | out_chrdev: | 276 | out_chrdev: |
277 | unregister_chrdev(MSR_MAJOR, "cpu/msr"); | 277 | __unregister_chrdev(MSR_MAJOR, 0, NR_CPUS, "cpu/msr"); |
278 | out: | 278 | out: |
279 | return err; | 279 | return err; |
280 | } | 280 | } |
diff --git a/arch/x86/kernel/ptrace.c b/arch/x86/kernel/ptrace.c index 2779321046bd..017d937639fe 100644 --- a/arch/x86/kernel/ptrace.c +++ b/arch/x86/kernel/ptrace.c | |||
@@ -509,14 +509,14 @@ static int genregs_get(struct task_struct *target, | |||
509 | { | 509 | { |
510 | if (kbuf) { | 510 | if (kbuf) { |
511 | unsigned long *k = kbuf; | 511 | unsigned long *k = kbuf; |
512 | while (count > 0) { | 512 | while (count >= sizeof(*k)) { |
513 | *k++ = getreg(target, pos); | 513 | *k++ = getreg(target, pos); |
514 | count -= sizeof(*k); | 514 | count -= sizeof(*k); |
515 | pos += sizeof(*k); | 515 | pos += sizeof(*k); |
516 | } | 516 | } |
517 | } else { | 517 | } else { |
518 | unsigned long __user *u = ubuf; | 518 | unsigned long __user *u = ubuf; |
519 | while (count > 0) { | 519 | while (count >= sizeof(*u)) { |
520 | if (__put_user(getreg(target, pos), u++)) | 520 | if (__put_user(getreg(target, pos), u++)) |
521 | return -EFAULT; | 521 | return -EFAULT; |
522 | count -= sizeof(*u); | 522 | count -= sizeof(*u); |
@@ -535,14 +535,14 @@ static int genregs_set(struct task_struct *target, | |||
535 | int ret = 0; | 535 | int ret = 0; |
536 | if (kbuf) { | 536 | if (kbuf) { |
537 | const unsigned long *k = kbuf; | 537 | const unsigned long *k = kbuf; |
538 | while (count > 0 && !ret) { | 538 | while (count >= sizeof(*k) && !ret) { |
539 | ret = putreg(target, pos, *k++); | 539 | ret = putreg(target, pos, *k++); |
540 | count -= sizeof(*k); | 540 | count -= sizeof(*k); |
541 | pos += sizeof(*k); | 541 | pos += sizeof(*k); |
542 | } | 542 | } |
543 | } else { | 543 | } else { |
544 | const unsigned long __user *u = ubuf; | 544 | const unsigned long __user *u = ubuf; |
545 | while (count > 0 && !ret) { | 545 | while (count >= sizeof(*u) && !ret) { |
546 | unsigned long word; | 546 | unsigned long word; |
547 | ret = __get_user(word, u++); | 547 | ret = __get_user(word, u++); |
548 | if (ret) | 548 | if (ret) |
@@ -1458,14 +1458,14 @@ static int genregs32_get(struct task_struct *target, | |||
1458 | { | 1458 | { |
1459 | if (kbuf) { | 1459 | if (kbuf) { |
1460 | compat_ulong_t *k = kbuf; | 1460 | compat_ulong_t *k = kbuf; |
1461 | while (count > 0) { | 1461 | while (count >= sizeof(*k)) { |
1462 | getreg32(target, pos, k++); | 1462 | getreg32(target, pos, k++); |
1463 | count -= sizeof(*k); | 1463 | count -= sizeof(*k); |
1464 | pos += sizeof(*k); | 1464 | pos += sizeof(*k); |
1465 | } | 1465 | } |
1466 | } else { | 1466 | } else { |
1467 | compat_ulong_t __user *u = ubuf; | 1467 | compat_ulong_t __user *u = ubuf; |
1468 | while (count > 0) { | 1468 | while (count >= sizeof(*u)) { |
1469 | compat_ulong_t word; | 1469 | compat_ulong_t word; |
1470 | getreg32(target, pos, &word); | 1470 | getreg32(target, pos, &word); |
1471 | if (__put_user(word, u++)) | 1471 | if (__put_user(word, u++)) |
@@ -1486,14 +1486,14 @@ static int genregs32_set(struct task_struct *target, | |||
1486 | int ret = 0; | 1486 | int ret = 0; |
1487 | if (kbuf) { | 1487 | if (kbuf) { |
1488 | const compat_ulong_t *k = kbuf; | 1488 | const compat_ulong_t *k = kbuf; |
1489 | while (count > 0 && !ret) { | 1489 | while (count >= sizeof(*k) && !ret) { |
1490 | ret = putreg32(target, pos, *k++); | 1490 | ret = putreg32(target, pos, *k++); |
1491 | count -= sizeof(*k); | 1491 | count -= sizeof(*k); |
1492 | pos += sizeof(*k); | 1492 | pos += sizeof(*k); |
1493 | } | 1493 | } |
1494 | } else { | 1494 | } else { |
1495 | const compat_ulong_t __user *u = ubuf; | 1495 | const compat_ulong_t __user *u = ubuf; |
1496 | while (count > 0 && !ret) { | 1496 | while (count >= sizeof(*u) && !ret) { |
1497 | compat_ulong_t word; | 1497 | compat_ulong_t word; |
1498 | ret = __get_user(word, u++); | 1498 | ret = __get_user(word, u++); |
1499 | if (ret) | 1499 | if (ret) |
diff --git a/arch/x86/kernel/tsc.c b/arch/x86/kernel/tsc.c index cd982f48e23e..597683aa5ba0 100644 --- a/arch/x86/kernel/tsc.c +++ b/arch/x86/kernel/tsc.c | |||
@@ -763,6 +763,7 @@ void mark_tsc_unstable(char *reason) | |||
763 | { | 763 | { |
764 | if (!tsc_unstable) { | 764 | if (!tsc_unstable) { |
765 | tsc_unstable = 1; | 765 | tsc_unstable = 1; |
766 | sched_clock_stable = 0; | ||
766 | printk(KERN_INFO "Marking TSC unstable due to %s\n", reason); | 767 | printk(KERN_INFO "Marking TSC unstable due to %s\n", reason); |
767 | /* Change only the rating, when not registered */ | 768 | /* Change only the rating, when not registered */ |
768 | if (clocksource_tsc.mult) | 769 | if (clocksource_tsc.mult) |
diff --git a/arch/x86/kernel/uv_irq.c b/arch/x86/kernel/uv_irq.c index 61d805df4c91..ece73d8e3240 100644 --- a/arch/x86/kernel/uv_irq.c +++ b/arch/x86/kernel/uv_irq.c | |||
@@ -215,8 +215,7 @@ static int uv_set_irq_affinity(unsigned int irq, const struct cpumask *mask) | |||
215 | unsigned long mmr_offset; | 215 | unsigned long mmr_offset; |
216 | unsigned mmr_pnode; | 216 | unsigned mmr_pnode; |
217 | 217 | ||
218 | dest = set_desc_affinity(desc, mask); | 218 | if (set_desc_affinity(desc, mask, &dest)) |
219 | if (dest == BAD_APICID) | ||
220 | return -1; | 219 | return -1; |
221 | 220 | ||
222 | mmr_value = 0; | 221 | mmr_value = 0; |
diff --git a/arch/x86/lib/Makefile b/arch/x86/lib/Makefile index 45b20e486c2f..cffd754f3039 100644 --- a/arch/x86/lib/Makefile +++ b/arch/x86/lib/Makefile | |||
@@ -14,7 +14,7 @@ $(obj)/inat.o: $(obj)/inat-tables.c | |||
14 | 14 | ||
15 | clean-files := inat-tables.c | 15 | clean-files := inat-tables.c |
16 | 16 | ||
17 | obj-$(CONFIG_SMP) := msr.o | 17 | obj-$(CONFIG_SMP) += msr-smp.o |
18 | 18 | ||
19 | lib-y := delay.o | 19 | lib-y := delay.o |
20 | lib-y += thunk_$(BITS).o | 20 | lib-y += thunk_$(BITS).o |
@@ -22,7 +22,7 @@ lib-y += usercopy_$(BITS).o getuser.o putuser.o | |||
22 | lib-y += memcpy_$(BITS).o | 22 | lib-y += memcpy_$(BITS).o |
23 | lib-$(CONFIG_KPROBES) += insn.o inat.o | 23 | lib-$(CONFIG_KPROBES) += insn.o inat.o |
24 | 24 | ||
25 | obj-y += msr-reg.o msr-reg-export.o | 25 | obj-y += msr.o msr-reg.o msr-reg-export.o |
26 | 26 | ||
27 | ifeq ($(CONFIG_X86_32),y) | 27 | ifeq ($(CONFIG_X86_32),y) |
28 | obj-y += atomic64_32.o | 28 | obj-y += atomic64_32.o |
diff --git a/arch/x86/lib/msr-smp.c b/arch/x86/lib/msr-smp.c new file mode 100644 index 000000000000..a6b1b86d2253 --- /dev/null +++ b/arch/x86/lib/msr-smp.c | |||
@@ -0,0 +1,204 @@ | |||
1 | #include <linux/module.h> | ||
2 | #include <linux/preempt.h> | ||
3 | #include <linux/smp.h> | ||
4 | #include <asm/msr.h> | ||
5 | |||
6 | static void __rdmsr_on_cpu(void *info) | ||
7 | { | ||
8 | struct msr_info *rv = info; | ||
9 | struct msr *reg; | ||
10 | int this_cpu = raw_smp_processor_id(); | ||
11 | |||
12 | if (rv->msrs) | ||
13 | reg = per_cpu_ptr(rv->msrs, this_cpu); | ||
14 | else | ||
15 | reg = &rv->reg; | ||
16 | |||
17 | rdmsr(rv->msr_no, reg->l, reg->h); | ||
18 | } | ||
19 | |||
20 | static void __wrmsr_on_cpu(void *info) | ||
21 | { | ||
22 | struct msr_info *rv = info; | ||
23 | struct msr *reg; | ||
24 | int this_cpu = raw_smp_processor_id(); | ||
25 | |||
26 | if (rv->msrs) | ||
27 | reg = per_cpu_ptr(rv->msrs, this_cpu); | ||
28 | else | ||
29 | reg = &rv->reg; | ||
30 | |||
31 | wrmsr(rv->msr_no, reg->l, reg->h); | ||
32 | } | ||
33 | |||
34 | int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) | ||
35 | { | ||
36 | int err; | ||
37 | struct msr_info rv; | ||
38 | |||
39 | memset(&rv, 0, sizeof(rv)); | ||
40 | |||
41 | rv.msr_no = msr_no; | ||
42 | err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1); | ||
43 | *l = rv.reg.l; | ||
44 | *h = rv.reg.h; | ||
45 | |||
46 | return err; | ||
47 | } | ||
48 | EXPORT_SYMBOL(rdmsr_on_cpu); | ||
49 | |||
50 | int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) | ||
51 | { | ||
52 | int err; | ||
53 | struct msr_info rv; | ||
54 | |||
55 | memset(&rv, 0, sizeof(rv)); | ||
56 | |||
57 | rv.msr_no = msr_no; | ||
58 | rv.reg.l = l; | ||
59 | rv.reg.h = h; | ||
60 | err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1); | ||
61 | |||
62 | return err; | ||
63 | } | ||
64 | EXPORT_SYMBOL(wrmsr_on_cpu); | ||
65 | |||
66 | static void __rwmsr_on_cpus(const struct cpumask *mask, u32 msr_no, | ||
67 | struct msr *msrs, | ||
68 | void (*msr_func) (void *info)) | ||
69 | { | ||
70 | struct msr_info rv; | ||
71 | int this_cpu; | ||
72 | |||
73 | memset(&rv, 0, sizeof(rv)); | ||
74 | |||
75 | rv.msrs = msrs; | ||
76 | rv.msr_no = msr_no; | ||
77 | |||
78 | this_cpu = get_cpu(); | ||
79 | |||
80 | if (cpumask_test_cpu(this_cpu, mask)) | ||
81 | msr_func(&rv); | ||
82 | |||
83 | smp_call_function_many(mask, msr_func, &rv, 1); | ||
84 | put_cpu(); | ||
85 | } | ||
86 | |||
87 | /* rdmsr on a bunch of CPUs | ||
88 | * | ||
89 | * @mask: which CPUs | ||
90 | * @msr_no: which MSR | ||
91 | * @msrs: array of MSR values | ||
92 | * | ||
93 | */ | ||
94 | void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) | ||
95 | { | ||
96 | __rwmsr_on_cpus(mask, msr_no, msrs, __rdmsr_on_cpu); | ||
97 | } | ||
98 | EXPORT_SYMBOL(rdmsr_on_cpus); | ||
99 | |||
100 | /* | ||
101 | * wrmsr on a bunch of CPUs | ||
102 | * | ||
103 | * @mask: which CPUs | ||
104 | * @msr_no: which MSR | ||
105 | * @msrs: array of MSR values | ||
106 | * | ||
107 | */ | ||
108 | void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) | ||
109 | { | ||
110 | __rwmsr_on_cpus(mask, msr_no, msrs, __wrmsr_on_cpu); | ||
111 | } | ||
112 | EXPORT_SYMBOL(wrmsr_on_cpus); | ||
113 | |||
114 | /* These "safe" variants are slower and should be used when the target MSR | ||
115 | may not actually exist. */ | ||
116 | static void __rdmsr_safe_on_cpu(void *info) | ||
117 | { | ||
118 | struct msr_info *rv = info; | ||
119 | |||
120 | rv->err = rdmsr_safe(rv->msr_no, &rv->reg.l, &rv->reg.h); | ||
121 | } | ||
122 | |||
123 | static void __wrmsr_safe_on_cpu(void *info) | ||
124 | { | ||
125 | struct msr_info *rv = info; | ||
126 | |||
127 | rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h); | ||
128 | } | ||
129 | |||
130 | int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) | ||
131 | { | ||
132 | int err; | ||
133 | struct msr_info rv; | ||
134 | |||
135 | memset(&rv, 0, sizeof(rv)); | ||
136 | |||
137 | rv.msr_no = msr_no; | ||
138 | err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1); | ||
139 | *l = rv.reg.l; | ||
140 | *h = rv.reg.h; | ||
141 | |||
142 | return err ? err : rv.err; | ||
143 | } | ||
144 | EXPORT_SYMBOL(rdmsr_safe_on_cpu); | ||
145 | |||
146 | int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) | ||
147 | { | ||
148 | int err; | ||
149 | struct msr_info rv; | ||
150 | |||
151 | memset(&rv, 0, sizeof(rv)); | ||
152 | |||
153 | rv.msr_no = msr_no; | ||
154 | rv.reg.l = l; | ||
155 | rv.reg.h = h; | ||
156 | err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1); | ||
157 | |||
158 | return err ? err : rv.err; | ||
159 | } | ||
160 | EXPORT_SYMBOL(wrmsr_safe_on_cpu); | ||
161 | |||
162 | /* | ||
163 | * These variants are significantly slower, but allows control over | ||
164 | * the entire 32-bit GPR set. | ||
165 | */ | ||
166 | static void __rdmsr_safe_regs_on_cpu(void *info) | ||
167 | { | ||
168 | struct msr_regs_info *rv = info; | ||
169 | |||
170 | rv->err = rdmsr_safe_regs(rv->regs); | ||
171 | } | ||
172 | |||
173 | static void __wrmsr_safe_regs_on_cpu(void *info) | ||
174 | { | ||
175 | struct msr_regs_info *rv = info; | ||
176 | |||
177 | rv->err = wrmsr_safe_regs(rv->regs); | ||
178 | } | ||
179 | |||
180 | int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs) | ||
181 | { | ||
182 | int err; | ||
183 | struct msr_regs_info rv; | ||
184 | |||
185 | rv.regs = regs; | ||
186 | rv.err = -EIO; | ||
187 | err = smp_call_function_single(cpu, __rdmsr_safe_regs_on_cpu, &rv, 1); | ||
188 | |||
189 | return err ? err : rv.err; | ||
190 | } | ||
191 | EXPORT_SYMBOL(rdmsr_safe_regs_on_cpu); | ||
192 | |||
193 | int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs) | ||
194 | { | ||
195 | int err; | ||
196 | struct msr_regs_info rv; | ||
197 | |||
198 | rv.regs = regs; | ||
199 | rv.err = -EIO; | ||
200 | err = smp_call_function_single(cpu, __wrmsr_safe_regs_on_cpu, &rv, 1); | ||
201 | |||
202 | return err ? err : rv.err; | ||
203 | } | ||
204 | EXPORT_SYMBOL(wrmsr_safe_regs_on_cpu); | ||
diff --git a/arch/x86/lib/msr.c b/arch/x86/lib/msr.c index 872834177937..8f8eebdca7d4 100644 --- a/arch/x86/lib/msr.c +++ b/arch/x86/lib/msr.c | |||
@@ -1,123 +1,7 @@ | |||
1 | #include <linux/module.h> | 1 | #include <linux/module.h> |
2 | #include <linux/preempt.h> | 2 | #include <linux/preempt.h> |
3 | #include <linux/smp.h> | ||
4 | #include <asm/msr.h> | 3 | #include <asm/msr.h> |
5 | 4 | ||
6 | struct msr_info { | ||
7 | u32 msr_no; | ||
8 | struct msr reg; | ||
9 | struct msr *msrs; | ||
10 | int err; | ||
11 | }; | ||
12 | |||
13 | static void __rdmsr_on_cpu(void *info) | ||
14 | { | ||
15 | struct msr_info *rv = info; | ||
16 | struct msr *reg; | ||
17 | int this_cpu = raw_smp_processor_id(); | ||
18 | |||
19 | if (rv->msrs) | ||
20 | reg = per_cpu_ptr(rv->msrs, this_cpu); | ||
21 | else | ||
22 | reg = &rv->reg; | ||
23 | |||
24 | rdmsr(rv->msr_no, reg->l, reg->h); | ||
25 | } | ||
26 | |||
27 | static void __wrmsr_on_cpu(void *info) | ||
28 | { | ||
29 | struct msr_info *rv = info; | ||
30 | struct msr *reg; | ||
31 | int this_cpu = raw_smp_processor_id(); | ||
32 | |||
33 | if (rv->msrs) | ||
34 | reg = per_cpu_ptr(rv->msrs, this_cpu); | ||
35 | else | ||
36 | reg = &rv->reg; | ||
37 | |||
38 | wrmsr(rv->msr_no, reg->l, reg->h); | ||
39 | } | ||
40 | |||
41 | int rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) | ||
42 | { | ||
43 | int err; | ||
44 | struct msr_info rv; | ||
45 | |||
46 | memset(&rv, 0, sizeof(rv)); | ||
47 | |||
48 | rv.msr_no = msr_no; | ||
49 | err = smp_call_function_single(cpu, __rdmsr_on_cpu, &rv, 1); | ||
50 | *l = rv.reg.l; | ||
51 | *h = rv.reg.h; | ||
52 | |||
53 | return err; | ||
54 | } | ||
55 | EXPORT_SYMBOL(rdmsr_on_cpu); | ||
56 | |||
57 | int wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) | ||
58 | { | ||
59 | int err; | ||
60 | struct msr_info rv; | ||
61 | |||
62 | memset(&rv, 0, sizeof(rv)); | ||
63 | |||
64 | rv.msr_no = msr_no; | ||
65 | rv.reg.l = l; | ||
66 | rv.reg.h = h; | ||
67 | err = smp_call_function_single(cpu, __wrmsr_on_cpu, &rv, 1); | ||
68 | |||
69 | return err; | ||
70 | } | ||
71 | EXPORT_SYMBOL(wrmsr_on_cpu); | ||
72 | |||
73 | static void __rwmsr_on_cpus(const struct cpumask *mask, u32 msr_no, | ||
74 | struct msr *msrs, | ||
75 | void (*msr_func) (void *info)) | ||
76 | { | ||
77 | struct msr_info rv; | ||
78 | int this_cpu; | ||
79 | |||
80 | memset(&rv, 0, sizeof(rv)); | ||
81 | |||
82 | rv.msrs = msrs; | ||
83 | rv.msr_no = msr_no; | ||
84 | |||
85 | this_cpu = get_cpu(); | ||
86 | |||
87 | if (cpumask_test_cpu(this_cpu, mask)) | ||
88 | msr_func(&rv); | ||
89 | |||
90 | smp_call_function_many(mask, msr_func, &rv, 1); | ||
91 | put_cpu(); | ||
92 | } | ||
93 | |||
94 | /* rdmsr on a bunch of CPUs | ||
95 | * | ||
96 | * @mask: which CPUs | ||
97 | * @msr_no: which MSR | ||
98 | * @msrs: array of MSR values | ||
99 | * | ||
100 | */ | ||
101 | void rdmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) | ||
102 | { | ||
103 | __rwmsr_on_cpus(mask, msr_no, msrs, __rdmsr_on_cpu); | ||
104 | } | ||
105 | EXPORT_SYMBOL(rdmsr_on_cpus); | ||
106 | |||
107 | /* | ||
108 | * wrmsr on a bunch of CPUs | ||
109 | * | ||
110 | * @mask: which CPUs | ||
111 | * @msr_no: which MSR | ||
112 | * @msrs: array of MSR values | ||
113 | * | ||
114 | */ | ||
115 | void wrmsr_on_cpus(const struct cpumask *mask, u32 msr_no, struct msr *msrs) | ||
116 | { | ||
117 | __rwmsr_on_cpus(mask, msr_no, msrs, __wrmsr_on_cpu); | ||
118 | } | ||
119 | EXPORT_SYMBOL(wrmsr_on_cpus); | ||
120 | |||
121 | struct msr *msrs_alloc(void) | 5 | struct msr *msrs_alloc(void) |
122 | { | 6 | { |
123 | struct msr *msrs = NULL; | 7 | struct msr *msrs = NULL; |
@@ -137,100 +21,3 @@ void msrs_free(struct msr *msrs) | |||
137 | free_percpu(msrs); | 21 | free_percpu(msrs); |
138 | } | 22 | } |
139 | EXPORT_SYMBOL(msrs_free); | 23 | EXPORT_SYMBOL(msrs_free); |
140 | |||
141 | /* These "safe" variants are slower and should be used when the target MSR | ||
142 | may not actually exist. */ | ||
143 | static void __rdmsr_safe_on_cpu(void *info) | ||
144 | { | ||
145 | struct msr_info *rv = info; | ||
146 | |||
147 | rv->err = rdmsr_safe(rv->msr_no, &rv->reg.l, &rv->reg.h); | ||
148 | } | ||
149 | |||
150 | static void __wrmsr_safe_on_cpu(void *info) | ||
151 | { | ||
152 | struct msr_info *rv = info; | ||
153 | |||
154 | rv->err = wrmsr_safe(rv->msr_no, rv->reg.l, rv->reg.h); | ||
155 | } | ||
156 | |||
157 | int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h) | ||
158 | { | ||
159 | int err; | ||
160 | struct msr_info rv; | ||
161 | |||
162 | memset(&rv, 0, sizeof(rv)); | ||
163 | |||
164 | rv.msr_no = msr_no; | ||
165 | err = smp_call_function_single(cpu, __rdmsr_safe_on_cpu, &rv, 1); | ||
166 | *l = rv.reg.l; | ||
167 | *h = rv.reg.h; | ||
168 | |||
169 | return err ? err : rv.err; | ||
170 | } | ||
171 | EXPORT_SYMBOL(rdmsr_safe_on_cpu); | ||
172 | |||
173 | int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h) | ||
174 | { | ||
175 | int err; | ||
176 | struct msr_info rv; | ||
177 | |||
178 | memset(&rv, 0, sizeof(rv)); | ||
179 | |||
180 | rv.msr_no = msr_no; | ||
181 | rv.reg.l = l; | ||
182 | rv.reg.h = h; | ||
183 | err = smp_call_function_single(cpu, __wrmsr_safe_on_cpu, &rv, 1); | ||
184 | |||
185 | return err ? err : rv.err; | ||
186 | } | ||
187 | EXPORT_SYMBOL(wrmsr_safe_on_cpu); | ||
188 | |||
189 | /* | ||
190 | * These variants are significantly slower, but allows control over | ||
191 | * the entire 32-bit GPR set. | ||
192 | */ | ||
193 | struct msr_regs_info { | ||
194 | u32 *regs; | ||
195 | int err; | ||
196 | }; | ||
197 | |||
198 | static void __rdmsr_safe_regs_on_cpu(void *info) | ||
199 | { | ||
200 | struct msr_regs_info *rv = info; | ||
201 | |||
202 | rv->err = rdmsr_safe_regs(rv->regs); | ||
203 | } | ||
204 | |||
205 | static void __wrmsr_safe_regs_on_cpu(void *info) | ||
206 | { | ||
207 | struct msr_regs_info *rv = info; | ||
208 | |||
209 | rv->err = wrmsr_safe_regs(rv->regs); | ||
210 | } | ||
211 | |||
212 | int rdmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs) | ||
213 | { | ||
214 | int err; | ||
215 | struct msr_regs_info rv; | ||
216 | |||
217 | rv.regs = regs; | ||
218 | rv.err = -EIO; | ||
219 | err = smp_call_function_single(cpu, __rdmsr_safe_regs_on_cpu, &rv, 1); | ||
220 | |||
221 | return err ? err : rv.err; | ||
222 | } | ||
223 | EXPORT_SYMBOL(rdmsr_safe_regs_on_cpu); | ||
224 | |||
225 | int wrmsr_safe_regs_on_cpu(unsigned int cpu, u32 *regs) | ||
226 | { | ||
227 | int err; | ||
228 | struct msr_regs_info rv; | ||
229 | |||
230 | rv.regs = regs; | ||
231 | rv.err = -EIO; | ||
232 | err = smp_call_function_single(cpu, __wrmsr_safe_regs_on_cpu, &rv, 1); | ||
233 | |||
234 | return err ? err : rv.err; | ||
235 | } | ||
236 | EXPORT_SYMBOL(wrmsr_safe_regs_on_cpu); | ||
diff --git a/arch/x86/mm/srat_32.c b/arch/x86/mm/srat_32.c index 6f8aa33031c7..9324f13492d5 100644 --- a/arch/x86/mm/srat_32.c +++ b/arch/x86/mm/srat_32.c | |||
@@ -267,6 +267,8 @@ int __init get_memcfg_from_srat(void) | |||
267 | e820_register_active_regions(chunk->nid, chunk->start_pfn, | 267 | e820_register_active_regions(chunk->nid, chunk->start_pfn, |
268 | min(chunk->end_pfn, max_pfn)); | 268 | min(chunk->end_pfn, max_pfn)); |
269 | } | 269 | } |
270 | /* for out of order entries in SRAT */ | ||
271 | sort_node_map(); | ||
270 | 272 | ||
271 | for_each_online_node(nid) { | 273 | for_each_online_node(nid) { |
272 | unsigned long start = node_start_pfn[nid]; | 274 | unsigned long start = node_start_pfn[nid]; |
diff --git a/arch/x86/mm/srat_64.c b/arch/x86/mm/srat_64.c index d89075489664..a27124185fc1 100644 --- a/arch/x86/mm/srat_64.c +++ b/arch/x86/mm/srat_64.c | |||
@@ -317,7 +317,7 @@ static int __init nodes_cover_memory(const struct bootnode *nodes) | |||
317 | unsigned long s = nodes[i].start >> PAGE_SHIFT; | 317 | unsigned long s = nodes[i].start >> PAGE_SHIFT; |
318 | unsigned long e = nodes[i].end >> PAGE_SHIFT; | 318 | unsigned long e = nodes[i].end >> PAGE_SHIFT; |
319 | pxmram += e - s; | 319 | pxmram += e - s; |
320 | pxmram -= absent_pages_in_range(s, e); | 320 | pxmram -= __absent_pages_in_range(i, s, e); |
321 | if ((long)pxmram < 0) | 321 | if ((long)pxmram < 0) |
322 | pxmram = 0; | 322 | pxmram = 0; |
323 | } | 323 | } |
@@ -373,6 +373,8 @@ int __init acpi_scan_nodes(unsigned long start, unsigned long end) | |||
373 | for_each_node_mask(i, nodes_parsed) | 373 | for_each_node_mask(i, nodes_parsed) |
374 | e820_register_active_regions(i, nodes[i].start >> PAGE_SHIFT, | 374 | e820_register_active_regions(i, nodes[i].start >> PAGE_SHIFT, |
375 | nodes[i].end >> PAGE_SHIFT); | 375 | nodes[i].end >> PAGE_SHIFT); |
376 | /* for out of order entries in SRAT */ | ||
377 | sort_node_map(); | ||
376 | if (!nodes_cover_memory(nodes)) { | 378 | if (!nodes_cover_memory(nodes)) { |
377 | bad_srat(); | 379 | bad_srat(); |
378 | return -1; | 380 | return -1; |
diff --git a/arch/x86/tools/chkobjdump.awk b/arch/x86/tools/chkobjdump.awk index 0d13cd9fdcff..5bbb5a33f220 100644 --- a/arch/x86/tools/chkobjdump.awk +++ b/arch/x86/tools/chkobjdump.awk | |||
@@ -9,7 +9,7 @@ BEGIN { | |||
9 | } | 9 | } |
10 | 10 | ||
11 | /^GNU/ { | 11 | /^GNU/ { |
12 | split($4, ver, "."); | 12 | split($3, ver, "."); |
13 | if (ver[1] > od_ver || | 13 | if (ver[1] > od_ver || |
14 | (ver[1] == od_ver && ver[2] >= od_sver)) { | 14 | (ver[1] == od_ver && ver[2] >= od_sver)) { |
15 | exit 1; | 15 | exit 1; |
diff --git a/arch/x86/tools/gen-insn-attr-x86.awk b/arch/x86/tools/gen-insn-attr-x86.awk index 7a6850683c34..eaf11f52fc0b 100644 --- a/arch/x86/tools/gen-insn-attr-x86.awk +++ b/arch/x86/tools/gen-insn-attr-x86.awk | |||
@@ -6,8 +6,6 @@ | |||
6 | 6 | ||
7 | # Awk implementation sanity check | 7 | # Awk implementation sanity check |
8 | function check_awk_implement() { | 8 | function check_awk_implement() { |
9 | if (!match("abc", "[[:lower:]]+")) | ||
10 | return "Your awk doesn't support charactor-class." | ||
11 | if (sprintf("%x", 0) != "0") | 9 | if (sprintf("%x", 0) != "0") |
12 | return "Your awk has a printf-format problem." | 10 | return "Your awk has a printf-format problem." |
13 | return "" | 11 | return "" |
@@ -44,12 +42,12 @@ BEGIN { | |||
44 | delete gtable | 42 | delete gtable |
45 | delete atable | 43 | delete atable |
46 | 44 | ||
47 | opnd_expr = "^[[:alpha:]/]" | 45 | opnd_expr = "^[A-Za-z/]" |
48 | ext_expr = "^\\(" | 46 | ext_expr = "^\\(" |
49 | sep_expr = "^\\|$" | 47 | sep_expr = "^\\|$" |
50 | group_expr = "^Grp[[:alnum:]]+" | 48 | group_expr = "^Grp[0-9A-Za-z]+" |
51 | 49 | ||
52 | imm_expr = "^[IJAO][[:lower:]]" | 50 | imm_expr = "^[IJAO][a-z]" |
53 | imm_flag["Ib"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)" | 51 | imm_flag["Ib"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)" |
54 | imm_flag["Jb"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)" | 52 | imm_flag["Jb"] = "INAT_MAKE_IMM(INAT_IMM_BYTE)" |
55 | imm_flag["Iw"] = "INAT_MAKE_IMM(INAT_IMM_WORD)" | 53 | imm_flag["Iw"] = "INAT_MAKE_IMM(INAT_IMM_WORD)" |
@@ -62,7 +60,7 @@ BEGIN { | |||
62 | imm_flag["Ob"] = "INAT_MOFFSET" | 60 | imm_flag["Ob"] = "INAT_MOFFSET" |
63 | imm_flag["Ov"] = "INAT_MOFFSET" | 61 | imm_flag["Ov"] = "INAT_MOFFSET" |
64 | 62 | ||
65 | modrm_expr = "^([CDEGMNPQRSUVW/][[:lower:]]+|NTA|T[012])" | 63 | modrm_expr = "^([CDEGMNPQRSUVW/][a-z]+|NTA|T[012])" |
66 | force64_expr = "\\([df]64\\)" | 64 | force64_expr = "\\([df]64\\)" |
67 | rex_expr = "^REX(\\.[XRWB]+)*" | 65 | rex_expr = "^REX(\\.[XRWB]+)*" |
68 | fpu_expr = "^ESC" # TODO | 66 | fpu_expr = "^ESC" # TODO |
diff --git a/arch/xtensa/include/asm/asm-offsets.h b/arch/xtensa/include/asm/asm-offsets.h new file mode 100644 index 000000000000..d370ee36a182 --- /dev/null +++ b/arch/xtensa/include/asm/asm-offsets.h | |||
@@ -0,0 +1 @@ | |||
#include <generated/asm-offsets.h> | |||
diff --git a/drivers/accessibility/braille/braille_console.c b/drivers/accessibility/braille/braille_console.c index d672cfe7ca59..cb423f5aef24 100644 --- a/drivers/accessibility/braille/braille_console.c +++ b/drivers/accessibility/braille/braille_console.c | |||
@@ -21,7 +21,6 @@ | |||
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
22 | */ | 22 | */ |
23 | 23 | ||
24 | #include <linux/autoconf.h> | ||
25 | #include <linux/kernel.h> | 24 | #include <linux/kernel.h> |
26 | #include <linux/module.h> | 25 | #include <linux/module.h> |
27 | #include <linux/moduleparam.h> | 26 | #include <linux/moduleparam.h> |
diff --git a/drivers/hid/hid-lg.h b/drivers/hid/hid-lg.h index 27ae750ca878..bf31592eaf79 100644 --- a/drivers/hid/hid-lg.h +++ b/drivers/hid/hid-lg.h | |||
@@ -1,8 +1,6 @@ | |||
1 | #ifndef __HID_LG_H | 1 | #ifndef __HID_LG_H |
2 | #define __HID_LG_H | 2 | #define __HID_LG_H |
3 | 3 | ||
4 | #include <linux/autoconf.h> | ||
5 | |||
6 | #ifdef CONFIG_LOGITECH_FF | 4 | #ifdef CONFIG_LOGITECH_FF |
7 | int lgff_init(struct hid_device *hdev); | 5 | int lgff_init(struct hid_device *hdev); |
8 | #else | 6 | #else |
diff --git a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig index 95ccbe377f9c..46c3c566307e 100644 --- a/drivers/hwmon/Kconfig +++ b/drivers/hwmon/Kconfig | |||
@@ -228,6 +228,18 @@ config SENSORS_K8TEMP | |||
228 | This driver can also be built as a module. If so, the module | 228 | This driver can also be built as a module. If so, the module |
229 | will be called k8temp. | 229 | will be called k8temp. |
230 | 230 | ||
231 | config SENSORS_K10TEMP | ||
232 | tristate "AMD Phenom/Sempron/Turion/Opteron temperature sensor" | ||
233 | depends on X86 && PCI | ||
234 | help | ||
235 | If you say yes here you get support for the temperature | ||
236 | sensor(s) inside your CPU. Supported are later revisions of | ||
237 | the AMD Family 10h and all revisions of the AMD Family 11h | ||
238 | microarchitectures. | ||
239 | |||
240 | This driver can also be built as a module. If so, the module | ||
241 | will be called k10temp. | ||
242 | |||
231 | config SENSORS_AMS | 243 | config SENSORS_AMS |
232 | tristate "Apple Motion Sensor driver" | 244 | tristate "Apple Motion Sensor driver" |
233 | depends on PPC_PMAC && !PPC64 && INPUT && ((ADB_PMU && I2C = y) || (ADB_PMU && !I2C) || I2C) && EXPERIMENTAL | 245 | depends on PPC_PMAC && !PPC64 && INPUT && ((ADB_PMU && I2C = y) || (ADB_PMU && !I2C) || I2C) && EXPERIMENTAL |
@@ -810,6 +822,14 @@ config SENSORS_TMP421 | |||
810 | This driver can also be built as a module. If so, the module | 822 | This driver can also be built as a module. If so, the module |
811 | will be called tmp421. | 823 | will be called tmp421. |
812 | 824 | ||
825 | config SENSORS_VIA_CPUTEMP | ||
826 | tristate "VIA CPU temperature sensor" | ||
827 | depends on X86 | ||
828 | help | ||
829 | If you say yes here you get support for the temperature | ||
830 | sensor inside your CPU. Supported are all known variants of | ||
831 | the VIA C7 and Nano. | ||
832 | |||
813 | config SENSORS_VIA686A | 833 | config SENSORS_VIA686A |
814 | tristate "VIA686A" | 834 | tristate "VIA686A" |
815 | depends on PCI | 835 | depends on PCI |
@@ -998,6 +1018,23 @@ config SENSORS_LIS3_SPI | |||
998 | will be called lis3lv02d and a specific module for the SPI transport | 1018 | will be called lis3lv02d and a specific module for the SPI transport |
999 | is called lis3lv02d_spi. | 1019 | is called lis3lv02d_spi. |
1000 | 1020 | ||
1021 | config SENSORS_LIS3_I2C | ||
1022 | tristate "STMicroeletronics LIS3LV02Dx three-axis digital accelerometer (I2C)" | ||
1023 | depends on I2C && INPUT | ||
1024 | select INPUT_POLLDEV | ||
1025 | default n | ||
1026 | help | ||
1027 | This driver provides support for the LIS3LV02Dx accelerometer connected | ||
1028 | via I2C. The accelerometer data is readable via | ||
1029 | /sys/devices/platform/lis3lv02d. | ||
1030 | |||
1031 | This driver also provides an absolute input class device, allowing | ||
1032 | the device to act as a pinball machine-esque joystick. | ||
1033 | |||
1034 | This driver can also be built as modules. If so, the core module | ||
1035 | will be called lis3lv02d and a specific module for the I2C transport | ||
1036 | is called lis3lv02d_i2c. | ||
1037 | |||
1001 | config SENSORS_APPLESMC | 1038 | config SENSORS_APPLESMC |
1002 | tristate "Apple SMC (Motion sensor, light sensor, keyboard backlight)" | 1039 | tristate "Apple SMC (Motion sensor, light sensor, keyboard backlight)" |
1003 | depends on INPUT && X86 | 1040 | depends on INPUT && X86 |
diff --git a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile index 33c2ee105284..450c8e894277 100644 --- a/drivers/hwmon/Makefile +++ b/drivers/hwmon/Makefile | |||
@@ -53,8 +53,10 @@ obj-$(CONFIG_SENSORS_IBMAEM) += ibmaem.o | |||
53 | obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o | 53 | obj-$(CONFIG_SENSORS_IBMPEX) += ibmpex.o |
54 | obj-$(CONFIG_SENSORS_IT87) += it87.o | 54 | obj-$(CONFIG_SENSORS_IT87) += it87.o |
55 | obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o | 55 | obj-$(CONFIG_SENSORS_K8TEMP) += k8temp.o |
56 | obj-$(CONFIG_SENSORS_K10TEMP) += k10temp.o | ||
56 | obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o | 57 | obj-$(CONFIG_SENSORS_LIS3LV02D) += lis3lv02d.o hp_accel.o |
57 | obj-$(CONFIG_SENSORS_LIS3_SPI) += lis3lv02d.o lis3lv02d_spi.o | 58 | obj-$(CONFIG_SENSORS_LIS3_SPI) += lis3lv02d.o lis3lv02d_spi.o |
59 | obj-$(CONFIG_SENSORS_LIS3_I2C) += lis3lv02d.o lis3lv02d_i2c.o | ||
58 | obj-$(CONFIG_SENSORS_LM63) += lm63.o | 60 | obj-$(CONFIG_SENSORS_LM63) += lm63.o |
59 | obj-$(CONFIG_SENSORS_LM70) += lm70.o | 61 | obj-$(CONFIG_SENSORS_LM70) += lm70.o |
60 | obj-$(CONFIG_SENSORS_LM73) += lm73.o | 62 | obj-$(CONFIG_SENSORS_LM73) += lm73.o |
@@ -87,6 +89,7 @@ obj-$(CONFIG_SENSORS_SMSC47M192)+= smsc47m192.o | |||
87 | obj-$(CONFIG_SENSORS_THMC50) += thmc50.o | 89 | obj-$(CONFIG_SENSORS_THMC50) += thmc50.o |
88 | obj-$(CONFIG_SENSORS_TMP401) += tmp401.o | 90 | obj-$(CONFIG_SENSORS_TMP401) += tmp401.o |
89 | obj-$(CONFIG_SENSORS_TMP421) += tmp421.o | 91 | obj-$(CONFIG_SENSORS_TMP421) += tmp421.o |
92 | obj-$(CONFIG_SENSORS_VIA_CPUTEMP)+= via-cputemp.o | ||
90 | obj-$(CONFIG_SENSORS_VIA686A) += via686a.o | 93 | obj-$(CONFIG_SENSORS_VIA686A) += via686a.o |
91 | obj-$(CONFIG_SENSORS_VT1211) += vt1211.o | 94 | obj-$(CONFIG_SENSORS_VT1211) += vt1211.o |
92 | obj-$(CONFIG_SENSORS_VT8231) += vt8231.o | 95 | obj-$(CONFIG_SENSORS_VT8231) += vt8231.o |
diff --git a/drivers/hwmon/k10temp.c b/drivers/hwmon/k10temp.c new file mode 100644 index 000000000000..d8a26d16d948 --- /dev/null +++ b/drivers/hwmon/k10temp.c | |||
@@ -0,0 +1,197 @@ | |||
1 | /* | ||
2 | * k10temp.c - AMD Family 10h/11h processor hardware monitoring | ||
3 | * | ||
4 | * Copyright (c) 2009 Clemens Ladisch <clemens@ladisch.de> | ||
5 | * | ||
6 | * | ||
7 | * This driver is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License; either | ||
9 | * version 2 of the License, or (at your option) any later version. | ||
10 | * | ||
11 | * This driver is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. | ||
14 | * See the GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this driver; if not, see <http://www.gnu.org/licenses/>. | ||
18 | */ | ||
19 | |||
20 | #include <linux/err.h> | ||
21 | #include <linux/hwmon.h> | ||
22 | #include <linux/hwmon-sysfs.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/pci.h> | ||
26 | #include <asm/processor.h> | ||
27 | |||
28 | MODULE_DESCRIPTION("AMD Family 10h/11h CPU core temperature monitor"); | ||
29 | MODULE_AUTHOR("Clemens Ladisch <clemens@ladisch.de>"); | ||
30 | MODULE_LICENSE("GPL"); | ||
31 | |||
32 | static bool force; | ||
33 | module_param(force, bool, 0444); | ||
34 | MODULE_PARM_DESC(force, "force loading on processors with erratum 319"); | ||
35 | |||
36 | #define REG_HARDWARE_THERMAL_CONTROL 0x64 | ||
37 | #define HTC_ENABLE 0x00000001 | ||
38 | |||
39 | #define REG_REPORTED_TEMPERATURE 0xa4 | ||
40 | |||
41 | #define REG_NORTHBRIDGE_CAPABILITIES 0xe8 | ||
42 | #define NB_CAP_HTC 0x00000400 | ||
43 | |||
44 | static ssize_t show_temp(struct device *dev, | ||
45 | struct device_attribute *attr, char *buf) | ||
46 | { | ||
47 | u32 regval; | ||
48 | |||
49 | pci_read_config_dword(to_pci_dev(dev), | ||
50 | REG_REPORTED_TEMPERATURE, ®val); | ||
51 | return sprintf(buf, "%u\n", (regval >> 21) * 125); | ||
52 | } | ||
53 | |||
54 | static ssize_t show_temp_max(struct device *dev, | ||
55 | struct device_attribute *attr, char *buf) | ||
56 | { | ||
57 | return sprintf(buf, "%d\n", 70 * 1000); | ||
58 | } | ||
59 | |||
60 | static ssize_t show_temp_crit(struct device *dev, | ||
61 | struct device_attribute *devattr, char *buf) | ||
62 | { | ||
63 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | ||
64 | int show_hyst = attr->index; | ||
65 | u32 regval; | ||
66 | int value; | ||
67 | |||
68 | pci_read_config_dword(to_pci_dev(dev), | ||
69 | REG_HARDWARE_THERMAL_CONTROL, ®val); | ||
70 | value = ((regval >> 16) & 0x7f) * 500 + 52000; | ||
71 | if (show_hyst) | ||
72 | value -= ((regval >> 24) & 0xf) * 500; | ||
73 | return sprintf(buf, "%d\n", value); | ||
74 | } | ||
75 | |||
76 | static ssize_t show_name(struct device *dev, | ||
77 | struct device_attribute *attr, char *buf) | ||
78 | { | ||
79 | return sprintf(buf, "k10temp\n"); | ||
80 | } | ||
81 | |||
82 | static DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL); | ||
83 | static DEVICE_ATTR(temp1_max, S_IRUGO, show_temp_max, NULL); | ||
84 | static SENSOR_DEVICE_ATTR(temp1_crit, S_IRUGO, show_temp_crit, NULL, 0); | ||
85 | static SENSOR_DEVICE_ATTR(temp1_crit_hyst, S_IRUGO, show_temp_crit, NULL, 1); | ||
86 | static DEVICE_ATTR(name, S_IRUGO, show_name, NULL); | ||
87 | |||
88 | static bool __devinit has_erratum_319(void) | ||
89 | { | ||
90 | /* | ||
91 | * Erratum 319: The thermal sensor of older Family 10h processors | ||
92 | * (B steppings) may be unreliable. | ||
93 | */ | ||
94 | return boot_cpu_data.x86 == 0x10 && boot_cpu_data.x86_model <= 2; | ||
95 | } | ||
96 | |||
97 | static int __devinit k10temp_probe(struct pci_dev *pdev, | ||
98 | const struct pci_device_id *id) | ||
99 | { | ||
100 | struct device *hwmon_dev; | ||
101 | u32 reg_caps, reg_htc; | ||
102 | int err; | ||
103 | |||
104 | if (has_erratum_319() && !force) { | ||
105 | dev_err(&pdev->dev, | ||
106 | "unreliable CPU thermal sensor; monitoring disabled\n"); | ||
107 | err = -ENODEV; | ||
108 | goto exit; | ||
109 | } | ||
110 | |||
111 | err = device_create_file(&pdev->dev, &dev_attr_temp1_input); | ||
112 | if (err) | ||
113 | goto exit; | ||
114 | err = device_create_file(&pdev->dev, &dev_attr_temp1_max); | ||
115 | if (err) | ||
116 | goto exit_remove; | ||
117 | |||
118 | pci_read_config_dword(pdev, REG_NORTHBRIDGE_CAPABILITIES, ®_caps); | ||
119 | pci_read_config_dword(pdev, REG_HARDWARE_THERMAL_CONTROL, ®_htc); | ||
120 | if ((reg_caps & NB_CAP_HTC) && (reg_htc & HTC_ENABLE)) { | ||
121 | err = device_create_file(&pdev->dev, | ||
122 | &sensor_dev_attr_temp1_crit.dev_attr); | ||
123 | if (err) | ||
124 | goto exit_remove; | ||
125 | err = device_create_file(&pdev->dev, | ||
126 | &sensor_dev_attr_temp1_crit_hyst.dev_attr); | ||
127 | if (err) | ||
128 | goto exit_remove; | ||
129 | } | ||
130 | |||
131 | err = device_create_file(&pdev->dev, &dev_attr_name); | ||
132 | if (err) | ||
133 | goto exit_remove; | ||
134 | |||
135 | hwmon_dev = hwmon_device_register(&pdev->dev); | ||
136 | if (IS_ERR(hwmon_dev)) { | ||
137 | err = PTR_ERR(hwmon_dev); | ||
138 | goto exit_remove; | ||
139 | } | ||
140 | dev_set_drvdata(&pdev->dev, hwmon_dev); | ||
141 | |||
142 | if (has_erratum_319() && force) | ||
143 | dev_warn(&pdev->dev, | ||
144 | "unreliable CPU thermal sensor; check erratum 319\n"); | ||
145 | return 0; | ||
146 | |||
147 | exit_remove: | ||
148 | device_remove_file(&pdev->dev, &dev_attr_name); | ||
149 | device_remove_file(&pdev->dev, &dev_attr_temp1_input); | ||
150 | device_remove_file(&pdev->dev, &dev_attr_temp1_max); | ||
151 | device_remove_file(&pdev->dev, | ||
152 | &sensor_dev_attr_temp1_crit.dev_attr); | ||
153 | device_remove_file(&pdev->dev, | ||
154 | &sensor_dev_attr_temp1_crit_hyst.dev_attr); | ||
155 | exit: | ||
156 | return err; | ||
157 | } | ||
158 | |||
159 | static void __devexit k10temp_remove(struct pci_dev *pdev) | ||
160 | { | ||
161 | hwmon_device_unregister(dev_get_drvdata(&pdev->dev)); | ||
162 | device_remove_file(&pdev->dev, &dev_attr_name); | ||
163 | device_remove_file(&pdev->dev, &dev_attr_temp1_input); | ||
164 | device_remove_file(&pdev->dev, &dev_attr_temp1_max); | ||
165 | device_remove_file(&pdev->dev, | ||
166 | &sensor_dev_attr_temp1_crit.dev_attr); | ||
167 | device_remove_file(&pdev->dev, | ||
168 | &sensor_dev_attr_temp1_crit_hyst.dev_attr); | ||
169 | dev_set_drvdata(&pdev->dev, NULL); | ||
170 | } | ||
171 | |||
172 | static struct pci_device_id k10temp_id_table[] = { | ||
173 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_10H_NB_MISC) }, | ||
174 | { PCI_VDEVICE(AMD, PCI_DEVICE_ID_AMD_11H_NB_MISC) }, | ||
175 | {} | ||
176 | }; | ||
177 | MODULE_DEVICE_TABLE(pci, k10temp_id_table); | ||
178 | |||
179 | static struct pci_driver k10temp_driver = { | ||
180 | .name = "k10temp", | ||
181 | .id_table = k10temp_id_table, | ||
182 | .probe = k10temp_probe, | ||
183 | .remove = __devexit_p(k10temp_remove), | ||
184 | }; | ||
185 | |||
186 | static int __init k10temp_init(void) | ||
187 | { | ||
188 | return pci_register_driver(&k10temp_driver); | ||
189 | } | ||
190 | |||
191 | static void __exit k10temp_exit(void) | ||
192 | { | ||
193 | pci_unregister_driver(&k10temp_driver); | ||
194 | } | ||
195 | |||
196 | module_init(k10temp_init) | ||
197 | module_exit(k10temp_exit) | ||
diff --git a/drivers/hwmon/lis3lv02d_i2c.c b/drivers/hwmon/lis3lv02d_i2c.c new file mode 100644 index 000000000000..dc1f5402c1d7 --- /dev/null +++ b/drivers/hwmon/lis3lv02d_i2c.c | |||
@@ -0,0 +1,183 @@ | |||
1 | /* | ||
2 | * drivers/hwmon/lis3lv02d_i2c.c | ||
3 | * | ||
4 | * Implements I2C interface for lis3lv02d (STMicroelectronics) accelerometer. | ||
5 | * Driver is based on corresponding SPI driver written by Daniel Mack | ||
6 | * (lis3lv02d_spi.c (C) 2009 Daniel Mack <daniel@caiaq.de> ). | ||
7 | * | ||
8 | * Copyright (C) 2009 Nokia Corporation and/or its subsidiary(-ies). | ||
9 | * | ||
10 | * Contact: Samu Onkalo <samu.p.onkalo@nokia.com> | ||
11 | * | ||
12 | * This program is free software; you can redistribute it and/or | ||
13 | * modify it under the terms of the GNU General Public License | ||
14 | * version 2 as published by the Free Software Foundation. | ||
15 | * | ||
16 | * This program is distributed in the hope that it will be useful, but | ||
17 | * WITHOUT ANY WARRANTY; without even the implied warranty of | ||
18 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU | ||
19 | * General Public License for more details. | ||
20 | * | ||
21 | * You should have received a copy of the GNU General Public License | ||
22 | * along with this program; if not, write to the Free Software | ||
23 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA | ||
24 | * 02110-1301 USA | ||
25 | */ | ||
26 | |||
27 | #include <linux/module.h> | ||
28 | #include <linux/kernel.h> | ||
29 | #include <linux/init.h> | ||
30 | #include <linux/err.h> | ||
31 | #include <linux/i2c.h> | ||
32 | #include "lis3lv02d.h" | ||
33 | |||
34 | #define DRV_NAME "lis3lv02d_i2c" | ||
35 | |||
36 | static inline s32 lis3_i2c_write(struct lis3lv02d *lis3, int reg, u8 value) | ||
37 | { | ||
38 | struct i2c_client *c = lis3->bus_priv; | ||
39 | return i2c_smbus_write_byte_data(c, reg, value); | ||
40 | } | ||
41 | |||
42 | static inline s32 lis3_i2c_read(struct lis3lv02d *lis3, int reg, u8 *v) | ||
43 | { | ||
44 | struct i2c_client *c = lis3->bus_priv; | ||
45 | *v = i2c_smbus_read_byte_data(c, reg); | ||
46 | return 0; | ||
47 | } | ||
48 | |||
49 | static int lis3_i2c_init(struct lis3lv02d *lis3) | ||
50 | { | ||
51 | u8 reg; | ||
52 | int ret; | ||
53 | |||
54 | /* power up the device */ | ||
55 | ret = lis3->read(lis3, CTRL_REG1, ®); | ||
56 | if (ret < 0) | ||
57 | return ret; | ||
58 | |||
59 | reg |= CTRL1_PD0; | ||
60 | return lis3->write(lis3, CTRL_REG1, reg); | ||
61 | } | ||
62 | |||
63 | /* Default axis mapping but it can be overwritten by platform data */ | ||
64 | static struct axis_conversion lis3lv02d_axis_map = { LIS3_DEV_X, | ||
65 | LIS3_DEV_Y, | ||
66 | LIS3_DEV_Z }; | ||
67 | |||
68 | static int __devinit lis3lv02d_i2c_probe(struct i2c_client *client, | ||
69 | const struct i2c_device_id *id) | ||
70 | { | ||
71 | int ret = 0; | ||
72 | struct lis3lv02d_platform_data *pdata = client->dev.platform_data; | ||
73 | |||
74 | if (pdata) { | ||
75 | if (pdata->axis_x) | ||
76 | lis3lv02d_axis_map.x = pdata->axis_x; | ||
77 | |||
78 | if (pdata->axis_y) | ||
79 | lis3lv02d_axis_map.y = pdata->axis_y; | ||
80 | |||
81 | if (pdata->axis_z) | ||
82 | lis3lv02d_axis_map.z = pdata->axis_z; | ||
83 | |||
84 | if (pdata->setup_resources) | ||
85 | ret = pdata->setup_resources(); | ||
86 | |||
87 | if (ret) | ||
88 | goto fail; | ||
89 | } | ||
90 | |||
91 | lis3_dev.pdata = pdata; | ||
92 | lis3_dev.bus_priv = client; | ||
93 | lis3_dev.init = lis3_i2c_init; | ||
94 | lis3_dev.read = lis3_i2c_read; | ||
95 | lis3_dev.write = lis3_i2c_write; | ||
96 | lis3_dev.irq = client->irq; | ||
97 | lis3_dev.ac = lis3lv02d_axis_map; | ||
98 | |||
99 | i2c_set_clientdata(client, &lis3_dev); | ||
100 | ret = lis3lv02d_init_device(&lis3_dev); | ||
101 | fail: | ||
102 | return ret; | ||
103 | } | ||
104 | |||
105 | static int __devexit lis3lv02d_i2c_remove(struct i2c_client *client) | ||
106 | { | ||
107 | struct lis3lv02d *lis3 = i2c_get_clientdata(client); | ||
108 | struct lis3lv02d_platform_data *pdata = client->dev.platform_data; | ||
109 | |||
110 | if (pdata && pdata->release_resources) | ||
111 | pdata->release_resources(); | ||
112 | |||
113 | lis3lv02d_joystick_disable(); | ||
114 | lis3lv02d_poweroff(lis3); | ||
115 | |||
116 | return lis3lv02d_remove_fs(&lis3_dev); | ||
117 | } | ||
118 | |||
119 | #ifdef CONFIG_PM | ||
120 | static int lis3lv02d_i2c_suspend(struct i2c_client *client, pm_message_t mesg) | ||
121 | { | ||
122 | struct lis3lv02d *lis3 = i2c_get_clientdata(client); | ||
123 | |||
124 | if (!lis3->pdata->wakeup_flags) | ||
125 | lis3lv02d_poweroff(lis3); | ||
126 | return 0; | ||
127 | } | ||
128 | |||
129 | static int lis3lv02d_i2c_resume(struct i2c_client *client) | ||
130 | { | ||
131 | struct lis3lv02d *lis3 = i2c_get_clientdata(client); | ||
132 | |||
133 | if (!lis3->pdata->wakeup_flags) | ||
134 | lis3lv02d_poweron(lis3); | ||
135 | return 0; | ||
136 | } | ||
137 | |||
138 | static void lis3lv02d_i2c_shutdown(struct i2c_client *client) | ||
139 | { | ||
140 | lis3lv02d_i2c_suspend(client, PMSG_SUSPEND); | ||
141 | } | ||
142 | #else | ||
143 | #define lis3lv02d_i2c_suspend NULL | ||
144 | #define lis3lv02d_i2c_resume NULL | ||
145 | #define lis3lv02d_i2c_shutdown NULL | ||
146 | #endif | ||
147 | |||
148 | static const struct i2c_device_id lis3lv02d_id[] = { | ||
149 | {"lis3lv02d", 0 }, | ||
150 | {} | ||
151 | }; | ||
152 | |||
153 | MODULE_DEVICE_TABLE(i2c, lis3lv02d_id); | ||
154 | |||
155 | static struct i2c_driver lis3lv02d_i2c_driver = { | ||
156 | .driver = { | ||
157 | .name = DRV_NAME, | ||
158 | .owner = THIS_MODULE, | ||
159 | }, | ||
160 | .suspend = lis3lv02d_i2c_suspend, | ||
161 | .shutdown = lis3lv02d_i2c_shutdown, | ||
162 | .resume = lis3lv02d_i2c_resume, | ||
163 | .probe = lis3lv02d_i2c_probe, | ||
164 | .remove = __devexit_p(lis3lv02d_i2c_remove), | ||
165 | .id_table = lis3lv02d_id, | ||
166 | }; | ||
167 | |||
168 | static int __init lis3lv02d_init(void) | ||
169 | { | ||
170 | return i2c_add_driver(&lis3lv02d_i2c_driver); | ||
171 | } | ||
172 | |||
173 | static void __exit lis3lv02d_exit(void) | ||
174 | { | ||
175 | i2c_del_driver(&lis3lv02d_i2c_driver); | ||
176 | } | ||
177 | |||
178 | MODULE_AUTHOR("Nokia Corporation"); | ||
179 | MODULE_DESCRIPTION("lis3lv02d I2C interface"); | ||
180 | MODULE_LICENSE("GPL"); | ||
181 | |||
182 | module_init(lis3lv02d_init); | ||
183 | module_exit(lis3lv02d_exit); | ||
diff --git a/drivers/hwmon/sht15.c b/drivers/hwmon/sht15.c index ebe38b680ee3..864a371f6eb9 100644 --- a/drivers/hwmon/sht15.c +++ b/drivers/hwmon/sht15.c | |||
@@ -305,7 +305,7 @@ static inline int sht15_calc_temp(struct sht15_data *data) | |||
305 | int d1 = 0; | 305 | int d1 = 0; |
306 | int i; | 306 | int i; |
307 | 307 | ||
308 | for (i = 1; i < ARRAY_SIZE(temppoints) - 1; i++) | 308 | for (i = 1; i < ARRAY_SIZE(temppoints); i++) |
309 | /* Find pointer to interpolate */ | 309 | /* Find pointer to interpolate */ |
310 | if (data->supply_uV > temppoints[i - 1].vdd) { | 310 | if (data->supply_uV > temppoints[i - 1].vdd) { |
311 | d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd) | 311 | d1 = (data->supply_uV/1000 - temppoints[i - 1].vdd) |
@@ -332,12 +332,12 @@ static inline int sht15_calc_humid(struct sht15_data *data) | |||
332 | 332 | ||
333 | const int c1 = -4; | 333 | const int c1 = -4; |
334 | const int c2 = 40500; /* x 10 ^ -6 */ | 334 | const int c2 = 40500; /* x 10 ^ -6 */ |
335 | const int c3 = 2800; /* x10 ^ -9 */ | 335 | const int c3 = -2800; /* x10 ^ -9 */ |
336 | 336 | ||
337 | RHlinear = c1*1000 | 337 | RHlinear = c1*1000 |
338 | + c2 * data->val_humid/1000 | 338 | + c2 * data->val_humid/1000 |
339 | + (data->val_humid * data->val_humid * c3)/1000000; | 339 | + (data->val_humid * data->val_humid * c3)/1000000; |
340 | return (temp - 25000) * (10000 + 800 * data->val_humid) | 340 | return (temp - 25000) * (10000 + 80 * data->val_humid) |
341 | / 1000000 + RHlinear; | 341 | / 1000000 + RHlinear; |
342 | } | 342 | } |
343 | 343 | ||
diff --git a/drivers/hwmon/smsc47m1.c b/drivers/hwmon/smsc47m1.c index 8ad50fdba00d..9ca97818bd4b 100644 --- a/drivers/hwmon/smsc47m1.c +++ b/drivers/hwmon/smsc47m1.c | |||
@@ -136,11 +136,11 @@ struct smsc47m1_data { | |||
136 | 136 | ||
137 | struct smsc47m1_sio_data { | 137 | struct smsc47m1_sio_data { |
138 | enum chips type; | 138 | enum chips type; |
139 | u8 activate; /* Remember initial device state */ | ||
139 | }; | 140 | }; |
140 | 141 | ||
141 | 142 | ||
142 | static int smsc47m1_probe(struct platform_device *pdev); | 143 | static int __exit smsc47m1_remove(struct platform_device *pdev); |
143 | static int __devexit smsc47m1_remove(struct platform_device *pdev); | ||
144 | static struct smsc47m1_data *smsc47m1_update_device(struct device *dev, | 144 | static struct smsc47m1_data *smsc47m1_update_device(struct device *dev, |
145 | int init); | 145 | int init); |
146 | 146 | ||
@@ -160,8 +160,7 @@ static struct platform_driver smsc47m1_driver = { | |||
160 | .owner = THIS_MODULE, | 160 | .owner = THIS_MODULE, |
161 | .name = DRVNAME, | 161 | .name = DRVNAME, |
162 | }, | 162 | }, |
163 | .probe = smsc47m1_probe, | 163 | .remove = __exit_p(smsc47m1_remove), |
164 | .remove = __devexit_p(smsc47m1_remove), | ||
165 | }; | 164 | }; |
166 | 165 | ||
167 | static ssize_t get_fan(struct device *dev, struct device_attribute | 166 | static ssize_t get_fan(struct device *dev, struct device_attribute |
@@ -470,24 +469,126 @@ static int __init smsc47m1_find(unsigned short *addr, | |||
470 | superio_select(); | 469 | superio_select(); |
471 | *addr = (superio_inb(SUPERIO_REG_BASE) << 8) | 470 | *addr = (superio_inb(SUPERIO_REG_BASE) << 8) |
472 | | superio_inb(SUPERIO_REG_BASE + 1); | 471 | | superio_inb(SUPERIO_REG_BASE + 1); |
473 | val = superio_inb(SUPERIO_REG_ACT); | 472 | if (*addr == 0) { |
474 | if (*addr == 0 || (val & 0x01) == 0) { | 473 | pr_info(DRVNAME ": Device address not set, will not use\n"); |
475 | pr_info(DRVNAME ": Device is disabled, will not use\n"); | ||
476 | superio_exit(); | 474 | superio_exit(); |
477 | return -ENODEV; | 475 | return -ENODEV; |
478 | } | 476 | } |
479 | 477 | ||
478 | /* Enable only if address is set (needed at least on the | ||
479 | * Compaq Presario S4000NX) */ | ||
480 | sio_data->activate = superio_inb(SUPERIO_REG_ACT); | ||
481 | if ((sio_data->activate & 0x01) == 0) { | ||
482 | pr_info(DRVNAME ": Enabling device\n"); | ||
483 | superio_outb(SUPERIO_REG_ACT, sio_data->activate | 0x01); | ||
484 | } | ||
485 | |||
480 | superio_exit(); | 486 | superio_exit(); |
481 | return 0; | 487 | return 0; |
482 | } | 488 | } |
483 | 489 | ||
484 | static int __devinit smsc47m1_probe(struct platform_device *pdev) | 490 | /* Restore device to its initial state */ |
491 | static void __init smsc47m1_restore(const struct smsc47m1_sio_data *sio_data) | ||
492 | { | ||
493 | if ((sio_data->activate & 0x01) == 0) { | ||
494 | superio_enter(); | ||
495 | superio_select(); | ||
496 | |||
497 | pr_info(DRVNAME ": Disabling device\n"); | ||
498 | superio_outb(SUPERIO_REG_ACT, sio_data->activate); | ||
499 | |||
500 | superio_exit(); | ||
501 | } | ||
502 | } | ||
503 | |||
504 | #define CHECK 1 | ||
505 | #define REQUEST 2 | ||
506 | #define RELEASE 3 | ||
507 | |||
508 | /* | ||
509 | * This function can be used to: | ||
510 | * - test for resource conflicts with ACPI | ||
511 | * - request the resources | ||
512 | * - release the resources | ||
513 | * We only allocate the I/O ports we really need, to minimize the risk of | ||
514 | * conflicts with ACPI or with other drivers. | ||
515 | */ | ||
516 | static int smsc47m1_handle_resources(unsigned short address, enum chips type, | ||
517 | int action, struct device *dev) | ||
518 | { | ||
519 | static const u8 ports_m1[] = { | ||
520 | /* register, region length */ | ||
521 | 0x04, 1, | ||
522 | 0x33, 4, | ||
523 | 0x56, 7, | ||
524 | }; | ||
525 | |||
526 | static const u8 ports_m2[] = { | ||
527 | /* register, region length */ | ||
528 | 0x04, 1, | ||
529 | 0x09, 1, | ||
530 | 0x2c, 2, | ||
531 | 0x35, 4, | ||
532 | 0x56, 7, | ||
533 | 0x69, 4, | ||
534 | }; | ||
535 | |||
536 | int i, ports_size, err; | ||
537 | const u8 *ports; | ||
538 | |||
539 | switch (type) { | ||
540 | case smsc47m1: | ||
541 | default: | ||
542 | ports = ports_m1; | ||
543 | ports_size = ARRAY_SIZE(ports_m1); | ||
544 | break; | ||
545 | case smsc47m2: | ||
546 | ports = ports_m2; | ||
547 | ports_size = ARRAY_SIZE(ports_m2); | ||
548 | break; | ||
549 | } | ||
550 | |||
551 | for (i = 0; i + 1 < ports_size; i += 2) { | ||
552 | unsigned short start = address + ports[i]; | ||
553 | unsigned short len = ports[i + 1]; | ||
554 | |||
555 | switch (action) { | ||
556 | case CHECK: | ||
557 | /* Only check for conflicts */ | ||
558 | err = acpi_check_region(start, len, DRVNAME); | ||
559 | if (err) | ||
560 | return err; | ||
561 | break; | ||
562 | case REQUEST: | ||
563 | /* Request the resources */ | ||
564 | if (!request_region(start, len, DRVNAME)) { | ||
565 | dev_err(dev, "Region 0x%hx-0x%hx already in " | ||
566 | "use!\n", start, start + len); | ||
567 | |||
568 | /* Undo all requests */ | ||
569 | for (i -= 2; i >= 0; i -= 2) | ||
570 | release_region(address + ports[i], | ||
571 | ports[i + 1]); | ||
572 | return -EBUSY; | ||
573 | } | ||
574 | break; | ||
575 | case RELEASE: | ||
576 | /* Release the resources */ | ||
577 | release_region(start, len); | ||
578 | break; | ||
579 | } | ||
580 | } | ||
581 | |||
582 | return 0; | ||
583 | } | ||
584 | |||
585 | static int __init smsc47m1_probe(struct platform_device *pdev) | ||
485 | { | 586 | { |
486 | struct device *dev = &pdev->dev; | 587 | struct device *dev = &pdev->dev; |
487 | struct smsc47m1_sio_data *sio_data = dev->platform_data; | 588 | struct smsc47m1_sio_data *sio_data = dev->platform_data; |
488 | struct smsc47m1_data *data; | 589 | struct smsc47m1_data *data; |
489 | struct resource *res; | 590 | struct resource *res; |
490 | int err = 0; | 591 | int err; |
491 | int fan1, fan2, fan3, pwm1, pwm2, pwm3; | 592 | int fan1, fan2, fan3, pwm1, pwm2, pwm3; |
492 | 593 | ||
493 | static const char *names[] = { | 594 | static const char *names[] = { |
@@ -496,12 +597,10 @@ static int __devinit smsc47m1_probe(struct platform_device *pdev) | |||
496 | }; | 597 | }; |
497 | 598 | ||
498 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | 599 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
499 | if (!request_region(res->start, SMSC_EXTENT, DRVNAME)) { | 600 | err = smsc47m1_handle_resources(res->start, sio_data->type, |
500 | dev_err(dev, "Region 0x%lx-0x%lx already in use!\n", | 601 | REQUEST, dev); |
501 | (unsigned long)res->start, | 602 | if (err < 0) |
502 | (unsigned long)res->end); | 603 | return err; |
503 | return -EBUSY; | ||
504 | } | ||
505 | 604 | ||
506 | if (!(data = kzalloc(sizeof(struct smsc47m1_data), GFP_KERNEL))) { | 605 | if (!(data = kzalloc(sizeof(struct smsc47m1_data), GFP_KERNEL))) { |
507 | err = -ENOMEM; | 606 | err = -ENOMEM; |
@@ -637,11 +736,11 @@ error_free: | |||
637 | platform_set_drvdata(pdev, NULL); | 736 | platform_set_drvdata(pdev, NULL); |
638 | kfree(data); | 737 | kfree(data); |
639 | error_release: | 738 | error_release: |
640 | release_region(res->start, SMSC_EXTENT); | 739 | smsc47m1_handle_resources(res->start, sio_data->type, RELEASE, dev); |
641 | return err; | 740 | return err; |
642 | } | 741 | } |
643 | 742 | ||
644 | static int __devexit smsc47m1_remove(struct platform_device *pdev) | 743 | static int __exit smsc47m1_remove(struct platform_device *pdev) |
645 | { | 744 | { |
646 | struct smsc47m1_data *data = platform_get_drvdata(pdev); | 745 | struct smsc47m1_data *data = platform_get_drvdata(pdev); |
647 | struct resource *res; | 746 | struct resource *res; |
@@ -650,7 +749,7 @@ static int __devexit smsc47m1_remove(struct platform_device *pdev) | |||
650 | sysfs_remove_group(&pdev->dev.kobj, &smsc47m1_group); | 749 | sysfs_remove_group(&pdev->dev.kobj, &smsc47m1_group); |
651 | 750 | ||
652 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); | 751 | res = platform_get_resource(pdev, IORESOURCE_IO, 0); |
653 | release_region(res->start, SMSC_EXTENT); | 752 | smsc47m1_handle_resources(res->start, data->type, RELEASE, &pdev->dev); |
654 | platform_set_drvdata(pdev, NULL); | 753 | platform_set_drvdata(pdev, NULL); |
655 | kfree(data); | 754 | kfree(data); |
656 | 755 | ||
@@ -717,7 +816,7 @@ static int __init smsc47m1_device_add(unsigned short address, | |||
717 | }; | 816 | }; |
718 | int err; | 817 | int err; |
719 | 818 | ||
720 | err = acpi_check_resource_conflict(&res); | 819 | err = smsc47m1_handle_resources(address, sio_data->type, CHECK, NULL); |
721 | if (err) | 820 | if (err) |
722 | goto exit; | 821 | goto exit; |
723 | 822 | ||
@@ -766,27 +865,29 @@ static int __init sm_smsc47m1_init(void) | |||
766 | if (smsc47m1_find(&address, &sio_data)) | 865 | if (smsc47m1_find(&address, &sio_data)) |
767 | return -ENODEV; | 866 | return -ENODEV; |
768 | 867 | ||
769 | err = platform_driver_register(&smsc47m1_driver); | 868 | /* Sets global pdev as a side effect */ |
869 | err = smsc47m1_device_add(address, &sio_data); | ||
770 | if (err) | 870 | if (err) |
771 | goto exit; | 871 | goto exit; |
772 | 872 | ||
773 | /* Sets global pdev as a side effect */ | 873 | err = platform_driver_probe(&smsc47m1_driver, smsc47m1_probe); |
774 | err = smsc47m1_device_add(address, &sio_data); | ||
775 | if (err) | 874 | if (err) |
776 | goto exit_driver; | 875 | goto exit_device; |
777 | 876 | ||
778 | return 0; | 877 | return 0; |
779 | 878 | ||
780 | exit_driver: | 879 | exit_device: |
781 | platform_driver_unregister(&smsc47m1_driver); | 880 | platform_device_unregister(pdev); |
881 | smsc47m1_restore(&sio_data); | ||
782 | exit: | 882 | exit: |
783 | return err; | 883 | return err; |
784 | } | 884 | } |
785 | 885 | ||
786 | static void __exit sm_smsc47m1_exit(void) | 886 | static void __exit sm_smsc47m1_exit(void) |
787 | { | 887 | { |
788 | platform_device_unregister(pdev); | ||
789 | platform_driver_unregister(&smsc47m1_driver); | 888 | platform_driver_unregister(&smsc47m1_driver); |
889 | smsc47m1_restore(pdev->dev.platform_data); | ||
890 | platform_device_unregister(pdev); | ||
790 | } | 891 | } |
791 | 892 | ||
792 | MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>"); | 893 | MODULE_AUTHOR("Mark D. Studebaker <mdsxyz123@yahoo.com>"); |
diff --git a/drivers/hwmon/via-cputemp.c b/drivers/hwmon/via-cputemp.c new file mode 100644 index 000000000000..7442cf754856 --- /dev/null +++ b/drivers/hwmon/via-cputemp.c | |||
@@ -0,0 +1,356 @@ | |||
1 | /* | ||
2 | * via-cputemp.c - Driver for VIA CPU core temperature monitoring | ||
3 | * Copyright (C) 2009 VIA Technologies, Inc. | ||
4 | * | ||
5 | * based on existing coretemp.c, which is | ||
6 | * | ||
7 | * Copyright (C) 2007 Rudolf Marek <r.marek@assembler.cz> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify | ||
10 | * it under the terms of the GNU General Public License as published by | ||
11 | * the Free Software Foundation; version 2 of the License. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA | ||
21 | * 02110-1301 USA. | ||
22 | */ | ||
23 | |||
24 | #include <linux/module.h> | ||
25 | #include <linux/delay.h> | ||
26 | #include <linux/init.h> | ||
27 | #include <linux/slab.h> | ||
28 | #include <linux/jiffies.h> | ||
29 | #include <linux/hwmon.h> | ||
30 | #include <linux/sysfs.h> | ||
31 | #include <linux/hwmon-sysfs.h> | ||
32 | #include <linux/err.h> | ||
33 | #include <linux/mutex.h> | ||
34 | #include <linux/list.h> | ||
35 | #include <linux/platform_device.h> | ||
36 | #include <linux/cpu.h> | ||
37 | #include <asm/msr.h> | ||
38 | #include <asm/processor.h> | ||
39 | |||
40 | #define DRVNAME "via_cputemp" | ||
41 | |||
42 | enum { SHOW_TEMP, SHOW_LABEL, SHOW_NAME } SHOW; | ||
43 | |||
44 | /* | ||
45 | * Functions declaration | ||
46 | */ | ||
47 | |||
48 | struct via_cputemp_data { | ||
49 | struct device *hwmon_dev; | ||
50 | const char *name; | ||
51 | u32 id; | ||
52 | u32 msr; | ||
53 | }; | ||
54 | |||
55 | /* | ||
56 | * Sysfs stuff | ||
57 | */ | ||
58 | |||
59 | static ssize_t show_name(struct device *dev, struct device_attribute | ||
60 | *devattr, char *buf) | ||
61 | { | ||
62 | int ret; | ||
63 | struct sensor_device_attribute *attr = to_sensor_dev_attr(devattr); | ||
64 | struct via_cputemp_data *data = dev_get_drvdata(dev); | ||
65 | |||
66 | if (attr->index == SHOW_NAME) | ||
67 | ret = sprintf(buf, "%s\n", data->name); | ||
68 | else /* show label */ | ||
69 | ret = sprintf(buf, "Core %d\n", data->id); | ||
70 | return ret; | ||
71 | } | ||
72 | |||
73 | static ssize_t show_temp(struct device *dev, | ||
74 | struct device_attribute *devattr, char *buf) | ||
75 | { | ||
76 | struct via_cputemp_data *data = dev_get_drvdata(dev); | ||
77 | u32 eax, edx; | ||
78 | int err; | ||
79 | |||
80 | err = rdmsr_safe_on_cpu(data->id, data->msr, &eax, &edx); | ||
81 | if (err) | ||
82 | return -EAGAIN; | ||
83 | |||
84 | return sprintf(buf, "%lu\n", ((unsigned long)eax & 0xffffff) * 1000); | ||
85 | } | ||
86 | |||
87 | static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_temp, NULL, | ||
88 | SHOW_TEMP); | ||
89 | static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_name, NULL, SHOW_LABEL); | ||
90 | static SENSOR_DEVICE_ATTR(name, S_IRUGO, show_name, NULL, SHOW_NAME); | ||
91 | |||
92 | static struct attribute *via_cputemp_attributes[] = { | ||
93 | &sensor_dev_attr_name.dev_attr.attr, | ||
94 | &sensor_dev_attr_temp1_label.dev_attr.attr, | ||
95 | &sensor_dev_attr_temp1_input.dev_attr.attr, | ||
96 | NULL | ||
97 | }; | ||
98 | |||
99 | static const struct attribute_group via_cputemp_group = { | ||
100 | .attrs = via_cputemp_attributes, | ||
101 | }; | ||
102 | |||
103 | static int __devinit via_cputemp_probe(struct platform_device *pdev) | ||
104 | { | ||
105 | struct via_cputemp_data *data; | ||
106 | struct cpuinfo_x86 *c = &cpu_data(pdev->id); | ||
107 | int err; | ||
108 | u32 eax, edx; | ||
109 | |||
110 | data = kzalloc(sizeof(struct via_cputemp_data), GFP_KERNEL); | ||
111 | if (!data) { | ||
112 | err = -ENOMEM; | ||
113 | dev_err(&pdev->dev, "Out of memory\n"); | ||
114 | goto exit; | ||
115 | } | ||
116 | |||
117 | data->id = pdev->id; | ||
118 | data->name = "via_cputemp"; | ||
119 | |||
120 | switch (c->x86_model) { | ||
121 | case 0xA: | ||
122 | /* C7 A */ | ||
123 | case 0xD: | ||
124 | /* C7 D */ | ||
125 | data->msr = 0x1169; | ||
126 | break; | ||
127 | case 0xF: | ||
128 | /* Nano */ | ||
129 | data->msr = 0x1423; | ||
130 | break; | ||
131 | default: | ||
132 | err = -ENODEV; | ||
133 | goto exit_free; | ||
134 | } | ||
135 | |||
136 | /* test if we can access the TEMPERATURE MSR */ | ||
137 | err = rdmsr_safe_on_cpu(data->id, data->msr, &eax, &edx); | ||
138 | if (err) { | ||
139 | dev_err(&pdev->dev, | ||
140 | "Unable to access TEMPERATURE MSR, giving up\n"); | ||
141 | goto exit_free; | ||
142 | } | ||
143 | |||
144 | platform_set_drvdata(pdev, data); | ||
145 | |||
146 | err = sysfs_create_group(&pdev->dev.kobj, &via_cputemp_group); | ||
147 | if (err) | ||
148 | goto exit_free; | ||
149 | |||
150 | data->hwmon_dev = hwmon_device_register(&pdev->dev); | ||
151 | if (IS_ERR(data->hwmon_dev)) { | ||
152 | err = PTR_ERR(data->hwmon_dev); | ||
153 | dev_err(&pdev->dev, "Class registration failed (%d)\n", | ||
154 | err); | ||
155 | goto exit_remove; | ||
156 | } | ||
157 | |||
158 | return 0; | ||
159 | |||
160 | exit_remove: | ||
161 | sysfs_remove_group(&pdev->dev.kobj, &via_cputemp_group); | ||
162 | exit_free: | ||
163 | platform_set_drvdata(pdev, NULL); | ||
164 | kfree(data); | ||
165 | exit: | ||
166 | return err; | ||
167 | } | ||
168 | |||
169 | static int __devexit via_cputemp_remove(struct platform_device *pdev) | ||
170 | { | ||
171 | struct via_cputemp_data *data = platform_get_drvdata(pdev); | ||
172 | |||
173 | hwmon_device_unregister(data->hwmon_dev); | ||
174 | sysfs_remove_group(&pdev->dev.kobj, &via_cputemp_group); | ||
175 | platform_set_drvdata(pdev, NULL); | ||
176 | kfree(data); | ||
177 | return 0; | ||
178 | } | ||
179 | |||
180 | static struct platform_driver via_cputemp_driver = { | ||
181 | .driver = { | ||
182 | .owner = THIS_MODULE, | ||
183 | .name = DRVNAME, | ||
184 | }, | ||
185 | .probe = via_cputemp_probe, | ||
186 | .remove = __devexit_p(via_cputemp_remove), | ||
187 | }; | ||
188 | |||
189 | struct pdev_entry { | ||
190 | struct list_head list; | ||
191 | struct platform_device *pdev; | ||
192 | unsigned int cpu; | ||
193 | }; | ||
194 | |||
195 | static LIST_HEAD(pdev_list); | ||
196 | static DEFINE_MUTEX(pdev_list_mutex); | ||
197 | |||
198 | static int __cpuinit via_cputemp_device_add(unsigned int cpu) | ||
199 | { | ||
200 | int err; | ||
201 | struct platform_device *pdev; | ||
202 | struct pdev_entry *pdev_entry; | ||
203 | |||
204 | pdev = platform_device_alloc(DRVNAME, cpu); | ||
205 | if (!pdev) { | ||
206 | err = -ENOMEM; | ||
207 | printk(KERN_ERR DRVNAME ": Device allocation failed\n"); | ||
208 | goto exit; | ||
209 | } | ||
210 | |||
211 | pdev_entry = kzalloc(sizeof(struct pdev_entry), GFP_KERNEL); | ||
212 | if (!pdev_entry) { | ||
213 | err = -ENOMEM; | ||
214 | goto exit_device_put; | ||
215 | } | ||
216 | |||
217 | err = platform_device_add(pdev); | ||
218 | if (err) { | ||
219 | printk(KERN_ERR DRVNAME ": Device addition failed (%d)\n", | ||
220 | err); | ||
221 | goto exit_device_free; | ||
222 | } | ||
223 | |||
224 | pdev_entry->pdev = pdev; | ||
225 | pdev_entry->cpu = cpu; | ||
226 | mutex_lock(&pdev_list_mutex); | ||
227 | list_add_tail(&pdev_entry->list, &pdev_list); | ||
228 | mutex_unlock(&pdev_list_mutex); | ||
229 | |||
230 | return 0; | ||
231 | |||
232 | exit_device_free: | ||
233 | kfree(pdev_entry); | ||
234 | exit_device_put: | ||
235 | platform_device_put(pdev); | ||
236 | exit: | ||
237 | return err; | ||
238 | } | ||
239 | |||
240 | #ifdef CONFIG_HOTPLUG_CPU | ||
241 | static void via_cputemp_device_remove(unsigned int cpu) | ||
242 | { | ||
243 | struct pdev_entry *p, *n; | ||
244 | mutex_lock(&pdev_list_mutex); | ||
245 | list_for_each_entry_safe(p, n, &pdev_list, list) { | ||
246 | if (p->cpu == cpu) { | ||
247 | platform_device_unregister(p->pdev); | ||
248 | list_del(&p->list); | ||
249 | kfree(p); | ||
250 | } | ||
251 | } | ||
252 | mutex_unlock(&pdev_list_mutex); | ||
253 | } | ||
254 | |||
255 | static int __cpuinit via_cputemp_cpu_callback(struct notifier_block *nfb, | ||
256 | unsigned long action, void *hcpu) | ||
257 | { | ||
258 | unsigned int cpu = (unsigned long) hcpu; | ||
259 | |||
260 | switch (action) { | ||
261 | case CPU_ONLINE: | ||
262 | case CPU_DOWN_FAILED: | ||
263 | via_cputemp_device_add(cpu); | ||
264 | break; | ||
265 | case CPU_DOWN_PREPARE: | ||
266 | via_cputemp_device_remove(cpu); | ||
267 | break; | ||
268 | } | ||
269 | return NOTIFY_OK; | ||
270 | } | ||
271 | |||
272 | static struct notifier_block via_cputemp_cpu_notifier __refdata = { | ||
273 | .notifier_call = via_cputemp_cpu_callback, | ||
274 | }; | ||
275 | #endif /* !CONFIG_HOTPLUG_CPU */ | ||
276 | |||
277 | static int __init via_cputemp_init(void) | ||
278 | { | ||
279 | int i, err; | ||
280 | struct pdev_entry *p, *n; | ||
281 | |||
282 | if (cpu_data(0).x86_vendor != X86_VENDOR_CENTAUR) { | ||
283 | printk(KERN_DEBUG DRVNAME ": Not a VIA CPU\n"); | ||
284 | err = -ENODEV; | ||
285 | goto exit; | ||
286 | } | ||
287 | |||
288 | err = platform_driver_register(&via_cputemp_driver); | ||
289 | if (err) | ||
290 | goto exit; | ||
291 | |||
292 | for_each_online_cpu(i) { | ||
293 | struct cpuinfo_x86 *c = &cpu_data(i); | ||
294 | |||
295 | if (c->x86 != 6) | ||
296 | continue; | ||
297 | |||
298 | if (c->x86_model < 0x0a) | ||
299 | continue; | ||
300 | |||
301 | if (c->x86_model > 0x0f) { | ||
302 | printk(KERN_WARNING DRVNAME ": Unknown CPU " | ||
303 | "model 0x%x\n", c->x86_model); | ||
304 | continue; | ||
305 | } | ||
306 | |||
307 | err = via_cputemp_device_add(i); | ||
308 | if (err) | ||
309 | goto exit_devices_unreg; | ||
310 | } | ||
311 | if (list_empty(&pdev_list)) { | ||
312 | err = -ENODEV; | ||
313 | goto exit_driver_unreg; | ||
314 | } | ||
315 | |||
316 | #ifdef CONFIG_HOTPLUG_CPU | ||
317 | register_hotcpu_notifier(&via_cputemp_cpu_notifier); | ||
318 | #endif | ||
319 | return 0; | ||
320 | |||
321 | exit_devices_unreg: | ||
322 | mutex_lock(&pdev_list_mutex); | ||
323 | list_for_each_entry_safe(p, n, &pdev_list, list) { | ||
324 | platform_device_unregister(p->pdev); | ||
325 | list_del(&p->list); | ||
326 | kfree(p); | ||
327 | } | ||
328 | mutex_unlock(&pdev_list_mutex); | ||
329 | exit_driver_unreg: | ||
330 | platform_driver_unregister(&via_cputemp_driver); | ||
331 | exit: | ||
332 | return err; | ||
333 | } | ||
334 | |||
335 | static void __exit via_cputemp_exit(void) | ||
336 | { | ||
337 | struct pdev_entry *p, *n; | ||
338 | #ifdef CONFIG_HOTPLUG_CPU | ||
339 | unregister_hotcpu_notifier(&via_cputemp_cpu_notifier); | ||
340 | #endif | ||
341 | mutex_lock(&pdev_list_mutex); | ||
342 | list_for_each_entry_safe(p, n, &pdev_list, list) { | ||
343 | platform_device_unregister(p->pdev); | ||
344 | list_del(&p->list); | ||
345 | kfree(p); | ||
346 | } | ||
347 | mutex_unlock(&pdev_list_mutex); | ||
348 | platform_driver_unregister(&via_cputemp_driver); | ||
349 | } | ||
350 | |||
351 | MODULE_AUTHOR("Harald Welte <HaraldWelte@viatech.com>"); | ||
352 | MODULE_DESCRIPTION("VIA CPU temperature monitor"); | ||
353 | MODULE_LICENSE("GPL"); | ||
354 | |||
355 | module_init(via_cputemp_init) | ||
356 | module_exit(via_cputemp_exit) | ||
diff --git a/drivers/hwmon/w83627hf.c b/drivers/hwmon/w83627hf.c index b257c7223733..38e280523071 100644 --- a/drivers/hwmon/w83627hf.c +++ b/drivers/hwmon/w83627hf.c | |||
@@ -1135,6 +1135,7 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr, | |||
1135 | "W83687THF", | 1135 | "W83687THF", |
1136 | }; | 1136 | }; |
1137 | 1137 | ||
1138 | sio_data->sioaddr = sioaddr; | ||
1138 | superio_enter(sio_data); | 1139 | superio_enter(sio_data); |
1139 | val = force_id ? force_id : superio_inb(sio_data, DEVID); | 1140 | val = force_id ? force_id : superio_inb(sio_data, DEVID); |
1140 | switch (val) { | 1141 | switch (val) { |
@@ -1177,7 +1178,6 @@ static int __init w83627hf_find(int sioaddr, unsigned short *addr, | |||
1177 | } | 1178 | } |
1178 | 1179 | ||
1179 | err = 0; | 1180 | err = 0; |
1180 | sio_data->sioaddr = sioaddr; | ||
1181 | pr_info(DRVNAME ": Found %s chip at %#x\n", | 1181 | pr_info(DRVNAME ": Found %s chip at %#x\n", |
1182 | names[sio_data->type], *addr); | 1182 | names[sio_data->type], *addr); |
1183 | 1183 | ||
diff --git a/drivers/idle/i7300_idle.c b/drivers/idle/i7300_idle.c index 1f20a042a4f5..dd253002cd50 100644 --- a/drivers/idle/i7300_idle.c +++ b/drivers/idle/i7300_idle.c | |||
@@ -81,7 +81,7 @@ static u8 i7300_idle_thrtctl_saved; | |||
81 | static u8 i7300_idle_thrtlow_saved; | 81 | static u8 i7300_idle_thrtlow_saved; |
82 | static u32 i7300_idle_mc_saved; | 82 | static u32 i7300_idle_mc_saved; |
83 | 83 | ||
84 | static cpumask_t idle_cpumask; | 84 | static cpumask_var_t idle_cpumask; |
85 | static ktime_t start_ktime; | 85 | static ktime_t start_ktime; |
86 | static unsigned long avg_idle_us; | 86 | static unsigned long avg_idle_us; |
87 | 87 | ||
@@ -459,9 +459,9 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val, | |||
459 | spin_lock_irqsave(&i7300_idle_lock, flags); | 459 | spin_lock_irqsave(&i7300_idle_lock, flags); |
460 | if (val == IDLE_START) { | 460 | if (val == IDLE_START) { |
461 | 461 | ||
462 | cpu_set(smp_processor_id(), idle_cpumask); | 462 | cpumask_set_cpu(smp_processor_id(), idle_cpumask); |
463 | 463 | ||
464 | if (cpus_weight(idle_cpumask) != num_online_cpus()) | 464 | if (cpumask_weight(idle_cpumask) != num_online_cpus()) |
465 | goto end; | 465 | goto end; |
466 | 466 | ||
467 | now_ktime = ktime_get(); | 467 | now_ktime = ktime_get(); |
@@ -478,8 +478,8 @@ static int i7300_idle_notifier(struct notifier_block *nb, unsigned long val, | |||
478 | i7300_idle_ioat_start(); | 478 | i7300_idle_ioat_start(); |
479 | 479 | ||
480 | } else if (val == IDLE_END) { | 480 | } else if (val == IDLE_END) { |
481 | cpu_clear(smp_processor_id(), idle_cpumask); | 481 | cpumask_clear_cpu(smp_processor_id(), idle_cpumask); |
482 | if (cpus_weight(idle_cpumask) == (num_online_cpus() - 1)) { | 482 | if (cpumask_weight(idle_cpumask) == (num_online_cpus() - 1)) { |
483 | /* First CPU coming out of idle */ | 483 | /* First CPU coming out of idle */ |
484 | u64 idle_duration_us; | 484 | u64 idle_duration_us; |
485 | 485 | ||
@@ -553,7 +553,6 @@ struct debugfs_file_info { | |||
553 | static int __init i7300_idle_init(void) | 553 | static int __init i7300_idle_init(void) |
554 | { | 554 | { |
555 | spin_lock_init(&i7300_idle_lock); | 555 | spin_lock_init(&i7300_idle_lock); |
556 | cpus_clear(idle_cpumask); | ||
557 | total_us = 0; | 556 | total_us = 0; |
558 | 557 | ||
559 | if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload)) | 558 | if (i7300_idle_platform_probe(&fbd_dev, &ioat_dev, forceload)) |
@@ -565,6 +564,9 @@ static int __init i7300_idle_init(void) | |||
565 | if (i7300_idle_ioat_init()) | 564 | if (i7300_idle_ioat_init()) |
566 | return -ENODEV; | 565 | return -ENODEV; |
567 | 566 | ||
567 | if (!zalloc_cpumask_var(&idle_cpumask, GFP_KERNEL)) | ||
568 | return -ENOMEM; | ||
569 | |||
568 | debugfs_dir = debugfs_create_dir("i7300_idle", NULL); | 570 | debugfs_dir = debugfs_create_dir("i7300_idle", NULL); |
569 | if (debugfs_dir) { | 571 | if (debugfs_dir) { |
570 | int i = 0; | 572 | int i = 0; |
@@ -589,6 +591,7 @@ static int __init i7300_idle_init(void) | |||
589 | static void __exit i7300_idle_exit(void) | 591 | static void __exit i7300_idle_exit(void) |
590 | { | 592 | { |
591 | idle_notifier_unregister(&i7300_idle_nb); | 593 | idle_notifier_unregister(&i7300_idle_nb); |
594 | free_cpumask_var(idle_cpumask); | ||
592 | 595 | ||
593 | if (debugfs_dir) { | 596 | if (debugfs_dir) { |
594 | int i = 0; | 597 | int i = 0; |
diff --git a/drivers/leds/Kconfig b/drivers/leds/Kconfig index e4f599f20e38..8a0e1ec95e4a 100644 --- a/drivers/leds/Kconfig +++ b/drivers/leds/Kconfig | |||
@@ -229,6 +229,12 @@ config LEDS_PWM | |||
229 | help | 229 | help |
230 | This option enables support for pwm driven LEDs | 230 | This option enables support for pwm driven LEDs |
231 | 231 | ||
232 | config LEDS_REGULATOR | ||
233 | tristate "REGULATOR driven LED support" | ||
234 | depends on LEDS_CLASS && REGULATOR | ||
235 | help | ||
236 | This option enables support for regulator driven LEDs. | ||
237 | |||
232 | config LEDS_BD2802 | 238 | config LEDS_BD2802 |
233 | tristate "LED driver for BD2802 RGB LED" | 239 | tristate "LED driver for BD2802 RGB LED" |
234 | depends on LEDS_CLASS && I2C | 240 | depends on LEDS_CLASS && I2C |
@@ -236,6 +242,33 @@ config LEDS_BD2802 | |||
236 | This option enables support for BD2802GU RGB LED driver chips | 242 | This option enables support for BD2802GU RGB LED driver chips |
237 | accessed via the I2C bus. | 243 | accessed via the I2C bus. |
238 | 244 | ||
245 | config LEDS_INTEL_SS4200 | ||
246 | tristate "LED driver for Intel NAS SS4200 series" | ||
247 | depends on LEDS_CLASS && PCI && DMI | ||
248 | help | ||
249 | This option enables support for the Intel SS4200 series of | ||
250 | Network Attached Storage servers. You may control the hard | ||
251 | drive or power LEDs on the front panel. Using this driver | ||
252 | can stop the front LED from blinking after startup. | ||
253 | |||
254 | config LEDS_LT3593 | ||
255 | tristate "LED driver for LT3593 controllers" | ||
256 | depends on LEDS_CLASS && GENERIC_GPIO | ||
257 | help | ||
258 | This option enables support for LEDs driven by a Linear Technology | ||
259 | LT3593 controller. This controller uses a special one-wire pulse | ||
260 | coding protocol to set the brightness. | ||
261 | |||
262 | config LEDS_ADP5520 | ||
263 | tristate "LED Support for ADP5520/ADP5501 PMIC" | ||
264 | depends on LEDS_CLASS && PMIC_ADP5520 | ||
265 | help | ||
266 | This option enables support for on-chip LED drivers found | ||
267 | on Analog Devices ADP5520/ADP5501 PMICs. | ||
268 | |||
269 | To compile this driver as a module, choose M here: the module will | ||
270 | be called leds-adp5520. | ||
271 | |||
239 | comment "LED Triggers" | 272 | comment "LED Triggers" |
240 | 273 | ||
241 | config LEDS_TRIGGERS | 274 | config LEDS_TRIGGERS |
diff --git a/drivers/leds/Makefile b/drivers/leds/Makefile index 46d72704d606..9e63869d7c0d 100644 --- a/drivers/leds/Makefile +++ b/drivers/leds/Makefile | |||
@@ -29,6 +29,10 @@ obj-$(CONFIG_LEDS_DA903X) += leds-da903x.o | |||
29 | obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o | 29 | obj-$(CONFIG_LEDS_WM831X_STATUS) += leds-wm831x-status.o |
30 | obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o | 30 | obj-$(CONFIG_LEDS_WM8350) += leds-wm8350.o |
31 | obj-$(CONFIG_LEDS_PWM) += leds-pwm.o | 31 | obj-$(CONFIG_LEDS_PWM) += leds-pwm.o |
32 | obj-$(CONFIG_LEDS_REGULATOR) += leds-regulator.o | ||
33 | obj-$(CONFIG_LEDS_INTEL_SS4200) += leds-ss4200.o | ||
34 | obj-$(CONFIG_LEDS_LT3593) += leds-lt3593.o | ||
35 | obj-$(CONFIG_LEDS_ADP5520) += leds-adp5520.o | ||
32 | 36 | ||
33 | # LED SPI Drivers | 37 | # LED SPI Drivers |
34 | obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o | 38 | obj-$(CONFIG_LEDS_DAC124S085) += leds-dac124s085.o |
diff --git a/drivers/leds/leds-adp5520.c b/drivers/leds/leds-adp5520.c new file mode 100644 index 000000000000..a8f315902131 --- /dev/null +++ b/drivers/leds/leds-adp5520.c | |||
@@ -0,0 +1,230 @@ | |||
1 | /* | ||
2 | * LEDs driver for Analog Devices ADP5520/ADP5501 MFD PMICs | ||
3 | * | ||
4 | * Copyright 2009 Analog Devices Inc. | ||
5 | * | ||
6 | * Loosely derived from leds-da903x: | ||
7 | * Copyright (C) 2008 Compulab, Ltd. | ||
8 | * Mike Rapoport <mike@compulab.co.il> | ||
9 | * | ||
10 | * Copyright (C) 2006-2008 Marvell International Ltd. | ||
11 | * Eric Miao <eric.miao@marvell.com> | ||
12 | * | ||
13 | * Licensed under the GPL-2 or later. | ||
14 | */ | ||
15 | |||
16 | #include <linux/module.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/init.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/leds.h> | ||
21 | #include <linux/workqueue.h> | ||
22 | #include <linux/mfd/adp5520.h> | ||
23 | |||
24 | struct adp5520_led { | ||
25 | struct led_classdev cdev; | ||
26 | struct work_struct work; | ||
27 | struct device *master; | ||
28 | enum led_brightness new_brightness; | ||
29 | int id; | ||
30 | int flags; | ||
31 | }; | ||
32 | |||
33 | static void adp5520_led_work(struct work_struct *work) | ||
34 | { | ||
35 | struct adp5520_led *led = container_of(work, struct adp5520_led, work); | ||
36 | adp5520_write(led->master, ADP5520_LED1_CURRENT + led->id - 1, | ||
37 | led->new_brightness >> 2); | ||
38 | } | ||
39 | |||
40 | static void adp5520_led_set(struct led_classdev *led_cdev, | ||
41 | enum led_brightness value) | ||
42 | { | ||
43 | struct adp5520_led *led; | ||
44 | |||
45 | led = container_of(led_cdev, struct adp5520_led, cdev); | ||
46 | led->new_brightness = value; | ||
47 | schedule_work(&led->work); | ||
48 | } | ||
49 | |||
50 | static int adp5520_led_setup(struct adp5520_led *led) | ||
51 | { | ||
52 | struct device *dev = led->master; | ||
53 | int flags = led->flags; | ||
54 | int ret = 0; | ||
55 | |||
56 | switch (led->id) { | ||
57 | case FLAG_ID_ADP5520_LED1_ADP5501_LED0: | ||
58 | ret |= adp5520_set_bits(dev, ADP5520_LED_TIME, | ||
59 | (flags >> ADP5520_FLAG_OFFT_SHIFT) & | ||
60 | ADP5520_FLAG_OFFT_MASK); | ||
61 | ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL, | ||
62 | ADP5520_LED1_EN); | ||
63 | break; | ||
64 | case FLAG_ID_ADP5520_LED2_ADP5501_LED1: | ||
65 | ret |= adp5520_set_bits(dev, ADP5520_LED_TIME, | ||
66 | ((flags >> ADP5520_FLAG_OFFT_SHIFT) & | ||
67 | ADP5520_FLAG_OFFT_MASK) << 2); | ||
68 | ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL, | ||
69 | ADP5520_R3_MODE); | ||
70 | ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL, | ||
71 | ADP5520_LED2_EN); | ||
72 | break; | ||
73 | case FLAG_ID_ADP5520_LED3_ADP5501_LED2: | ||
74 | ret |= adp5520_set_bits(dev, ADP5520_LED_TIME, | ||
75 | ((flags >> ADP5520_FLAG_OFFT_SHIFT) & | ||
76 | ADP5520_FLAG_OFFT_MASK) << 4); | ||
77 | ret |= adp5520_clr_bits(dev, ADP5520_LED_CONTROL, | ||
78 | ADP5520_C3_MODE); | ||
79 | ret |= adp5520_set_bits(dev, ADP5520_LED_CONTROL, | ||
80 | ADP5520_LED3_EN); | ||
81 | break; | ||
82 | } | ||
83 | |||
84 | return ret; | ||
85 | } | ||
86 | |||
87 | static int __devinit adp5520_led_prepare(struct platform_device *pdev) | ||
88 | { | ||
89 | struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data; | ||
90 | struct device *dev = pdev->dev.parent; | ||
91 | int ret = 0; | ||
92 | |||
93 | ret |= adp5520_write(dev, ADP5520_LED1_CURRENT, 0); | ||
94 | ret |= adp5520_write(dev, ADP5520_LED2_CURRENT, 0); | ||
95 | ret |= adp5520_write(dev, ADP5520_LED3_CURRENT, 0); | ||
96 | ret |= adp5520_write(dev, ADP5520_LED_TIME, pdata->led_on_time << 6); | ||
97 | ret |= adp5520_write(dev, ADP5520_LED_FADE, FADE_VAL(pdata->fade_in, | ||
98 | pdata->fade_out)); | ||
99 | |||
100 | return ret; | ||
101 | } | ||
102 | |||
103 | static int __devinit adp5520_led_probe(struct platform_device *pdev) | ||
104 | { | ||
105 | struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data; | ||
106 | struct adp5520_led *led, *led_dat; | ||
107 | struct led_info *cur_led; | ||
108 | int ret, i; | ||
109 | |||
110 | if (pdata == NULL) { | ||
111 | dev_err(&pdev->dev, "missing platform data\n"); | ||
112 | return -ENODEV; | ||
113 | } | ||
114 | |||
115 | if (pdata->num_leds > ADP5520_01_MAXLEDS) { | ||
116 | dev_err(&pdev->dev, "can't handle more than %d LEDS\n", | ||
117 | ADP5520_01_MAXLEDS); | ||
118 | return -EFAULT; | ||
119 | } | ||
120 | |||
121 | led = kzalloc(sizeof(*led) * pdata->num_leds, GFP_KERNEL); | ||
122 | if (led == NULL) { | ||
123 | dev_err(&pdev->dev, "failed to alloc memory\n"); | ||
124 | return -ENOMEM; | ||
125 | } | ||
126 | |||
127 | ret = adp5520_led_prepare(pdev); | ||
128 | |||
129 | if (ret) { | ||
130 | dev_err(&pdev->dev, "failed to write\n"); | ||
131 | goto err_free; | ||
132 | } | ||
133 | |||
134 | for (i = 0; i < pdata->num_leds; ++i) { | ||
135 | cur_led = &pdata->leds[i]; | ||
136 | led_dat = &led[i]; | ||
137 | |||
138 | led_dat->cdev.name = cur_led->name; | ||
139 | led_dat->cdev.default_trigger = cur_led->default_trigger; | ||
140 | led_dat->cdev.brightness_set = adp5520_led_set; | ||
141 | led_dat->cdev.brightness = LED_OFF; | ||
142 | |||
143 | if (cur_led->flags & ADP5520_FLAG_LED_MASK) | ||
144 | led_dat->flags = cur_led->flags; | ||
145 | else | ||
146 | led_dat->flags = i + 1; | ||
147 | |||
148 | led_dat->id = led_dat->flags & ADP5520_FLAG_LED_MASK; | ||
149 | |||
150 | led_dat->master = pdev->dev.parent; | ||
151 | led_dat->new_brightness = LED_OFF; | ||
152 | |||
153 | INIT_WORK(&led_dat->work, adp5520_led_work); | ||
154 | |||
155 | ret = led_classdev_register(led_dat->master, &led_dat->cdev); | ||
156 | if (ret) { | ||
157 | dev_err(&pdev->dev, "failed to register LED %d\n", | ||
158 | led_dat->id); | ||
159 | goto err; | ||
160 | } | ||
161 | |||
162 | ret = adp5520_led_setup(led_dat); | ||
163 | if (ret) { | ||
164 | dev_err(&pdev->dev, "failed to write\n"); | ||
165 | i++; | ||
166 | goto err; | ||
167 | } | ||
168 | } | ||
169 | |||
170 | platform_set_drvdata(pdev, led); | ||
171 | return 0; | ||
172 | |||
173 | err: | ||
174 | if (i > 0) { | ||
175 | for (i = i - 1; i >= 0; i--) { | ||
176 | led_classdev_unregister(&led[i].cdev); | ||
177 | cancel_work_sync(&led[i].work); | ||
178 | } | ||
179 | } | ||
180 | |||
181 | err_free: | ||
182 | kfree(led); | ||
183 | return ret; | ||
184 | } | ||
185 | |||
186 | static int __devexit adp5520_led_remove(struct platform_device *pdev) | ||
187 | { | ||
188 | struct adp5520_leds_platform_data *pdata = pdev->dev.platform_data; | ||
189 | struct adp5520_led *led; | ||
190 | int i; | ||
191 | |||
192 | led = platform_get_drvdata(pdev); | ||
193 | |||
194 | adp5520_clr_bits(led->master, ADP5520_LED_CONTROL, | ||
195 | ADP5520_LED1_EN | ADP5520_LED2_EN | ADP5520_LED3_EN); | ||
196 | |||
197 | for (i = 0; i < pdata->num_leds; i++) { | ||
198 | led_classdev_unregister(&led[i].cdev); | ||
199 | cancel_work_sync(&led[i].work); | ||
200 | } | ||
201 | |||
202 | kfree(led); | ||
203 | return 0; | ||
204 | } | ||
205 | |||
206 | static struct platform_driver adp5520_led_driver = { | ||
207 | .driver = { | ||
208 | .name = "adp5520-led", | ||
209 | .owner = THIS_MODULE, | ||
210 | }, | ||
211 | .probe = adp5520_led_probe, | ||
212 | .remove = __devexit_p(adp5520_led_remove), | ||
213 | }; | ||
214 | |||
215 | static int __init adp5520_led_init(void) | ||
216 | { | ||
217 | return platform_driver_register(&adp5520_led_driver); | ||
218 | } | ||
219 | module_init(adp5520_led_init); | ||
220 | |||
221 | static void __exit adp5520_led_exit(void) | ||
222 | { | ||
223 | platform_driver_unregister(&adp5520_led_driver); | ||
224 | } | ||
225 | module_exit(adp5520_led_exit); | ||
226 | |||
227 | MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>"); | ||
228 | MODULE_DESCRIPTION("LEDS ADP5520(01) Driver"); | ||
229 | MODULE_LICENSE("GPL"); | ||
230 | MODULE_ALIAS("platform:adp5520-led"); | ||
diff --git a/drivers/leds/leds-alix2.c b/drivers/leds/leds-alix2.c index 731d4eef3425..f59ffadf5125 100644 --- a/drivers/leds/leds-alix2.c +++ b/drivers/leds/leds-alix2.c | |||
@@ -11,11 +11,24 @@ | |||
11 | #include <linux/module.h> | 11 | #include <linux/module.h> |
12 | #include <linux/platform_device.h> | 12 | #include <linux/platform_device.h> |
13 | #include <linux/string.h> | 13 | #include <linux/string.h> |
14 | #include <linux/pci.h> | ||
14 | 15 | ||
15 | static int force = 0; | 16 | static int force = 0; |
16 | module_param(force, bool, 0444); | 17 | module_param(force, bool, 0444); |
17 | MODULE_PARM_DESC(force, "Assume system has ALIX.2/ALIX.3 style LEDs"); | 18 | MODULE_PARM_DESC(force, "Assume system has ALIX.2/ALIX.3 style LEDs"); |
18 | 19 | ||
20 | #define MSR_LBAR_GPIO 0x5140000C | ||
21 | #define CS5535_GPIO_SIZE 256 | ||
22 | |||
23 | static u32 gpio_base; | ||
24 | |||
25 | static struct pci_device_id divil_pci[] = { | ||
26 | { PCI_DEVICE(PCI_VENDOR_ID_NS, PCI_DEVICE_ID_NS_CS5535_ISA) }, | ||
27 | { PCI_DEVICE(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_CS5536_ISA) }, | ||
28 | { } /* NULL entry */ | ||
29 | }; | ||
30 | MODULE_DEVICE_TABLE(pci, divil_pci); | ||
31 | |||
19 | struct alix_led { | 32 | struct alix_led { |
20 | struct led_classdev cdev; | 33 | struct led_classdev cdev; |
21 | unsigned short port; | 34 | unsigned short port; |
@@ -30,9 +43,9 @@ static void alix_led_set(struct led_classdev *led_cdev, | |||
30 | container_of(led_cdev, struct alix_led, cdev); | 43 | container_of(led_cdev, struct alix_led, cdev); |
31 | 44 | ||
32 | if (brightness) | 45 | if (brightness) |
33 | outl(led_dev->on_value, led_dev->port); | 46 | outl(led_dev->on_value, gpio_base + led_dev->port); |
34 | else | 47 | else |
35 | outl(led_dev->off_value, led_dev->port); | 48 | outl(led_dev->off_value, gpio_base + led_dev->port); |
36 | } | 49 | } |
37 | 50 | ||
38 | static struct alix_led alix_leds[] = { | 51 | static struct alix_led alix_leds[] = { |
@@ -41,7 +54,7 @@ static struct alix_led alix_leds[] = { | |||
41 | .name = "alix:1", | 54 | .name = "alix:1", |
42 | .brightness_set = alix_led_set, | 55 | .brightness_set = alix_led_set, |
43 | }, | 56 | }, |
44 | .port = 0x6100, | 57 | .port = 0x00, |
45 | .on_value = 1 << 22, | 58 | .on_value = 1 << 22, |
46 | .off_value = 1 << 6, | 59 | .off_value = 1 << 6, |
47 | }, | 60 | }, |
@@ -50,7 +63,7 @@ static struct alix_led alix_leds[] = { | |||
50 | .name = "alix:2", | 63 | .name = "alix:2", |
51 | .brightness_set = alix_led_set, | 64 | .brightness_set = alix_led_set, |
52 | }, | 65 | }, |
53 | .port = 0x6180, | 66 | .port = 0x80, |
54 | .on_value = 1 << 25, | 67 | .on_value = 1 << 25, |
55 | .off_value = 1 << 9, | 68 | .off_value = 1 << 9, |
56 | }, | 69 | }, |
@@ -59,7 +72,7 @@ static struct alix_led alix_leds[] = { | |||
59 | .name = "alix:3", | 72 | .name = "alix:3", |
60 | .brightness_set = alix_led_set, | 73 | .brightness_set = alix_led_set, |
61 | }, | 74 | }, |
62 | .port = 0x6180, | 75 | .port = 0x80, |
63 | .on_value = 1 << 27, | 76 | .on_value = 1 << 27, |
64 | .off_value = 1 << 11, | 77 | .off_value = 1 << 11, |
65 | }, | 78 | }, |
@@ -101,64 +114,104 @@ static struct platform_driver alix_led_driver = { | |||
101 | }, | 114 | }, |
102 | }; | 115 | }; |
103 | 116 | ||
104 | static int __init alix_present(void) | 117 | static int __init alix_present(unsigned long bios_phys, |
118 | const char *alix_sig, | ||
119 | size_t alix_sig_len) | ||
105 | { | 120 | { |
106 | const unsigned long bios_phys = 0x000f0000; | ||
107 | const size_t bios_len = 0x00010000; | 121 | const size_t bios_len = 0x00010000; |
108 | const char alix_sig[] = "PC Engines ALIX."; | ||
109 | const size_t alix_sig_len = sizeof(alix_sig) - 1; | ||
110 | |||
111 | const char *bios_virt; | 122 | const char *bios_virt; |
112 | const char *scan_end; | 123 | const char *scan_end; |
113 | const char *p; | 124 | const char *p; |
114 | int ret = 0; | 125 | char name[64]; |
115 | 126 | ||
116 | if (force) { | 127 | if (force) { |
117 | printk(KERN_NOTICE "%s: forced to skip BIOS test, " | 128 | printk(KERN_NOTICE "%s: forced to skip BIOS test, " |
118 | "assume system has ALIX.2 style LEDs\n", | 129 | "assume system has ALIX.2 style LEDs\n", |
119 | KBUILD_MODNAME); | 130 | KBUILD_MODNAME); |
120 | ret = 1; | 131 | return 1; |
121 | goto out; | ||
122 | } | 132 | } |
123 | 133 | ||
124 | bios_virt = phys_to_virt(bios_phys); | 134 | bios_virt = phys_to_virt(bios_phys); |
125 | scan_end = bios_virt + bios_len - (alix_sig_len + 2); | 135 | scan_end = bios_virt + bios_len - (alix_sig_len + 2); |
126 | for (p = bios_virt; p < scan_end; p++) { | 136 | for (p = bios_virt; p < scan_end; p++) { |
127 | const char *tail; | 137 | const char *tail; |
138 | char *a; | ||
128 | 139 | ||
129 | if (memcmp(p, alix_sig, alix_sig_len) != 0) { | 140 | if (memcmp(p, alix_sig, alix_sig_len) != 0) |
130 | continue; | 141 | continue; |
131 | } | 142 | |
143 | memcpy(name, p, sizeof(name)); | ||
144 | |||
145 | /* remove the first \0 character from string */ | ||
146 | a = strchr(name, '\0'); | ||
147 | if (a) | ||
148 | *a = ' '; | ||
149 | |||
150 | /* cut the string at a newline */ | ||
151 | a = strchr(name, '\r'); | ||
152 | if (a) | ||
153 | *a = '\0'; | ||
132 | 154 | ||
133 | tail = p + alix_sig_len; | 155 | tail = p + alix_sig_len; |
134 | if ((tail[0] == '2' || tail[0] == '3') && tail[1] == '\0') { | 156 | if ((tail[0] == '2' || tail[0] == '3')) { |
135 | printk(KERN_INFO | 157 | printk(KERN_INFO |
136 | "%s: system is recognized as \"%s\"\n", | 158 | "%s: system is recognized as \"%s\"\n", |
137 | KBUILD_MODNAME, p); | 159 | KBUILD_MODNAME, name); |
138 | ret = 1; | 160 | return 1; |
139 | break; | ||
140 | } | 161 | } |
141 | } | 162 | } |
142 | 163 | ||
143 | out: | 164 | return 0; |
144 | return ret; | ||
145 | } | 165 | } |
146 | 166 | ||
147 | static struct platform_device *pdev; | 167 | static struct platform_device *pdev; |
148 | 168 | ||
149 | static int __init alix_led_init(void) | 169 | static int __init alix_pci_led_init(void) |
150 | { | 170 | { |
151 | int ret; | 171 | u32 low, hi; |
152 | 172 | ||
153 | if (!alix_present()) { | 173 | if (pci_dev_present(divil_pci) == 0) { |
154 | ret = -ENODEV; | 174 | printk(KERN_WARNING KBUILD_MODNAME": DIVIL not found\n"); |
155 | goto out; | 175 | return -ENODEV; |
156 | } | 176 | } |
157 | 177 | ||
158 | /* enable output on GPIO for LED 1,2,3 */ | 178 | /* Grab the GPIO I/O range */ |
159 | outl(1 << 6, 0x6104); | 179 | rdmsr(MSR_LBAR_GPIO, low, hi); |
160 | outl(1 << 9, 0x6184); | 180 | |
161 | outl(1 << 11, 0x6184); | 181 | /* Check the mask and whether GPIO is enabled (sanity check) */ |
182 | if (hi != 0x0000f001) { | ||
183 | printk(KERN_WARNING KBUILD_MODNAME": GPIO not enabled\n"); | ||
184 | return -ENODEV; | ||
185 | } | ||
186 | |||
187 | /* Mask off the IO base address */ | ||
188 | gpio_base = low & 0x0000ff00; | ||
189 | |||
190 | if (!request_region(gpio_base, CS5535_GPIO_SIZE, KBUILD_MODNAME)) { | ||
191 | printk(KERN_ERR KBUILD_MODNAME": can't allocate I/O for GPIO\n"); | ||
192 | return -ENODEV; | ||
193 | } | ||
194 | |||
195 | /* Set GPIO function to output */ | ||
196 | outl(1 << 6, gpio_base + 0x04); | ||
197 | outl(1 << 9, gpio_base + 0x84); | ||
198 | outl(1 << 11, gpio_base + 0x84); | ||
199 | |||
200 | return 0; | ||
201 | } | ||
202 | |||
203 | static int __init alix_led_init(void) | ||
204 | { | ||
205 | int ret = -ENODEV; | ||
206 | const char tinybios_sig[] = "PC Engines ALIX."; | ||
207 | const char coreboot_sig[] = "PC Engines\0ALIX."; | ||
208 | |||
209 | if (alix_present(0xf0000, tinybios_sig, sizeof(tinybios_sig) - 1) || | ||
210 | alix_present(0x500, coreboot_sig, sizeof(coreboot_sig) - 1)) | ||
211 | ret = alix_pci_led_init(); | ||
212 | |||
213 | if (ret < 0) | ||
214 | return ret; | ||
162 | 215 | ||
163 | pdev = platform_device_register_simple(KBUILD_MODNAME, -1, NULL, 0); | 216 | pdev = platform_device_register_simple(KBUILD_MODNAME, -1, NULL, 0); |
164 | if (!IS_ERR(pdev)) { | 217 | if (!IS_ERR(pdev)) { |
@@ -168,7 +221,6 @@ static int __init alix_led_init(void) | |||
168 | } else | 221 | } else |
169 | ret = PTR_ERR(pdev); | 222 | ret = PTR_ERR(pdev); |
170 | 223 | ||
171 | out: | ||
172 | return ret; | 224 | return ret; |
173 | } | 225 | } |
174 | 226 | ||
@@ -176,6 +228,7 @@ static void __exit alix_led_exit(void) | |||
176 | { | 228 | { |
177 | platform_device_unregister(pdev); | 229 | platform_device_unregister(pdev); |
178 | platform_driver_unregister(&alix_led_driver); | 230 | platform_driver_unregister(&alix_led_driver); |
231 | release_region(gpio_base, CS5535_GPIO_SIZE); | ||
179 | } | 232 | } |
180 | 233 | ||
181 | module_init(alix_led_init); | 234 | module_init(alix_led_init); |
diff --git a/drivers/leds/leds-cobalt-qube.c b/drivers/leds/leds-cobalt-qube.c index 8816806accd2..da5fb016b1a5 100644 --- a/drivers/leds/leds-cobalt-qube.c +++ b/drivers/leds/leds-cobalt-qube.c | |||
@@ -31,7 +31,7 @@ static struct led_classdev qube_front_led = { | |||
31 | .name = "qube::front", | 31 | .name = "qube::front", |
32 | .brightness = LED_FULL, | 32 | .brightness = LED_FULL, |
33 | .brightness_set = qube_front_led_set, | 33 | .brightness_set = qube_front_led_set, |
34 | .default_trigger = "ide-disk", | 34 | .default_trigger = "default-on", |
35 | }; | 35 | }; |
36 | 36 | ||
37 | static int __devinit cobalt_qube_led_probe(struct platform_device *pdev) | 37 | static int __devinit cobalt_qube_led_probe(struct platform_device *pdev) |
@@ -43,7 +43,7 @@ static int __devinit cobalt_qube_led_probe(struct platform_device *pdev) | |||
43 | if (!res) | 43 | if (!res) |
44 | return -EBUSY; | 44 | return -EBUSY; |
45 | 45 | ||
46 | led_port = ioremap(res->start, res->end - res->start + 1); | 46 | led_port = ioremap(res->start, resource_size(res)); |
47 | if (!led_port) | 47 | if (!led_port) |
48 | return -ENOMEM; | 48 | return -ENOMEM; |
49 | 49 | ||
diff --git a/drivers/leds/leds-cobalt-raq.c b/drivers/leds/leds-cobalt-raq.c index defc212105f3..438d48384636 100644 --- a/drivers/leds/leds-cobalt-raq.c +++ b/drivers/leds/leds-cobalt-raq.c | |||
@@ -84,7 +84,7 @@ static int __devinit cobalt_raq_led_probe(struct platform_device *pdev) | |||
84 | if (!res) | 84 | if (!res) |
85 | return -EBUSY; | 85 | return -EBUSY; |
86 | 86 | ||
87 | led_port = ioremap(res->start, res->end - res->start + 1); | 87 | led_port = ioremap(res->start, resource_size(res)); |
88 | if (!led_port) | 88 | if (!led_port) |
89 | return -ENOMEM; | 89 | return -ENOMEM; |
90 | 90 | ||
diff --git a/drivers/leds/leds-lt3593.c b/drivers/leds/leds-lt3593.c new file mode 100644 index 000000000000..fee40a841959 --- /dev/null +++ b/drivers/leds/leds-lt3593.c | |||
@@ -0,0 +1,217 @@ | |||
1 | /* | ||
2 | * LEDs driver for LT3593 controllers | ||
3 | * | ||
4 | * See the datasheet at http://cds.linear.com/docs/Datasheet/3593f.pdf | ||
5 | * | ||
6 | * Copyright (c) 2009 Daniel Mack <daniel@caiaq.de> | ||
7 | * | ||
8 | * Based on leds-gpio.c, | ||
9 | * | ||
10 | * Copyright (C) 2007 8D Technologies inc. | ||
11 | * Raphael Assenat <raph@8d.com> | ||
12 | * Copyright (C) 2008 Freescale Semiconductor, Inc. | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify | ||
15 | * it under the terms of the GNU General Public License version 2 as | ||
16 | * published by the Free Software Foundation. | ||
17 | */ | ||
18 | |||
19 | #include <linux/kernel.h> | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/platform_device.h> | ||
22 | #include <linux/leds.h> | ||
23 | #include <linux/workqueue.h> | ||
24 | #include <linux/delay.h> | ||
25 | #include <linux/gpio.h> | ||
26 | |||
27 | struct lt3593_led_data { | ||
28 | struct led_classdev cdev; | ||
29 | unsigned gpio; | ||
30 | struct work_struct work; | ||
31 | u8 new_level; | ||
32 | }; | ||
33 | |||
34 | static void lt3593_led_work(struct work_struct *work) | ||
35 | { | ||
36 | int pulses; | ||
37 | struct lt3593_led_data *led_dat = | ||
38 | container_of(work, struct lt3593_led_data, work); | ||
39 | |||
40 | /* | ||
41 | * The LT3593 resets its internal current level register to the maximum | ||
42 | * level on the first falling edge on the control pin. Each following | ||
43 | * falling edge decreases the current level by 625uA. Up to 32 pulses | ||
44 | * can be sent, so the maximum power reduction is 20mA. | ||
45 | * After a timeout of 128us, the value is taken from the register and | ||
46 | * applied is to the output driver. | ||
47 | */ | ||
48 | |||
49 | if (led_dat->new_level == 0) { | ||
50 | gpio_set_value_cansleep(led_dat->gpio, 0); | ||
51 | return; | ||
52 | } | ||
53 | |||
54 | pulses = 32 - (led_dat->new_level * 32) / 255; | ||
55 | |||
56 | if (pulses == 0) { | ||
57 | gpio_set_value_cansleep(led_dat->gpio, 0); | ||
58 | mdelay(1); | ||
59 | gpio_set_value_cansleep(led_dat->gpio, 1); | ||
60 | return; | ||
61 | } | ||
62 | |||
63 | gpio_set_value_cansleep(led_dat->gpio, 1); | ||
64 | |||
65 | while (pulses--) { | ||
66 | gpio_set_value_cansleep(led_dat->gpio, 0); | ||
67 | udelay(1); | ||
68 | gpio_set_value_cansleep(led_dat->gpio, 1); | ||
69 | udelay(1); | ||
70 | } | ||
71 | } | ||
72 | |||
73 | static void lt3593_led_set(struct led_classdev *led_cdev, | ||
74 | enum led_brightness value) | ||
75 | { | ||
76 | struct lt3593_led_data *led_dat = | ||
77 | container_of(led_cdev, struct lt3593_led_data, cdev); | ||
78 | |||
79 | led_dat->new_level = value; | ||
80 | schedule_work(&led_dat->work); | ||
81 | } | ||
82 | |||
83 | static int __devinit create_lt3593_led(const struct gpio_led *template, | ||
84 | struct lt3593_led_data *led_dat, struct device *parent) | ||
85 | { | ||
86 | int ret, state; | ||
87 | |||
88 | /* skip leds on GPIOs that aren't available */ | ||
89 | if (!gpio_is_valid(template->gpio)) { | ||
90 | printk(KERN_INFO "%s: skipping unavailable LT3593 LED at gpio %d (%s)\n", | ||
91 | KBUILD_MODNAME, template->gpio, template->name); | ||
92 | return 0; | ||
93 | } | ||
94 | |||
95 | ret = gpio_request(template->gpio, template->name); | ||
96 | if (ret < 0) | ||
97 | return ret; | ||
98 | |||
99 | led_dat->cdev.name = template->name; | ||
100 | led_dat->cdev.default_trigger = template->default_trigger; | ||
101 | led_dat->gpio = template->gpio; | ||
102 | |||
103 | led_dat->cdev.brightness_set = lt3593_led_set; | ||
104 | |||
105 | state = (template->default_state == LEDS_GPIO_DEFSTATE_ON); | ||
106 | led_dat->cdev.brightness = state ? LED_FULL : LED_OFF; | ||
107 | |||
108 | if (!template->retain_state_suspended) | ||
109 | led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME; | ||
110 | |||
111 | ret = gpio_direction_output(led_dat->gpio, state); | ||
112 | if (ret < 0) | ||
113 | goto err; | ||
114 | |||
115 | INIT_WORK(&led_dat->work, lt3593_led_work); | ||
116 | |||
117 | ret = led_classdev_register(parent, &led_dat->cdev); | ||
118 | if (ret < 0) | ||
119 | goto err; | ||
120 | |||
121 | printk(KERN_INFO "%s: registered LT3593 LED '%s' at GPIO %d\n", | ||
122 | KBUILD_MODNAME, template->name, template->gpio); | ||
123 | |||
124 | return 0; | ||
125 | |||
126 | err: | ||
127 | gpio_free(led_dat->gpio); | ||
128 | return ret; | ||
129 | } | ||
130 | |||
131 | static void delete_lt3593_led(struct lt3593_led_data *led) | ||
132 | { | ||
133 | if (!gpio_is_valid(led->gpio)) | ||
134 | return; | ||
135 | |||
136 | led_classdev_unregister(&led->cdev); | ||
137 | cancel_work_sync(&led->work); | ||
138 | gpio_free(led->gpio); | ||
139 | } | ||
140 | |||
141 | static int __devinit lt3593_led_probe(struct platform_device *pdev) | ||
142 | { | ||
143 | struct gpio_led_platform_data *pdata = pdev->dev.platform_data; | ||
144 | struct lt3593_led_data *leds_data; | ||
145 | int i, ret = 0; | ||
146 | |||
147 | if (!pdata) | ||
148 | return -EBUSY; | ||
149 | |||
150 | leds_data = kzalloc(sizeof(struct lt3593_led_data) * pdata->num_leds, | ||
151 | GFP_KERNEL); | ||
152 | if (!leds_data) | ||
153 | return -ENOMEM; | ||
154 | |||
155 | for (i = 0; i < pdata->num_leds; i++) { | ||
156 | ret = create_lt3593_led(&pdata->leds[i], &leds_data[i], | ||
157 | &pdev->dev); | ||
158 | if (ret < 0) | ||
159 | goto err; | ||
160 | } | ||
161 | |||
162 | platform_set_drvdata(pdev, leds_data); | ||
163 | |||
164 | return 0; | ||
165 | |||
166 | err: | ||
167 | for (i = i - 1; i >= 0; i--) | ||
168 | delete_lt3593_led(&leds_data[i]); | ||
169 | |||
170 | kfree(leds_data); | ||
171 | |||
172 | return ret; | ||
173 | } | ||
174 | |||
175 | static int __devexit lt3593_led_remove(struct platform_device *pdev) | ||
176 | { | ||
177 | int i; | ||
178 | struct gpio_led_platform_data *pdata = pdev->dev.platform_data; | ||
179 | struct lt3593_led_data *leds_data; | ||
180 | |||
181 | leds_data = platform_get_drvdata(pdev); | ||
182 | |||
183 | for (i = 0; i < pdata->num_leds; i++) | ||
184 | delete_lt3593_led(&leds_data[i]); | ||
185 | |||
186 | kfree(leds_data); | ||
187 | |||
188 | return 0; | ||
189 | } | ||
190 | |||
191 | static struct platform_driver lt3593_led_driver = { | ||
192 | .probe = lt3593_led_probe, | ||
193 | .remove = __devexit_p(lt3593_led_remove), | ||
194 | .driver = { | ||
195 | .name = "leds-lt3593", | ||
196 | .owner = THIS_MODULE, | ||
197 | }, | ||
198 | }; | ||
199 | |||
200 | MODULE_ALIAS("platform:leds-lt3593"); | ||
201 | |||
202 | static int __init lt3593_led_init(void) | ||
203 | { | ||
204 | return platform_driver_register(<3593_led_driver); | ||
205 | } | ||
206 | |||
207 | static void __exit lt3593_led_exit(void) | ||
208 | { | ||
209 | platform_driver_unregister(<3593_led_driver); | ||
210 | } | ||
211 | |||
212 | module_init(lt3593_led_init); | ||
213 | module_exit(lt3593_led_exit); | ||
214 | |||
215 | MODULE_AUTHOR("Daniel Mack <daniel@caiaq.de>"); | ||
216 | MODULE_DESCRIPTION("LED driver for LT3593 controllers"); | ||
217 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/leds/leds-pwm.c b/drivers/leds/leds-pwm.c index cdfdc8714e10..88b1dd091cfb 100644 --- a/drivers/leds/leds-pwm.c +++ b/drivers/leds/leds-pwm.c | |||
@@ -27,7 +27,6 @@ struct led_pwm_data { | |||
27 | struct pwm_device *pwm; | 27 | struct pwm_device *pwm; |
28 | unsigned int active_low; | 28 | unsigned int active_low; |
29 | unsigned int period; | 29 | unsigned int period; |
30 | unsigned int max_brightness; | ||
31 | }; | 30 | }; |
32 | 31 | ||
33 | static void led_pwm_set(struct led_classdev *led_cdev, | 32 | static void led_pwm_set(struct led_classdev *led_cdev, |
@@ -35,7 +34,7 @@ static void led_pwm_set(struct led_classdev *led_cdev, | |||
35 | { | 34 | { |
36 | struct led_pwm_data *led_dat = | 35 | struct led_pwm_data *led_dat = |
37 | container_of(led_cdev, struct led_pwm_data, cdev); | 36 | container_of(led_cdev, struct led_pwm_data, cdev); |
38 | unsigned int max = led_dat->max_brightness; | 37 | unsigned int max = led_dat->cdev.max_brightness; |
39 | unsigned int period = led_dat->period; | 38 | unsigned int period = led_dat->period; |
40 | 39 | ||
41 | if (brightness == 0) { | 40 | if (brightness == 0) { |
@@ -77,10 +76,10 @@ static int led_pwm_probe(struct platform_device *pdev) | |||
77 | led_dat->cdev.name = cur_led->name; | 76 | led_dat->cdev.name = cur_led->name; |
78 | led_dat->cdev.default_trigger = cur_led->default_trigger; | 77 | led_dat->cdev.default_trigger = cur_led->default_trigger; |
79 | led_dat->active_low = cur_led->active_low; | 78 | led_dat->active_low = cur_led->active_low; |
80 | led_dat->max_brightness = cur_led->max_brightness; | ||
81 | led_dat->period = cur_led->pwm_period_ns; | 79 | led_dat->period = cur_led->pwm_period_ns; |
82 | led_dat->cdev.brightness_set = led_pwm_set; | 80 | led_dat->cdev.brightness_set = led_pwm_set; |
83 | led_dat->cdev.brightness = LED_OFF; | 81 | led_dat->cdev.brightness = LED_OFF; |
82 | led_dat->cdev.max_brightness = cur_led->max_brightness; | ||
84 | led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME; | 83 | led_dat->cdev.flags |= LED_CORE_SUSPENDRESUME; |
85 | 84 | ||
86 | ret = led_classdev_register(&pdev->dev, &led_dat->cdev); | 85 | ret = led_classdev_register(&pdev->dev, &led_dat->cdev); |
diff --git a/drivers/leds/leds-regulator.c b/drivers/leds/leds-regulator.c new file mode 100644 index 000000000000..7f00de3ef922 --- /dev/null +++ b/drivers/leds/leds-regulator.c | |||
@@ -0,0 +1,242 @@ | |||
1 | /* | ||
2 | * leds-regulator.c - LED class driver for regulator driven LEDs. | ||
3 | * | ||
4 | * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it> | ||
5 | * | ||
6 | * Inspired by leds-wm8350 driver. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | * | ||
12 | */ | ||
13 | |||
14 | #include <linux/module.h> | ||
15 | #include <linux/err.h> | ||
16 | #include <linux/workqueue.h> | ||
17 | #include <linux/leds.h> | ||
18 | #include <linux/leds-regulator.h> | ||
19 | #include <linux/platform_device.h> | ||
20 | #include <linux/regulator/consumer.h> | ||
21 | |||
22 | #define to_regulator_led(led_cdev) \ | ||
23 | container_of(led_cdev, struct regulator_led, cdev) | ||
24 | |||
25 | struct regulator_led { | ||
26 | struct led_classdev cdev; | ||
27 | enum led_brightness value; | ||
28 | int enabled; | ||
29 | struct mutex mutex; | ||
30 | struct work_struct work; | ||
31 | |||
32 | struct regulator *vcc; | ||
33 | }; | ||
34 | |||
35 | static inline int led_regulator_get_max_brightness(struct regulator *supply) | ||
36 | { | ||
37 | int ret; | ||
38 | int voltage = regulator_list_voltage(supply, 0); | ||
39 | |||
40 | if (voltage <= 0) | ||
41 | return 1; | ||
42 | |||
43 | /* even if regulator can't change voltages, | ||
44 | * we still assume it can change status | ||
45 | * and the LED can be turned on and off. | ||
46 | */ | ||
47 | ret = regulator_set_voltage(supply, voltage, voltage); | ||
48 | if (ret < 0) | ||
49 | return 1; | ||
50 | |||
51 | return regulator_count_voltages(supply); | ||
52 | } | ||
53 | |||
54 | static int led_regulator_get_voltage(struct regulator *supply, | ||
55 | enum led_brightness brightness) | ||
56 | { | ||
57 | if (brightness == 0) | ||
58 | return -EINVAL; | ||
59 | |||
60 | return regulator_list_voltage(supply, brightness - 1); | ||
61 | } | ||
62 | |||
63 | |||
64 | static void regulator_led_enable(struct regulator_led *led) | ||
65 | { | ||
66 | int ret; | ||
67 | |||
68 | if (led->enabled) | ||
69 | return; | ||
70 | |||
71 | ret = regulator_enable(led->vcc); | ||
72 | if (ret != 0) { | ||
73 | dev_err(led->cdev.dev, "Failed to enable vcc: %d\n", ret); | ||
74 | return; | ||
75 | } | ||
76 | |||
77 | led->enabled = 1; | ||
78 | } | ||
79 | |||
80 | static void regulator_led_disable(struct regulator_led *led) | ||
81 | { | ||
82 | int ret; | ||
83 | |||
84 | if (!led->enabled) | ||
85 | return; | ||
86 | |||
87 | ret = regulator_disable(led->vcc); | ||
88 | if (ret != 0) { | ||
89 | dev_err(led->cdev.dev, "Failed to disable vcc: %d\n", ret); | ||
90 | return; | ||
91 | } | ||
92 | |||
93 | led->enabled = 0; | ||
94 | } | ||
95 | |||
96 | static void regulator_led_set_value(struct regulator_led *led) | ||
97 | { | ||
98 | int voltage; | ||
99 | int ret; | ||
100 | |||
101 | mutex_lock(&led->mutex); | ||
102 | |||
103 | if (led->value == LED_OFF) { | ||
104 | regulator_led_disable(led); | ||
105 | goto out; | ||
106 | } | ||
107 | |||
108 | if (led->cdev.max_brightness > 1) { | ||
109 | voltage = led_regulator_get_voltage(led->vcc, led->value); | ||
110 | dev_dbg(led->cdev.dev, "brightness: %d voltage: %d\n", | ||
111 | led->value, voltage); | ||
112 | |||
113 | ret = regulator_set_voltage(led->vcc, voltage, voltage); | ||
114 | if (ret != 0) | ||
115 | dev_err(led->cdev.dev, "Failed to set voltage %d: %d\n", | ||
116 | voltage, ret); | ||
117 | } | ||
118 | |||
119 | regulator_led_enable(led); | ||
120 | |||
121 | out: | ||
122 | mutex_unlock(&led->mutex); | ||
123 | } | ||
124 | |||
125 | static void led_work(struct work_struct *work) | ||
126 | { | ||
127 | struct regulator_led *led; | ||
128 | |||
129 | led = container_of(work, struct regulator_led, work); | ||
130 | regulator_led_set_value(led); | ||
131 | } | ||
132 | |||
133 | static void regulator_led_brightness_set(struct led_classdev *led_cdev, | ||
134 | enum led_brightness value) | ||
135 | { | ||
136 | struct regulator_led *led = to_regulator_led(led_cdev); | ||
137 | |||
138 | led->value = value; | ||
139 | schedule_work(&led->work); | ||
140 | } | ||
141 | |||
142 | static int __devinit regulator_led_probe(struct platform_device *pdev) | ||
143 | { | ||
144 | struct led_regulator_platform_data *pdata = pdev->dev.platform_data; | ||
145 | struct regulator_led *led; | ||
146 | struct regulator *vcc; | ||
147 | int ret = 0; | ||
148 | |||
149 | if (pdata == NULL) { | ||
150 | dev_err(&pdev->dev, "no platform data\n"); | ||
151 | return -ENODEV; | ||
152 | } | ||
153 | |||
154 | vcc = regulator_get_exclusive(&pdev->dev, "vled"); | ||
155 | if (IS_ERR(vcc)) { | ||
156 | dev_err(&pdev->dev, "Cannot get vcc for %s\n", pdata->name); | ||
157 | return PTR_ERR(vcc); | ||
158 | } | ||
159 | |||
160 | led = kzalloc(sizeof(*led), GFP_KERNEL); | ||
161 | if (led == NULL) { | ||
162 | ret = -ENOMEM; | ||
163 | goto err_vcc; | ||
164 | } | ||
165 | |||
166 | led->cdev.max_brightness = led_regulator_get_max_brightness(vcc); | ||
167 | if (pdata->brightness > led->cdev.max_brightness) { | ||
168 | dev_err(&pdev->dev, "Invalid default brightness %d\n", | ||
169 | pdata->brightness); | ||
170 | ret = -EINVAL; | ||
171 | goto err_led; | ||
172 | } | ||
173 | led->value = pdata->brightness; | ||
174 | |||
175 | led->cdev.brightness_set = regulator_led_brightness_set; | ||
176 | led->cdev.name = pdata->name; | ||
177 | led->cdev.flags |= LED_CORE_SUSPENDRESUME; | ||
178 | led->vcc = vcc; | ||
179 | |||
180 | mutex_init(&led->mutex); | ||
181 | INIT_WORK(&led->work, led_work); | ||
182 | |||
183 | platform_set_drvdata(pdev, led); | ||
184 | |||
185 | ret = led_classdev_register(&pdev->dev, &led->cdev); | ||
186 | if (ret < 0) { | ||
187 | cancel_work_sync(&led->work); | ||
188 | goto err_led; | ||
189 | } | ||
190 | |||
191 | /* to expose the default value to userspace */ | ||
192 | led->cdev.brightness = led->value; | ||
193 | |||
194 | /* Set the default led status */ | ||
195 | regulator_led_set_value(led); | ||
196 | |||
197 | return 0; | ||
198 | |||
199 | err_led: | ||
200 | kfree(led); | ||
201 | err_vcc: | ||
202 | regulator_put(vcc); | ||
203 | return ret; | ||
204 | } | ||
205 | |||
206 | static int __devexit regulator_led_remove(struct platform_device *pdev) | ||
207 | { | ||
208 | struct regulator_led *led = platform_get_drvdata(pdev); | ||
209 | |||
210 | led_classdev_unregister(&led->cdev); | ||
211 | cancel_work_sync(&led->work); | ||
212 | regulator_led_disable(led); | ||
213 | regulator_put(led->vcc); | ||
214 | kfree(led); | ||
215 | return 0; | ||
216 | } | ||
217 | |||
218 | static struct platform_driver regulator_led_driver = { | ||
219 | .driver = { | ||
220 | .name = "leds-regulator", | ||
221 | .owner = THIS_MODULE, | ||
222 | }, | ||
223 | .probe = regulator_led_probe, | ||
224 | .remove = __devexit_p(regulator_led_remove), | ||
225 | }; | ||
226 | |||
227 | static int __init regulator_led_init(void) | ||
228 | { | ||
229 | return platform_driver_register(®ulator_led_driver); | ||
230 | } | ||
231 | module_init(regulator_led_init); | ||
232 | |||
233 | static void __exit regulator_led_exit(void) | ||
234 | { | ||
235 | platform_driver_unregister(®ulator_led_driver); | ||
236 | } | ||
237 | module_exit(regulator_led_exit); | ||
238 | |||
239 | MODULE_AUTHOR("Antonio Ospite <ospite@studenti.unina.it>"); | ||
240 | MODULE_DESCRIPTION("Regulator driven LED driver"); | ||
241 | MODULE_LICENSE("GPL"); | ||
242 | MODULE_ALIAS("platform:leds-regulator"); | ||
diff --git a/drivers/leds/leds-ss4200.c b/drivers/leds/leds-ss4200.c new file mode 100644 index 000000000000..97f04984c1ca --- /dev/null +++ b/drivers/leds/leds-ss4200.c | |||
@@ -0,0 +1,556 @@ | |||
1 | /* | ||
2 | * SS4200-E Hardware API | ||
3 | * Copyright (c) 2009, Intel Corporation. | ||
4 | * Copyright IBM Corporation, 2009 | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along with | ||
16 | * this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | * | ||
19 | * Author: Dave Hansen <dave@sr71.net> | ||
20 | */ | ||
21 | |||
22 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
23 | |||
24 | #include <linux/dmi.h> | ||
25 | #include <linux/init.h> | ||
26 | #include <linux/ioport.h> | ||
27 | #include <linux/kernel.h> | ||
28 | #include <linux/leds.h> | ||
29 | #include <linux/module.h> | ||
30 | #include <linux/pci.h> | ||
31 | #include <linux/types.h> | ||
32 | #include <linux/uaccess.h> | ||
33 | |||
34 | MODULE_AUTHOR("Rodney Girod <rgirod@confocus.com>, Dave Hansen <dave@sr71.net>"); | ||
35 | MODULE_DESCRIPTION("Intel NAS/Home Server ICH7 GPIO Driver"); | ||
36 | MODULE_LICENSE("GPL"); | ||
37 | |||
38 | /* | ||
39 | * ICH7 LPC/GPIO PCI Config register offsets | ||
40 | */ | ||
41 | #define PMBASE 0x040 | ||
42 | #define GPIO_BASE 0x048 | ||
43 | #define GPIO_CTRL 0x04c | ||
44 | #define GPIO_EN 0x010 | ||
45 | |||
46 | /* | ||
47 | * The ICH7 GPIO register block is 64 bytes in size. | ||
48 | */ | ||
49 | #define ICH7_GPIO_SIZE 64 | ||
50 | |||
51 | /* | ||
52 | * Define register offsets within the ICH7 register block. | ||
53 | */ | ||
54 | #define GPIO_USE_SEL 0x000 | ||
55 | #define GP_IO_SEL 0x004 | ||
56 | #define GP_LVL 0x00c | ||
57 | #define GPO_BLINK 0x018 | ||
58 | #define GPI_INV 0x030 | ||
59 | #define GPIO_USE_SEL2 0x034 | ||
60 | #define GP_IO_SEL2 0x038 | ||
61 | #define GP_LVL2 0x03c | ||
62 | |||
63 | /* | ||
64 | * PCI ID of the Intel ICH7 LPC Device within which the GPIO block lives. | ||
65 | */ | ||
66 | static struct pci_device_id ich7_lpc_pci_id[] = | ||
67 | { | ||
68 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_0) }, | ||
69 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_1) }, | ||
70 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_30) }, | ||
71 | { } /* NULL entry */ | ||
72 | }; | ||
73 | |||
74 | MODULE_DEVICE_TABLE(pci, ich7_lpc_pci_id); | ||
75 | |||
76 | static int __init ss4200_led_dmi_callback(const struct dmi_system_id *id) | ||
77 | { | ||
78 | pr_info("detected '%s'\n", id->ident); | ||
79 | return 1; | ||
80 | } | ||
81 | |||
82 | static unsigned int __initdata nodetect; | ||
83 | module_param_named(nodetect, nodetect, bool, 0); | ||
84 | MODULE_PARM_DESC(nodetect, "Skip DMI-based hardware detection"); | ||
85 | |||
86 | /* | ||
87 | * struct nas_led_whitelist - List of known good models | ||
88 | * | ||
89 | * Contains the known good models this driver is compatible with. | ||
90 | * When adding a new model try to be as strict as possible. This | ||
91 | * makes it possible to keep the false positives (the model is | ||
92 | * detected as working, but in reality it is not) as low as | ||
93 | * possible. | ||
94 | */ | ||
95 | static struct dmi_system_id __initdata nas_led_whitelist[] = { | ||
96 | { | ||
97 | .callback = ss4200_led_dmi_callback, | ||
98 | .ident = "Intel SS4200-E", | ||
99 | .matches = { | ||
100 | DMI_MATCH(DMI_SYS_VENDOR, "Intel"), | ||
101 | DMI_MATCH(DMI_PRODUCT_NAME, "SS4200-E"), | ||
102 | DMI_MATCH(DMI_PRODUCT_VERSION, "1.00.00") | ||
103 | } | ||
104 | }, | ||
105 | }; | ||
106 | |||
107 | /* | ||
108 | * Base I/O address assigned to the Power Management register block | ||
109 | */ | ||
110 | static u32 g_pm_io_base; | ||
111 | |||
112 | /* | ||
113 | * Base I/O address assigned to the ICH7 GPIO register block | ||
114 | */ | ||
115 | static u32 nas_gpio_io_base; | ||
116 | |||
117 | /* | ||
118 | * When we successfully register a region, we are returned a resource. | ||
119 | * We use these to identify which regions we need to release on our way | ||
120 | * back out. | ||
121 | */ | ||
122 | static struct resource *gp_gpio_resource; | ||
123 | |||
124 | struct nasgpio_led { | ||
125 | char *name; | ||
126 | u32 gpio_bit; | ||
127 | struct led_classdev led_cdev; | ||
128 | }; | ||
129 | |||
130 | /* | ||
131 | * gpio_bit(s) are the ICH7 GPIO bit assignments | ||
132 | */ | ||
133 | static struct nasgpio_led nasgpio_leds[] = { | ||
134 | { .name = "hdd1:blue:sata", .gpio_bit = 0 }, | ||
135 | { .name = "hdd1:amber:sata", .gpio_bit = 1 }, | ||
136 | { .name = "hdd2:blue:sata", .gpio_bit = 2 }, | ||
137 | { .name = "hdd2:amber:sata", .gpio_bit = 3 }, | ||
138 | { .name = "hdd3:blue:sata", .gpio_bit = 4 }, | ||
139 | { .name = "hdd3:amber:sata", .gpio_bit = 5 }, | ||
140 | { .name = "hdd4:blue:sata", .gpio_bit = 6 }, | ||
141 | { .name = "hdd4:amber:sata", .gpio_bit = 7 }, | ||
142 | { .name = "power:blue:power", .gpio_bit = 27}, | ||
143 | { .name = "power:amber:power", .gpio_bit = 28}, | ||
144 | }; | ||
145 | |||
146 | #define NAS_RECOVERY 0x00000400 /* GPIO10 */ | ||
147 | |||
148 | static struct nasgpio_led * | ||
149 | led_classdev_to_nasgpio_led(struct led_classdev *led_cdev) | ||
150 | { | ||
151 | return container_of(led_cdev, struct nasgpio_led, led_cdev); | ||
152 | } | ||
153 | |||
154 | static struct nasgpio_led *get_led_named(char *name) | ||
155 | { | ||
156 | int i; | ||
157 | for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) { | ||
158 | if (strcmp(nasgpio_leds[i].name, name)) | ||
159 | continue; | ||
160 | return &nasgpio_leds[i]; | ||
161 | } | ||
162 | return NULL; | ||
163 | } | ||
164 | |||
165 | /* | ||
166 | * This protects access to the gpio ports. | ||
167 | */ | ||
168 | static DEFINE_SPINLOCK(nasgpio_gpio_lock); | ||
169 | |||
170 | /* | ||
171 | * There are two gpio ports, one for blinking and the other | ||
172 | * for power. @port tells us if we're doing blinking or | ||
173 | * power control. | ||
174 | * | ||
175 | * Caller must hold nasgpio_gpio_lock | ||
176 | */ | ||
177 | static void __nasgpio_led_set_attr(struct led_classdev *led_cdev, | ||
178 | u32 port, u32 value) | ||
179 | { | ||
180 | struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev); | ||
181 | u32 gpio_out; | ||
182 | |||
183 | gpio_out = inl(nas_gpio_io_base + port); | ||
184 | if (value) | ||
185 | gpio_out |= (1<<led->gpio_bit); | ||
186 | else | ||
187 | gpio_out &= ~(1<<led->gpio_bit); | ||
188 | |||
189 | outl(gpio_out, nas_gpio_io_base + port); | ||
190 | } | ||
191 | |||
192 | static void nasgpio_led_set_attr(struct led_classdev *led_cdev, | ||
193 | u32 port, u32 value) | ||
194 | { | ||
195 | spin_lock(&nasgpio_gpio_lock); | ||
196 | __nasgpio_led_set_attr(led_cdev, port, value); | ||
197 | spin_unlock(&nasgpio_gpio_lock); | ||
198 | } | ||
199 | |||
200 | u32 nasgpio_led_get_attr(struct led_classdev *led_cdev, u32 port) | ||
201 | { | ||
202 | struct nasgpio_led *led = led_classdev_to_nasgpio_led(led_cdev); | ||
203 | u32 gpio_in; | ||
204 | |||
205 | spin_lock(&nasgpio_gpio_lock); | ||
206 | gpio_in = inl(nas_gpio_io_base + port); | ||
207 | spin_unlock(&nasgpio_gpio_lock); | ||
208 | if (gpio_in & (1<<led->gpio_bit)) | ||
209 | return 1; | ||
210 | return 0; | ||
211 | } | ||
212 | |||
213 | /* | ||
214 | * There is actual brightness control in the hardware, | ||
215 | * but it is via smbus commands and not implemented | ||
216 | * in this driver. | ||
217 | */ | ||
218 | static void nasgpio_led_set_brightness(struct led_classdev *led_cdev, | ||
219 | enum led_brightness brightness) | ||
220 | { | ||
221 | u32 setting = 0; | ||
222 | if (brightness >= LED_HALF) | ||
223 | setting = 1; | ||
224 | /* | ||
225 | * Hold the lock across both operations. This ensures | ||
226 | * consistency so that both the "turn off blinking" | ||
227 | * and "turn light off" operations complete as a set. | ||
228 | */ | ||
229 | spin_lock(&nasgpio_gpio_lock); | ||
230 | /* | ||
231 | * LED class documentation asks that past blink state | ||
232 | * be disabled when brightness is turned to zero. | ||
233 | */ | ||
234 | if (brightness == 0) | ||
235 | __nasgpio_led_set_attr(led_cdev, GPO_BLINK, 0); | ||
236 | __nasgpio_led_set_attr(led_cdev, GP_LVL, setting); | ||
237 | spin_unlock(&nasgpio_gpio_lock); | ||
238 | } | ||
239 | |||
240 | static int nasgpio_led_set_blink(struct led_classdev *led_cdev, | ||
241 | unsigned long *delay_on, | ||
242 | unsigned long *delay_off) | ||
243 | { | ||
244 | u32 setting = 1; | ||
245 | if (!(*delay_on == 0 && *delay_off == 0) && | ||
246 | !(*delay_on == 500 && *delay_off == 500)) | ||
247 | return -EINVAL; | ||
248 | /* | ||
249 | * These are very approximate. | ||
250 | */ | ||
251 | *delay_on = 500; | ||
252 | *delay_off = 500; | ||
253 | |||
254 | nasgpio_led_set_attr(led_cdev, GPO_BLINK, setting); | ||
255 | |||
256 | return 0; | ||
257 | } | ||
258 | |||
259 | |||
260 | /* | ||
261 | * Initialize the ICH7 GPIO registers for NAS usage. The BIOS should have | ||
262 | * already taken care of this, but we will do so in a non destructive manner | ||
263 | * so that we have what we need whether the BIOS did it or not. | ||
264 | */ | ||
265 | static int __devinit ich7_gpio_init(struct device *dev) | ||
266 | { | ||
267 | int i; | ||
268 | u32 config_data = 0; | ||
269 | u32 all_nas_led = 0; | ||
270 | |||
271 | for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) | ||
272 | all_nas_led |= (1<<nasgpio_leds[i].gpio_bit); | ||
273 | |||
274 | spin_lock(&nasgpio_gpio_lock); | ||
275 | /* | ||
276 | * We need to enable all of the GPIO lines used by the NAS box, | ||
277 | * so we will read the current Use Selection and add our usage | ||
278 | * to it. This should be benign with regard to the original | ||
279 | * BIOS configuration. | ||
280 | */ | ||
281 | config_data = inl(nas_gpio_io_base + GPIO_USE_SEL); | ||
282 | dev_dbg(dev, ": Data read from GPIO_USE_SEL = 0x%08x\n", config_data); | ||
283 | config_data |= all_nas_led + NAS_RECOVERY; | ||
284 | outl(config_data, nas_gpio_io_base + GPIO_USE_SEL); | ||
285 | config_data = inl(nas_gpio_io_base + GPIO_USE_SEL); | ||
286 | dev_dbg(dev, ": GPIO_USE_SEL = 0x%08x\n\n", config_data); | ||
287 | |||
288 | /* | ||
289 | * The LED GPIO outputs need to be configured for output, so we | ||
290 | * will ensure that all LED lines are cleared for output and the | ||
291 | * RECOVERY line ready for input. This too should be benign with | ||
292 | * regard to BIOS configuration. | ||
293 | */ | ||
294 | config_data = inl(nas_gpio_io_base + GP_IO_SEL); | ||
295 | dev_dbg(dev, ": Data read from GP_IO_SEL = 0x%08x\n", | ||
296 | config_data); | ||
297 | config_data &= ~all_nas_led; | ||
298 | config_data |= NAS_RECOVERY; | ||
299 | outl(config_data, nas_gpio_io_base + GP_IO_SEL); | ||
300 | config_data = inl(nas_gpio_io_base + GP_IO_SEL); | ||
301 | dev_dbg(dev, ": GP_IO_SEL = 0x%08x\n", config_data); | ||
302 | |||
303 | /* | ||
304 | * In our final system, the BIOS will initialize the state of all | ||
305 | * of the LEDs. For now, we turn them all off (or Low). | ||
306 | */ | ||
307 | config_data = inl(nas_gpio_io_base + GP_LVL); | ||
308 | dev_dbg(dev, ": Data read from GP_LVL = 0x%08x\n", config_data); | ||
309 | /* | ||
310 | * In our final system, the BIOS will initialize the blink state of all | ||
311 | * of the LEDs. For now, we turn blink off for all of them. | ||
312 | */ | ||
313 | config_data = inl(nas_gpio_io_base + GPO_BLINK); | ||
314 | dev_dbg(dev, ": Data read from GPO_BLINK = 0x%08x\n", config_data); | ||
315 | |||
316 | /* | ||
317 | * At this moment, I am unsure if anything needs to happen with GPI_INV | ||
318 | */ | ||
319 | config_data = inl(nas_gpio_io_base + GPI_INV); | ||
320 | dev_dbg(dev, ": Data read from GPI_INV = 0x%08x\n", config_data); | ||
321 | |||
322 | spin_unlock(&nasgpio_gpio_lock); | ||
323 | return 0; | ||
324 | } | ||
325 | |||
326 | static void ich7_lpc_cleanup(struct device *dev) | ||
327 | { | ||
328 | /* | ||
329 | * If we were given exclusive use of the GPIO | ||
330 | * I/O Address range, we must return it. | ||
331 | */ | ||
332 | if (gp_gpio_resource) { | ||
333 | dev_dbg(dev, ": Releasing GPIO I/O addresses\n"); | ||
334 | release_region(nas_gpio_io_base, ICH7_GPIO_SIZE); | ||
335 | gp_gpio_resource = NULL; | ||
336 | } | ||
337 | } | ||
338 | |||
339 | /* | ||
340 | * The OS has determined that the LPC of the Intel ICH7 Southbridge is present | ||
341 | * so we can retrive the required operational information and prepare the GPIO. | ||
342 | */ | ||
343 | static struct pci_dev *nas_gpio_pci_dev; | ||
344 | static int __devinit ich7_lpc_probe(struct pci_dev *dev, | ||
345 | const struct pci_device_id *id) | ||
346 | { | ||
347 | int status; | ||
348 | u32 gc = 0; | ||
349 | |||
350 | status = pci_enable_device(dev); | ||
351 | if (status) { | ||
352 | dev_err(&dev->dev, "pci_enable_device failed\n"); | ||
353 | return -EIO; | ||
354 | } | ||
355 | |||
356 | nas_gpio_pci_dev = dev; | ||
357 | status = pci_read_config_dword(dev, PMBASE, &g_pm_io_base); | ||
358 | if (status) | ||
359 | goto out; | ||
360 | g_pm_io_base &= 0x00000ff80; | ||
361 | |||
362 | status = pci_read_config_dword(dev, GPIO_CTRL, &gc); | ||
363 | if (!(GPIO_EN & gc)) { | ||
364 | status = -EEXIST; | ||
365 | dev_info(&dev->dev, | ||
366 | "ERROR: The LPC GPIO Block has not been enabled.\n"); | ||
367 | goto out; | ||
368 | } | ||
369 | |||
370 | status = pci_read_config_dword(dev, GPIO_BASE, &nas_gpio_io_base); | ||
371 | if (0 > status) { | ||
372 | dev_info(&dev->dev, "Unable to read GPIOBASE.\n"); | ||
373 | goto out; | ||
374 | } | ||
375 | dev_dbg(&dev->dev, ": GPIOBASE = 0x%08x\n", nas_gpio_io_base); | ||
376 | nas_gpio_io_base &= 0x00000ffc0; | ||
377 | |||
378 | /* | ||
379 | * Insure that we have exclusive access to the GPIO I/O address range. | ||
380 | */ | ||
381 | gp_gpio_resource = request_region(nas_gpio_io_base, ICH7_GPIO_SIZE, | ||
382 | KBUILD_MODNAME); | ||
383 | if (NULL == gp_gpio_resource) { | ||
384 | dev_info(&dev->dev, | ||
385 | "ERROR Unable to register GPIO I/O addresses.\n"); | ||
386 | status = -1; | ||
387 | goto out; | ||
388 | } | ||
389 | |||
390 | /* | ||
391 | * Initialize the GPIO for NAS/Home Server Use | ||
392 | */ | ||
393 | ich7_gpio_init(&dev->dev); | ||
394 | |||
395 | out: | ||
396 | if (status) { | ||
397 | ich7_lpc_cleanup(&dev->dev); | ||
398 | pci_disable_device(dev); | ||
399 | } | ||
400 | return status; | ||
401 | } | ||
402 | |||
403 | static void ich7_lpc_remove(struct pci_dev *dev) | ||
404 | { | ||
405 | ich7_lpc_cleanup(&dev->dev); | ||
406 | pci_disable_device(dev); | ||
407 | } | ||
408 | |||
409 | /* | ||
410 | * pci_driver structure passed to the PCI modules | ||
411 | */ | ||
412 | static struct pci_driver nas_gpio_pci_driver = { | ||
413 | .name = KBUILD_MODNAME, | ||
414 | .id_table = ich7_lpc_pci_id, | ||
415 | .probe = ich7_lpc_probe, | ||
416 | .remove = ich7_lpc_remove, | ||
417 | }; | ||
418 | |||
419 | static struct led_classdev *get_classdev_for_led_nr(int nr) | ||
420 | { | ||
421 | struct nasgpio_led *nas_led = &nasgpio_leds[nr]; | ||
422 | struct led_classdev *led = &nas_led->led_cdev; | ||
423 | return led; | ||
424 | } | ||
425 | |||
426 | |||
427 | static void set_power_light_amber_noblink(void) | ||
428 | { | ||
429 | struct nasgpio_led *amber = get_led_named("power:amber:power"); | ||
430 | struct nasgpio_led *blue = get_led_named("power:blue:power"); | ||
431 | |||
432 | if (!amber || !blue) | ||
433 | return; | ||
434 | /* | ||
435 | * LED_OFF implies disabling future blinking | ||
436 | */ | ||
437 | pr_debug("setting blue off and amber on\n"); | ||
438 | |||
439 | nasgpio_led_set_brightness(&blue->led_cdev, LED_OFF); | ||
440 | nasgpio_led_set_brightness(&amber->led_cdev, LED_FULL); | ||
441 | } | ||
442 | |||
443 | static ssize_t nas_led_blink_show(struct device *dev, | ||
444 | struct device_attribute *attr, char *buf) | ||
445 | { | ||
446 | struct led_classdev *led = dev_get_drvdata(dev); | ||
447 | int blinking = 0; | ||
448 | if (nasgpio_led_get_attr(led, GPO_BLINK)) | ||
449 | blinking = 1; | ||
450 | return sprintf(buf, "%u\n", blinking); | ||
451 | } | ||
452 | |||
453 | static ssize_t nas_led_blink_store(struct device *dev, | ||
454 | struct device_attribute *attr, | ||
455 | const char *buf, size_t size) | ||
456 | { | ||
457 | int ret; | ||
458 | struct led_classdev *led = dev_get_drvdata(dev); | ||
459 | unsigned long blink_state; | ||
460 | |||
461 | ret = strict_strtoul(buf, 10, &blink_state); | ||
462 | if (ret) | ||
463 | return ret; | ||
464 | |||
465 | nasgpio_led_set_attr(led, GPO_BLINK, blink_state); | ||
466 | |||
467 | return size; | ||
468 | } | ||
469 | |||
470 | static DEVICE_ATTR(blink, 0644, nas_led_blink_show, nas_led_blink_store); | ||
471 | |||
472 | static int register_nasgpio_led(int led_nr) | ||
473 | { | ||
474 | int ret; | ||
475 | struct nasgpio_led *nas_led = &nasgpio_leds[led_nr]; | ||
476 | struct led_classdev *led = get_classdev_for_led_nr(led_nr); | ||
477 | |||
478 | led->name = nas_led->name; | ||
479 | led->brightness = LED_OFF; | ||
480 | if (nasgpio_led_get_attr(led, GP_LVL)) | ||
481 | led->brightness = LED_FULL; | ||
482 | led->brightness_set = nasgpio_led_set_brightness; | ||
483 | led->blink_set = nasgpio_led_set_blink; | ||
484 | ret = led_classdev_register(&nas_gpio_pci_dev->dev, led); | ||
485 | if (ret) | ||
486 | return ret; | ||
487 | ret = device_create_file(led->dev, &dev_attr_blink); | ||
488 | if (ret) | ||
489 | led_classdev_unregister(led); | ||
490 | return ret; | ||
491 | } | ||
492 | |||
493 | static void unregister_nasgpio_led(int led_nr) | ||
494 | { | ||
495 | struct led_classdev *led = get_classdev_for_led_nr(led_nr); | ||
496 | led_classdev_unregister(led); | ||
497 | device_remove_file(led->dev, &dev_attr_blink); | ||
498 | } | ||
499 | /* | ||
500 | * module load/initialization | ||
501 | */ | ||
502 | static int __init nas_gpio_init(void) | ||
503 | { | ||
504 | int i; | ||
505 | int ret = 0; | ||
506 | int nr_devices = 0; | ||
507 | |||
508 | nr_devices = dmi_check_system(nas_led_whitelist); | ||
509 | if (nodetect) { | ||
510 | pr_info("skipping hardware autodetection\n"); | ||
511 | pr_info("Please send 'dmidecode' output to dave@sr71.net\n"); | ||
512 | nr_devices++; | ||
513 | } | ||
514 | |||
515 | if (nr_devices <= 0) { | ||
516 | pr_info("no LED devices found\n"); | ||
517 | return -ENODEV; | ||
518 | } | ||
519 | |||
520 | pr_info("registering PCI driver\n"); | ||
521 | ret = pci_register_driver(&nas_gpio_pci_driver); | ||
522 | if (ret) | ||
523 | return ret; | ||
524 | for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) { | ||
525 | ret = register_nasgpio_led(i); | ||
526 | if (ret) | ||
527 | goto out_err; | ||
528 | } | ||
529 | /* | ||
530 | * When the system powers on, the BIOS leaves the power | ||
531 | * light blue and blinking. This will turn it solid | ||
532 | * amber once the driver is loaded. | ||
533 | */ | ||
534 | set_power_light_amber_noblink(); | ||
535 | return 0; | ||
536 | out_err: | ||
537 | for (; i >= 0; i--) | ||
538 | unregister_nasgpio_led(i); | ||
539 | pci_unregister_driver(&nas_gpio_pci_driver); | ||
540 | return ret; | ||
541 | } | ||
542 | |||
543 | /* | ||
544 | * module unload | ||
545 | */ | ||
546 | static void __exit nas_gpio_exit(void) | ||
547 | { | ||
548 | int i; | ||
549 | pr_info("Unregistering driver\n"); | ||
550 | for (i = 0; i < ARRAY_SIZE(nasgpio_leds); i++) | ||
551 | unregister_nasgpio_led(i); | ||
552 | pci_unregister_driver(&nas_gpio_pci_driver); | ||
553 | } | ||
554 | |||
555 | module_init(nas_gpio_init); | ||
556 | module_exit(nas_gpio_exit); | ||
diff --git a/drivers/message/fusion/mptbase.c b/drivers/message/fusion/mptbase.c index 610e914abe6c..85bc6a685e36 100644 --- a/drivers/message/fusion/mptbase.c +++ b/drivers/message/fusion/mptbase.c | |||
@@ -1587,7 +1587,7 @@ mpt_mapresources(MPT_ADAPTER *ioc) | |||
1587 | { | 1587 | { |
1588 | u8 __iomem *mem; | 1588 | u8 __iomem *mem; |
1589 | int ii; | 1589 | int ii; |
1590 | unsigned long mem_phys; | 1590 | resource_size_t mem_phys; |
1591 | unsigned long port; | 1591 | unsigned long port; |
1592 | u32 msize; | 1592 | u32 msize; |
1593 | u32 psize; | 1593 | u32 psize; |
@@ -1677,8 +1677,8 @@ mpt_mapresources(MPT_ADAPTER *ioc) | |||
1677 | return -EINVAL; | 1677 | return -EINVAL; |
1678 | } | 1678 | } |
1679 | ioc->memmap = mem; | 1679 | ioc->memmap = mem; |
1680 | dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %lx\n", | 1680 | dinitprintk(ioc, printk(MYIOC_s_INFO_FMT "mem = %p, mem_phys = %llx\n", |
1681 | ioc->name, mem, mem_phys)); | 1681 | ioc->name, mem, (unsigned long long)mem_phys)); |
1682 | 1682 | ||
1683 | ioc->mem_phys = mem_phys; | 1683 | ioc->mem_phys = mem_phys; |
1684 | ioc->chip = (SYSIF_REGS __iomem *)mem; | 1684 | ioc->chip = (SYSIF_REGS __iomem *)mem; |
diff --git a/drivers/misc/Kconfig b/drivers/misc/Kconfig index 1a7a9fc50ea1..e3551d20464f 100644 --- a/drivers/misc/Kconfig +++ b/drivers/misc/Kconfig | |||
@@ -203,6 +203,7 @@ config CS5535_MFGPT | |||
203 | 203 | ||
204 | config CS5535_MFGPT_DEFAULT_IRQ | 204 | config CS5535_MFGPT_DEFAULT_IRQ |
205 | int | 205 | int |
206 | depends on CS5535_MFGPT | ||
206 | default 7 | 207 | default 7 |
207 | help | 208 | help |
208 | MFGPTs on the CS5535 require an interrupt. The selected IRQ | 209 | MFGPTs on the CS5535 require an interrupt. The selected IRQ |
diff --git a/drivers/misc/enclosure.c b/drivers/misc/enclosure.c index e9eae4a78402..1eac626e710a 100644 --- a/drivers/misc/enclosure.c +++ b/drivers/misc/enclosure.c | |||
@@ -391,6 +391,7 @@ static const char *const enclosure_status [] = { | |||
391 | [ENCLOSURE_STATUS_NOT_INSTALLED] = "not installed", | 391 | [ENCLOSURE_STATUS_NOT_INSTALLED] = "not installed", |
392 | [ENCLOSURE_STATUS_UNKNOWN] = "unknown", | 392 | [ENCLOSURE_STATUS_UNKNOWN] = "unknown", |
393 | [ENCLOSURE_STATUS_UNAVAILABLE] = "unavailable", | 393 | [ENCLOSURE_STATUS_UNAVAILABLE] = "unavailable", |
394 | [ENCLOSURE_STATUS_MAX] = NULL, | ||
394 | }; | 395 | }; |
395 | 396 | ||
396 | static const char *const enclosure_type [] = { | 397 | static const char *const enclosure_type [] = { |
diff --git a/drivers/mmc/core/sdio.c b/drivers/mmc/core/sdio.c index cdb845b68ab5..06b64085a355 100644 --- a/drivers/mmc/core/sdio.c +++ b/drivers/mmc/core/sdio.c | |||
@@ -516,7 +516,8 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr) | |||
516 | * The number of functions on the card is encoded inside | 516 | * The number of functions on the card is encoded inside |
517 | * the ocr. | 517 | * the ocr. |
518 | */ | 518 | */ |
519 | card->sdio_funcs = funcs = (ocr & 0x70000000) >> 28; | 519 | funcs = (ocr & 0x70000000) >> 28; |
520 | card->sdio_funcs = 0; | ||
520 | 521 | ||
521 | /* | 522 | /* |
522 | * If needed, disconnect card detection pull-up resistor. | 523 | * If needed, disconnect card detection pull-up resistor. |
@@ -528,7 +529,7 @@ int mmc_attach_sdio(struct mmc_host *host, u32 ocr) | |||
528 | /* | 529 | /* |
529 | * Initialize (but don't add) all present functions. | 530 | * Initialize (but don't add) all present functions. |
530 | */ | 531 | */ |
531 | for (i = 0;i < funcs;i++) { | 532 | for (i = 0; i < funcs; i++, card->sdio_funcs++) { |
532 | err = sdio_init_func(host->card, i + 1); | 533 | err = sdio_init_func(host->card, i + 1); |
533 | if (err) | 534 | if (err) |
534 | goto remove; | 535 | goto remove; |
diff --git a/drivers/mmc/core/sdio_bus.c b/drivers/mmc/core/sdio_bus.c index d37464e296a5..9e060c87e64d 100644 --- a/drivers/mmc/core/sdio_bus.c +++ b/drivers/mmc/core/sdio_bus.c | |||
@@ -248,12 +248,15 @@ int sdio_add_func(struct sdio_func *func) | |||
248 | /* | 248 | /* |
249 | * Unregister a SDIO function with the driver model, and | 249 | * Unregister a SDIO function with the driver model, and |
250 | * (eventually) free it. | 250 | * (eventually) free it. |
251 | * This function can be called through error paths where sdio_add_func() was | ||
252 | * never executed (because a failure occurred at an earlier point). | ||
251 | */ | 253 | */ |
252 | void sdio_remove_func(struct sdio_func *func) | 254 | void sdio_remove_func(struct sdio_func *func) |
253 | { | 255 | { |
254 | if (sdio_func_present(func)) | 256 | if (!sdio_func_present(func)) |
255 | device_del(&func->dev); | 257 | return; |
256 | 258 | ||
259 | device_del(&func->dev); | ||
257 | put_device(&func->dev); | 260 | put_device(&func->dev); |
258 | } | 261 | } |
259 | 262 | ||
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index 9d405b181781..ce1d28884e29 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig | |||
@@ -44,6 +44,19 @@ config MMC_SDHCI_IO_ACCESSORS | |||
44 | This is silent Kconfig symbol that is selected by the drivers that | 44 | This is silent Kconfig symbol that is selected by the drivers that |
45 | need to overwrite SDHCI IO memory accessors. | 45 | need to overwrite SDHCI IO memory accessors. |
46 | 46 | ||
47 | config MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER | ||
48 | bool | ||
49 | select MMC_SDHCI_IO_ACCESSORS | ||
50 | help | ||
51 | This option is selected by drivers running on big endian hosts | ||
52 | and performing I/O to a SDHCI controller through a bus that | ||
53 | implements a hardware byte swapper using a 32-bit datum. | ||
54 | This endian mapping mode is called "data invariance" and | ||
55 | has the effect of scrambling the addresses and formats of data | ||
56 | accessed in sizes other than the datum size. | ||
57 | |||
58 | This is the case for the Freescale eSDHC and Nintendo Wii SDHCI. | ||
59 | |||
47 | config MMC_SDHCI_PCI | 60 | config MMC_SDHCI_PCI |
48 | tristate "SDHCI support on PCI bus" | 61 | tristate "SDHCI support on PCI bus" |
49 | depends on MMC_SDHCI && PCI | 62 | depends on MMC_SDHCI && PCI |
@@ -75,11 +88,29 @@ config MMC_RICOH_MMC | |||
75 | config MMC_SDHCI_OF | 88 | config MMC_SDHCI_OF |
76 | tristate "SDHCI support on OpenFirmware platforms" | 89 | tristate "SDHCI support on OpenFirmware platforms" |
77 | depends on MMC_SDHCI && PPC_OF | 90 | depends on MMC_SDHCI && PPC_OF |
78 | select MMC_SDHCI_IO_ACCESSORS | ||
79 | help | 91 | help |
80 | This selects the OF support for Secure Digital Host Controller | 92 | This selects the OF support for Secure Digital Host Controller |
81 | Interfaces. So far, only the Freescale eSDHC controller is known | 93 | Interfaces. |
82 | to exist on OF platforms. | 94 | |
95 | If unsure, say N. | ||
96 | |||
97 | config MMC_SDHCI_OF_ESDHC | ||
98 | bool "SDHCI OF support for the Freescale eSDHC controller" | ||
99 | depends on MMC_SDHCI_OF | ||
100 | select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER | ||
101 | help | ||
102 | This selects the Freescale eSDHC controller support. | ||
103 | |||
104 | If unsure, say N. | ||
105 | |||
106 | config MMC_SDHCI_OF_HLWD | ||
107 | bool "SDHCI OF support for the Nintendo Wii SDHCI controllers" | ||
108 | depends on MMC_SDHCI_OF | ||
109 | select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER | ||
110 | help | ||
111 | This selects the Secure Digital Host Controller Interface (SDHCI) | ||
112 | found in the "Hollywood" chipset of the Nintendo Wii video game | ||
113 | console. | ||
83 | 114 | ||
84 | If unsure, say N. | 115 | If unsure, say N. |
85 | 116 | ||
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index ded4d8cdd9d7..3d253dd4240f 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile | |||
@@ -13,7 +13,6 @@ obj-$(CONFIG_MMC_MXC) += mxcmmc.o | |||
13 | obj-$(CONFIG_MMC_SDHCI) += sdhci.o | 13 | obj-$(CONFIG_MMC_SDHCI) += sdhci.o |
14 | obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o | 14 | obj-$(CONFIG_MMC_SDHCI_PCI) += sdhci-pci.o |
15 | obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o | 15 | obj-$(CONFIG_MMC_RICOH_MMC) += ricoh_mmc.o |
16 | obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o | ||
17 | obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o | 16 | obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o |
18 | obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o | 17 | obj-$(CONFIG_MMC_SDHCI_S3C) += sdhci-s3c.o |
19 | obj-$(CONFIG_MMC_WBSD) += wbsd.o | 18 | obj-$(CONFIG_MMC_WBSD) += wbsd.o |
@@ -37,6 +36,11 @@ obj-$(CONFIG_MMC_CB710) += cb710-mmc.o | |||
37 | obj-$(CONFIG_MMC_VIA_SDMMC) += via-sdmmc.o | 36 | obj-$(CONFIG_MMC_VIA_SDMMC) += via-sdmmc.o |
38 | obj-$(CONFIG_SDH_BFIN) += bfin_sdh.o | 37 | obj-$(CONFIG_SDH_BFIN) += bfin_sdh.o |
39 | 38 | ||
39 | obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o | ||
40 | sdhci-of-y := sdhci-of-core.o | ||
41 | sdhci-of-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o | ||
42 | sdhci-of-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o | ||
43 | |||
40 | ifeq ($(CONFIG_CB710_DEBUG),y) | 44 | ifeq ($(CONFIG_CB710_DEBUG),y) |
41 | CFLAGS-cb710-mmc += -DDEBUG | 45 | CFLAGS-cb710-mmc += -DDEBUG |
42 | endif | 46 | endif |
diff --git a/drivers/mmc/host/sdhci-of.c b/drivers/mmc/host/sdhci-of-core.c index 01ab916c2802..55e33135edb4 100644 --- a/drivers/mmc/host/sdhci-of.c +++ b/drivers/mmc/host/sdhci-of-core.c | |||
@@ -22,62 +22,37 @@ | |||
22 | #include <linux/of_platform.h> | 22 | #include <linux/of_platform.h> |
23 | #include <linux/mmc/host.h> | 23 | #include <linux/mmc/host.h> |
24 | #include <asm/machdep.h> | 24 | #include <asm/machdep.h> |
25 | #include "sdhci-of.h" | ||
25 | #include "sdhci.h" | 26 | #include "sdhci.h" |
26 | 27 | ||
27 | struct sdhci_of_data { | 28 | #ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER |
28 | unsigned int quirks; | ||
29 | struct sdhci_ops ops; | ||
30 | }; | ||
31 | |||
32 | struct sdhci_of_host { | ||
33 | unsigned int clock; | ||
34 | u16 xfer_mode_shadow; | ||
35 | }; | ||
36 | 29 | ||
37 | /* | 30 | /* |
38 | * Ops and quirks for the Freescale eSDHC controller. | 31 | * These accessors are designed for big endian hosts doing I/O to |
32 | * little endian controllers incorporating a 32-bit hardware byte swapper. | ||
39 | */ | 33 | */ |
40 | 34 | ||
41 | #define ESDHC_DMA_SYSCTL 0x40c | 35 | u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg) |
42 | #define ESDHC_DMA_SNOOP 0x00000040 | ||
43 | |||
44 | #define ESDHC_SYSTEM_CONTROL 0x2c | ||
45 | #define ESDHC_CLOCK_MASK 0x0000fff0 | ||
46 | #define ESDHC_PREDIV_SHIFT 8 | ||
47 | #define ESDHC_DIVIDER_SHIFT 4 | ||
48 | #define ESDHC_CLOCK_PEREN 0x00000004 | ||
49 | #define ESDHC_CLOCK_HCKEN 0x00000002 | ||
50 | #define ESDHC_CLOCK_IPGEN 0x00000001 | ||
51 | |||
52 | #define ESDHC_HOST_CONTROL_RES 0x05 | ||
53 | |||
54 | static u32 esdhc_readl(struct sdhci_host *host, int reg) | ||
55 | { | 36 | { |
56 | return in_be32(host->ioaddr + reg); | 37 | return in_be32(host->ioaddr + reg); |
57 | } | 38 | } |
58 | 39 | ||
59 | static u16 esdhc_readw(struct sdhci_host *host, int reg) | 40 | u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg) |
60 | { | 41 | { |
61 | u16 ret; | 42 | return in_be16(host->ioaddr + (reg ^ 0x2)); |
62 | |||
63 | if (unlikely(reg == SDHCI_HOST_VERSION)) | ||
64 | ret = in_be16(host->ioaddr + reg); | ||
65 | else | ||
66 | ret = in_be16(host->ioaddr + (reg ^ 0x2)); | ||
67 | return ret; | ||
68 | } | 43 | } |
69 | 44 | ||
70 | static u8 esdhc_readb(struct sdhci_host *host, int reg) | 45 | u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg) |
71 | { | 46 | { |
72 | return in_8(host->ioaddr + (reg ^ 0x3)); | 47 | return in_8(host->ioaddr + (reg ^ 0x3)); |
73 | } | 48 | } |
74 | 49 | ||
75 | static void esdhc_writel(struct sdhci_host *host, u32 val, int reg) | 50 | void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg) |
76 | { | 51 | { |
77 | out_be32(host->ioaddr + reg, val); | 52 | out_be32(host->ioaddr + reg, val); |
78 | } | 53 | } |
79 | 54 | ||
80 | static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) | 55 | void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg) |
81 | { | 56 | { |
82 | struct sdhci_of_host *of_host = sdhci_priv(host); | 57 | struct sdhci_of_host *of_host = sdhci_priv(host); |
83 | int base = reg & ~0x3; | 58 | int base = reg & ~0x3; |
@@ -92,106 +67,21 @@ static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) | |||
92 | of_host->xfer_mode_shadow = val; | 67 | of_host->xfer_mode_shadow = val; |
93 | return; | 68 | return; |
94 | case SDHCI_COMMAND: | 69 | case SDHCI_COMMAND: |
95 | esdhc_writel(host, val << 16 | of_host->xfer_mode_shadow, | 70 | sdhci_be32bs_writel(host, val << 16 | of_host->xfer_mode_shadow, |
96 | SDHCI_TRANSFER_MODE); | 71 | SDHCI_TRANSFER_MODE); |
97 | return; | 72 | return; |
98 | case SDHCI_BLOCK_SIZE: | ||
99 | /* | ||
100 | * Two last DMA bits are reserved, and first one is used for | ||
101 | * non-standard blksz of 4096 bytes that we don't support | ||
102 | * yet. So clear the DMA boundary bits. | ||
103 | */ | ||
104 | val &= ~SDHCI_MAKE_BLKSZ(0x7, 0); | ||
105 | /* fall through */ | ||
106 | } | 73 | } |
107 | clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift); | 74 | clrsetbits_be32(host->ioaddr + base, 0xffff << shift, val << shift); |
108 | } | 75 | } |
109 | 76 | ||
110 | static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) | 77 | void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg) |
111 | { | 78 | { |
112 | int base = reg & ~0x3; | 79 | int base = reg & ~0x3; |
113 | int shift = (reg & 0x3) * 8; | 80 | int shift = (reg & 0x3) * 8; |
114 | 81 | ||
115 | /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */ | ||
116 | if (reg == SDHCI_HOST_CONTROL) | ||
117 | val &= ~ESDHC_HOST_CONTROL_RES; | ||
118 | |||
119 | clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift); | 82 | clrsetbits_be32(host->ioaddr + base , 0xff << shift, val << shift); |
120 | } | 83 | } |
121 | 84 | #endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */ | |
122 | static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock) | ||
123 | { | ||
124 | int pre_div = 2; | ||
125 | int div = 1; | ||
126 | |||
127 | clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN | | ||
128 | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK); | ||
129 | |||
130 | if (clock == 0) | ||
131 | goto out; | ||
132 | |||
133 | while (host->max_clk / pre_div / 16 > clock && pre_div < 256) | ||
134 | pre_div *= 2; | ||
135 | |||
136 | while (host->max_clk / pre_div / div > clock && div < 16) | ||
137 | div++; | ||
138 | |||
139 | dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n", | ||
140 | clock, host->max_clk / pre_div / div); | ||
141 | |||
142 | pre_div >>= 1; | ||
143 | div--; | ||
144 | |||
145 | setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN | | ||
146 | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | | ||
147 | div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT); | ||
148 | mdelay(100); | ||
149 | out: | ||
150 | host->clock = clock; | ||
151 | } | ||
152 | |||
153 | static int esdhc_enable_dma(struct sdhci_host *host) | ||
154 | { | ||
155 | setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP); | ||
156 | return 0; | ||
157 | } | ||
158 | |||
159 | static unsigned int esdhc_get_max_clock(struct sdhci_host *host) | ||
160 | { | ||
161 | struct sdhci_of_host *of_host = sdhci_priv(host); | ||
162 | |||
163 | return of_host->clock; | ||
164 | } | ||
165 | |||
166 | static unsigned int esdhc_get_min_clock(struct sdhci_host *host) | ||
167 | { | ||
168 | struct sdhci_of_host *of_host = sdhci_priv(host); | ||
169 | |||
170 | return of_host->clock / 256 / 16; | ||
171 | } | ||
172 | |||
173 | static struct sdhci_of_data sdhci_esdhc = { | ||
174 | .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 | | ||
175 | SDHCI_QUIRK_BROKEN_CARD_DETECTION | | ||
176 | SDHCI_QUIRK_NO_BUSY_IRQ | | ||
177 | SDHCI_QUIRK_NONSTANDARD_CLOCK | | ||
178 | SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | | ||
179 | SDHCI_QUIRK_PIO_NEEDS_DELAY | | ||
180 | SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET | | ||
181 | SDHCI_QUIRK_NO_CARD_NO_RESET, | ||
182 | .ops = { | ||
183 | .readl = esdhc_readl, | ||
184 | .readw = esdhc_readw, | ||
185 | .readb = esdhc_readb, | ||
186 | .writel = esdhc_writel, | ||
187 | .writew = esdhc_writew, | ||
188 | .writeb = esdhc_writeb, | ||
189 | .set_clock = esdhc_set_clock, | ||
190 | .enable_dma = esdhc_enable_dma, | ||
191 | .get_max_clock = esdhc_get_max_clock, | ||
192 | .get_min_clock = esdhc_get_min_clock, | ||
193 | }, | ||
194 | }; | ||
195 | 85 | ||
196 | #ifdef CONFIG_PM | 86 | #ifdef CONFIG_PM |
197 | 87 | ||
@@ -301,9 +191,14 @@ static int __devexit sdhci_of_remove(struct of_device *ofdev) | |||
301 | } | 191 | } |
302 | 192 | ||
303 | static const struct of_device_id sdhci_of_match[] = { | 193 | static const struct of_device_id sdhci_of_match[] = { |
194 | #ifdef CONFIG_MMC_SDHCI_OF_ESDHC | ||
304 | { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, }, | 195 | { .compatible = "fsl,mpc8379-esdhc", .data = &sdhci_esdhc, }, |
305 | { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, }, | 196 | { .compatible = "fsl,mpc8536-esdhc", .data = &sdhci_esdhc, }, |
306 | { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, }, | 197 | { .compatible = "fsl,esdhc", .data = &sdhci_esdhc, }, |
198 | #endif | ||
199 | #ifdef CONFIG_MMC_SDHCI_OF_HLWD | ||
200 | { .compatible = "nintendo,hollywood-sdhci", .data = &sdhci_hlwd, }, | ||
201 | #endif | ||
307 | { .compatible = "generic-sdhci", }, | 202 | { .compatible = "generic-sdhci", }, |
308 | {}, | 203 | {}, |
309 | }; | 204 | }; |
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c b/drivers/mmc/host/sdhci-of-esdhc.c new file mode 100644 index 000000000000..d5b11a17e648 --- /dev/null +++ b/drivers/mmc/host/sdhci-of-esdhc.c | |||
@@ -0,0 +1,143 @@ | |||
1 | /* | ||
2 | * Freescale eSDHC controller driver. | ||
3 | * | ||
4 | * Copyright (c) 2007 Freescale Semiconductor, Inc. | ||
5 | * Copyright (c) 2009 MontaVista Software, Inc. | ||
6 | * | ||
7 | * Authors: Xiaobo Xie <X.Xie@freescale.com> | ||
8 | * Anton Vorontsov <avorontsov@ru.mvista.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or (at | ||
13 | * your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/io.h> | ||
17 | #include <linux/delay.h> | ||
18 | #include <linux/mmc/host.h> | ||
19 | #include "sdhci-of.h" | ||
20 | #include "sdhci.h" | ||
21 | |||
22 | /* | ||
23 | * Ops and quirks for the Freescale eSDHC controller. | ||
24 | */ | ||
25 | |||
26 | #define ESDHC_DMA_SYSCTL 0x40c | ||
27 | #define ESDHC_DMA_SNOOP 0x00000040 | ||
28 | |||
29 | #define ESDHC_SYSTEM_CONTROL 0x2c | ||
30 | #define ESDHC_CLOCK_MASK 0x0000fff0 | ||
31 | #define ESDHC_PREDIV_SHIFT 8 | ||
32 | #define ESDHC_DIVIDER_SHIFT 4 | ||
33 | #define ESDHC_CLOCK_PEREN 0x00000004 | ||
34 | #define ESDHC_CLOCK_HCKEN 0x00000002 | ||
35 | #define ESDHC_CLOCK_IPGEN 0x00000001 | ||
36 | |||
37 | #define ESDHC_HOST_CONTROL_RES 0x05 | ||
38 | |||
39 | static u16 esdhc_readw(struct sdhci_host *host, int reg) | ||
40 | { | ||
41 | u16 ret; | ||
42 | |||
43 | if (unlikely(reg == SDHCI_HOST_VERSION)) | ||
44 | ret = in_be16(host->ioaddr + reg); | ||
45 | else | ||
46 | ret = sdhci_be32bs_readw(host, reg); | ||
47 | return ret; | ||
48 | } | ||
49 | |||
50 | static void esdhc_writew(struct sdhci_host *host, u16 val, int reg) | ||
51 | { | ||
52 | if (reg == SDHCI_BLOCK_SIZE) { | ||
53 | /* | ||
54 | * Two last DMA bits are reserved, and first one is used for | ||
55 | * non-standard blksz of 4096 bytes that we don't support | ||
56 | * yet. So clear the DMA boundary bits. | ||
57 | */ | ||
58 | val &= ~SDHCI_MAKE_BLKSZ(0x7, 0); | ||
59 | } | ||
60 | sdhci_be32bs_writew(host, val, reg); | ||
61 | } | ||
62 | |||
63 | static void esdhc_writeb(struct sdhci_host *host, u8 val, int reg) | ||
64 | { | ||
65 | /* Prevent SDHCI core from writing reserved bits (e.g. HISPD). */ | ||
66 | if (reg == SDHCI_HOST_CONTROL) | ||
67 | val &= ~ESDHC_HOST_CONTROL_RES; | ||
68 | sdhci_be32bs_writeb(host, val, reg); | ||
69 | } | ||
70 | |||
71 | static void esdhc_set_clock(struct sdhci_host *host, unsigned int clock) | ||
72 | { | ||
73 | int pre_div = 2; | ||
74 | int div = 1; | ||
75 | |||
76 | clrbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN | | ||
77 | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | ESDHC_CLOCK_MASK); | ||
78 | |||
79 | if (clock == 0) | ||
80 | goto out; | ||
81 | |||
82 | while (host->max_clk / pre_div / 16 > clock && pre_div < 256) | ||
83 | pre_div *= 2; | ||
84 | |||
85 | while (host->max_clk / pre_div / div > clock && div < 16) | ||
86 | div++; | ||
87 | |||
88 | dev_dbg(mmc_dev(host->mmc), "desired SD clock: %d, actual: %d\n", | ||
89 | clock, host->max_clk / pre_div / div); | ||
90 | |||
91 | pre_div >>= 1; | ||
92 | div--; | ||
93 | |||
94 | setbits32(host->ioaddr + ESDHC_SYSTEM_CONTROL, ESDHC_CLOCK_IPGEN | | ||
95 | ESDHC_CLOCK_HCKEN | ESDHC_CLOCK_PEREN | | ||
96 | div << ESDHC_DIVIDER_SHIFT | pre_div << ESDHC_PREDIV_SHIFT); | ||
97 | mdelay(100); | ||
98 | out: | ||
99 | host->clock = clock; | ||
100 | } | ||
101 | |||
102 | static int esdhc_enable_dma(struct sdhci_host *host) | ||
103 | { | ||
104 | setbits32(host->ioaddr + ESDHC_DMA_SYSCTL, ESDHC_DMA_SNOOP); | ||
105 | return 0; | ||
106 | } | ||
107 | |||
108 | static unsigned int esdhc_get_max_clock(struct sdhci_host *host) | ||
109 | { | ||
110 | struct sdhci_of_host *of_host = sdhci_priv(host); | ||
111 | |||
112 | return of_host->clock; | ||
113 | } | ||
114 | |||
115 | static unsigned int esdhc_get_min_clock(struct sdhci_host *host) | ||
116 | { | ||
117 | struct sdhci_of_host *of_host = sdhci_priv(host); | ||
118 | |||
119 | return of_host->clock / 256 / 16; | ||
120 | } | ||
121 | |||
122 | struct sdhci_of_data sdhci_esdhc = { | ||
123 | .quirks = SDHCI_QUIRK_FORCE_BLK_SZ_2048 | | ||
124 | SDHCI_QUIRK_BROKEN_CARD_DETECTION | | ||
125 | SDHCI_QUIRK_NO_BUSY_IRQ | | ||
126 | SDHCI_QUIRK_NONSTANDARD_CLOCK | | ||
127 | SDHCI_QUIRK_DATA_TIMEOUT_USES_SDCLK | | ||
128 | SDHCI_QUIRK_PIO_NEEDS_DELAY | | ||
129 | SDHCI_QUIRK_RESTORE_IRQS_AFTER_RESET | | ||
130 | SDHCI_QUIRK_NO_CARD_NO_RESET, | ||
131 | .ops = { | ||
132 | .readl = sdhci_be32bs_readl, | ||
133 | .readw = esdhc_readw, | ||
134 | .readb = sdhci_be32bs_readb, | ||
135 | .writel = sdhci_be32bs_writel, | ||
136 | .writew = esdhc_writew, | ||
137 | .writeb = esdhc_writeb, | ||
138 | .set_clock = esdhc_set_clock, | ||
139 | .enable_dma = esdhc_enable_dma, | ||
140 | .get_max_clock = esdhc_get_max_clock, | ||
141 | .get_min_clock = esdhc_get_min_clock, | ||
142 | }, | ||
143 | }; | ||
diff --git a/drivers/mmc/host/sdhci-of-hlwd.c b/drivers/mmc/host/sdhci-of-hlwd.c new file mode 100644 index 000000000000..35117f3ed757 --- /dev/null +++ b/drivers/mmc/host/sdhci-of-hlwd.c | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * drivers/mmc/host/sdhci-of-hlwd.c | ||
3 | * | ||
4 | * Nintendo Wii Secure Digital Host Controller Interface. | ||
5 | * Copyright (C) 2009 The GameCube Linux Team | ||
6 | * Copyright (C) 2009 Albert Herranz | ||
7 | * | ||
8 | * Based on sdhci-of-esdhc.c | ||
9 | * | ||
10 | * Copyright (c) 2007 Freescale Semiconductor, Inc. | ||
11 | * Copyright (c) 2009 MontaVista Software, Inc. | ||
12 | * | ||
13 | * Authors: Xiaobo Xie <X.Xie@freescale.com> | ||
14 | * Anton Vorontsov <avorontsov@ru.mvista.com> | ||
15 | * | ||
16 | * This program is free software; you can redistribute it and/or modify | ||
17 | * it under the terms of the GNU General Public License as published by | ||
18 | * the Free Software Foundation; either version 2 of the License, or (at | ||
19 | * your option) any later version. | ||
20 | */ | ||
21 | |||
22 | #include <linux/delay.h> | ||
23 | #include <linux/mmc/host.h> | ||
24 | #include "sdhci-of.h" | ||
25 | #include "sdhci.h" | ||
26 | |||
27 | /* | ||
28 | * Ops and quirks for the Nintendo Wii SDHCI controllers. | ||
29 | */ | ||
30 | |||
31 | /* | ||
32 | * We need a small delay after each write, or things go horribly wrong. | ||
33 | */ | ||
34 | #define SDHCI_HLWD_WRITE_DELAY 5 /* usecs */ | ||
35 | |||
36 | static void sdhci_hlwd_writel(struct sdhci_host *host, u32 val, int reg) | ||
37 | { | ||
38 | sdhci_be32bs_writel(host, val, reg); | ||
39 | udelay(SDHCI_HLWD_WRITE_DELAY); | ||
40 | } | ||
41 | |||
42 | static void sdhci_hlwd_writew(struct sdhci_host *host, u16 val, int reg) | ||
43 | { | ||
44 | sdhci_be32bs_writew(host, val, reg); | ||
45 | udelay(SDHCI_HLWD_WRITE_DELAY); | ||
46 | } | ||
47 | |||
48 | static void sdhci_hlwd_writeb(struct sdhci_host *host, u8 val, int reg) | ||
49 | { | ||
50 | sdhci_be32bs_writeb(host, val, reg); | ||
51 | udelay(SDHCI_HLWD_WRITE_DELAY); | ||
52 | } | ||
53 | |||
54 | struct sdhci_of_data sdhci_hlwd = { | ||
55 | .quirks = SDHCI_QUIRK_32BIT_DMA_ADDR | | ||
56 | SDHCI_QUIRK_32BIT_DMA_SIZE, | ||
57 | .ops = { | ||
58 | .readl = sdhci_be32bs_readl, | ||
59 | .readw = sdhci_be32bs_readw, | ||
60 | .readb = sdhci_be32bs_readb, | ||
61 | .writel = sdhci_hlwd_writel, | ||
62 | .writew = sdhci_hlwd_writew, | ||
63 | .writeb = sdhci_hlwd_writeb, | ||
64 | }, | ||
65 | }; | ||
diff --git a/drivers/mmc/host/sdhci-of.h b/drivers/mmc/host/sdhci-of.h new file mode 100644 index 000000000000..ad09ad9915d8 --- /dev/null +++ b/drivers/mmc/host/sdhci-of.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * OpenFirmware bindings for Secure Digital Host Controller Interface. | ||
3 | * | ||
4 | * Copyright (c) 2007 Freescale Semiconductor, Inc. | ||
5 | * Copyright (c) 2009 MontaVista Software, Inc. | ||
6 | * | ||
7 | * Authors: Xiaobo Xie <X.Xie@freescale.com> | ||
8 | * Anton Vorontsov <avorontsov@ru.mvista.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify | ||
11 | * it under the terms of the GNU General Public License as published by | ||
12 | * the Free Software Foundation; either version 2 of the License, or (at | ||
13 | * your option) any later version. | ||
14 | */ | ||
15 | |||
16 | #ifndef __SDHCI_OF_H | ||
17 | #define __SDHCI_OF_H | ||
18 | |||
19 | #include <linux/types.h> | ||
20 | #include "sdhci.h" | ||
21 | |||
22 | struct sdhci_of_data { | ||
23 | unsigned int quirks; | ||
24 | struct sdhci_ops ops; | ||
25 | }; | ||
26 | |||
27 | struct sdhci_of_host { | ||
28 | unsigned int clock; | ||
29 | u16 xfer_mode_shadow; | ||
30 | }; | ||
31 | |||
32 | extern u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg); | ||
33 | extern u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg); | ||
34 | extern u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg); | ||
35 | extern void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg); | ||
36 | extern void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg); | ||
37 | extern void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg); | ||
38 | |||
39 | extern struct sdhci_of_data sdhci_esdhc; | ||
40 | extern struct sdhci_of_data sdhci_hlwd; | ||
41 | |||
42 | #endif /* __SDHCI_OF_H */ | ||
diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h index ce5f1d73dc04..842f46f94284 100644 --- a/drivers/mmc/host/sdhci.h +++ b/drivers/mmc/host/sdhci.h | |||
@@ -8,6 +8,8 @@ | |||
8 | * the Free Software Foundation; either version 2 of the License, or (at | 8 | * the Free Software Foundation; either version 2 of the License, or (at |
9 | * your option) any later version. | 9 | * your option) any later version. |
10 | */ | 10 | */ |
11 | #ifndef __SDHCI_H | ||
12 | #define __SDHCI_H | ||
11 | 13 | ||
12 | #include <linux/scatterlist.h> | 14 | #include <linux/scatterlist.h> |
13 | #include <linux/compiler.h> | 15 | #include <linux/compiler.h> |
@@ -408,3 +410,5 @@ extern void sdhci_remove_host(struct sdhci_host *host, int dead); | |||
408 | extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state); | 410 | extern int sdhci_suspend_host(struct sdhci_host *host, pm_message_t state); |
409 | extern int sdhci_resume_host(struct sdhci_host *host); | 411 | extern int sdhci_resume_host(struct sdhci_host *host); |
410 | #endif | 412 | #endif |
413 | |||
414 | #endif /* __SDHCI_H */ | ||
diff --git a/drivers/mtd/maps/pxa2xx-flash.c b/drivers/mtd/maps/pxa2xx-flash.c index 74fa075c838a..b13f6417b5b2 100644 --- a/drivers/mtd/maps/pxa2xx-flash.c +++ b/drivers/mtd/maps/pxa2xx-flash.c | |||
@@ -20,14 +20,23 @@ | |||
20 | 20 | ||
21 | #include <asm/io.h> | 21 | #include <asm/io.h> |
22 | #include <mach/hardware.h> | 22 | #include <mach/hardware.h> |
23 | #include <asm/cacheflush.h> | ||
24 | 23 | ||
25 | #include <asm/mach/flash.h> | 24 | #include <asm/mach/flash.h> |
26 | 25 | ||
26 | #define CACHELINESIZE 32 | ||
27 | |||
27 | static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from, | 28 | static void pxa2xx_map_inval_cache(struct map_info *map, unsigned long from, |
28 | ssize_t len) | 29 | ssize_t len) |
29 | { | 30 | { |
30 | flush_ioremap_region(map->phys, map->cached, from, len); | 31 | unsigned long start = (unsigned long)map->cached + from; |
32 | unsigned long end = start + len; | ||
33 | |||
34 | start &= ~(CACHELINESIZE - 1); | ||
35 | while (start < end) { | ||
36 | /* invalidate D cache line */ | ||
37 | asm volatile ("mcr p15, 0, %0, c7, c6, 1" : : "r" (start)); | ||
38 | start += CACHELINESIZE; | ||
39 | } | ||
31 | } | 40 | } |
32 | 41 | ||
33 | struct pxa2xx_flash_info { | 42 | struct pxa2xx_flash_info { |
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig index 7678538344f4..677cd53f18c3 100644 --- a/drivers/mtd/nand/Kconfig +++ b/drivers/mtd/nand/Kconfig | |||
@@ -291,14 +291,6 @@ config MTD_NAND_SHARPSL | |||
291 | tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" | 291 | tristate "Support for NAND Flash on Sharp SL Series (C7xx + others)" |
292 | depends on ARCH_PXA | 292 | depends on ARCH_PXA |
293 | 293 | ||
294 | config MTD_NAND_BASLER_EXCITE | ||
295 | tristate "Support for NAND Flash on Basler eXcite" | ||
296 | depends on BASLER_EXCITE | ||
297 | help | ||
298 | This enables the driver for the NAND flash device found on the | ||
299 | Basler eXcite Smart Camera. If built as a module, the driver | ||
300 | will be named excite_nandflash. | ||
301 | |||
302 | config MTD_NAND_CAFE | 294 | config MTD_NAND_CAFE |
303 | tristate "NAND support for OLPC CAFÉ chip" | 295 | tristate "NAND support for OLPC CAFÉ chip" |
304 | depends on PCI | 296 | depends on PCI |
diff --git a/drivers/mtd/nand/Makefile b/drivers/mtd/nand/Makefile index 460a1f39a8d1..1407bd144015 100644 --- a/drivers/mtd/nand/Makefile +++ b/drivers/mtd/nand/Makefile | |||
@@ -27,7 +27,6 @@ obj-$(CONFIG_MTD_NAND_ATMEL) += atmel_nand.o | |||
27 | obj-$(CONFIG_MTD_NAND_GPIO) += gpio.o | 27 | obj-$(CONFIG_MTD_NAND_GPIO) += gpio.o |
28 | obj-$(CONFIG_MTD_NAND_OMAP2) += omap2.o | 28 | obj-$(CONFIG_MTD_NAND_OMAP2) += omap2.o |
29 | obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o | 29 | obj-$(CONFIG_MTD_NAND_CM_X270) += cmx270_nand.o |
30 | obj-$(CONFIG_MTD_NAND_BASLER_EXCITE) += excite_nandflash.o | ||
31 | obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o | 30 | obj-$(CONFIG_MTD_NAND_PXA3xx) += pxa3xx_nand.o |
32 | obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o | 31 | obj-$(CONFIG_MTD_NAND_TMIO) += tmio_nand.o |
33 | obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o | 32 | obj-$(CONFIG_MTD_NAND_PLATFORM) += plat_nand.o |
diff --git a/drivers/mtd/nand/excite_nandflash.c b/drivers/mtd/nand/excite_nandflash.c deleted file mode 100644 index af6a6a5399e1..000000000000 --- a/drivers/mtd/nand/excite_nandflash.c +++ /dev/null | |||
@@ -1,248 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2005 - 2007 by Basler Vision Technologies AG | ||
3 | * Author: Thomas Koeller <thomas.koeller.qbaslerweb.com> | ||
4 | * Original code by Thies Moeller <thies.moeller@baslerweb.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
19 | */ | ||
20 | |||
21 | #include <linux/module.h> | ||
22 | #include <linux/types.h> | ||
23 | #include <linux/init.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/string.h> | ||
26 | #include <linux/ioport.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/err.h> | ||
30 | |||
31 | #include <linux/mtd/mtd.h> | ||
32 | #include <linux/mtd/nand.h> | ||
33 | #include <linux/mtd/nand_ecc.h> | ||
34 | #include <linux/mtd/partitions.h> | ||
35 | |||
36 | #include <asm/io.h> | ||
37 | #include <asm/rm9k-ocd.h> | ||
38 | |||
39 | #include <excite_nandflash.h> | ||
40 | |||
41 | #define EXCITE_NANDFLASH_VERSION "0.1" | ||
42 | |||
43 | /* I/O register offsets */ | ||
44 | #define EXCITE_NANDFLASH_DATA_BYTE 0x00 | ||
45 | #define EXCITE_NANDFLASH_STATUS_BYTE 0x0c | ||
46 | #define EXCITE_NANDFLASH_ADDR_BYTE 0x10 | ||
47 | #define EXCITE_NANDFLASH_CMD_BYTE 0x14 | ||
48 | |||
49 | /* prefix for debug output */ | ||
50 | static const char module_id[] = "excite_nandflash"; | ||
51 | |||
52 | /* | ||
53 | * partition definition | ||
54 | */ | ||
55 | static const struct mtd_partition partition_info[] = { | ||
56 | { | ||
57 | .name = "eXcite RootFS", | ||
58 | .offset = 0, | ||
59 | .size = MTDPART_SIZ_FULL | ||
60 | } | ||
61 | }; | ||
62 | |||
63 | static inline const struct resource * | ||
64 | excite_nand_get_resource(struct platform_device *d, unsigned long flags, | ||
65 | const char *basename) | ||
66 | { | ||
67 | char buf[80]; | ||
68 | |||
69 | if (snprintf(buf, sizeof buf, "%s_%u", basename, d->id) >= sizeof buf) | ||
70 | return NULL; | ||
71 | return platform_get_resource_byname(d, flags, buf); | ||
72 | } | ||
73 | |||
74 | static inline void __iomem * | ||
75 | excite_nand_map_regs(struct platform_device *d, const char *basename) | ||
76 | { | ||
77 | void *result = NULL; | ||
78 | const struct resource *const r = | ||
79 | excite_nand_get_resource(d, IORESOURCE_MEM, basename); | ||
80 | |||
81 | if (r) | ||
82 | result = ioremap_nocache(r->start, r->end + 1 - r->start); | ||
83 | return result; | ||
84 | } | ||
85 | |||
86 | /* controller and mtd information */ | ||
87 | struct excite_nand_drvdata { | ||
88 | struct mtd_info board_mtd; | ||
89 | struct nand_chip board_chip; | ||
90 | void __iomem *regs; | ||
91 | void __iomem *tgt; | ||
92 | }; | ||
93 | |||
94 | /* Control function */ | ||
95 | static void excite_nand_control(struct mtd_info *mtd, int cmd, | ||
96 | unsigned int ctrl) | ||
97 | { | ||
98 | struct excite_nand_drvdata * const d = | ||
99 | container_of(mtd, struct excite_nand_drvdata, board_mtd); | ||
100 | |||
101 | switch (ctrl) { | ||
102 | case NAND_CTRL_CHANGE | NAND_CTRL_CLE: | ||
103 | d->tgt = d->regs + EXCITE_NANDFLASH_CMD_BYTE; | ||
104 | break; | ||
105 | case NAND_CTRL_CHANGE | NAND_CTRL_ALE: | ||
106 | d->tgt = d->regs + EXCITE_NANDFLASH_ADDR_BYTE; | ||
107 | break; | ||
108 | case NAND_CTRL_CHANGE | NAND_NCE: | ||
109 | d->tgt = d->regs + EXCITE_NANDFLASH_DATA_BYTE; | ||
110 | break; | ||
111 | } | ||
112 | |||
113 | if (cmd != NAND_CMD_NONE) | ||
114 | __raw_writeb(cmd, d->tgt); | ||
115 | } | ||
116 | |||
117 | /* Return 0 if flash is busy, 1 if ready */ | ||
118 | static int excite_nand_devready(struct mtd_info *mtd) | ||
119 | { | ||
120 | struct excite_nand_drvdata * const drvdata = | ||
121 | container_of(mtd, struct excite_nand_drvdata, board_mtd); | ||
122 | |||
123 | return __raw_readb(drvdata->regs + EXCITE_NANDFLASH_STATUS_BYTE); | ||
124 | } | ||
125 | |||
126 | /* | ||
127 | * Called by device layer to remove the driver. | ||
128 | * The binding to the mtd and all allocated | ||
129 | * resources are released. | ||
130 | */ | ||
131 | static int __devexit excite_nand_remove(struct platform_device *dev) | ||
132 | { | ||
133 | struct excite_nand_drvdata * const this = platform_get_drvdata(dev); | ||
134 | |||
135 | platform_set_drvdata(dev, NULL); | ||
136 | |||
137 | if (unlikely(!this)) { | ||
138 | printk(KERN_ERR "%s: called %s without private data!!", | ||
139 | module_id, __func__); | ||
140 | return -EINVAL; | ||
141 | } | ||
142 | |||
143 | /* first thing we need to do is release our mtd | ||
144 | * then go through freeing the resource used | ||
145 | */ | ||
146 | nand_release(&this->board_mtd); | ||
147 | |||
148 | /* free the common resources */ | ||
149 | iounmap(this->regs); | ||
150 | kfree(this); | ||
151 | |||
152 | DEBUG(MTD_DEBUG_LEVEL1, "%s: removed\n", module_id); | ||
153 | return 0; | ||
154 | } | ||
155 | |||
156 | /* | ||
157 | * Called by device layer when it finds a device matching | ||
158 | * one our driver can handle. This code checks to see if | ||
159 | * it can allocate all necessary resources then calls the | ||
160 | * nand layer to look for devices. | ||
161 | */ | ||
162 | static int __init excite_nand_probe(struct platform_device *pdev) | ||
163 | { | ||
164 | struct excite_nand_drvdata *drvdata; /* private driver data */ | ||
165 | struct nand_chip *board_chip; /* private flash chip data */ | ||
166 | struct mtd_info *board_mtd; /* mtd info for this board */ | ||
167 | int scan_res; | ||
168 | |||
169 | drvdata = kzalloc(sizeof(*drvdata), GFP_KERNEL); | ||
170 | if (unlikely(!drvdata)) { | ||
171 | printk(KERN_ERR "%s: no memory for drvdata\n", | ||
172 | module_id); | ||
173 | return -ENOMEM; | ||
174 | } | ||
175 | |||
176 | /* bind private data into driver */ | ||
177 | platform_set_drvdata(pdev, drvdata); | ||
178 | |||
179 | /* allocate and map the resource */ | ||
180 | drvdata->regs = | ||
181 | excite_nand_map_regs(pdev, EXCITE_NANDFLASH_RESOURCE_REGS); | ||
182 | |||
183 | if (unlikely(!drvdata->regs)) { | ||
184 | printk(KERN_ERR "%s: cannot reserve register region\n", | ||
185 | module_id); | ||
186 | kfree(drvdata); | ||
187 | return -ENXIO; | ||
188 | } | ||
189 | |||
190 | drvdata->tgt = drvdata->regs + EXCITE_NANDFLASH_DATA_BYTE; | ||
191 | |||
192 | /* initialise our chip */ | ||
193 | board_chip = &drvdata->board_chip; | ||
194 | board_chip->IO_ADDR_R = board_chip->IO_ADDR_W = | ||
195 | drvdata->regs + EXCITE_NANDFLASH_DATA_BYTE; | ||
196 | board_chip->cmd_ctrl = excite_nand_control; | ||
197 | board_chip->dev_ready = excite_nand_devready; | ||
198 | board_chip->chip_delay = 25; | ||
199 | board_chip->ecc.mode = NAND_ECC_SOFT; | ||
200 | |||
201 | /* link chip to mtd */ | ||
202 | board_mtd = &drvdata->board_mtd; | ||
203 | board_mtd->priv = board_chip; | ||
204 | |||
205 | DEBUG(MTD_DEBUG_LEVEL2, "%s: device scan\n", module_id); | ||
206 | scan_res = nand_scan(&drvdata->board_mtd, 1); | ||
207 | |||
208 | if (likely(!scan_res)) { | ||
209 | DEBUG(MTD_DEBUG_LEVEL2, "%s: register partitions\n", module_id); | ||
210 | add_mtd_partitions(&drvdata->board_mtd, partition_info, | ||
211 | ARRAY_SIZE(partition_info)); | ||
212 | } else { | ||
213 | iounmap(drvdata->regs); | ||
214 | kfree(drvdata); | ||
215 | printk(KERN_ERR "%s: device scan failed\n", module_id); | ||
216 | return -EIO; | ||
217 | } | ||
218 | return 0; | ||
219 | } | ||
220 | |||
221 | static struct platform_driver excite_nand_driver = { | ||
222 | .driver = { | ||
223 | .name = "excite_nand", | ||
224 | .owner = THIS_MODULE, | ||
225 | }, | ||
226 | .probe = excite_nand_probe, | ||
227 | .remove = __devexit_p(excite_nand_remove) | ||
228 | }; | ||
229 | |||
230 | static int __init excite_nand_init(void) | ||
231 | { | ||
232 | pr_info("Basler eXcite nand flash driver Version " | ||
233 | EXCITE_NANDFLASH_VERSION "\n"); | ||
234 | return platform_driver_register(&excite_nand_driver); | ||
235 | } | ||
236 | |||
237 | static void __exit excite_nand_exit(void) | ||
238 | { | ||
239 | platform_driver_unregister(&excite_nand_driver); | ||
240 | } | ||
241 | |||
242 | module_init(excite_nand_init); | ||
243 | module_exit(excite_nand_exit); | ||
244 | |||
245 | MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>"); | ||
246 | MODULE_DESCRIPTION("Basler eXcite NAND-Flash driver"); | ||
247 | MODULE_LICENSE("GPL"); | ||
248 | MODULE_VERSION(EXCITE_NANDFLASH_VERSION) | ||
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig index a5be9ac6405c..e58a65391ad2 100644 --- a/drivers/net/Kconfig +++ b/drivers/net/Kconfig | |||
@@ -1953,6 +1953,8 @@ config BCM63XX_ENET | |||
1953 | 1953 | ||
1954 | source "drivers/net/fs_enet/Kconfig" | 1954 | source "drivers/net/fs_enet/Kconfig" |
1955 | 1955 | ||
1956 | source "drivers/net/octeon/Kconfig" | ||
1957 | |||
1956 | endif # NET_ETHERNET | 1958 | endif # NET_ETHERNET |
1957 | 1959 | ||
1958 | # | 1960 | # |
diff --git a/drivers/net/Makefile b/drivers/net/Makefile index 246323d7f161..ad1346dd9da9 100644 --- a/drivers/net/Makefile +++ b/drivers/net/Makefile | |||
@@ -285,3 +285,5 @@ obj-$(CONFIG_VIRTIO_NET) += virtio_net.o | |||
285 | obj-$(CONFIG_SFC) += sfc/ | 285 | obj-$(CONFIG_SFC) += sfc/ |
286 | 286 | ||
287 | obj-$(CONFIG_WIMAX) += wimax/ | 287 | obj-$(CONFIG_WIMAX) += wimax/ |
288 | |||
289 | obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon/ | ||
diff --git a/drivers/net/octeon/Kconfig b/drivers/net/octeon/Kconfig new file mode 100644 index 000000000000..1e56bbf3f5c0 --- /dev/null +++ b/drivers/net/octeon/Kconfig | |||
@@ -0,0 +1,10 @@ | |||
1 | config OCTEON_MGMT_ETHERNET | ||
2 | tristate "Octeon Management port ethernet driver (CN5XXX, CN6XXX)" | ||
3 | depends on CPU_CAVIUM_OCTEON | ||
4 | select PHYLIB | ||
5 | select MDIO_OCTEON | ||
6 | default y | ||
7 | help | ||
8 | This option enables the ethernet driver for the management | ||
9 | port on Cavium Networks' Octeon CN57XX, CN56XX, CN55XX, | ||
10 | CN54XX, CN52XX, and CN6XXX chips. | ||
diff --git a/drivers/net/octeon/Makefile b/drivers/net/octeon/Makefile new file mode 100644 index 000000000000..906edecacfd3 --- /dev/null +++ b/drivers/net/octeon/Makefile | |||
@@ -0,0 +1,2 @@ | |||
1 | |||
2 | obj-$(CONFIG_OCTEON_MGMT_ETHERNET) += octeon_mgmt.o | ||
diff --git a/drivers/net/octeon/octeon_mgmt.c b/drivers/net/octeon/octeon_mgmt.c new file mode 100644 index 000000000000..050538bf155a --- /dev/null +++ b/drivers/net/octeon/octeon_mgmt.c | |||
@@ -0,0 +1,1176 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2009 Cavium Networks | ||
7 | */ | ||
8 | |||
9 | #include <linux/capability.h> | ||
10 | #include <linux/dma-mapping.h> | ||
11 | #include <linux/init.h> | ||
12 | #include <linux/platform_device.h> | ||
13 | #include <linux/netdevice.h> | ||
14 | #include <linux/etherdevice.h> | ||
15 | #include <linux/if_vlan.h> | ||
16 | #include <linux/phy.h> | ||
17 | #include <linux/spinlock.h> | ||
18 | |||
19 | #include <asm/octeon/octeon.h> | ||
20 | #include <asm/octeon/cvmx-mixx-defs.h> | ||
21 | #include <asm/octeon/cvmx-agl-defs.h> | ||
22 | |||
23 | #define DRV_NAME "octeon_mgmt" | ||
24 | #define DRV_VERSION "2.0" | ||
25 | #define DRV_DESCRIPTION \ | ||
26 | "Cavium Networks Octeon MII (management) port Network Driver" | ||
27 | |||
28 | #define OCTEON_MGMT_NAPI_WEIGHT 16 | ||
29 | |||
30 | /* | ||
31 | * Ring sizes that are powers of two allow for more efficient modulo | ||
32 | * opertions. | ||
33 | */ | ||
34 | #define OCTEON_MGMT_RX_RING_SIZE 512 | ||
35 | #define OCTEON_MGMT_TX_RING_SIZE 128 | ||
36 | |||
37 | /* Allow 8 bytes for vlan and FCS. */ | ||
38 | #define OCTEON_MGMT_RX_HEADROOM (ETH_HLEN + ETH_FCS_LEN + VLAN_HLEN) | ||
39 | |||
40 | union mgmt_port_ring_entry { | ||
41 | u64 d64; | ||
42 | struct { | ||
43 | u64 reserved_62_63:2; | ||
44 | /* Length of the buffer/packet in bytes */ | ||
45 | u64 len:14; | ||
46 | /* For TX, signals that the packet should be timestamped */ | ||
47 | u64 tstamp:1; | ||
48 | /* The RX error code */ | ||
49 | u64 code:7; | ||
50 | #define RING_ENTRY_CODE_DONE 0xf | ||
51 | #define RING_ENTRY_CODE_MORE 0x10 | ||
52 | /* Physical address of the buffer */ | ||
53 | u64 addr:40; | ||
54 | } s; | ||
55 | }; | ||
56 | |||
57 | struct octeon_mgmt { | ||
58 | struct net_device *netdev; | ||
59 | int port; | ||
60 | int irq; | ||
61 | u64 *tx_ring; | ||
62 | dma_addr_t tx_ring_handle; | ||
63 | unsigned int tx_next; | ||
64 | unsigned int tx_next_clean; | ||
65 | unsigned int tx_current_fill; | ||
66 | /* The tx_list lock also protects the ring related variables */ | ||
67 | struct sk_buff_head tx_list; | ||
68 | |||
69 | /* RX variables only touched in napi_poll. No locking necessary. */ | ||
70 | u64 *rx_ring; | ||
71 | dma_addr_t rx_ring_handle; | ||
72 | unsigned int rx_next; | ||
73 | unsigned int rx_next_fill; | ||
74 | unsigned int rx_current_fill; | ||
75 | struct sk_buff_head rx_list; | ||
76 | |||
77 | spinlock_t lock; | ||
78 | unsigned int last_duplex; | ||
79 | unsigned int last_link; | ||
80 | struct device *dev; | ||
81 | struct napi_struct napi; | ||
82 | struct tasklet_struct tx_clean_tasklet; | ||
83 | struct phy_device *phydev; | ||
84 | }; | ||
85 | |||
86 | static void octeon_mgmt_set_rx_irq(struct octeon_mgmt *p, int enable) | ||
87 | { | ||
88 | int port = p->port; | ||
89 | union cvmx_mixx_intena mix_intena; | ||
90 | unsigned long flags; | ||
91 | |||
92 | spin_lock_irqsave(&p->lock, flags); | ||
93 | mix_intena.u64 = cvmx_read_csr(CVMX_MIXX_INTENA(port)); | ||
94 | mix_intena.s.ithena = enable ? 1 : 0; | ||
95 | cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64); | ||
96 | spin_unlock_irqrestore(&p->lock, flags); | ||
97 | } | ||
98 | |||
99 | static void octeon_mgmt_set_tx_irq(struct octeon_mgmt *p, int enable) | ||
100 | { | ||
101 | int port = p->port; | ||
102 | union cvmx_mixx_intena mix_intena; | ||
103 | unsigned long flags; | ||
104 | |||
105 | spin_lock_irqsave(&p->lock, flags); | ||
106 | mix_intena.u64 = cvmx_read_csr(CVMX_MIXX_INTENA(port)); | ||
107 | mix_intena.s.othena = enable ? 1 : 0; | ||
108 | cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64); | ||
109 | spin_unlock_irqrestore(&p->lock, flags); | ||
110 | } | ||
111 | |||
112 | static inline void octeon_mgmt_enable_rx_irq(struct octeon_mgmt *p) | ||
113 | { | ||
114 | octeon_mgmt_set_rx_irq(p, 1); | ||
115 | } | ||
116 | |||
117 | static inline void octeon_mgmt_disable_rx_irq(struct octeon_mgmt *p) | ||
118 | { | ||
119 | octeon_mgmt_set_rx_irq(p, 0); | ||
120 | } | ||
121 | |||
122 | static inline void octeon_mgmt_enable_tx_irq(struct octeon_mgmt *p) | ||
123 | { | ||
124 | octeon_mgmt_set_tx_irq(p, 1); | ||
125 | } | ||
126 | |||
127 | static inline void octeon_mgmt_disable_tx_irq(struct octeon_mgmt *p) | ||
128 | { | ||
129 | octeon_mgmt_set_tx_irq(p, 0); | ||
130 | } | ||
131 | |||
132 | static unsigned int ring_max_fill(unsigned int ring_size) | ||
133 | { | ||
134 | return ring_size - 8; | ||
135 | } | ||
136 | |||
137 | static unsigned int ring_size_to_bytes(unsigned int ring_size) | ||
138 | { | ||
139 | return ring_size * sizeof(union mgmt_port_ring_entry); | ||
140 | } | ||
141 | |||
142 | static void octeon_mgmt_rx_fill_ring(struct net_device *netdev) | ||
143 | { | ||
144 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
145 | int port = p->port; | ||
146 | |||
147 | while (p->rx_current_fill < ring_max_fill(OCTEON_MGMT_RX_RING_SIZE)) { | ||
148 | unsigned int size; | ||
149 | union mgmt_port_ring_entry re; | ||
150 | struct sk_buff *skb; | ||
151 | |||
152 | /* CN56XX pass 1 needs 8 bytes of padding. */ | ||
153 | size = netdev->mtu + OCTEON_MGMT_RX_HEADROOM + 8 + NET_IP_ALIGN; | ||
154 | |||
155 | skb = netdev_alloc_skb(netdev, size); | ||
156 | if (!skb) | ||
157 | break; | ||
158 | skb_reserve(skb, NET_IP_ALIGN); | ||
159 | __skb_queue_tail(&p->rx_list, skb); | ||
160 | |||
161 | re.d64 = 0; | ||
162 | re.s.len = size; | ||
163 | re.s.addr = dma_map_single(p->dev, skb->data, | ||
164 | size, | ||
165 | DMA_FROM_DEVICE); | ||
166 | |||
167 | /* Put it in the ring. */ | ||
168 | p->rx_ring[p->rx_next_fill] = re.d64; | ||
169 | dma_sync_single_for_device(p->dev, p->rx_ring_handle, | ||
170 | ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE), | ||
171 | DMA_BIDIRECTIONAL); | ||
172 | p->rx_next_fill = | ||
173 | (p->rx_next_fill + 1) % OCTEON_MGMT_RX_RING_SIZE; | ||
174 | p->rx_current_fill++; | ||
175 | /* Ring the bell. */ | ||
176 | cvmx_write_csr(CVMX_MIXX_IRING2(port), 1); | ||
177 | } | ||
178 | } | ||
179 | |||
180 | static void octeon_mgmt_clean_tx_buffers(struct octeon_mgmt *p) | ||
181 | { | ||
182 | int port = p->port; | ||
183 | union cvmx_mixx_orcnt mix_orcnt; | ||
184 | union mgmt_port_ring_entry re; | ||
185 | struct sk_buff *skb; | ||
186 | int cleaned = 0; | ||
187 | unsigned long flags; | ||
188 | |||
189 | mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port)); | ||
190 | while (mix_orcnt.s.orcnt) { | ||
191 | dma_sync_single_for_cpu(p->dev, p->tx_ring_handle, | ||
192 | ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE), | ||
193 | DMA_BIDIRECTIONAL); | ||
194 | |||
195 | spin_lock_irqsave(&p->tx_list.lock, flags); | ||
196 | |||
197 | re.d64 = p->tx_ring[p->tx_next_clean]; | ||
198 | p->tx_next_clean = | ||
199 | (p->tx_next_clean + 1) % OCTEON_MGMT_TX_RING_SIZE; | ||
200 | skb = __skb_dequeue(&p->tx_list); | ||
201 | |||
202 | mix_orcnt.u64 = 0; | ||
203 | mix_orcnt.s.orcnt = 1; | ||
204 | |||
205 | /* Acknowledge to hardware that we have the buffer. */ | ||
206 | cvmx_write_csr(CVMX_MIXX_ORCNT(port), mix_orcnt.u64); | ||
207 | p->tx_current_fill--; | ||
208 | |||
209 | spin_unlock_irqrestore(&p->tx_list.lock, flags); | ||
210 | |||
211 | dma_unmap_single(p->dev, re.s.addr, re.s.len, | ||
212 | DMA_TO_DEVICE); | ||
213 | dev_kfree_skb_any(skb); | ||
214 | cleaned++; | ||
215 | |||
216 | mix_orcnt.u64 = cvmx_read_csr(CVMX_MIXX_ORCNT(port)); | ||
217 | } | ||
218 | |||
219 | if (cleaned && netif_queue_stopped(p->netdev)) | ||
220 | netif_wake_queue(p->netdev); | ||
221 | } | ||
222 | |||
223 | static void octeon_mgmt_clean_tx_tasklet(unsigned long arg) | ||
224 | { | ||
225 | struct octeon_mgmt *p = (struct octeon_mgmt *)arg; | ||
226 | octeon_mgmt_clean_tx_buffers(p); | ||
227 | octeon_mgmt_enable_tx_irq(p); | ||
228 | } | ||
229 | |||
230 | static void octeon_mgmt_update_rx_stats(struct net_device *netdev) | ||
231 | { | ||
232 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
233 | int port = p->port; | ||
234 | unsigned long flags; | ||
235 | u64 drop, bad; | ||
236 | |||
237 | /* These reads also clear the count registers. */ | ||
238 | drop = cvmx_read_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_DRP(port)); | ||
239 | bad = cvmx_read_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_BAD(port)); | ||
240 | |||
241 | if (drop || bad) { | ||
242 | /* Do an atomic update. */ | ||
243 | spin_lock_irqsave(&p->lock, flags); | ||
244 | netdev->stats.rx_errors += bad; | ||
245 | netdev->stats.rx_dropped += drop; | ||
246 | spin_unlock_irqrestore(&p->lock, flags); | ||
247 | } | ||
248 | } | ||
249 | |||
250 | static void octeon_mgmt_update_tx_stats(struct net_device *netdev) | ||
251 | { | ||
252 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
253 | int port = p->port; | ||
254 | unsigned long flags; | ||
255 | |||
256 | union cvmx_agl_gmx_txx_stat0 s0; | ||
257 | union cvmx_agl_gmx_txx_stat1 s1; | ||
258 | |||
259 | /* These reads also clear the count registers. */ | ||
260 | s0.u64 = cvmx_read_csr(CVMX_AGL_GMX_TXX_STAT0(port)); | ||
261 | s1.u64 = cvmx_read_csr(CVMX_AGL_GMX_TXX_STAT1(port)); | ||
262 | |||
263 | if (s0.s.xsdef || s0.s.xscol || s1.s.scol || s1.s.mcol) { | ||
264 | /* Do an atomic update. */ | ||
265 | spin_lock_irqsave(&p->lock, flags); | ||
266 | netdev->stats.tx_errors += s0.s.xsdef + s0.s.xscol; | ||
267 | netdev->stats.collisions += s1.s.scol + s1.s.mcol; | ||
268 | spin_unlock_irqrestore(&p->lock, flags); | ||
269 | } | ||
270 | } | ||
271 | |||
272 | /* | ||
273 | * Dequeue a receive skb and its corresponding ring entry. The ring | ||
274 | * entry is returned, *pskb is updated to point to the skb. | ||
275 | */ | ||
276 | static u64 octeon_mgmt_dequeue_rx_buffer(struct octeon_mgmt *p, | ||
277 | struct sk_buff **pskb) | ||
278 | { | ||
279 | union mgmt_port_ring_entry re; | ||
280 | |||
281 | dma_sync_single_for_cpu(p->dev, p->rx_ring_handle, | ||
282 | ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE), | ||
283 | DMA_BIDIRECTIONAL); | ||
284 | |||
285 | re.d64 = p->rx_ring[p->rx_next]; | ||
286 | p->rx_next = (p->rx_next + 1) % OCTEON_MGMT_RX_RING_SIZE; | ||
287 | p->rx_current_fill--; | ||
288 | *pskb = __skb_dequeue(&p->rx_list); | ||
289 | |||
290 | dma_unmap_single(p->dev, re.s.addr, | ||
291 | ETH_FRAME_LEN + OCTEON_MGMT_RX_HEADROOM, | ||
292 | DMA_FROM_DEVICE); | ||
293 | |||
294 | return re.d64; | ||
295 | } | ||
296 | |||
297 | |||
298 | static int octeon_mgmt_receive_one(struct octeon_mgmt *p) | ||
299 | { | ||
300 | int port = p->port; | ||
301 | struct net_device *netdev = p->netdev; | ||
302 | union cvmx_mixx_ircnt mix_ircnt; | ||
303 | union mgmt_port_ring_entry re; | ||
304 | struct sk_buff *skb; | ||
305 | struct sk_buff *skb2; | ||
306 | struct sk_buff *skb_new; | ||
307 | union mgmt_port_ring_entry re2; | ||
308 | int rc = 1; | ||
309 | |||
310 | |||
311 | re.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb); | ||
312 | if (likely(re.s.code == RING_ENTRY_CODE_DONE)) { | ||
313 | /* A good packet, send it up. */ | ||
314 | skb_put(skb, re.s.len); | ||
315 | good: | ||
316 | skb->protocol = eth_type_trans(skb, netdev); | ||
317 | netdev->stats.rx_packets++; | ||
318 | netdev->stats.rx_bytes += skb->len; | ||
319 | netdev->last_rx = jiffies; | ||
320 | netif_receive_skb(skb); | ||
321 | rc = 0; | ||
322 | } else if (re.s.code == RING_ENTRY_CODE_MORE) { | ||
323 | /* | ||
324 | * Packet split across skbs. This can happen if we | ||
325 | * increase the MTU. Buffers that are already in the | ||
326 | * rx ring can then end up being too small. As the rx | ||
327 | * ring is refilled, buffers sized for the new MTU | ||
328 | * will be used and we should go back to the normal | ||
329 | * non-split case. | ||
330 | */ | ||
331 | skb_put(skb, re.s.len); | ||
332 | do { | ||
333 | re2.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb2); | ||
334 | if (re2.s.code != RING_ENTRY_CODE_MORE | ||
335 | && re2.s.code != RING_ENTRY_CODE_DONE) | ||
336 | goto split_error; | ||
337 | skb_put(skb2, re2.s.len); | ||
338 | skb_new = skb_copy_expand(skb, 0, skb2->len, | ||
339 | GFP_ATOMIC); | ||
340 | if (!skb_new) | ||
341 | goto split_error; | ||
342 | if (skb_copy_bits(skb2, 0, skb_tail_pointer(skb_new), | ||
343 | skb2->len)) | ||
344 | goto split_error; | ||
345 | skb_put(skb_new, skb2->len); | ||
346 | dev_kfree_skb_any(skb); | ||
347 | dev_kfree_skb_any(skb2); | ||
348 | skb = skb_new; | ||
349 | } while (re2.s.code == RING_ENTRY_CODE_MORE); | ||
350 | goto good; | ||
351 | } else { | ||
352 | /* Some other error, discard it. */ | ||
353 | dev_kfree_skb_any(skb); | ||
354 | /* | ||
355 | * Error statistics are accumulated in | ||
356 | * octeon_mgmt_update_rx_stats. | ||
357 | */ | ||
358 | } | ||
359 | goto done; | ||
360 | split_error: | ||
361 | /* Discard the whole mess. */ | ||
362 | dev_kfree_skb_any(skb); | ||
363 | dev_kfree_skb_any(skb2); | ||
364 | while (re2.s.code == RING_ENTRY_CODE_MORE) { | ||
365 | re2.d64 = octeon_mgmt_dequeue_rx_buffer(p, &skb2); | ||
366 | dev_kfree_skb_any(skb2); | ||
367 | } | ||
368 | netdev->stats.rx_errors++; | ||
369 | |||
370 | done: | ||
371 | /* Tell the hardware we processed a packet. */ | ||
372 | mix_ircnt.u64 = 0; | ||
373 | mix_ircnt.s.ircnt = 1; | ||
374 | cvmx_write_csr(CVMX_MIXX_IRCNT(port), mix_ircnt.u64); | ||
375 | return rc; | ||
376 | |||
377 | } | ||
378 | |||
379 | static int octeon_mgmt_receive_packets(struct octeon_mgmt *p, int budget) | ||
380 | { | ||
381 | int port = p->port; | ||
382 | unsigned int work_done = 0; | ||
383 | union cvmx_mixx_ircnt mix_ircnt; | ||
384 | int rc; | ||
385 | |||
386 | |||
387 | mix_ircnt.u64 = cvmx_read_csr(CVMX_MIXX_IRCNT(port)); | ||
388 | while (work_done < budget && mix_ircnt.s.ircnt) { | ||
389 | |||
390 | rc = octeon_mgmt_receive_one(p); | ||
391 | if (!rc) | ||
392 | work_done++; | ||
393 | |||
394 | /* Check for more packets. */ | ||
395 | mix_ircnt.u64 = cvmx_read_csr(CVMX_MIXX_IRCNT(port)); | ||
396 | } | ||
397 | |||
398 | octeon_mgmt_rx_fill_ring(p->netdev); | ||
399 | |||
400 | return work_done; | ||
401 | } | ||
402 | |||
403 | static int octeon_mgmt_napi_poll(struct napi_struct *napi, int budget) | ||
404 | { | ||
405 | struct octeon_mgmt *p = container_of(napi, struct octeon_mgmt, napi); | ||
406 | struct net_device *netdev = p->netdev; | ||
407 | unsigned int work_done = 0; | ||
408 | |||
409 | work_done = octeon_mgmt_receive_packets(p, budget); | ||
410 | |||
411 | if (work_done < budget) { | ||
412 | /* We stopped because no more packets were available. */ | ||
413 | napi_complete(napi); | ||
414 | octeon_mgmt_enable_rx_irq(p); | ||
415 | } | ||
416 | octeon_mgmt_update_rx_stats(netdev); | ||
417 | |||
418 | return work_done; | ||
419 | } | ||
420 | |||
421 | /* Reset the hardware to clean state. */ | ||
422 | static void octeon_mgmt_reset_hw(struct octeon_mgmt *p) | ||
423 | { | ||
424 | union cvmx_mixx_ctl mix_ctl; | ||
425 | union cvmx_mixx_bist mix_bist; | ||
426 | union cvmx_agl_gmx_bist agl_gmx_bist; | ||
427 | |||
428 | mix_ctl.u64 = 0; | ||
429 | cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64); | ||
430 | do { | ||
431 | mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(p->port)); | ||
432 | } while (mix_ctl.s.busy); | ||
433 | mix_ctl.s.reset = 1; | ||
434 | cvmx_write_csr(CVMX_MIXX_CTL(p->port), mix_ctl.u64); | ||
435 | cvmx_read_csr(CVMX_MIXX_CTL(p->port)); | ||
436 | cvmx_wait(64); | ||
437 | |||
438 | mix_bist.u64 = cvmx_read_csr(CVMX_MIXX_BIST(p->port)); | ||
439 | if (mix_bist.u64) | ||
440 | dev_warn(p->dev, "MIX failed BIST (0x%016llx)\n", | ||
441 | (unsigned long long)mix_bist.u64); | ||
442 | |||
443 | agl_gmx_bist.u64 = cvmx_read_csr(CVMX_AGL_GMX_BIST); | ||
444 | if (agl_gmx_bist.u64) | ||
445 | dev_warn(p->dev, "AGL failed BIST (0x%016llx)\n", | ||
446 | (unsigned long long)agl_gmx_bist.u64); | ||
447 | } | ||
448 | |||
449 | struct octeon_mgmt_cam_state { | ||
450 | u64 cam[6]; | ||
451 | u64 cam_mask; | ||
452 | int cam_index; | ||
453 | }; | ||
454 | |||
455 | static void octeon_mgmt_cam_state_add(struct octeon_mgmt_cam_state *cs, | ||
456 | unsigned char *addr) | ||
457 | { | ||
458 | int i; | ||
459 | |||
460 | for (i = 0; i < 6; i++) | ||
461 | cs->cam[i] |= (u64)addr[i] << (8 * (cs->cam_index)); | ||
462 | cs->cam_mask |= (1ULL << cs->cam_index); | ||
463 | cs->cam_index++; | ||
464 | } | ||
465 | |||
466 | static void octeon_mgmt_set_rx_filtering(struct net_device *netdev) | ||
467 | { | ||
468 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
469 | int port = p->port; | ||
470 | int i; | ||
471 | union cvmx_agl_gmx_rxx_adr_ctl adr_ctl; | ||
472 | union cvmx_agl_gmx_prtx_cfg agl_gmx_prtx; | ||
473 | unsigned long flags; | ||
474 | unsigned int prev_packet_enable; | ||
475 | unsigned int cam_mode = 1; /* 1 - Accept on CAM match */ | ||
476 | unsigned int multicast_mode = 1; /* 1 - Reject all multicast. */ | ||
477 | struct octeon_mgmt_cam_state cam_state; | ||
478 | struct dev_addr_list *list; | ||
479 | struct list_head *pos; | ||
480 | int available_cam_entries; | ||
481 | |||
482 | memset(&cam_state, 0, sizeof(cam_state)); | ||
483 | |||
484 | if ((netdev->flags & IFF_PROMISC) || netdev->dev_addrs.count > 7) { | ||
485 | cam_mode = 0; | ||
486 | available_cam_entries = 8; | ||
487 | } else { | ||
488 | /* | ||
489 | * One CAM entry for the primary address, leaves seven | ||
490 | * for the secondary addresses. | ||
491 | */ | ||
492 | available_cam_entries = 7 - netdev->dev_addrs.count; | ||
493 | } | ||
494 | |||
495 | if (netdev->flags & IFF_MULTICAST) { | ||
496 | if (cam_mode == 0 || (netdev->flags & IFF_ALLMULTI) | ||
497 | || netdev->mc_count > available_cam_entries) | ||
498 | multicast_mode = 2; /* 1 - Accept all multicast. */ | ||
499 | else | ||
500 | multicast_mode = 0; /* 0 - Use CAM. */ | ||
501 | } | ||
502 | |||
503 | if (cam_mode == 1) { | ||
504 | /* Add primary address. */ | ||
505 | octeon_mgmt_cam_state_add(&cam_state, netdev->dev_addr); | ||
506 | list_for_each(pos, &netdev->dev_addrs.list) { | ||
507 | struct netdev_hw_addr *hw_addr; | ||
508 | hw_addr = list_entry(pos, struct netdev_hw_addr, list); | ||
509 | octeon_mgmt_cam_state_add(&cam_state, hw_addr->addr); | ||
510 | list = list->next; | ||
511 | } | ||
512 | } | ||
513 | if (multicast_mode == 0) { | ||
514 | i = netdev->mc_count; | ||
515 | list = netdev->mc_list; | ||
516 | while (i--) { | ||
517 | octeon_mgmt_cam_state_add(&cam_state, list->da_addr); | ||
518 | list = list->next; | ||
519 | } | ||
520 | } | ||
521 | |||
522 | |||
523 | spin_lock_irqsave(&p->lock, flags); | ||
524 | |||
525 | /* Disable packet I/O. */ | ||
526 | agl_gmx_prtx.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port)); | ||
527 | prev_packet_enable = agl_gmx_prtx.s.en; | ||
528 | agl_gmx_prtx.s.en = 0; | ||
529 | cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), agl_gmx_prtx.u64); | ||
530 | |||
531 | |||
532 | adr_ctl.u64 = 0; | ||
533 | adr_ctl.s.cam_mode = cam_mode; | ||
534 | adr_ctl.s.mcst = multicast_mode; | ||
535 | adr_ctl.s.bcst = 1; /* Allow broadcast */ | ||
536 | |||
537 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CTL(port), adr_ctl.u64); | ||
538 | |||
539 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM0(port), cam_state.cam[0]); | ||
540 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM1(port), cam_state.cam[1]); | ||
541 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM2(port), cam_state.cam[2]); | ||
542 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM3(port), cam_state.cam[3]); | ||
543 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM4(port), cam_state.cam[4]); | ||
544 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM5(port), cam_state.cam[5]); | ||
545 | cvmx_write_csr(CVMX_AGL_GMX_RXX_ADR_CAM_EN(port), cam_state.cam_mask); | ||
546 | |||
547 | /* Restore packet I/O. */ | ||
548 | agl_gmx_prtx.s.en = prev_packet_enable; | ||
549 | cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), agl_gmx_prtx.u64); | ||
550 | |||
551 | spin_unlock_irqrestore(&p->lock, flags); | ||
552 | } | ||
553 | |||
554 | static int octeon_mgmt_set_mac_address(struct net_device *netdev, void *addr) | ||
555 | { | ||
556 | struct sockaddr *sa = addr; | ||
557 | |||
558 | if (!is_valid_ether_addr(sa->sa_data)) | ||
559 | return -EADDRNOTAVAIL; | ||
560 | |||
561 | memcpy(netdev->dev_addr, sa->sa_data, ETH_ALEN); | ||
562 | |||
563 | octeon_mgmt_set_rx_filtering(netdev); | ||
564 | |||
565 | return 0; | ||
566 | } | ||
567 | |||
568 | static int octeon_mgmt_change_mtu(struct net_device *netdev, int new_mtu) | ||
569 | { | ||
570 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
571 | int port = p->port; | ||
572 | int size_without_fcs = new_mtu + OCTEON_MGMT_RX_HEADROOM; | ||
573 | |||
574 | /* | ||
575 | * Limit the MTU to make sure the ethernet packets are between | ||
576 | * 64 bytes and 16383 bytes. | ||
577 | */ | ||
578 | if (size_without_fcs < 64 || size_without_fcs > 16383) { | ||
579 | dev_warn(p->dev, "MTU must be between %d and %d.\n", | ||
580 | 64 - OCTEON_MGMT_RX_HEADROOM, | ||
581 | 16383 - OCTEON_MGMT_RX_HEADROOM); | ||
582 | return -EINVAL; | ||
583 | } | ||
584 | |||
585 | netdev->mtu = new_mtu; | ||
586 | |||
587 | cvmx_write_csr(CVMX_AGL_GMX_RXX_FRM_MAX(port), size_without_fcs); | ||
588 | cvmx_write_csr(CVMX_AGL_GMX_RXX_JABBER(port), | ||
589 | (size_without_fcs + 7) & 0xfff8); | ||
590 | |||
591 | return 0; | ||
592 | } | ||
593 | |||
594 | static irqreturn_t octeon_mgmt_interrupt(int cpl, void *dev_id) | ||
595 | { | ||
596 | struct net_device *netdev = dev_id; | ||
597 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
598 | int port = p->port; | ||
599 | union cvmx_mixx_isr mixx_isr; | ||
600 | |||
601 | mixx_isr.u64 = cvmx_read_csr(CVMX_MIXX_ISR(port)); | ||
602 | |||
603 | /* Clear any pending interrupts */ | ||
604 | cvmx_write_csr(CVMX_MIXX_ISR(port), | ||
605 | cvmx_read_csr(CVMX_MIXX_ISR(port))); | ||
606 | cvmx_read_csr(CVMX_MIXX_ISR(port)); | ||
607 | |||
608 | if (mixx_isr.s.irthresh) { | ||
609 | octeon_mgmt_disable_rx_irq(p); | ||
610 | napi_schedule(&p->napi); | ||
611 | } | ||
612 | if (mixx_isr.s.orthresh) { | ||
613 | octeon_mgmt_disable_tx_irq(p); | ||
614 | tasklet_schedule(&p->tx_clean_tasklet); | ||
615 | } | ||
616 | |||
617 | return IRQ_HANDLED; | ||
618 | } | ||
619 | |||
620 | static int octeon_mgmt_ioctl(struct net_device *netdev, | ||
621 | struct ifreq *rq, int cmd) | ||
622 | { | ||
623 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
624 | |||
625 | if (!netif_running(netdev)) | ||
626 | return -EINVAL; | ||
627 | |||
628 | if (!p->phydev) | ||
629 | return -EINVAL; | ||
630 | |||
631 | return phy_mii_ioctl(p->phydev, if_mii(rq), cmd); | ||
632 | } | ||
633 | |||
634 | static void octeon_mgmt_adjust_link(struct net_device *netdev) | ||
635 | { | ||
636 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
637 | int port = p->port; | ||
638 | union cvmx_agl_gmx_prtx_cfg prtx_cfg; | ||
639 | unsigned long flags; | ||
640 | int link_changed = 0; | ||
641 | |||
642 | spin_lock_irqsave(&p->lock, flags); | ||
643 | if (p->phydev->link) { | ||
644 | if (!p->last_link) | ||
645 | link_changed = 1; | ||
646 | if (p->last_duplex != p->phydev->duplex) { | ||
647 | p->last_duplex = p->phydev->duplex; | ||
648 | prtx_cfg.u64 = | ||
649 | cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port)); | ||
650 | prtx_cfg.s.duplex = p->phydev->duplex; | ||
651 | cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), | ||
652 | prtx_cfg.u64); | ||
653 | } | ||
654 | } else { | ||
655 | if (p->last_link) | ||
656 | link_changed = -1; | ||
657 | } | ||
658 | p->last_link = p->phydev->link; | ||
659 | spin_unlock_irqrestore(&p->lock, flags); | ||
660 | |||
661 | if (link_changed != 0) { | ||
662 | if (link_changed > 0) { | ||
663 | netif_carrier_on(netdev); | ||
664 | pr_info("%s: Link is up - %d/%s\n", netdev->name, | ||
665 | p->phydev->speed, | ||
666 | DUPLEX_FULL == p->phydev->duplex ? | ||
667 | "Full" : "Half"); | ||
668 | } else { | ||
669 | netif_carrier_off(netdev); | ||
670 | pr_info("%s: Link is down\n", netdev->name); | ||
671 | } | ||
672 | } | ||
673 | } | ||
674 | |||
675 | static int octeon_mgmt_init_phy(struct net_device *netdev) | ||
676 | { | ||
677 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
678 | char phy_id[20]; | ||
679 | |||
680 | if (octeon_is_simulation()) { | ||
681 | /* No PHYs in the simulator. */ | ||
682 | netif_carrier_on(netdev); | ||
683 | return 0; | ||
684 | } | ||
685 | |||
686 | snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, "0", p->port); | ||
687 | |||
688 | p->phydev = phy_connect(netdev, phy_id, octeon_mgmt_adjust_link, 0, | ||
689 | PHY_INTERFACE_MODE_MII); | ||
690 | |||
691 | if (IS_ERR(p->phydev)) { | ||
692 | p->phydev = NULL; | ||
693 | return -1; | ||
694 | } | ||
695 | |||
696 | phy_start_aneg(p->phydev); | ||
697 | |||
698 | return 0; | ||
699 | } | ||
700 | |||
701 | static int octeon_mgmt_open(struct net_device *netdev) | ||
702 | { | ||
703 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
704 | int port = p->port; | ||
705 | union cvmx_mixx_ctl mix_ctl; | ||
706 | union cvmx_agl_gmx_inf_mode agl_gmx_inf_mode; | ||
707 | union cvmx_mixx_oring1 oring1; | ||
708 | union cvmx_mixx_iring1 iring1; | ||
709 | union cvmx_agl_gmx_prtx_cfg prtx_cfg; | ||
710 | union cvmx_agl_gmx_rxx_frm_ctl rxx_frm_ctl; | ||
711 | union cvmx_mixx_irhwm mix_irhwm; | ||
712 | union cvmx_mixx_orhwm mix_orhwm; | ||
713 | union cvmx_mixx_intena mix_intena; | ||
714 | struct sockaddr sa; | ||
715 | |||
716 | /* Allocate ring buffers. */ | ||
717 | p->tx_ring = kzalloc(ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE), | ||
718 | GFP_KERNEL); | ||
719 | if (!p->tx_ring) | ||
720 | return -ENOMEM; | ||
721 | p->tx_ring_handle = | ||
722 | dma_map_single(p->dev, p->tx_ring, | ||
723 | ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE), | ||
724 | DMA_BIDIRECTIONAL); | ||
725 | p->tx_next = 0; | ||
726 | p->tx_next_clean = 0; | ||
727 | p->tx_current_fill = 0; | ||
728 | |||
729 | |||
730 | p->rx_ring = kzalloc(ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE), | ||
731 | GFP_KERNEL); | ||
732 | if (!p->rx_ring) | ||
733 | goto err_nomem; | ||
734 | p->rx_ring_handle = | ||
735 | dma_map_single(p->dev, p->rx_ring, | ||
736 | ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE), | ||
737 | DMA_BIDIRECTIONAL); | ||
738 | |||
739 | p->rx_next = 0; | ||
740 | p->rx_next_fill = 0; | ||
741 | p->rx_current_fill = 0; | ||
742 | |||
743 | octeon_mgmt_reset_hw(p); | ||
744 | |||
745 | mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port)); | ||
746 | |||
747 | /* Bring it out of reset if needed. */ | ||
748 | if (mix_ctl.s.reset) { | ||
749 | mix_ctl.s.reset = 0; | ||
750 | cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64); | ||
751 | do { | ||
752 | mix_ctl.u64 = cvmx_read_csr(CVMX_MIXX_CTL(port)); | ||
753 | } while (mix_ctl.s.reset); | ||
754 | } | ||
755 | |||
756 | agl_gmx_inf_mode.u64 = 0; | ||
757 | agl_gmx_inf_mode.s.en = 1; | ||
758 | cvmx_write_csr(CVMX_AGL_GMX_INF_MODE, agl_gmx_inf_mode.u64); | ||
759 | |||
760 | oring1.u64 = 0; | ||
761 | oring1.s.obase = p->tx_ring_handle >> 3; | ||
762 | oring1.s.osize = OCTEON_MGMT_TX_RING_SIZE; | ||
763 | cvmx_write_csr(CVMX_MIXX_ORING1(port), oring1.u64); | ||
764 | |||
765 | iring1.u64 = 0; | ||
766 | iring1.s.ibase = p->rx_ring_handle >> 3; | ||
767 | iring1.s.isize = OCTEON_MGMT_RX_RING_SIZE; | ||
768 | cvmx_write_csr(CVMX_MIXX_IRING1(port), iring1.u64); | ||
769 | |||
770 | /* Disable packet I/O. */ | ||
771 | prtx_cfg.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port)); | ||
772 | prtx_cfg.s.en = 0; | ||
773 | cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), prtx_cfg.u64); | ||
774 | |||
775 | memcpy(sa.sa_data, netdev->dev_addr, ETH_ALEN); | ||
776 | octeon_mgmt_set_mac_address(netdev, &sa); | ||
777 | |||
778 | octeon_mgmt_change_mtu(netdev, netdev->mtu); | ||
779 | |||
780 | /* | ||
781 | * Enable the port HW. Packets are not allowed until | ||
782 | * cvmx_mgmt_port_enable() is called. | ||
783 | */ | ||
784 | mix_ctl.u64 = 0; | ||
785 | mix_ctl.s.crc_strip = 1; /* Strip the ending CRC */ | ||
786 | mix_ctl.s.en = 1; /* Enable the port */ | ||
787 | mix_ctl.s.nbtarb = 0; /* Arbitration mode */ | ||
788 | /* MII CB-request FIFO programmable high watermark */ | ||
789 | mix_ctl.s.mrq_hwm = 1; | ||
790 | cvmx_write_csr(CVMX_MIXX_CTL(port), mix_ctl.u64); | ||
791 | |||
792 | if (OCTEON_IS_MODEL(OCTEON_CN56XX_PASS1_X) | ||
793 | || OCTEON_IS_MODEL(OCTEON_CN52XX_PASS1_X)) { | ||
794 | /* | ||
795 | * Force compensation values, as they are not | ||
796 | * determined properly by HW | ||
797 | */ | ||
798 | union cvmx_agl_gmx_drv_ctl drv_ctl; | ||
799 | |||
800 | drv_ctl.u64 = cvmx_read_csr(CVMX_AGL_GMX_DRV_CTL); | ||
801 | if (port) { | ||
802 | drv_ctl.s.byp_en1 = 1; | ||
803 | drv_ctl.s.nctl1 = 6; | ||
804 | drv_ctl.s.pctl1 = 6; | ||
805 | } else { | ||
806 | drv_ctl.s.byp_en = 1; | ||
807 | drv_ctl.s.nctl = 6; | ||
808 | drv_ctl.s.pctl = 6; | ||
809 | } | ||
810 | cvmx_write_csr(CVMX_AGL_GMX_DRV_CTL, drv_ctl.u64); | ||
811 | } | ||
812 | |||
813 | octeon_mgmt_rx_fill_ring(netdev); | ||
814 | |||
815 | /* Clear statistics. */ | ||
816 | /* Clear on read. */ | ||
817 | cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_CTL(port), 1); | ||
818 | cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_DRP(port), 0); | ||
819 | cvmx_write_csr(CVMX_AGL_GMX_RXX_STATS_PKTS_BAD(port), 0); | ||
820 | |||
821 | cvmx_write_csr(CVMX_AGL_GMX_TXX_STATS_CTL(port), 1); | ||
822 | cvmx_write_csr(CVMX_AGL_GMX_TXX_STAT0(port), 0); | ||
823 | cvmx_write_csr(CVMX_AGL_GMX_TXX_STAT1(port), 0); | ||
824 | |||
825 | /* Clear any pending interrupts */ | ||
826 | cvmx_write_csr(CVMX_MIXX_ISR(port), cvmx_read_csr(CVMX_MIXX_ISR(port))); | ||
827 | |||
828 | if (request_irq(p->irq, octeon_mgmt_interrupt, 0, netdev->name, | ||
829 | netdev)) { | ||
830 | dev_err(p->dev, "request_irq(%d) failed.\n", p->irq); | ||
831 | goto err_noirq; | ||
832 | } | ||
833 | |||
834 | /* Interrupt every single RX packet */ | ||
835 | mix_irhwm.u64 = 0; | ||
836 | mix_irhwm.s.irhwm = 0; | ||
837 | cvmx_write_csr(CVMX_MIXX_IRHWM(port), mix_irhwm.u64); | ||
838 | |||
839 | /* Interrupt when we have 5 or more packets to clean. */ | ||
840 | mix_orhwm.u64 = 0; | ||
841 | mix_orhwm.s.orhwm = 5; | ||
842 | cvmx_write_csr(CVMX_MIXX_ORHWM(port), mix_orhwm.u64); | ||
843 | |||
844 | /* Enable receive and transmit interrupts */ | ||
845 | mix_intena.u64 = 0; | ||
846 | mix_intena.s.ithena = 1; | ||
847 | mix_intena.s.othena = 1; | ||
848 | cvmx_write_csr(CVMX_MIXX_INTENA(port), mix_intena.u64); | ||
849 | |||
850 | |||
851 | /* Enable packet I/O. */ | ||
852 | |||
853 | rxx_frm_ctl.u64 = 0; | ||
854 | rxx_frm_ctl.s.pre_align = 1; | ||
855 | /* | ||
856 | * When set, disables the length check for non-min sized pkts | ||
857 | * with padding in the client data. | ||
858 | */ | ||
859 | rxx_frm_ctl.s.pad_len = 1; | ||
860 | /* When set, disables the length check for VLAN pkts */ | ||
861 | rxx_frm_ctl.s.vlan_len = 1; | ||
862 | /* When set, PREAMBLE checking is less strict */ | ||
863 | rxx_frm_ctl.s.pre_free = 1; | ||
864 | /* Control Pause Frames can match station SMAC */ | ||
865 | rxx_frm_ctl.s.ctl_smac = 0; | ||
866 | /* Control Pause Frames can match globally assign Multicast address */ | ||
867 | rxx_frm_ctl.s.ctl_mcst = 1; | ||
868 | /* Forward pause information to TX block */ | ||
869 | rxx_frm_ctl.s.ctl_bck = 1; | ||
870 | /* Drop Control Pause Frames */ | ||
871 | rxx_frm_ctl.s.ctl_drp = 1; | ||
872 | /* Strip off the preamble */ | ||
873 | rxx_frm_ctl.s.pre_strp = 1; | ||
874 | /* | ||
875 | * This port is configured to send PREAMBLE+SFD to begin every | ||
876 | * frame. GMX checks that the PREAMBLE is sent correctly. | ||
877 | */ | ||
878 | rxx_frm_ctl.s.pre_chk = 1; | ||
879 | cvmx_write_csr(CVMX_AGL_GMX_RXX_FRM_CTL(port), rxx_frm_ctl.u64); | ||
880 | |||
881 | /* Enable the AGL block */ | ||
882 | agl_gmx_inf_mode.u64 = 0; | ||
883 | agl_gmx_inf_mode.s.en = 1; | ||
884 | cvmx_write_csr(CVMX_AGL_GMX_INF_MODE, agl_gmx_inf_mode.u64); | ||
885 | |||
886 | /* Configure the port duplex and enables */ | ||
887 | prtx_cfg.u64 = cvmx_read_csr(CVMX_AGL_GMX_PRTX_CFG(port)); | ||
888 | prtx_cfg.s.tx_en = 1; | ||
889 | prtx_cfg.s.rx_en = 1; | ||
890 | prtx_cfg.s.en = 1; | ||
891 | p->last_duplex = 1; | ||
892 | prtx_cfg.s.duplex = p->last_duplex; | ||
893 | cvmx_write_csr(CVMX_AGL_GMX_PRTX_CFG(port), prtx_cfg.u64); | ||
894 | |||
895 | p->last_link = 0; | ||
896 | netif_carrier_off(netdev); | ||
897 | |||
898 | if (octeon_mgmt_init_phy(netdev)) { | ||
899 | dev_err(p->dev, "Cannot initialize PHY.\n"); | ||
900 | goto err_noirq; | ||
901 | } | ||
902 | |||
903 | netif_wake_queue(netdev); | ||
904 | napi_enable(&p->napi); | ||
905 | |||
906 | return 0; | ||
907 | err_noirq: | ||
908 | octeon_mgmt_reset_hw(p); | ||
909 | dma_unmap_single(p->dev, p->rx_ring_handle, | ||
910 | ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE), | ||
911 | DMA_BIDIRECTIONAL); | ||
912 | kfree(p->rx_ring); | ||
913 | err_nomem: | ||
914 | dma_unmap_single(p->dev, p->tx_ring_handle, | ||
915 | ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE), | ||
916 | DMA_BIDIRECTIONAL); | ||
917 | kfree(p->tx_ring); | ||
918 | return -ENOMEM; | ||
919 | } | ||
920 | |||
921 | static int octeon_mgmt_stop(struct net_device *netdev) | ||
922 | { | ||
923 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
924 | |||
925 | napi_disable(&p->napi); | ||
926 | netif_stop_queue(netdev); | ||
927 | |||
928 | if (p->phydev) | ||
929 | phy_disconnect(p->phydev); | ||
930 | |||
931 | netif_carrier_off(netdev); | ||
932 | |||
933 | octeon_mgmt_reset_hw(p); | ||
934 | |||
935 | |||
936 | free_irq(p->irq, netdev); | ||
937 | |||
938 | /* dma_unmap is a nop on Octeon, so just free everything. */ | ||
939 | skb_queue_purge(&p->tx_list); | ||
940 | skb_queue_purge(&p->rx_list); | ||
941 | |||
942 | dma_unmap_single(p->dev, p->rx_ring_handle, | ||
943 | ring_size_to_bytes(OCTEON_MGMT_RX_RING_SIZE), | ||
944 | DMA_BIDIRECTIONAL); | ||
945 | kfree(p->rx_ring); | ||
946 | |||
947 | dma_unmap_single(p->dev, p->tx_ring_handle, | ||
948 | ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE), | ||
949 | DMA_BIDIRECTIONAL); | ||
950 | kfree(p->tx_ring); | ||
951 | |||
952 | |||
953 | return 0; | ||
954 | } | ||
955 | |||
956 | static int octeon_mgmt_xmit(struct sk_buff *skb, struct net_device *netdev) | ||
957 | { | ||
958 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
959 | int port = p->port; | ||
960 | union mgmt_port_ring_entry re; | ||
961 | unsigned long flags; | ||
962 | |||
963 | re.d64 = 0; | ||
964 | re.s.len = skb->len; | ||
965 | re.s.addr = dma_map_single(p->dev, skb->data, | ||
966 | skb->len, | ||
967 | DMA_TO_DEVICE); | ||
968 | |||
969 | spin_lock_irqsave(&p->tx_list.lock, flags); | ||
970 | |||
971 | if (unlikely(p->tx_current_fill >= | ||
972 | ring_max_fill(OCTEON_MGMT_TX_RING_SIZE))) { | ||
973 | spin_unlock_irqrestore(&p->tx_list.lock, flags); | ||
974 | |||
975 | dma_unmap_single(p->dev, re.s.addr, re.s.len, | ||
976 | DMA_TO_DEVICE); | ||
977 | |||
978 | netif_stop_queue(netdev); | ||
979 | return NETDEV_TX_BUSY; | ||
980 | } | ||
981 | |||
982 | __skb_queue_tail(&p->tx_list, skb); | ||
983 | |||
984 | /* Put it in the ring. */ | ||
985 | p->tx_ring[p->tx_next] = re.d64; | ||
986 | p->tx_next = (p->tx_next + 1) % OCTEON_MGMT_TX_RING_SIZE; | ||
987 | p->tx_current_fill++; | ||
988 | |||
989 | spin_unlock_irqrestore(&p->tx_list.lock, flags); | ||
990 | |||
991 | dma_sync_single_for_device(p->dev, p->tx_ring_handle, | ||
992 | ring_size_to_bytes(OCTEON_MGMT_TX_RING_SIZE), | ||
993 | DMA_BIDIRECTIONAL); | ||
994 | |||
995 | netdev->stats.tx_packets++; | ||
996 | netdev->stats.tx_bytes += skb->len; | ||
997 | |||
998 | /* Ring the bell. */ | ||
999 | cvmx_write_csr(CVMX_MIXX_ORING2(port), 1); | ||
1000 | |||
1001 | netdev->trans_start = jiffies; | ||
1002 | octeon_mgmt_clean_tx_buffers(p); | ||
1003 | octeon_mgmt_update_tx_stats(netdev); | ||
1004 | return NETDEV_TX_OK; | ||
1005 | } | ||
1006 | |||
1007 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
1008 | static void octeon_mgmt_poll_controller(struct net_device *netdev) | ||
1009 | { | ||
1010 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
1011 | |||
1012 | octeon_mgmt_receive_packets(p, 16); | ||
1013 | octeon_mgmt_update_rx_stats(netdev); | ||
1014 | return; | ||
1015 | } | ||
1016 | #endif | ||
1017 | |||
1018 | static void octeon_mgmt_get_drvinfo(struct net_device *netdev, | ||
1019 | struct ethtool_drvinfo *info) | ||
1020 | { | ||
1021 | strncpy(info->driver, DRV_NAME, sizeof(info->driver)); | ||
1022 | strncpy(info->version, DRV_VERSION, sizeof(info->version)); | ||
1023 | strncpy(info->fw_version, "N/A", sizeof(info->fw_version)); | ||
1024 | strncpy(info->bus_info, "N/A", sizeof(info->bus_info)); | ||
1025 | info->n_stats = 0; | ||
1026 | info->testinfo_len = 0; | ||
1027 | info->regdump_len = 0; | ||
1028 | info->eedump_len = 0; | ||
1029 | } | ||
1030 | |||
1031 | static int octeon_mgmt_get_settings(struct net_device *netdev, | ||
1032 | struct ethtool_cmd *cmd) | ||
1033 | { | ||
1034 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
1035 | |||
1036 | if (p->phydev) | ||
1037 | return phy_ethtool_gset(p->phydev, cmd); | ||
1038 | |||
1039 | return -EINVAL; | ||
1040 | } | ||
1041 | |||
1042 | static int octeon_mgmt_set_settings(struct net_device *netdev, | ||
1043 | struct ethtool_cmd *cmd) | ||
1044 | { | ||
1045 | struct octeon_mgmt *p = netdev_priv(netdev); | ||
1046 | |||
1047 | if (!capable(CAP_NET_ADMIN)) | ||
1048 | return -EPERM; | ||
1049 | |||
1050 | if (p->phydev) | ||
1051 | return phy_ethtool_sset(p->phydev, cmd); | ||
1052 | |||
1053 | return -EINVAL; | ||
1054 | } | ||
1055 | |||
1056 | static const struct ethtool_ops octeon_mgmt_ethtool_ops = { | ||
1057 | .get_drvinfo = octeon_mgmt_get_drvinfo, | ||
1058 | .get_link = ethtool_op_get_link, | ||
1059 | .get_settings = octeon_mgmt_get_settings, | ||
1060 | .set_settings = octeon_mgmt_set_settings | ||
1061 | }; | ||
1062 | |||
1063 | static const struct net_device_ops octeon_mgmt_ops = { | ||
1064 | .ndo_open = octeon_mgmt_open, | ||
1065 | .ndo_stop = octeon_mgmt_stop, | ||
1066 | .ndo_start_xmit = octeon_mgmt_xmit, | ||
1067 | .ndo_set_rx_mode = octeon_mgmt_set_rx_filtering, | ||
1068 | .ndo_set_multicast_list = octeon_mgmt_set_rx_filtering, | ||
1069 | .ndo_set_mac_address = octeon_mgmt_set_mac_address, | ||
1070 | .ndo_do_ioctl = octeon_mgmt_ioctl, | ||
1071 | .ndo_change_mtu = octeon_mgmt_change_mtu, | ||
1072 | #ifdef CONFIG_NET_POLL_CONTROLLER | ||
1073 | .ndo_poll_controller = octeon_mgmt_poll_controller, | ||
1074 | #endif | ||
1075 | }; | ||
1076 | |||
1077 | static int __init octeon_mgmt_probe(struct platform_device *pdev) | ||
1078 | { | ||
1079 | struct resource *res_irq; | ||
1080 | struct net_device *netdev; | ||
1081 | struct octeon_mgmt *p; | ||
1082 | int i; | ||
1083 | |||
1084 | netdev = alloc_etherdev(sizeof(struct octeon_mgmt)); | ||
1085 | if (netdev == NULL) | ||
1086 | return -ENOMEM; | ||
1087 | |||
1088 | dev_set_drvdata(&pdev->dev, netdev); | ||
1089 | p = netdev_priv(netdev); | ||
1090 | netif_napi_add(netdev, &p->napi, octeon_mgmt_napi_poll, | ||
1091 | OCTEON_MGMT_NAPI_WEIGHT); | ||
1092 | |||
1093 | p->netdev = netdev; | ||
1094 | p->dev = &pdev->dev; | ||
1095 | |||
1096 | p->port = pdev->id; | ||
1097 | snprintf(netdev->name, IFNAMSIZ, "mgmt%d", p->port); | ||
1098 | |||
1099 | res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | ||
1100 | if (!res_irq) | ||
1101 | goto err; | ||
1102 | |||
1103 | p->irq = res_irq->start; | ||
1104 | spin_lock_init(&p->lock); | ||
1105 | |||
1106 | skb_queue_head_init(&p->tx_list); | ||
1107 | skb_queue_head_init(&p->rx_list); | ||
1108 | tasklet_init(&p->tx_clean_tasklet, | ||
1109 | octeon_mgmt_clean_tx_tasklet, (unsigned long)p); | ||
1110 | |||
1111 | netdev->netdev_ops = &octeon_mgmt_ops; | ||
1112 | netdev->ethtool_ops = &octeon_mgmt_ethtool_ops; | ||
1113 | |||
1114 | |||
1115 | /* The mgmt ports get the first N MACs. */ | ||
1116 | for (i = 0; i < 6; i++) | ||
1117 | netdev->dev_addr[i] = octeon_bootinfo->mac_addr_base[i]; | ||
1118 | netdev->dev_addr[5] += p->port; | ||
1119 | |||
1120 | if (p->port >= octeon_bootinfo->mac_addr_count) | ||
1121 | dev_err(&pdev->dev, | ||
1122 | "Error %s: Using MAC outside of the assigned range: " | ||
1123 | "%02x:%02x:%02x:%02x:%02x:%02x\n", netdev->name, | ||
1124 | netdev->dev_addr[0], netdev->dev_addr[1], | ||
1125 | netdev->dev_addr[2], netdev->dev_addr[3], | ||
1126 | netdev->dev_addr[4], netdev->dev_addr[5]); | ||
1127 | |||
1128 | if (register_netdev(netdev)) | ||
1129 | goto err; | ||
1130 | |||
1131 | dev_info(&pdev->dev, "Version " DRV_VERSION "\n"); | ||
1132 | return 0; | ||
1133 | err: | ||
1134 | free_netdev(netdev); | ||
1135 | return -ENOENT; | ||
1136 | } | ||
1137 | |||
1138 | static int __exit octeon_mgmt_remove(struct platform_device *pdev) | ||
1139 | { | ||
1140 | struct net_device *netdev = dev_get_drvdata(&pdev->dev); | ||
1141 | |||
1142 | unregister_netdev(netdev); | ||
1143 | free_netdev(netdev); | ||
1144 | return 0; | ||
1145 | } | ||
1146 | |||
1147 | static struct platform_driver octeon_mgmt_driver = { | ||
1148 | .driver = { | ||
1149 | .name = "octeon_mgmt", | ||
1150 | .owner = THIS_MODULE, | ||
1151 | }, | ||
1152 | .probe = octeon_mgmt_probe, | ||
1153 | .remove = __exit_p(octeon_mgmt_remove), | ||
1154 | }; | ||
1155 | |||
1156 | extern void octeon_mdiobus_force_mod_depencency(void); | ||
1157 | |||
1158 | static int __init octeon_mgmt_mod_init(void) | ||
1159 | { | ||
1160 | /* Force our mdiobus driver module to be loaded first. */ | ||
1161 | octeon_mdiobus_force_mod_depencency(); | ||
1162 | return platform_driver_register(&octeon_mgmt_driver); | ||
1163 | } | ||
1164 | |||
1165 | static void __exit octeon_mgmt_mod_exit(void) | ||
1166 | { | ||
1167 | platform_driver_unregister(&octeon_mgmt_driver); | ||
1168 | } | ||
1169 | |||
1170 | module_init(octeon_mgmt_mod_init); | ||
1171 | module_exit(octeon_mgmt_mod_exit); | ||
1172 | |||
1173 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | ||
1174 | MODULE_AUTHOR("David Daney"); | ||
1175 | MODULE_LICENSE("GPL"); | ||
1176 | MODULE_VERSION(DRV_VERSION); | ||
diff --git a/drivers/net/phy/Kconfig b/drivers/net/phy/Kconfig index d5d8e1c5bc91..fc5938ba3d78 100644 --- a/drivers/net/phy/Kconfig +++ b/drivers/net/phy/Kconfig | |||
@@ -115,4 +115,15 @@ config MDIO_GPIO | |||
115 | To compile this driver as a module, choose M here: the module | 115 | To compile this driver as a module, choose M here: the module |
116 | will be called mdio-gpio. | 116 | will be called mdio-gpio. |
117 | 117 | ||
118 | config MDIO_OCTEON | ||
119 | tristate "Support for MDIO buses on Octeon SOCs" | ||
120 | depends on CPU_CAVIUM_OCTEON | ||
121 | default y | ||
122 | help | ||
123 | |||
124 | This module provides a driver for the Octeon MDIO busses. | ||
125 | It is required by the Octeon Ethernet device drivers. | ||
126 | |||
127 | If in doubt, say Y. | ||
128 | |||
118 | endif # PHYLIB | 129 | endif # PHYLIB |
diff --git a/drivers/net/phy/Makefile b/drivers/net/phy/Makefile index edfaac48cbd5..1342585af381 100644 --- a/drivers/net/phy/Makefile +++ b/drivers/net/phy/Makefile | |||
@@ -20,3 +20,4 @@ obj-$(CONFIG_MDIO_BITBANG) += mdio-bitbang.o | |||
20 | obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o | 20 | obj-$(CONFIG_MDIO_GPIO) += mdio-gpio.o |
21 | obj-$(CONFIG_NATIONAL_PHY) += national.o | 21 | obj-$(CONFIG_NATIONAL_PHY) += national.o |
22 | obj-$(CONFIG_STE10XP) += ste10Xp.o | 22 | obj-$(CONFIG_STE10XP) += ste10Xp.o |
23 | obj-$(CONFIG_MDIO_OCTEON) += mdio-octeon.o | ||
diff --git a/drivers/net/phy/mdio-octeon.c b/drivers/net/phy/mdio-octeon.c new file mode 100644 index 000000000000..61a4461cbda5 --- /dev/null +++ b/drivers/net/phy/mdio-octeon.c | |||
@@ -0,0 +1,180 @@ | |||
1 | /* | ||
2 | * This file is subject to the terms and conditions of the GNU General Public | ||
3 | * License. See the file "COPYING" in the main directory of this archive | ||
4 | * for more details. | ||
5 | * | ||
6 | * Copyright (C) 2009 Cavium Networks | ||
7 | */ | ||
8 | |||
9 | #include <linux/init.h> | ||
10 | #include <linux/module.h> | ||
11 | #include <linux/platform_device.h> | ||
12 | #include <linux/phy.h> | ||
13 | |||
14 | #include <asm/octeon/octeon.h> | ||
15 | #include <asm/octeon/cvmx-smix-defs.h> | ||
16 | |||
17 | #define DRV_VERSION "1.0" | ||
18 | #define DRV_DESCRIPTION "Cavium Networks Octeon SMI/MDIO driver" | ||
19 | |||
20 | struct octeon_mdiobus { | ||
21 | struct mii_bus *mii_bus; | ||
22 | int unit; | ||
23 | int phy_irq[PHY_MAX_ADDR]; | ||
24 | }; | ||
25 | |||
26 | static int octeon_mdiobus_read(struct mii_bus *bus, int phy_id, int regnum) | ||
27 | { | ||
28 | struct octeon_mdiobus *p = bus->priv; | ||
29 | union cvmx_smix_cmd smi_cmd; | ||
30 | union cvmx_smix_rd_dat smi_rd; | ||
31 | int timeout = 1000; | ||
32 | |||
33 | smi_cmd.u64 = 0; | ||
34 | smi_cmd.s.phy_op = 1; /* MDIO_CLAUSE_22_READ */ | ||
35 | smi_cmd.s.phy_adr = phy_id; | ||
36 | smi_cmd.s.reg_adr = regnum; | ||
37 | cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64); | ||
38 | |||
39 | do { | ||
40 | /* | ||
41 | * Wait 1000 clocks so we don't saturate the RSL bus | ||
42 | * doing reads. | ||
43 | */ | ||
44 | cvmx_wait(1000); | ||
45 | smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(p->unit)); | ||
46 | } while (smi_rd.s.pending && --timeout); | ||
47 | |||
48 | if (smi_rd.s.val) | ||
49 | return smi_rd.s.dat; | ||
50 | else | ||
51 | return -EIO; | ||
52 | } | ||
53 | |||
54 | static int octeon_mdiobus_write(struct mii_bus *bus, int phy_id, | ||
55 | int regnum, u16 val) | ||
56 | { | ||
57 | struct octeon_mdiobus *p = bus->priv; | ||
58 | union cvmx_smix_cmd smi_cmd; | ||
59 | union cvmx_smix_wr_dat smi_wr; | ||
60 | int timeout = 1000; | ||
61 | |||
62 | smi_wr.u64 = 0; | ||
63 | smi_wr.s.dat = val; | ||
64 | cvmx_write_csr(CVMX_SMIX_WR_DAT(p->unit), smi_wr.u64); | ||
65 | |||
66 | smi_cmd.u64 = 0; | ||
67 | smi_cmd.s.phy_op = 0; /* MDIO_CLAUSE_22_WRITE */ | ||
68 | smi_cmd.s.phy_adr = phy_id; | ||
69 | smi_cmd.s.reg_adr = regnum; | ||
70 | cvmx_write_csr(CVMX_SMIX_CMD(p->unit), smi_cmd.u64); | ||
71 | |||
72 | do { | ||
73 | /* | ||
74 | * Wait 1000 clocks so we don't saturate the RSL bus | ||
75 | * doing reads. | ||
76 | */ | ||
77 | cvmx_wait(1000); | ||
78 | smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(p->unit)); | ||
79 | } while (smi_wr.s.pending && --timeout); | ||
80 | |||
81 | if (timeout <= 0) | ||
82 | return -EIO; | ||
83 | |||
84 | return 0; | ||
85 | } | ||
86 | |||
87 | static int __init octeon_mdiobus_probe(struct platform_device *pdev) | ||
88 | { | ||
89 | struct octeon_mdiobus *bus; | ||
90 | int i; | ||
91 | int err = -ENOENT; | ||
92 | |||
93 | bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL); | ||
94 | if (!bus) | ||
95 | return -ENOMEM; | ||
96 | |||
97 | /* The platform_device id is our unit number. */ | ||
98 | bus->unit = pdev->id; | ||
99 | |||
100 | bus->mii_bus = mdiobus_alloc(); | ||
101 | |||
102 | if (!bus->mii_bus) | ||
103 | goto err; | ||
104 | |||
105 | /* | ||
106 | * Standard Octeon evaluation boards don't support phy | ||
107 | * interrupts, we need to poll. | ||
108 | */ | ||
109 | for (i = 0; i < PHY_MAX_ADDR; i++) | ||
110 | bus->phy_irq[i] = PHY_POLL; | ||
111 | |||
112 | bus->mii_bus->priv = bus; | ||
113 | bus->mii_bus->irq = bus->phy_irq; | ||
114 | bus->mii_bus->name = "mdio-octeon"; | ||
115 | snprintf(bus->mii_bus->id, MII_BUS_ID_SIZE, "%x", bus->unit); | ||
116 | bus->mii_bus->parent = &pdev->dev; | ||
117 | |||
118 | bus->mii_bus->read = octeon_mdiobus_read; | ||
119 | bus->mii_bus->write = octeon_mdiobus_write; | ||
120 | |||
121 | dev_set_drvdata(&pdev->dev, bus); | ||
122 | |||
123 | err = mdiobus_register(bus->mii_bus); | ||
124 | if (err) | ||
125 | goto err_register; | ||
126 | |||
127 | dev_info(&pdev->dev, "Version " DRV_VERSION "\n"); | ||
128 | |||
129 | return 0; | ||
130 | err_register: | ||
131 | mdiobus_free(bus->mii_bus); | ||
132 | |||
133 | err: | ||
134 | devm_kfree(&pdev->dev, bus); | ||
135 | return err; | ||
136 | } | ||
137 | |||
138 | static int __exit octeon_mdiobus_remove(struct platform_device *pdev) | ||
139 | { | ||
140 | struct octeon_mdiobus *bus; | ||
141 | |||
142 | bus = dev_get_drvdata(&pdev->dev); | ||
143 | |||
144 | mdiobus_unregister(bus->mii_bus); | ||
145 | mdiobus_free(bus->mii_bus); | ||
146 | return 0; | ||
147 | } | ||
148 | |||
149 | static struct platform_driver octeon_mdiobus_driver = { | ||
150 | .driver = { | ||
151 | .name = "mdio-octeon", | ||
152 | .owner = THIS_MODULE, | ||
153 | }, | ||
154 | .probe = octeon_mdiobus_probe, | ||
155 | .remove = __exit_p(octeon_mdiobus_remove), | ||
156 | }; | ||
157 | |||
158 | void octeon_mdiobus_force_mod_depencency(void) | ||
159 | { | ||
160 | /* Let ethernet drivers force us to be loaded. */ | ||
161 | } | ||
162 | EXPORT_SYMBOL(octeon_mdiobus_force_mod_depencency); | ||
163 | |||
164 | static int __init octeon_mdiobus_mod_init(void) | ||
165 | { | ||
166 | return platform_driver_register(&octeon_mdiobus_driver); | ||
167 | } | ||
168 | |||
169 | static void __exit octeon_mdiobus_mod_exit(void) | ||
170 | { | ||
171 | platform_driver_unregister(&octeon_mdiobus_driver); | ||
172 | } | ||
173 | |||
174 | module_init(octeon_mdiobus_mod_init); | ||
175 | module_exit(octeon_mdiobus_mod_exit); | ||
176 | |||
177 | MODULE_DESCRIPTION(DRV_DESCRIPTION); | ||
178 | MODULE_VERSION(DRV_VERSION); | ||
179 | MODULE_AUTHOR("David Daney"); | ||
180 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/net/wireless/iwlwifi/iwl-core.h b/drivers/net/wireless/iwlwifi/iwl-core.h index 675b7df632fc..27ca859e7453 100644 --- a/drivers/net/wireless/iwlwifi/iwl-core.h +++ b/drivers/net/wireless/iwlwifi/iwl-core.h | |||
@@ -63,7 +63,7 @@ | |||
63 | #ifndef __iwl_core_h__ | 63 | #ifndef __iwl_core_h__ |
64 | #define __iwl_core_h__ | 64 | #define __iwl_core_h__ |
65 | 65 | ||
66 | #include <linux/utsrelease.h> | 66 | #include <generated/utsrelease.h> |
67 | 67 | ||
68 | /************************ | 68 | /************************ |
69 | * forward declarations * | 69 | * forward declarations * |
diff --git a/drivers/pcmcia/pxa2xx_base.c b/drivers/pcmcia/pxa2xx_base.c index 3aabf1e37988..76e640bccde8 100644 --- a/drivers/pcmcia/pxa2xx_base.c +++ b/drivers/pcmcia/pxa2xx_base.c | |||
@@ -291,7 +291,7 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev) | |||
291 | skt->nr = ops->first + i; | 291 | skt->nr = ops->first + i; |
292 | skt->ops = ops; | 292 | skt->ops = ops; |
293 | skt->socket.owner = ops->owner; | 293 | skt->socket.owner = ops->owner; |
294 | skt->socket.dev.parent = dev; | 294 | skt->socket.dev.parent = &dev->dev; |
295 | skt->socket.pci_irq = NO_IRQ; | 295 | skt->socket.pci_irq = NO_IRQ; |
296 | 296 | ||
297 | ret = pxa2xx_drv_pcmcia_add_one(skt); | 297 | ret = pxa2xx_drv_pcmcia_add_one(skt); |
@@ -304,8 +304,8 @@ static int pxa2xx_drv_pcmcia_probe(struct platform_device *dev) | |||
304 | soc_pcmcia_remove_one(&sinfo->skt[i]); | 304 | soc_pcmcia_remove_one(&sinfo->skt[i]); |
305 | kfree(sinfo); | 305 | kfree(sinfo); |
306 | } else { | 306 | } else { |
307 | pxa2xx_configure_sockets(dev); | 307 | pxa2xx_configure_sockets(&dev->dev); |
308 | dev_set_drvdata(dev, sinfo); | 308 | dev_set_drvdata(&dev->dev, sinfo); |
309 | } | 309 | } |
310 | 310 | ||
311 | return ret; | 311 | return ret; |
diff --git a/drivers/platform/x86/compal-laptop.c b/drivers/platform/x86/compal-laptop.c index 11003bba10d3..1a387e79f719 100644 --- a/drivers/platform/x86/compal-laptop.c +++ b/drivers/platform/x86/compal-laptop.c | |||
@@ -51,7 +51,6 @@ | |||
51 | #include <linux/dmi.h> | 51 | #include <linux/dmi.h> |
52 | #include <linux/backlight.h> | 52 | #include <linux/backlight.h> |
53 | #include <linux/platform_device.h> | 53 | #include <linux/platform_device.h> |
54 | #include <linux/autoconf.h> | ||
55 | 54 | ||
56 | #define COMPAL_DRIVER_VERSION "0.2.6" | 55 | #define COMPAL_DRIVER_VERSION "0.2.6" |
57 | 56 | ||
diff --git a/drivers/regulator/88pm8607.c b/drivers/regulator/88pm8607.c new file mode 100644 index 000000000000..04719551381b --- /dev/null +++ b/drivers/regulator/88pm8607.c | |||
@@ -0,0 +1,685 @@ | |||
1 | /* | ||
2 | * Regulators driver for Marvell 88PM8607 | ||
3 | * | ||
4 | * Copyright (C) 2009 Marvell International Ltd. | ||
5 | * Haojian Zhuang <haojian.zhuang@marvell.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify | ||
8 | * it under the terms of the GNU General Public License version 2 as | ||
9 | * published by the Free Software Foundation. | ||
10 | */ | ||
11 | #include <linux/kernel.h> | ||
12 | #include <linux/init.h> | ||
13 | #include <linux/err.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/regulator/driver.h> | ||
16 | #include <linux/regulator/machine.h> | ||
17 | #include <linux/mfd/88pm8607.h> | ||
18 | |||
19 | struct pm8607_regulator_info { | ||
20 | struct regulator_desc desc; | ||
21 | struct pm8607_chip *chip; | ||
22 | struct regulator_dev *regulator; | ||
23 | |||
24 | int min_uV; | ||
25 | int max_uV; | ||
26 | int step_uV; | ||
27 | int vol_reg; | ||
28 | int vol_shift; | ||
29 | int vol_nbits; | ||
30 | int update_reg; | ||
31 | int update_bit; | ||
32 | int enable_reg; | ||
33 | int enable_bit; | ||
34 | int slope_double; | ||
35 | }; | ||
36 | |||
37 | static inline int check_range(struct pm8607_regulator_info *info, | ||
38 | int min_uV, int max_uV) | ||
39 | { | ||
40 | if (max_uV < info->min_uV || min_uV > info->max_uV || min_uV > max_uV) | ||
41 | return -EINVAL; | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | |||
46 | static int pm8607_list_voltage(struct regulator_dev *rdev, unsigned index) | ||
47 | { | ||
48 | struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); | ||
49 | uint8_t chip_id = info->chip->chip_id; | ||
50 | int ret = -EINVAL; | ||
51 | |||
52 | switch (info->desc.id) { | ||
53 | case PM8607_ID_BUCK1: | ||
54 | ret = (index < 0x1d) ? (index * 25000 + 800000) : | ||
55 | ((index < 0x20) ? 1500000 : | ||
56 | ((index < 0x40) ? ((index - 0x20) * 25000) : | ||
57 | -EINVAL)); | ||
58 | break; | ||
59 | case PM8607_ID_BUCK3: | ||
60 | ret = (index < 0x3d) ? (index * 25000) : | ||
61 | ((index < 0x40) ? 1500000 : -EINVAL); | ||
62 | if (ret < 0) | ||
63 | break; | ||
64 | if (info->slope_double) | ||
65 | ret <<= 1; | ||
66 | break; | ||
67 | case PM8607_ID_LDO1: | ||
68 | ret = (index == 0) ? 1800000 : | ||
69 | ((index == 1) ? 1200000 : | ||
70 | ((index == 2) ? 2800000 : -EINVAL)); | ||
71 | break; | ||
72 | case PM8607_ID_LDO5: | ||
73 | ret = (index == 0) ? 2900000 : | ||
74 | ((index == 1) ? 3000000 : | ||
75 | ((index == 2) ? 3100000 : 3300000)); | ||
76 | break; | ||
77 | case PM8607_ID_LDO7: | ||
78 | case PM8607_ID_LDO8: | ||
79 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
80 | ((index < 8) ? (index * 50000 + 2550000) : | ||
81 | -EINVAL); | ||
82 | break; | ||
83 | case PM8607_ID_LDO12: | ||
84 | ret = (index < 2) ? (index * 100000 + 1800000) : | ||
85 | ((index < 7) ? (index * 100000 + 2500000) : | ||
86 | ((index == 7) ? 3300000 : 1200000)); | ||
87 | break; | ||
88 | case PM8607_ID_LDO2: | ||
89 | case PM8607_ID_LDO3: | ||
90 | case PM8607_ID_LDO9: | ||
91 | switch (chip_id) { | ||
92 | case PM8607_CHIP_A0: | ||
93 | case PM8607_CHIP_A1: | ||
94 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
95 | ((index < 8) ? (index * 50000 + 2550000) : | ||
96 | -EINVAL); | ||
97 | break; | ||
98 | case PM8607_CHIP_B0: | ||
99 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
100 | ((index < 7) ? (index * 50000 + 2550000) : | ||
101 | 3300000); | ||
102 | break; | ||
103 | } | ||
104 | break; | ||
105 | case PM8607_ID_LDO4: | ||
106 | switch (chip_id) { | ||
107 | case PM8607_CHIP_A0: | ||
108 | case PM8607_CHIP_A1: | ||
109 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
110 | ((index < 8) ? (index * 50000 + 2550000) : | ||
111 | -EINVAL); | ||
112 | break; | ||
113 | case PM8607_CHIP_B0: | ||
114 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
115 | ((index < 6) ? (index * 50000 + 2550000) : | ||
116 | ((index == 6) ? 2900000 : 3300000)); | ||
117 | break; | ||
118 | } | ||
119 | break; | ||
120 | case PM8607_ID_LDO6: | ||
121 | switch (chip_id) { | ||
122 | case PM8607_CHIP_A0: | ||
123 | case PM8607_CHIP_A1: | ||
124 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
125 | ((index < 8) ? (index * 50000 + 2450000) : | ||
126 | -EINVAL); | ||
127 | break; | ||
128 | case PM8607_CHIP_B0: | ||
129 | ret = (index < 2) ? (index * 50000 + 1800000) : | ||
130 | ((index < 7) ? (index * 50000 + 2500000) : | ||
131 | 3300000); | ||
132 | break; | ||
133 | } | ||
134 | break; | ||
135 | case PM8607_ID_LDO10: | ||
136 | switch (chip_id) { | ||
137 | case PM8607_CHIP_A0: | ||
138 | case PM8607_CHIP_A1: | ||
139 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
140 | ((index < 8) ? (index * 50000 + 2550000) : | ||
141 | 1200000); | ||
142 | break; | ||
143 | case PM8607_CHIP_B0: | ||
144 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
145 | ((index < 7) ? (index * 50000 + 2550000) : | ||
146 | ((index == 7) ? 3300000 : 1200000)); | ||
147 | break; | ||
148 | } | ||
149 | break; | ||
150 | case PM8607_ID_LDO14: | ||
151 | switch (chip_id) { | ||
152 | case PM8607_CHIP_A0: | ||
153 | case PM8607_CHIP_A1: | ||
154 | ret = (index < 3) ? (index * 50000 + 1800000) : | ||
155 | ((index < 8) ? (index * 50000 + 2550000) : | ||
156 | -EINVAL); | ||
157 | break; | ||
158 | case PM8607_CHIP_B0: | ||
159 | ret = (index < 2) ? (index * 50000 + 1800000) : | ||
160 | ((index < 7) ? (index * 50000 + 2600000) : | ||
161 | 3300000); | ||
162 | break; | ||
163 | } | ||
164 | break; | ||
165 | } | ||
166 | return ret; | ||
167 | } | ||
168 | |||
169 | static int choose_voltage(struct regulator_dev *rdev, int min_uV, int max_uV) | ||
170 | { | ||
171 | struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); | ||
172 | uint8_t chip_id = info->chip->chip_id; | ||
173 | int val = -ENOENT; | ||
174 | int ret; | ||
175 | |||
176 | switch (info->desc.id) { | ||
177 | case PM8607_ID_BUCK1: | ||
178 | if (min_uV >= 800000) /* 800mV ~ 1500mV / 25mV */ | ||
179 | val = (min_uV - 775001) / 25000; | ||
180 | else { /* 25mV ~ 775mV / 25mV */ | ||
181 | val = (min_uV + 249999) / 25000; | ||
182 | val += 32; | ||
183 | } | ||
184 | break; | ||
185 | case PM8607_ID_BUCK3: | ||
186 | if (info->slope_double) | ||
187 | min_uV = min_uV >> 1; | ||
188 | val = (min_uV + 249999) / 25000; /* 0mV ~ 1500mV / 25mV */ | ||
189 | |||
190 | break; | ||
191 | case PM8607_ID_LDO1: | ||
192 | if (min_uV > 1800000) | ||
193 | val = 2; | ||
194 | else if (min_uV > 1200000) | ||
195 | val = 0; | ||
196 | else | ||
197 | val = 1; | ||
198 | break; | ||
199 | case PM8607_ID_LDO5: | ||
200 | if (min_uV > 3100000) | ||
201 | val = 3; | ||
202 | else /* 2900mV ~ 3100mV / 100mV */ | ||
203 | val = (min_uV - 2800001) / 100000; | ||
204 | break; | ||
205 | case PM8607_ID_LDO7: | ||
206 | case PM8607_ID_LDO8: | ||
207 | if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */ | ||
208 | if (min_uV <= 1800000) | ||
209 | val = 0; /* 1800mv */ | ||
210 | else if (min_uV <= 1900000) | ||
211 | val = (min_uV - 1750001) / 50000; | ||
212 | else | ||
213 | val = 3; /* 2700mV */ | ||
214 | } else { /* 2700mV ~ 2900mV / 50mV */ | ||
215 | if (min_uV <= 2900000) { | ||
216 | val = (min_uV - 2650001) / 50000; | ||
217 | val += 3; | ||
218 | } else | ||
219 | val = -EINVAL; | ||
220 | } | ||
221 | break; | ||
222 | case PM8607_ID_LDO10: | ||
223 | if (min_uV > 2850000) | ||
224 | val = 7; | ||
225 | else if (min_uV <= 1200000) | ||
226 | val = 8; | ||
227 | else if (min_uV < 2700000) /* 1800mV ~ 1900mV / 50mV */ | ||
228 | val = (min_uV - 1750001) / 50000; | ||
229 | else { /* 2700mV ~ 2850mV / 50mV */ | ||
230 | val = (min_uV - 2650001) / 50000; | ||
231 | val += 3; | ||
232 | } | ||
233 | break; | ||
234 | case PM8607_ID_LDO12: | ||
235 | if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 100mV */ | ||
236 | if (min_uV <= 1200000) | ||
237 | val = 8; /* 1200mV */ | ||
238 | else if (min_uV <= 1800000) | ||
239 | val = 0; /* 1800mV */ | ||
240 | else if (min_uV <= 1900000) | ||
241 | val = (min_uV - 1700001) / 100000; | ||
242 | else | ||
243 | val = 2; /* 2700mV */ | ||
244 | } else { /* 2700mV ~ 3100mV / 100mV */ | ||
245 | if (min_uV <= 3100000) { | ||
246 | val = (min_uV - 2600001) / 100000; | ||
247 | val += 2; | ||
248 | } else if (min_uV <= 3300000) | ||
249 | val = 7; | ||
250 | else | ||
251 | val = -EINVAL; | ||
252 | } | ||
253 | break; | ||
254 | case PM8607_ID_LDO2: | ||
255 | case PM8607_ID_LDO3: | ||
256 | case PM8607_ID_LDO9: | ||
257 | switch (chip_id) { | ||
258 | case PM8607_CHIP_A0: | ||
259 | case PM8607_CHIP_A1: | ||
260 | if (min_uV < 2700000) /* 1800mV ~ 1900mV / 50mV */ | ||
261 | if (min_uV <= 1800000) | ||
262 | val = 0; | ||
263 | else if (min_uV <= 1900000) | ||
264 | val = (min_uV - 1750001) / 50000; | ||
265 | else | ||
266 | val = 3; /* 2700mV */ | ||
267 | else { /* 2700mV ~ 2900mV / 50mV */ | ||
268 | if (min_uV <= 2900000) { | ||
269 | val = (min_uV - 2650001) / 50000; | ||
270 | val += 3; | ||
271 | } else | ||
272 | val = -EINVAL; | ||
273 | } | ||
274 | break; | ||
275 | case PM8607_CHIP_B0: | ||
276 | if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */ | ||
277 | if (min_uV <= 1800000) | ||
278 | val = 0; | ||
279 | else if (min_uV <= 1900000) | ||
280 | val = (min_uV - 1750001) / 50000; | ||
281 | else | ||
282 | val = 3; /* 2700mV */ | ||
283 | } else { /* 2700mV ~ 2850mV / 50mV */ | ||
284 | if (min_uV <= 2850000) { | ||
285 | val = (min_uV - 2650001) / 50000; | ||
286 | val += 3; | ||
287 | } else if (min_uV <= 3300000) | ||
288 | val = 7; | ||
289 | else | ||
290 | val = -EINVAL; | ||
291 | } | ||
292 | break; | ||
293 | } | ||
294 | break; | ||
295 | case PM8607_ID_LDO4: | ||
296 | switch (chip_id) { | ||
297 | case PM8607_CHIP_A0: | ||
298 | case PM8607_CHIP_A1: | ||
299 | if (min_uV < 2700000) /* 1800mV ~ 1900mV / 50mV */ | ||
300 | if (min_uV <= 1800000) | ||
301 | val = 0; | ||
302 | else if (min_uV <= 1900000) | ||
303 | val = (min_uV - 1750001) / 50000; | ||
304 | else | ||
305 | val = 3; /* 2700mV */ | ||
306 | else { /* 2700mV ~ 2900mV / 50mV */ | ||
307 | if (min_uV <= 2900000) { | ||
308 | val = (min_uV - 2650001) / 50000; | ||
309 | val += 3; | ||
310 | } else | ||
311 | val = -EINVAL; | ||
312 | } | ||
313 | break; | ||
314 | case PM8607_CHIP_B0: | ||
315 | if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */ | ||
316 | if (min_uV <= 1800000) | ||
317 | val = 0; | ||
318 | else if (min_uV <= 1900000) | ||
319 | val = (min_uV - 1750001) / 50000; | ||
320 | else | ||
321 | val = 3; /* 2700mV */ | ||
322 | } else { /* 2700mV ~ 2800mV / 50mV */ | ||
323 | if (min_uV <= 2850000) { | ||
324 | val = (min_uV - 2650001) / 50000; | ||
325 | val += 3; | ||
326 | } else if (min_uV <= 2900000) | ||
327 | val = 6; | ||
328 | else if (min_uV <= 3300000) | ||
329 | val = 7; | ||
330 | else | ||
331 | val = -EINVAL; | ||
332 | } | ||
333 | break; | ||
334 | } | ||
335 | break; | ||
336 | case PM8607_ID_LDO6: | ||
337 | switch (chip_id) { | ||
338 | case PM8607_CHIP_A0: | ||
339 | case PM8607_CHIP_A1: | ||
340 | if (min_uV < 2600000) { /* 1800mV ~ 1900mV / 50mV */ | ||
341 | if (min_uV <= 1800000) | ||
342 | val = 0; | ||
343 | else if (min_uV <= 1900000) | ||
344 | val = (min_uV - 1750001) / 50000; | ||
345 | else | ||
346 | val = 3; /* 2600mV */ | ||
347 | } else { /* 2600mV ~ 2800mV / 50mV */ | ||
348 | if (min_uV <= 2800000) { | ||
349 | val = (min_uV - 2550001) / 50000; | ||
350 | val += 3; | ||
351 | } else | ||
352 | val = -EINVAL; | ||
353 | } | ||
354 | break; | ||
355 | case PM8607_CHIP_B0: | ||
356 | if (min_uV < 2600000) { /* 1800mV ~ 1850mV / 50mV */ | ||
357 | if (min_uV <= 1800000) | ||
358 | val = 0; | ||
359 | else if (min_uV <= 1850000) | ||
360 | val = (min_uV - 1750001) / 50000; | ||
361 | else | ||
362 | val = 2; /* 2600mV */ | ||
363 | } else { /* 2600mV ~ 2800mV / 50mV */ | ||
364 | if (min_uV <= 2800000) { | ||
365 | val = (min_uV - 2550001) / 50000; | ||
366 | val += 2; | ||
367 | } else if (min_uV <= 3300000) | ||
368 | val = 7; | ||
369 | else | ||
370 | val = -EINVAL; | ||
371 | } | ||
372 | break; | ||
373 | } | ||
374 | break; | ||
375 | case PM8607_ID_LDO14: | ||
376 | switch (chip_id) { | ||
377 | case PM8607_CHIP_A0: | ||
378 | case PM8607_CHIP_A1: | ||
379 | if (min_uV < 2700000) { /* 1800mV ~ 1900mV / 50mV */ | ||
380 | if (min_uV <= 1800000) | ||
381 | val = 0; | ||
382 | else if (min_uV <= 1900000) | ||
383 | val = (min_uV - 1750001) / 50000; | ||
384 | else | ||
385 | val = 3; /* 2700mV */ | ||
386 | } else { /* 2700mV ~ 2900mV / 50mV */ | ||
387 | if (min_uV <= 2900000) { | ||
388 | val = (min_uV - 2650001) / 50000; | ||
389 | val += 3; | ||
390 | } else | ||
391 | val = -EINVAL; | ||
392 | } | ||
393 | break; | ||
394 | case PM8607_CHIP_B0: | ||
395 | if (min_uV < 2700000) { /* 1800mV ~ 1850mV / 50mV */ | ||
396 | if (min_uV <= 1800000) | ||
397 | val = 0; | ||
398 | else if (min_uV <= 1850000) | ||
399 | val = (min_uV - 1750001) / 50000; | ||
400 | else | ||
401 | val = 2; /* 2700mV */ | ||
402 | } else { /* 2700mV ~ 2900mV / 50mV */ | ||
403 | if (min_uV <= 2900000) { | ||
404 | val = (min_uV - 2650001) / 50000; | ||
405 | val += 2; | ||
406 | } else if (min_uV <= 3300000) | ||
407 | val = 7; | ||
408 | else | ||
409 | val = -EINVAL; | ||
410 | } | ||
411 | break; | ||
412 | } | ||
413 | break; | ||
414 | } | ||
415 | if (val >= 0) { | ||
416 | ret = pm8607_list_voltage(rdev, val); | ||
417 | if (ret > max_uV) { | ||
418 | pr_err("exceed voltage range (%d %d) uV", | ||
419 | min_uV, max_uV); | ||
420 | return -EINVAL; | ||
421 | } | ||
422 | } else | ||
423 | pr_err("invalid voltage range (%d %d) uV", min_uV, max_uV); | ||
424 | return val; | ||
425 | } | ||
426 | |||
427 | static int pm8607_set_voltage(struct regulator_dev *rdev, | ||
428 | int min_uV, int max_uV) | ||
429 | { | ||
430 | struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); | ||
431 | struct pm8607_chip *chip = info->chip; | ||
432 | uint8_t val, mask; | ||
433 | int ret; | ||
434 | |||
435 | if (check_range(info, min_uV, max_uV)) { | ||
436 | pr_err("invalid voltage range (%d, %d) uV\n", min_uV, max_uV); | ||
437 | return -EINVAL; | ||
438 | } | ||
439 | |||
440 | ret = choose_voltage(rdev, min_uV, max_uV); | ||
441 | if (ret < 0) | ||
442 | return -EINVAL; | ||
443 | val = (uint8_t)(ret << info->vol_shift); | ||
444 | mask = ((1 << info->vol_nbits) - 1) << info->vol_shift; | ||
445 | |||
446 | ret = pm8607_set_bits(chip, info->vol_reg, mask, val); | ||
447 | if (ret) | ||
448 | return ret; | ||
449 | switch (info->desc.id) { | ||
450 | case PM8607_ID_BUCK1: | ||
451 | case PM8607_ID_BUCK3: | ||
452 | ret = pm8607_set_bits(chip, info->update_reg, | ||
453 | 1 << info->update_bit, | ||
454 | 1 << info->update_bit); | ||
455 | break; | ||
456 | } | ||
457 | return ret; | ||
458 | } | ||
459 | |||
460 | static int pm8607_get_voltage(struct regulator_dev *rdev) | ||
461 | { | ||
462 | struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); | ||
463 | struct pm8607_chip *chip = info->chip; | ||
464 | uint8_t val, mask; | ||
465 | int ret; | ||
466 | |||
467 | ret = pm8607_reg_read(chip, info->vol_reg); | ||
468 | if (ret < 0) | ||
469 | return ret; | ||
470 | |||
471 | mask = ((1 << info->vol_nbits) - 1) << info->vol_shift; | ||
472 | val = ((unsigned char)ret & mask) >> info->vol_shift; | ||
473 | |||
474 | return pm8607_list_voltage(rdev, val); | ||
475 | } | ||
476 | |||
477 | static int pm8607_enable(struct regulator_dev *rdev) | ||
478 | { | ||
479 | struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); | ||
480 | struct pm8607_chip *chip = info->chip; | ||
481 | |||
482 | return pm8607_set_bits(chip, info->enable_reg, | ||
483 | 1 << info->enable_bit, | ||
484 | 1 << info->enable_bit); | ||
485 | } | ||
486 | |||
487 | static int pm8607_disable(struct regulator_dev *rdev) | ||
488 | { | ||
489 | struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); | ||
490 | struct pm8607_chip *chip = info->chip; | ||
491 | |||
492 | return pm8607_set_bits(chip, info->enable_reg, | ||
493 | 1 << info->enable_bit, 0); | ||
494 | } | ||
495 | |||
496 | static int pm8607_is_enabled(struct regulator_dev *rdev) | ||
497 | { | ||
498 | struct pm8607_regulator_info *info = rdev_get_drvdata(rdev); | ||
499 | struct pm8607_chip *chip = info->chip; | ||
500 | int ret; | ||
501 | |||
502 | ret = pm8607_reg_read(chip, info->enable_reg); | ||
503 | if (ret < 0) | ||
504 | return ret; | ||
505 | |||
506 | return !!((unsigned char)ret & (1 << info->enable_bit)); | ||
507 | } | ||
508 | |||
509 | static struct regulator_ops pm8607_regulator_ops = { | ||
510 | .set_voltage = pm8607_set_voltage, | ||
511 | .get_voltage = pm8607_get_voltage, | ||
512 | .enable = pm8607_enable, | ||
513 | .disable = pm8607_disable, | ||
514 | .is_enabled = pm8607_is_enabled, | ||
515 | }; | ||
516 | |||
517 | #define PM8607_DVC(_id, min, max, step, vreg, nbits, ureg, ubit, ereg, ebit) \ | ||
518 | { \ | ||
519 | .desc = { \ | ||
520 | .name = "BUCK" #_id, \ | ||
521 | .ops = &pm8607_regulator_ops, \ | ||
522 | .type = REGULATOR_VOLTAGE, \ | ||
523 | .id = PM8607_ID_BUCK##_id, \ | ||
524 | .owner = THIS_MODULE, \ | ||
525 | }, \ | ||
526 | .min_uV = (min) * 1000, \ | ||
527 | .max_uV = (max) * 1000, \ | ||
528 | .step_uV = (step) * 1000, \ | ||
529 | .vol_reg = PM8607_##vreg, \ | ||
530 | .vol_shift = (0), \ | ||
531 | .vol_nbits = (nbits), \ | ||
532 | .update_reg = PM8607_##ureg, \ | ||
533 | .update_bit = (ubit), \ | ||
534 | .enable_reg = PM8607_##ereg, \ | ||
535 | .enable_bit = (ebit), \ | ||
536 | .slope_double = (0), \ | ||
537 | } | ||
538 | |||
539 | #define PM8607_LDO(_id, min, max, step, vreg, shift, nbits, ereg, ebit) \ | ||
540 | { \ | ||
541 | .desc = { \ | ||
542 | .name = "LDO" #_id, \ | ||
543 | .ops = &pm8607_regulator_ops, \ | ||
544 | .type = REGULATOR_VOLTAGE, \ | ||
545 | .id = PM8607_ID_LDO##_id, \ | ||
546 | .owner = THIS_MODULE, \ | ||
547 | }, \ | ||
548 | .min_uV = (min) * 1000, \ | ||
549 | .max_uV = (max) * 1000, \ | ||
550 | .step_uV = (step) * 1000, \ | ||
551 | .vol_reg = PM8607_##vreg, \ | ||
552 | .vol_shift = (shift), \ | ||
553 | .vol_nbits = (nbits), \ | ||
554 | .enable_reg = PM8607_##ereg, \ | ||
555 | .enable_bit = (ebit), \ | ||
556 | .slope_double = (0), \ | ||
557 | } | ||
558 | |||
559 | static struct pm8607_regulator_info pm8607_regulator_info[] = { | ||
560 | PM8607_DVC(1, 0, 1500, 25, BUCK1, 6, GO, 0, SUPPLIES_EN11, 0), | ||
561 | PM8607_DVC(3, 0, 1500, 25, BUCK3, 6, GO, 2, SUPPLIES_EN11, 2), | ||
562 | |||
563 | PM8607_LDO(1 , 1200, 2800, 0, LDO1 , 0, 2, SUPPLIES_EN11, 3), | ||
564 | PM8607_LDO(2 , 1800, 3300, 0, LDO2 , 0, 3, SUPPLIES_EN11, 4), | ||
565 | PM8607_LDO(3 , 1800, 3300, 0, LDO3 , 0, 3, SUPPLIES_EN11, 5), | ||
566 | PM8607_LDO(4 , 1800, 3300, 0, LDO4 , 0, 3, SUPPLIES_EN11, 6), | ||
567 | PM8607_LDO(5 , 2900, 3300, 0, LDO5 , 0, 2, SUPPLIES_EN11, 7), | ||
568 | PM8607_LDO(6 , 1800, 3300, 0, LDO6 , 0, 3, SUPPLIES_EN12, 0), | ||
569 | PM8607_LDO(7 , 1800, 2900, 0, LDO7 , 0, 3, SUPPLIES_EN12, 1), | ||
570 | PM8607_LDO(8 , 1800, 2900, 0, LDO8 , 0, 3, SUPPLIES_EN12, 2), | ||
571 | PM8607_LDO(9 , 1800, 3300, 0, LDO9 , 0, 3, SUPPLIES_EN12, 3), | ||
572 | PM8607_LDO(10, 1200, 3300, 0, LDO10, 0, 4, SUPPLIES_EN11, 4), | ||
573 | PM8607_LDO(12, 1200, 3300, 0, LDO12, 0, 4, SUPPLIES_EN11, 5), | ||
574 | PM8607_LDO(14, 1800, 3300, 0, LDO14, 0, 3, SUPPLIES_EN11, 6), | ||
575 | }; | ||
576 | |||
577 | static inline struct pm8607_regulator_info *find_regulator_info(int id) | ||
578 | { | ||
579 | struct pm8607_regulator_info *info; | ||
580 | int i; | ||
581 | |||
582 | for (i = 0; i < ARRAY_SIZE(pm8607_regulator_info); i++) { | ||
583 | info = &pm8607_regulator_info[i]; | ||
584 | if (info->desc.id == id) | ||
585 | return info; | ||
586 | } | ||
587 | return NULL; | ||
588 | } | ||
589 | |||
590 | static int __devinit pm8607_regulator_probe(struct platform_device *pdev) | ||
591 | { | ||
592 | struct pm8607_chip *chip = dev_get_drvdata(pdev->dev.parent); | ||
593 | struct pm8607_platform_data *pdata = chip->dev->platform_data; | ||
594 | struct pm8607_regulator_info *info = NULL; | ||
595 | |||
596 | info = find_regulator_info(pdev->id); | ||
597 | if (info == NULL) { | ||
598 | dev_err(&pdev->dev, "invalid regulator ID specified\n"); | ||
599 | return -EINVAL; | ||
600 | } | ||
601 | |||
602 | info->chip = chip; | ||
603 | |||
604 | info->regulator = regulator_register(&info->desc, &pdev->dev, | ||
605 | pdata->regulator[pdev->id], info); | ||
606 | if (IS_ERR(info->regulator)) { | ||
607 | dev_err(&pdev->dev, "failed to register regulator %s\n", | ||
608 | info->desc.name); | ||
609 | return PTR_ERR(info->regulator); | ||
610 | } | ||
611 | |||
612 | /* check DVC ramp slope double */ | ||
613 | if (info->desc.id == PM8607_ID_BUCK3) | ||
614 | if (info->chip->buck3_double) | ||
615 | info->slope_double = 1; | ||
616 | |||
617 | platform_set_drvdata(pdev, info); | ||
618 | return 0; | ||
619 | } | ||
620 | |||
621 | static int __devexit pm8607_regulator_remove(struct platform_device *pdev) | ||
622 | { | ||
623 | struct pm8607_regulator_info *info = platform_get_drvdata(pdev); | ||
624 | |||
625 | regulator_unregister(info->regulator); | ||
626 | return 0; | ||
627 | } | ||
628 | |||
629 | #define PM8607_REGULATOR_DRIVER(_name) \ | ||
630 | { \ | ||
631 | .driver = { \ | ||
632 | .name = "88pm8607-" #_name, \ | ||
633 | .owner = THIS_MODULE, \ | ||
634 | }, \ | ||
635 | .probe = pm8607_regulator_probe, \ | ||
636 | .remove = __devexit_p(pm8607_regulator_remove), \ | ||
637 | } | ||
638 | |||
639 | static struct platform_driver pm8607_regulator_driver[] = { | ||
640 | PM8607_REGULATOR_DRIVER(buck1), | ||
641 | PM8607_REGULATOR_DRIVER(buck2), | ||
642 | PM8607_REGULATOR_DRIVER(buck3), | ||
643 | PM8607_REGULATOR_DRIVER(ldo1), | ||
644 | PM8607_REGULATOR_DRIVER(ldo2), | ||
645 | PM8607_REGULATOR_DRIVER(ldo3), | ||
646 | PM8607_REGULATOR_DRIVER(ldo4), | ||
647 | PM8607_REGULATOR_DRIVER(ldo5), | ||
648 | PM8607_REGULATOR_DRIVER(ldo6), | ||
649 | PM8607_REGULATOR_DRIVER(ldo7), | ||
650 | PM8607_REGULATOR_DRIVER(ldo8), | ||
651 | PM8607_REGULATOR_DRIVER(ldo9), | ||
652 | PM8607_REGULATOR_DRIVER(ldo10), | ||
653 | PM8607_REGULATOR_DRIVER(ldo12), | ||
654 | PM8607_REGULATOR_DRIVER(ldo14), | ||
655 | }; | ||
656 | |||
657 | static int __init pm8607_regulator_init(void) | ||
658 | { | ||
659 | int i, count, ret; | ||
660 | |||
661 | count = ARRAY_SIZE(pm8607_regulator_driver); | ||
662 | for (i = 0; i < count; i++) { | ||
663 | ret = platform_driver_register(&pm8607_regulator_driver[i]); | ||
664 | if (ret != 0) | ||
665 | pr_err("Failed to register regulator driver: %d\n", | ||
666 | ret); | ||
667 | } | ||
668 | return 0; | ||
669 | } | ||
670 | subsys_initcall(pm8607_regulator_init); | ||
671 | |||
672 | static void __exit pm8607_regulator_exit(void) | ||
673 | { | ||
674 | int i, count; | ||
675 | |||
676 | count = ARRAY_SIZE(pm8607_regulator_driver); | ||
677 | for (i = 0; i < count; i++) | ||
678 | platform_driver_unregister(&pm8607_regulator_driver[i]); | ||
679 | } | ||
680 | module_exit(pm8607_regulator_exit); | ||
681 | |||
682 | MODULE_LICENSE("GPL"); | ||
683 | MODULE_AUTHOR("Haojian Zhuang <haojian.zhuang@marvell.com>"); | ||
684 | MODULE_DESCRIPTION("Regulator Driver for Marvell 88PM8607 PMIC"); | ||
685 | MODULE_ALIAS("platform:88pm8607-regulator"); | ||
diff --git a/drivers/regulator/Kconfig b/drivers/regulator/Kconfig index 7cfdd65bebb4..262f62eec837 100644 --- a/drivers/regulator/Kconfig +++ b/drivers/regulator/Kconfig | |||
@@ -69,6 +69,13 @@ config REGULATOR_MAX1586 | |||
69 | regulator via I2C bus. The provided regulator is suitable | 69 | regulator via I2C bus. The provided regulator is suitable |
70 | for PXA27x chips to control VCC_CORE and VCC_USIM voltages. | 70 | for PXA27x chips to control VCC_CORE and VCC_USIM voltages. |
71 | 71 | ||
72 | config REGULATOR_MAX8660 | ||
73 | tristate "Maxim 8660/8661 voltage regulator" | ||
74 | depends on I2C | ||
75 | help | ||
76 | This driver controls a Maxim 8660/8661 voltage output | ||
77 | regulator via I2C bus. | ||
78 | |||
72 | config REGULATOR_TWL4030 | 79 | config REGULATOR_TWL4030 |
73 | bool "TI TWL4030/TWL5030/TWL6030/TPS695x0 PMIC" | 80 | bool "TI TWL4030/TWL5030/TWL6030/TPS695x0 PMIC" |
74 | depends on TWL4030_CORE | 81 | depends on TWL4030_CORE |
@@ -157,5 +164,11 @@ config REGULATOR_TPS6507X | |||
157 | three step-down converters and two general-purpose LDO voltage regulators. | 164 | three step-down converters and two general-purpose LDO voltage regulators. |
158 | It supports TI's software based Class-2 SmartReflex implementation. | 165 | It supports TI's software based Class-2 SmartReflex implementation. |
159 | 166 | ||
167 | config REGULATOR_88PM8607 | ||
168 | bool "Marvell 88PM8607 Power regulators" | ||
169 | depends on MFD_88PM8607=y | ||
170 | help | ||
171 | This driver supports 88PM8607 voltage regulator chips. | ||
172 | |||
160 | endif | 173 | endif |
161 | 174 | ||
diff --git a/drivers/regulator/Makefile b/drivers/regulator/Makefile index 9ae3cc44e668..b3c806c79415 100644 --- a/drivers/regulator/Makefile +++ b/drivers/regulator/Makefile | |||
@@ -12,6 +12,7 @@ obj-$(CONFIG_REGULATOR_BQ24022) += bq24022.o | |||
12 | obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o | 12 | obj-$(CONFIG_REGULATOR_LP3971) += lp3971.o |
13 | obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o | 13 | obj-$(CONFIG_REGULATOR_MAX1586) += max1586.o |
14 | obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o | 14 | obj-$(CONFIG_REGULATOR_TWL4030) += twl-regulator.o |
15 | obj-$(CONFIG_REGULATOR_MAX8660) += max8660.o | ||
15 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o | 16 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-dcdc.o |
16 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o | 17 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-isink.o |
17 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o | 18 | obj-$(CONFIG_REGULATOR_WM831X) += wm831x-ldo.o |
@@ -20,10 +21,11 @@ obj-$(CONFIG_REGULATOR_WM8400) += wm8400-regulator.o | |||
20 | obj-$(CONFIG_REGULATOR_DA903X) += da903x.o | 21 | obj-$(CONFIG_REGULATOR_DA903X) += da903x.o |
21 | obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o | 22 | obj-$(CONFIG_REGULATOR_PCF50633) += pcf50633-regulator.o |
22 | obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o | 23 | obj-$(CONFIG_REGULATOR_PCAP) += pcap-regulator.o |
23 | obj-$(CONFIG_REGULATOR_MC13783) += mc13783.o | 24 | obj-$(CONFIG_REGULATOR_MC13783) += mc13783-regulator.o |
24 | obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o | 25 | obj-$(CONFIG_REGULATOR_AB3100) += ab3100.o |
25 | 26 | ||
26 | obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o | 27 | obj-$(CONFIG_REGULATOR_TPS65023) += tps65023-regulator.o |
27 | obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o | 28 | obj-$(CONFIG_REGULATOR_TPS6507X) += tps6507x-regulator.o |
29 | obj-$(CONFIG_REGULATOR_88PM8607) += 88pm8607.o | ||
28 | 30 | ||
29 | ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG | 31 | ccflags-$(CONFIG_REGULATOR_DEBUG) += -DDEBUG |
diff --git a/drivers/regulator/ab3100.c b/drivers/regulator/ab3100.c index 49aeee823a25..b349db4504b7 100644 --- a/drivers/regulator/ab3100.c +++ b/drivers/regulator/ab3100.c | |||
@@ -81,7 +81,7 @@ static const u8 ab3100_reg_init_order[AB3100_NUM_REGULATORS+2] = { | |||
81 | #define LDO_C_VOLTAGE 2650000 | 81 | #define LDO_C_VOLTAGE 2650000 |
82 | #define LDO_D_VOLTAGE 2650000 | 82 | #define LDO_D_VOLTAGE 2650000 |
83 | 83 | ||
84 | static const int const ldo_e_buck_typ_voltages[] = { | 84 | static const int ldo_e_buck_typ_voltages[] = { |
85 | 1800000, | 85 | 1800000, |
86 | 1400000, | 86 | 1400000, |
87 | 1300000, | 87 | 1300000, |
@@ -91,7 +91,7 @@ static const int const ldo_e_buck_typ_voltages[] = { | |||
91 | 900000, | 91 | 900000, |
92 | }; | 92 | }; |
93 | 93 | ||
94 | static const int const ldo_f_typ_voltages[] = { | 94 | static const int ldo_f_typ_voltages[] = { |
95 | 1800000, | 95 | 1800000, |
96 | 1400000, | 96 | 1400000, |
97 | 1300000, | 97 | 1300000, |
@@ -102,21 +102,21 @@ static const int const ldo_f_typ_voltages[] = { | |||
102 | 2650000, | 102 | 2650000, |
103 | }; | 103 | }; |
104 | 104 | ||
105 | static const int const ldo_g_typ_voltages[] = { | 105 | static const int ldo_g_typ_voltages[] = { |
106 | 2850000, | 106 | 2850000, |
107 | 2750000, | 107 | 2750000, |
108 | 1800000, | 108 | 1800000, |
109 | 1500000, | 109 | 1500000, |
110 | }; | 110 | }; |
111 | 111 | ||
112 | static const int const ldo_h_typ_voltages[] = { | 112 | static const int ldo_h_typ_voltages[] = { |
113 | 2750000, | 113 | 2750000, |
114 | 1800000, | 114 | 1800000, |
115 | 1500000, | 115 | 1500000, |
116 | 1200000, | 116 | 1200000, |
117 | }; | 117 | }; |
118 | 118 | ||
119 | static const int const ldo_k_typ_voltages[] = { | 119 | static const int ldo_k_typ_voltages[] = { |
120 | 2750000, | 120 | 2750000, |
121 | 1800000, | 121 | 1800000, |
122 | }; | 122 | }; |
@@ -241,24 +241,12 @@ static int ab3100_disable_regulator(struct regulator_dev *reg) | |||
241 | * LDO D is a special regulator. When it is disabled, the entire | 241 | * LDO D is a special regulator. When it is disabled, the entire |
242 | * system is shut down. So this is handled specially. | 242 | * system is shut down. So this is handled specially. |
243 | */ | 243 | */ |
244 | pr_info("Called ab3100_disable_regulator\n"); | ||
244 | if (abreg->regreg == AB3100_LDO_D) { | 245 | if (abreg->regreg == AB3100_LDO_D) { |
245 | int i; | ||
246 | |||
247 | dev_info(®->dev, "disabling LDO D - shut down system\n"); | 246 | dev_info(®->dev, "disabling LDO D - shut down system\n"); |
248 | /* | ||
249 | * Set regulators to default values, ignore any errors, | ||
250 | * we're going DOWN | ||
251 | */ | ||
252 | for (i = 0; i < ARRAY_SIZE(ab3100_reg_init_order); i++) { | ||
253 | (void) ab3100_set_register_interruptible(abreg->ab3100, | ||
254 | ab3100_reg_init_order[i], | ||
255 | abreg->plfdata->reg_initvals[i]); | ||
256 | } | ||
257 | |||
258 | /* Setting LDO D to 0x00 cuts the power to the SoC */ | 247 | /* Setting LDO D to 0x00 cuts the power to the SoC */ |
259 | return ab3100_set_register_interruptible(abreg->ab3100, | 248 | return ab3100_set_register_interruptible(abreg->ab3100, |
260 | AB3100_LDO_D, 0x00U); | 249 | AB3100_LDO_D, 0x00U); |
261 | |||
262 | } | 250 | } |
263 | 251 | ||
264 | /* | 252 | /* |
@@ -607,13 +595,6 @@ static int __init ab3100_regulators_probe(struct platform_device *pdev) | |||
607 | } | 595 | } |
608 | } | 596 | } |
609 | 597 | ||
610 | if (err) { | ||
611 | dev_err(&pdev->dev, | ||
612 | "LDO D regulator initialization failed with error %d\n", | ||
613 | err); | ||
614 | return err; | ||
615 | } | ||
616 | |||
617 | /* Register the regulators */ | 598 | /* Register the regulators */ |
618 | for (i = 0; i < AB3100_NUM_REGULATORS; i++) { | 599 | for (i = 0; i < AB3100_NUM_REGULATORS; i++) { |
619 | struct ab3100_regulator *reg = &ab3100_regulators[i]; | 600 | struct ab3100_regulator *reg = &ab3100_regulators[i]; |
@@ -688,7 +669,7 @@ static __init int ab3100_regulators_init(void) | |||
688 | 669 | ||
689 | static __exit void ab3100_regulators_exit(void) | 670 | static __exit void ab3100_regulators_exit(void) |
690 | { | 671 | { |
691 | platform_driver_register(&ab3100_regulators_driver); | 672 | platform_driver_unregister(&ab3100_regulators_driver); |
692 | } | 673 | } |
693 | 674 | ||
694 | subsys_initcall(ab3100_regulators_init); | 675 | subsys_initcall(ab3100_regulators_init); |
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c index efe568deda12..686ef270ecf7 100644 --- a/drivers/regulator/core.c +++ b/drivers/regulator/core.c | |||
@@ -66,6 +66,16 @@ static unsigned int _regulator_get_mode(struct regulator_dev *rdev); | |||
66 | static void _notifier_call_chain(struct regulator_dev *rdev, | 66 | static void _notifier_call_chain(struct regulator_dev *rdev, |
67 | unsigned long event, void *data); | 67 | unsigned long event, void *data); |
68 | 68 | ||
69 | static const char *rdev_get_name(struct regulator_dev *rdev) | ||
70 | { | ||
71 | if (rdev->constraints && rdev->constraints->name) | ||
72 | return rdev->constraints->name; | ||
73 | else if (rdev->desc->name) | ||
74 | return rdev->desc->name; | ||
75 | else | ||
76 | return ""; | ||
77 | } | ||
78 | |||
69 | /* gets the regulator for a given consumer device */ | 79 | /* gets the regulator for a given consumer device */ |
70 | static struct regulator *get_device_regulator(struct device *dev) | 80 | static struct regulator *get_device_regulator(struct device *dev) |
71 | { | 81 | { |
@@ -96,12 +106,12 @@ static int regulator_check_voltage(struct regulator_dev *rdev, | |||
96 | 106 | ||
97 | if (!rdev->constraints) { | 107 | if (!rdev->constraints) { |
98 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, | 108 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, |
99 | rdev->desc->name); | 109 | rdev_get_name(rdev)); |
100 | return -ENODEV; | 110 | return -ENODEV; |
101 | } | 111 | } |
102 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { | 112 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_VOLTAGE)) { |
103 | printk(KERN_ERR "%s: operation not allowed for %s\n", | 113 | printk(KERN_ERR "%s: operation not allowed for %s\n", |
104 | __func__, rdev->desc->name); | 114 | __func__, rdev_get_name(rdev)); |
105 | return -EPERM; | 115 | return -EPERM; |
106 | } | 116 | } |
107 | 117 | ||
@@ -124,12 +134,12 @@ static int regulator_check_current_limit(struct regulator_dev *rdev, | |||
124 | 134 | ||
125 | if (!rdev->constraints) { | 135 | if (!rdev->constraints) { |
126 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, | 136 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, |
127 | rdev->desc->name); | 137 | rdev_get_name(rdev)); |
128 | return -ENODEV; | 138 | return -ENODEV; |
129 | } | 139 | } |
130 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_CURRENT)) { | 140 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_CURRENT)) { |
131 | printk(KERN_ERR "%s: operation not allowed for %s\n", | 141 | printk(KERN_ERR "%s: operation not allowed for %s\n", |
132 | __func__, rdev->desc->name); | 142 | __func__, rdev_get_name(rdev)); |
133 | return -EPERM; | 143 | return -EPERM; |
134 | } | 144 | } |
135 | 145 | ||
@@ -159,17 +169,17 @@ static int regulator_check_mode(struct regulator_dev *rdev, int mode) | |||
159 | 169 | ||
160 | if (!rdev->constraints) { | 170 | if (!rdev->constraints) { |
161 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, | 171 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, |
162 | rdev->desc->name); | 172 | rdev_get_name(rdev)); |
163 | return -ENODEV; | 173 | return -ENODEV; |
164 | } | 174 | } |
165 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_MODE)) { | 175 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_MODE)) { |
166 | printk(KERN_ERR "%s: operation not allowed for %s\n", | 176 | printk(KERN_ERR "%s: operation not allowed for %s\n", |
167 | __func__, rdev->desc->name); | 177 | __func__, rdev_get_name(rdev)); |
168 | return -EPERM; | 178 | return -EPERM; |
169 | } | 179 | } |
170 | if (!(rdev->constraints->valid_modes_mask & mode)) { | 180 | if (!(rdev->constraints->valid_modes_mask & mode)) { |
171 | printk(KERN_ERR "%s: invalid mode %x for %s\n", | 181 | printk(KERN_ERR "%s: invalid mode %x for %s\n", |
172 | __func__, mode, rdev->desc->name); | 182 | __func__, mode, rdev_get_name(rdev)); |
173 | return -EINVAL; | 183 | return -EINVAL; |
174 | } | 184 | } |
175 | return 0; | 185 | return 0; |
@@ -180,12 +190,12 @@ static int regulator_check_drms(struct regulator_dev *rdev) | |||
180 | { | 190 | { |
181 | if (!rdev->constraints) { | 191 | if (!rdev->constraints) { |
182 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, | 192 | printk(KERN_ERR "%s: no constraints for %s\n", __func__, |
183 | rdev->desc->name); | 193 | rdev_get_name(rdev)); |
184 | return -ENODEV; | 194 | return -ENODEV; |
185 | } | 195 | } |
186 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_DRMS)) { | 196 | if (!(rdev->constraints->valid_ops_mask & REGULATOR_CHANGE_DRMS)) { |
187 | printk(KERN_ERR "%s: operation not allowed for %s\n", | 197 | printk(KERN_ERR "%s: operation not allowed for %s\n", |
188 | __func__, rdev->desc->name); | 198 | __func__, rdev_get_name(rdev)); |
189 | return -EPERM; | 199 | return -EPERM; |
190 | } | 200 | } |
191 | return 0; | 201 | return 0; |
@@ -230,16 +240,8 @@ static ssize_t regulator_name_show(struct device *dev, | |||
230 | struct device_attribute *attr, char *buf) | 240 | struct device_attribute *attr, char *buf) |
231 | { | 241 | { |
232 | struct regulator_dev *rdev = dev_get_drvdata(dev); | 242 | struct regulator_dev *rdev = dev_get_drvdata(dev); |
233 | const char *name; | ||
234 | 243 | ||
235 | if (rdev->constraints && rdev->constraints->name) | 244 | return sprintf(buf, "%s\n", rdev_get_name(rdev)); |
236 | name = rdev->constraints->name; | ||
237 | else if (rdev->desc->name) | ||
238 | name = rdev->desc->name; | ||
239 | else | ||
240 | name = ""; | ||
241 | |||
242 | return sprintf(buf, "%s\n", name); | ||
243 | } | 245 | } |
244 | 246 | ||
245 | static ssize_t regulator_print_opmode(char *buf, int mode) | 247 | static ssize_t regulator_print_opmode(char *buf, int mode) |
@@ -388,7 +390,7 @@ static ssize_t regulator_total_uA_show(struct device *dev, | |||
388 | 390 | ||
389 | mutex_lock(&rdev->mutex); | 391 | mutex_lock(&rdev->mutex); |
390 | list_for_each_entry(regulator, &rdev->consumer_list, list) | 392 | list_for_each_entry(regulator, &rdev->consumer_list, list) |
391 | uA += regulator->uA_load; | 393 | uA += regulator->uA_load; |
392 | mutex_unlock(&rdev->mutex); | 394 | mutex_unlock(&rdev->mutex); |
393 | return sprintf(buf, "%d\n", uA); | 395 | return sprintf(buf, "%d\n", uA); |
394 | } | 396 | } |
@@ -563,7 +565,7 @@ static void drms_uA_update(struct regulator_dev *rdev) | |||
563 | 565 | ||
564 | /* calc total requested load */ | 566 | /* calc total requested load */ |
565 | list_for_each_entry(sibling, &rdev->consumer_list, list) | 567 | list_for_each_entry(sibling, &rdev->consumer_list, list) |
566 | current_uA += sibling->uA_load; | 568 | current_uA += sibling->uA_load; |
567 | 569 | ||
568 | /* now get the optimum mode for our new total regulator load */ | 570 | /* now get the optimum mode for our new total regulator load */ |
569 | mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV, | 571 | mode = rdev->desc->ops->get_optimum_mode(rdev, input_uV, |
@@ -579,10 +581,29 @@ static int suspend_set_state(struct regulator_dev *rdev, | |||
579 | struct regulator_state *rstate) | 581 | struct regulator_state *rstate) |
580 | { | 582 | { |
581 | int ret = 0; | 583 | int ret = 0; |
584 | bool can_set_state; | ||
582 | 585 | ||
583 | /* enable & disable are mandatory for suspend control */ | 586 | can_set_state = rdev->desc->ops->set_suspend_enable && |
584 | if (!rdev->desc->ops->set_suspend_enable || | 587 | rdev->desc->ops->set_suspend_disable; |
585 | !rdev->desc->ops->set_suspend_disable) { | 588 | |
589 | /* If we have no suspend mode configration don't set anything; | ||
590 | * only warn if the driver actually makes the suspend mode | ||
591 | * configurable. | ||
592 | */ | ||
593 | if (!rstate->enabled && !rstate->disabled) { | ||
594 | if (can_set_state) | ||
595 | printk(KERN_WARNING "%s: No configuration for %s\n", | ||
596 | __func__, rdev_get_name(rdev)); | ||
597 | return 0; | ||
598 | } | ||
599 | |||
600 | if (rstate->enabled && rstate->disabled) { | ||
601 | printk(KERN_ERR "%s: invalid configuration for %s\n", | ||
602 | __func__, rdev_get_name(rdev)); | ||
603 | return -EINVAL; | ||
604 | } | ||
605 | |||
606 | if (!can_set_state) { | ||
586 | printk(KERN_ERR "%s: no way to set suspend state\n", | 607 | printk(KERN_ERR "%s: no way to set suspend state\n", |
587 | __func__); | 608 | __func__); |
588 | return -EINVAL; | 609 | return -EINVAL; |
@@ -641,25 +662,43 @@ static void print_constraints(struct regulator_dev *rdev) | |||
641 | { | 662 | { |
642 | struct regulation_constraints *constraints = rdev->constraints; | 663 | struct regulation_constraints *constraints = rdev->constraints; |
643 | char buf[80]; | 664 | char buf[80]; |
644 | int count; | 665 | int count = 0; |
666 | int ret; | ||
645 | 667 | ||
646 | if (rdev->desc->type == REGULATOR_VOLTAGE) { | 668 | if (constraints->min_uV && constraints->max_uV) { |
647 | if (constraints->min_uV == constraints->max_uV) | 669 | if (constraints->min_uV == constraints->max_uV) |
648 | count = sprintf(buf, "%d mV ", | 670 | count += sprintf(buf + count, "%d mV ", |
649 | constraints->min_uV / 1000); | 671 | constraints->min_uV / 1000); |
650 | else | 672 | else |
651 | count = sprintf(buf, "%d <--> %d mV ", | 673 | count += sprintf(buf + count, "%d <--> %d mV ", |
652 | constraints->min_uV / 1000, | 674 | constraints->min_uV / 1000, |
653 | constraints->max_uV / 1000); | 675 | constraints->max_uV / 1000); |
654 | } else { | 676 | } |
677 | |||
678 | if (!constraints->min_uV || | ||
679 | constraints->min_uV != constraints->max_uV) { | ||
680 | ret = _regulator_get_voltage(rdev); | ||
681 | if (ret > 0) | ||
682 | count += sprintf(buf + count, "at %d mV ", ret / 1000); | ||
683 | } | ||
684 | |||
685 | if (constraints->min_uA && constraints->max_uA) { | ||
655 | if (constraints->min_uA == constraints->max_uA) | 686 | if (constraints->min_uA == constraints->max_uA) |
656 | count = sprintf(buf, "%d mA ", | 687 | count += sprintf(buf + count, "%d mA ", |
657 | constraints->min_uA / 1000); | 688 | constraints->min_uA / 1000); |
658 | else | 689 | else |
659 | count = sprintf(buf, "%d <--> %d mA ", | 690 | count += sprintf(buf + count, "%d <--> %d mA ", |
660 | constraints->min_uA / 1000, | 691 | constraints->min_uA / 1000, |
661 | constraints->max_uA / 1000); | 692 | constraints->max_uA / 1000); |
662 | } | 693 | } |
694 | |||
695 | if (!constraints->min_uA || | ||
696 | constraints->min_uA != constraints->max_uA) { | ||
697 | ret = _regulator_get_current_limit(rdev); | ||
698 | if (ret > 0) | ||
699 | count += sprintf(buf + count, "at %d uA ", ret / 1000); | ||
700 | } | ||
701 | |||
663 | if (constraints->valid_modes_mask & REGULATOR_MODE_FAST) | 702 | if (constraints->valid_modes_mask & REGULATOR_MODE_FAST) |
664 | count += sprintf(buf + count, "fast "); | 703 | count += sprintf(buf + count, "fast "); |
665 | if (constraints->valid_modes_mask & REGULATOR_MODE_NORMAL) | 704 | if (constraints->valid_modes_mask & REGULATOR_MODE_NORMAL) |
@@ -669,33 +708,30 @@ static void print_constraints(struct regulator_dev *rdev) | |||
669 | if (constraints->valid_modes_mask & REGULATOR_MODE_STANDBY) | 708 | if (constraints->valid_modes_mask & REGULATOR_MODE_STANDBY) |
670 | count += sprintf(buf + count, "standby"); | 709 | count += sprintf(buf + count, "standby"); |
671 | 710 | ||
672 | printk(KERN_INFO "regulator: %s: %s\n", rdev->desc->name, buf); | 711 | printk(KERN_INFO "regulator: %s: %s\n", rdev_get_name(rdev), buf); |
673 | } | 712 | } |
674 | 713 | ||
675 | /** | 714 | static int machine_constraints_voltage(struct regulator_dev *rdev, |
676 | * set_machine_constraints - sets regulator constraints | ||
677 | * @rdev: regulator source | ||
678 | * @constraints: constraints to apply | ||
679 | * | ||
680 | * Allows platform initialisation code to define and constrain | ||
681 | * regulator circuits e.g. valid voltage/current ranges, etc. NOTE: | ||
682 | * Constraints *must* be set by platform code in order for some | ||
683 | * regulator operations to proceed i.e. set_voltage, set_current_limit, | ||
684 | * set_mode. | ||
685 | */ | ||
686 | static int set_machine_constraints(struct regulator_dev *rdev, | ||
687 | struct regulation_constraints *constraints) | 715 | struct regulation_constraints *constraints) |
688 | { | 716 | { |
689 | int ret = 0; | ||
690 | const char *name; | ||
691 | struct regulator_ops *ops = rdev->desc->ops; | 717 | struct regulator_ops *ops = rdev->desc->ops; |
718 | const char *name = rdev_get_name(rdev); | ||
719 | int ret; | ||
692 | 720 | ||
693 | if (constraints->name) | 721 | /* do we need to apply the constraint voltage */ |
694 | name = constraints->name; | 722 | if (rdev->constraints->apply_uV && |
695 | else if (rdev->desc->name) | 723 | rdev->constraints->min_uV == rdev->constraints->max_uV && |
696 | name = rdev->desc->name; | 724 | ops->set_voltage) { |
697 | else | 725 | ret = ops->set_voltage(rdev, |
698 | name = "regulator"; | 726 | rdev->constraints->min_uV, rdev->constraints->max_uV); |
727 | if (ret < 0) { | ||
728 | printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n", | ||
729 | __func__, | ||
730 | rdev->constraints->min_uV, name); | ||
731 | rdev->constraints = NULL; | ||
732 | return ret; | ||
733 | } | ||
734 | } | ||
699 | 735 | ||
700 | /* constrain machine-level voltage specs to fit | 736 | /* constrain machine-level voltage specs to fit |
701 | * the actual range supported by this regulator. | 737 | * the actual range supported by this regulator. |
@@ -719,14 +755,13 @@ static int set_machine_constraints(struct regulator_dev *rdev, | |||
719 | 755 | ||
720 | /* voltage constraints are optional */ | 756 | /* voltage constraints are optional */ |
721 | if ((cmin == 0) && (cmax == 0)) | 757 | if ((cmin == 0) && (cmax == 0)) |
722 | goto out; | 758 | return 0; |
723 | 759 | ||
724 | /* else require explicit machine-level constraints */ | 760 | /* else require explicit machine-level constraints */ |
725 | if (cmin <= 0 || cmax <= 0 || cmax < cmin) { | 761 | if (cmin <= 0 || cmax <= 0 || cmax < cmin) { |
726 | pr_err("%s: %s '%s' voltage constraints\n", | 762 | pr_err("%s: %s '%s' voltage constraints\n", |
727 | __func__, "invalid", name); | 763 | __func__, "invalid", name); |
728 | ret = -EINVAL; | 764 | return -EINVAL; |
729 | goto out; | ||
730 | } | 765 | } |
731 | 766 | ||
732 | /* initial: [cmin..cmax] valid, [min_uV..max_uV] not */ | 767 | /* initial: [cmin..cmax] valid, [min_uV..max_uV] not */ |
@@ -748,8 +783,7 @@ static int set_machine_constraints(struct regulator_dev *rdev, | |||
748 | if (max_uV < min_uV) { | 783 | if (max_uV < min_uV) { |
749 | pr_err("%s: %s '%s' voltage constraints\n", | 784 | pr_err("%s: %s '%s' voltage constraints\n", |
750 | __func__, "unsupportable", name); | 785 | __func__, "unsupportable", name); |
751 | ret = -EINVAL; | 786 | return -EINVAL; |
752 | goto out; | ||
753 | } | 787 | } |
754 | 788 | ||
755 | /* use regulator's subset of machine constraints */ | 789 | /* use regulator's subset of machine constraints */ |
@@ -767,22 +801,34 @@ static int set_machine_constraints(struct regulator_dev *rdev, | |||
767 | } | 801 | } |
768 | } | 802 | } |
769 | 803 | ||
804 | return 0; | ||
805 | } | ||
806 | |||
807 | /** | ||
808 | * set_machine_constraints - sets regulator constraints | ||
809 | * @rdev: regulator source | ||
810 | * @constraints: constraints to apply | ||
811 | * | ||
812 | * Allows platform initialisation code to define and constrain | ||
813 | * regulator circuits e.g. valid voltage/current ranges, etc. NOTE: | ||
814 | * Constraints *must* be set by platform code in order for some | ||
815 | * regulator operations to proceed i.e. set_voltage, set_current_limit, | ||
816 | * set_mode. | ||
817 | */ | ||
818 | static int set_machine_constraints(struct regulator_dev *rdev, | ||
819 | struct regulation_constraints *constraints) | ||
820 | { | ||
821 | int ret = 0; | ||
822 | const char *name; | ||
823 | struct regulator_ops *ops = rdev->desc->ops; | ||
824 | |||
770 | rdev->constraints = constraints; | 825 | rdev->constraints = constraints; |
771 | 826 | ||
772 | /* do we need to apply the constraint voltage */ | 827 | name = rdev_get_name(rdev); |
773 | if (rdev->constraints->apply_uV && | 828 | |
774 | rdev->constraints->min_uV == rdev->constraints->max_uV && | 829 | ret = machine_constraints_voltage(rdev, constraints); |
775 | ops->set_voltage) { | 830 | if (ret != 0) |
776 | ret = ops->set_voltage(rdev, | 831 | goto out; |
777 | rdev->constraints->min_uV, rdev->constraints->max_uV); | ||
778 | if (ret < 0) { | ||
779 | printk(KERN_ERR "%s: failed to apply %duV constraint to %s\n", | ||
780 | __func__, | ||
781 | rdev->constraints->min_uV, name); | ||
782 | rdev->constraints = NULL; | ||
783 | goto out; | ||
784 | } | ||
785 | } | ||
786 | 832 | ||
787 | /* do we need to setup our suspend state */ | 833 | /* do we need to setup our suspend state */ |
788 | if (constraints->initial_state) { | 834 | if (constraints->initial_state) { |
@@ -903,7 +949,7 @@ static int set_consumer_device_supply(struct regulator_dev *rdev, | |||
903 | dev_name(&node->regulator->dev), | 949 | dev_name(&node->regulator->dev), |
904 | node->regulator->desc->name, | 950 | node->regulator->desc->name, |
905 | supply, | 951 | supply, |
906 | dev_name(&rdev->dev), rdev->desc->name); | 952 | dev_name(&rdev->dev), rdev_get_name(rdev)); |
907 | return -EBUSY; | 953 | return -EBUSY; |
908 | } | 954 | } |
909 | 955 | ||
@@ -1212,7 +1258,7 @@ static int _regulator_enable(struct regulator_dev *rdev) | |||
1212 | ret = _regulator_enable(rdev->supply); | 1258 | ret = _regulator_enable(rdev->supply); |
1213 | if (ret < 0) { | 1259 | if (ret < 0) { |
1214 | printk(KERN_ERR "%s: failed to enable %s: %d\n", | 1260 | printk(KERN_ERR "%s: failed to enable %s: %d\n", |
1215 | __func__, rdev->desc->name, ret); | 1261 | __func__, rdev_get_name(rdev), ret); |
1216 | return ret; | 1262 | return ret; |
1217 | } | 1263 | } |
1218 | } | 1264 | } |
@@ -1238,7 +1284,7 @@ static int _regulator_enable(struct regulator_dev *rdev) | |||
1238 | } | 1284 | } |
1239 | } else if (ret < 0) { | 1285 | } else if (ret < 0) { |
1240 | printk(KERN_ERR "%s: is_enabled() failed for %s: %d\n", | 1286 | printk(KERN_ERR "%s: is_enabled() failed for %s: %d\n", |
1241 | __func__, rdev->desc->name, ret); | 1287 | __func__, rdev_get_name(rdev), ret); |
1242 | return ret; | 1288 | return ret; |
1243 | } | 1289 | } |
1244 | /* Fallthrough on positive return values - already enabled */ | 1290 | /* Fallthrough on positive return values - already enabled */ |
@@ -1279,7 +1325,7 @@ static int _regulator_disable(struct regulator_dev *rdev) | |||
1279 | 1325 | ||
1280 | if (WARN(rdev->use_count <= 0, | 1326 | if (WARN(rdev->use_count <= 0, |
1281 | "unbalanced disables for %s\n", | 1327 | "unbalanced disables for %s\n", |
1282 | rdev->desc->name)) | 1328 | rdev_get_name(rdev))) |
1283 | return -EIO; | 1329 | return -EIO; |
1284 | 1330 | ||
1285 | /* are we the last user and permitted to disable ? */ | 1331 | /* are we the last user and permitted to disable ? */ |
@@ -1292,7 +1338,7 @@ static int _regulator_disable(struct regulator_dev *rdev) | |||
1292 | ret = rdev->desc->ops->disable(rdev); | 1338 | ret = rdev->desc->ops->disable(rdev); |
1293 | if (ret < 0) { | 1339 | if (ret < 0) { |
1294 | printk(KERN_ERR "%s: failed to disable %s\n", | 1340 | printk(KERN_ERR "%s: failed to disable %s\n", |
1295 | __func__, rdev->desc->name); | 1341 | __func__, rdev_get_name(rdev)); |
1296 | return ret; | 1342 | return ret; |
1297 | } | 1343 | } |
1298 | } | 1344 | } |
@@ -1349,7 +1395,7 @@ static int _regulator_force_disable(struct regulator_dev *rdev) | |||
1349 | ret = rdev->desc->ops->disable(rdev); | 1395 | ret = rdev->desc->ops->disable(rdev); |
1350 | if (ret < 0) { | 1396 | if (ret < 0) { |
1351 | printk(KERN_ERR "%s: failed to force disable %s\n", | 1397 | printk(KERN_ERR "%s: failed to force disable %s\n", |
1352 | __func__, rdev->desc->name); | 1398 | __func__, rdev_get_name(rdev)); |
1353 | return ret; | 1399 | return ret; |
1354 | } | 1400 | } |
1355 | /* notify other consumers that power has been forced off */ | 1401 | /* notify other consumers that power has been forced off */ |
@@ -1766,7 +1812,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load) | |||
1766 | output_uV = rdev->desc->ops->get_voltage(rdev); | 1812 | output_uV = rdev->desc->ops->get_voltage(rdev); |
1767 | if (output_uV <= 0) { | 1813 | if (output_uV <= 0) { |
1768 | printk(KERN_ERR "%s: invalid output voltage found for %s\n", | 1814 | printk(KERN_ERR "%s: invalid output voltage found for %s\n", |
1769 | __func__, rdev->desc->name); | 1815 | __func__, rdev_get_name(rdev)); |
1770 | goto out; | 1816 | goto out; |
1771 | } | 1817 | } |
1772 | 1818 | ||
@@ -1777,13 +1823,13 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load) | |||
1777 | input_uV = rdev->constraints->input_uV; | 1823 | input_uV = rdev->constraints->input_uV; |
1778 | if (input_uV <= 0) { | 1824 | if (input_uV <= 0) { |
1779 | printk(KERN_ERR "%s: invalid input voltage found for %s\n", | 1825 | printk(KERN_ERR "%s: invalid input voltage found for %s\n", |
1780 | __func__, rdev->desc->name); | 1826 | __func__, rdev_get_name(rdev)); |
1781 | goto out; | 1827 | goto out; |
1782 | } | 1828 | } |
1783 | 1829 | ||
1784 | /* calc total requested load for this regulator */ | 1830 | /* calc total requested load for this regulator */ |
1785 | list_for_each_entry(consumer, &rdev->consumer_list, list) | 1831 | list_for_each_entry(consumer, &rdev->consumer_list, list) |
1786 | total_uA_load += consumer->uA_load; | 1832 | total_uA_load += consumer->uA_load; |
1787 | 1833 | ||
1788 | mode = rdev->desc->ops->get_optimum_mode(rdev, | 1834 | mode = rdev->desc->ops->get_optimum_mode(rdev, |
1789 | input_uV, output_uV, | 1835 | input_uV, output_uV, |
@@ -1791,7 +1837,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load) | |||
1791 | ret = regulator_check_mode(rdev, mode); | 1837 | ret = regulator_check_mode(rdev, mode); |
1792 | if (ret < 0) { | 1838 | if (ret < 0) { |
1793 | printk(KERN_ERR "%s: failed to get optimum mode for %s @" | 1839 | printk(KERN_ERR "%s: failed to get optimum mode for %s @" |
1794 | " %d uA %d -> %d uV\n", __func__, rdev->desc->name, | 1840 | " %d uA %d -> %d uV\n", __func__, rdev_get_name(rdev), |
1795 | total_uA_load, input_uV, output_uV); | 1841 | total_uA_load, input_uV, output_uV); |
1796 | goto out; | 1842 | goto out; |
1797 | } | 1843 | } |
@@ -1799,7 +1845,7 @@ int regulator_set_optimum_mode(struct regulator *regulator, int uA_load) | |||
1799 | ret = rdev->desc->ops->set_mode(rdev, mode); | 1845 | ret = rdev->desc->ops->set_mode(rdev, mode); |
1800 | if (ret < 0) { | 1846 | if (ret < 0) { |
1801 | printk(KERN_ERR "%s: failed to set optimum mode %x for %s\n", | 1847 | printk(KERN_ERR "%s: failed to set optimum mode %x for %s\n", |
1802 | __func__, mode, rdev->desc->name); | 1848 | __func__, mode, rdev_get_name(rdev)); |
1803 | goto out; | 1849 | goto out; |
1804 | } | 1850 | } |
1805 | ret = mode; | 1851 | ret = mode; |
@@ -1852,9 +1898,9 @@ static void _notifier_call_chain(struct regulator_dev *rdev, | |||
1852 | 1898 | ||
1853 | /* now notify regulator we supply */ | 1899 | /* now notify regulator we supply */ |
1854 | list_for_each_entry(_rdev, &rdev->supply_list, slist) { | 1900 | list_for_each_entry(_rdev, &rdev->supply_list, slist) { |
1855 | mutex_lock(&_rdev->mutex); | 1901 | mutex_lock(&_rdev->mutex); |
1856 | _notifier_call_chain(_rdev, event, data); | 1902 | _notifier_call_chain(_rdev, event, data); |
1857 | mutex_unlock(&_rdev->mutex); | 1903 | mutex_unlock(&_rdev->mutex); |
1858 | } | 1904 | } |
1859 | } | 1905 | } |
1860 | 1906 | ||
@@ -1885,9 +1931,9 @@ int regulator_bulk_get(struct device *dev, int num_consumers, | |||
1885 | consumers[i].consumer = regulator_get(dev, | 1931 | consumers[i].consumer = regulator_get(dev, |
1886 | consumers[i].supply); | 1932 | consumers[i].supply); |
1887 | if (IS_ERR(consumers[i].consumer)) { | 1933 | if (IS_ERR(consumers[i].consumer)) { |
1888 | dev_err(dev, "Failed to get supply '%s'\n", | ||
1889 | consumers[i].supply); | ||
1890 | ret = PTR_ERR(consumers[i].consumer); | 1934 | ret = PTR_ERR(consumers[i].consumer); |
1935 | dev_err(dev, "Failed to get supply '%s': %d\n", | ||
1936 | consumers[i].supply, ret); | ||
1891 | consumers[i].consumer = NULL; | 1937 | consumers[i].consumer = NULL; |
1892 | goto err; | 1938 | goto err; |
1893 | } | 1939 | } |
@@ -1930,8 +1976,8 @@ int regulator_bulk_enable(int num_consumers, | |||
1930 | return 0; | 1976 | return 0; |
1931 | 1977 | ||
1932 | err: | 1978 | err: |
1933 | printk(KERN_ERR "Failed to enable %s\n", consumers[i].supply); | 1979 | printk(KERN_ERR "Failed to enable %s: %d\n", consumers[i].supply, ret); |
1934 | for (i = 0; i < num_consumers; i++) | 1980 | for (--i; i >= 0; --i) |
1935 | regulator_disable(consumers[i].consumer); | 1981 | regulator_disable(consumers[i].consumer); |
1936 | 1982 | ||
1937 | return ret; | 1983 | return ret; |
@@ -1965,8 +2011,9 @@ int regulator_bulk_disable(int num_consumers, | |||
1965 | return 0; | 2011 | return 0; |
1966 | 2012 | ||
1967 | err: | 2013 | err: |
1968 | printk(KERN_ERR "Failed to disable %s\n", consumers[i].supply); | 2014 | printk(KERN_ERR "Failed to disable %s: %d\n", consumers[i].supply, |
1969 | for (i = 0; i < num_consumers; i++) | 2015 | ret); |
2016 | for (--i; i >= 0; --i) | ||
1970 | regulator_enable(consumers[i].consumer); | 2017 | regulator_enable(consumers[i].consumer); |
1971 | 2018 | ||
1972 | return ret; | 2019 | return ret; |
@@ -2316,7 +2363,7 @@ int regulator_suspend_prepare(suspend_state_t state) | |||
2316 | 2363 | ||
2317 | if (ret < 0) { | 2364 | if (ret < 0) { |
2318 | printk(KERN_ERR "%s: failed to prepare %s\n", | 2365 | printk(KERN_ERR "%s: failed to prepare %s\n", |
2319 | __func__, rdev->desc->name); | 2366 | __func__, rdev_get_name(rdev)); |
2320 | goto out; | 2367 | goto out; |
2321 | } | 2368 | } |
2322 | } | 2369 | } |
@@ -2429,12 +2476,7 @@ static int __init regulator_init_complete(void) | |||
2429 | ops = rdev->desc->ops; | 2476 | ops = rdev->desc->ops; |
2430 | c = rdev->constraints; | 2477 | c = rdev->constraints; |
2431 | 2478 | ||
2432 | if (c && c->name) | 2479 | name = rdev_get_name(rdev); |
2433 | name = c->name; | ||
2434 | else if (rdev->desc->name) | ||
2435 | name = rdev->desc->name; | ||
2436 | else | ||
2437 | name = "regulator"; | ||
2438 | 2480 | ||
2439 | if (!ops->disable || (c && c->always_on)) | 2481 | if (!ops->disable || (c && c->always_on)) |
2440 | continue; | 2482 | continue; |
diff --git a/drivers/regulator/da903x.c b/drivers/regulator/da903x.c index aa224d936e0d..f8c4661a7a81 100644 --- a/drivers/regulator/da903x.c +++ b/drivers/regulator/da903x.c | |||
@@ -331,7 +331,7 @@ static int da9034_get_ldo12_voltage(struct regulator_dev *rdev) | |||
331 | static int da9034_list_ldo12_voltage(struct regulator_dev *rdev, | 331 | static int da9034_list_ldo12_voltage(struct regulator_dev *rdev, |
332 | unsigned selector) | 332 | unsigned selector) |
333 | { | 333 | { |
334 | if (selector > ARRAY_SIZE(da9034_ldo12_data)) | 334 | if (selector >= ARRAY_SIZE(da9034_ldo12_data)) |
335 | return -EINVAL; | 335 | return -EINVAL; |
336 | return da9034_ldo12_data[selector] * 1000; | 336 | return da9034_ldo12_data[selector] * 1000; |
337 | } | 337 | } |
diff --git a/drivers/regulator/lp3971.c b/drivers/regulator/lp3971.c index 7803a320543b..76d08c282f9c 100644 --- a/drivers/regulator/lp3971.c +++ b/drivers/regulator/lp3971.c | |||
@@ -446,8 +446,8 @@ static int setup_regulators(struct lp3971 *lp3971, | |||
446 | lp3971->rdev[i] = regulator_register(®ulators[id], | 446 | lp3971->rdev[i] = regulator_register(®ulators[id], |
447 | lp3971->dev, pdata->regulators[i].initdata, lp3971); | 447 | lp3971->dev, pdata->regulators[i].initdata, lp3971); |
448 | 448 | ||
449 | err = IS_ERR(lp3971->rdev[i]); | 449 | if (IS_ERR(lp3971->rdev[i])) { |
450 | if (err) { | 450 | err = PTR_ERR(lp3971->rdev[i]); |
451 | dev_err(lp3971->dev, "regulator init failed: %d\n", | 451 | dev_err(lp3971->dev, "regulator init failed: %d\n", |
452 | err); | 452 | err); |
453 | goto error; | 453 | goto error; |
diff --git a/drivers/regulator/max8660.c b/drivers/regulator/max8660.c new file mode 100644 index 000000000000..acc2fb7b6087 --- /dev/null +++ b/drivers/regulator/max8660.c | |||
@@ -0,0 +1,510 @@ | |||
1 | /* | ||
2 | * max8660.c -- Voltage regulation for the Maxim 8660/8661 | ||
3 | * | ||
4 | * based on max1586.c and wm8400-regulator.c | ||
5 | * | ||
6 | * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K. | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the Free | ||
10 | * Software Foundation; version 2 of the License. | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, but WITHOUT | ||
13 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
14 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
15 | * more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License along with | ||
18 | * this program; if not, write to the Free Software Foundation, Inc., 59 Temple | ||
19 | * Place, Suite 330, Boston, MA 02111-1307 USA | ||
20 | * | ||
21 | * Some info: | ||
22 | * | ||
23 | * Datasheet: http://datasheets.maxim-ic.com/en/ds/MAX8660-MAX8661.pdf | ||
24 | * | ||
25 | * This chip is a bit nasty because it is a write-only device. Thus, the driver | ||
26 | * uses shadow registers to keep track of its values. The main problem appears | ||
27 | * to be the initialization: When Linux boots up, we cannot know if the chip is | ||
28 | * in the default state or not, so we would have to pass such information in | ||
29 | * platform_data. As this adds a bit of complexity to the driver, this is left | ||
30 | * out for now until it is really needed. | ||
31 | * | ||
32 | * [A|S|M]DTV1 registers are currently not used, but [A|S|M]DTV2. | ||
33 | * | ||
34 | * If the driver is feature complete, it might be worth to check if one set of | ||
35 | * functions for V3-V7 is sufficient. For maximum flexibility during | ||
36 | * development, they are separated for now. | ||
37 | * | ||
38 | */ | ||
39 | |||
40 | #include <linux/module.h> | ||
41 | #include <linux/err.h> | ||
42 | #include <linux/i2c.h> | ||
43 | #include <linux/platform_device.h> | ||
44 | #include <linux/regulator/driver.h> | ||
45 | #include <linux/regulator/max8660.h> | ||
46 | |||
47 | #define MAX8660_DCDC_MIN_UV 725000 | ||
48 | #define MAX8660_DCDC_MAX_UV 1800000 | ||
49 | #define MAX8660_DCDC_STEP 25000 | ||
50 | #define MAX8660_DCDC_MAX_SEL 0x2b | ||
51 | |||
52 | #define MAX8660_LDO5_MIN_UV 1700000 | ||
53 | #define MAX8660_LDO5_MAX_UV 2000000 | ||
54 | #define MAX8660_LDO5_STEP 25000 | ||
55 | #define MAX8660_LDO5_MAX_SEL 0x0c | ||
56 | |||
57 | #define MAX8660_LDO67_MIN_UV 1800000 | ||
58 | #define MAX8660_LDO67_MAX_UV 3300000 | ||
59 | #define MAX8660_LDO67_STEP 100000 | ||
60 | #define MAX8660_LDO67_MAX_SEL 0x0f | ||
61 | |||
62 | enum { | ||
63 | MAX8660_OVER1, | ||
64 | MAX8660_OVER2, | ||
65 | MAX8660_VCC1, | ||
66 | MAX8660_ADTV1, | ||
67 | MAX8660_ADTV2, | ||
68 | MAX8660_SDTV1, | ||
69 | MAX8660_SDTV2, | ||
70 | MAX8660_MDTV1, | ||
71 | MAX8660_MDTV2, | ||
72 | MAX8660_L12VCR, | ||
73 | MAX8660_FPWM, | ||
74 | MAX8660_N_REGS, /* not a real register */ | ||
75 | }; | ||
76 | |||
77 | struct max8660 { | ||
78 | struct i2c_client *client; | ||
79 | u8 shadow_regs[MAX8660_N_REGS]; /* as chip is write only */ | ||
80 | struct regulator_dev *rdev[]; | ||
81 | }; | ||
82 | |||
83 | static int max8660_write(struct max8660 *max8660, u8 reg, u8 mask, u8 val) | ||
84 | { | ||
85 | static const u8 max8660_addresses[MAX8660_N_REGS] = | ||
86 | { 0x10, 0x12, 0x20, 0x23, 0x24, 0x29, 0x2a, 0x32, 0x33, 0x39, 0x80 }; | ||
87 | |||
88 | int ret; | ||
89 | u8 reg_val = (max8660->shadow_regs[reg] & mask) | val; | ||
90 | dev_vdbg(&max8660->client->dev, "Writing reg %02x with %02x\n", | ||
91 | max8660_addresses[reg], reg_val); | ||
92 | |||
93 | ret = i2c_smbus_write_byte_data(max8660->client, | ||
94 | max8660_addresses[reg], reg_val); | ||
95 | if (ret == 0) | ||
96 | max8660->shadow_regs[reg] = reg_val; | ||
97 | |||
98 | return ret; | ||
99 | } | ||
100 | |||
101 | |||
102 | /* | ||
103 | * DCDC functions | ||
104 | */ | ||
105 | |||
106 | static int max8660_dcdc_is_enabled(struct regulator_dev *rdev) | ||
107 | { | ||
108 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
109 | u8 val = max8660->shadow_regs[MAX8660_OVER1]; | ||
110 | u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4; | ||
111 | return !!(val & mask); | ||
112 | } | ||
113 | |||
114 | static int max8660_dcdc_enable(struct regulator_dev *rdev) | ||
115 | { | ||
116 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
117 | u8 bit = (rdev_get_id(rdev) == MAX8660_V3) ? 1 : 4; | ||
118 | return max8660_write(max8660, MAX8660_OVER1, 0xff, bit); | ||
119 | } | ||
120 | |||
121 | static int max8660_dcdc_disable(struct regulator_dev *rdev) | ||
122 | { | ||
123 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
124 | u8 mask = (rdev_get_id(rdev) == MAX8660_V3) ? ~1 : ~4; | ||
125 | return max8660_write(max8660, MAX8660_OVER1, mask, 0); | ||
126 | } | ||
127 | |||
128 | static int max8660_dcdc_list(struct regulator_dev *rdev, unsigned selector) | ||
129 | { | ||
130 | if (selector > MAX8660_DCDC_MAX_SEL) | ||
131 | return -EINVAL; | ||
132 | return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP; | ||
133 | } | ||
134 | |||
135 | static int max8660_dcdc_get(struct regulator_dev *rdev) | ||
136 | { | ||
137 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
138 | u8 reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2; | ||
139 | u8 selector = max8660->shadow_regs[reg]; | ||
140 | return MAX8660_DCDC_MIN_UV + selector * MAX8660_DCDC_STEP; | ||
141 | } | ||
142 | |||
143 | static int max8660_dcdc_set(struct regulator_dev *rdev, int min_uV, int max_uV) | ||
144 | { | ||
145 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
146 | u8 reg, selector, bits; | ||
147 | int ret; | ||
148 | |||
149 | if (min_uV < MAX8660_DCDC_MIN_UV || min_uV > MAX8660_DCDC_MAX_UV) | ||
150 | return -EINVAL; | ||
151 | if (max_uV < MAX8660_DCDC_MIN_UV || max_uV > MAX8660_DCDC_MAX_UV) | ||
152 | return -EINVAL; | ||
153 | |||
154 | selector = (min_uV - (MAX8660_DCDC_MIN_UV - MAX8660_DCDC_STEP + 1)) | ||
155 | / MAX8660_DCDC_STEP; | ||
156 | |||
157 | ret = max8660_dcdc_list(rdev, selector); | ||
158 | if (ret < 0 || ret > max_uV) | ||
159 | return -EINVAL; | ||
160 | |||
161 | reg = (rdev_get_id(rdev) == MAX8660_V3) ? MAX8660_ADTV2 : MAX8660_SDTV2; | ||
162 | ret = max8660_write(max8660, reg, 0, selector); | ||
163 | if (ret) | ||
164 | return ret; | ||
165 | |||
166 | /* Select target voltage register and activate regulation */ | ||
167 | bits = (rdev_get_id(rdev) == MAX8660_V3) ? 0x03 : 0x30; | ||
168 | return max8660_write(max8660, MAX8660_VCC1, 0xff, bits); | ||
169 | } | ||
170 | |||
171 | static struct regulator_ops max8660_dcdc_ops = { | ||
172 | .is_enabled = max8660_dcdc_is_enabled, | ||
173 | .list_voltage = max8660_dcdc_list, | ||
174 | .set_voltage = max8660_dcdc_set, | ||
175 | .get_voltage = max8660_dcdc_get, | ||
176 | }; | ||
177 | |||
178 | |||
179 | /* | ||
180 | * LDO5 functions | ||
181 | */ | ||
182 | |||
183 | static int max8660_ldo5_list(struct regulator_dev *rdev, unsigned selector) | ||
184 | { | ||
185 | if (selector > MAX8660_LDO5_MAX_SEL) | ||
186 | return -EINVAL; | ||
187 | return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP; | ||
188 | } | ||
189 | |||
190 | static int max8660_ldo5_get(struct regulator_dev *rdev) | ||
191 | { | ||
192 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
193 | u8 selector = max8660->shadow_regs[MAX8660_MDTV2]; | ||
194 | |||
195 | return MAX8660_LDO5_MIN_UV + selector * MAX8660_LDO5_STEP; | ||
196 | } | ||
197 | |||
198 | static int max8660_ldo5_set(struct regulator_dev *rdev, int min_uV, int max_uV) | ||
199 | { | ||
200 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
201 | u8 selector; | ||
202 | int ret; | ||
203 | |||
204 | if (min_uV < MAX8660_LDO5_MIN_UV || min_uV > MAX8660_LDO5_MAX_UV) | ||
205 | return -EINVAL; | ||
206 | if (max_uV < MAX8660_LDO5_MIN_UV || max_uV > MAX8660_LDO5_MAX_UV) | ||
207 | return -EINVAL; | ||
208 | |||
209 | selector = (min_uV - (MAX8660_LDO5_MIN_UV - MAX8660_LDO5_STEP + 1)) | ||
210 | / MAX8660_LDO5_STEP; | ||
211 | ret = max8660_ldo5_list(rdev, selector); | ||
212 | if (ret < 0 || ret > max_uV) | ||
213 | return -EINVAL; | ||
214 | |||
215 | ret = max8660_write(max8660, MAX8660_MDTV2, 0, selector); | ||
216 | if (ret) | ||
217 | return ret; | ||
218 | |||
219 | /* Select target voltage register and activate regulation */ | ||
220 | return max8660_write(max8660, MAX8660_VCC1, 0xff, 0xc0); | ||
221 | } | ||
222 | |||
223 | static struct regulator_ops max8660_ldo5_ops = { | ||
224 | .list_voltage = max8660_ldo5_list, | ||
225 | .set_voltage = max8660_ldo5_set, | ||
226 | .get_voltage = max8660_ldo5_get, | ||
227 | }; | ||
228 | |||
229 | |||
230 | /* | ||
231 | * LDO67 functions | ||
232 | */ | ||
233 | |||
234 | static int max8660_ldo67_is_enabled(struct regulator_dev *rdev) | ||
235 | { | ||
236 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
237 | u8 val = max8660->shadow_regs[MAX8660_OVER2]; | ||
238 | u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4; | ||
239 | return !!(val & mask); | ||
240 | } | ||
241 | |||
242 | static int max8660_ldo67_enable(struct regulator_dev *rdev) | ||
243 | { | ||
244 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
245 | u8 bit = (rdev_get_id(rdev) == MAX8660_V6) ? 2 : 4; | ||
246 | return max8660_write(max8660, MAX8660_OVER2, 0xff, bit); | ||
247 | } | ||
248 | |||
249 | static int max8660_ldo67_disable(struct regulator_dev *rdev) | ||
250 | { | ||
251 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
252 | u8 mask = (rdev_get_id(rdev) == MAX8660_V6) ? ~2 : ~4; | ||
253 | return max8660_write(max8660, MAX8660_OVER2, mask, 0); | ||
254 | } | ||
255 | |||
256 | static int max8660_ldo67_list(struct regulator_dev *rdev, unsigned selector) | ||
257 | { | ||
258 | if (selector > MAX8660_LDO67_MAX_SEL) | ||
259 | return -EINVAL; | ||
260 | return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP; | ||
261 | } | ||
262 | |||
263 | static int max8660_ldo67_get(struct regulator_dev *rdev) | ||
264 | { | ||
265 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
266 | u8 shift = (rdev_get_id(rdev) == MAX8660_V6) ? 0 : 4; | ||
267 | u8 selector = (max8660->shadow_regs[MAX8660_L12VCR] >> shift) & 0xf; | ||
268 | |||
269 | return MAX8660_LDO67_MIN_UV + selector * MAX8660_LDO67_STEP; | ||
270 | } | ||
271 | |||
272 | static int max8660_ldo67_set(struct regulator_dev *rdev, int min_uV, int max_uV) | ||
273 | { | ||
274 | struct max8660 *max8660 = rdev_get_drvdata(rdev); | ||
275 | u8 selector; | ||
276 | int ret; | ||
277 | |||
278 | if (min_uV < MAX8660_LDO67_MIN_UV || min_uV > MAX8660_LDO67_MAX_UV) | ||
279 | return -EINVAL; | ||
280 | if (max_uV < MAX8660_LDO67_MIN_UV || max_uV > MAX8660_LDO67_MAX_UV) | ||
281 | return -EINVAL; | ||
282 | |||
283 | selector = (min_uV - (MAX8660_LDO67_MIN_UV - MAX8660_LDO67_STEP + 1)) | ||
284 | / MAX8660_LDO67_STEP; | ||
285 | |||
286 | ret = max8660_ldo67_list(rdev, selector); | ||
287 | if (ret < 0 || ret > max_uV) | ||
288 | return -EINVAL; | ||
289 | |||
290 | if (rdev_get_id(rdev) == MAX8660_V6) | ||
291 | return max8660_write(max8660, MAX8660_L12VCR, 0xf0, selector); | ||
292 | else | ||
293 | return max8660_write(max8660, MAX8660_L12VCR, 0x0f, selector << 4); | ||
294 | } | ||
295 | |||
296 | static struct regulator_ops max8660_ldo67_ops = { | ||
297 | .is_enabled = max8660_ldo67_is_enabled, | ||
298 | .enable = max8660_ldo67_enable, | ||
299 | .disable = max8660_ldo67_disable, | ||
300 | .list_voltage = max8660_ldo67_list, | ||
301 | .get_voltage = max8660_ldo67_get, | ||
302 | .set_voltage = max8660_ldo67_set, | ||
303 | }; | ||
304 | |||
305 | static struct regulator_desc max8660_reg[] = { | ||
306 | { | ||
307 | .name = "V3(DCDC)", | ||
308 | .id = MAX8660_V3, | ||
309 | .ops = &max8660_dcdc_ops, | ||
310 | .type = REGULATOR_VOLTAGE, | ||
311 | .n_voltages = MAX8660_DCDC_MAX_SEL + 1, | ||
312 | .owner = THIS_MODULE, | ||
313 | }, | ||
314 | { | ||
315 | .name = "V4(DCDC)", | ||
316 | .id = MAX8660_V4, | ||
317 | .ops = &max8660_dcdc_ops, | ||
318 | .type = REGULATOR_VOLTAGE, | ||
319 | .n_voltages = MAX8660_DCDC_MAX_SEL + 1, | ||
320 | .owner = THIS_MODULE, | ||
321 | }, | ||
322 | { | ||
323 | .name = "V5(LDO)", | ||
324 | .id = MAX8660_V5, | ||
325 | .ops = &max8660_ldo5_ops, | ||
326 | .type = REGULATOR_VOLTAGE, | ||
327 | .n_voltages = MAX8660_LDO5_MAX_SEL + 1, | ||
328 | .owner = THIS_MODULE, | ||
329 | }, | ||
330 | { | ||
331 | .name = "V6(LDO)", | ||
332 | .id = MAX8660_V6, | ||
333 | .ops = &max8660_ldo67_ops, | ||
334 | .type = REGULATOR_VOLTAGE, | ||
335 | .n_voltages = MAX8660_LDO67_MAX_SEL + 1, | ||
336 | .owner = THIS_MODULE, | ||
337 | }, | ||
338 | { | ||
339 | .name = "V7(LDO)", | ||
340 | .id = MAX8660_V7, | ||
341 | .ops = &max8660_ldo67_ops, | ||
342 | .type = REGULATOR_VOLTAGE, | ||
343 | .n_voltages = MAX8660_LDO67_MAX_SEL + 1, | ||
344 | .owner = THIS_MODULE, | ||
345 | }, | ||
346 | }; | ||
347 | |||
348 | static int max8660_probe(struct i2c_client *client, | ||
349 | const struct i2c_device_id *i2c_id) | ||
350 | { | ||
351 | struct regulator_dev **rdev; | ||
352 | struct max8660_platform_data *pdata = client->dev.platform_data; | ||
353 | struct max8660 *max8660; | ||
354 | int boot_on, i, id, ret = -EINVAL; | ||
355 | |||
356 | if (pdata->num_subdevs > MAX8660_V_END) { | ||
357 | dev_err(&client->dev, "Too much regulators found!\n"); | ||
358 | goto out; | ||
359 | } | ||
360 | |||
361 | max8660 = kzalloc(sizeof(struct max8660) + | ||
362 | sizeof(struct regulator_dev *) * MAX8660_V_END, | ||
363 | GFP_KERNEL); | ||
364 | if (!max8660) { | ||
365 | ret = -ENOMEM; | ||
366 | goto out; | ||
367 | } | ||
368 | |||
369 | max8660->client = client; | ||
370 | rdev = max8660->rdev; | ||
371 | |||
372 | if (pdata->en34_is_high) { | ||
373 | /* Simulate always on */ | ||
374 | max8660->shadow_regs[MAX8660_OVER1] = 5; | ||
375 | } else { | ||
376 | /* Otherwise devices can be toggled via software */ | ||
377 | max8660_dcdc_ops.enable = max8660_dcdc_enable; | ||
378 | max8660_dcdc_ops.disable = max8660_dcdc_disable; | ||
379 | } | ||
380 | |||
381 | /* | ||
382 | * First, set up shadow registers to prevent glitches. As some | ||
383 | * registers are shared between regulators, everything must be properly | ||
384 | * set up for all regulators in advance. | ||
385 | */ | ||
386 | max8660->shadow_regs[MAX8660_ADTV1] = | ||
387 | max8660->shadow_regs[MAX8660_ADTV2] = | ||
388 | max8660->shadow_regs[MAX8660_SDTV1] = | ||
389 | max8660->shadow_regs[MAX8660_SDTV2] = 0x1b; | ||
390 | max8660->shadow_regs[MAX8660_MDTV1] = | ||
391 | max8660->shadow_regs[MAX8660_MDTV2] = 0x04; | ||
392 | |||
393 | for (i = 0; i < pdata->num_subdevs; i++) { | ||
394 | |||
395 | if (!pdata->subdevs[i].platform_data) | ||
396 | goto err_free; | ||
397 | |||
398 | boot_on = pdata->subdevs[i].platform_data->constraints.boot_on; | ||
399 | |||
400 | switch (pdata->subdevs[i].id) { | ||
401 | case MAX8660_V3: | ||
402 | if (boot_on) | ||
403 | max8660->shadow_regs[MAX8660_OVER1] |= 1; | ||
404 | break; | ||
405 | |||
406 | case MAX8660_V4: | ||
407 | if (boot_on) | ||
408 | max8660->shadow_regs[MAX8660_OVER1] |= 4; | ||
409 | break; | ||
410 | |||
411 | case MAX8660_V5: | ||
412 | break; | ||
413 | |||
414 | case MAX8660_V6: | ||
415 | if (boot_on) | ||
416 | max8660->shadow_regs[MAX8660_OVER2] |= 2; | ||
417 | break; | ||
418 | |||
419 | case MAX8660_V7: | ||
420 | if (!strcmp(i2c_id->name, "max8661")) { | ||
421 | dev_err(&client->dev, "Regulator not on this chip!\n"); | ||
422 | goto err_free; | ||
423 | } | ||
424 | |||
425 | if (boot_on) | ||
426 | max8660->shadow_regs[MAX8660_OVER2] |= 4; | ||
427 | break; | ||
428 | |||
429 | default: | ||
430 | dev_err(&client->dev, "invalid regulator %s\n", | ||
431 | pdata->subdevs[i].name); | ||
432 | goto err_free; | ||
433 | } | ||
434 | } | ||
435 | |||
436 | /* Finally register devices */ | ||
437 | for (i = 0; i < pdata->num_subdevs; i++) { | ||
438 | |||
439 | id = pdata->subdevs[i].id; | ||
440 | |||
441 | rdev[i] = regulator_register(&max8660_reg[id], &client->dev, | ||
442 | pdata->subdevs[i].platform_data, | ||
443 | max8660); | ||
444 | if (IS_ERR(rdev[i])) { | ||
445 | ret = PTR_ERR(rdev[i]); | ||
446 | dev_err(&client->dev, "failed to register %s\n", | ||
447 | max8660_reg[id].name); | ||
448 | goto err_unregister; | ||
449 | } | ||
450 | } | ||
451 | |||
452 | i2c_set_clientdata(client, rdev); | ||
453 | dev_info(&client->dev, "Maxim 8660/8661 regulator driver loaded\n"); | ||
454 | return 0; | ||
455 | |||
456 | err_unregister: | ||
457 | while (--i >= 0) | ||
458 | regulator_unregister(rdev[i]); | ||
459 | err_free: | ||
460 | kfree(max8660); | ||
461 | out: | ||
462 | return ret; | ||
463 | } | ||
464 | |||
465 | static int max8660_remove(struct i2c_client *client) | ||
466 | { | ||
467 | struct regulator_dev **rdev = i2c_get_clientdata(client); | ||
468 | int i; | ||
469 | |||
470 | for (i = 0; i < MAX8660_V_END; i++) | ||
471 | if (rdev[i]) | ||
472 | regulator_unregister(rdev[i]); | ||
473 | kfree(rdev); | ||
474 | i2c_set_clientdata(client, NULL); | ||
475 | |||
476 | return 0; | ||
477 | } | ||
478 | |||
479 | static const struct i2c_device_id max8660_id[] = { | ||
480 | { "max8660", 0 }, | ||
481 | { "max8661", 0 }, | ||
482 | { } | ||
483 | }; | ||
484 | MODULE_DEVICE_TABLE(i2c, max8660_id); | ||
485 | |||
486 | static struct i2c_driver max8660_driver = { | ||
487 | .probe = max8660_probe, | ||
488 | .remove = max8660_remove, | ||
489 | .driver = { | ||
490 | .name = "max8660", | ||
491 | }, | ||
492 | .id_table = max8660_id, | ||
493 | }; | ||
494 | |||
495 | static int __init max8660_init(void) | ||
496 | { | ||
497 | return i2c_add_driver(&max8660_driver); | ||
498 | } | ||
499 | subsys_initcall(max8660_init); | ||
500 | |||
501 | static void __exit max8660_exit(void) | ||
502 | { | ||
503 | i2c_del_driver(&max8660_driver); | ||
504 | } | ||
505 | module_exit(max8660_exit); | ||
506 | |||
507 | /* Module information */ | ||
508 | MODULE_DESCRIPTION("MAXIM 8660/8661 voltage regulator driver"); | ||
509 | MODULE_AUTHOR("Wolfram Sang"); | ||
510 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/regulator/mc13783-regulator.c b/drivers/regulator/mc13783-regulator.c new file mode 100644 index 000000000000..39c495300045 --- /dev/null +++ b/drivers/regulator/mc13783-regulator.c | |||
@@ -0,0 +1,245 @@ | |||
1 | /* | ||
2 | * Regulator Driver for Freescale MC13783 PMIC | ||
3 | * | ||
4 | * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/mfd/mc13783.h> | ||
12 | #include <linux/regulator/machine.h> | ||
13 | #include <linux/regulator/driver.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/init.h> | ||
17 | #include <linux/err.h> | ||
18 | |||
19 | #define MC13783_REG_SWITCHERS4 28 | ||
20 | #define MC13783_REG_SWITCHERS4_PLLEN (1 << 18) | ||
21 | |||
22 | #define MC13783_REG_SWITCHERS5 29 | ||
23 | #define MC13783_REG_SWITCHERS5_SW3EN (1 << 20) | ||
24 | |||
25 | #define MC13783_REG_REGULATORMODE0 32 | ||
26 | #define MC13783_REG_REGULATORMODE0_VAUDIOEN (1 << 0) | ||
27 | #define MC13783_REG_REGULATORMODE0_VIOHIEN (1 << 3) | ||
28 | #define MC13783_REG_REGULATORMODE0_VIOLOEN (1 << 6) | ||
29 | #define MC13783_REG_REGULATORMODE0_VDIGEN (1 << 9) | ||
30 | #define MC13783_REG_REGULATORMODE0_VGENEN (1 << 12) | ||
31 | #define MC13783_REG_REGULATORMODE0_VRFDIGEN (1 << 15) | ||
32 | #define MC13783_REG_REGULATORMODE0_VRFREFEN (1 << 18) | ||
33 | #define MC13783_REG_REGULATORMODE0_VRFCPEN (1 << 21) | ||
34 | |||
35 | #define MC13783_REG_REGULATORMODE1 33 | ||
36 | #define MC13783_REG_REGULATORMODE1_VSIMEN (1 << 0) | ||
37 | #define MC13783_REG_REGULATORMODE1_VESIMEN (1 << 3) | ||
38 | #define MC13783_REG_REGULATORMODE1_VCAMEN (1 << 6) | ||
39 | #define MC13783_REG_REGULATORMODE1_VRFBGEN (1 << 9) | ||
40 | #define MC13783_REG_REGULATORMODE1_VVIBEN (1 << 11) | ||
41 | #define MC13783_REG_REGULATORMODE1_VRF1EN (1 << 12) | ||
42 | #define MC13783_REG_REGULATORMODE1_VRF2EN (1 << 15) | ||
43 | #define MC13783_REG_REGULATORMODE1_VMMC1EN (1 << 18) | ||
44 | #define MC13783_REG_REGULATORMODE1_VMMC2EN (1 << 21) | ||
45 | |||
46 | #define MC13783_REG_POWERMISC 34 | ||
47 | #define MC13783_REG_POWERMISC_GPO1EN (1 << 6) | ||
48 | #define MC13783_REG_POWERMISC_GPO2EN (1 << 8) | ||
49 | #define MC13783_REG_POWERMISC_GPO3EN (1 << 10) | ||
50 | #define MC13783_REG_POWERMISC_GPO4EN (1 << 12) | ||
51 | |||
52 | struct mc13783_regulator { | ||
53 | struct regulator_desc desc; | ||
54 | int reg; | ||
55 | int enable_bit; | ||
56 | }; | ||
57 | |||
58 | static struct regulator_ops mc13783_regulator_ops; | ||
59 | |||
60 | #define MC13783_DEFINE(prefix, _name, _reg) \ | ||
61 | [MC13783_ ## prefix ## _ ## _name] = { \ | ||
62 | .desc = { \ | ||
63 | .name = #prefix "_" #_name, \ | ||
64 | .ops = &mc13783_regulator_ops, \ | ||
65 | .type = REGULATOR_VOLTAGE, \ | ||
66 | .id = MC13783_ ## prefix ## _ ## _name, \ | ||
67 | .owner = THIS_MODULE, \ | ||
68 | }, \ | ||
69 | .reg = MC13783_REG_ ## _reg, \ | ||
70 | .enable_bit = MC13783_REG_ ## _reg ## _ ## _name ## EN, \ | ||
71 | } | ||
72 | |||
73 | #define MC13783_DEFINE_SW(_name, _reg) MC13783_DEFINE(SW, _name, _reg) | ||
74 | #define MC13783_DEFINE_REGU(_name, _reg) MC13783_DEFINE(REGU, _name, _reg) | ||
75 | |||
76 | static struct mc13783_regulator mc13783_regulators[] = { | ||
77 | MC13783_DEFINE_SW(SW3, SWITCHERS5), | ||
78 | MC13783_DEFINE_SW(PLL, SWITCHERS4), | ||
79 | |||
80 | MC13783_DEFINE_REGU(VAUDIO, REGULATORMODE0), | ||
81 | MC13783_DEFINE_REGU(VIOHI, REGULATORMODE0), | ||
82 | MC13783_DEFINE_REGU(VIOLO, REGULATORMODE0), | ||
83 | MC13783_DEFINE_REGU(VDIG, REGULATORMODE0), | ||
84 | MC13783_DEFINE_REGU(VGEN, REGULATORMODE0), | ||
85 | MC13783_DEFINE_REGU(VRFDIG, REGULATORMODE0), | ||
86 | MC13783_DEFINE_REGU(VRFREF, REGULATORMODE0), | ||
87 | MC13783_DEFINE_REGU(VRFCP, REGULATORMODE0), | ||
88 | MC13783_DEFINE_REGU(VSIM, REGULATORMODE1), | ||
89 | MC13783_DEFINE_REGU(VESIM, REGULATORMODE1), | ||
90 | MC13783_DEFINE_REGU(VCAM, REGULATORMODE1), | ||
91 | MC13783_DEFINE_REGU(VRFBG, REGULATORMODE1), | ||
92 | MC13783_DEFINE_REGU(VVIB, REGULATORMODE1), | ||
93 | MC13783_DEFINE_REGU(VRF1, REGULATORMODE1), | ||
94 | MC13783_DEFINE_REGU(VRF2, REGULATORMODE1), | ||
95 | MC13783_DEFINE_REGU(VMMC1, REGULATORMODE1), | ||
96 | MC13783_DEFINE_REGU(VMMC2, REGULATORMODE1), | ||
97 | MC13783_DEFINE_REGU(GPO1, POWERMISC), | ||
98 | MC13783_DEFINE_REGU(GPO2, POWERMISC), | ||
99 | MC13783_DEFINE_REGU(GPO3, POWERMISC), | ||
100 | MC13783_DEFINE_REGU(GPO4, POWERMISC), | ||
101 | }; | ||
102 | |||
103 | struct mc13783_regulator_priv { | ||
104 | struct mc13783 *mc13783; | ||
105 | struct regulator_dev *regulators[]; | ||
106 | }; | ||
107 | |||
108 | static int mc13783_regulator_enable(struct regulator_dev *rdev) | ||
109 | { | ||
110 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
111 | int id = rdev_get_id(rdev); | ||
112 | int ret; | ||
113 | |||
114 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
115 | |||
116 | mc13783_lock(priv->mc13783); | ||
117 | ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg, | ||
118 | mc13783_regulators[id].enable_bit, | ||
119 | mc13783_regulators[id].enable_bit); | ||
120 | mc13783_unlock(priv->mc13783); | ||
121 | |||
122 | return ret; | ||
123 | } | ||
124 | |||
125 | static int mc13783_regulator_disable(struct regulator_dev *rdev) | ||
126 | { | ||
127 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
128 | int id = rdev_get_id(rdev); | ||
129 | int ret; | ||
130 | |||
131 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
132 | |||
133 | mc13783_lock(priv->mc13783); | ||
134 | ret = mc13783_reg_rmw(priv->mc13783, mc13783_regulators[id].reg, | ||
135 | mc13783_regulators[id].enable_bit, 0); | ||
136 | mc13783_unlock(priv->mc13783); | ||
137 | |||
138 | return ret; | ||
139 | } | ||
140 | |||
141 | static int mc13783_regulator_is_enabled(struct regulator_dev *rdev) | ||
142 | { | ||
143 | struct mc13783_regulator_priv *priv = rdev_get_drvdata(rdev); | ||
144 | int ret, id = rdev_get_id(rdev); | ||
145 | unsigned int val; | ||
146 | |||
147 | mc13783_lock(priv->mc13783); | ||
148 | ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val); | ||
149 | mc13783_unlock(priv->mc13783); | ||
150 | |||
151 | if (ret) | ||
152 | return ret; | ||
153 | |||
154 | return (val & mc13783_regulators[id].enable_bit) != 0; | ||
155 | } | ||
156 | |||
157 | static struct regulator_ops mc13783_regulator_ops = { | ||
158 | .enable = mc13783_regulator_enable, | ||
159 | .disable = mc13783_regulator_disable, | ||
160 | .is_enabled = mc13783_regulator_is_enabled, | ||
161 | }; | ||
162 | |||
163 | static int __devinit mc13783_regulator_probe(struct platform_device *pdev) | ||
164 | { | ||
165 | struct mc13783_regulator_priv *priv; | ||
166 | struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent); | ||
167 | struct mc13783_regulator_platform_data *pdata = | ||
168 | dev_get_platdata(&pdev->dev); | ||
169 | struct mc13783_regulator_init_data *init_data; | ||
170 | int i, ret; | ||
171 | |||
172 | dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id); | ||
173 | |||
174 | priv = kzalloc(sizeof(*priv) + | ||
175 | pdata->num_regulators * sizeof(priv->regulators[0]), | ||
176 | GFP_KERNEL); | ||
177 | if (!priv) | ||
178 | return -ENOMEM; | ||
179 | |||
180 | priv->mc13783 = mc13783; | ||
181 | |||
182 | for (i = 0; i < pdata->num_regulators; i++) { | ||
183 | init_data = &pdata->regulators[i]; | ||
184 | priv->regulators[i] = regulator_register( | ||
185 | &mc13783_regulators[init_data->id].desc, | ||
186 | &pdev->dev, init_data->init_data, priv); | ||
187 | |||
188 | if (IS_ERR(priv->regulators[i])) { | ||
189 | dev_err(&pdev->dev, "failed to register regulator %s\n", | ||
190 | mc13783_regulators[i].desc.name); | ||
191 | ret = PTR_ERR(priv->regulators[i]); | ||
192 | goto err; | ||
193 | } | ||
194 | } | ||
195 | |||
196 | platform_set_drvdata(pdev, priv); | ||
197 | |||
198 | return 0; | ||
199 | err: | ||
200 | while (--i >= 0) | ||
201 | regulator_unregister(priv->regulators[i]); | ||
202 | |||
203 | kfree(priv); | ||
204 | |||
205 | return ret; | ||
206 | } | ||
207 | |||
208 | static int __devexit mc13783_regulator_remove(struct platform_device *pdev) | ||
209 | { | ||
210 | struct mc13783_regulator_priv *priv = platform_get_drvdata(pdev); | ||
211 | struct mc13783_regulator_platform_data *pdata = | ||
212 | dev_get_platdata(&pdev->dev); | ||
213 | int i; | ||
214 | |||
215 | for (i = 0; i < pdata->num_regulators; i++) | ||
216 | regulator_unregister(priv->regulators[i]); | ||
217 | |||
218 | return 0; | ||
219 | } | ||
220 | |||
221 | static struct platform_driver mc13783_regulator_driver = { | ||
222 | .driver = { | ||
223 | .name = "mc13783-regulator", | ||
224 | .owner = THIS_MODULE, | ||
225 | }, | ||
226 | .remove = __devexit_p(mc13783_regulator_remove), | ||
227 | .probe = mc13783_regulator_probe, | ||
228 | }; | ||
229 | |||
230 | static int __init mc13783_regulator_init(void) | ||
231 | { | ||
232 | return platform_driver_register(&mc13783_regulator_driver); | ||
233 | } | ||
234 | subsys_initcall(mc13783_regulator_init); | ||
235 | |||
236 | static void __exit mc13783_regulator_exit(void) | ||
237 | { | ||
238 | platform_driver_unregister(&mc13783_regulator_driver); | ||
239 | } | ||
240 | module_exit(mc13783_regulator_exit); | ||
241 | |||
242 | MODULE_LICENSE("GPL v2"); | ||
243 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de"); | ||
244 | MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC"); | ||
245 | MODULE_ALIAS("platform:mc13783-regulator"); | ||
diff --git a/drivers/regulator/mc13783.c b/drivers/regulator/mc13783.c deleted file mode 100644 index 710211f67449..000000000000 --- a/drivers/regulator/mc13783.c +++ /dev/null | |||
@@ -1,410 +0,0 @@ | |||
1 | /* | ||
2 | * Regulator Driver for Freescale MC13783 PMIC | ||
3 | * | ||
4 | * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #include <linux/mfd/mc13783-private.h> | ||
12 | #include <linux/regulator/machine.h> | ||
13 | #include <linux/regulator/driver.h> | ||
14 | #include <linux/platform_device.h> | ||
15 | #include <linux/mfd/mc13783.h> | ||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/init.h> | ||
18 | #include <linux/err.h> | ||
19 | |||
20 | struct mc13783_regulator { | ||
21 | struct regulator_desc desc; | ||
22 | int reg; | ||
23 | int enable_bit; | ||
24 | }; | ||
25 | |||
26 | static struct regulator_ops mc13783_regulator_ops; | ||
27 | |||
28 | static struct mc13783_regulator mc13783_regulators[] = { | ||
29 | [MC13783_SW_SW3] = { | ||
30 | .desc = { | ||
31 | .name = "SW_SW3", | ||
32 | .ops = &mc13783_regulator_ops, | ||
33 | .type = REGULATOR_VOLTAGE, | ||
34 | .id = MC13783_SW_SW3, | ||
35 | .owner = THIS_MODULE, | ||
36 | }, | ||
37 | .reg = MC13783_REG_SWITCHERS_5, | ||
38 | .enable_bit = MC13783_SWCTRL_SW3_EN, | ||
39 | }, | ||
40 | [MC13783_SW_PLL] = { | ||
41 | .desc = { | ||
42 | .name = "SW_PLL", | ||
43 | .ops = &mc13783_regulator_ops, | ||
44 | .type = REGULATOR_VOLTAGE, | ||
45 | .id = MC13783_SW_PLL, | ||
46 | .owner = THIS_MODULE, | ||
47 | }, | ||
48 | .reg = MC13783_REG_SWITCHERS_4, | ||
49 | .enable_bit = MC13783_SWCTRL_PLL_EN, | ||
50 | }, | ||
51 | [MC13783_REGU_VAUDIO] = { | ||
52 | .desc = { | ||
53 | .name = "REGU_VAUDIO", | ||
54 | .ops = &mc13783_regulator_ops, | ||
55 | .type = REGULATOR_VOLTAGE, | ||
56 | .id = MC13783_REGU_VAUDIO, | ||
57 | .owner = THIS_MODULE, | ||
58 | }, | ||
59 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
60 | .enable_bit = MC13783_REGCTRL_VAUDIO_EN, | ||
61 | }, | ||
62 | [MC13783_REGU_VIOHI] = { | ||
63 | .desc = { | ||
64 | .name = "REGU_VIOHI", | ||
65 | .ops = &mc13783_regulator_ops, | ||
66 | .type = REGULATOR_VOLTAGE, | ||
67 | .id = MC13783_REGU_VIOHI, | ||
68 | .owner = THIS_MODULE, | ||
69 | }, | ||
70 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
71 | .enable_bit = MC13783_REGCTRL_VIOHI_EN, | ||
72 | }, | ||
73 | [MC13783_REGU_VIOLO] = { | ||
74 | .desc = { | ||
75 | .name = "REGU_VIOLO", | ||
76 | .ops = &mc13783_regulator_ops, | ||
77 | .type = REGULATOR_VOLTAGE, | ||
78 | .id = MC13783_REGU_VIOLO, | ||
79 | .owner = THIS_MODULE, | ||
80 | }, | ||
81 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
82 | .enable_bit = MC13783_REGCTRL_VIOLO_EN, | ||
83 | }, | ||
84 | [MC13783_REGU_VDIG] = { | ||
85 | .desc = { | ||
86 | .name = "REGU_VDIG", | ||
87 | .ops = &mc13783_regulator_ops, | ||
88 | .type = REGULATOR_VOLTAGE, | ||
89 | .id = MC13783_REGU_VDIG, | ||
90 | .owner = THIS_MODULE, | ||
91 | }, | ||
92 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
93 | .enable_bit = MC13783_REGCTRL_VDIG_EN, | ||
94 | }, | ||
95 | [MC13783_REGU_VGEN] = { | ||
96 | .desc = { | ||
97 | .name = "REGU_VGEN", | ||
98 | .ops = &mc13783_regulator_ops, | ||
99 | .type = REGULATOR_VOLTAGE, | ||
100 | .id = MC13783_REGU_VGEN, | ||
101 | .owner = THIS_MODULE, | ||
102 | }, | ||
103 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
104 | .enable_bit = MC13783_REGCTRL_VGEN_EN, | ||
105 | }, | ||
106 | [MC13783_REGU_VRFDIG] = { | ||
107 | .desc = { | ||
108 | .name = "REGU_VRFDIG", | ||
109 | .ops = &mc13783_regulator_ops, | ||
110 | .type = REGULATOR_VOLTAGE, | ||
111 | .id = MC13783_REGU_VRFDIG, | ||
112 | .owner = THIS_MODULE, | ||
113 | }, | ||
114 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
115 | .enable_bit = MC13783_REGCTRL_VRFDIG_EN, | ||
116 | }, | ||
117 | [MC13783_REGU_VRFREF] = { | ||
118 | .desc = { | ||
119 | .name = "REGU_VRFREF", | ||
120 | .ops = &mc13783_regulator_ops, | ||
121 | .type = REGULATOR_VOLTAGE, | ||
122 | .id = MC13783_REGU_VRFREF, | ||
123 | .owner = THIS_MODULE, | ||
124 | }, | ||
125 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
126 | .enable_bit = MC13783_REGCTRL_VRFREF_EN, | ||
127 | }, | ||
128 | [MC13783_REGU_VRFCP] = { | ||
129 | .desc = { | ||
130 | .name = "REGU_VRFCP", | ||
131 | .ops = &mc13783_regulator_ops, | ||
132 | .type = REGULATOR_VOLTAGE, | ||
133 | .id = MC13783_REGU_VRFCP, | ||
134 | .owner = THIS_MODULE, | ||
135 | }, | ||
136 | .reg = MC13783_REG_REGULATOR_MODE_0, | ||
137 | .enable_bit = MC13783_REGCTRL_VRFCP_EN, | ||
138 | }, | ||
139 | [MC13783_REGU_VSIM] = { | ||
140 | .desc = { | ||
141 | .name = "REGU_VSIM", | ||
142 | .ops = &mc13783_regulator_ops, | ||
143 | .type = REGULATOR_VOLTAGE, | ||
144 | .id = MC13783_REGU_VSIM, | ||
145 | .owner = THIS_MODULE, | ||
146 | }, | ||
147 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
148 | .enable_bit = MC13783_REGCTRL_VSIM_EN, | ||
149 | }, | ||
150 | [MC13783_REGU_VESIM] = { | ||
151 | .desc = { | ||
152 | .name = "REGU_VESIM", | ||
153 | .ops = &mc13783_regulator_ops, | ||
154 | .type = REGULATOR_VOLTAGE, | ||
155 | .id = MC13783_REGU_VESIM, | ||
156 | .owner = THIS_MODULE, | ||
157 | }, | ||
158 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
159 | .enable_bit = MC13783_REGCTRL_VESIM_EN, | ||
160 | }, | ||
161 | [MC13783_REGU_VCAM] = { | ||
162 | .desc = { | ||
163 | .name = "REGU_VCAM", | ||
164 | .ops = &mc13783_regulator_ops, | ||
165 | .type = REGULATOR_VOLTAGE, | ||
166 | .id = MC13783_REGU_VCAM, | ||
167 | .owner = THIS_MODULE, | ||
168 | }, | ||
169 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
170 | .enable_bit = MC13783_REGCTRL_VCAM_EN, | ||
171 | }, | ||
172 | [MC13783_REGU_VRFBG] = { | ||
173 | .desc = { | ||
174 | .name = "REGU_VRFBG", | ||
175 | .ops = &mc13783_regulator_ops, | ||
176 | .type = REGULATOR_VOLTAGE, | ||
177 | .id = MC13783_REGU_VRFBG, | ||
178 | .owner = THIS_MODULE, | ||
179 | }, | ||
180 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
181 | .enable_bit = MC13783_REGCTRL_VRFBG_EN, | ||
182 | }, | ||
183 | [MC13783_REGU_VVIB] = { | ||
184 | .desc = { | ||
185 | .name = "REGU_VVIB", | ||
186 | .ops = &mc13783_regulator_ops, | ||
187 | .type = REGULATOR_VOLTAGE, | ||
188 | .id = MC13783_REGU_VVIB, | ||
189 | .owner = THIS_MODULE, | ||
190 | }, | ||
191 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
192 | .enable_bit = MC13783_REGCTRL_VVIB_EN, | ||
193 | }, | ||
194 | [MC13783_REGU_VRF1] = { | ||
195 | .desc = { | ||
196 | .name = "REGU_VRF1", | ||
197 | .ops = &mc13783_regulator_ops, | ||
198 | .type = REGULATOR_VOLTAGE, | ||
199 | .id = MC13783_REGU_VRF1, | ||
200 | .owner = THIS_MODULE, | ||
201 | }, | ||
202 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
203 | .enable_bit = MC13783_REGCTRL_VRF1_EN, | ||
204 | }, | ||
205 | [MC13783_REGU_VRF2] = { | ||
206 | .desc = { | ||
207 | .name = "REGU_VRF2", | ||
208 | .ops = &mc13783_regulator_ops, | ||
209 | .type = REGULATOR_VOLTAGE, | ||
210 | .id = MC13783_REGU_VRF2, | ||
211 | .owner = THIS_MODULE, | ||
212 | }, | ||
213 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
214 | .enable_bit = MC13783_REGCTRL_VRF2_EN, | ||
215 | }, | ||
216 | [MC13783_REGU_VMMC1] = { | ||
217 | .desc = { | ||
218 | .name = "REGU_VMMC1", | ||
219 | .ops = &mc13783_regulator_ops, | ||
220 | .type = REGULATOR_VOLTAGE, | ||
221 | .id = MC13783_REGU_VMMC1, | ||
222 | .owner = THIS_MODULE, | ||
223 | }, | ||
224 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
225 | .enable_bit = MC13783_REGCTRL_VMMC1_EN, | ||
226 | }, | ||
227 | [MC13783_REGU_VMMC2] = { | ||
228 | .desc = { | ||
229 | .name = "REGU_VMMC2", | ||
230 | .ops = &mc13783_regulator_ops, | ||
231 | .type = REGULATOR_VOLTAGE, | ||
232 | .id = MC13783_REGU_VMMC2, | ||
233 | .owner = THIS_MODULE, | ||
234 | }, | ||
235 | .reg = MC13783_REG_REGULATOR_MODE_1, | ||
236 | .enable_bit = MC13783_REGCTRL_VMMC2_EN, | ||
237 | }, | ||
238 | [MC13783_REGU_GPO1] = { | ||
239 | .desc = { | ||
240 | .name = "REGU_GPO1", | ||
241 | .ops = &mc13783_regulator_ops, | ||
242 | .type = REGULATOR_VOLTAGE, | ||
243 | .id = MC13783_REGU_GPO1, | ||
244 | .owner = THIS_MODULE, | ||
245 | }, | ||
246 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
247 | .enable_bit = MC13783_REGCTRL_GPO1_EN, | ||
248 | }, | ||
249 | [MC13783_REGU_GPO2] = { | ||
250 | .desc = { | ||
251 | .name = "REGU_GPO2", | ||
252 | .ops = &mc13783_regulator_ops, | ||
253 | .type = REGULATOR_VOLTAGE, | ||
254 | .id = MC13783_REGU_GPO2, | ||
255 | .owner = THIS_MODULE, | ||
256 | }, | ||
257 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
258 | .enable_bit = MC13783_REGCTRL_GPO2_EN, | ||
259 | }, | ||
260 | [MC13783_REGU_GPO3] = { | ||
261 | .desc = { | ||
262 | .name = "REGU_GPO3", | ||
263 | .ops = &mc13783_regulator_ops, | ||
264 | .type = REGULATOR_VOLTAGE, | ||
265 | .id = MC13783_REGU_GPO3, | ||
266 | .owner = THIS_MODULE, | ||
267 | }, | ||
268 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
269 | .enable_bit = MC13783_REGCTRL_GPO3_EN, | ||
270 | }, | ||
271 | [MC13783_REGU_GPO4] = { | ||
272 | .desc = { | ||
273 | .name = "REGU_GPO4", | ||
274 | .ops = &mc13783_regulator_ops, | ||
275 | .type = REGULATOR_VOLTAGE, | ||
276 | .id = MC13783_REGU_GPO4, | ||
277 | .owner = THIS_MODULE, | ||
278 | }, | ||
279 | .reg = MC13783_REG_POWER_MISCELLANEOUS, | ||
280 | .enable_bit = MC13783_REGCTRL_GPO4_EN, | ||
281 | }, | ||
282 | }; | ||
283 | |||
284 | struct mc13783_priv { | ||
285 | struct regulator_desc desc[ARRAY_SIZE(mc13783_regulators)]; | ||
286 | struct mc13783 *mc13783; | ||
287 | struct regulator_dev *regulators[0]; | ||
288 | }; | ||
289 | |||
290 | static int mc13783_enable(struct regulator_dev *rdev) | ||
291 | { | ||
292 | struct mc13783_priv *priv = rdev_get_drvdata(rdev); | ||
293 | int id = rdev_get_id(rdev); | ||
294 | |||
295 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
296 | |||
297 | return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg, | ||
298 | mc13783_regulators[id].enable_bit, | ||
299 | mc13783_regulators[id].enable_bit); | ||
300 | } | ||
301 | |||
302 | static int mc13783_disable(struct regulator_dev *rdev) | ||
303 | { | ||
304 | struct mc13783_priv *priv = rdev_get_drvdata(rdev); | ||
305 | int id = rdev_get_id(rdev); | ||
306 | |||
307 | dev_dbg(rdev_get_dev(rdev), "%s id: %d\n", __func__, id); | ||
308 | |||
309 | return mc13783_set_bits(priv->mc13783, mc13783_regulators[id].reg, | ||
310 | mc13783_regulators[id].enable_bit, 0); | ||
311 | } | ||
312 | |||
313 | static int mc13783_is_enabled(struct regulator_dev *rdev) | ||
314 | { | ||
315 | struct mc13783_priv *priv = rdev_get_drvdata(rdev); | ||
316 | int ret, id = rdev_get_id(rdev); | ||
317 | unsigned int val; | ||
318 | |||
319 | ret = mc13783_reg_read(priv->mc13783, mc13783_regulators[id].reg, &val); | ||
320 | if (ret) | ||
321 | return ret; | ||
322 | |||
323 | return (val & mc13783_regulators[id].enable_bit) != 0; | ||
324 | } | ||
325 | |||
326 | static struct regulator_ops mc13783_regulator_ops = { | ||
327 | .enable = mc13783_enable, | ||
328 | .disable = mc13783_disable, | ||
329 | .is_enabled = mc13783_is_enabled, | ||
330 | }; | ||
331 | |||
332 | static int __devinit mc13783_regulator_probe(struct platform_device *pdev) | ||
333 | { | ||
334 | struct mc13783_priv *priv; | ||
335 | struct mc13783 *mc13783 = dev_get_drvdata(pdev->dev.parent); | ||
336 | struct mc13783_regulator_init_data *init_data; | ||
337 | int i, ret; | ||
338 | |||
339 | dev_dbg(&pdev->dev, "mc13783_regulator_probe id %d\n", pdev->id); | ||
340 | |||
341 | priv = kzalloc(sizeof(*priv) + mc13783->num_regulators * sizeof(void *), | ||
342 | GFP_KERNEL); | ||
343 | if (!priv) | ||
344 | return -ENOMEM; | ||
345 | |||
346 | priv->mc13783 = mc13783; | ||
347 | |||
348 | for (i = 0; i < mc13783->num_regulators; i++) { | ||
349 | init_data = &mc13783->regulators[i]; | ||
350 | priv->regulators[i] = regulator_register( | ||
351 | &mc13783_regulators[init_data->id].desc, | ||
352 | &pdev->dev, init_data->init_data, priv); | ||
353 | |||
354 | if (IS_ERR(priv->regulators[i])) { | ||
355 | dev_err(&pdev->dev, "failed to register regulator %s\n", | ||
356 | mc13783_regulators[i].desc.name); | ||
357 | ret = PTR_ERR(priv->regulators[i]); | ||
358 | goto err; | ||
359 | } | ||
360 | } | ||
361 | |||
362 | platform_set_drvdata(pdev, priv); | ||
363 | |||
364 | return 0; | ||
365 | err: | ||
366 | while (--i >= 0) | ||
367 | regulator_unregister(priv->regulators[i]); | ||
368 | |||
369 | kfree(priv); | ||
370 | |||
371 | return ret; | ||
372 | } | ||
373 | |||
374 | static int __devexit mc13783_regulator_remove(struct platform_device *pdev) | ||
375 | { | ||
376 | struct mc13783_priv *priv = platform_get_drvdata(pdev); | ||
377 | struct mc13783 *mc13783 = priv->mc13783; | ||
378 | int i; | ||
379 | |||
380 | for (i = 0; i < mc13783->num_regulators; i++) | ||
381 | regulator_unregister(priv->regulators[i]); | ||
382 | |||
383 | return 0; | ||
384 | } | ||
385 | |||
386 | static struct platform_driver mc13783_regulator_driver = { | ||
387 | .driver = { | ||
388 | .name = "mc13783-regulator", | ||
389 | .owner = THIS_MODULE, | ||
390 | }, | ||
391 | .remove = __devexit_p(mc13783_regulator_remove), | ||
392 | }; | ||
393 | |||
394 | static int __init mc13783_regulator_init(void) | ||
395 | { | ||
396 | return platform_driver_probe(&mc13783_regulator_driver, | ||
397 | mc13783_regulator_probe); | ||
398 | } | ||
399 | subsys_initcall(mc13783_regulator_init); | ||
400 | |||
401 | static void __exit mc13783_regulator_exit(void) | ||
402 | { | ||
403 | platform_driver_unregister(&mc13783_regulator_driver); | ||
404 | } | ||
405 | module_exit(mc13783_regulator_exit); | ||
406 | |||
407 | MODULE_LICENSE("GPL"); | ||
408 | MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de"); | ||
409 | MODULE_DESCRIPTION("Regulator Driver for Freescale MC13783 PMIC"); | ||
410 | MODULE_ALIAS("platform:mc13783-regulator"); | ||
diff --git a/drivers/regulator/twl-regulator.c b/drivers/regulator/twl-regulator.c index 7ea1c3a31081..7e674859bd59 100644 --- a/drivers/regulator/twl-regulator.c +++ b/drivers/regulator/twl-regulator.c | |||
@@ -12,6 +12,7 @@ | |||
12 | #include <linux/module.h> | 12 | #include <linux/module.h> |
13 | #include <linux/init.h> | 13 | #include <linux/init.h> |
14 | #include <linux/err.h> | 14 | #include <linux/err.h> |
15 | #include <linux/delay.h> | ||
15 | #include <linux/platform_device.h> | 16 | #include <linux/platform_device.h> |
16 | #include <linux/regulator/driver.h> | 17 | #include <linux/regulator/driver.h> |
17 | #include <linux/regulator/machine.h> | 18 | #include <linux/regulator/machine.h> |
@@ -40,6 +41,12 @@ struct twlreg_info { | |||
40 | u8 table_len; | 41 | u8 table_len; |
41 | const u16 *table; | 42 | const u16 *table; |
42 | 43 | ||
44 | /* regulator specific turn-on delay */ | ||
45 | u16 delay; | ||
46 | |||
47 | /* State REMAP default configuration */ | ||
48 | u8 remap; | ||
49 | |||
43 | /* chip constraints on regulator behavior */ | 50 | /* chip constraints on regulator behavior */ |
44 | u16 min_mV; | 51 | u16 min_mV; |
45 | 52 | ||
@@ -128,6 +135,7 @@ static int twlreg_enable(struct regulator_dev *rdev) | |||
128 | { | 135 | { |
129 | struct twlreg_info *info = rdev_get_drvdata(rdev); | 136 | struct twlreg_info *info = rdev_get_drvdata(rdev); |
130 | int grp; | 137 | int grp; |
138 | int ret; | ||
131 | 139 | ||
132 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); | 140 | grp = twlreg_read(info, TWL_MODULE_PM_RECEIVER, VREG_GRP); |
133 | if (grp < 0) | 141 | if (grp < 0) |
@@ -138,7 +146,11 @@ static int twlreg_enable(struct regulator_dev *rdev) | |||
138 | else | 146 | else |
139 | grp |= P1_GRP_6030; | 147 | grp |= P1_GRP_6030; |
140 | 148 | ||
141 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); | 149 | ret = twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); |
150 | |||
151 | udelay(info->delay); | ||
152 | |||
153 | return ret; | ||
142 | } | 154 | } |
143 | 155 | ||
144 | static int twlreg_disable(struct regulator_dev *rdev) | 156 | static int twlreg_disable(struct regulator_dev *rdev) |
@@ -151,9 +163,9 @@ static int twlreg_disable(struct regulator_dev *rdev) | |||
151 | return grp; | 163 | return grp; |
152 | 164 | ||
153 | if (twl_class_is_4030()) | 165 | if (twl_class_is_4030()) |
154 | grp &= ~P1_GRP_4030; | 166 | grp &= ~(P1_GRP_4030 | P2_GRP_4030 | P3_GRP_4030); |
155 | else | 167 | else |
156 | grp &= ~P1_GRP_6030; | 168 | grp &= ~(P1_GRP_6030 | P2_GRP_6030 | P3_GRP_6030); |
157 | 169 | ||
158 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); | 170 | return twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_GRP, grp); |
159 | } | 171 | } |
@@ -294,6 +306,18 @@ static const u16 VSIM_VSEL_table[] = { | |||
294 | static const u16 VDAC_VSEL_table[] = { | 306 | static const u16 VDAC_VSEL_table[] = { |
295 | 1200, 1300, 1800, 1800, | 307 | 1200, 1300, 1800, 1800, |
296 | }; | 308 | }; |
309 | static const u16 VDD1_VSEL_table[] = { | ||
310 | 800, 1450, | ||
311 | }; | ||
312 | static const u16 VDD2_VSEL_table[] = { | ||
313 | 800, 1450, 1500, | ||
314 | }; | ||
315 | static const u16 VIO_VSEL_table[] = { | ||
316 | 1800, 1850, | ||
317 | }; | ||
318 | static const u16 VINTANA2_VSEL_table[] = { | ||
319 | 2500, 2750, | ||
320 | }; | ||
297 | static const u16 VAUX1_6030_VSEL_table[] = { | 321 | static const u16 VAUX1_6030_VSEL_table[] = { |
298 | 1000, 1300, 1800, 2500, | 322 | 1000, 1300, 1800, 2500, |
299 | 2800, 2900, 3000, 3000, | 323 | 2800, 2900, 3000, 3000, |
@@ -414,20 +438,30 @@ static struct regulator_ops twlfixed_ops = { | |||
414 | 438 | ||
415 | /*----------------------------------------------------------------------*/ | 439 | /*----------------------------------------------------------------------*/ |
416 | 440 | ||
417 | #define TWL4030_ADJUSTABLE_LDO(label, offset, num) \ | 441 | #define TWL4030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf) \ |
418 | TWL_ADJUSTABLE_LDO(label, offset, num, TWL4030) | 442 | TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \ |
419 | #define TWL4030_FIXED_LDO(label, offset, mVolts, num) \ | 443 | remap_conf, TWL4030) |
420 | TWL_FIXED_LDO(label, offset, mVolts, num, TWL4030) | 444 | #define TWL4030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ |
421 | #define TWL6030_ADJUSTABLE_LDO(label, offset, num) \ | 445 | remap_conf) \ |
422 | TWL_ADJUSTABLE_LDO(label, offset, num, TWL6030) | 446 | TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ |
423 | #define TWL6030_FIXED_LDO(label, offset, mVolts, num) \ | 447 | remap_conf, TWL4030) |
424 | TWL_FIXED_LDO(label, offset, mVolts, num, TWL6030) | 448 | #define TWL6030_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \ |
425 | 449 | remap_conf) \ | |
426 | #define TWL_ADJUSTABLE_LDO(label, offset, num, family) { \ | 450 | TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, \ |
451 | remap_conf, TWL6030) | ||
452 | #define TWL6030_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ | ||
453 | remap_conf) \ | ||
454 | TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, \ | ||
455 | remap_conf, TWL6030) | ||
456 | |||
457 | #define TWL_ADJUSTABLE_LDO(label, offset, num, turnon_delay, remap_conf, \ | ||
458 | family) { \ | ||
427 | .base = offset, \ | 459 | .base = offset, \ |
428 | .id = num, \ | 460 | .id = num, \ |
429 | .table_len = ARRAY_SIZE(label##_VSEL_table), \ | 461 | .table_len = ARRAY_SIZE(label##_VSEL_table), \ |
430 | .table = label##_VSEL_table, \ | 462 | .table = label##_VSEL_table, \ |
463 | .delay = turnon_delay, \ | ||
464 | .remap = remap_conf, \ | ||
431 | .desc = { \ | 465 | .desc = { \ |
432 | .name = #label, \ | 466 | .name = #label, \ |
433 | .id = family##_REG_##label, \ | 467 | .id = family##_REG_##label, \ |
@@ -438,10 +472,13 @@ static struct regulator_ops twlfixed_ops = { | |||
438 | }, \ | 472 | }, \ |
439 | } | 473 | } |
440 | 474 | ||
441 | #define TWL_FIXED_LDO(label, offset, mVolts, num, family) { \ | 475 | #define TWL_FIXED_LDO(label, offset, mVolts, num, turnon_delay, remap_conf, \ |
476 | family) { \ | ||
442 | .base = offset, \ | 477 | .base = offset, \ |
443 | .id = num, \ | 478 | .id = num, \ |
444 | .min_mV = mVolts, \ | 479 | .min_mV = mVolts, \ |
480 | .delay = turnon_delay, \ | ||
481 | .remap = remap_conf, \ | ||
445 | .desc = { \ | 482 | .desc = { \ |
446 | .name = #label, \ | 483 | .name = #label, \ |
447 | .id = family##_REG_##label, \ | 484 | .id = family##_REG_##label, \ |
@@ -457,43 +494,41 @@ static struct regulator_ops twlfixed_ops = { | |||
457 | * software control over them after boot. | 494 | * software control over them after boot. |
458 | */ | 495 | */ |
459 | static struct twlreg_info twl_regs[] = { | 496 | static struct twlreg_info twl_regs[] = { |
460 | TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1), | 497 | TWL4030_ADJUSTABLE_LDO(VAUX1, 0x17, 1, 100, 0x08), |
461 | TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2), | 498 | TWL4030_ADJUSTABLE_LDO(VAUX2_4030, 0x1b, 2, 100, 0x08), |
462 | TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2), | 499 | TWL4030_ADJUSTABLE_LDO(VAUX2, 0x1b, 2, 100, 0x08), |
463 | TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3), | 500 | TWL4030_ADJUSTABLE_LDO(VAUX3, 0x1f, 3, 100, 0x08), |
464 | TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4), | 501 | TWL4030_ADJUSTABLE_LDO(VAUX4, 0x23, 4, 100, 0x08), |
465 | TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5), | 502 | TWL4030_ADJUSTABLE_LDO(VMMC1, 0x27, 5, 100, 0x08), |
466 | TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6), | 503 | TWL4030_ADJUSTABLE_LDO(VMMC2, 0x2b, 6, 100, 0x08), |
467 | /* | 504 | TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7, 100, 0x00), |
468 | TWL4030_ADJUSTABLE_LDO(VPLL1, 0x2f, 7), | 505 | TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8, 100, 0x08), |
469 | */ | 506 | TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9, 100, 0x00), |
470 | TWL4030_ADJUSTABLE_LDO(VPLL2, 0x33, 8), | 507 | TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10, 100, 0x08), |
471 | TWL4030_ADJUSTABLE_LDO(VSIM, 0x37, 9), | 508 | TWL4030_FIXED_LDO(VINTANA1, 0x3f, 1500, 11, 100, 0x08), |
472 | TWL4030_ADJUSTABLE_LDO(VDAC, 0x3b, 10), | 509 | TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12, 100, 0x08), |
473 | /* | 510 | TWL4030_FIXED_LDO(VINTDIG, 0x47, 1500, 13, 100, 0x08), |
474 | TWL4030_ADJUSTABLE_LDO(VINTANA1, 0x3f, 11), | 511 | TWL4030_ADJUSTABLE_LDO(VIO, 0x4b, 14, 1000, 0x08), |
475 | TWL4030_ADJUSTABLE_LDO(VINTANA2, 0x43, 12), | 512 | TWL4030_ADJUSTABLE_LDO(VDD1, 0x55, 15, 1000, 0x08), |
476 | TWL4030_ADJUSTABLE_LDO(VINTDIG, 0x47, 13), | 513 | TWL4030_ADJUSTABLE_LDO(VDD2, 0x63, 16, 1000, 0x08), |
477 | TWL4030_SMPS(VIO, 0x4b, 14), | 514 | TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17, 100, 0x08), |
478 | TWL4030_SMPS(VDD1, 0x55, 15), | 515 | TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18, 100, 0x08), |
479 | TWL4030_SMPS(VDD2, 0x63, 16), | 516 | TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19, 150, 0x08), |
480 | */ | ||
481 | TWL4030_FIXED_LDO(VUSB1V5, 0x71, 1500, 17), | ||
482 | TWL4030_FIXED_LDO(VUSB1V8, 0x74, 1800, 18), | ||
483 | TWL4030_FIXED_LDO(VUSB3V1, 0x77, 3100, 19), | ||
484 | /* VUSBCP is managed *only* by the USB subchip */ | 517 | /* VUSBCP is managed *only* by the USB subchip */ |
485 | 518 | ||
486 | /* 6030 REG with base as PMC Slave Misc : 0x0030 */ | 519 | /* 6030 REG with base as PMC Slave Misc : 0x0030 */ |
487 | TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1), | 520 | /* Turnon-delay and remap configuration values for 6030 are not |
488 | TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2), | 521 | verified since the specification is not public */ |
489 | TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3), | 522 | TWL6030_ADJUSTABLE_LDO(VAUX1_6030, 0x54, 1, 0, 0x08), |
490 | TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4), | 523 | TWL6030_ADJUSTABLE_LDO(VAUX2_6030, 0x58, 2, 0, 0x08), |
491 | TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5), | 524 | TWL6030_ADJUSTABLE_LDO(VAUX3_6030, 0x5c, 3, 0, 0x08), |
492 | TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7), | 525 | TWL6030_ADJUSTABLE_LDO(VMMC, 0x68, 4, 0, 0x08), |
493 | TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15), | 526 | TWL6030_ADJUSTABLE_LDO(VPP, 0x6c, 5, 0, 0x08), |
494 | TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16), | 527 | TWL6030_ADJUSTABLE_LDO(VUSIM, 0x74, 7, 0, 0x08), |
495 | TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17), | 528 | TWL6030_FIXED_LDO(VANA, 0x50, 2100, 15, 0, 0x08), |
496 | TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18) | 529 | TWL6030_FIXED_LDO(VCXIO, 0x60, 1800, 16, 0, 0x08), |
530 | TWL6030_FIXED_LDO(VDAC, 0x64, 1800, 17, 0, 0x08), | ||
531 | TWL6030_FIXED_LDO(VUSB, 0x70, 3300, 18, 0, 0x08) | ||
497 | }; | 532 | }; |
498 | 533 | ||
499 | static int twlreg_probe(struct platform_device *pdev) | 534 | static int twlreg_probe(struct platform_device *pdev) |
@@ -525,6 +560,19 @@ static int twlreg_probe(struct platform_device *pdev) | |||
525 | c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE | 560 | c->valid_ops_mask &= REGULATOR_CHANGE_VOLTAGE |
526 | | REGULATOR_CHANGE_MODE | 561 | | REGULATOR_CHANGE_MODE |
527 | | REGULATOR_CHANGE_STATUS; | 562 | | REGULATOR_CHANGE_STATUS; |
563 | switch (pdev->id) { | ||
564 | case TWL4030_REG_VIO: | ||
565 | case TWL4030_REG_VDD1: | ||
566 | case TWL4030_REG_VDD2: | ||
567 | case TWL4030_REG_VPLL1: | ||
568 | case TWL4030_REG_VINTANA1: | ||
569 | case TWL4030_REG_VINTANA2: | ||
570 | case TWL4030_REG_VINTDIG: | ||
571 | c->always_on = true; | ||
572 | break; | ||
573 | default: | ||
574 | break; | ||
575 | } | ||
528 | 576 | ||
529 | rdev = regulator_register(&info->desc, &pdev->dev, initdata, info); | 577 | rdev = regulator_register(&info->desc, &pdev->dev, initdata, info); |
530 | if (IS_ERR(rdev)) { | 578 | if (IS_ERR(rdev)) { |
@@ -534,6 +582,9 @@ static int twlreg_probe(struct platform_device *pdev) | |||
534 | } | 582 | } |
535 | platform_set_drvdata(pdev, rdev); | 583 | platform_set_drvdata(pdev, rdev); |
536 | 584 | ||
585 | twlreg_write(info, TWL_MODULE_PM_RECEIVER, VREG_REMAP, | ||
586 | info->remap); | ||
587 | |||
537 | /* NOTE: many regulators support short-circuit IRQs (presentable | 588 | /* NOTE: many regulators support short-circuit IRQs (presentable |
538 | * as REGULATOR_OVER_CURRENT notifications?) configured via: | 589 | * as REGULATOR_OVER_CURRENT notifications?) configured via: |
539 | * - SC_CONFIG | 590 | * - SC_CONFIG |
diff --git a/drivers/regulator/wm831x-dcdc.c b/drivers/regulator/wm831x-dcdc.c index 2eefc1a0cf08..0a6577577e8d 100644 --- a/drivers/regulator/wm831x-dcdc.c +++ b/drivers/regulator/wm831x-dcdc.c | |||
@@ -19,6 +19,8 @@ | |||
19 | #include <linux/i2c.h> | 19 | #include <linux/i2c.h> |
20 | #include <linux/platform_device.h> | 20 | #include <linux/platform_device.h> |
21 | #include <linux/regulator/driver.h> | 21 | #include <linux/regulator/driver.h> |
22 | #include <linux/regulator/machine.h> | ||
23 | #include <linux/gpio.h> | ||
22 | 24 | ||
23 | #include <linux/mfd/wm831x/core.h> | 25 | #include <linux/mfd/wm831x/core.h> |
24 | #include <linux/mfd/wm831x/regulator.h> | 26 | #include <linux/mfd/wm831x/regulator.h> |
@@ -39,6 +41,7 @@ | |||
39 | #define WM831X_DCDC_CONTROL_2 1 | 41 | #define WM831X_DCDC_CONTROL_2 1 |
40 | #define WM831X_DCDC_ON_CONFIG 2 | 42 | #define WM831X_DCDC_ON_CONFIG 2 |
41 | #define WM831X_DCDC_SLEEP_CONTROL 3 | 43 | #define WM831X_DCDC_SLEEP_CONTROL 3 |
44 | #define WM831X_DCDC_DVS_CONTROL 4 | ||
42 | 45 | ||
43 | /* | 46 | /* |
44 | * Shared | 47 | * Shared |
@@ -50,6 +53,10 @@ struct wm831x_dcdc { | |||
50 | int base; | 53 | int base; |
51 | struct wm831x *wm831x; | 54 | struct wm831x *wm831x; |
52 | struct regulator_dev *regulator; | 55 | struct regulator_dev *regulator; |
56 | int dvs_gpio; | ||
57 | int dvs_gpio_state; | ||
58 | int on_vsel; | ||
59 | int dvs_vsel; | ||
53 | }; | 60 | }; |
54 | 61 | ||
55 | static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev) | 62 | static int wm831x_dcdc_is_enabled(struct regulator_dev *rdev) |
@@ -240,11 +247,9 @@ static int wm831x_buckv_list_voltage(struct regulator_dev *rdev, | |||
240 | return -EINVAL; | 247 | return -EINVAL; |
241 | } | 248 | } |
242 | 249 | ||
243 | static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg, | 250 | static int wm831x_buckv_select_min_voltage(struct regulator_dev *rdev, |
244 | int min_uV, int max_uV) | 251 | int min_uV, int max_uV) |
245 | { | 252 | { |
246 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
247 | struct wm831x *wm831x = dcdc->wm831x; | ||
248 | u16 vsel; | 253 | u16 vsel; |
249 | 254 | ||
250 | if (min_uV < 600000) | 255 | if (min_uV < 600000) |
@@ -257,39 +262,126 @@ static int wm831x_buckv_set_voltage_int(struct regulator_dev *rdev, int reg, | |||
257 | if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV) | 262 | if (wm831x_buckv_list_voltage(rdev, vsel) > max_uV) |
258 | return -EINVAL; | 263 | return -EINVAL; |
259 | 264 | ||
260 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_ON_VSEL_MASK, vsel); | 265 | return vsel; |
266 | } | ||
267 | |||
268 | static int wm831x_buckv_select_max_voltage(struct regulator_dev *rdev, | ||
269 | int min_uV, int max_uV) | ||
270 | { | ||
271 | u16 vsel; | ||
272 | |||
273 | if (max_uV < 600000 || max_uV > 1800000) | ||
274 | return -EINVAL; | ||
275 | |||
276 | vsel = ((max_uV - 600000) / 12500) + 8; | ||
277 | |||
278 | if (wm831x_buckv_list_voltage(rdev, vsel) < min_uV || | ||
279 | wm831x_buckv_list_voltage(rdev, vsel) < max_uV) | ||
280 | return -EINVAL; | ||
281 | |||
282 | return vsel; | ||
283 | } | ||
284 | |||
285 | static int wm831x_buckv_set_dvs(struct regulator_dev *rdev, int state) | ||
286 | { | ||
287 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | ||
288 | |||
289 | if (state == dcdc->dvs_gpio_state) | ||
290 | return 0; | ||
291 | |||
292 | dcdc->dvs_gpio_state = state; | ||
293 | gpio_set_value(dcdc->dvs_gpio, state); | ||
294 | |||
295 | /* Should wait for DVS state change to be asserted if we have | ||
296 | * a GPIO for it, for now assume the device is configured | ||
297 | * for the fastest possible transition. | ||
298 | */ | ||
299 | |||
300 | return 0; | ||
261 | } | 301 | } |
262 | 302 | ||
263 | static int wm831x_buckv_set_voltage(struct regulator_dev *rdev, | 303 | static int wm831x_buckv_set_voltage(struct regulator_dev *rdev, |
264 | int min_uV, int max_uV) | 304 | int min_uV, int max_uV) |
265 | { | 305 | { |
266 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | 306 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); |
267 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | 307 | struct wm831x *wm831x = dcdc->wm831x; |
308 | int on_reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
309 | int dvs_reg = dcdc->base + WM831X_DCDC_DVS_CONTROL; | ||
310 | int vsel, ret; | ||
311 | |||
312 | vsel = wm831x_buckv_select_min_voltage(rdev, min_uV, max_uV); | ||
313 | if (vsel < 0) | ||
314 | return vsel; | ||
315 | |||
316 | /* If this value is already set then do a GPIO update if we can */ | ||
317 | if (dcdc->dvs_gpio && dcdc->on_vsel == vsel) | ||
318 | return wm831x_buckv_set_dvs(rdev, 0); | ||
319 | |||
320 | if (dcdc->dvs_gpio && dcdc->dvs_vsel == vsel) | ||
321 | return wm831x_buckv_set_dvs(rdev, 1); | ||
322 | |||
323 | /* Always set the ON status to the minimum voltage */ | ||
324 | ret = wm831x_set_bits(wm831x, on_reg, WM831X_DC1_ON_VSEL_MASK, vsel); | ||
325 | if (ret < 0) | ||
326 | return ret; | ||
327 | dcdc->on_vsel = vsel; | ||
328 | |||
329 | if (!dcdc->dvs_gpio) | ||
330 | return ret; | ||
331 | |||
332 | /* Kick the voltage transition now */ | ||
333 | ret = wm831x_buckv_set_dvs(rdev, 0); | ||
334 | if (ret < 0) | ||
335 | return ret; | ||
336 | |||
337 | /* Set the high voltage as the DVS voltage. This is optimised | ||
338 | * for CPUfreq usage, most processors will keep the maximum | ||
339 | * voltage constant and lower the minimum with the frequency. */ | ||
340 | vsel = wm831x_buckv_select_max_voltage(rdev, min_uV, max_uV); | ||
341 | if (vsel < 0) { | ||
342 | /* This should never happen - at worst the same vsel | ||
343 | * should be chosen */ | ||
344 | WARN_ON(vsel < 0); | ||
345 | return 0; | ||
346 | } | ||
347 | |||
348 | /* Don't bother if it's the same VSEL we're already using */ | ||
349 | if (vsel == dcdc->on_vsel) | ||
350 | return 0; | ||
268 | 351 | ||
269 | return wm831x_buckv_set_voltage_int(rdev, reg, min_uV, max_uV); | 352 | ret = wm831x_set_bits(wm831x, dvs_reg, WM831X_DC1_DVS_VSEL_MASK, vsel); |
353 | if (ret == 0) | ||
354 | dcdc->dvs_vsel = vsel; | ||
355 | else | ||
356 | dev_warn(wm831x->dev, "Failed to set DCDC DVS VSEL: %d\n", | ||
357 | ret); | ||
358 | |||
359 | return 0; | ||
270 | } | 360 | } |
271 | 361 | ||
272 | static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, | 362 | static int wm831x_buckv_set_suspend_voltage(struct regulator_dev *rdev, |
273 | int uV) | 363 | int uV) |
274 | { | 364 | { |
275 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | 365 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); |
366 | struct wm831x *wm831x = dcdc->wm831x; | ||
276 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; | 367 | u16 reg = dcdc->base + WM831X_DCDC_SLEEP_CONTROL; |
368 | int vsel; | ||
369 | |||
370 | vsel = wm831x_buckv_select_min_voltage(rdev, uV, uV); | ||
371 | if (vsel < 0) | ||
372 | return vsel; | ||
277 | 373 | ||
278 | return wm831x_buckv_set_voltage_int(rdev, reg, uV, uV); | 374 | return wm831x_set_bits(wm831x, reg, WM831X_DC1_SLP_VSEL_MASK, vsel); |
279 | } | 375 | } |
280 | 376 | ||
281 | static int wm831x_buckv_get_voltage(struct regulator_dev *rdev) | 377 | static int wm831x_buckv_get_voltage(struct regulator_dev *rdev) |
282 | { | 378 | { |
283 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); | 379 | struct wm831x_dcdc *dcdc = rdev_get_drvdata(rdev); |
284 | struct wm831x *wm831x = dcdc->wm831x; | ||
285 | u16 reg = dcdc->base + WM831X_DCDC_ON_CONFIG; | ||
286 | int val; | ||
287 | 380 | ||
288 | val = wm831x_reg_read(wm831x, reg); | 381 | if (dcdc->dvs_gpio && dcdc->dvs_gpio_state) |
289 | if (val < 0) | 382 | return wm831x_buckv_list_voltage(rdev, dcdc->dvs_vsel); |
290 | return val; | 383 | else |
291 | 384 | return wm831x_buckv_list_voltage(rdev, dcdc->on_vsel); | |
292 | return wm831x_buckv_list_voltage(rdev, val & WM831X_DC1_ON_VSEL_MASK); | ||
293 | } | 385 | } |
294 | 386 | ||
295 | /* Current limit options */ | 387 | /* Current limit options */ |
@@ -346,6 +438,64 @@ static struct regulator_ops wm831x_buckv_ops = { | |||
346 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, | 438 | .set_suspend_mode = wm831x_dcdc_set_suspend_mode, |
347 | }; | 439 | }; |
348 | 440 | ||
441 | /* | ||
442 | * Set up DVS control. We just log errors since we can still run | ||
443 | * (with reduced performance) if we fail. | ||
444 | */ | ||
445 | static __devinit void wm831x_buckv_dvs_init(struct wm831x_dcdc *dcdc, | ||
446 | struct wm831x_buckv_pdata *pdata) | ||
447 | { | ||
448 | struct wm831x *wm831x = dcdc->wm831x; | ||
449 | int ret; | ||
450 | u16 ctrl; | ||
451 | |||
452 | if (!pdata || !pdata->dvs_gpio) | ||
453 | return; | ||
454 | |||
455 | switch (pdata->dvs_control_src) { | ||
456 | case 1: | ||
457 | ctrl = 2 << WM831X_DC1_DVS_SRC_SHIFT; | ||
458 | break; | ||
459 | case 2: | ||
460 | ctrl = 3 << WM831X_DC1_DVS_SRC_SHIFT; | ||
461 | break; | ||
462 | default: | ||
463 | dev_err(wm831x->dev, "Invalid DVS control source %d for %s\n", | ||
464 | pdata->dvs_control_src, dcdc->name); | ||
465 | return; | ||
466 | } | ||
467 | |||
468 | ret = wm831x_set_bits(wm831x, dcdc->base + WM831X_DCDC_DVS_CONTROL, | ||
469 | WM831X_DC1_DVS_SRC_MASK, ctrl); | ||
470 | if (ret < 0) { | ||
471 | dev_err(wm831x->dev, "Failed to set %s DVS source: %d\n", | ||
472 | dcdc->name, ret); | ||
473 | return; | ||
474 | } | ||
475 | |||
476 | ret = gpio_request(pdata->dvs_gpio, "DCDC DVS"); | ||
477 | if (ret < 0) { | ||
478 | dev_err(wm831x->dev, "Failed to get %s DVS GPIO: %d\n", | ||
479 | dcdc->name, ret); | ||
480 | return; | ||
481 | } | ||
482 | |||
483 | /* gpiolib won't let us read the GPIO status so pick the higher | ||
484 | * of the two existing voltages so we take it as platform data. | ||
485 | */ | ||
486 | dcdc->dvs_gpio_state = pdata->dvs_init_state; | ||
487 | |||
488 | ret = gpio_direction_output(pdata->dvs_gpio, dcdc->dvs_gpio_state); | ||
489 | if (ret < 0) { | ||
490 | dev_err(wm831x->dev, "Failed to enable %s DVS GPIO: %d\n", | ||
491 | dcdc->name, ret); | ||
492 | gpio_free(pdata->dvs_gpio); | ||
493 | return; | ||
494 | } | ||
495 | |||
496 | dcdc->dvs_gpio = pdata->dvs_gpio; | ||
497 | } | ||
498 | |||
349 | static __devinit int wm831x_buckv_probe(struct platform_device *pdev) | 499 | static __devinit int wm831x_buckv_probe(struct platform_device *pdev) |
350 | { | 500 | { |
351 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); | 501 | struct wm831x *wm831x = dev_get_drvdata(pdev->dev.parent); |
@@ -384,6 +534,23 @@ static __devinit int wm831x_buckv_probe(struct platform_device *pdev) | |||
384 | dcdc->desc.ops = &wm831x_buckv_ops; | 534 | dcdc->desc.ops = &wm831x_buckv_ops; |
385 | dcdc->desc.owner = THIS_MODULE; | 535 | dcdc->desc.owner = THIS_MODULE; |
386 | 536 | ||
537 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG); | ||
538 | if (ret < 0) { | ||
539 | dev_err(wm831x->dev, "Failed to read ON VSEL: %d\n", ret); | ||
540 | goto err; | ||
541 | } | ||
542 | dcdc->on_vsel = ret & WM831X_DC1_ON_VSEL_MASK; | ||
543 | |||
544 | ret = wm831x_reg_read(wm831x, dcdc->base + WM831X_DCDC_ON_CONFIG); | ||
545 | if (ret < 0) { | ||
546 | dev_err(wm831x->dev, "Failed to read DVS VSEL: %d\n", ret); | ||
547 | goto err; | ||
548 | } | ||
549 | dcdc->dvs_vsel = ret & WM831X_DC1_DVS_VSEL_MASK; | ||
550 | |||
551 | if (pdata->dcdc[id]) | ||
552 | wm831x_buckv_dvs_init(dcdc, pdata->dcdc[id]->driver_data); | ||
553 | |||
387 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, | 554 | dcdc->regulator = regulator_register(&dcdc->desc, &pdev->dev, |
388 | pdata->dcdc[id], dcdc); | 555 | pdata->dcdc[id], dcdc); |
389 | if (IS_ERR(dcdc->regulator)) { | 556 | if (IS_ERR(dcdc->regulator)) { |
@@ -422,6 +589,8 @@ err_uv: | |||
422 | err_regulator: | 589 | err_regulator: |
423 | regulator_unregister(dcdc->regulator); | 590 | regulator_unregister(dcdc->regulator); |
424 | err: | 591 | err: |
592 | if (dcdc->dvs_gpio) | ||
593 | gpio_free(dcdc->dvs_gpio); | ||
425 | kfree(dcdc); | 594 | kfree(dcdc); |
426 | return ret; | 595 | return ret; |
427 | } | 596 | } |
@@ -434,6 +603,8 @@ static __devexit int wm831x_buckv_remove(struct platform_device *pdev) | |||
434 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc); | 603 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "HC"), dcdc); |
435 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc); | 604 | wm831x_free_irq(wm831x, platform_get_irq_byname(pdev, "UV"), dcdc); |
436 | regulator_unregister(dcdc->regulator); | 605 | regulator_unregister(dcdc->regulator); |
606 | if (dcdc->dvs_gpio) | ||
607 | gpio_free(dcdc->dvs_gpio); | ||
437 | kfree(dcdc); | 608 | kfree(dcdc); |
438 | 609 | ||
439 | return 0; | 610 | return 0; |
diff --git a/drivers/regulator/wm831x-ldo.c b/drivers/regulator/wm831x-ldo.c index 902db56ce099..61e02ac2fda3 100644 --- a/drivers/regulator/wm831x-ldo.c +++ b/drivers/regulator/wm831x-ldo.c | |||
@@ -470,7 +470,7 @@ static unsigned int wm831x_aldo_get_mode(struct regulator_dev *rdev) | |||
470 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); | 470 | struct wm831x_ldo *ldo = rdev_get_drvdata(rdev); |
471 | struct wm831x *wm831x = ldo->wm831x; | 471 | struct wm831x *wm831x = ldo->wm831x; |
472 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; | 472 | int on_reg = ldo->base + WM831X_LDO_ON_CONTROL; |
473 | unsigned int ret; | 473 | int ret; |
474 | 474 | ||
475 | ret = wm831x_reg_read(wm831x, on_reg); | 475 | ret = wm831x_reg_read(wm831x, on_reg); |
476 | if (ret < 0) | 476 | if (ret < 0) |
diff --git a/drivers/rtc/rtc-cmos.c b/drivers/rtc/rtc-cmos.c index eb154dc57164..c8c12325e69b 100644 --- a/drivers/rtc/rtc-cmos.c +++ b/drivers/rtc/rtc-cmos.c | |||
@@ -686,7 +686,8 @@ cmos_do_probe(struct device *dev, struct resource *ports, int rtc_irq) | |||
686 | */ | 686 | */ |
687 | #if defined(CONFIG_ATARI) | 687 | #if defined(CONFIG_ATARI) |
688 | address_space = 64; | 688 | address_space = 64; |
689 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) || defined(__sparc__) | 689 | #elif defined(__i386__) || defined(__x86_64__) || defined(__arm__) \ |
690 | || defined(__sparc__) || defined(__mips__) | ||
690 | address_space = 128; | 691 | address_space = 128; |
691 | #else | 692 | #else |
692 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. | 693 | #warning Assuming 128 bytes of RTC+NVRAM address space, not 64 bytes. |
diff --git a/drivers/rtc/rtc-ds1305.c b/drivers/rtc/rtc-ds1305.c index 259db7f3535b..9630e7d3314e 100644 --- a/drivers/rtc/rtc-ds1305.c +++ b/drivers/rtc/rtc-ds1305.c | |||
@@ -778,6 +778,8 @@ static int __devinit ds1305_probe(struct spi_device *spi) | |||
778 | spi->irq, status); | 778 | spi->irq, status); |
779 | goto fail1; | 779 | goto fail1; |
780 | } | 780 | } |
781 | |||
782 | device_set_wakeup_capable(&spi->dev, 1); | ||
781 | } | 783 | } |
782 | 784 | ||
783 | /* export NVRAM */ | 785 | /* export NVRAM */ |
diff --git a/drivers/rtc/rtc-ds1307.c b/drivers/rtc/rtc-ds1307.c index 8a99da6f2f24..c4ec5c158aa1 100644 --- a/drivers/rtc/rtc-ds1307.c +++ b/drivers/rtc/rtc-ds1307.c | |||
@@ -881,6 +881,8 @@ read_rtc: | |||
881 | "unable to request IRQ!\n"); | 881 | "unable to request IRQ!\n"); |
882 | goto exit_irq; | 882 | goto exit_irq; |
883 | } | 883 | } |
884 | |||
885 | device_set_wakeup_capable(&client->dev, 1); | ||
884 | set_bit(HAS_ALARM, &ds1307->flags); | 886 | set_bit(HAS_ALARM, &ds1307->flags); |
885 | dev_dbg(&client->dev, "got IRQ %d\n", client->irq); | 887 | dev_dbg(&client->dev, "got IRQ %d\n", client->irq); |
886 | } | 888 | } |
diff --git a/drivers/rtc/rtc-ds1374.c b/drivers/rtc/rtc-ds1374.c index 713f7bf5afb3..5317bbcbc7a0 100644 --- a/drivers/rtc/rtc-ds1374.c +++ b/drivers/rtc/rtc-ds1374.c | |||
@@ -383,6 +383,8 @@ static int ds1374_probe(struct i2c_client *client, | |||
383 | dev_err(&client->dev, "unable to request IRQ\n"); | 383 | dev_err(&client->dev, "unable to request IRQ\n"); |
384 | goto out_free; | 384 | goto out_free; |
385 | } | 385 | } |
386 | |||
387 | device_set_wakeup_capable(&client->dev, 1); | ||
386 | } | 388 | } |
387 | 389 | ||
388 | ds1374->rtc = rtc_device_register(client->name, &client->dev, | 390 | ds1374->rtc = rtc_device_register(client->name, &client->dev, |
diff --git a/drivers/s390/block/dasd_alias.c b/drivers/s390/block/dasd_alias.c index fd1231738ef4..148b1dd24070 100644 --- a/drivers/s390/block/dasd_alias.c +++ b/drivers/s390/block/dasd_alias.c | |||
@@ -218,7 +218,7 @@ int dasd_alias_make_device_known_to_lcu(struct dasd_device *device) | |||
218 | spin_unlock_irqrestore(&aliastree.lock, flags); | 218 | spin_unlock_irqrestore(&aliastree.lock, flags); |
219 | newlcu = _allocate_lcu(uid); | 219 | newlcu = _allocate_lcu(uid); |
220 | if (IS_ERR(newlcu)) | 220 | if (IS_ERR(newlcu)) |
221 | return PTR_ERR(lcu); | 221 | return PTR_ERR(newlcu); |
222 | spin_lock_irqsave(&aliastree.lock, flags); | 222 | spin_lock_irqsave(&aliastree.lock, flags); |
223 | lcu = _find_lcu(server, uid); | 223 | lcu = _find_lcu(server, uid); |
224 | if (!lcu) { | 224 | if (!lcu) { |
diff --git a/drivers/s390/block/dasd_diag.c b/drivers/s390/block/dasd_diag.c index f64d0db881b4..6e14863f5c70 100644 --- a/drivers/s390/block/dasd_diag.c +++ b/drivers/s390/block/dasd_diag.c | |||
@@ -8,7 +8,7 @@ | |||
8 | * | 8 | * |
9 | */ | 9 | */ |
10 | 10 | ||
11 | #define KMSG_COMPONENT "dasd-diag" | 11 | #define KMSG_COMPONENT "dasd" |
12 | 12 | ||
13 | #include <linux/stddef.h> | 13 | #include <linux/stddef.h> |
14 | #include <linux/kernel.h> | 14 | #include <linux/kernel.h> |
@@ -146,16 +146,16 @@ dasd_diag_erp(struct dasd_device *device) | |||
146 | rc = mdsk_init_io(device, device->block->bp_block, 0, NULL); | 146 | rc = mdsk_init_io(device, device->block->bp_block, 0, NULL); |
147 | if (rc == 4) { | 147 | if (rc == 4) { |
148 | if (!(device->features & DASD_FEATURE_READONLY)) { | 148 | if (!(device->features & DASD_FEATURE_READONLY)) { |
149 | dev_warn(&device->cdev->dev, | 149 | pr_warning("%s: The access mode of a DIAG device " |
150 | "The access mode of a DIAG device changed" | 150 | "changed to read-only\n", |
151 | " to read-only"); | 151 | dev_name(&device->cdev->dev)); |
152 | device->features |= DASD_FEATURE_READONLY; | 152 | device->features |= DASD_FEATURE_READONLY; |
153 | } | 153 | } |
154 | rc = 0; | 154 | rc = 0; |
155 | } | 155 | } |
156 | if (rc) | 156 | if (rc) |
157 | dev_warn(&device->cdev->dev, "DIAG ERP failed with " | 157 | pr_warning("%s: DIAG ERP failed with " |
158 | "rc=%d\n", rc); | 158 | "rc=%d\n", dev_name(&device->cdev->dev), rc); |
159 | } | 159 | } |
160 | 160 | ||
161 | /* Start a given request at the device. Return zero on success, non-zero | 161 | /* Start a given request at the device. Return zero on success, non-zero |
@@ -371,8 +371,9 @@ dasd_diag_check_device(struct dasd_device *device) | |||
371 | private->pt_block = 2; | 371 | private->pt_block = 2; |
372 | break; | 372 | break; |
373 | default: | 373 | default: |
374 | dev_warn(&device->cdev->dev, "Device type %d is not supported " | 374 | pr_warning("%s: Device type %d is not supported " |
375 | "in DIAG mode\n", private->rdc_data.vdev_class); | 375 | "in DIAG mode\n", dev_name(&device->cdev->dev), |
376 | private->rdc_data.vdev_class); | ||
376 | rc = -EOPNOTSUPP; | 377 | rc = -EOPNOTSUPP; |
377 | goto out; | 378 | goto out; |
378 | } | 379 | } |
@@ -413,8 +414,8 @@ dasd_diag_check_device(struct dasd_device *device) | |||
413 | private->iob.flaga = DASD_DIAG_FLAGA_DEFAULT; | 414 | private->iob.flaga = DASD_DIAG_FLAGA_DEFAULT; |
414 | rc = dia250(&private->iob, RW_BIO); | 415 | rc = dia250(&private->iob, RW_BIO); |
415 | if (rc == 3) { | 416 | if (rc == 3) { |
416 | dev_warn(&device->cdev->dev, | 417 | pr_warning("%s: A 64-bit DIAG call failed\n", |
417 | "A 64-bit DIAG call failed\n"); | 418 | dev_name(&device->cdev->dev)); |
418 | rc = -EOPNOTSUPP; | 419 | rc = -EOPNOTSUPP; |
419 | goto out_label; | 420 | goto out_label; |
420 | } | 421 | } |
@@ -423,8 +424,9 @@ dasd_diag_check_device(struct dasd_device *device) | |||
423 | break; | 424 | break; |
424 | } | 425 | } |
425 | if (bsize > PAGE_SIZE) { | 426 | if (bsize > PAGE_SIZE) { |
426 | dev_warn(&device->cdev->dev, "Accessing the DASD failed because" | 427 | pr_warning("%s: Accessing the DASD failed because of an " |
427 | " of an incorrect format (rc=%d)\n", rc); | 428 | "incorrect format (rc=%d)\n", |
429 | dev_name(&device->cdev->dev), rc); | ||
428 | rc = -EIO; | 430 | rc = -EIO; |
429 | goto out_label; | 431 | goto out_label; |
430 | } | 432 | } |
@@ -442,18 +444,18 @@ dasd_diag_check_device(struct dasd_device *device) | |||
442 | block->s2b_shift++; | 444 | block->s2b_shift++; |
443 | rc = mdsk_init_io(device, block->bp_block, 0, NULL); | 445 | rc = mdsk_init_io(device, block->bp_block, 0, NULL); |
444 | if (rc && (rc != 4)) { | 446 | if (rc && (rc != 4)) { |
445 | dev_warn(&device->cdev->dev, "DIAG initialization " | 447 | pr_warning("%s: DIAG initialization failed with rc=%d\n", |
446 | "failed with rc=%d\n", rc); | 448 | dev_name(&device->cdev->dev), rc); |
447 | rc = -EIO; | 449 | rc = -EIO; |
448 | } else { | 450 | } else { |
449 | if (rc == 4) | 451 | if (rc == 4) |
450 | device->features |= DASD_FEATURE_READONLY; | 452 | device->features |= DASD_FEATURE_READONLY; |
451 | dev_info(&device->cdev->dev, | 453 | pr_info("%s: New DASD with %ld byte/block, total size %ld " |
452 | "New DASD with %ld byte/block, total size %ld KB%s\n", | 454 | "KB%s\n", dev_name(&device->cdev->dev), |
453 | (unsigned long) block->bp_block, | 455 | (unsigned long) block->bp_block, |
454 | (unsigned long) (block->blocks << | 456 | (unsigned long) (block->blocks << |
455 | block->s2b_shift) >> 1, | 457 | block->s2b_shift) >> 1, |
456 | (rc == 4) ? ", read-only device" : ""); | 458 | (rc == 4) ? ", read-only device" : ""); |
457 | rc = 0; | 459 | rc = 0; |
458 | } | 460 | } |
459 | out_label: | 461 | out_label: |
diff --git a/drivers/s390/char/fs3270.c b/drivers/s390/char/fs3270.c index 28e4649fa9e4..247b2b934728 100644 --- a/drivers/s390/char/fs3270.c +++ b/drivers/s390/char/fs3270.c | |||
@@ -467,7 +467,7 @@ fs3270_open(struct inode *inode, struct file *filp) | |||
467 | if (IS_ERR(ib)) { | 467 | if (IS_ERR(ib)) { |
468 | raw3270_put_view(&fp->view); | 468 | raw3270_put_view(&fp->view); |
469 | raw3270_del_view(&fp->view); | 469 | raw3270_del_view(&fp->view); |
470 | rc = PTR_ERR(fp); | 470 | rc = PTR_ERR(ib); |
471 | goto out; | 471 | goto out; |
472 | } | 472 | } |
473 | fp->rdbuf = ib; | 473 | fp->rdbuf = ib; |
diff --git a/drivers/s390/char/tape_34xx.c b/drivers/s390/char/tape_34xx.c index 3657fe103c27..cb70fa1cf539 100644 --- a/drivers/s390/char/tape_34xx.c +++ b/drivers/s390/char/tape_34xx.c | |||
@@ -9,6 +9,7 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #define KMSG_COMPONENT "tape_34xx" | 11 | #define KMSG_COMPONENT "tape_34xx" |
12 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
12 | 13 | ||
13 | #include <linux/module.h> | 14 | #include <linux/module.h> |
14 | #include <linux/init.h> | 15 | #include <linux/init.h> |
diff --git a/drivers/s390/char/tape_3590.c b/drivers/s390/char/tape_3590.c index 0c72aadb8391..9821c5886613 100644 --- a/drivers/s390/char/tape_3590.c +++ b/drivers/s390/char/tape_3590.c | |||
@@ -9,6 +9,7 @@ | |||
9 | */ | 9 | */ |
10 | 10 | ||
11 | #define KMSG_COMPONENT "tape_3590" | 11 | #define KMSG_COMPONENT "tape_3590" |
12 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
12 | 13 | ||
13 | #include <linux/module.h> | 14 | #include <linux/module.h> |
14 | #include <linux/init.h> | 15 | #include <linux/init.h> |
@@ -136,7 +137,7 @@ static void int_to_ext_kekl(struct tape3592_kekl *in, | |||
136 | out->type_on_tape = TAPE390_KEKL_TYPE_LABEL; | 137 | out->type_on_tape = TAPE390_KEKL_TYPE_LABEL; |
137 | memcpy(out->label, in->label, sizeof(in->label)); | 138 | memcpy(out->label, in->label, sizeof(in->label)); |
138 | EBCASC(out->label, sizeof(in->label)); | 139 | EBCASC(out->label, sizeof(in->label)); |
139 | strstrip(out->label); | 140 | strim(out->label); |
140 | } | 141 | } |
141 | 142 | ||
142 | static void int_to_ext_kekl_pair(struct tape3592_kekl_pair *in, | 143 | static void int_to_ext_kekl_pair(struct tape3592_kekl_pair *in, |
diff --git a/drivers/s390/char/tape_block.c b/drivers/s390/char/tape_block.c index 4799cc2f73c3..96816149368a 100644 --- a/drivers/s390/char/tape_block.c +++ b/drivers/s390/char/tape_block.c | |||
@@ -11,6 +11,7 @@ | |||
11 | */ | 11 | */ |
12 | 12 | ||
13 | #define KMSG_COMPONENT "tape" | 13 | #define KMSG_COMPONENT "tape" |
14 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
14 | 15 | ||
15 | #include <linux/fs.h> | 16 | #include <linux/fs.h> |
16 | #include <linux/module.h> | 17 | #include <linux/module.h> |
diff --git a/drivers/s390/char/tape_char.c b/drivers/s390/char/tape_char.c index 23d773a0d113..2125ec7d95f0 100644 --- a/drivers/s390/char/tape_char.c +++ b/drivers/s390/char/tape_char.c | |||
@@ -10,6 +10,9 @@ | |||
10 | * Martin Schwidefsky <schwidefsky@de.ibm.com> | 10 | * Martin Schwidefsky <schwidefsky@de.ibm.com> |
11 | */ | 11 | */ |
12 | 12 | ||
13 | #define KMSG_COMPONENT "tape" | ||
14 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
15 | |||
13 | #include <linux/module.h> | 16 | #include <linux/module.h> |
14 | #include <linux/types.h> | 17 | #include <linux/types.h> |
15 | #include <linux/proc_fs.h> | 18 | #include <linux/proc_fs.h> |
diff --git a/drivers/s390/char/tape_class.c b/drivers/s390/char/tape_class.c index ddc914ccea8f..b2864e3edb6d 100644 --- a/drivers/s390/char/tape_class.c +++ b/drivers/s390/char/tape_class.c | |||
@@ -7,6 +7,10 @@ | |||
7 | * Author: Stefan Bader <shbader@de.ibm.com> | 7 | * Author: Stefan Bader <shbader@de.ibm.com> |
8 | * Based on simple class device code by Greg K-H | 8 | * Based on simple class device code by Greg K-H |
9 | */ | 9 | */ |
10 | |||
11 | #define KMSG_COMPONENT "tape" | ||
12 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
13 | |||
10 | #include "tape_class.h" | 14 | #include "tape_class.h" |
11 | 15 | ||
12 | MODULE_AUTHOR("Stefan Bader <shbader@de.ibm.com>"); | 16 | MODULE_AUTHOR("Stefan Bader <shbader@de.ibm.com>"); |
diff --git a/drivers/s390/char/tape_core.c b/drivers/s390/char/tape_core.c index f5d6802dc5da..81b094e480e6 100644 --- a/drivers/s390/char/tape_core.c +++ b/drivers/s390/char/tape_core.c | |||
@@ -12,6 +12,8 @@ | |||
12 | */ | 12 | */ |
13 | 13 | ||
14 | #define KMSG_COMPONENT "tape" | 14 | #define KMSG_COMPONENT "tape" |
15 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
16 | |||
15 | #include <linux/module.h> | 17 | #include <linux/module.h> |
16 | #include <linux/init.h> // for kernel parameters | 18 | #include <linux/init.h> // for kernel parameters |
17 | #include <linux/kmod.h> // for requesting modules | 19 | #include <linux/kmod.h> // for requesting modules |
diff --git a/drivers/s390/char/tape_proc.c b/drivers/s390/char/tape_proc.c index ebd820ccfb24..0ceb37984f77 100644 --- a/drivers/s390/char/tape_proc.c +++ b/drivers/s390/char/tape_proc.c | |||
@@ -11,6 +11,9 @@ | |||
11 | * PROCFS Functions | 11 | * PROCFS Functions |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #define KMSG_COMPONENT "tape" | ||
15 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
16 | |||
14 | #include <linux/module.h> | 17 | #include <linux/module.h> |
15 | #include <linux/vmalloc.h> | 18 | #include <linux/vmalloc.h> |
16 | #include <linux/seq_file.h> | 19 | #include <linux/seq_file.h> |
diff --git a/drivers/s390/char/tape_std.c b/drivers/s390/char/tape_std.c index 750354ad16e5..03f07e5dd6e9 100644 --- a/drivers/s390/char/tape_std.c +++ b/drivers/s390/char/tape_std.c | |||
@@ -11,6 +11,9 @@ | |||
11 | * Stefan Bader <shbader@de.ibm.com> | 11 | * Stefan Bader <shbader@de.ibm.com> |
12 | */ | 12 | */ |
13 | 13 | ||
14 | #define KMSG_COMPONENT "tape" | ||
15 | #define pr_fmt(fmt) KMSG_COMPONENT ": " fmt | ||
16 | |||
14 | #include <linux/stddef.h> | 17 | #include <linux/stddef.h> |
15 | #include <linux/kernel.h> | 18 | #include <linux/kernel.h> |
16 | #include <linux/bio.h> | 19 | #include <linux/bio.h> |
diff --git a/drivers/s390/cio/ccwreq.c b/drivers/s390/cio/ccwreq.c index 9509e3860934..7a28a3029a3f 100644 --- a/drivers/s390/cio/ccwreq.c +++ b/drivers/s390/cio/ccwreq.c | |||
@@ -49,7 +49,6 @@ static u16 ccwreq_next_path(struct ccw_device *cdev) | |||
49 | */ | 49 | */ |
50 | static void ccwreq_stop(struct ccw_device *cdev, int rc) | 50 | static void ccwreq_stop(struct ccw_device *cdev, int rc) |
51 | { | 51 | { |
52 | struct subchannel *sch = to_subchannel(cdev->dev.parent); | ||
53 | struct ccw_request *req = &cdev->private->req; | 52 | struct ccw_request *req = &cdev->private->req; |
54 | 53 | ||
55 | if (req->done) | 54 | if (req->done) |
@@ -57,7 +56,6 @@ static void ccwreq_stop(struct ccw_device *cdev, int rc) | |||
57 | req->done = 1; | 56 | req->done = 1; |
58 | ccw_device_set_timeout(cdev, 0); | 57 | ccw_device_set_timeout(cdev, 0); |
59 | memset(&cdev->private->irb, 0, sizeof(struct irb)); | 58 | memset(&cdev->private->irb, 0, sizeof(struct irb)); |
60 | sch->lpm = sch->schib.pmcw.pam; | ||
61 | if (rc && rc != -ENODEV && req->drc) | 59 | if (rc && rc != -ENODEV && req->drc) |
62 | rc = req->drc; | 60 | rc = req->drc; |
63 | req->callback(cdev, req->data, rc); | 61 | req->callback(cdev, req->data, rc); |
@@ -80,7 +78,6 @@ static void ccwreq_do(struct ccw_device *cdev) | |||
80 | continue; | 78 | continue; |
81 | } | 79 | } |
82 | /* Perform start function. */ | 80 | /* Perform start function. */ |
83 | sch->lpm = 0xff; | ||
84 | memset(&cdev->private->irb, 0, sizeof(struct irb)); | 81 | memset(&cdev->private->irb, 0, sizeof(struct irb)); |
85 | rc = cio_start(sch, cp, (u8) req->mask); | 82 | rc = cio_start(sch, cp, (u8) req->mask); |
86 | if (rc == 0) { | 83 | if (rc == 0) { |
diff --git a/drivers/s390/cio/device.c b/drivers/s390/cio/device.c index 73901c9e260f..a6c7d5426fb2 100644 --- a/drivers/s390/cio/device.c +++ b/drivers/s390/cio/device.c | |||
@@ -1519,6 +1519,7 @@ static int ccw_device_console_enable(struct ccw_device *cdev, | |||
1519 | sch->driver = &io_subchannel_driver; | 1519 | sch->driver = &io_subchannel_driver; |
1520 | /* Initialize the ccw_device structure. */ | 1520 | /* Initialize the ccw_device structure. */ |
1521 | cdev->dev.parent= &sch->dev; | 1521 | cdev->dev.parent= &sch->dev; |
1522 | sch_set_cdev(sch, cdev); | ||
1522 | io_subchannel_recog(cdev, sch); | 1523 | io_subchannel_recog(cdev, sch); |
1523 | /* Now wait for the async. recognition to come to an end. */ | 1524 | /* Now wait for the async. recognition to come to an end. */ |
1524 | spin_lock_irq(cdev->ccwlock); | 1525 | spin_lock_irq(cdev->ccwlock); |
diff --git a/drivers/s390/cio/device_pgid.c b/drivers/s390/cio/device_pgid.c index aad188e43b4f..6facb5499a65 100644 --- a/drivers/s390/cio/device_pgid.c +++ b/drivers/s390/cio/device_pgid.c | |||
@@ -142,7 +142,7 @@ static void spid_do(struct ccw_device *cdev) | |||
142 | u8 fn; | 142 | u8 fn; |
143 | 143 | ||
144 | /* Use next available path that is not already in correct state. */ | 144 | /* Use next available path that is not already in correct state. */ |
145 | req->lpm = lpm_adjust(req->lpm, sch->schib.pmcw.pam & ~sch->vpm); | 145 | req->lpm = lpm_adjust(req->lpm, cdev->private->pgid_todo_mask); |
146 | if (!req->lpm) | 146 | if (!req->lpm) |
147 | goto out_nopath; | 147 | goto out_nopath; |
148 | /* Channel program setup. */ | 148 | /* Channel program setup. */ |
@@ -254,15 +254,15 @@ static void pgid_analyze(struct ccw_device *cdev, struct pgid **p, | |||
254 | *p = first; | 254 | *p = first; |
255 | } | 255 | } |
256 | 256 | ||
257 | static u8 pgid_to_vpm(struct ccw_device *cdev) | 257 | static u8 pgid_to_donepm(struct ccw_device *cdev) |
258 | { | 258 | { |
259 | struct subchannel *sch = to_subchannel(cdev->dev.parent); | 259 | struct subchannel *sch = to_subchannel(cdev->dev.parent); |
260 | struct pgid *pgid; | 260 | struct pgid *pgid; |
261 | int i; | 261 | int i; |
262 | int lpm; | 262 | int lpm; |
263 | u8 vpm = 0; | 263 | u8 donepm = 0; |
264 | 264 | ||
265 | /* Set VPM bits for paths which are already in the target state. */ | 265 | /* Set bits for paths which are already in the target state. */ |
266 | for (i = 0; i < 8; i++) { | 266 | for (i = 0; i < 8; i++) { |
267 | lpm = 0x80 >> i; | 267 | lpm = 0x80 >> i; |
268 | if ((cdev->private->pgid_valid_mask & lpm) == 0) | 268 | if ((cdev->private->pgid_valid_mask & lpm) == 0) |
@@ -282,10 +282,10 @@ static u8 pgid_to_vpm(struct ccw_device *cdev) | |||
282 | if (pgid->inf.ps.state3 != SNID_STATE3_SINGLE_PATH) | 282 | if (pgid->inf.ps.state3 != SNID_STATE3_SINGLE_PATH) |
283 | continue; | 283 | continue; |
284 | } | 284 | } |
285 | vpm |= lpm; | 285 | donepm |= lpm; |
286 | } | 286 | } |
287 | 287 | ||
288 | return vpm; | 288 | return donepm; |
289 | } | 289 | } |
290 | 290 | ||
291 | static void pgid_fill(struct ccw_device *cdev, struct pgid *pgid) | 291 | static void pgid_fill(struct ccw_device *cdev, struct pgid *pgid) |
@@ -307,6 +307,7 @@ static void snid_done(struct ccw_device *cdev, int rc) | |||
307 | int mismatch = 0; | 307 | int mismatch = 0; |
308 | int reserved = 0; | 308 | int reserved = 0; |
309 | int reset = 0; | 309 | int reset = 0; |
310 | u8 donepm; | ||
310 | 311 | ||
311 | if (rc) | 312 | if (rc) |
312 | goto out; | 313 | goto out; |
@@ -316,18 +317,20 @@ static void snid_done(struct ccw_device *cdev, int rc) | |||
316 | else if (mismatch) | 317 | else if (mismatch) |
317 | rc = -EOPNOTSUPP; | 318 | rc = -EOPNOTSUPP; |
318 | else { | 319 | else { |
319 | sch->vpm = pgid_to_vpm(cdev); | 320 | donepm = pgid_to_donepm(cdev); |
321 | sch->vpm = donepm & sch->opm; | ||
322 | cdev->private->pgid_todo_mask &= ~donepm; | ||
320 | pgid_fill(cdev, pgid); | 323 | pgid_fill(cdev, pgid); |
321 | } | 324 | } |
322 | out: | 325 | out: |
323 | CIO_MSG_EVENT(2, "snid: device 0.%x.%04x: rc=%d pvm=%02x vpm=%02x " | 326 | CIO_MSG_EVENT(2, "snid: device 0.%x.%04x: rc=%d pvm=%02x vpm=%02x " |
324 | "mism=%d rsvd=%d reset=%d\n", id->ssid, id->devno, rc, | 327 | "todo=%02x mism=%d rsvd=%d reset=%d\n", id->ssid, |
325 | cdev->private->pgid_valid_mask, sch->vpm, mismatch, | 328 | id->devno, rc, cdev->private->pgid_valid_mask, sch->vpm, |
326 | reserved, reset); | 329 | cdev->private->pgid_todo_mask, mismatch, reserved, reset); |
327 | switch (rc) { | 330 | switch (rc) { |
328 | case 0: | 331 | case 0: |
329 | /* Anything left to do? */ | 332 | /* Anything left to do? */ |
330 | if (sch->vpm == sch->schib.pmcw.pam) { | 333 | if (cdev->private->pgid_todo_mask == 0) { |
331 | verify_done(cdev, sch->vpm == 0 ? -EACCES : 0); | 334 | verify_done(cdev, sch->vpm == 0 ? -EACCES : 0); |
332 | return; | 335 | return; |
333 | } | 336 | } |
@@ -411,6 +414,7 @@ static void verify_start(struct ccw_device *cdev) | |||
411 | struct ccw_dev_id *devid = &cdev->private->dev_id; | 414 | struct ccw_dev_id *devid = &cdev->private->dev_id; |
412 | 415 | ||
413 | sch->vpm = 0; | 416 | sch->vpm = 0; |
417 | sch->lpm = sch->schib.pmcw.pam; | ||
414 | /* Initialize request data. */ | 418 | /* Initialize request data. */ |
415 | memset(req, 0, sizeof(*req)); | 419 | memset(req, 0, sizeof(*req)); |
416 | req->timeout = PGID_TIMEOUT; | 420 | req->timeout = PGID_TIMEOUT; |
@@ -442,11 +446,14 @@ static void verify_start(struct ccw_device *cdev) | |||
442 | */ | 446 | */ |
443 | void ccw_device_verify_start(struct ccw_device *cdev) | 447 | void ccw_device_verify_start(struct ccw_device *cdev) |
444 | { | 448 | { |
449 | struct subchannel *sch = to_subchannel(cdev->dev.parent); | ||
450 | |||
445 | CIO_TRACE_EVENT(4, "vrfy"); | 451 | CIO_TRACE_EVENT(4, "vrfy"); |
446 | CIO_HEX_EVENT(4, &cdev->private->dev_id, sizeof(cdev->private->dev_id)); | 452 | CIO_HEX_EVENT(4, &cdev->private->dev_id, sizeof(cdev->private->dev_id)); |
447 | /* Initialize PGID data. */ | 453 | /* Initialize PGID data. */ |
448 | memset(cdev->private->pgid, 0, sizeof(cdev->private->pgid)); | 454 | memset(cdev->private->pgid, 0, sizeof(cdev->private->pgid)); |
449 | cdev->private->pgid_valid_mask = 0; | 455 | cdev->private->pgid_valid_mask = 0; |
456 | cdev->private->pgid_todo_mask = sch->schib.pmcw.pam; | ||
450 | /* | 457 | /* |
451 | * Initialize pathgroup and multipath state with target values. | 458 | * Initialize pathgroup and multipath state with target values. |
452 | * They may change in the course of path verification. | 459 | * They may change in the course of path verification. |
diff --git a/drivers/s390/cio/fcx.c b/drivers/s390/cio/fcx.c index 61677dfbdc9b..ca5e9bb9d458 100644 --- a/drivers/s390/cio/fcx.c +++ b/drivers/s390/cio/fcx.c | |||
@@ -163,7 +163,7 @@ void tcw_finalize(struct tcw *tcw, int num_tidaws) | |||
163 | /* Add tcat to tccb. */ | 163 | /* Add tcat to tccb. */ |
164 | tccb = tcw_get_tccb(tcw); | 164 | tccb = tcw_get_tccb(tcw); |
165 | tcat = (struct tccb_tcat *) &tccb->tca[tca_size(tccb)]; | 165 | tcat = (struct tccb_tcat *) &tccb->tca[tca_size(tccb)]; |
166 | memset(tcat, 0, sizeof(tcat)); | 166 | memset(tcat, 0, sizeof(*tcat)); |
167 | /* Calculate tcw input/output count and tcat transport count. */ | 167 | /* Calculate tcw input/output count and tcat transport count. */ |
168 | count = calc_dcw_count(tccb); | 168 | count = calc_dcw_count(tccb); |
169 | if (tcw->w && (tcw->flags & TCW_FLAGS_OUTPUT_TIDA)) | 169 | if (tcw->w && (tcw->flags & TCW_FLAGS_OUTPUT_TIDA)) |
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(tccb_init); | |||
269 | */ | 269 | */ |
270 | void tsb_init(struct tsb *tsb) | 270 | void tsb_init(struct tsb *tsb) |
271 | { | 271 | { |
272 | memset(tsb, 0, sizeof(tsb)); | 272 | memset(tsb, 0, sizeof(*tsb)); |
273 | } | 273 | } |
274 | EXPORT_SYMBOL(tsb_init); | 274 | EXPORT_SYMBOL(tsb_init); |
275 | 275 | ||
diff --git a/drivers/s390/cio/io_sch.h b/drivers/s390/cio/io_sch.h index d72ae4c93af9..b9ce712a7f25 100644 --- a/drivers/s390/cio/io_sch.h +++ b/drivers/s390/cio/io_sch.h | |||
@@ -150,6 +150,7 @@ struct ccw_device_private { | |||
150 | struct ccw_request req; /* internal I/O request */ | 150 | struct ccw_request req; /* internal I/O request */ |
151 | int iretry; | 151 | int iretry; |
152 | u8 pgid_valid_mask; /* mask of valid PGIDs */ | 152 | u8 pgid_valid_mask; /* mask of valid PGIDs */ |
153 | u8 pgid_todo_mask; /* mask of PGIDs to be adjusted */ | ||
153 | struct { | 154 | struct { |
154 | unsigned int fast:1; /* post with "channel end" */ | 155 | unsigned int fast:1; /* post with "channel end" */ |
155 | unsigned int repall:1; /* report every interrupt status */ | 156 | unsigned int repall:1; /* report every interrupt status */ |
diff --git a/drivers/s390/cio/qdio_main.c b/drivers/s390/cio/qdio_main.c index 4be6e84b9599..b2275c5000e7 100644 --- a/drivers/s390/cio/qdio_main.c +++ b/drivers/s390/cio/qdio_main.c | |||
@@ -486,7 +486,8 @@ static int get_inbound_buffer_frontier(struct qdio_q *q) | |||
486 | case SLSB_P_INPUT_PRIMED: | 486 | case SLSB_P_INPUT_PRIMED: |
487 | inbound_primed(q, count); | 487 | inbound_primed(q, count); |
488 | q->first_to_check = add_buf(q->first_to_check, count); | 488 | q->first_to_check = add_buf(q->first_to_check, count); |
489 | atomic_sub(count, &q->nr_buf_used); | 489 | if (atomic_sub(count, &q->nr_buf_used) == 0) |
490 | qdio_perf_stat_inc(&perf_stats.inbound_queue_full); | ||
490 | break; | 491 | break; |
491 | case SLSB_P_INPUT_ERROR: | 492 | case SLSB_P_INPUT_ERROR: |
492 | announce_buffer_error(q, count); | 493 | announce_buffer_error(q, count); |
diff --git a/drivers/s390/cio/qdio_perf.c b/drivers/s390/cio/qdio_perf.c index 968e3c7c2632..54f7c325a3e6 100644 --- a/drivers/s390/cio/qdio_perf.c +++ b/drivers/s390/cio/qdio_perf.c | |||
@@ -64,6 +64,8 @@ static int qdio_perf_proc_show(struct seq_file *m, void *v) | |||
64 | (long)atomic_long_read(&perf_stats.fast_requeue)); | 64 | (long)atomic_long_read(&perf_stats.fast_requeue)); |
65 | seq_printf(m, "Number of outbound target full condition\t: %li\n", | 65 | seq_printf(m, "Number of outbound target full condition\t: %li\n", |
66 | (long)atomic_long_read(&perf_stats.outbound_target_full)); | 66 | (long)atomic_long_read(&perf_stats.outbound_target_full)); |
67 | seq_printf(m, "Number of inbound queue full condition\t\t: %li\n", | ||
68 | (long)atomic_long_read(&perf_stats.inbound_queue_full)); | ||
67 | seq_printf(m, "Number of outbound tasklet mod_timer calls\t: %li\n", | 69 | seq_printf(m, "Number of outbound tasklet mod_timer calls\t: %li\n", |
68 | (long)atomic_long_read(&perf_stats.debug_tl_out_timer)); | 70 | (long)atomic_long_read(&perf_stats.debug_tl_out_timer)); |
69 | seq_printf(m, "Number of stop polling calls\t\t\t: %li\n", | 71 | seq_printf(m, "Number of stop polling calls\t\t\t: %li\n", |
diff --git a/drivers/s390/cio/qdio_perf.h b/drivers/s390/cio/qdio_perf.h index ff4504ce1e3c..12454231dc8b 100644 --- a/drivers/s390/cio/qdio_perf.h +++ b/drivers/s390/cio/qdio_perf.h | |||
@@ -36,6 +36,7 @@ struct qdio_perf_stats { | |||
36 | atomic_long_t outbound_handler; | 36 | atomic_long_t outbound_handler; |
37 | atomic_long_t fast_requeue; | 37 | atomic_long_t fast_requeue; |
38 | atomic_long_t outbound_target_full; | 38 | atomic_long_t outbound_target_full; |
39 | atomic_long_t inbound_queue_full; | ||
39 | 40 | ||
40 | /* for debugging */ | 41 | /* for debugging */ |
41 | atomic_long_t debug_tl_out_timer; | 42 | atomic_long_t debug_tl_out_timer; |
diff --git a/drivers/s390/cio/qdio_setup.c b/drivers/s390/cio/qdio_setup.c index 18d54fc21ce9..8c2dea5fa2b4 100644 --- a/drivers/s390/cio/qdio_setup.c +++ b/drivers/s390/cio/qdio_setup.c | |||
@@ -48,7 +48,6 @@ static void set_impl_params(struct qdio_irq *irq_ptr, | |||
48 | if (!irq_ptr) | 48 | if (!irq_ptr) |
49 | return; | 49 | return; |
50 | 50 | ||
51 | WARN_ON((unsigned long)&irq_ptr->qib & 0xff); | ||
52 | irq_ptr->qib.pfmt = qib_param_field_format; | 51 | irq_ptr->qib.pfmt = qib_param_field_format; |
53 | if (qib_param_field) | 52 | if (qib_param_field) |
54 | memcpy(irq_ptr->qib.parm, qib_param_field, | 53 | memcpy(irq_ptr->qib.parm, qib_param_field, |
@@ -82,14 +81,12 @@ static int __qdio_allocate_qs(struct qdio_q **irq_ptr_qs, int nr_queues) | |||
82 | q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL); | 81 | q = kmem_cache_alloc(qdio_q_cache, GFP_KERNEL); |
83 | if (!q) | 82 | if (!q) |
84 | return -ENOMEM; | 83 | return -ENOMEM; |
85 | WARN_ON((unsigned long)q & 0xff); | ||
86 | 84 | ||
87 | q->slib = (struct slib *) __get_free_page(GFP_KERNEL); | 85 | q->slib = (struct slib *) __get_free_page(GFP_KERNEL); |
88 | if (!q->slib) { | 86 | if (!q->slib) { |
89 | kmem_cache_free(qdio_q_cache, q); | 87 | kmem_cache_free(qdio_q_cache, q); |
90 | return -ENOMEM; | 88 | return -ENOMEM; |
91 | } | 89 | } |
92 | WARN_ON((unsigned long)q->slib & 0x7ff); | ||
93 | irq_ptr_qs[i] = q; | 90 | irq_ptr_qs[i] = q; |
94 | } | 91 | } |
95 | return 0; | 92 | return 0; |
@@ -131,7 +128,7 @@ static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr, | |||
131 | /* fill in sbal */ | 128 | /* fill in sbal */ |
132 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) { | 129 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) { |
133 | q->sbal[j] = *sbals_array++; | 130 | q->sbal[j] = *sbals_array++; |
134 | WARN_ON((unsigned long)q->sbal[j] & 0xff); | 131 | BUG_ON((unsigned long)q->sbal[j] & 0xff); |
135 | } | 132 | } |
136 | 133 | ||
137 | /* fill in slib */ | 134 | /* fill in slib */ |
@@ -147,11 +144,6 @@ static void setup_storage_lists(struct qdio_q *q, struct qdio_irq *irq_ptr, | |||
147 | /* fill in sl */ | 144 | /* fill in sl */ |
148 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) | 145 | for (j = 0; j < QDIO_MAX_BUFFERS_PER_Q; j++) |
149 | q->sl->element[j].sbal = (unsigned long)q->sbal[j]; | 146 | q->sl->element[j].sbal = (unsigned long)q->sbal[j]; |
150 | |||
151 | DBF_EVENT("sl-slsb-sbal"); | ||
152 | DBF_HEX(q->sl, sizeof(void *)); | ||
153 | DBF_HEX(&q->slsb, sizeof(void *)); | ||
154 | DBF_HEX(q->sbal, sizeof(void *)); | ||
155 | } | 147 | } |
156 | 148 | ||
157 | static void setup_queues(struct qdio_irq *irq_ptr, | 149 | static void setup_queues(struct qdio_irq *irq_ptr, |
diff --git a/drivers/scsi/3w-9xxx.c b/drivers/scsi/3w-9xxx.c index 3bf75924741f..84d3bbaa95e7 100644 --- a/drivers/scsi/3w-9xxx.c +++ b/drivers/scsi/3w-9xxx.c | |||
@@ -76,6 +76,7 @@ | |||
76 | Fix bug in twa_get_param() on 4GB+. | 76 | Fix bug in twa_get_param() on 4GB+. |
77 | Use pci_resource_len() for ioremap(). | 77 | Use pci_resource_len() for ioremap(). |
78 | 2.26.02.012 - Add power management support. | 78 | 2.26.02.012 - Add power management support. |
79 | 2.26.02.013 - Fix bug in twa_load_sgl(). | ||
79 | */ | 80 | */ |
80 | 81 | ||
81 | #include <linux/module.h> | 82 | #include <linux/module.h> |
@@ -100,7 +101,7 @@ | |||
100 | #include "3w-9xxx.h" | 101 | #include "3w-9xxx.h" |
101 | 102 | ||
102 | /* Globals */ | 103 | /* Globals */ |
103 | #define TW_DRIVER_VERSION "2.26.02.012" | 104 | #define TW_DRIVER_VERSION "2.26.02.013" |
104 | static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT]; | 105 | static TW_Device_Extension *twa_device_extension_list[TW_MAX_SLOT]; |
105 | static unsigned int twa_device_extension_count; | 106 | static unsigned int twa_device_extension_count; |
106 | static int twa_major = -1; | 107 | static int twa_major = -1; |
@@ -1382,10 +1383,12 @@ static void twa_load_sgl(TW_Device_Extension *tw_dev, TW_Command_Full *full_comm | |||
1382 | newcommand = &full_command_packet->command.newcommand; | 1383 | newcommand = &full_command_packet->command.newcommand; |
1383 | newcommand->request_id__lunl = | 1384 | newcommand->request_id__lunl = |
1384 | cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->request_id__lunl), request_id)); | 1385 | cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->request_id__lunl), request_id)); |
1385 | newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1); | 1386 | if (length) { |
1386 | newcommand->sg_list[0].length = cpu_to_le32(length); | 1387 | newcommand->sg_list[0].address = TW_CPU_TO_SGL(dma_handle + sizeof(TW_Ioctl_Buf_Apache) - 1); |
1388 | newcommand->sg_list[0].length = cpu_to_le32(length); | ||
1389 | } | ||
1387 | newcommand->sgl_entries__lunh = | 1390 | newcommand->sgl_entries__lunh = |
1388 | cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->sgl_entries__lunh), 1)); | 1391 | cpu_to_le16(TW_REQ_LUN_IN(TW_LUN_OUT(newcommand->sgl_entries__lunh), length ? 1 : 0)); |
1389 | } else { | 1392 | } else { |
1390 | oldcommand = &full_command_packet->command.oldcommand; | 1393 | oldcommand = &full_command_packet->command.oldcommand; |
1391 | oldcommand->request_id = request_id; | 1394 | oldcommand->request_id = request_id; |
diff --git a/drivers/scsi/Kconfig b/drivers/scsi/Kconfig index 36900c71a592..9191d1ea6451 100644 --- a/drivers/scsi/Kconfig +++ b/drivers/scsi/Kconfig | |||
@@ -388,6 +388,16 @@ config BLK_DEV_3W_XXXX_RAID | |||
388 | Please read the comments at the top of | 388 | Please read the comments at the top of |
389 | <file:drivers/scsi/3w-xxxx.c>. | 389 | <file:drivers/scsi/3w-xxxx.c>. |
390 | 390 | ||
391 | config SCSI_HPSA | ||
392 | tristate "HP Smart Array SCSI driver" | ||
393 | depends on PCI && SCSI | ||
394 | help | ||
395 | This driver supports HP Smart Array Controllers (circa 2009). | ||
396 | It is a SCSI alternative to the cciss driver, which is a block | ||
397 | driver. Anyone wishing to use HP Smart Array controllers who | ||
398 | would prefer the devices be presented to linux as SCSI devices, | ||
399 | rather than as generic block devices should say Y here. | ||
400 | |||
391 | config SCSI_3W_9XXX | 401 | config SCSI_3W_9XXX |
392 | tristate "3ware 9xxx SATA-RAID support" | 402 | tristate "3ware 9xxx SATA-RAID support" |
393 | depends on PCI && SCSI | 403 | depends on PCI && SCSI |
diff --git a/drivers/scsi/Makefile b/drivers/scsi/Makefile index 280d3c657d60..92a8c500b23d 100644 --- a/drivers/scsi/Makefile +++ b/drivers/scsi/Makefile | |||
@@ -91,6 +91,7 @@ obj-$(CONFIG_SCSI_BFA_FC) += bfa/ | |||
91 | obj-$(CONFIG_SCSI_PAS16) += pas16.o | 91 | obj-$(CONFIG_SCSI_PAS16) += pas16.o |
92 | obj-$(CONFIG_SCSI_T128) += t128.o | 92 | obj-$(CONFIG_SCSI_T128) += t128.o |
93 | obj-$(CONFIG_SCSI_DMX3191D) += dmx3191d.o | 93 | obj-$(CONFIG_SCSI_DMX3191D) += dmx3191d.o |
94 | obj-$(CONFIG_SCSI_HPSA) += hpsa.o | ||
94 | obj-$(CONFIG_SCSI_DTC3280) += dtc.o | 95 | obj-$(CONFIG_SCSI_DTC3280) += dtc.o |
95 | obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/ | 96 | obj-$(CONFIG_SCSI_SYM53C8XX_2) += sym53c8xx_2/ |
96 | obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o | 97 | obj-$(CONFIG_SCSI_ZALON) += zalon7xx.o |
diff --git a/drivers/scsi/be2iscsi/be_cmds.c b/drivers/scsi/be2iscsi/be_cmds.c index 698a527d6cca..f008708f1b08 100644 --- a/drivers/scsi/be2iscsi/be_cmds.c +++ b/drivers/scsi/be2iscsi/be_cmds.c | |||
@@ -135,11 +135,15 @@ int beiscsi_process_mcc(struct beiscsi_hba *phba) | |||
135 | while ((compl = be_mcc_compl_get(phba))) { | 135 | while ((compl = be_mcc_compl_get(phba))) { |
136 | if (compl->flags & CQE_FLAGS_ASYNC_MASK) { | 136 | if (compl->flags & CQE_FLAGS_ASYNC_MASK) { |
137 | /* Interpret flags as an async trailer */ | 137 | /* Interpret flags as an async trailer */ |
138 | BUG_ON(!is_link_state_evt(compl->flags)); | 138 | if (is_link_state_evt(compl->flags)) |
139 | /* Interpret compl as a async link evt */ | ||
140 | beiscsi_async_link_state_process(phba, | ||
141 | (struct be_async_event_link_state *) compl); | ||
142 | else | ||
143 | SE_DEBUG(DBG_LVL_1, | ||
144 | " Unsupported Async Event, flags" | ||
145 | " = 0x%08x \n", compl->flags); | ||
139 | 146 | ||
140 | /* Interpret compl as a async link evt */ | ||
141 | beiscsi_async_link_state_process(phba, | ||
142 | (struct be_async_event_link_state *) compl); | ||
143 | } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { | 147 | } else if (compl->flags & CQE_FLAGS_COMPLETED_MASK) { |
144 | status = be_mcc_compl_process(ctrl, compl); | 148 | status = be_mcc_compl_process(ctrl, compl); |
145 | atomic_dec(&phba->ctrl.mcc_obj.q.used); | 149 | atomic_dec(&phba->ctrl.mcc_obj.q.used); |
diff --git a/drivers/scsi/bnx2i/bnx2i.h b/drivers/scsi/bnx2i/bnx2i.h index 2b973f3c2eb2..6cf9dc37d78b 100644 --- a/drivers/scsi/bnx2i/bnx2i.h +++ b/drivers/scsi/bnx2i/bnx2i.h | |||
@@ -684,6 +684,7 @@ extern unsigned int error_mask1, error_mask2; | |||
684 | extern u64 iscsi_error_mask; | 684 | extern u64 iscsi_error_mask; |
685 | extern unsigned int en_tcp_dack; | 685 | extern unsigned int en_tcp_dack; |
686 | extern unsigned int event_coal_div; | 686 | extern unsigned int event_coal_div; |
687 | extern unsigned int event_coal_min; | ||
687 | 688 | ||
688 | extern struct scsi_transport_template *bnx2i_scsi_xport_template; | 689 | extern struct scsi_transport_template *bnx2i_scsi_xport_template; |
689 | extern struct iscsi_transport bnx2i_iscsi_transport; | 690 | extern struct iscsi_transport bnx2i_iscsi_transport; |
diff --git a/drivers/scsi/bnx2i/bnx2i_hwi.c b/drivers/scsi/bnx2i/bnx2i_hwi.c index 5c8d7630c13e..1af578dec276 100644 --- a/drivers/scsi/bnx2i/bnx2i_hwi.c +++ b/drivers/scsi/bnx2i/bnx2i_hwi.c | |||
@@ -133,20 +133,38 @@ void bnx2i_arm_cq_event_coalescing(struct bnx2i_endpoint *ep, u8 action) | |||
133 | { | 133 | { |
134 | struct bnx2i_5771x_cq_db *cq_db; | 134 | struct bnx2i_5771x_cq_db *cq_db; |
135 | u16 cq_index; | 135 | u16 cq_index; |
136 | u16 next_index; | ||
137 | u32 num_active_cmds; | ||
136 | 138 | ||
139 | |||
140 | /* Coalesce CQ entries only on 10G devices */ | ||
137 | if (!test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type)) | 141 | if (!test_bit(BNX2I_NX2_DEV_57710, &ep->hba->cnic_dev_type)) |
138 | return; | 142 | return; |
139 | 143 | ||
144 | /* Do not update CQ DB multiple times before firmware writes | ||
145 | * '0xFFFF' to CQDB->SQN field. Deviation may cause spurious | ||
146 | * interrupts and other unwanted results | ||
147 | */ | ||
148 | cq_db = (struct bnx2i_5771x_cq_db *) ep->qp.cq_pgtbl_virt; | ||
149 | if (cq_db->sqn[0] && cq_db->sqn[0] != 0xFFFF) | ||
150 | return; | ||
151 | |||
140 | if (action == CNIC_ARM_CQE) { | 152 | if (action == CNIC_ARM_CQE) { |
141 | cq_index = ep->qp.cqe_exp_seq_sn + | 153 | num_active_cmds = ep->num_active_cmds; |
142 | ep->num_active_cmds / event_coal_div; | 154 | if (num_active_cmds <= event_coal_min) |
143 | cq_index %= (ep->qp.cqe_size * 2 + 1); | 155 | next_index = 1; |
144 | if (!cq_index) { | 156 | else |
157 | next_index = event_coal_min + | ||
158 | (num_active_cmds - event_coal_min) / event_coal_div; | ||
159 | if (!next_index) | ||
160 | next_index = 1; | ||
161 | cq_index = ep->qp.cqe_exp_seq_sn + next_index - 1; | ||
162 | if (cq_index > ep->qp.cqe_size * 2) | ||
163 | cq_index -= ep->qp.cqe_size * 2; | ||
164 | if (!cq_index) | ||
145 | cq_index = 1; | 165 | cq_index = 1; |
146 | cq_db = (struct bnx2i_5771x_cq_db *) | 166 | |
147 | ep->qp.cq_pgtbl_virt; | 167 | cq_db->sqn[0] = cq_index; |
148 | cq_db->sqn[0] = cq_index; | ||
149 | } | ||
150 | } | 168 | } |
151 | } | 169 | } |
152 | 170 | ||
@@ -366,6 +384,7 @@ int bnx2i_send_iscsi_tmf(struct bnx2i_conn *bnx2i_conn, | |||
366 | struct bnx2i_cmd *bnx2i_cmd; | 384 | struct bnx2i_cmd *bnx2i_cmd; |
367 | struct bnx2i_tmf_request *tmfabort_wqe; | 385 | struct bnx2i_tmf_request *tmfabort_wqe; |
368 | u32 dword; | 386 | u32 dword; |
387 | u32 scsi_lun[2]; | ||
369 | 388 | ||
370 | bnx2i_cmd = (struct bnx2i_cmd *)mtask->dd_data; | 389 | bnx2i_cmd = (struct bnx2i_cmd *)mtask->dd_data; |
371 | tmfabort_hdr = (struct iscsi_tm *)mtask->hdr; | 390 | tmfabort_hdr = (struct iscsi_tm *)mtask->hdr; |
@@ -376,27 +395,35 @@ int bnx2i_send_iscsi_tmf(struct bnx2i_conn *bnx2i_conn, | |||
376 | tmfabort_wqe->op_attr = 0; | 395 | tmfabort_wqe->op_attr = 0; |
377 | tmfabort_wqe->op_attr = | 396 | tmfabort_wqe->op_attr = |
378 | ISCSI_TMF_REQUEST_ALWAYS_ONE | ISCSI_TM_FUNC_ABORT_TASK; | 397 | ISCSI_TMF_REQUEST_ALWAYS_ONE | ISCSI_TM_FUNC_ABORT_TASK; |
379 | tmfabort_wqe->lun[0] = be32_to_cpu(tmfabort_hdr->lun[0]); | ||
380 | tmfabort_wqe->lun[1] = be32_to_cpu(tmfabort_hdr->lun[1]); | ||
381 | 398 | ||
382 | tmfabort_wqe->itt = (mtask->itt | (ISCSI_TASK_TYPE_MPATH << 14)); | 399 | tmfabort_wqe->itt = (mtask->itt | (ISCSI_TASK_TYPE_MPATH << 14)); |
383 | tmfabort_wqe->reserved2 = 0; | 400 | tmfabort_wqe->reserved2 = 0; |
384 | tmfabort_wqe->cmd_sn = be32_to_cpu(tmfabort_hdr->cmdsn); | 401 | tmfabort_wqe->cmd_sn = be32_to_cpu(tmfabort_hdr->cmdsn); |
385 | 402 | ||
386 | ctask = iscsi_itt_to_task(conn, tmfabort_hdr->rtt); | 403 | ctask = iscsi_itt_to_task(conn, tmfabort_hdr->rtt); |
387 | if (!ctask || ctask->sc) | 404 | if (!ctask || !ctask->sc) |
388 | /* | 405 | /* |
389 | * the iscsi layer must have completed the cmd while this | 406 | * the iscsi layer must have completed the cmd while this |
390 | * was starting up. | 407 | * was starting up. |
408 | * | ||
409 | * Note: In the case of a SCSI cmd timeout, the task's sc | ||
410 | * is still active; hence ctask->sc != 0 | ||
411 | * In this case, the task must be aborted | ||
391 | */ | 412 | */ |
392 | return 0; | 413 | return 0; |
414 | |||
393 | ref_sc = ctask->sc; | 415 | ref_sc = ctask->sc; |
394 | 416 | ||
417 | /* Retrieve LUN directly from the ref_sc */ | ||
418 | int_to_scsilun(ref_sc->device->lun, (struct scsi_lun *) scsi_lun); | ||
419 | tmfabort_wqe->lun[0] = be32_to_cpu(scsi_lun[0]); | ||
420 | tmfabort_wqe->lun[1] = be32_to_cpu(scsi_lun[1]); | ||
421 | |||
395 | if (ref_sc->sc_data_direction == DMA_TO_DEVICE) | 422 | if (ref_sc->sc_data_direction == DMA_TO_DEVICE) |
396 | dword = (ISCSI_TASK_TYPE_WRITE << ISCSI_CMD_REQUEST_TYPE_SHIFT); | 423 | dword = (ISCSI_TASK_TYPE_WRITE << ISCSI_CMD_REQUEST_TYPE_SHIFT); |
397 | else | 424 | else |
398 | dword = (ISCSI_TASK_TYPE_READ << ISCSI_CMD_REQUEST_TYPE_SHIFT); | 425 | dword = (ISCSI_TASK_TYPE_READ << ISCSI_CMD_REQUEST_TYPE_SHIFT); |
399 | tmfabort_wqe->ref_itt = (dword | tmfabort_hdr->rtt); | 426 | tmfabort_wqe->ref_itt = (dword | (tmfabort_hdr->rtt & ISCSI_ITT_MASK)); |
400 | tmfabort_wqe->ref_cmd_sn = be32_to_cpu(tmfabort_hdr->refcmdsn); | 427 | tmfabort_wqe->ref_cmd_sn = be32_to_cpu(tmfabort_hdr->refcmdsn); |
401 | 428 | ||
402 | tmfabort_wqe->bd_list_addr_lo = (u32) bnx2i_conn->hba->mp_bd_dma; | 429 | tmfabort_wqe->bd_list_addr_lo = (u32) bnx2i_conn->hba->mp_bd_dma; |
diff --git a/drivers/scsi/bnx2i/bnx2i_init.c b/drivers/scsi/bnx2i/bnx2i_init.c index 0c4210d48ee8..6d8172e781cf 100644 --- a/drivers/scsi/bnx2i/bnx2i_init.c +++ b/drivers/scsi/bnx2i/bnx2i_init.c | |||
@@ -17,8 +17,8 @@ static struct list_head adapter_list = LIST_HEAD_INIT(adapter_list); | |||
17 | static u32 adapter_count; | 17 | static u32 adapter_count; |
18 | 18 | ||
19 | #define DRV_MODULE_NAME "bnx2i" | 19 | #define DRV_MODULE_NAME "bnx2i" |
20 | #define DRV_MODULE_VERSION "2.0.1e" | 20 | #define DRV_MODULE_VERSION "2.1.0" |
21 | #define DRV_MODULE_RELDATE "June 22, 2009" | 21 | #define DRV_MODULE_RELDATE "Dec 06, 2009" |
22 | 22 | ||
23 | static char version[] __devinitdata = | 23 | static char version[] __devinitdata = |
24 | "Broadcom NetXtreme II iSCSI Driver " DRV_MODULE_NAME \ | 24 | "Broadcom NetXtreme II iSCSI Driver " DRV_MODULE_NAME \ |
@@ -32,6 +32,10 @@ MODULE_VERSION(DRV_MODULE_VERSION); | |||
32 | 32 | ||
33 | static DEFINE_MUTEX(bnx2i_dev_lock); | 33 | static DEFINE_MUTEX(bnx2i_dev_lock); |
34 | 34 | ||
35 | unsigned int event_coal_min = 24; | ||
36 | module_param(event_coal_min, int, 0664); | ||
37 | MODULE_PARM_DESC(event_coal_min, "Event Coalescing Minimum Commands"); | ||
38 | |||
35 | unsigned int event_coal_div = 1; | 39 | unsigned int event_coal_div = 1; |
36 | module_param(event_coal_div, int, 0664); | 40 | module_param(event_coal_div, int, 0664); |
37 | MODULE_PARM_DESC(event_coal_div, "Event Coalescing Divide Factor"); | 41 | MODULE_PARM_DESC(event_coal_div, "Event Coalescing Divide Factor"); |
@@ -83,8 +87,12 @@ void bnx2i_identify_device(struct bnx2i_hba *hba) | |||
83 | set_bit(BNX2I_NX2_DEV_5709, &hba->cnic_dev_type); | 87 | set_bit(BNX2I_NX2_DEV_5709, &hba->cnic_dev_type); |
84 | hba->mail_queue_access = BNX2I_MQ_BIN_MODE; | 88 | hba->mail_queue_access = BNX2I_MQ_BIN_MODE; |
85 | } else if (hba->pci_did == PCI_DEVICE_ID_NX2_57710 || | 89 | } else if (hba->pci_did == PCI_DEVICE_ID_NX2_57710 || |
86 | hba->pci_did == PCI_DEVICE_ID_NX2_57711) | 90 | hba->pci_did == PCI_DEVICE_ID_NX2_57711 || |
91 | hba->pci_did == PCI_DEVICE_ID_NX2_57711E) | ||
87 | set_bit(BNX2I_NX2_DEV_57710, &hba->cnic_dev_type); | 92 | set_bit(BNX2I_NX2_DEV_57710, &hba->cnic_dev_type); |
93 | else | ||
94 | printk(KERN_ALERT "bnx2i: unknown device, 0x%x\n", | ||
95 | hba->pci_did); | ||
88 | } | 96 | } |
89 | 97 | ||
90 | 98 | ||
@@ -363,7 +371,7 @@ static int __init bnx2i_mod_init(void) | |||
363 | 371 | ||
364 | printk(KERN_INFO "%s", version); | 372 | printk(KERN_INFO "%s", version); |
365 | 373 | ||
366 | if (!is_power_of_2(sq_size)) | 374 | if (sq_size && !is_power_of_2(sq_size)) |
367 | sq_size = roundup_pow_of_two(sq_size); | 375 | sq_size = roundup_pow_of_two(sq_size); |
368 | 376 | ||
369 | mutex_init(&bnx2i_dev_lock); | 377 | mutex_init(&bnx2i_dev_lock); |
diff --git a/drivers/scsi/bnx2i/bnx2i_iscsi.c b/drivers/scsi/bnx2i/bnx2i_iscsi.c index 132898c88d5e..33b2294625bb 100644 --- a/drivers/scsi/bnx2i/bnx2i_iscsi.c +++ b/drivers/scsi/bnx2i/bnx2i_iscsi.c | |||
@@ -485,7 +485,6 @@ static int bnx2i_setup_cmd_pool(struct bnx2i_hba *hba, | |||
485 | struct iscsi_task *task = session->cmds[i]; | 485 | struct iscsi_task *task = session->cmds[i]; |
486 | struct bnx2i_cmd *cmd = task->dd_data; | 486 | struct bnx2i_cmd *cmd = task->dd_data; |
487 | 487 | ||
488 | /* Anil */ | ||
489 | task->hdr = &cmd->hdr; | 488 | task->hdr = &cmd->hdr; |
490 | task->hdr_max = sizeof(struct iscsi_hdr); | 489 | task->hdr_max = sizeof(struct iscsi_hdr); |
491 | 490 | ||
@@ -765,7 +764,6 @@ struct bnx2i_hba *bnx2i_alloc_hba(struct cnic_dev *cnic) | |||
765 | hba->pci_svid = hba->pcidev->subsystem_vendor; | 764 | hba->pci_svid = hba->pcidev->subsystem_vendor; |
766 | hba->pci_func = PCI_FUNC(hba->pcidev->devfn); | 765 | hba->pci_func = PCI_FUNC(hba->pcidev->devfn); |
767 | hba->pci_devno = PCI_SLOT(hba->pcidev->devfn); | 766 | hba->pci_devno = PCI_SLOT(hba->pcidev->devfn); |
768 | bnx2i_identify_device(hba); | ||
769 | 767 | ||
770 | bnx2i_identify_device(hba); | 768 | bnx2i_identify_device(hba); |
771 | bnx2i_setup_host_queue_size(hba, shost); | 769 | bnx2i_setup_host_queue_size(hba, shost); |
diff --git a/drivers/scsi/cxgb3i/cxgb3i_offload.c b/drivers/scsi/cxgb3i/cxgb3i_offload.c index c1d5be4adf9c..26ffdcd5a437 100644 --- a/drivers/scsi/cxgb3i/cxgb3i_offload.c +++ b/drivers/scsi/cxgb3i/cxgb3i_offload.c | |||
@@ -291,7 +291,7 @@ static void act_open_req_arp_failure(struct t3cdev *dev, struct sk_buff *skb) | |||
291 | c3cn_hold(c3cn); | 291 | c3cn_hold(c3cn); |
292 | spin_lock_bh(&c3cn->lock); | 292 | spin_lock_bh(&c3cn->lock); |
293 | if (c3cn->state == C3CN_STATE_CONNECTING) | 293 | if (c3cn->state == C3CN_STATE_CONNECTING) |
294 | fail_act_open(c3cn, EHOSTUNREACH); | 294 | fail_act_open(c3cn, -EHOSTUNREACH); |
295 | spin_unlock_bh(&c3cn->lock); | 295 | spin_unlock_bh(&c3cn->lock); |
296 | c3cn_put(c3cn); | 296 | c3cn_put(c3cn); |
297 | __kfree_skb(skb); | 297 | __kfree_skb(skb); |
@@ -792,18 +792,18 @@ static int act_open_rpl_status_to_errno(int status) | |||
792 | { | 792 | { |
793 | switch (status) { | 793 | switch (status) { |
794 | case CPL_ERR_CONN_RESET: | 794 | case CPL_ERR_CONN_RESET: |
795 | return ECONNREFUSED; | 795 | return -ECONNREFUSED; |
796 | case CPL_ERR_ARP_MISS: | 796 | case CPL_ERR_ARP_MISS: |
797 | return EHOSTUNREACH; | 797 | return -EHOSTUNREACH; |
798 | case CPL_ERR_CONN_TIMEDOUT: | 798 | case CPL_ERR_CONN_TIMEDOUT: |
799 | return ETIMEDOUT; | 799 | return -ETIMEDOUT; |
800 | case CPL_ERR_TCAM_FULL: | 800 | case CPL_ERR_TCAM_FULL: |
801 | return ENOMEM; | 801 | return -ENOMEM; |
802 | case CPL_ERR_CONN_EXIST: | 802 | case CPL_ERR_CONN_EXIST: |
803 | cxgb3i_log_error("ACTIVE_OPEN_RPL: 4-tuple in use\n"); | 803 | cxgb3i_log_error("ACTIVE_OPEN_RPL: 4-tuple in use\n"); |
804 | return EADDRINUSE; | 804 | return -EADDRINUSE; |
805 | default: | 805 | default: |
806 | return EIO; | 806 | return -EIO; |
807 | } | 807 | } |
808 | } | 808 | } |
809 | 809 | ||
@@ -817,7 +817,7 @@ static void act_open_retry_timer(unsigned long data) | |||
817 | spin_lock_bh(&c3cn->lock); | 817 | spin_lock_bh(&c3cn->lock); |
818 | skb = alloc_skb(sizeof(struct cpl_act_open_req), GFP_ATOMIC); | 818 | skb = alloc_skb(sizeof(struct cpl_act_open_req), GFP_ATOMIC); |
819 | if (!skb) | 819 | if (!skb) |
820 | fail_act_open(c3cn, ENOMEM); | 820 | fail_act_open(c3cn, -ENOMEM); |
821 | else { | 821 | else { |
822 | skb->sk = (struct sock *)c3cn; | 822 | skb->sk = (struct sock *)c3cn; |
823 | set_arp_failure_handler(skb, act_open_req_arp_failure); | 823 | set_arp_failure_handler(skb, act_open_req_arp_failure); |
@@ -966,14 +966,14 @@ static int abort_status_to_errno(struct s3_conn *c3cn, int abort_reason, | |||
966 | case CPL_ERR_BAD_SYN: /* fall through */ | 966 | case CPL_ERR_BAD_SYN: /* fall through */ |
967 | case CPL_ERR_CONN_RESET: | 967 | case CPL_ERR_CONN_RESET: |
968 | return c3cn->state > C3CN_STATE_ESTABLISHED ? | 968 | return c3cn->state > C3CN_STATE_ESTABLISHED ? |
969 | EPIPE : ECONNRESET; | 969 | -EPIPE : -ECONNRESET; |
970 | case CPL_ERR_XMIT_TIMEDOUT: | 970 | case CPL_ERR_XMIT_TIMEDOUT: |
971 | case CPL_ERR_PERSIST_TIMEDOUT: | 971 | case CPL_ERR_PERSIST_TIMEDOUT: |
972 | case CPL_ERR_FINWAIT2_TIMEDOUT: | 972 | case CPL_ERR_FINWAIT2_TIMEDOUT: |
973 | case CPL_ERR_KEEPALIVE_TIMEDOUT: | 973 | case CPL_ERR_KEEPALIVE_TIMEDOUT: |
974 | return ETIMEDOUT; | 974 | return -ETIMEDOUT; |
975 | default: | 975 | default: |
976 | return EIO; | 976 | return -EIO; |
977 | } | 977 | } |
978 | } | 978 | } |
979 | 979 | ||
@@ -1563,7 +1563,7 @@ free_tid: | |||
1563 | s3_free_atid(cdev, c3cn->tid); | 1563 | s3_free_atid(cdev, c3cn->tid); |
1564 | c3cn->tid = 0; | 1564 | c3cn->tid = 0; |
1565 | out_err: | 1565 | out_err: |
1566 | return -1; | 1566 | return -EINVAL; |
1567 | } | 1567 | } |
1568 | 1568 | ||
1569 | 1569 | ||
diff --git a/drivers/scsi/cxgb3i/cxgb3i_pdu.c b/drivers/scsi/cxgb3i/cxgb3i_pdu.c index 709105071177..1fe3b0f1f3c9 100644 --- a/drivers/scsi/cxgb3i/cxgb3i_pdu.c +++ b/drivers/scsi/cxgb3i/cxgb3i_pdu.c | |||
@@ -388,8 +388,8 @@ int cxgb3i_conn_xmit_pdu(struct iscsi_task *task) | |||
388 | if (err > 0) { | 388 | if (err > 0) { |
389 | int pdulen = err; | 389 | int pdulen = err; |
390 | 390 | ||
391 | cxgb3i_tx_debug("task 0x%p, skb 0x%p, len %u/%u, rv %d.\n", | 391 | cxgb3i_tx_debug("task 0x%p, skb 0x%p, len %u/%u, rv %d.\n", |
392 | task, skb, skb->len, skb->data_len, err); | 392 | task, skb, skb->len, skb->data_len, err); |
393 | 393 | ||
394 | if (task->conn->hdrdgst_en) | 394 | if (task->conn->hdrdgst_en) |
395 | pdulen += ISCSI_DIGEST_SIZE; | 395 | pdulen += ISCSI_DIGEST_SIZE; |
diff --git a/drivers/scsi/device_handler/scsi_dh_rdac.c b/drivers/scsi/device_handler/scsi_dh_rdac.c index 47cfe1c49c3e..1a660191a905 100644 --- a/drivers/scsi/device_handler/scsi_dh_rdac.c +++ b/drivers/scsi/device_handler/scsi_dh_rdac.c | |||
@@ -748,6 +748,8 @@ static const struct scsi_dh_devlist rdac_dev_list[] = { | |||
748 | {"IBM", "1724"}, | 748 | {"IBM", "1724"}, |
749 | {"IBM", "1726"}, | 749 | {"IBM", "1726"}, |
750 | {"IBM", "1742"}, | 750 | {"IBM", "1742"}, |
751 | {"IBM", "1745"}, | ||
752 | {"IBM", "1746"}, | ||
751 | {"IBM", "1814"}, | 753 | {"IBM", "1814"}, |
752 | {"IBM", "1815"}, | 754 | {"IBM", "1815"}, |
753 | {"IBM", "1818"}, | 755 | {"IBM", "1818"}, |
diff --git a/drivers/scsi/fcoe/fcoe.c b/drivers/scsi/fcoe/fcoe.c index a30ffaa1222c..10be9f36a4cc 100644 --- a/drivers/scsi/fcoe/fcoe.c +++ b/drivers/scsi/fcoe/fcoe.c | |||
@@ -101,6 +101,8 @@ static int fcoe_cpu_callback(struct notifier_block *, unsigned long, void *); | |||
101 | 101 | ||
102 | static int fcoe_create(const char *, struct kernel_param *); | 102 | static int fcoe_create(const char *, struct kernel_param *); |
103 | static int fcoe_destroy(const char *, struct kernel_param *); | 103 | static int fcoe_destroy(const char *, struct kernel_param *); |
104 | static int fcoe_enable(const char *, struct kernel_param *); | ||
105 | static int fcoe_disable(const char *, struct kernel_param *); | ||
104 | 106 | ||
105 | static struct fc_seq *fcoe_elsct_send(struct fc_lport *, | 107 | static struct fc_seq *fcoe_elsct_send(struct fc_lport *, |
106 | u32 did, struct fc_frame *, | 108 | u32 did, struct fc_frame *, |
@@ -115,10 +117,16 @@ static void fcoe_get_lesb(struct fc_lport *, struct fc_els_lesb *); | |||
115 | 117 | ||
116 | module_param_call(create, fcoe_create, NULL, NULL, S_IWUSR); | 118 | module_param_call(create, fcoe_create, NULL, NULL, S_IWUSR); |
117 | __MODULE_PARM_TYPE(create, "string"); | 119 | __MODULE_PARM_TYPE(create, "string"); |
118 | MODULE_PARM_DESC(create, "Create fcoe fcoe using net device passed in."); | 120 | MODULE_PARM_DESC(create, " Creates fcoe instance on a ethernet interface"); |
119 | module_param_call(destroy, fcoe_destroy, NULL, NULL, S_IWUSR); | 121 | module_param_call(destroy, fcoe_destroy, NULL, NULL, S_IWUSR); |
120 | __MODULE_PARM_TYPE(destroy, "string"); | 122 | __MODULE_PARM_TYPE(destroy, "string"); |
121 | MODULE_PARM_DESC(destroy, "Destroy fcoe fcoe"); | 123 | MODULE_PARM_DESC(destroy, " Destroys fcoe instance on a ethernet interface"); |
124 | module_param_call(enable, fcoe_enable, NULL, NULL, S_IWUSR); | ||
125 | __MODULE_PARM_TYPE(enable, "string"); | ||
126 | MODULE_PARM_DESC(enable, " Enables fcoe on a ethernet interface."); | ||
127 | module_param_call(disable, fcoe_disable, NULL, NULL, S_IWUSR); | ||
128 | __MODULE_PARM_TYPE(disable, "string"); | ||
129 | MODULE_PARM_DESC(disable, " Disables fcoe on a ethernet interface."); | ||
122 | 130 | ||
123 | /* notification function for packets from net device */ | 131 | /* notification function for packets from net device */ |
124 | static struct notifier_block fcoe_notifier = { | 132 | static struct notifier_block fcoe_notifier = { |
@@ -545,6 +553,23 @@ static void fcoe_queue_timer(ulong lport) | |||
545 | } | 553 | } |
546 | 554 | ||
547 | /** | 555 | /** |
556 | * fcoe_get_wwn() - Get the world wide name from LLD if it supports it | ||
557 | * @netdev: the associated net device | ||
558 | * @wwn: the output WWN | ||
559 | * @type: the type of WWN (WWPN or WWNN) | ||
560 | * | ||
561 | * Returns: 0 for success | ||
562 | */ | ||
563 | static int fcoe_get_wwn(struct net_device *netdev, u64 *wwn, int type) | ||
564 | { | ||
565 | const struct net_device_ops *ops = netdev->netdev_ops; | ||
566 | |||
567 | if (ops->ndo_fcoe_get_wwn) | ||
568 | return ops->ndo_fcoe_get_wwn(netdev, wwn, type); | ||
569 | return -EINVAL; | ||
570 | } | ||
571 | |||
572 | /** | ||
548 | * fcoe_netdev_config() - Set up net devive for SW FCoE | 573 | * fcoe_netdev_config() - Set up net devive for SW FCoE |
549 | * @lport: The local port that is associated with the net device | 574 | * @lport: The local port that is associated with the net device |
550 | * @netdev: The associated net device | 575 | * @netdev: The associated net device |
@@ -611,9 +636,13 @@ static int fcoe_netdev_config(struct fc_lport *lport, struct net_device *netdev) | |||
611 | */ | 636 | */ |
612 | if (netdev->priv_flags & IFF_802_1Q_VLAN) | 637 | if (netdev->priv_flags & IFF_802_1Q_VLAN) |
613 | vid = vlan_dev_vlan_id(netdev); | 638 | vid = vlan_dev_vlan_id(netdev); |
614 | wwnn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 1, 0); | 639 | |
640 | if (fcoe_get_wwn(netdev, &wwnn, NETDEV_FCOE_WWNN)) | ||
641 | wwnn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 1, 0); | ||
615 | fc_set_wwnn(lport, wwnn); | 642 | fc_set_wwnn(lport, wwnn); |
616 | wwpn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, 2, vid); | 643 | if (fcoe_get_wwn(netdev, &wwpn, NETDEV_FCOE_WWPN)) |
644 | wwpn = fcoe_wwn_from_mac(fcoe->ctlr.ctl_src_addr, | ||
645 | 2, vid); | ||
617 | fc_set_wwpn(lport, wwpn); | 646 | fc_set_wwpn(lport, wwpn); |
618 | } | 647 | } |
619 | 648 | ||
@@ -1231,7 +1260,7 @@ int fcoe_rcv(struct sk_buff *skb, struct net_device *netdev, | |||
1231 | "CPU.\n"); | 1260 | "CPU.\n"); |
1232 | 1261 | ||
1233 | spin_unlock_bh(&fps->fcoe_rx_list.lock); | 1262 | spin_unlock_bh(&fps->fcoe_rx_list.lock); |
1234 | cpu = first_cpu(cpu_online_map); | 1263 | cpu = cpumask_first(cpu_online_mask); |
1235 | fps = &per_cpu(fcoe_percpu, cpu); | 1264 | fps = &per_cpu(fcoe_percpu, cpu); |
1236 | spin_lock_bh(&fps->fcoe_rx_list.lock); | 1265 | spin_lock_bh(&fps->fcoe_rx_list.lock); |
1237 | if (!fps->thread) { | 1266 | if (!fps->thread) { |
@@ -1838,6 +1867,104 @@ static struct net_device *fcoe_if_to_netdev(const char *buffer) | |||
1838 | } | 1867 | } |
1839 | 1868 | ||
1840 | /** | 1869 | /** |
1870 | * fcoe_disable() - Disables a FCoE interface | ||
1871 | * @buffer: The name of the Ethernet interface to be disabled | ||
1872 | * @kp: The associated kernel parameter | ||
1873 | * | ||
1874 | * Called from sysfs. | ||
1875 | * | ||
1876 | * Returns: 0 for success | ||
1877 | */ | ||
1878 | static int fcoe_disable(const char *buffer, struct kernel_param *kp) | ||
1879 | { | ||
1880 | struct fcoe_interface *fcoe; | ||
1881 | struct net_device *netdev; | ||
1882 | int rc = 0; | ||
1883 | |||
1884 | mutex_lock(&fcoe_config_mutex); | ||
1885 | #ifdef CONFIG_FCOE_MODULE | ||
1886 | /* | ||
1887 | * Make sure the module has been initialized, and is not about to be | ||
1888 | * removed. Module paramter sysfs files are writable before the | ||
1889 | * module_init function is called and after module_exit. | ||
1890 | */ | ||
1891 | if (THIS_MODULE->state != MODULE_STATE_LIVE) { | ||
1892 | rc = -ENODEV; | ||
1893 | goto out_nodev; | ||
1894 | } | ||
1895 | #endif | ||
1896 | |||
1897 | netdev = fcoe_if_to_netdev(buffer); | ||
1898 | if (!netdev) { | ||
1899 | rc = -ENODEV; | ||
1900 | goto out_nodev; | ||
1901 | } | ||
1902 | |||
1903 | rtnl_lock(); | ||
1904 | fcoe = fcoe_hostlist_lookup_port(netdev); | ||
1905 | rtnl_unlock(); | ||
1906 | |||
1907 | if (fcoe) | ||
1908 | fc_fabric_logoff(fcoe->ctlr.lp); | ||
1909 | else | ||
1910 | rc = -ENODEV; | ||
1911 | |||
1912 | dev_put(netdev); | ||
1913 | out_nodev: | ||
1914 | mutex_unlock(&fcoe_config_mutex); | ||
1915 | return rc; | ||
1916 | } | ||
1917 | |||
1918 | /** | ||
1919 | * fcoe_enable() - Enables a FCoE interface | ||
1920 | * @buffer: The name of the Ethernet interface to be enabled | ||
1921 | * @kp: The associated kernel parameter | ||
1922 | * | ||
1923 | * Called from sysfs. | ||
1924 | * | ||
1925 | * Returns: 0 for success | ||
1926 | */ | ||
1927 | static int fcoe_enable(const char *buffer, struct kernel_param *kp) | ||
1928 | { | ||
1929 | struct fcoe_interface *fcoe; | ||
1930 | struct net_device *netdev; | ||
1931 | int rc = 0; | ||
1932 | |||
1933 | mutex_lock(&fcoe_config_mutex); | ||
1934 | #ifdef CONFIG_FCOE_MODULE | ||
1935 | /* | ||
1936 | * Make sure the module has been initialized, and is not about to be | ||
1937 | * removed. Module paramter sysfs files are writable before the | ||
1938 | * module_init function is called and after module_exit. | ||
1939 | */ | ||
1940 | if (THIS_MODULE->state != MODULE_STATE_LIVE) { | ||
1941 | rc = -ENODEV; | ||
1942 | goto out_nodev; | ||
1943 | } | ||
1944 | #endif | ||
1945 | |||
1946 | netdev = fcoe_if_to_netdev(buffer); | ||
1947 | if (!netdev) { | ||
1948 | rc = -ENODEV; | ||
1949 | goto out_nodev; | ||
1950 | } | ||
1951 | |||
1952 | rtnl_lock(); | ||
1953 | fcoe = fcoe_hostlist_lookup_port(netdev); | ||
1954 | rtnl_unlock(); | ||
1955 | |||
1956 | if (fcoe) | ||
1957 | rc = fc_fabric_login(fcoe->ctlr.lp); | ||
1958 | else | ||
1959 | rc = -ENODEV; | ||
1960 | |||
1961 | dev_put(netdev); | ||
1962 | out_nodev: | ||
1963 | mutex_unlock(&fcoe_config_mutex); | ||
1964 | return rc; | ||
1965 | } | ||
1966 | |||
1967 | /** | ||
1841 | * fcoe_destroy() - Destroy a FCoE interface | 1968 | * fcoe_destroy() - Destroy a FCoE interface |
1842 | * @buffer: The name of the Ethernet interface to be destroyed | 1969 | * @buffer: The name of the Ethernet interface to be destroyed |
1843 | * @kp: The associated kernel parameter | 1970 | * @kp: The associated kernel parameter |
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c new file mode 100644 index 000000000000..bb96fdd58e23 --- /dev/null +++ b/drivers/scsi/hpsa.c | |||
@@ -0,0 +1,3531 @@ | |||
1 | /* | ||
2 | * Disk Array driver for HP Smart Array SAS controllers | ||
3 | * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; version 2 of the License. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
12 | * NON INFRINGEMENT. See the GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | * | ||
18 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com | ||
19 | * | ||
20 | */ | ||
21 | |||
22 | #include <linux/module.h> | ||
23 | #include <linux/interrupt.h> | ||
24 | #include <linux/types.h> | ||
25 | #include <linux/pci.h> | ||
26 | #include <linux/kernel.h> | ||
27 | #include <linux/slab.h> | ||
28 | #include <linux/delay.h> | ||
29 | #include <linux/fs.h> | ||
30 | #include <linux/timer.h> | ||
31 | #include <linux/seq_file.h> | ||
32 | #include <linux/init.h> | ||
33 | #include <linux/spinlock.h> | ||
34 | #include <linux/smp_lock.h> | ||
35 | #include <linux/compat.h> | ||
36 | #include <linux/blktrace_api.h> | ||
37 | #include <linux/uaccess.h> | ||
38 | #include <linux/io.h> | ||
39 | #include <linux/dma-mapping.h> | ||
40 | #include <linux/completion.h> | ||
41 | #include <linux/moduleparam.h> | ||
42 | #include <scsi/scsi.h> | ||
43 | #include <scsi/scsi_cmnd.h> | ||
44 | #include <scsi/scsi_device.h> | ||
45 | #include <scsi/scsi_host.h> | ||
46 | #include <linux/cciss_ioctl.h> | ||
47 | #include <linux/string.h> | ||
48 | #include <linux/bitmap.h> | ||
49 | #include <asm/atomic.h> | ||
50 | #include <linux/kthread.h> | ||
51 | #include "hpsa_cmd.h" | ||
52 | #include "hpsa.h" | ||
53 | |||
54 | /* HPSA_DRIVER_VERSION must be 3 byte values (0-255) separated by '.' */ | ||
55 | #define HPSA_DRIVER_VERSION "1.0.0" | ||
56 | #define DRIVER_NAME "HP HPSA Driver (v " HPSA_DRIVER_VERSION ")" | ||
57 | |||
58 | /* How long to wait (in milliseconds) for board to go into simple mode */ | ||
59 | #define MAX_CONFIG_WAIT 30000 | ||
60 | #define MAX_IOCTL_CONFIG_WAIT 1000 | ||
61 | |||
62 | /*define how many times we will try a command because of bus resets */ | ||
63 | #define MAX_CMD_RETRIES 3 | ||
64 | |||
65 | /* Embedded module documentation macros - see modules.h */ | ||
66 | MODULE_AUTHOR("Hewlett-Packard Company"); | ||
67 | MODULE_DESCRIPTION("Driver for HP Smart Array Controller version " \ | ||
68 | HPSA_DRIVER_VERSION); | ||
69 | MODULE_SUPPORTED_DEVICE("HP Smart Array Controllers"); | ||
70 | MODULE_VERSION(HPSA_DRIVER_VERSION); | ||
71 | MODULE_LICENSE("GPL"); | ||
72 | |||
73 | static int hpsa_allow_any; | ||
74 | module_param(hpsa_allow_any, int, S_IRUGO|S_IWUSR); | ||
75 | MODULE_PARM_DESC(hpsa_allow_any, | ||
76 | "Allow hpsa driver to access unknown HP Smart Array hardware"); | ||
77 | |||
78 | /* define the PCI info for the cards we can control */ | ||
79 | static const struct pci_device_id hpsa_pci_device_id[] = { | ||
80 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3223}, | ||
81 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x3234}, | ||
82 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSC, 0x103C, 0x323D}, | ||
83 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3241}, | ||
84 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3243}, | ||
85 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3245}, | ||
86 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3247}, | ||
87 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x3249}, | ||
88 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324a}, | ||
89 | {PCI_VENDOR_ID_HP, PCI_DEVICE_ID_HP_CISSE, 0x103C, 0x324b}, | ||
90 | {PCI_VENDOR_ID_HP, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, | ||
91 | PCI_CLASS_STORAGE_RAID << 8, 0xffff << 8, 0}, | ||
92 | {0,} | ||
93 | }; | ||
94 | |||
95 | MODULE_DEVICE_TABLE(pci, hpsa_pci_device_id); | ||
96 | |||
97 | /* board_id = Subsystem Device ID & Vendor ID | ||
98 | * product = Marketing Name for the board | ||
99 | * access = Address of the struct of function pointers | ||
100 | */ | ||
101 | static struct board_type products[] = { | ||
102 | {0x3223103C, "Smart Array P800", &SA5_access}, | ||
103 | {0x3234103C, "Smart Array P400", &SA5_access}, | ||
104 | {0x323d103c, "Smart Array P700M", &SA5_access}, | ||
105 | {0x3241103C, "Smart Array P212", &SA5_access}, | ||
106 | {0x3243103C, "Smart Array P410", &SA5_access}, | ||
107 | {0x3245103C, "Smart Array P410i", &SA5_access}, | ||
108 | {0x3247103C, "Smart Array P411", &SA5_access}, | ||
109 | {0x3249103C, "Smart Array P812", &SA5_access}, | ||
110 | {0x324a103C, "Smart Array P712m", &SA5_access}, | ||
111 | {0x324b103C, "Smart Array P711m", &SA5_access}, | ||
112 | {0xFFFF103C, "Unknown Smart Array", &SA5_access}, | ||
113 | }; | ||
114 | |||
115 | static int number_of_controllers; | ||
116 | |||
117 | static irqreturn_t do_hpsa_intr(int irq, void *dev_id); | ||
118 | static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg); | ||
119 | static void start_io(struct ctlr_info *h); | ||
120 | |||
121 | #ifdef CONFIG_COMPAT | ||
122 | static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg); | ||
123 | #endif | ||
124 | |||
125 | static void cmd_free(struct ctlr_info *h, struct CommandList *c); | ||
126 | static void cmd_special_free(struct ctlr_info *h, struct CommandList *c); | ||
127 | static struct CommandList *cmd_alloc(struct ctlr_info *h); | ||
128 | static struct CommandList *cmd_special_alloc(struct ctlr_info *h); | ||
129 | static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h, | ||
130 | void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr, | ||
131 | int cmd_type); | ||
132 | |||
133 | static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd, | ||
134 | void (*done)(struct scsi_cmnd *)); | ||
135 | |||
136 | static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd); | ||
137 | static int hpsa_slave_alloc(struct scsi_device *sdev); | ||
138 | static void hpsa_slave_destroy(struct scsi_device *sdev); | ||
139 | |||
140 | static ssize_t raid_level_show(struct device *dev, | ||
141 | struct device_attribute *attr, char *buf); | ||
142 | static ssize_t lunid_show(struct device *dev, | ||
143 | struct device_attribute *attr, char *buf); | ||
144 | static ssize_t unique_id_show(struct device *dev, | ||
145 | struct device_attribute *attr, char *buf); | ||
146 | static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno); | ||
147 | static ssize_t host_store_rescan(struct device *dev, | ||
148 | struct device_attribute *attr, const char *buf, size_t count); | ||
149 | static int check_for_unit_attention(struct ctlr_info *h, | ||
150 | struct CommandList *c); | ||
151 | static void check_ioctl_unit_attention(struct ctlr_info *h, | ||
152 | struct CommandList *c); | ||
153 | |||
154 | static DEVICE_ATTR(raid_level, S_IRUGO, raid_level_show, NULL); | ||
155 | static DEVICE_ATTR(lunid, S_IRUGO, lunid_show, NULL); | ||
156 | static DEVICE_ATTR(unique_id, S_IRUGO, unique_id_show, NULL); | ||
157 | static DEVICE_ATTR(rescan, S_IWUSR, NULL, host_store_rescan); | ||
158 | |||
159 | static struct device_attribute *hpsa_sdev_attrs[] = { | ||
160 | &dev_attr_raid_level, | ||
161 | &dev_attr_lunid, | ||
162 | &dev_attr_unique_id, | ||
163 | NULL, | ||
164 | }; | ||
165 | |||
166 | static struct device_attribute *hpsa_shost_attrs[] = { | ||
167 | &dev_attr_rescan, | ||
168 | NULL, | ||
169 | }; | ||
170 | |||
171 | static struct scsi_host_template hpsa_driver_template = { | ||
172 | .module = THIS_MODULE, | ||
173 | .name = "hpsa", | ||
174 | .proc_name = "hpsa", | ||
175 | .queuecommand = hpsa_scsi_queue_command, | ||
176 | .can_queue = 512, | ||
177 | .this_id = -1, | ||
178 | .sg_tablesize = MAXSGENTRIES, | ||
179 | .cmd_per_lun = 512, | ||
180 | .use_clustering = ENABLE_CLUSTERING, | ||
181 | .eh_device_reset_handler = hpsa_eh_device_reset_handler, | ||
182 | .ioctl = hpsa_ioctl, | ||
183 | .slave_alloc = hpsa_slave_alloc, | ||
184 | .slave_destroy = hpsa_slave_destroy, | ||
185 | #ifdef CONFIG_COMPAT | ||
186 | .compat_ioctl = hpsa_compat_ioctl, | ||
187 | #endif | ||
188 | .sdev_attrs = hpsa_sdev_attrs, | ||
189 | .shost_attrs = hpsa_shost_attrs, | ||
190 | }; | ||
191 | |||
192 | static inline struct ctlr_info *sdev_to_hba(struct scsi_device *sdev) | ||
193 | { | ||
194 | unsigned long *priv = shost_priv(sdev->host); | ||
195 | return (struct ctlr_info *) *priv; | ||
196 | } | ||
197 | |||
198 | static struct task_struct *hpsa_scan_thread; | ||
199 | static DEFINE_MUTEX(hpsa_scan_mutex); | ||
200 | static LIST_HEAD(hpsa_scan_q); | ||
201 | static int hpsa_scan_func(void *data); | ||
202 | |||
203 | /** | ||
204 | * add_to_scan_list() - add controller to rescan queue | ||
205 | * @h: Pointer to the controller. | ||
206 | * | ||
207 | * Adds the controller to the rescan queue if not already on the queue. | ||
208 | * | ||
209 | * returns 1 if added to the queue, 0 if skipped (could be on the | ||
210 | * queue already, or the controller could be initializing or shutting | ||
211 | * down). | ||
212 | **/ | ||
213 | static int add_to_scan_list(struct ctlr_info *h) | ||
214 | { | ||
215 | struct ctlr_info *test_h; | ||
216 | int found = 0; | ||
217 | int ret = 0; | ||
218 | |||
219 | if (h->busy_initializing) | ||
220 | return 0; | ||
221 | |||
222 | /* | ||
223 | * If we don't get the lock, it means the driver is unloading | ||
224 | * and there's no point in scheduling a new scan. | ||
225 | */ | ||
226 | if (!mutex_trylock(&h->busy_shutting_down)) | ||
227 | return 0; | ||
228 | |||
229 | mutex_lock(&hpsa_scan_mutex); | ||
230 | list_for_each_entry(test_h, &hpsa_scan_q, scan_list) { | ||
231 | if (test_h == h) { | ||
232 | found = 1; | ||
233 | break; | ||
234 | } | ||
235 | } | ||
236 | if (!found && !h->busy_scanning) { | ||
237 | INIT_COMPLETION(h->scan_wait); | ||
238 | list_add_tail(&h->scan_list, &hpsa_scan_q); | ||
239 | ret = 1; | ||
240 | } | ||
241 | mutex_unlock(&hpsa_scan_mutex); | ||
242 | mutex_unlock(&h->busy_shutting_down); | ||
243 | |||
244 | return ret; | ||
245 | } | ||
246 | |||
247 | /** | ||
248 | * remove_from_scan_list() - remove controller from rescan queue | ||
249 | * @h: Pointer to the controller. | ||
250 | * | ||
251 | * Removes the controller from the rescan queue if present. Blocks if | ||
252 | * the controller is currently conducting a rescan. The controller | ||
253 | * can be in one of three states: | ||
254 | * 1. Doesn't need a scan | ||
255 | * 2. On the scan list, but not scanning yet (we remove it) | ||
256 | * 3. Busy scanning (and not on the list). In this case we want to wait for | ||
257 | * the scan to complete to make sure the scanning thread for this | ||
258 | * controller is completely idle. | ||
259 | **/ | ||
260 | static void remove_from_scan_list(struct ctlr_info *h) | ||
261 | { | ||
262 | struct ctlr_info *test_h, *tmp_h; | ||
263 | |||
264 | mutex_lock(&hpsa_scan_mutex); | ||
265 | list_for_each_entry_safe(test_h, tmp_h, &hpsa_scan_q, scan_list) { | ||
266 | if (test_h == h) { /* state 2. */ | ||
267 | list_del(&h->scan_list); | ||
268 | complete_all(&h->scan_wait); | ||
269 | mutex_unlock(&hpsa_scan_mutex); | ||
270 | return; | ||
271 | } | ||
272 | } | ||
273 | if (h->busy_scanning) { /* state 3. */ | ||
274 | mutex_unlock(&hpsa_scan_mutex); | ||
275 | wait_for_completion(&h->scan_wait); | ||
276 | } else { /* state 1, nothing to do. */ | ||
277 | mutex_unlock(&hpsa_scan_mutex); | ||
278 | } | ||
279 | } | ||
280 | |||
281 | /* hpsa_scan_func() - kernel thread used to rescan controllers | ||
282 | * @data: Ignored. | ||
283 | * | ||
284 | * A kernel thread used scan for drive topology changes on | ||
285 | * controllers. The thread processes only one controller at a time | ||
286 | * using a queue. Controllers are added to the queue using | ||
287 | * add_to_scan_list() and removed from the queue either after done | ||
288 | * processing or using remove_from_scan_list(). | ||
289 | * | ||
290 | * returns 0. | ||
291 | **/ | ||
292 | static int hpsa_scan_func(__attribute__((unused)) void *data) | ||
293 | { | ||
294 | struct ctlr_info *h; | ||
295 | int host_no; | ||
296 | |||
297 | while (1) { | ||
298 | set_current_state(TASK_INTERRUPTIBLE); | ||
299 | schedule(); | ||
300 | if (kthread_should_stop()) | ||
301 | break; | ||
302 | |||
303 | while (1) { | ||
304 | mutex_lock(&hpsa_scan_mutex); | ||
305 | if (list_empty(&hpsa_scan_q)) { | ||
306 | mutex_unlock(&hpsa_scan_mutex); | ||
307 | break; | ||
308 | } | ||
309 | h = list_entry(hpsa_scan_q.next, struct ctlr_info, | ||
310 | scan_list); | ||
311 | list_del(&h->scan_list); | ||
312 | h->busy_scanning = 1; | ||
313 | mutex_unlock(&hpsa_scan_mutex); | ||
314 | host_no = h->scsi_host ? h->scsi_host->host_no : -1; | ||
315 | hpsa_update_scsi_devices(h, host_no); | ||
316 | complete_all(&h->scan_wait); | ||
317 | mutex_lock(&hpsa_scan_mutex); | ||
318 | h->busy_scanning = 0; | ||
319 | mutex_unlock(&hpsa_scan_mutex); | ||
320 | } | ||
321 | } | ||
322 | return 0; | ||
323 | } | ||
324 | |||
325 | static int check_for_unit_attention(struct ctlr_info *h, | ||
326 | struct CommandList *c) | ||
327 | { | ||
328 | if (c->err_info->SenseInfo[2] != UNIT_ATTENTION) | ||
329 | return 0; | ||
330 | |||
331 | switch (c->err_info->SenseInfo[12]) { | ||
332 | case STATE_CHANGED: | ||
333 | dev_warn(&h->pdev->dev, "hpsa%d: a state change " | ||
334 | "detected, command retried\n", h->ctlr); | ||
335 | break; | ||
336 | case LUN_FAILED: | ||
337 | dev_warn(&h->pdev->dev, "hpsa%d: LUN failure " | ||
338 | "detected, action required\n", h->ctlr); | ||
339 | break; | ||
340 | case REPORT_LUNS_CHANGED: | ||
341 | dev_warn(&h->pdev->dev, "hpsa%d: report LUN data " | ||
342 | "changed\n", h->ctlr); | ||
343 | /* | ||
344 | * Here, we could call add_to_scan_list and wake up the scan thread, | ||
345 | * except that it's quite likely that we will get more than one | ||
346 | * REPORT_LUNS_CHANGED condition in quick succession, which means | ||
347 | * that those which occur after the first one will likely happen | ||
348 | * *during* the hpsa_scan_thread's rescan. And the rescan code is not | ||
349 | * robust enough to restart in the middle, undoing what it has already | ||
350 | * done, and it's not clear that it's even possible to do this, since | ||
351 | * part of what it does is notify the SCSI mid layer, which starts | ||
352 | * doing it's own i/o to read partition tables and so on, and the | ||
353 | * driver doesn't have visibility to know what might need undoing. | ||
354 | * In any event, if possible, it is horribly complicated to get right | ||
355 | * so we just don't do it for now. | ||
356 | * | ||
357 | * Note: this REPORT_LUNS_CHANGED condition only occurs on the MSA2012. | ||
358 | */ | ||
359 | break; | ||
360 | case POWER_OR_RESET: | ||
361 | dev_warn(&h->pdev->dev, "hpsa%d: a power on " | ||
362 | "or device reset detected\n", h->ctlr); | ||
363 | break; | ||
364 | case UNIT_ATTENTION_CLEARED: | ||
365 | dev_warn(&h->pdev->dev, "hpsa%d: unit attention " | ||
366 | "cleared by another initiator\n", h->ctlr); | ||
367 | break; | ||
368 | default: | ||
369 | dev_warn(&h->pdev->dev, "hpsa%d: unknown " | ||
370 | "unit attention detected\n", h->ctlr); | ||
371 | break; | ||
372 | } | ||
373 | return 1; | ||
374 | } | ||
375 | |||
376 | static ssize_t host_store_rescan(struct device *dev, | ||
377 | struct device_attribute *attr, | ||
378 | const char *buf, size_t count) | ||
379 | { | ||
380 | struct ctlr_info *h; | ||
381 | struct Scsi_Host *shost = class_to_shost(dev); | ||
382 | unsigned long *priv = shost_priv(shost); | ||
383 | h = (struct ctlr_info *) *priv; | ||
384 | if (add_to_scan_list(h)) { | ||
385 | wake_up_process(hpsa_scan_thread); | ||
386 | wait_for_completion_interruptible(&h->scan_wait); | ||
387 | } | ||
388 | return count; | ||
389 | } | ||
390 | |||
391 | /* Enqueuing and dequeuing functions for cmdlists. */ | ||
392 | static inline void addQ(struct hlist_head *list, struct CommandList *c) | ||
393 | { | ||
394 | hlist_add_head(&c->list, list); | ||
395 | } | ||
396 | |||
397 | static void enqueue_cmd_and_start_io(struct ctlr_info *h, | ||
398 | struct CommandList *c) | ||
399 | { | ||
400 | unsigned long flags; | ||
401 | spin_lock_irqsave(&h->lock, flags); | ||
402 | addQ(&h->reqQ, c); | ||
403 | h->Qdepth++; | ||
404 | start_io(h); | ||
405 | spin_unlock_irqrestore(&h->lock, flags); | ||
406 | } | ||
407 | |||
408 | static inline void removeQ(struct CommandList *c) | ||
409 | { | ||
410 | if (WARN_ON(hlist_unhashed(&c->list))) | ||
411 | return; | ||
412 | hlist_del_init(&c->list); | ||
413 | } | ||
414 | |||
415 | static inline int is_hba_lunid(unsigned char scsi3addr[]) | ||
416 | { | ||
417 | return memcmp(scsi3addr, RAID_CTLR_LUNID, 8) == 0; | ||
418 | } | ||
419 | |||
420 | static inline int is_logical_dev_addr_mode(unsigned char scsi3addr[]) | ||
421 | { | ||
422 | return (scsi3addr[3] & 0xC0) == 0x40; | ||
423 | } | ||
424 | |||
425 | static const char *raid_label[] = { "0", "4", "1(1+0)", "5", "5+1", "ADG", | ||
426 | "UNKNOWN" | ||
427 | }; | ||
428 | #define RAID_UNKNOWN (ARRAY_SIZE(raid_label) - 1) | ||
429 | |||
430 | static ssize_t raid_level_show(struct device *dev, | ||
431 | struct device_attribute *attr, char *buf) | ||
432 | { | ||
433 | ssize_t l = 0; | ||
434 | int rlevel; | ||
435 | struct ctlr_info *h; | ||
436 | struct scsi_device *sdev; | ||
437 | struct hpsa_scsi_dev_t *hdev; | ||
438 | unsigned long flags; | ||
439 | |||
440 | sdev = to_scsi_device(dev); | ||
441 | h = sdev_to_hba(sdev); | ||
442 | spin_lock_irqsave(&h->lock, flags); | ||
443 | hdev = sdev->hostdata; | ||
444 | if (!hdev) { | ||
445 | spin_unlock_irqrestore(&h->lock, flags); | ||
446 | return -ENODEV; | ||
447 | } | ||
448 | |||
449 | /* Is this even a logical drive? */ | ||
450 | if (!is_logical_dev_addr_mode(hdev->scsi3addr)) { | ||
451 | spin_unlock_irqrestore(&h->lock, flags); | ||
452 | l = snprintf(buf, PAGE_SIZE, "N/A\n"); | ||
453 | return l; | ||
454 | } | ||
455 | |||
456 | rlevel = hdev->raid_level; | ||
457 | spin_unlock_irqrestore(&h->lock, flags); | ||
458 | if (rlevel < 0 || rlevel > RAID_UNKNOWN) | ||
459 | rlevel = RAID_UNKNOWN; | ||
460 | l = snprintf(buf, PAGE_SIZE, "RAID %s\n", raid_label[rlevel]); | ||
461 | return l; | ||
462 | } | ||
463 | |||
464 | static ssize_t lunid_show(struct device *dev, | ||
465 | struct device_attribute *attr, char *buf) | ||
466 | { | ||
467 | struct ctlr_info *h; | ||
468 | struct scsi_device *sdev; | ||
469 | struct hpsa_scsi_dev_t *hdev; | ||
470 | unsigned long flags; | ||
471 | unsigned char lunid[8]; | ||
472 | |||
473 | sdev = to_scsi_device(dev); | ||
474 | h = sdev_to_hba(sdev); | ||
475 | spin_lock_irqsave(&h->lock, flags); | ||
476 | hdev = sdev->hostdata; | ||
477 | if (!hdev) { | ||
478 | spin_unlock_irqrestore(&h->lock, flags); | ||
479 | return -ENODEV; | ||
480 | } | ||
481 | memcpy(lunid, hdev->scsi3addr, sizeof(lunid)); | ||
482 | spin_unlock_irqrestore(&h->lock, flags); | ||
483 | return snprintf(buf, 20, "0x%02x%02x%02x%02x%02x%02x%02x%02x\n", | ||
484 | lunid[0], lunid[1], lunid[2], lunid[3], | ||
485 | lunid[4], lunid[5], lunid[6], lunid[7]); | ||
486 | } | ||
487 | |||
488 | static ssize_t unique_id_show(struct device *dev, | ||
489 | struct device_attribute *attr, char *buf) | ||
490 | { | ||
491 | struct ctlr_info *h; | ||
492 | struct scsi_device *sdev; | ||
493 | struct hpsa_scsi_dev_t *hdev; | ||
494 | unsigned long flags; | ||
495 | unsigned char sn[16]; | ||
496 | |||
497 | sdev = to_scsi_device(dev); | ||
498 | h = sdev_to_hba(sdev); | ||
499 | spin_lock_irqsave(&h->lock, flags); | ||
500 | hdev = sdev->hostdata; | ||
501 | if (!hdev) { | ||
502 | spin_unlock_irqrestore(&h->lock, flags); | ||
503 | return -ENODEV; | ||
504 | } | ||
505 | memcpy(sn, hdev->device_id, sizeof(sn)); | ||
506 | spin_unlock_irqrestore(&h->lock, flags); | ||
507 | return snprintf(buf, 16 * 2 + 2, | ||
508 | "%02X%02X%02X%02X%02X%02X%02X%02X" | ||
509 | "%02X%02X%02X%02X%02X%02X%02X%02X\n", | ||
510 | sn[0], sn[1], sn[2], sn[3], | ||
511 | sn[4], sn[5], sn[6], sn[7], | ||
512 | sn[8], sn[9], sn[10], sn[11], | ||
513 | sn[12], sn[13], sn[14], sn[15]); | ||
514 | } | ||
515 | |||
516 | static int hpsa_find_target_lun(struct ctlr_info *h, | ||
517 | unsigned char scsi3addr[], int bus, int *target, int *lun) | ||
518 | { | ||
519 | /* finds an unused bus, target, lun for a new physical device | ||
520 | * assumes h->devlock is held | ||
521 | */ | ||
522 | int i, found = 0; | ||
523 | DECLARE_BITMAP(lun_taken, HPSA_MAX_SCSI_DEVS_PER_HBA); | ||
524 | |||
525 | memset(&lun_taken[0], 0, HPSA_MAX_SCSI_DEVS_PER_HBA >> 3); | ||
526 | |||
527 | for (i = 0; i < h->ndevices; i++) { | ||
528 | if (h->dev[i]->bus == bus && h->dev[i]->target != -1) | ||
529 | set_bit(h->dev[i]->target, lun_taken); | ||
530 | } | ||
531 | |||
532 | for (i = 0; i < HPSA_MAX_SCSI_DEVS_PER_HBA; i++) { | ||
533 | if (!test_bit(i, lun_taken)) { | ||
534 | /* *bus = 1; */ | ||
535 | *target = i; | ||
536 | *lun = 0; | ||
537 | found = 1; | ||
538 | break; | ||
539 | } | ||
540 | } | ||
541 | return !found; | ||
542 | } | ||
543 | |||
544 | /* Add an entry into h->dev[] array. */ | ||
545 | static int hpsa_scsi_add_entry(struct ctlr_info *h, int hostno, | ||
546 | struct hpsa_scsi_dev_t *device, | ||
547 | struct hpsa_scsi_dev_t *added[], int *nadded) | ||
548 | { | ||
549 | /* assumes h->devlock is held */ | ||
550 | int n = h->ndevices; | ||
551 | int i; | ||
552 | unsigned char addr1[8], addr2[8]; | ||
553 | struct hpsa_scsi_dev_t *sd; | ||
554 | |||
555 | if (n >= HPSA_MAX_SCSI_DEVS_PER_HBA) { | ||
556 | dev_err(&h->pdev->dev, "too many devices, some will be " | ||
557 | "inaccessible.\n"); | ||
558 | return -1; | ||
559 | } | ||
560 | |||
561 | /* physical devices do not have lun or target assigned until now. */ | ||
562 | if (device->lun != -1) | ||
563 | /* Logical device, lun is already assigned. */ | ||
564 | goto lun_assigned; | ||
565 | |||
566 | /* If this device a non-zero lun of a multi-lun device | ||
567 | * byte 4 of the 8-byte LUN addr will contain the logical | ||
568 | * unit no, zero otherise. | ||
569 | */ | ||
570 | if (device->scsi3addr[4] == 0) { | ||
571 | /* This is not a non-zero lun of a multi-lun device */ | ||
572 | if (hpsa_find_target_lun(h, device->scsi3addr, | ||
573 | device->bus, &device->target, &device->lun) != 0) | ||
574 | return -1; | ||
575 | goto lun_assigned; | ||
576 | } | ||
577 | |||
578 | /* This is a non-zero lun of a multi-lun device. | ||
579 | * Search through our list and find the device which | ||
580 | * has the same 8 byte LUN address, excepting byte 4. | ||
581 | * Assign the same bus and target for this new LUN. | ||
582 | * Use the logical unit number from the firmware. | ||
583 | */ | ||
584 | memcpy(addr1, device->scsi3addr, 8); | ||
585 | addr1[4] = 0; | ||
586 | for (i = 0; i < n; i++) { | ||
587 | sd = h->dev[i]; | ||
588 | memcpy(addr2, sd->scsi3addr, 8); | ||
589 | addr2[4] = 0; | ||
590 | /* differ only in byte 4? */ | ||
591 | if (memcmp(addr1, addr2, 8) == 0) { | ||
592 | device->bus = sd->bus; | ||
593 | device->target = sd->target; | ||
594 | device->lun = device->scsi3addr[4]; | ||
595 | break; | ||
596 | } | ||
597 | } | ||
598 | if (device->lun == -1) { | ||
599 | dev_warn(&h->pdev->dev, "physical device with no LUN=0," | ||
600 | " suspect firmware bug or unsupported hardware " | ||
601 | "configuration.\n"); | ||
602 | return -1; | ||
603 | } | ||
604 | |||
605 | lun_assigned: | ||
606 | |||
607 | h->dev[n] = device; | ||
608 | h->ndevices++; | ||
609 | added[*nadded] = device; | ||
610 | (*nadded)++; | ||
611 | |||
612 | /* initially, (before registering with scsi layer) we don't | ||
613 | * know our hostno and we don't want to print anything first | ||
614 | * time anyway (the scsi layer's inquiries will show that info) | ||
615 | */ | ||
616 | /* if (hostno != -1) */ | ||
617 | dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d added.\n", | ||
618 | scsi_device_type(device->devtype), hostno, | ||
619 | device->bus, device->target, device->lun); | ||
620 | return 0; | ||
621 | } | ||
622 | |||
623 | /* Remove an entry from h->dev[] array. */ | ||
624 | static void hpsa_scsi_remove_entry(struct ctlr_info *h, int hostno, int entry, | ||
625 | struct hpsa_scsi_dev_t *removed[], int *nremoved) | ||
626 | { | ||
627 | /* assumes h->devlock is held */ | ||
628 | int i; | ||
629 | struct hpsa_scsi_dev_t *sd; | ||
630 | |||
631 | if (entry < 0 || entry >= HPSA_MAX_SCSI_DEVS_PER_HBA) | ||
632 | BUG(); | ||
633 | |||
634 | sd = h->dev[entry]; | ||
635 | removed[*nremoved] = h->dev[entry]; | ||
636 | (*nremoved)++; | ||
637 | |||
638 | for (i = entry; i < h->ndevices-1; i++) | ||
639 | h->dev[i] = h->dev[i+1]; | ||
640 | h->ndevices--; | ||
641 | dev_info(&h->pdev->dev, "%s device c%db%dt%dl%d removed.\n", | ||
642 | scsi_device_type(sd->devtype), hostno, sd->bus, sd->target, | ||
643 | sd->lun); | ||
644 | } | ||
645 | |||
646 | #define SCSI3ADDR_EQ(a, b) ( \ | ||
647 | (a)[7] == (b)[7] && \ | ||
648 | (a)[6] == (b)[6] && \ | ||
649 | (a)[5] == (b)[5] && \ | ||
650 | (a)[4] == (b)[4] && \ | ||
651 | (a)[3] == (b)[3] && \ | ||
652 | (a)[2] == (b)[2] && \ | ||
653 | (a)[1] == (b)[1] && \ | ||
654 | (a)[0] == (b)[0]) | ||
655 | |||
656 | static void fixup_botched_add(struct ctlr_info *h, | ||
657 | struct hpsa_scsi_dev_t *added) | ||
658 | { | ||
659 | /* called when scsi_add_device fails in order to re-adjust | ||
660 | * h->dev[] to match the mid layer's view. | ||
661 | */ | ||
662 | unsigned long flags; | ||
663 | int i, j; | ||
664 | |||
665 | spin_lock_irqsave(&h->lock, flags); | ||
666 | for (i = 0; i < h->ndevices; i++) { | ||
667 | if (h->dev[i] == added) { | ||
668 | for (j = i; j < h->ndevices-1; j++) | ||
669 | h->dev[j] = h->dev[j+1]; | ||
670 | h->ndevices--; | ||
671 | break; | ||
672 | } | ||
673 | } | ||
674 | spin_unlock_irqrestore(&h->lock, flags); | ||
675 | kfree(added); | ||
676 | } | ||
677 | |||
678 | static inline int device_is_the_same(struct hpsa_scsi_dev_t *dev1, | ||
679 | struct hpsa_scsi_dev_t *dev2) | ||
680 | { | ||
681 | if ((is_logical_dev_addr_mode(dev1->scsi3addr) || | ||
682 | (dev1->lun != -1 && dev2->lun != -1)) && | ||
683 | dev1->devtype != 0x0C) | ||
684 | return (memcmp(dev1, dev2, sizeof(*dev1)) == 0); | ||
685 | |||
686 | /* we compare everything except lun and target as these | ||
687 | * are not yet assigned. Compare parts likely | ||
688 | * to differ first | ||
689 | */ | ||
690 | if (memcmp(dev1->scsi3addr, dev2->scsi3addr, | ||
691 | sizeof(dev1->scsi3addr)) != 0) | ||
692 | return 0; | ||
693 | if (memcmp(dev1->device_id, dev2->device_id, | ||
694 | sizeof(dev1->device_id)) != 0) | ||
695 | return 0; | ||
696 | if (memcmp(dev1->model, dev2->model, sizeof(dev1->model)) != 0) | ||
697 | return 0; | ||
698 | if (memcmp(dev1->vendor, dev2->vendor, sizeof(dev1->vendor)) != 0) | ||
699 | return 0; | ||
700 | if (memcmp(dev1->revision, dev2->revision, sizeof(dev1->revision)) != 0) | ||
701 | return 0; | ||
702 | if (dev1->devtype != dev2->devtype) | ||
703 | return 0; | ||
704 | if (dev1->raid_level != dev2->raid_level) | ||
705 | return 0; | ||
706 | if (dev1->bus != dev2->bus) | ||
707 | return 0; | ||
708 | return 1; | ||
709 | } | ||
710 | |||
711 | /* Find needle in haystack. If exact match found, return DEVICE_SAME, | ||
712 | * and return needle location in *index. If scsi3addr matches, but not | ||
713 | * vendor, model, serial num, etc. return DEVICE_CHANGED, and return needle | ||
714 | * location in *index. If needle not found, return DEVICE_NOT_FOUND. | ||
715 | */ | ||
716 | static int hpsa_scsi_find_entry(struct hpsa_scsi_dev_t *needle, | ||
717 | struct hpsa_scsi_dev_t *haystack[], int haystack_size, | ||
718 | int *index) | ||
719 | { | ||
720 | int i; | ||
721 | #define DEVICE_NOT_FOUND 0 | ||
722 | #define DEVICE_CHANGED 1 | ||
723 | #define DEVICE_SAME 2 | ||
724 | for (i = 0; i < haystack_size; i++) { | ||
725 | if (SCSI3ADDR_EQ(needle->scsi3addr, haystack[i]->scsi3addr)) { | ||
726 | *index = i; | ||
727 | if (device_is_the_same(needle, haystack[i])) | ||
728 | return DEVICE_SAME; | ||
729 | else | ||
730 | return DEVICE_CHANGED; | ||
731 | } | ||
732 | } | ||
733 | *index = -1; | ||
734 | return DEVICE_NOT_FOUND; | ||
735 | } | ||
736 | |||
737 | static int adjust_hpsa_scsi_table(struct ctlr_info *h, int hostno, | ||
738 | struct hpsa_scsi_dev_t *sd[], int nsds) | ||
739 | { | ||
740 | /* sd contains scsi3 addresses and devtypes, and inquiry | ||
741 | * data. This function takes what's in sd to be the current | ||
742 | * reality and updates h->dev[] to reflect that reality. | ||
743 | */ | ||
744 | int i, entry, device_change, changes = 0; | ||
745 | struct hpsa_scsi_dev_t *csd; | ||
746 | unsigned long flags; | ||
747 | struct hpsa_scsi_dev_t **added, **removed; | ||
748 | int nadded, nremoved; | ||
749 | struct Scsi_Host *sh = NULL; | ||
750 | |||
751 | added = kzalloc(sizeof(*added) * HPSA_MAX_SCSI_DEVS_PER_HBA, | ||
752 | GFP_KERNEL); | ||
753 | removed = kzalloc(sizeof(*removed) * HPSA_MAX_SCSI_DEVS_PER_HBA, | ||
754 | GFP_KERNEL); | ||
755 | |||
756 | if (!added || !removed) { | ||
757 | dev_warn(&h->pdev->dev, "out of memory in " | ||
758 | "adjust_hpsa_scsi_table\n"); | ||
759 | goto free_and_out; | ||
760 | } | ||
761 | |||
762 | spin_lock_irqsave(&h->devlock, flags); | ||
763 | |||
764 | /* find any devices in h->dev[] that are not in | ||
765 | * sd[] and remove them from h->dev[], and for any | ||
766 | * devices which have changed, remove the old device | ||
767 | * info and add the new device info. | ||
768 | */ | ||
769 | i = 0; | ||
770 | nremoved = 0; | ||
771 | nadded = 0; | ||
772 | while (i < h->ndevices) { | ||
773 | csd = h->dev[i]; | ||
774 | device_change = hpsa_scsi_find_entry(csd, sd, nsds, &entry); | ||
775 | if (device_change == DEVICE_NOT_FOUND) { | ||
776 | changes++; | ||
777 | hpsa_scsi_remove_entry(h, hostno, i, | ||
778 | removed, &nremoved); | ||
779 | continue; /* remove ^^^, hence i not incremented */ | ||
780 | } else if (device_change == DEVICE_CHANGED) { | ||
781 | changes++; | ||
782 | hpsa_scsi_remove_entry(h, hostno, i, | ||
783 | removed, &nremoved); | ||
784 | (void) hpsa_scsi_add_entry(h, hostno, sd[entry], | ||
785 | added, &nadded); | ||
786 | /* add can't fail, we just removed one. */ | ||
787 | sd[entry] = NULL; /* prevent it from being freed */ | ||
788 | } | ||
789 | i++; | ||
790 | } | ||
791 | |||
792 | /* Now, make sure every device listed in sd[] is also | ||
793 | * listed in h->dev[], adding them if they aren't found | ||
794 | */ | ||
795 | |||
796 | for (i = 0; i < nsds; i++) { | ||
797 | if (!sd[i]) /* if already added above. */ | ||
798 | continue; | ||
799 | device_change = hpsa_scsi_find_entry(sd[i], h->dev, | ||
800 | h->ndevices, &entry); | ||
801 | if (device_change == DEVICE_NOT_FOUND) { | ||
802 | changes++; | ||
803 | if (hpsa_scsi_add_entry(h, hostno, sd[i], | ||
804 | added, &nadded) != 0) | ||
805 | break; | ||
806 | sd[i] = NULL; /* prevent from being freed later. */ | ||
807 | } else if (device_change == DEVICE_CHANGED) { | ||
808 | /* should never happen... */ | ||
809 | changes++; | ||
810 | dev_warn(&h->pdev->dev, | ||
811 | "device unexpectedly changed.\n"); | ||
812 | /* but if it does happen, we just ignore that device */ | ||
813 | } | ||
814 | } | ||
815 | spin_unlock_irqrestore(&h->devlock, flags); | ||
816 | |||
817 | /* Don't notify scsi mid layer of any changes the first time through | ||
818 | * (or if there are no changes) scsi_scan_host will do it later the | ||
819 | * first time through. | ||
820 | */ | ||
821 | if (hostno == -1 || !changes) | ||
822 | goto free_and_out; | ||
823 | |||
824 | sh = h->scsi_host; | ||
825 | /* Notify scsi mid layer of any removed devices */ | ||
826 | for (i = 0; i < nremoved; i++) { | ||
827 | struct scsi_device *sdev = | ||
828 | scsi_device_lookup(sh, removed[i]->bus, | ||
829 | removed[i]->target, removed[i]->lun); | ||
830 | if (sdev != NULL) { | ||
831 | scsi_remove_device(sdev); | ||
832 | scsi_device_put(sdev); | ||
833 | } else { | ||
834 | /* We don't expect to get here. | ||
835 | * future cmds to this device will get selection | ||
836 | * timeout as if the device was gone. | ||
837 | */ | ||
838 | dev_warn(&h->pdev->dev, "didn't find c%db%dt%dl%d " | ||
839 | " for removal.", hostno, removed[i]->bus, | ||
840 | removed[i]->target, removed[i]->lun); | ||
841 | } | ||
842 | kfree(removed[i]); | ||
843 | removed[i] = NULL; | ||
844 | } | ||
845 | |||
846 | /* Notify scsi mid layer of any added devices */ | ||
847 | for (i = 0; i < nadded; i++) { | ||
848 | if (scsi_add_device(sh, added[i]->bus, | ||
849 | added[i]->target, added[i]->lun) == 0) | ||
850 | continue; | ||
851 | dev_warn(&h->pdev->dev, "scsi_add_device c%db%dt%dl%d failed, " | ||
852 | "device not added.\n", hostno, added[i]->bus, | ||
853 | added[i]->target, added[i]->lun); | ||
854 | /* now we have to remove it from h->dev, | ||
855 | * since it didn't get added to scsi mid layer | ||
856 | */ | ||
857 | fixup_botched_add(h, added[i]); | ||
858 | } | ||
859 | |||
860 | free_and_out: | ||
861 | kfree(added); | ||
862 | kfree(removed); | ||
863 | return 0; | ||
864 | } | ||
865 | |||
866 | /* | ||
867 | * Lookup bus/target/lun and retrun corresponding struct hpsa_scsi_dev_t * | ||
868 | * Assume's h->devlock is held. | ||
869 | */ | ||
870 | static struct hpsa_scsi_dev_t *lookup_hpsa_scsi_dev(struct ctlr_info *h, | ||
871 | int bus, int target, int lun) | ||
872 | { | ||
873 | int i; | ||
874 | struct hpsa_scsi_dev_t *sd; | ||
875 | |||
876 | for (i = 0; i < h->ndevices; i++) { | ||
877 | sd = h->dev[i]; | ||
878 | if (sd->bus == bus && sd->target == target && sd->lun == lun) | ||
879 | return sd; | ||
880 | } | ||
881 | return NULL; | ||
882 | } | ||
883 | |||
884 | /* link sdev->hostdata to our per-device structure. */ | ||
885 | static int hpsa_slave_alloc(struct scsi_device *sdev) | ||
886 | { | ||
887 | struct hpsa_scsi_dev_t *sd; | ||
888 | unsigned long flags; | ||
889 | struct ctlr_info *h; | ||
890 | |||
891 | h = sdev_to_hba(sdev); | ||
892 | spin_lock_irqsave(&h->devlock, flags); | ||
893 | sd = lookup_hpsa_scsi_dev(h, sdev_channel(sdev), | ||
894 | sdev_id(sdev), sdev->lun); | ||
895 | if (sd != NULL) | ||
896 | sdev->hostdata = sd; | ||
897 | spin_unlock_irqrestore(&h->devlock, flags); | ||
898 | return 0; | ||
899 | } | ||
900 | |||
901 | static void hpsa_slave_destroy(struct scsi_device *sdev) | ||
902 | { | ||
903 | return; /* nothing to do. */ | ||
904 | } | ||
905 | |||
906 | static void hpsa_scsi_setup(struct ctlr_info *h) | ||
907 | { | ||
908 | h->ndevices = 0; | ||
909 | h->scsi_host = NULL; | ||
910 | spin_lock_init(&h->devlock); | ||
911 | return; | ||
912 | } | ||
913 | |||
914 | static void complete_scsi_command(struct CommandList *cp, | ||
915 | int timeout, __u32 tag) | ||
916 | { | ||
917 | struct scsi_cmnd *cmd; | ||
918 | struct ctlr_info *h; | ||
919 | struct ErrorInfo *ei; | ||
920 | |||
921 | unsigned char sense_key; | ||
922 | unsigned char asc; /* additional sense code */ | ||
923 | unsigned char ascq; /* additional sense code qualifier */ | ||
924 | |||
925 | ei = cp->err_info; | ||
926 | cmd = (struct scsi_cmnd *) cp->scsi_cmd; | ||
927 | h = cp->h; | ||
928 | |||
929 | scsi_dma_unmap(cmd); /* undo the DMA mappings */ | ||
930 | |||
931 | cmd->result = (DID_OK << 16); /* host byte */ | ||
932 | cmd->result |= (COMMAND_COMPLETE << 8); /* msg byte */ | ||
933 | cmd->result |= (ei->ScsiStatus << 1); | ||
934 | |||
935 | /* copy the sense data whether we need to or not. */ | ||
936 | memcpy(cmd->sense_buffer, ei->SenseInfo, | ||
937 | ei->SenseLen > SCSI_SENSE_BUFFERSIZE ? | ||
938 | SCSI_SENSE_BUFFERSIZE : | ||
939 | ei->SenseLen); | ||
940 | scsi_set_resid(cmd, ei->ResidualCnt); | ||
941 | |||
942 | if (ei->CommandStatus == 0) { | ||
943 | cmd->scsi_done(cmd); | ||
944 | cmd_free(h, cp); | ||
945 | return; | ||
946 | } | ||
947 | |||
948 | /* an error has occurred */ | ||
949 | switch (ei->CommandStatus) { | ||
950 | |||
951 | case CMD_TARGET_STATUS: | ||
952 | if (ei->ScsiStatus) { | ||
953 | /* Get sense key */ | ||
954 | sense_key = 0xf & ei->SenseInfo[2]; | ||
955 | /* Get additional sense code */ | ||
956 | asc = ei->SenseInfo[12]; | ||
957 | /* Get addition sense code qualifier */ | ||
958 | ascq = ei->SenseInfo[13]; | ||
959 | } | ||
960 | |||
961 | if (ei->ScsiStatus == SAM_STAT_CHECK_CONDITION) { | ||
962 | if (check_for_unit_attention(h, cp)) { | ||
963 | cmd->result = DID_SOFT_ERROR << 16; | ||
964 | break; | ||
965 | } | ||
966 | if (sense_key == ILLEGAL_REQUEST) { | ||
967 | /* | ||
968 | * SCSI REPORT_LUNS is commonly unsupported on | ||
969 | * Smart Array. Suppress noisy complaint. | ||
970 | */ | ||
971 | if (cp->Request.CDB[0] == REPORT_LUNS) | ||
972 | break; | ||
973 | |||
974 | /* If ASC/ASCQ indicate Logical Unit | ||
975 | * Not Supported condition, | ||
976 | */ | ||
977 | if ((asc == 0x25) && (ascq == 0x0)) { | ||
978 | dev_warn(&h->pdev->dev, "cp %p " | ||
979 | "has check condition\n", cp); | ||
980 | break; | ||
981 | } | ||
982 | } | ||
983 | |||
984 | if (sense_key == NOT_READY) { | ||
985 | /* If Sense is Not Ready, Logical Unit | ||
986 | * Not ready, Manual Intervention | ||
987 | * required | ||
988 | */ | ||
989 | if ((asc == 0x04) && (ascq == 0x03)) { | ||
990 | cmd->result = DID_NO_CONNECT << 16; | ||
991 | dev_warn(&h->pdev->dev, "cp %p " | ||
992 | "has check condition: unit " | ||
993 | "not ready, manual " | ||
994 | "intervention required\n", cp); | ||
995 | break; | ||
996 | } | ||
997 | } | ||
998 | |||
999 | |||
1000 | /* Must be some other type of check condition */ | ||
1001 | dev_warn(&h->pdev->dev, "cp %p has check condition: " | ||
1002 | "unknown type: " | ||
1003 | "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " | ||
1004 | "Returning result: 0x%x, " | ||
1005 | "cmd=[%02x %02x %02x %02x %02x " | ||
1006 | "%02x %02x %02x %02x %02x]\n", | ||
1007 | cp, sense_key, asc, ascq, | ||
1008 | cmd->result, | ||
1009 | cmd->cmnd[0], cmd->cmnd[1], | ||
1010 | cmd->cmnd[2], cmd->cmnd[3], | ||
1011 | cmd->cmnd[4], cmd->cmnd[5], | ||
1012 | cmd->cmnd[6], cmd->cmnd[7], | ||
1013 | cmd->cmnd[8], cmd->cmnd[9]); | ||
1014 | break; | ||
1015 | } | ||
1016 | |||
1017 | |||
1018 | /* Problem was not a check condition | ||
1019 | * Pass it up to the upper layers... | ||
1020 | */ | ||
1021 | if (ei->ScsiStatus) { | ||
1022 | dev_warn(&h->pdev->dev, "cp %p has status 0x%x " | ||
1023 | "Sense: 0x%x, ASC: 0x%x, ASCQ: 0x%x, " | ||
1024 | "Returning result: 0x%x\n", | ||
1025 | cp, ei->ScsiStatus, | ||
1026 | sense_key, asc, ascq, | ||
1027 | cmd->result); | ||
1028 | } else { /* scsi status is zero??? How??? */ | ||
1029 | dev_warn(&h->pdev->dev, "cp %p SCSI status was 0. " | ||
1030 | "Returning no connection.\n", cp), | ||
1031 | |||
1032 | /* Ordinarily, this case should never happen, | ||
1033 | * but there is a bug in some released firmware | ||
1034 | * revisions that allows it to happen if, for | ||
1035 | * example, a 4100 backplane loses power and | ||
1036 | * the tape drive is in it. We assume that | ||
1037 | * it's a fatal error of some kind because we | ||
1038 | * can't show that it wasn't. We will make it | ||
1039 | * look like selection timeout since that is | ||
1040 | * the most common reason for this to occur, | ||
1041 | * and it's severe enough. | ||
1042 | */ | ||
1043 | |||
1044 | cmd->result = DID_NO_CONNECT << 16; | ||
1045 | } | ||
1046 | break; | ||
1047 | |||
1048 | case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ | ||
1049 | break; | ||
1050 | case CMD_DATA_OVERRUN: | ||
1051 | dev_warn(&h->pdev->dev, "cp %p has" | ||
1052 | " completed with data overrun " | ||
1053 | "reported\n", cp); | ||
1054 | break; | ||
1055 | case CMD_INVALID: { | ||
1056 | /* print_bytes(cp, sizeof(*cp), 1, 0); | ||
1057 | print_cmd(cp); */ | ||
1058 | /* We get CMD_INVALID if you address a non-existent device | ||
1059 | * instead of a selection timeout (no response). You will | ||
1060 | * see this if you yank out a drive, then try to access it. | ||
1061 | * This is kind of a shame because it means that any other | ||
1062 | * CMD_INVALID (e.g. driver bug) will get interpreted as a | ||
1063 | * missing target. */ | ||
1064 | cmd->result = DID_NO_CONNECT << 16; | ||
1065 | } | ||
1066 | break; | ||
1067 | case CMD_PROTOCOL_ERR: | ||
1068 | dev_warn(&h->pdev->dev, "cp %p has " | ||
1069 | "protocol error \n", cp); | ||
1070 | break; | ||
1071 | case CMD_HARDWARE_ERR: | ||
1072 | cmd->result = DID_ERROR << 16; | ||
1073 | dev_warn(&h->pdev->dev, "cp %p had hardware error\n", cp); | ||
1074 | break; | ||
1075 | case CMD_CONNECTION_LOST: | ||
1076 | cmd->result = DID_ERROR << 16; | ||
1077 | dev_warn(&h->pdev->dev, "cp %p had connection lost\n", cp); | ||
1078 | break; | ||
1079 | case CMD_ABORTED: | ||
1080 | cmd->result = DID_ABORT << 16; | ||
1081 | dev_warn(&h->pdev->dev, "cp %p was aborted with status 0x%x\n", | ||
1082 | cp, ei->ScsiStatus); | ||
1083 | break; | ||
1084 | case CMD_ABORT_FAILED: | ||
1085 | cmd->result = DID_ERROR << 16; | ||
1086 | dev_warn(&h->pdev->dev, "cp %p reports abort failed\n", cp); | ||
1087 | break; | ||
1088 | case CMD_UNSOLICITED_ABORT: | ||
1089 | cmd->result = DID_ABORT << 16; | ||
1090 | dev_warn(&h->pdev->dev, "cp %p aborted do to an unsolicited " | ||
1091 | "abort\n", cp); | ||
1092 | break; | ||
1093 | case CMD_TIMEOUT: | ||
1094 | cmd->result = DID_TIME_OUT << 16; | ||
1095 | dev_warn(&h->pdev->dev, "cp %p timedout\n", cp); | ||
1096 | break; | ||
1097 | default: | ||
1098 | cmd->result = DID_ERROR << 16; | ||
1099 | dev_warn(&h->pdev->dev, "cp %p returned unknown status %x\n", | ||
1100 | cp, ei->CommandStatus); | ||
1101 | } | ||
1102 | cmd->scsi_done(cmd); | ||
1103 | cmd_free(h, cp); | ||
1104 | } | ||
1105 | |||
1106 | static int hpsa_scsi_detect(struct ctlr_info *h) | ||
1107 | { | ||
1108 | struct Scsi_Host *sh; | ||
1109 | int error; | ||
1110 | |||
1111 | sh = scsi_host_alloc(&hpsa_driver_template, sizeof(h)); | ||
1112 | if (sh == NULL) | ||
1113 | goto fail; | ||
1114 | |||
1115 | sh->io_port = 0; | ||
1116 | sh->n_io_port = 0; | ||
1117 | sh->this_id = -1; | ||
1118 | sh->max_channel = 3; | ||
1119 | sh->max_cmd_len = MAX_COMMAND_SIZE; | ||
1120 | sh->max_lun = HPSA_MAX_LUN; | ||
1121 | sh->max_id = HPSA_MAX_LUN; | ||
1122 | h->scsi_host = sh; | ||
1123 | sh->hostdata[0] = (unsigned long) h; | ||
1124 | sh->irq = h->intr[SIMPLE_MODE_INT]; | ||
1125 | sh->unique_id = sh->irq; | ||
1126 | error = scsi_add_host(sh, &h->pdev->dev); | ||
1127 | if (error) | ||
1128 | goto fail_host_put; | ||
1129 | scsi_scan_host(sh); | ||
1130 | return 0; | ||
1131 | |||
1132 | fail_host_put: | ||
1133 | dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_add_host" | ||
1134 | " failed for controller %d\n", h->ctlr); | ||
1135 | scsi_host_put(sh); | ||
1136 | return -1; | ||
1137 | fail: | ||
1138 | dev_err(&h->pdev->dev, "hpsa_scsi_detect: scsi_host_alloc" | ||
1139 | " failed for controller %d\n", h->ctlr); | ||
1140 | return -1; | ||
1141 | } | ||
1142 | |||
1143 | static void hpsa_pci_unmap(struct pci_dev *pdev, | ||
1144 | struct CommandList *c, int sg_used, int data_direction) | ||
1145 | { | ||
1146 | int i; | ||
1147 | union u64bit addr64; | ||
1148 | |||
1149 | for (i = 0; i < sg_used; i++) { | ||
1150 | addr64.val32.lower = c->SG[i].Addr.lower; | ||
1151 | addr64.val32.upper = c->SG[i].Addr.upper; | ||
1152 | pci_unmap_single(pdev, (dma_addr_t) addr64.val, c->SG[i].Len, | ||
1153 | data_direction); | ||
1154 | } | ||
1155 | } | ||
1156 | |||
1157 | static void hpsa_map_one(struct pci_dev *pdev, | ||
1158 | struct CommandList *cp, | ||
1159 | unsigned char *buf, | ||
1160 | size_t buflen, | ||
1161 | int data_direction) | ||
1162 | { | ||
1163 | __u64 addr64; | ||
1164 | |||
1165 | if (buflen == 0 || data_direction == PCI_DMA_NONE) { | ||
1166 | cp->Header.SGList = 0; | ||
1167 | cp->Header.SGTotal = 0; | ||
1168 | return; | ||
1169 | } | ||
1170 | |||
1171 | addr64 = (__u64) pci_map_single(pdev, buf, buflen, data_direction); | ||
1172 | cp->SG[0].Addr.lower = | ||
1173 | (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF); | ||
1174 | cp->SG[0].Addr.upper = | ||
1175 | (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF); | ||
1176 | cp->SG[0].Len = buflen; | ||
1177 | cp->Header.SGList = (__u8) 1; /* no. SGs contig in this cmd */ | ||
1178 | cp->Header.SGTotal = (__u16) 1; /* total sgs in this cmd list */ | ||
1179 | } | ||
1180 | |||
1181 | static inline void hpsa_scsi_do_simple_cmd_core(struct ctlr_info *h, | ||
1182 | struct CommandList *c) | ||
1183 | { | ||
1184 | DECLARE_COMPLETION_ONSTACK(wait); | ||
1185 | |||
1186 | c->waiting = &wait; | ||
1187 | enqueue_cmd_and_start_io(h, c); | ||
1188 | wait_for_completion(&wait); | ||
1189 | } | ||
1190 | |||
1191 | static void hpsa_scsi_do_simple_cmd_with_retry(struct ctlr_info *h, | ||
1192 | struct CommandList *c, int data_direction) | ||
1193 | { | ||
1194 | int retry_count = 0; | ||
1195 | |||
1196 | do { | ||
1197 | memset(c->err_info, 0, sizeof(c->err_info)); | ||
1198 | hpsa_scsi_do_simple_cmd_core(h, c); | ||
1199 | retry_count++; | ||
1200 | } while (check_for_unit_attention(h, c) && retry_count <= 3); | ||
1201 | hpsa_pci_unmap(h->pdev, c, 1, data_direction); | ||
1202 | } | ||
1203 | |||
1204 | static void hpsa_scsi_interpret_error(struct CommandList *cp) | ||
1205 | { | ||
1206 | struct ErrorInfo *ei; | ||
1207 | struct device *d = &cp->h->pdev->dev; | ||
1208 | |||
1209 | ei = cp->err_info; | ||
1210 | switch (ei->CommandStatus) { | ||
1211 | case CMD_TARGET_STATUS: | ||
1212 | dev_warn(d, "cmd %p has completed with errors\n", cp); | ||
1213 | dev_warn(d, "cmd %p has SCSI Status = %x\n", cp, | ||
1214 | ei->ScsiStatus); | ||
1215 | if (ei->ScsiStatus == 0) | ||
1216 | dev_warn(d, "SCSI status is abnormally zero. " | ||
1217 | "(probably indicates selection timeout " | ||
1218 | "reported incorrectly due to a known " | ||
1219 | "firmware bug, circa July, 2001.)\n"); | ||
1220 | break; | ||
1221 | case CMD_DATA_UNDERRUN: /* let mid layer handle it. */ | ||
1222 | dev_info(d, "UNDERRUN\n"); | ||
1223 | break; | ||
1224 | case CMD_DATA_OVERRUN: | ||
1225 | dev_warn(d, "cp %p has completed with data overrun\n", cp); | ||
1226 | break; | ||
1227 | case CMD_INVALID: { | ||
1228 | /* controller unfortunately reports SCSI passthru's | ||
1229 | * to non-existent targets as invalid commands. | ||
1230 | */ | ||
1231 | dev_warn(d, "cp %p is reported invalid (probably means " | ||
1232 | "target device no longer present)\n", cp); | ||
1233 | /* print_bytes((unsigned char *) cp, sizeof(*cp), 1, 0); | ||
1234 | print_cmd(cp); */ | ||
1235 | } | ||
1236 | break; | ||
1237 | case CMD_PROTOCOL_ERR: | ||
1238 | dev_warn(d, "cp %p has protocol error \n", cp); | ||
1239 | break; | ||
1240 | case CMD_HARDWARE_ERR: | ||
1241 | /* cmd->result = DID_ERROR << 16; */ | ||
1242 | dev_warn(d, "cp %p had hardware error\n", cp); | ||
1243 | break; | ||
1244 | case CMD_CONNECTION_LOST: | ||
1245 | dev_warn(d, "cp %p had connection lost\n", cp); | ||
1246 | break; | ||
1247 | case CMD_ABORTED: | ||
1248 | dev_warn(d, "cp %p was aborted\n", cp); | ||
1249 | break; | ||
1250 | case CMD_ABORT_FAILED: | ||
1251 | dev_warn(d, "cp %p reports abort failed\n", cp); | ||
1252 | break; | ||
1253 | case CMD_UNSOLICITED_ABORT: | ||
1254 | dev_warn(d, "cp %p aborted due to an unsolicited abort\n", cp); | ||
1255 | break; | ||
1256 | case CMD_TIMEOUT: | ||
1257 | dev_warn(d, "cp %p timed out\n", cp); | ||
1258 | break; | ||
1259 | default: | ||
1260 | dev_warn(d, "cp %p returned unknown status %x\n", cp, | ||
1261 | ei->CommandStatus); | ||
1262 | } | ||
1263 | } | ||
1264 | |||
1265 | static int hpsa_scsi_do_inquiry(struct ctlr_info *h, unsigned char *scsi3addr, | ||
1266 | unsigned char page, unsigned char *buf, | ||
1267 | unsigned char bufsize) | ||
1268 | { | ||
1269 | int rc = IO_OK; | ||
1270 | struct CommandList *c; | ||
1271 | struct ErrorInfo *ei; | ||
1272 | |||
1273 | c = cmd_special_alloc(h); | ||
1274 | |||
1275 | if (c == NULL) { /* trouble... */ | ||
1276 | dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | ||
1277 | return -1; | ||
1278 | } | ||
1279 | |||
1280 | fill_cmd(c, HPSA_INQUIRY, h, buf, bufsize, page, scsi3addr, TYPE_CMD); | ||
1281 | hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); | ||
1282 | ei = c->err_info; | ||
1283 | if (ei->CommandStatus != 0 && ei->CommandStatus != CMD_DATA_UNDERRUN) { | ||
1284 | hpsa_scsi_interpret_error(c); | ||
1285 | rc = -1; | ||
1286 | } | ||
1287 | cmd_special_free(h, c); | ||
1288 | return rc; | ||
1289 | } | ||
1290 | |||
1291 | static int hpsa_send_reset(struct ctlr_info *h, unsigned char *scsi3addr) | ||
1292 | { | ||
1293 | int rc = IO_OK; | ||
1294 | struct CommandList *c; | ||
1295 | struct ErrorInfo *ei; | ||
1296 | |||
1297 | c = cmd_special_alloc(h); | ||
1298 | |||
1299 | if (c == NULL) { /* trouble... */ | ||
1300 | dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | ||
1301 | return -1; | ||
1302 | } | ||
1303 | |||
1304 | fill_cmd(c, HPSA_DEVICE_RESET_MSG, h, NULL, 0, 0, scsi3addr, TYPE_MSG); | ||
1305 | hpsa_scsi_do_simple_cmd_core(h, c); | ||
1306 | /* no unmap needed here because no data xfer. */ | ||
1307 | |||
1308 | ei = c->err_info; | ||
1309 | if (ei->CommandStatus != 0) { | ||
1310 | hpsa_scsi_interpret_error(c); | ||
1311 | rc = -1; | ||
1312 | } | ||
1313 | cmd_special_free(h, c); | ||
1314 | return rc; | ||
1315 | } | ||
1316 | |||
1317 | static void hpsa_get_raid_level(struct ctlr_info *h, | ||
1318 | unsigned char *scsi3addr, unsigned char *raid_level) | ||
1319 | { | ||
1320 | int rc; | ||
1321 | unsigned char *buf; | ||
1322 | |||
1323 | *raid_level = RAID_UNKNOWN; | ||
1324 | buf = kzalloc(64, GFP_KERNEL); | ||
1325 | if (!buf) | ||
1326 | return; | ||
1327 | rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0xC1, buf, 64); | ||
1328 | if (rc == 0) | ||
1329 | *raid_level = buf[8]; | ||
1330 | if (*raid_level > RAID_UNKNOWN) | ||
1331 | *raid_level = RAID_UNKNOWN; | ||
1332 | kfree(buf); | ||
1333 | return; | ||
1334 | } | ||
1335 | |||
1336 | /* Get the device id from inquiry page 0x83 */ | ||
1337 | static int hpsa_get_device_id(struct ctlr_info *h, unsigned char *scsi3addr, | ||
1338 | unsigned char *device_id, int buflen) | ||
1339 | { | ||
1340 | int rc; | ||
1341 | unsigned char *buf; | ||
1342 | |||
1343 | if (buflen > 16) | ||
1344 | buflen = 16; | ||
1345 | buf = kzalloc(64, GFP_KERNEL); | ||
1346 | if (!buf) | ||
1347 | return -1; | ||
1348 | rc = hpsa_scsi_do_inquiry(h, scsi3addr, 0x83, buf, 64); | ||
1349 | if (rc == 0) | ||
1350 | memcpy(device_id, &buf[8], buflen); | ||
1351 | kfree(buf); | ||
1352 | return rc != 0; | ||
1353 | } | ||
1354 | |||
1355 | static int hpsa_scsi_do_report_luns(struct ctlr_info *h, int logical, | ||
1356 | struct ReportLUNdata *buf, int bufsize, | ||
1357 | int extended_response) | ||
1358 | { | ||
1359 | int rc = IO_OK; | ||
1360 | struct CommandList *c; | ||
1361 | unsigned char scsi3addr[8]; | ||
1362 | struct ErrorInfo *ei; | ||
1363 | |||
1364 | c = cmd_special_alloc(h); | ||
1365 | if (c == NULL) { /* trouble... */ | ||
1366 | dev_err(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | ||
1367 | return -1; | ||
1368 | } | ||
1369 | |||
1370 | memset(&scsi3addr[0], 0, 8); /* address the controller */ | ||
1371 | |||
1372 | fill_cmd(c, logical ? HPSA_REPORT_LOG : HPSA_REPORT_PHYS, h, | ||
1373 | buf, bufsize, 0, scsi3addr, TYPE_CMD); | ||
1374 | if (extended_response) | ||
1375 | c->Request.CDB[1] = extended_response; | ||
1376 | hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_FROMDEVICE); | ||
1377 | ei = c->err_info; | ||
1378 | if (ei->CommandStatus != 0 && | ||
1379 | ei->CommandStatus != CMD_DATA_UNDERRUN) { | ||
1380 | hpsa_scsi_interpret_error(c); | ||
1381 | rc = -1; | ||
1382 | } | ||
1383 | cmd_special_free(h, c); | ||
1384 | return rc; | ||
1385 | } | ||
1386 | |||
1387 | static inline int hpsa_scsi_do_report_phys_luns(struct ctlr_info *h, | ||
1388 | struct ReportLUNdata *buf, | ||
1389 | int bufsize, int extended_response) | ||
1390 | { | ||
1391 | return hpsa_scsi_do_report_luns(h, 0, buf, bufsize, extended_response); | ||
1392 | } | ||
1393 | |||
1394 | static inline int hpsa_scsi_do_report_log_luns(struct ctlr_info *h, | ||
1395 | struct ReportLUNdata *buf, int bufsize) | ||
1396 | { | ||
1397 | return hpsa_scsi_do_report_luns(h, 1, buf, bufsize, 0); | ||
1398 | } | ||
1399 | |||
1400 | static inline void hpsa_set_bus_target_lun(struct hpsa_scsi_dev_t *device, | ||
1401 | int bus, int target, int lun) | ||
1402 | { | ||
1403 | device->bus = bus; | ||
1404 | device->target = target; | ||
1405 | device->lun = lun; | ||
1406 | } | ||
1407 | |||
1408 | static int hpsa_update_device_info(struct ctlr_info *h, | ||
1409 | unsigned char scsi3addr[], struct hpsa_scsi_dev_t *this_device) | ||
1410 | { | ||
1411 | #define OBDR_TAPE_INQ_SIZE 49 | ||
1412 | unsigned char *inq_buff = NULL; | ||
1413 | |||
1414 | inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); | ||
1415 | if (!inq_buff) | ||
1416 | goto bail_out; | ||
1417 | |||
1418 | memset(inq_buff, 0, OBDR_TAPE_INQ_SIZE); | ||
1419 | /* Do an inquiry to the device to see what it is. */ | ||
1420 | if (hpsa_scsi_do_inquiry(h, scsi3addr, 0, inq_buff, | ||
1421 | (unsigned char) OBDR_TAPE_INQ_SIZE) != 0) { | ||
1422 | /* Inquiry failed (msg printed already) */ | ||
1423 | dev_err(&h->pdev->dev, | ||
1424 | "hpsa_update_device_info: inquiry failed\n"); | ||
1425 | goto bail_out; | ||
1426 | } | ||
1427 | |||
1428 | /* As a side effect, record the firmware version number | ||
1429 | * if we happen to be talking to the RAID controller. | ||
1430 | */ | ||
1431 | if (is_hba_lunid(scsi3addr)) | ||
1432 | memcpy(h->firm_ver, &inq_buff[32], 4); | ||
1433 | |||
1434 | this_device->devtype = (inq_buff[0] & 0x1f); | ||
1435 | memcpy(this_device->scsi3addr, scsi3addr, 8); | ||
1436 | memcpy(this_device->vendor, &inq_buff[8], | ||
1437 | sizeof(this_device->vendor)); | ||
1438 | memcpy(this_device->model, &inq_buff[16], | ||
1439 | sizeof(this_device->model)); | ||
1440 | memcpy(this_device->revision, &inq_buff[32], | ||
1441 | sizeof(this_device->revision)); | ||
1442 | memset(this_device->device_id, 0, | ||
1443 | sizeof(this_device->device_id)); | ||
1444 | hpsa_get_device_id(h, scsi3addr, this_device->device_id, | ||
1445 | sizeof(this_device->device_id)); | ||
1446 | |||
1447 | if (this_device->devtype == TYPE_DISK && | ||
1448 | is_logical_dev_addr_mode(scsi3addr)) | ||
1449 | hpsa_get_raid_level(h, scsi3addr, &this_device->raid_level); | ||
1450 | else | ||
1451 | this_device->raid_level = RAID_UNKNOWN; | ||
1452 | |||
1453 | kfree(inq_buff); | ||
1454 | return 0; | ||
1455 | |||
1456 | bail_out: | ||
1457 | kfree(inq_buff); | ||
1458 | return 1; | ||
1459 | } | ||
1460 | |||
1461 | static unsigned char *msa2xxx_model[] = { | ||
1462 | "MSA2012", | ||
1463 | "MSA2024", | ||
1464 | "MSA2312", | ||
1465 | "MSA2324", | ||
1466 | NULL, | ||
1467 | }; | ||
1468 | |||
1469 | static int is_msa2xxx(struct ctlr_info *h, struct hpsa_scsi_dev_t *device) | ||
1470 | { | ||
1471 | int i; | ||
1472 | |||
1473 | for (i = 0; msa2xxx_model[i]; i++) | ||
1474 | if (strncmp(device->model, msa2xxx_model[i], | ||
1475 | strlen(msa2xxx_model[i])) == 0) | ||
1476 | return 1; | ||
1477 | return 0; | ||
1478 | } | ||
1479 | |||
1480 | /* Helper function to assign bus, target, lun mapping of devices. | ||
1481 | * Puts non-msa2xxx logical volumes on bus 0, msa2xxx logical | ||
1482 | * volumes on bus 1, physical devices on bus 2. and the hba on bus 3. | ||
1483 | * Logical drive target and lun are assigned at this time, but | ||
1484 | * physical device lun and target assignment are deferred (assigned | ||
1485 | * in hpsa_find_target_lun, called by hpsa_scsi_add_entry.) | ||
1486 | */ | ||
1487 | static void figure_bus_target_lun(struct ctlr_info *h, | ||
1488 | __u8 *lunaddrbytes, int *bus, int *target, int *lun, | ||
1489 | struct hpsa_scsi_dev_t *device) | ||
1490 | { | ||
1491 | |||
1492 | __u32 lunid; | ||
1493 | |||
1494 | if (is_logical_dev_addr_mode(lunaddrbytes)) { | ||
1495 | /* logical device */ | ||
1496 | memcpy(&lunid, lunaddrbytes, sizeof(lunid)); | ||
1497 | lunid = le32_to_cpu(lunid); | ||
1498 | |||
1499 | if (is_msa2xxx(h, device)) { | ||
1500 | *bus = 1; | ||
1501 | *target = (lunid >> 16) & 0x3fff; | ||
1502 | *lun = lunid & 0x00ff; | ||
1503 | } else { | ||
1504 | *bus = 0; | ||
1505 | *lun = 0; | ||
1506 | *target = lunid & 0x3fff; | ||
1507 | } | ||
1508 | } else { | ||
1509 | /* physical device */ | ||
1510 | if (is_hba_lunid(lunaddrbytes)) | ||
1511 | *bus = 3; | ||
1512 | else | ||
1513 | *bus = 2; | ||
1514 | *target = -1; | ||
1515 | *lun = -1; /* we will fill these in later. */ | ||
1516 | } | ||
1517 | } | ||
1518 | |||
1519 | /* | ||
1520 | * If there is no lun 0 on a target, linux won't find any devices. | ||
1521 | * For the MSA2xxx boxes, we have to manually detect the enclosure | ||
1522 | * which is at lun zero, as CCISS_REPORT_PHYSICAL_LUNS doesn't report | ||
1523 | * it for some reason. *tmpdevice is the target we're adding, | ||
1524 | * this_device is a pointer into the current element of currentsd[] | ||
1525 | * that we're building up in update_scsi_devices(), below. | ||
1526 | * lunzerobits is a bitmap that tracks which targets already have a | ||
1527 | * lun 0 assigned. | ||
1528 | * Returns 1 if an enclosure was added, 0 if not. | ||
1529 | */ | ||
1530 | static int add_msa2xxx_enclosure_device(struct ctlr_info *h, | ||
1531 | struct hpsa_scsi_dev_t *tmpdevice, | ||
1532 | struct hpsa_scsi_dev_t *this_device, __u8 *lunaddrbytes, | ||
1533 | int bus, int target, int lun, unsigned long lunzerobits[], | ||
1534 | int *nmsa2xxx_enclosures) | ||
1535 | { | ||
1536 | unsigned char scsi3addr[8]; | ||
1537 | |||
1538 | if (test_bit(target, lunzerobits)) | ||
1539 | return 0; /* There is already a lun 0 on this target. */ | ||
1540 | |||
1541 | if (!is_logical_dev_addr_mode(lunaddrbytes)) | ||
1542 | return 0; /* It's the logical targets that may lack lun 0. */ | ||
1543 | |||
1544 | if (!is_msa2xxx(h, tmpdevice)) | ||
1545 | return 0; /* It's only the MSA2xxx that have this problem. */ | ||
1546 | |||
1547 | if (lun == 0) /* if lun is 0, then obviously we have a lun 0. */ | ||
1548 | return 0; | ||
1549 | |||
1550 | if (is_hba_lunid(scsi3addr)) | ||
1551 | return 0; /* Don't add the RAID controller here. */ | ||
1552 | |||
1553 | #define MAX_MSA2XXX_ENCLOSURES 32 | ||
1554 | if (*nmsa2xxx_enclosures >= MAX_MSA2XXX_ENCLOSURES) { | ||
1555 | dev_warn(&h->pdev->dev, "Maximum number of MSA2XXX " | ||
1556 | "enclosures exceeded. Check your hardware " | ||
1557 | "configuration."); | ||
1558 | return 0; | ||
1559 | } | ||
1560 | |||
1561 | memset(scsi3addr, 0, 8); | ||
1562 | scsi3addr[3] = target; | ||
1563 | if (hpsa_update_device_info(h, scsi3addr, this_device)) | ||
1564 | return 0; | ||
1565 | (*nmsa2xxx_enclosures)++; | ||
1566 | hpsa_set_bus_target_lun(this_device, bus, target, 0); | ||
1567 | set_bit(target, lunzerobits); | ||
1568 | return 1; | ||
1569 | } | ||
1570 | |||
1571 | /* | ||
1572 | * Do CISS_REPORT_PHYS and CISS_REPORT_LOG. Data is returned in physdev, | ||
1573 | * logdev. The number of luns in physdev and logdev are returned in | ||
1574 | * *nphysicals and *nlogicals, respectively. | ||
1575 | * Returns 0 on success, -1 otherwise. | ||
1576 | */ | ||
1577 | static int hpsa_gather_lun_info(struct ctlr_info *h, | ||
1578 | int reportlunsize, | ||
1579 | struct ReportLUNdata *physdev, __u32 *nphysicals, | ||
1580 | struct ReportLUNdata *logdev, __u32 *nlogicals) | ||
1581 | { | ||
1582 | if (hpsa_scsi_do_report_phys_luns(h, physdev, reportlunsize, 0)) { | ||
1583 | dev_err(&h->pdev->dev, "report physical LUNs failed.\n"); | ||
1584 | return -1; | ||
1585 | } | ||
1586 | memcpy(nphysicals, &physdev->LUNListLength[0], sizeof(*nphysicals)); | ||
1587 | *nphysicals = be32_to_cpu(*nphysicals) / 8; | ||
1588 | #ifdef DEBUG | ||
1589 | dev_info(&h->pdev->dev, "number of physical luns is %d\n", *nphysicals); | ||
1590 | #endif | ||
1591 | if (*nphysicals > HPSA_MAX_PHYS_LUN) { | ||
1592 | dev_warn(&h->pdev->dev, "maximum physical LUNs (%d) exceeded." | ||
1593 | " %d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, | ||
1594 | *nphysicals - HPSA_MAX_PHYS_LUN); | ||
1595 | *nphysicals = HPSA_MAX_PHYS_LUN; | ||
1596 | } | ||
1597 | if (hpsa_scsi_do_report_log_luns(h, logdev, reportlunsize)) { | ||
1598 | dev_err(&h->pdev->dev, "report logical LUNs failed.\n"); | ||
1599 | return -1; | ||
1600 | } | ||
1601 | memcpy(nlogicals, &logdev->LUNListLength[0], sizeof(*nlogicals)); | ||
1602 | *nlogicals = be32_to_cpu(*nlogicals) / 8; | ||
1603 | #ifdef DEBUG | ||
1604 | dev_info(&h->pdev->dev, "number of logical luns is %d\n", *nlogicals); | ||
1605 | #endif | ||
1606 | /* Reject Logicals in excess of our max capability. */ | ||
1607 | if (*nlogicals > HPSA_MAX_LUN) { | ||
1608 | dev_warn(&h->pdev->dev, | ||
1609 | "maximum logical LUNs (%d) exceeded. " | ||
1610 | "%d LUNs ignored.\n", HPSA_MAX_LUN, | ||
1611 | *nlogicals - HPSA_MAX_LUN); | ||
1612 | *nlogicals = HPSA_MAX_LUN; | ||
1613 | } | ||
1614 | if (*nlogicals + *nphysicals > HPSA_MAX_PHYS_LUN) { | ||
1615 | dev_warn(&h->pdev->dev, | ||
1616 | "maximum logical + physical LUNs (%d) exceeded. " | ||
1617 | "%d LUNs ignored.\n", HPSA_MAX_PHYS_LUN, | ||
1618 | *nphysicals + *nlogicals - HPSA_MAX_PHYS_LUN); | ||
1619 | *nlogicals = HPSA_MAX_PHYS_LUN - *nphysicals; | ||
1620 | } | ||
1621 | return 0; | ||
1622 | } | ||
1623 | |||
1624 | static void hpsa_update_scsi_devices(struct ctlr_info *h, int hostno) | ||
1625 | { | ||
1626 | /* the idea here is we could get notified | ||
1627 | * that some devices have changed, so we do a report | ||
1628 | * physical luns and report logical luns cmd, and adjust | ||
1629 | * our list of devices accordingly. | ||
1630 | * | ||
1631 | * The scsi3addr's of devices won't change so long as the | ||
1632 | * adapter is not reset. That means we can rescan and | ||
1633 | * tell which devices we already know about, vs. new | ||
1634 | * devices, vs. disappearing devices. | ||
1635 | */ | ||
1636 | struct ReportLUNdata *physdev_list = NULL; | ||
1637 | struct ReportLUNdata *logdev_list = NULL; | ||
1638 | unsigned char *inq_buff = NULL; | ||
1639 | __u32 nphysicals = 0; | ||
1640 | __u32 nlogicals = 0; | ||
1641 | __u32 ndev_allocated = 0; | ||
1642 | struct hpsa_scsi_dev_t **currentsd, *this_device, *tmpdevice; | ||
1643 | int ncurrent = 0; | ||
1644 | int reportlunsize = sizeof(*physdev_list) + HPSA_MAX_PHYS_LUN * 8; | ||
1645 | int i, nmsa2xxx_enclosures, ndevs_to_allocate; | ||
1646 | int bus, target, lun; | ||
1647 | DECLARE_BITMAP(lunzerobits, HPSA_MAX_TARGETS_PER_CTLR); | ||
1648 | |||
1649 | currentsd = kzalloc(sizeof(*currentsd) * HPSA_MAX_SCSI_DEVS_PER_HBA, | ||
1650 | GFP_KERNEL); | ||
1651 | physdev_list = kzalloc(reportlunsize, GFP_KERNEL); | ||
1652 | logdev_list = kzalloc(reportlunsize, GFP_KERNEL); | ||
1653 | inq_buff = kmalloc(OBDR_TAPE_INQ_SIZE, GFP_KERNEL); | ||
1654 | tmpdevice = kzalloc(sizeof(*tmpdevice), GFP_KERNEL); | ||
1655 | |||
1656 | if (!currentsd || !physdev_list || !logdev_list || | ||
1657 | !inq_buff || !tmpdevice) { | ||
1658 | dev_err(&h->pdev->dev, "out of memory\n"); | ||
1659 | goto out; | ||
1660 | } | ||
1661 | memset(lunzerobits, 0, sizeof(lunzerobits)); | ||
1662 | |||
1663 | if (hpsa_gather_lun_info(h, reportlunsize, physdev_list, &nphysicals, | ||
1664 | logdev_list, &nlogicals)) | ||
1665 | goto out; | ||
1666 | |||
1667 | /* We might see up to 32 MSA2xxx enclosures, actually 8 of them | ||
1668 | * but each of them 4 times through different paths. The plus 1 | ||
1669 | * is for the RAID controller. | ||
1670 | */ | ||
1671 | ndevs_to_allocate = nphysicals + nlogicals + MAX_MSA2XXX_ENCLOSURES + 1; | ||
1672 | |||
1673 | /* Allocate the per device structures */ | ||
1674 | for (i = 0; i < ndevs_to_allocate; i++) { | ||
1675 | currentsd[i] = kzalloc(sizeof(*currentsd[i]), GFP_KERNEL); | ||
1676 | if (!currentsd[i]) { | ||
1677 | dev_warn(&h->pdev->dev, "out of memory at %s:%d\n", | ||
1678 | __FILE__, __LINE__); | ||
1679 | goto out; | ||
1680 | } | ||
1681 | ndev_allocated++; | ||
1682 | } | ||
1683 | |||
1684 | /* adjust our table of devices */ | ||
1685 | nmsa2xxx_enclosures = 0; | ||
1686 | for (i = 0; i < nphysicals + nlogicals + 1; i++) { | ||
1687 | __u8 *lunaddrbytes; | ||
1688 | |||
1689 | /* Figure out where the LUN ID info is coming from */ | ||
1690 | if (i < nphysicals) | ||
1691 | lunaddrbytes = &physdev_list->LUN[i][0]; | ||
1692 | else | ||
1693 | if (i < nphysicals + nlogicals) | ||
1694 | lunaddrbytes = | ||
1695 | &logdev_list->LUN[i-nphysicals][0]; | ||
1696 | else /* jam in the RAID controller at the end */ | ||
1697 | lunaddrbytes = RAID_CTLR_LUNID; | ||
1698 | |||
1699 | /* skip masked physical devices. */ | ||
1700 | if (lunaddrbytes[3] & 0xC0 && i < nphysicals) | ||
1701 | continue; | ||
1702 | |||
1703 | /* Get device type, vendor, model, device id */ | ||
1704 | if (hpsa_update_device_info(h, lunaddrbytes, tmpdevice)) | ||
1705 | continue; /* skip it if we can't talk to it. */ | ||
1706 | figure_bus_target_lun(h, lunaddrbytes, &bus, &target, &lun, | ||
1707 | tmpdevice); | ||
1708 | this_device = currentsd[ncurrent]; | ||
1709 | |||
1710 | /* | ||
1711 | * For the msa2xxx boxes, we have to insert a LUN 0 which | ||
1712 | * doesn't show up in CCISS_REPORT_PHYSICAL data, but there | ||
1713 | * is nonetheless an enclosure device there. We have to | ||
1714 | * present that otherwise linux won't find anything if | ||
1715 | * there is no lun 0. | ||
1716 | */ | ||
1717 | if (add_msa2xxx_enclosure_device(h, tmpdevice, this_device, | ||
1718 | lunaddrbytes, bus, target, lun, lunzerobits, | ||
1719 | &nmsa2xxx_enclosures)) { | ||
1720 | ncurrent++; | ||
1721 | this_device = currentsd[ncurrent]; | ||
1722 | } | ||
1723 | |||
1724 | *this_device = *tmpdevice; | ||
1725 | hpsa_set_bus_target_lun(this_device, bus, target, lun); | ||
1726 | |||
1727 | switch (this_device->devtype) { | ||
1728 | case TYPE_ROM: { | ||
1729 | /* We don't *really* support actual CD-ROM devices, | ||
1730 | * just "One Button Disaster Recovery" tape drive | ||
1731 | * which temporarily pretends to be a CD-ROM drive. | ||
1732 | * So we check that the device is really an OBDR tape | ||
1733 | * device by checking for "$DR-10" in bytes 43-48 of | ||
1734 | * the inquiry data. | ||
1735 | */ | ||
1736 | char obdr_sig[7]; | ||
1737 | #define OBDR_TAPE_SIG "$DR-10" | ||
1738 | strncpy(obdr_sig, &inq_buff[43], 6); | ||
1739 | obdr_sig[6] = '\0'; | ||
1740 | if (strncmp(obdr_sig, OBDR_TAPE_SIG, 6) != 0) | ||
1741 | /* Not OBDR device, ignore it. */ | ||
1742 | break; | ||
1743 | } | ||
1744 | ncurrent++; | ||
1745 | break; | ||
1746 | case TYPE_DISK: | ||
1747 | if (i < nphysicals) | ||
1748 | break; | ||
1749 | ncurrent++; | ||
1750 | break; | ||
1751 | case TYPE_TAPE: | ||
1752 | case TYPE_MEDIUM_CHANGER: | ||
1753 | ncurrent++; | ||
1754 | break; | ||
1755 | case TYPE_RAID: | ||
1756 | /* Only present the Smartarray HBA as a RAID controller. | ||
1757 | * If it's a RAID controller other than the HBA itself | ||
1758 | * (an external RAID controller, MSA500 or similar) | ||
1759 | * don't present it. | ||
1760 | */ | ||
1761 | if (!is_hba_lunid(lunaddrbytes)) | ||
1762 | break; | ||
1763 | ncurrent++; | ||
1764 | break; | ||
1765 | default: | ||
1766 | break; | ||
1767 | } | ||
1768 | if (ncurrent >= HPSA_MAX_SCSI_DEVS_PER_HBA) | ||
1769 | break; | ||
1770 | } | ||
1771 | adjust_hpsa_scsi_table(h, hostno, currentsd, ncurrent); | ||
1772 | out: | ||
1773 | kfree(tmpdevice); | ||
1774 | for (i = 0; i < ndev_allocated; i++) | ||
1775 | kfree(currentsd[i]); | ||
1776 | kfree(currentsd); | ||
1777 | kfree(inq_buff); | ||
1778 | kfree(physdev_list); | ||
1779 | kfree(logdev_list); | ||
1780 | return; | ||
1781 | } | ||
1782 | |||
1783 | /* hpsa_scatter_gather takes a struct scsi_cmnd, (cmd), and does the pci | ||
1784 | * dma mapping and fills in the scatter gather entries of the | ||
1785 | * hpsa command, cp. | ||
1786 | */ | ||
1787 | static int hpsa_scatter_gather(struct pci_dev *pdev, | ||
1788 | struct CommandList *cp, | ||
1789 | struct scsi_cmnd *cmd) | ||
1790 | { | ||
1791 | unsigned int len; | ||
1792 | struct scatterlist *sg; | ||
1793 | __u64 addr64; | ||
1794 | int use_sg, i; | ||
1795 | |||
1796 | BUG_ON(scsi_sg_count(cmd) > MAXSGENTRIES); | ||
1797 | |||
1798 | use_sg = scsi_dma_map(cmd); | ||
1799 | if (use_sg < 0) | ||
1800 | return use_sg; | ||
1801 | |||
1802 | if (!use_sg) | ||
1803 | goto sglist_finished; | ||
1804 | |||
1805 | scsi_for_each_sg(cmd, sg, use_sg, i) { | ||
1806 | addr64 = (__u64) sg_dma_address(sg); | ||
1807 | len = sg_dma_len(sg); | ||
1808 | cp->SG[i].Addr.lower = | ||
1809 | (__u32) (addr64 & (__u64) 0x00000000FFFFFFFF); | ||
1810 | cp->SG[i].Addr.upper = | ||
1811 | (__u32) ((addr64 >> 32) & (__u64) 0x00000000FFFFFFFF); | ||
1812 | cp->SG[i].Len = len; | ||
1813 | cp->SG[i].Ext = 0; /* we are not chaining */ | ||
1814 | } | ||
1815 | |||
1816 | sglist_finished: | ||
1817 | |||
1818 | cp->Header.SGList = (__u8) use_sg; /* no. SGs contig in this cmd */ | ||
1819 | cp->Header.SGTotal = (__u16) use_sg; /* total sgs in this cmd list */ | ||
1820 | return 0; | ||
1821 | } | ||
1822 | |||
1823 | |||
1824 | static int hpsa_scsi_queue_command(struct scsi_cmnd *cmd, | ||
1825 | void (*done)(struct scsi_cmnd *)) | ||
1826 | { | ||
1827 | struct ctlr_info *h; | ||
1828 | struct hpsa_scsi_dev_t *dev; | ||
1829 | unsigned char scsi3addr[8]; | ||
1830 | struct CommandList *c; | ||
1831 | unsigned long flags; | ||
1832 | |||
1833 | /* Get the ptr to our adapter structure out of cmd->host. */ | ||
1834 | h = sdev_to_hba(cmd->device); | ||
1835 | dev = cmd->device->hostdata; | ||
1836 | if (!dev) { | ||
1837 | cmd->result = DID_NO_CONNECT << 16; | ||
1838 | done(cmd); | ||
1839 | return 0; | ||
1840 | } | ||
1841 | memcpy(scsi3addr, dev->scsi3addr, sizeof(scsi3addr)); | ||
1842 | |||
1843 | /* Need a lock as this is being allocated from the pool */ | ||
1844 | spin_lock_irqsave(&h->lock, flags); | ||
1845 | c = cmd_alloc(h); | ||
1846 | spin_unlock_irqrestore(&h->lock, flags); | ||
1847 | if (c == NULL) { /* trouble... */ | ||
1848 | dev_err(&h->pdev->dev, "cmd_alloc returned NULL!\n"); | ||
1849 | return SCSI_MLQUEUE_HOST_BUSY; | ||
1850 | } | ||
1851 | |||
1852 | /* Fill in the command list header */ | ||
1853 | |||
1854 | cmd->scsi_done = done; /* save this for use by completion code */ | ||
1855 | |||
1856 | /* save c in case we have to abort it */ | ||
1857 | cmd->host_scribble = (unsigned char *) c; | ||
1858 | |||
1859 | c->cmd_type = CMD_SCSI; | ||
1860 | c->scsi_cmd = cmd; | ||
1861 | c->Header.ReplyQueue = 0; /* unused in simple mode */ | ||
1862 | memcpy(&c->Header.LUN.LunAddrBytes[0], &scsi3addr[0], 8); | ||
1863 | c->Header.Tag.lower = c->busaddr; /* Use k. address of cmd as tag */ | ||
1864 | |||
1865 | /* Fill in the request block... */ | ||
1866 | |||
1867 | c->Request.Timeout = 0; | ||
1868 | memset(c->Request.CDB, 0, sizeof(c->Request.CDB)); | ||
1869 | BUG_ON(cmd->cmd_len > sizeof(c->Request.CDB)); | ||
1870 | c->Request.CDBLen = cmd->cmd_len; | ||
1871 | memcpy(c->Request.CDB, cmd->cmnd, cmd->cmd_len); | ||
1872 | c->Request.Type.Type = TYPE_CMD; | ||
1873 | c->Request.Type.Attribute = ATTR_SIMPLE; | ||
1874 | switch (cmd->sc_data_direction) { | ||
1875 | case DMA_TO_DEVICE: | ||
1876 | c->Request.Type.Direction = XFER_WRITE; | ||
1877 | break; | ||
1878 | case DMA_FROM_DEVICE: | ||
1879 | c->Request.Type.Direction = XFER_READ; | ||
1880 | break; | ||
1881 | case DMA_NONE: | ||
1882 | c->Request.Type.Direction = XFER_NONE; | ||
1883 | break; | ||
1884 | case DMA_BIDIRECTIONAL: | ||
1885 | /* This can happen if a buggy application does a scsi passthru | ||
1886 | * and sets both inlen and outlen to non-zero. ( see | ||
1887 | * ../scsi/scsi_ioctl.c:scsi_ioctl_send_command() ) | ||
1888 | */ | ||
1889 | |||
1890 | c->Request.Type.Direction = XFER_RSVD; | ||
1891 | /* This is technically wrong, and hpsa controllers should | ||
1892 | * reject it with CMD_INVALID, which is the most correct | ||
1893 | * response, but non-fibre backends appear to let it | ||
1894 | * slide by, and give the same results as if this field | ||
1895 | * were set correctly. Either way is acceptable for | ||
1896 | * our purposes here. | ||
1897 | */ | ||
1898 | |||
1899 | break; | ||
1900 | |||
1901 | default: | ||
1902 | dev_err(&h->pdev->dev, "unknown data direction: %d\n", | ||
1903 | cmd->sc_data_direction); | ||
1904 | BUG(); | ||
1905 | break; | ||
1906 | } | ||
1907 | |||
1908 | if (hpsa_scatter_gather(h->pdev, c, cmd) < 0) { /* Fill SG list */ | ||
1909 | cmd_free(h, c); | ||
1910 | return SCSI_MLQUEUE_HOST_BUSY; | ||
1911 | } | ||
1912 | enqueue_cmd_and_start_io(h, c); | ||
1913 | /* the cmd'll come back via intr handler in complete_scsi_command() */ | ||
1914 | return 0; | ||
1915 | } | ||
1916 | |||
1917 | static void hpsa_unregister_scsi(struct ctlr_info *h) | ||
1918 | { | ||
1919 | /* we are being forcibly unloaded, and may not refuse. */ | ||
1920 | scsi_remove_host(h->scsi_host); | ||
1921 | scsi_host_put(h->scsi_host); | ||
1922 | h->scsi_host = NULL; | ||
1923 | } | ||
1924 | |||
1925 | static int hpsa_register_scsi(struct ctlr_info *h) | ||
1926 | { | ||
1927 | int rc; | ||
1928 | |||
1929 | hpsa_update_scsi_devices(h, -1); | ||
1930 | rc = hpsa_scsi_detect(h); | ||
1931 | if (rc != 0) | ||
1932 | dev_err(&h->pdev->dev, "hpsa_register_scsi: failed" | ||
1933 | " hpsa_scsi_detect(), rc is %d\n", rc); | ||
1934 | return rc; | ||
1935 | } | ||
1936 | |||
1937 | static int wait_for_device_to_become_ready(struct ctlr_info *h, | ||
1938 | unsigned char lunaddr[]) | ||
1939 | { | ||
1940 | int rc = 0; | ||
1941 | int count = 0; | ||
1942 | int waittime = 1; /* seconds */ | ||
1943 | struct CommandList *c; | ||
1944 | |||
1945 | c = cmd_special_alloc(h); | ||
1946 | if (!c) { | ||
1947 | dev_warn(&h->pdev->dev, "out of memory in " | ||
1948 | "wait_for_device_to_become_ready.\n"); | ||
1949 | return IO_ERROR; | ||
1950 | } | ||
1951 | |||
1952 | /* Send test unit ready until device ready, or give up. */ | ||
1953 | while (count < HPSA_TUR_RETRY_LIMIT) { | ||
1954 | |||
1955 | /* Wait for a bit. do this first, because if we send | ||
1956 | * the TUR right away, the reset will just abort it. | ||
1957 | */ | ||
1958 | msleep(1000 * waittime); | ||
1959 | count++; | ||
1960 | |||
1961 | /* Increase wait time with each try, up to a point. */ | ||
1962 | if (waittime < HPSA_MAX_WAIT_INTERVAL_SECS) | ||
1963 | waittime = waittime * 2; | ||
1964 | |||
1965 | /* Send the Test Unit Ready */ | ||
1966 | fill_cmd(c, TEST_UNIT_READY, h, NULL, 0, 0, lunaddr, TYPE_CMD); | ||
1967 | hpsa_scsi_do_simple_cmd_core(h, c); | ||
1968 | /* no unmap needed here because no data xfer. */ | ||
1969 | |||
1970 | if (c->err_info->CommandStatus == CMD_SUCCESS) | ||
1971 | break; | ||
1972 | |||
1973 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && | ||
1974 | c->err_info->ScsiStatus == SAM_STAT_CHECK_CONDITION && | ||
1975 | (c->err_info->SenseInfo[2] == NO_SENSE || | ||
1976 | c->err_info->SenseInfo[2] == UNIT_ATTENTION)) | ||
1977 | break; | ||
1978 | |||
1979 | dev_warn(&h->pdev->dev, "waiting %d secs " | ||
1980 | "for device to become ready.\n", waittime); | ||
1981 | rc = 1; /* device not ready. */ | ||
1982 | } | ||
1983 | |||
1984 | if (rc) | ||
1985 | dev_warn(&h->pdev->dev, "giving up on device.\n"); | ||
1986 | else | ||
1987 | dev_warn(&h->pdev->dev, "device is ready.\n"); | ||
1988 | |||
1989 | cmd_special_free(h, c); | ||
1990 | return rc; | ||
1991 | } | ||
1992 | |||
1993 | /* Need at least one of these error handlers to keep ../scsi/hosts.c from | ||
1994 | * complaining. Doing a host- or bus-reset can't do anything good here. | ||
1995 | */ | ||
1996 | static int hpsa_eh_device_reset_handler(struct scsi_cmnd *scsicmd) | ||
1997 | { | ||
1998 | int rc; | ||
1999 | struct ctlr_info *h; | ||
2000 | struct hpsa_scsi_dev_t *dev; | ||
2001 | |||
2002 | /* find the controller to which the command to be aborted was sent */ | ||
2003 | h = sdev_to_hba(scsicmd->device); | ||
2004 | if (h == NULL) /* paranoia */ | ||
2005 | return FAILED; | ||
2006 | dev_warn(&h->pdev->dev, "resetting drive\n"); | ||
2007 | |||
2008 | dev = scsicmd->device->hostdata; | ||
2009 | if (!dev) { | ||
2010 | dev_err(&h->pdev->dev, "hpsa_eh_device_reset_handler: " | ||
2011 | "device lookup failed.\n"); | ||
2012 | return FAILED; | ||
2013 | } | ||
2014 | /* send a reset to the SCSI LUN which the command was sent to */ | ||
2015 | rc = hpsa_send_reset(h, dev->scsi3addr); | ||
2016 | if (rc == 0 && wait_for_device_to_become_ready(h, dev->scsi3addr) == 0) | ||
2017 | return SUCCESS; | ||
2018 | |||
2019 | dev_warn(&h->pdev->dev, "resetting device failed.\n"); | ||
2020 | return FAILED; | ||
2021 | } | ||
2022 | |||
2023 | /* | ||
2024 | * For operations that cannot sleep, a command block is allocated at init, | ||
2025 | * and managed by cmd_alloc() and cmd_free() using a simple bitmap to track | ||
2026 | * which ones are free or in use. Lock must be held when calling this. | ||
2027 | * cmd_free() is the complement. | ||
2028 | */ | ||
2029 | static struct CommandList *cmd_alloc(struct ctlr_info *h) | ||
2030 | { | ||
2031 | struct CommandList *c; | ||
2032 | int i; | ||
2033 | union u64bit temp64; | ||
2034 | dma_addr_t cmd_dma_handle, err_dma_handle; | ||
2035 | |||
2036 | do { | ||
2037 | i = find_first_zero_bit(h->cmd_pool_bits, h->nr_cmds); | ||
2038 | if (i == h->nr_cmds) | ||
2039 | return NULL; | ||
2040 | } while (test_and_set_bit | ||
2041 | (i & (BITS_PER_LONG - 1), | ||
2042 | h->cmd_pool_bits + (i / BITS_PER_LONG)) != 0); | ||
2043 | c = h->cmd_pool + i; | ||
2044 | memset(c, 0, sizeof(*c)); | ||
2045 | cmd_dma_handle = h->cmd_pool_dhandle | ||
2046 | + i * sizeof(*c); | ||
2047 | c->err_info = h->errinfo_pool + i; | ||
2048 | memset(c->err_info, 0, sizeof(*c->err_info)); | ||
2049 | err_dma_handle = h->errinfo_pool_dhandle | ||
2050 | + i * sizeof(*c->err_info); | ||
2051 | h->nr_allocs++; | ||
2052 | |||
2053 | c->cmdindex = i; | ||
2054 | |||
2055 | INIT_HLIST_NODE(&c->list); | ||
2056 | c->busaddr = (__u32) cmd_dma_handle; | ||
2057 | temp64.val = (__u64) err_dma_handle; | ||
2058 | c->ErrDesc.Addr.lower = temp64.val32.lower; | ||
2059 | c->ErrDesc.Addr.upper = temp64.val32.upper; | ||
2060 | c->ErrDesc.Len = sizeof(*c->err_info); | ||
2061 | |||
2062 | c->h = h; | ||
2063 | return c; | ||
2064 | } | ||
2065 | |||
2066 | /* For operations that can wait for kmalloc to possibly sleep, | ||
2067 | * this routine can be called. Lock need not be held to call | ||
2068 | * cmd_special_alloc. cmd_special_free() is the complement. | ||
2069 | */ | ||
2070 | static struct CommandList *cmd_special_alloc(struct ctlr_info *h) | ||
2071 | { | ||
2072 | struct CommandList *c; | ||
2073 | union u64bit temp64; | ||
2074 | dma_addr_t cmd_dma_handle, err_dma_handle; | ||
2075 | |||
2076 | c = pci_alloc_consistent(h->pdev, sizeof(*c), &cmd_dma_handle); | ||
2077 | if (c == NULL) | ||
2078 | return NULL; | ||
2079 | memset(c, 0, sizeof(*c)); | ||
2080 | |||
2081 | c->cmdindex = -1; | ||
2082 | |||
2083 | c->err_info = pci_alloc_consistent(h->pdev, sizeof(*c->err_info), | ||
2084 | &err_dma_handle); | ||
2085 | |||
2086 | if (c->err_info == NULL) { | ||
2087 | pci_free_consistent(h->pdev, | ||
2088 | sizeof(*c), c, cmd_dma_handle); | ||
2089 | return NULL; | ||
2090 | } | ||
2091 | memset(c->err_info, 0, sizeof(*c->err_info)); | ||
2092 | |||
2093 | INIT_HLIST_NODE(&c->list); | ||
2094 | c->busaddr = (__u32) cmd_dma_handle; | ||
2095 | temp64.val = (__u64) err_dma_handle; | ||
2096 | c->ErrDesc.Addr.lower = temp64.val32.lower; | ||
2097 | c->ErrDesc.Addr.upper = temp64.val32.upper; | ||
2098 | c->ErrDesc.Len = sizeof(*c->err_info); | ||
2099 | |||
2100 | c->h = h; | ||
2101 | return c; | ||
2102 | } | ||
2103 | |||
2104 | static void cmd_free(struct ctlr_info *h, struct CommandList *c) | ||
2105 | { | ||
2106 | int i; | ||
2107 | |||
2108 | i = c - h->cmd_pool; | ||
2109 | clear_bit(i & (BITS_PER_LONG - 1), | ||
2110 | h->cmd_pool_bits + (i / BITS_PER_LONG)); | ||
2111 | h->nr_frees++; | ||
2112 | } | ||
2113 | |||
2114 | static void cmd_special_free(struct ctlr_info *h, struct CommandList *c) | ||
2115 | { | ||
2116 | union u64bit temp64; | ||
2117 | |||
2118 | temp64.val32.lower = c->ErrDesc.Addr.lower; | ||
2119 | temp64.val32.upper = c->ErrDesc.Addr.upper; | ||
2120 | pci_free_consistent(h->pdev, sizeof(*c->err_info), | ||
2121 | c->err_info, (dma_addr_t) temp64.val); | ||
2122 | pci_free_consistent(h->pdev, sizeof(*c), | ||
2123 | c, (dma_addr_t) c->busaddr); | ||
2124 | } | ||
2125 | |||
2126 | #ifdef CONFIG_COMPAT | ||
2127 | |||
2128 | static int do_ioctl(struct scsi_device *dev, int cmd, void *arg) | ||
2129 | { | ||
2130 | int ret; | ||
2131 | |||
2132 | lock_kernel(); | ||
2133 | ret = hpsa_ioctl(dev, cmd, arg); | ||
2134 | unlock_kernel(); | ||
2135 | return ret; | ||
2136 | } | ||
2137 | |||
2138 | static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg); | ||
2139 | static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, | ||
2140 | int cmd, void *arg); | ||
2141 | |||
2142 | static int hpsa_compat_ioctl(struct scsi_device *dev, int cmd, void *arg) | ||
2143 | { | ||
2144 | switch (cmd) { | ||
2145 | case CCISS_GETPCIINFO: | ||
2146 | case CCISS_GETINTINFO: | ||
2147 | case CCISS_SETINTINFO: | ||
2148 | case CCISS_GETNODENAME: | ||
2149 | case CCISS_SETNODENAME: | ||
2150 | case CCISS_GETHEARTBEAT: | ||
2151 | case CCISS_GETBUSTYPES: | ||
2152 | case CCISS_GETFIRMVER: | ||
2153 | case CCISS_GETDRIVVER: | ||
2154 | case CCISS_REVALIDVOLS: | ||
2155 | case CCISS_DEREGDISK: | ||
2156 | case CCISS_REGNEWDISK: | ||
2157 | case CCISS_REGNEWD: | ||
2158 | case CCISS_RESCANDISK: | ||
2159 | case CCISS_GETLUNINFO: | ||
2160 | return do_ioctl(dev, cmd, arg); | ||
2161 | |||
2162 | case CCISS_PASSTHRU32: | ||
2163 | return hpsa_ioctl32_passthru(dev, cmd, arg); | ||
2164 | case CCISS_BIG_PASSTHRU32: | ||
2165 | return hpsa_ioctl32_big_passthru(dev, cmd, arg); | ||
2166 | |||
2167 | default: | ||
2168 | return -ENOIOCTLCMD; | ||
2169 | } | ||
2170 | } | ||
2171 | |||
2172 | static int hpsa_ioctl32_passthru(struct scsi_device *dev, int cmd, void *arg) | ||
2173 | { | ||
2174 | IOCTL32_Command_struct __user *arg32 = | ||
2175 | (IOCTL32_Command_struct __user *) arg; | ||
2176 | IOCTL_Command_struct arg64; | ||
2177 | IOCTL_Command_struct __user *p = compat_alloc_user_space(sizeof(arg64)); | ||
2178 | int err; | ||
2179 | u32 cp; | ||
2180 | |||
2181 | err = 0; | ||
2182 | err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | ||
2183 | sizeof(arg64.LUN_info)); | ||
2184 | err |= copy_from_user(&arg64.Request, &arg32->Request, | ||
2185 | sizeof(arg64.Request)); | ||
2186 | err |= copy_from_user(&arg64.error_info, &arg32->error_info, | ||
2187 | sizeof(arg64.error_info)); | ||
2188 | err |= get_user(arg64.buf_size, &arg32->buf_size); | ||
2189 | err |= get_user(cp, &arg32->buf); | ||
2190 | arg64.buf = compat_ptr(cp); | ||
2191 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | ||
2192 | |||
2193 | if (err) | ||
2194 | return -EFAULT; | ||
2195 | |||
2196 | err = do_ioctl(dev, CCISS_PASSTHRU, (void *)p); | ||
2197 | if (err) | ||
2198 | return err; | ||
2199 | err |= copy_in_user(&arg32->error_info, &p->error_info, | ||
2200 | sizeof(arg32->error_info)); | ||
2201 | if (err) | ||
2202 | return -EFAULT; | ||
2203 | return err; | ||
2204 | } | ||
2205 | |||
2206 | static int hpsa_ioctl32_big_passthru(struct scsi_device *dev, | ||
2207 | int cmd, void *arg) | ||
2208 | { | ||
2209 | BIG_IOCTL32_Command_struct __user *arg32 = | ||
2210 | (BIG_IOCTL32_Command_struct __user *) arg; | ||
2211 | BIG_IOCTL_Command_struct arg64; | ||
2212 | BIG_IOCTL_Command_struct __user *p = | ||
2213 | compat_alloc_user_space(sizeof(arg64)); | ||
2214 | int err; | ||
2215 | u32 cp; | ||
2216 | |||
2217 | err = 0; | ||
2218 | err |= copy_from_user(&arg64.LUN_info, &arg32->LUN_info, | ||
2219 | sizeof(arg64.LUN_info)); | ||
2220 | err |= copy_from_user(&arg64.Request, &arg32->Request, | ||
2221 | sizeof(arg64.Request)); | ||
2222 | err |= copy_from_user(&arg64.error_info, &arg32->error_info, | ||
2223 | sizeof(arg64.error_info)); | ||
2224 | err |= get_user(arg64.buf_size, &arg32->buf_size); | ||
2225 | err |= get_user(arg64.malloc_size, &arg32->malloc_size); | ||
2226 | err |= get_user(cp, &arg32->buf); | ||
2227 | arg64.buf = compat_ptr(cp); | ||
2228 | err |= copy_to_user(p, &arg64, sizeof(arg64)); | ||
2229 | |||
2230 | if (err) | ||
2231 | return -EFAULT; | ||
2232 | |||
2233 | err = do_ioctl(dev, CCISS_BIG_PASSTHRU, (void *)p); | ||
2234 | if (err) | ||
2235 | return err; | ||
2236 | err |= copy_in_user(&arg32->error_info, &p->error_info, | ||
2237 | sizeof(arg32->error_info)); | ||
2238 | if (err) | ||
2239 | return -EFAULT; | ||
2240 | return err; | ||
2241 | } | ||
2242 | #endif | ||
2243 | |||
2244 | static int hpsa_getpciinfo_ioctl(struct ctlr_info *h, void __user *argp) | ||
2245 | { | ||
2246 | struct hpsa_pci_info pciinfo; | ||
2247 | |||
2248 | if (!argp) | ||
2249 | return -EINVAL; | ||
2250 | pciinfo.domain = pci_domain_nr(h->pdev->bus); | ||
2251 | pciinfo.bus = h->pdev->bus->number; | ||
2252 | pciinfo.dev_fn = h->pdev->devfn; | ||
2253 | pciinfo.board_id = h->board_id; | ||
2254 | if (copy_to_user(argp, &pciinfo, sizeof(pciinfo))) | ||
2255 | return -EFAULT; | ||
2256 | return 0; | ||
2257 | } | ||
2258 | |||
2259 | static int hpsa_getdrivver_ioctl(struct ctlr_info *h, void __user *argp) | ||
2260 | { | ||
2261 | DriverVer_type DriverVer; | ||
2262 | unsigned char vmaj, vmin, vsubmin; | ||
2263 | int rc; | ||
2264 | |||
2265 | rc = sscanf(HPSA_DRIVER_VERSION, "%hhu.%hhu.%hhu", | ||
2266 | &vmaj, &vmin, &vsubmin); | ||
2267 | if (rc != 3) { | ||
2268 | dev_info(&h->pdev->dev, "driver version string '%s' " | ||
2269 | "unrecognized.", HPSA_DRIVER_VERSION); | ||
2270 | vmaj = 0; | ||
2271 | vmin = 0; | ||
2272 | vsubmin = 0; | ||
2273 | } | ||
2274 | DriverVer = (vmaj << 16) | (vmin << 8) | vsubmin; | ||
2275 | if (!argp) | ||
2276 | return -EINVAL; | ||
2277 | if (copy_to_user(argp, &DriverVer, sizeof(DriverVer_type))) | ||
2278 | return -EFAULT; | ||
2279 | return 0; | ||
2280 | } | ||
2281 | |||
2282 | static int hpsa_passthru_ioctl(struct ctlr_info *h, void __user *argp) | ||
2283 | { | ||
2284 | IOCTL_Command_struct iocommand; | ||
2285 | struct CommandList *c; | ||
2286 | char *buff = NULL; | ||
2287 | union u64bit temp64; | ||
2288 | |||
2289 | if (!argp) | ||
2290 | return -EINVAL; | ||
2291 | if (!capable(CAP_SYS_RAWIO)) | ||
2292 | return -EPERM; | ||
2293 | if (copy_from_user(&iocommand, argp, sizeof(iocommand))) | ||
2294 | return -EFAULT; | ||
2295 | if ((iocommand.buf_size < 1) && | ||
2296 | (iocommand.Request.Type.Direction != XFER_NONE)) { | ||
2297 | return -EINVAL; | ||
2298 | } | ||
2299 | if (iocommand.buf_size > 0) { | ||
2300 | buff = kmalloc(iocommand.buf_size, GFP_KERNEL); | ||
2301 | if (buff == NULL) | ||
2302 | return -EFAULT; | ||
2303 | } | ||
2304 | if (iocommand.Request.Type.Direction == XFER_WRITE) { | ||
2305 | /* Copy the data into the buffer we created */ | ||
2306 | if (copy_from_user(buff, iocommand.buf, iocommand.buf_size)) { | ||
2307 | kfree(buff); | ||
2308 | return -EFAULT; | ||
2309 | } | ||
2310 | } else | ||
2311 | memset(buff, 0, iocommand.buf_size); | ||
2312 | c = cmd_special_alloc(h); | ||
2313 | if (c == NULL) { | ||
2314 | kfree(buff); | ||
2315 | return -ENOMEM; | ||
2316 | } | ||
2317 | /* Fill in the command type */ | ||
2318 | c->cmd_type = CMD_IOCTL_PEND; | ||
2319 | /* Fill in Command Header */ | ||
2320 | c->Header.ReplyQueue = 0; /* unused in simple mode */ | ||
2321 | if (iocommand.buf_size > 0) { /* buffer to fill */ | ||
2322 | c->Header.SGList = 1; | ||
2323 | c->Header.SGTotal = 1; | ||
2324 | } else { /* no buffers to fill */ | ||
2325 | c->Header.SGList = 0; | ||
2326 | c->Header.SGTotal = 0; | ||
2327 | } | ||
2328 | memcpy(&c->Header.LUN, &iocommand.LUN_info, sizeof(c->Header.LUN)); | ||
2329 | /* use the kernel address the cmd block for tag */ | ||
2330 | c->Header.Tag.lower = c->busaddr; | ||
2331 | |||
2332 | /* Fill in Request block */ | ||
2333 | memcpy(&c->Request, &iocommand.Request, | ||
2334 | sizeof(c->Request)); | ||
2335 | |||
2336 | /* Fill in the scatter gather information */ | ||
2337 | if (iocommand.buf_size > 0) { | ||
2338 | temp64.val = pci_map_single(h->pdev, buff, | ||
2339 | iocommand.buf_size, PCI_DMA_BIDIRECTIONAL); | ||
2340 | c->SG[0].Addr.lower = temp64.val32.lower; | ||
2341 | c->SG[0].Addr.upper = temp64.val32.upper; | ||
2342 | c->SG[0].Len = iocommand.buf_size; | ||
2343 | c->SG[0].Ext = 0; /* we are not chaining*/ | ||
2344 | } | ||
2345 | hpsa_scsi_do_simple_cmd_core(h, c); | ||
2346 | hpsa_pci_unmap(h->pdev, c, 1, PCI_DMA_BIDIRECTIONAL); | ||
2347 | check_ioctl_unit_attention(h, c); | ||
2348 | |||
2349 | /* Copy the error information out */ | ||
2350 | memcpy(&iocommand.error_info, c->err_info, | ||
2351 | sizeof(iocommand.error_info)); | ||
2352 | if (copy_to_user(argp, &iocommand, sizeof(iocommand))) { | ||
2353 | kfree(buff); | ||
2354 | cmd_special_free(h, c); | ||
2355 | return -EFAULT; | ||
2356 | } | ||
2357 | |||
2358 | if (iocommand.Request.Type.Direction == XFER_READ) { | ||
2359 | /* Copy the data out of the buffer we created */ | ||
2360 | if (copy_to_user(iocommand.buf, buff, iocommand.buf_size)) { | ||
2361 | kfree(buff); | ||
2362 | cmd_special_free(h, c); | ||
2363 | return -EFAULT; | ||
2364 | } | ||
2365 | } | ||
2366 | kfree(buff); | ||
2367 | cmd_special_free(h, c); | ||
2368 | return 0; | ||
2369 | } | ||
2370 | |||
2371 | static int hpsa_big_passthru_ioctl(struct ctlr_info *h, void __user *argp) | ||
2372 | { | ||
2373 | BIG_IOCTL_Command_struct *ioc; | ||
2374 | struct CommandList *c; | ||
2375 | unsigned char **buff = NULL; | ||
2376 | int *buff_size = NULL; | ||
2377 | union u64bit temp64; | ||
2378 | BYTE sg_used = 0; | ||
2379 | int status = 0; | ||
2380 | int i; | ||
2381 | __u32 left; | ||
2382 | __u32 sz; | ||
2383 | BYTE __user *data_ptr; | ||
2384 | |||
2385 | if (!argp) | ||
2386 | return -EINVAL; | ||
2387 | if (!capable(CAP_SYS_RAWIO)) | ||
2388 | return -EPERM; | ||
2389 | ioc = (BIG_IOCTL_Command_struct *) | ||
2390 | kmalloc(sizeof(*ioc), GFP_KERNEL); | ||
2391 | if (!ioc) { | ||
2392 | status = -ENOMEM; | ||
2393 | goto cleanup1; | ||
2394 | } | ||
2395 | if (copy_from_user(ioc, argp, sizeof(*ioc))) { | ||
2396 | status = -EFAULT; | ||
2397 | goto cleanup1; | ||
2398 | } | ||
2399 | if ((ioc->buf_size < 1) && | ||
2400 | (ioc->Request.Type.Direction != XFER_NONE)) { | ||
2401 | status = -EINVAL; | ||
2402 | goto cleanup1; | ||
2403 | } | ||
2404 | /* Check kmalloc limits using all SGs */ | ||
2405 | if (ioc->malloc_size > MAX_KMALLOC_SIZE) { | ||
2406 | status = -EINVAL; | ||
2407 | goto cleanup1; | ||
2408 | } | ||
2409 | if (ioc->buf_size > ioc->malloc_size * MAXSGENTRIES) { | ||
2410 | status = -EINVAL; | ||
2411 | goto cleanup1; | ||
2412 | } | ||
2413 | buff = kzalloc(MAXSGENTRIES * sizeof(char *), GFP_KERNEL); | ||
2414 | if (!buff) { | ||
2415 | status = -ENOMEM; | ||
2416 | goto cleanup1; | ||
2417 | } | ||
2418 | buff_size = kmalloc(MAXSGENTRIES * sizeof(int), GFP_KERNEL); | ||
2419 | if (!buff_size) { | ||
2420 | status = -ENOMEM; | ||
2421 | goto cleanup1; | ||
2422 | } | ||
2423 | left = ioc->buf_size; | ||
2424 | data_ptr = ioc->buf; | ||
2425 | while (left) { | ||
2426 | sz = (left > ioc->malloc_size) ? ioc->malloc_size : left; | ||
2427 | buff_size[sg_used] = sz; | ||
2428 | buff[sg_used] = kmalloc(sz, GFP_KERNEL); | ||
2429 | if (buff[sg_used] == NULL) { | ||
2430 | status = -ENOMEM; | ||
2431 | goto cleanup1; | ||
2432 | } | ||
2433 | if (ioc->Request.Type.Direction == XFER_WRITE) { | ||
2434 | if (copy_from_user(buff[sg_used], data_ptr, sz)) { | ||
2435 | status = -ENOMEM; | ||
2436 | goto cleanup1; | ||
2437 | } | ||
2438 | } else | ||
2439 | memset(buff[sg_used], 0, sz); | ||
2440 | left -= sz; | ||
2441 | data_ptr += sz; | ||
2442 | sg_used++; | ||
2443 | } | ||
2444 | c = cmd_special_alloc(h); | ||
2445 | if (c == NULL) { | ||
2446 | status = -ENOMEM; | ||
2447 | goto cleanup1; | ||
2448 | } | ||
2449 | c->cmd_type = CMD_IOCTL_PEND; | ||
2450 | c->Header.ReplyQueue = 0; | ||
2451 | |||
2452 | if (ioc->buf_size > 0) { | ||
2453 | c->Header.SGList = sg_used; | ||
2454 | c->Header.SGTotal = sg_used; | ||
2455 | } else { | ||
2456 | c->Header.SGList = 0; | ||
2457 | c->Header.SGTotal = 0; | ||
2458 | } | ||
2459 | memcpy(&c->Header.LUN, &ioc->LUN_info, sizeof(c->Header.LUN)); | ||
2460 | c->Header.Tag.lower = c->busaddr; | ||
2461 | memcpy(&c->Request, &ioc->Request, sizeof(c->Request)); | ||
2462 | if (ioc->buf_size > 0) { | ||
2463 | int i; | ||
2464 | for (i = 0; i < sg_used; i++) { | ||
2465 | temp64.val = pci_map_single(h->pdev, buff[i], | ||
2466 | buff_size[i], PCI_DMA_BIDIRECTIONAL); | ||
2467 | c->SG[i].Addr.lower = temp64.val32.lower; | ||
2468 | c->SG[i].Addr.upper = temp64.val32.upper; | ||
2469 | c->SG[i].Len = buff_size[i]; | ||
2470 | /* we are not chaining */ | ||
2471 | c->SG[i].Ext = 0; | ||
2472 | } | ||
2473 | } | ||
2474 | hpsa_scsi_do_simple_cmd_core(h, c); | ||
2475 | hpsa_pci_unmap(h->pdev, c, sg_used, PCI_DMA_BIDIRECTIONAL); | ||
2476 | check_ioctl_unit_attention(h, c); | ||
2477 | /* Copy the error information out */ | ||
2478 | memcpy(&ioc->error_info, c->err_info, sizeof(ioc->error_info)); | ||
2479 | if (copy_to_user(argp, ioc, sizeof(*ioc))) { | ||
2480 | cmd_special_free(h, c); | ||
2481 | status = -EFAULT; | ||
2482 | goto cleanup1; | ||
2483 | } | ||
2484 | if (ioc->Request.Type.Direction == XFER_READ) { | ||
2485 | /* Copy the data out of the buffer we created */ | ||
2486 | BYTE __user *ptr = ioc->buf; | ||
2487 | for (i = 0; i < sg_used; i++) { | ||
2488 | if (copy_to_user(ptr, buff[i], buff_size[i])) { | ||
2489 | cmd_special_free(h, c); | ||
2490 | status = -EFAULT; | ||
2491 | goto cleanup1; | ||
2492 | } | ||
2493 | ptr += buff_size[i]; | ||
2494 | } | ||
2495 | } | ||
2496 | cmd_special_free(h, c); | ||
2497 | status = 0; | ||
2498 | cleanup1: | ||
2499 | if (buff) { | ||
2500 | for (i = 0; i < sg_used; i++) | ||
2501 | kfree(buff[i]); | ||
2502 | kfree(buff); | ||
2503 | } | ||
2504 | kfree(buff_size); | ||
2505 | kfree(ioc); | ||
2506 | return status; | ||
2507 | } | ||
2508 | |||
2509 | static void check_ioctl_unit_attention(struct ctlr_info *h, | ||
2510 | struct CommandList *c) | ||
2511 | { | ||
2512 | if (c->err_info->CommandStatus == CMD_TARGET_STATUS && | ||
2513 | c->err_info->ScsiStatus != SAM_STAT_CHECK_CONDITION) | ||
2514 | (void) check_for_unit_attention(h, c); | ||
2515 | } | ||
2516 | /* | ||
2517 | * ioctl | ||
2518 | */ | ||
2519 | static int hpsa_ioctl(struct scsi_device *dev, int cmd, void *arg) | ||
2520 | { | ||
2521 | struct ctlr_info *h; | ||
2522 | void __user *argp = (void __user *)arg; | ||
2523 | |||
2524 | h = sdev_to_hba(dev); | ||
2525 | |||
2526 | switch (cmd) { | ||
2527 | case CCISS_DEREGDISK: | ||
2528 | case CCISS_REGNEWDISK: | ||
2529 | case CCISS_REGNEWD: | ||
2530 | hpsa_update_scsi_devices(h, dev->host->host_no); | ||
2531 | return 0; | ||
2532 | case CCISS_GETPCIINFO: | ||
2533 | return hpsa_getpciinfo_ioctl(h, argp); | ||
2534 | case CCISS_GETDRIVVER: | ||
2535 | return hpsa_getdrivver_ioctl(h, argp); | ||
2536 | case CCISS_PASSTHRU: | ||
2537 | return hpsa_passthru_ioctl(h, argp); | ||
2538 | case CCISS_BIG_PASSTHRU: | ||
2539 | return hpsa_big_passthru_ioctl(h, argp); | ||
2540 | default: | ||
2541 | return -ENOTTY; | ||
2542 | } | ||
2543 | } | ||
2544 | |||
2545 | static void fill_cmd(struct CommandList *c, __u8 cmd, struct ctlr_info *h, | ||
2546 | void *buff, size_t size, __u8 page_code, unsigned char *scsi3addr, | ||
2547 | int cmd_type) | ||
2548 | { | ||
2549 | int pci_dir = XFER_NONE; | ||
2550 | |||
2551 | c->cmd_type = CMD_IOCTL_PEND; | ||
2552 | c->Header.ReplyQueue = 0; | ||
2553 | if (buff != NULL && size > 0) { | ||
2554 | c->Header.SGList = 1; | ||
2555 | c->Header.SGTotal = 1; | ||
2556 | } else { | ||
2557 | c->Header.SGList = 0; | ||
2558 | c->Header.SGTotal = 0; | ||
2559 | } | ||
2560 | c->Header.Tag.lower = c->busaddr; | ||
2561 | memcpy(c->Header.LUN.LunAddrBytes, scsi3addr, 8); | ||
2562 | |||
2563 | c->Request.Type.Type = cmd_type; | ||
2564 | if (cmd_type == TYPE_CMD) { | ||
2565 | switch (cmd) { | ||
2566 | case HPSA_INQUIRY: | ||
2567 | /* are we trying to read a vital product page */ | ||
2568 | if (page_code != 0) { | ||
2569 | c->Request.CDB[1] = 0x01; | ||
2570 | c->Request.CDB[2] = page_code; | ||
2571 | } | ||
2572 | c->Request.CDBLen = 6; | ||
2573 | c->Request.Type.Attribute = ATTR_SIMPLE; | ||
2574 | c->Request.Type.Direction = XFER_READ; | ||
2575 | c->Request.Timeout = 0; | ||
2576 | c->Request.CDB[0] = HPSA_INQUIRY; | ||
2577 | c->Request.CDB[4] = size & 0xFF; | ||
2578 | break; | ||
2579 | case HPSA_REPORT_LOG: | ||
2580 | case HPSA_REPORT_PHYS: | ||
2581 | /* Talking to controller so It's a physical command | ||
2582 | mode = 00 target = 0. Nothing to write. | ||
2583 | */ | ||
2584 | c->Request.CDBLen = 12; | ||
2585 | c->Request.Type.Attribute = ATTR_SIMPLE; | ||
2586 | c->Request.Type.Direction = XFER_READ; | ||
2587 | c->Request.Timeout = 0; | ||
2588 | c->Request.CDB[0] = cmd; | ||
2589 | c->Request.CDB[6] = (size >> 24) & 0xFF; /* MSB */ | ||
2590 | c->Request.CDB[7] = (size >> 16) & 0xFF; | ||
2591 | c->Request.CDB[8] = (size >> 8) & 0xFF; | ||
2592 | c->Request.CDB[9] = size & 0xFF; | ||
2593 | break; | ||
2594 | |||
2595 | case HPSA_READ_CAPACITY: | ||
2596 | c->Request.CDBLen = 10; | ||
2597 | c->Request.Type.Attribute = ATTR_SIMPLE; | ||
2598 | c->Request.Type.Direction = XFER_READ; | ||
2599 | c->Request.Timeout = 0; | ||
2600 | c->Request.CDB[0] = cmd; | ||
2601 | break; | ||
2602 | case HPSA_CACHE_FLUSH: | ||
2603 | c->Request.CDBLen = 12; | ||
2604 | c->Request.Type.Attribute = ATTR_SIMPLE; | ||
2605 | c->Request.Type.Direction = XFER_WRITE; | ||
2606 | c->Request.Timeout = 0; | ||
2607 | c->Request.CDB[0] = BMIC_WRITE; | ||
2608 | c->Request.CDB[6] = BMIC_CACHE_FLUSH; | ||
2609 | break; | ||
2610 | case TEST_UNIT_READY: | ||
2611 | c->Request.CDBLen = 6; | ||
2612 | c->Request.Type.Attribute = ATTR_SIMPLE; | ||
2613 | c->Request.Type.Direction = XFER_NONE; | ||
2614 | c->Request.Timeout = 0; | ||
2615 | break; | ||
2616 | default: | ||
2617 | dev_warn(&h->pdev->dev, "unknown command 0x%c\n", cmd); | ||
2618 | BUG(); | ||
2619 | return; | ||
2620 | } | ||
2621 | } else if (cmd_type == TYPE_MSG) { | ||
2622 | switch (cmd) { | ||
2623 | |||
2624 | case HPSA_DEVICE_RESET_MSG: | ||
2625 | c->Request.CDBLen = 16; | ||
2626 | c->Request.Type.Type = 1; /* It is a MSG not a CMD */ | ||
2627 | c->Request.Type.Attribute = ATTR_SIMPLE; | ||
2628 | c->Request.Type.Direction = XFER_NONE; | ||
2629 | c->Request.Timeout = 0; /* Don't time out */ | ||
2630 | c->Request.CDB[0] = 0x01; /* RESET_MSG is 0x01 */ | ||
2631 | c->Request.CDB[1] = 0x03; /* Reset target above */ | ||
2632 | /* If bytes 4-7 are zero, it means reset the */ | ||
2633 | /* LunID device */ | ||
2634 | c->Request.CDB[4] = 0x00; | ||
2635 | c->Request.CDB[5] = 0x00; | ||
2636 | c->Request.CDB[6] = 0x00; | ||
2637 | c->Request.CDB[7] = 0x00; | ||
2638 | break; | ||
2639 | |||
2640 | default: | ||
2641 | dev_warn(&h->pdev->dev, "unknown message type %d\n", | ||
2642 | cmd); | ||
2643 | BUG(); | ||
2644 | } | ||
2645 | } else { | ||
2646 | dev_warn(&h->pdev->dev, "unknown command type %d\n", cmd_type); | ||
2647 | BUG(); | ||
2648 | } | ||
2649 | |||
2650 | switch (c->Request.Type.Direction) { | ||
2651 | case XFER_READ: | ||
2652 | pci_dir = PCI_DMA_FROMDEVICE; | ||
2653 | break; | ||
2654 | case XFER_WRITE: | ||
2655 | pci_dir = PCI_DMA_TODEVICE; | ||
2656 | break; | ||
2657 | case XFER_NONE: | ||
2658 | pci_dir = PCI_DMA_NONE; | ||
2659 | break; | ||
2660 | default: | ||
2661 | pci_dir = PCI_DMA_BIDIRECTIONAL; | ||
2662 | } | ||
2663 | |||
2664 | hpsa_map_one(h->pdev, c, buff, size, pci_dir); | ||
2665 | |||
2666 | return; | ||
2667 | } | ||
2668 | |||
2669 | /* | ||
2670 | * Map (physical) PCI mem into (virtual) kernel space | ||
2671 | */ | ||
2672 | static void __iomem *remap_pci_mem(ulong base, ulong size) | ||
2673 | { | ||
2674 | ulong page_base = ((ulong) base) & PAGE_MASK; | ||
2675 | ulong page_offs = ((ulong) base) - page_base; | ||
2676 | void __iomem *page_remapped = ioremap(page_base, page_offs + size); | ||
2677 | |||
2678 | return page_remapped ? (page_remapped + page_offs) : NULL; | ||
2679 | } | ||
2680 | |||
2681 | /* Takes cmds off the submission queue and sends them to the hardware, | ||
2682 | * then puts them on the queue of cmds waiting for completion. | ||
2683 | */ | ||
2684 | static void start_io(struct ctlr_info *h) | ||
2685 | { | ||
2686 | struct CommandList *c; | ||
2687 | |||
2688 | while (!hlist_empty(&h->reqQ)) { | ||
2689 | c = hlist_entry(h->reqQ.first, struct CommandList, list); | ||
2690 | /* can't do anything if fifo is full */ | ||
2691 | if ((h->access.fifo_full(h))) { | ||
2692 | dev_warn(&h->pdev->dev, "fifo full\n"); | ||
2693 | break; | ||
2694 | } | ||
2695 | |||
2696 | /* Get the first entry from the Request Q */ | ||
2697 | removeQ(c); | ||
2698 | h->Qdepth--; | ||
2699 | |||
2700 | /* Tell the controller execute command */ | ||
2701 | h->access.submit_command(h, c); | ||
2702 | |||
2703 | /* Put job onto the completed Q */ | ||
2704 | addQ(&h->cmpQ, c); | ||
2705 | } | ||
2706 | } | ||
2707 | |||
2708 | static inline unsigned long get_next_completion(struct ctlr_info *h) | ||
2709 | { | ||
2710 | return h->access.command_completed(h); | ||
2711 | } | ||
2712 | |||
2713 | static inline int interrupt_pending(struct ctlr_info *h) | ||
2714 | { | ||
2715 | return h->access.intr_pending(h); | ||
2716 | } | ||
2717 | |||
2718 | static inline long interrupt_not_for_us(struct ctlr_info *h) | ||
2719 | { | ||
2720 | return ((h->access.intr_pending(h) == 0) || | ||
2721 | (h->interrupts_enabled == 0)); | ||
2722 | } | ||
2723 | |||
2724 | static inline int bad_tag(struct ctlr_info *h, __u32 tag_index, | ||
2725 | __u32 raw_tag) | ||
2726 | { | ||
2727 | if (unlikely(tag_index >= h->nr_cmds)) { | ||
2728 | dev_warn(&h->pdev->dev, "bad tag 0x%08x ignored.\n", raw_tag); | ||
2729 | return 1; | ||
2730 | } | ||
2731 | return 0; | ||
2732 | } | ||
2733 | |||
2734 | static inline void finish_cmd(struct CommandList *c, __u32 raw_tag) | ||
2735 | { | ||
2736 | removeQ(c); | ||
2737 | if (likely(c->cmd_type == CMD_SCSI)) | ||
2738 | complete_scsi_command(c, 0, raw_tag); | ||
2739 | else if (c->cmd_type == CMD_IOCTL_PEND) | ||
2740 | complete(c->waiting); | ||
2741 | } | ||
2742 | |||
2743 | static irqreturn_t do_hpsa_intr(int irq, void *dev_id) | ||
2744 | { | ||
2745 | struct ctlr_info *h = dev_id; | ||
2746 | struct CommandList *c; | ||
2747 | unsigned long flags; | ||
2748 | __u32 raw_tag, tag, tag_index; | ||
2749 | struct hlist_node *tmp; | ||
2750 | |||
2751 | if (interrupt_not_for_us(h)) | ||
2752 | return IRQ_NONE; | ||
2753 | spin_lock_irqsave(&h->lock, flags); | ||
2754 | while (interrupt_pending(h)) { | ||
2755 | while ((raw_tag = get_next_completion(h)) != FIFO_EMPTY) { | ||
2756 | if (likely(HPSA_TAG_CONTAINS_INDEX(raw_tag))) { | ||
2757 | tag_index = HPSA_TAG_TO_INDEX(raw_tag); | ||
2758 | if (bad_tag(h, tag_index, raw_tag)) | ||
2759 | return IRQ_HANDLED; | ||
2760 | c = h->cmd_pool + tag_index; | ||
2761 | finish_cmd(c, raw_tag); | ||
2762 | continue; | ||
2763 | } | ||
2764 | tag = HPSA_TAG_DISCARD_ERROR_BITS(raw_tag); | ||
2765 | c = NULL; | ||
2766 | hlist_for_each_entry(c, tmp, &h->cmpQ, list) { | ||
2767 | if (c->busaddr == tag) { | ||
2768 | finish_cmd(c, raw_tag); | ||
2769 | break; | ||
2770 | } | ||
2771 | } | ||
2772 | } | ||
2773 | } | ||
2774 | spin_unlock_irqrestore(&h->lock, flags); | ||
2775 | return IRQ_HANDLED; | ||
2776 | } | ||
2777 | |||
2778 | /* Send a message CDB to the firmware. */ | ||
2779 | static __devinit int hpsa_message(struct pci_dev *pdev, unsigned char opcode, | ||
2780 | unsigned char type) | ||
2781 | { | ||
2782 | struct Command { | ||
2783 | struct CommandListHeader CommandHeader; | ||
2784 | struct RequestBlock Request; | ||
2785 | struct ErrDescriptor ErrorDescriptor; | ||
2786 | }; | ||
2787 | struct Command *cmd; | ||
2788 | static const size_t cmd_sz = sizeof(*cmd) + | ||
2789 | sizeof(cmd->ErrorDescriptor); | ||
2790 | dma_addr_t paddr64; | ||
2791 | uint32_t paddr32, tag; | ||
2792 | void __iomem *vaddr; | ||
2793 | int i, err; | ||
2794 | |||
2795 | vaddr = pci_ioremap_bar(pdev, 0); | ||
2796 | if (vaddr == NULL) | ||
2797 | return -ENOMEM; | ||
2798 | |||
2799 | /* The Inbound Post Queue only accepts 32-bit physical addresses for the | ||
2800 | * CCISS commands, so they must be allocated from the lower 4GiB of | ||
2801 | * memory. | ||
2802 | */ | ||
2803 | err = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32)); | ||
2804 | if (err) { | ||
2805 | iounmap(vaddr); | ||
2806 | return -ENOMEM; | ||
2807 | } | ||
2808 | |||
2809 | cmd = pci_alloc_consistent(pdev, cmd_sz, &paddr64); | ||
2810 | if (cmd == NULL) { | ||
2811 | iounmap(vaddr); | ||
2812 | return -ENOMEM; | ||
2813 | } | ||
2814 | |||
2815 | /* This must fit, because of the 32-bit consistent DMA mask. Also, | ||
2816 | * although there's no guarantee, we assume that the address is at | ||
2817 | * least 4-byte aligned (most likely, it's page-aligned). | ||
2818 | */ | ||
2819 | paddr32 = paddr64; | ||
2820 | |||
2821 | cmd->CommandHeader.ReplyQueue = 0; | ||
2822 | cmd->CommandHeader.SGList = 0; | ||
2823 | cmd->CommandHeader.SGTotal = 0; | ||
2824 | cmd->CommandHeader.Tag.lower = paddr32; | ||
2825 | cmd->CommandHeader.Tag.upper = 0; | ||
2826 | memset(&cmd->CommandHeader.LUN.LunAddrBytes, 0, 8); | ||
2827 | |||
2828 | cmd->Request.CDBLen = 16; | ||
2829 | cmd->Request.Type.Type = TYPE_MSG; | ||
2830 | cmd->Request.Type.Attribute = ATTR_HEADOFQUEUE; | ||
2831 | cmd->Request.Type.Direction = XFER_NONE; | ||
2832 | cmd->Request.Timeout = 0; /* Don't time out */ | ||
2833 | cmd->Request.CDB[0] = opcode; | ||
2834 | cmd->Request.CDB[1] = type; | ||
2835 | memset(&cmd->Request.CDB[2], 0, 14); /* rest of the CDB is reserved */ | ||
2836 | cmd->ErrorDescriptor.Addr.lower = paddr32 + sizeof(*cmd); | ||
2837 | cmd->ErrorDescriptor.Addr.upper = 0; | ||
2838 | cmd->ErrorDescriptor.Len = sizeof(struct ErrorInfo); | ||
2839 | |||
2840 | writel(paddr32, vaddr + SA5_REQUEST_PORT_OFFSET); | ||
2841 | |||
2842 | for (i = 0; i < HPSA_MSG_SEND_RETRY_LIMIT; i++) { | ||
2843 | tag = readl(vaddr + SA5_REPLY_PORT_OFFSET); | ||
2844 | if (HPSA_TAG_DISCARD_ERROR_BITS(tag) == paddr32) | ||
2845 | break; | ||
2846 | msleep(HPSA_MSG_SEND_RETRY_INTERVAL_MSECS); | ||
2847 | } | ||
2848 | |||
2849 | iounmap(vaddr); | ||
2850 | |||
2851 | /* we leak the DMA buffer here ... no choice since the controller could | ||
2852 | * still complete the command. | ||
2853 | */ | ||
2854 | if (i == HPSA_MSG_SEND_RETRY_LIMIT) { | ||
2855 | dev_err(&pdev->dev, "controller message %02x:%02x timed out\n", | ||
2856 | opcode, type); | ||
2857 | return -ETIMEDOUT; | ||
2858 | } | ||
2859 | |||
2860 | pci_free_consistent(pdev, cmd_sz, cmd, paddr64); | ||
2861 | |||
2862 | if (tag & HPSA_ERROR_BIT) { | ||
2863 | dev_err(&pdev->dev, "controller message %02x:%02x failed\n", | ||
2864 | opcode, type); | ||
2865 | return -EIO; | ||
2866 | } | ||
2867 | |||
2868 | dev_info(&pdev->dev, "controller message %02x:%02x succeeded\n", | ||
2869 | opcode, type); | ||
2870 | return 0; | ||
2871 | } | ||
2872 | |||
2873 | #define hpsa_soft_reset_controller(p) hpsa_message(p, 1, 0) | ||
2874 | #define hpsa_noop(p) hpsa_message(p, 3, 0) | ||
2875 | |||
2876 | static __devinit int hpsa_reset_msi(struct pci_dev *pdev) | ||
2877 | { | ||
2878 | /* the #defines are stolen from drivers/pci/msi.h. */ | ||
2879 | #define msi_control_reg(base) (base + PCI_MSI_FLAGS) | ||
2880 | #define PCI_MSIX_FLAGS_ENABLE (1 << 15) | ||
2881 | |||
2882 | int pos; | ||
2883 | u16 control = 0; | ||
2884 | |||
2885 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSI); | ||
2886 | if (pos) { | ||
2887 | pci_read_config_word(pdev, msi_control_reg(pos), &control); | ||
2888 | if (control & PCI_MSI_FLAGS_ENABLE) { | ||
2889 | dev_info(&pdev->dev, "resetting MSI\n"); | ||
2890 | pci_write_config_word(pdev, msi_control_reg(pos), | ||
2891 | control & ~PCI_MSI_FLAGS_ENABLE); | ||
2892 | } | ||
2893 | } | ||
2894 | |||
2895 | pos = pci_find_capability(pdev, PCI_CAP_ID_MSIX); | ||
2896 | if (pos) { | ||
2897 | pci_read_config_word(pdev, msi_control_reg(pos), &control); | ||
2898 | if (control & PCI_MSIX_FLAGS_ENABLE) { | ||
2899 | dev_info(&pdev->dev, "resetting MSI-X\n"); | ||
2900 | pci_write_config_word(pdev, msi_control_reg(pos), | ||
2901 | control & ~PCI_MSIX_FLAGS_ENABLE); | ||
2902 | } | ||
2903 | } | ||
2904 | |||
2905 | return 0; | ||
2906 | } | ||
2907 | |||
2908 | /* This does a hard reset of the controller using PCI power management | ||
2909 | * states. | ||
2910 | */ | ||
2911 | static __devinit int hpsa_hard_reset_controller(struct pci_dev *pdev) | ||
2912 | { | ||
2913 | u16 pmcsr, saved_config_space[32]; | ||
2914 | int i, pos; | ||
2915 | |||
2916 | dev_info(&pdev->dev, "using PCI PM to reset controller\n"); | ||
2917 | |||
2918 | /* This is very nearly the same thing as | ||
2919 | * | ||
2920 | * pci_save_state(pci_dev); | ||
2921 | * pci_set_power_state(pci_dev, PCI_D3hot); | ||
2922 | * pci_set_power_state(pci_dev, PCI_D0); | ||
2923 | * pci_restore_state(pci_dev); | ||
2924 | * | ||
2925 | * but we can't use these nice canned kernel routines on | ||
2926 | * kexec, because they also check the MSI/MSI-X state in PCI | ||
2927 | * configuration space and do the wrong thing when it is | ||
2928 | * set/cleared. Also, the pci_save/restore_state functions | ||
2929 | * violate the ordering requirements for restoring the | ||
2930 | * configuration space from the CCISS document (see the | ||
2931 | * comment below). So we roll our own .... | ||
2932 | */ | ||
2933 | |||
2934 | for (i = 0; i < 32; i++) | ||
2935 | pci_read_config_word(pdev, 2*i, &saved_config_space[i]); | ||
2936 | |||
2937 | pos = pci_find_capability(pdev, PCI_CAP_ID_PM); | ||
2938 | if (pos == 0) { | ||
2939 | dev_err(&pdev->dev, | ||
2940 | "hpsa_reset_controller: PCI PM not supported\n"); | ||
2941 | return -ENODEV; | ||
2942 | } | ||
2943 | |||
2944 | /* Quoting from the Open CISS Specification: "The Power | ||
2945 | * Management Control/Status Register (CSR) controls the power | ||
2946 | * state of the device. The normal operating state is D0, | ||
2947 | * CSR=00h. The software off state is D3, CSR=03h. To reset | ||
2948 | * the controller, place the interface device in D3 then to | ||
2949 | * D0, this causes a secondary PCI reset which will reset the | ||
2950 | * controller." | ||
2951 | */ | ||
2952 | |||
2953 | /* enter the D3hot power management state */ | ||
2954 | pci_read_config_word(pdev, pos + PCI_PM_CTRL, &pmcsr); | ||
2955 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | ||
2956 | pmcsr |= PCI_D3hot; | ||
2957 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | ||
2958 | |||
2959 | msleep(500); | ||
2960 | |||
2961 | /* enter the D0 power management state */ | ||
2962 | pmcsr &= ~PCI_PM_CTRL_STATE_MASK; | ||
2963 | pmcsr |= PCI_D0; | ||
2964 | pci_write_config_word(pdev, pos + PCI_PM_CTRL, pmcsr); | ||
2965 | |||
2966 | msleep(500); | ||
2967 | |||
2968 | /* Restore the PCI configuration space. The Open CISS | ||
2969 | * Specification says, "Restore the PCI Configuration | ||
2970 | * Registers, offsets 00h through 60h. It is important to | ||
2971 | * restore the command register, 16-bits at offset 04h, | ||
2972 | * last. Do not restore the configuration status register, | ||
2973 | * 16-bits at offset 06h." Note that the offset is 2*i. | ||
2974 | */ | ||
2975 | for (i = 0; i < 32; i++) { | ||
2976 | if (i == 2 || i == 3) | ||
2977 | continue; | ||
2978 | pci_write_config_word(pdev, 2*i, saved_config_space[i]); | ||
2979 | } | ||
2980 | wmb(); | ||
2981 | pci_write_config_word(pdev, 4, saved_config_space[2]); | ||
2982 | |||
2983 | return 0; | ||
2984 | } | ||
2985 | |||
2986 | /* | ||
2987 | * We cannot read the structure directly, for portability we must use | ||
2988 | * the io functions. | ||
2989 | * This is for debug only. | ||
2990 | */ | ||
2991 | #ifdef HPSA_DEBUG | ||
2992 | static void print_cfg_table(struct device *dev, struct CfgTable *tb) | ||
2993 | { | ||
2994 | int i; | ||
2995 | char temp_name[17]; | ||
2996 | |||
2997 | dev_info(dev, "Controller Configuration information\n"); | ||
2998 | dev_info(dev, "------------------------------------\n"); | ||
2999 | for (i = 0; i < 4; i++) | ||
3000 | temp_name[i] = readb(&(tb->Signature[i])); | ||
3001 | temp_name[4] = '\0'; | ||
3002 | dev_info(dev, " Signature = %s\n", temp_name); | ||
3003 | dev_info(dev, " Spec Number = %d\n", readl(&(tb->SpecValence))); | ||
3004 | dev_info(dev, " Transport methods supported = 0x%x\n", | ||
3005 | readl(&(tb->TransportSupport))); | ||
3006 | dev_info(dev, " Transport methods active = 0x%x\n", | ||
3007 | readl(&(tb->TransportActive))); | ||
3008 | dev_info(dev, " Requested transport Method = 0x%x\n", | ||
3009 | readl(&(tb->HostWrite.TransportRequest))); | ||
3010 | dev_info(dev, " Coalesce Interrupt Delay = 0x%x\n", | ||
3011 | readl(&(tb->HostWrite.CoalIntDelay))); | ||
3012 | dev_info(dev, " Coalesce Interrupt Count = 0x%x\n", | ||
3013 | readl(&(tb->HostWrite.CoalIntCount))); | ||
3014 | dev_info(dev, " Max outstanding commands = 0x%d\n", | ||
3015 | readl(&(tb->CmdsOutMax))); | ||
3016 | dev_info(dev, " Bus Types = 0x%x\n", readl(&(tb->BusTypes))); | ||
3017 | for (i = 0; i < 16; i++) | ||
3018 | temp_name[i] = readb(&(tb->ServerName[i])); | ||
3019 | temp_name[16] = '\0'; | ||
3020 | dev_info(dev, " Server Name = %s\n", temp_name); | ||
3021 | dev_info(dev, " Heartbeat Counter = 0x%x\n\n\n", | ||
3022 | readl(&(tb->HeartBeat))); | ||
3023 | } | ||
3024 | #endif /* HPSA_DEBUG */ | ||
3025 | |||
3026 | static int find_PCI_BAR_index(struct pci_dev *pdev, unsigned long pci_bar_addr) | ||
3027 | { | ||
3028 | int i, offset, mem_type, bar_type; | ||
3029 | |||
3030 | if (pci_bar_addr == PCI_BASE_ADDRESS_0) /* looking for BAR zero? */ | ||
3031 | return 0; | ||
3032 | offset = 0; | ||
3033 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | ||
3034 | bar_type = pci_resource_flags(pdev, i) & PCI_BASE_ADDRESS_SPACE; | ||
3035 | if (bar_type == PCI_BASE_ADDRESS_SPACE_IO) | ||
3036 | offset += 4; | ||
3037 | else { | ||
3038 | mem_type = pci_resource_flags(pdev, i) & | ||
3039 | PCI_BASE_ADDRESS_MEM_TYPE_MASK; | ||
3040 | switch (mem_type) { | ||
3041 | case PCI_BASE_ADDRESS_MEM_TYPE_32: | ||
3042 | case PCI_BASE_ADDRESS_MEM_TYPE_1M: | ||
3043 | offset += 4; /* 32 bit */ | ||
3044 | break; | ||
3045 | case PCI_BASE_ADDRESS_MEM_TYPE_64: | ||
3046 | offset += 8; | ||
3047 | break; | ||
3048 | default: /* reserved in PCI 2.2 */ | ||
3049 | dev_warn(&pdev->dev, | ||
3050 | "base address is invalid\n"); | ||
3051 | return -1; | ||
3052 | break; | ||
3053 | } | ||
3054 | } | ||
3055 | if (offset == pci_bar_addr - PCI_BASE_ADDRESS_0) | ||
3056 | return i + 1; | ||
3057 | } | ||
3058 | return -1; | ||
3059 | } | ||
3060 | |||
3061 | /* If MSI/MSI-X is supported by the kernel we will try to enable it on | ||
3062 | * controllers that are capable. If not, we use IO-APIC mode. | ||
3063 | */ | ||
3064 | |||
3065 | static void __devinit hpsa_interrupt_mode(struct ctlr_info *h, | ||
3066 | struct pci_dev *pdev, __u32 board_id) | ||
3067 | { | ||
3068 | #ifdef CONFIG_PCI_MSI | ||
3069 | int err; | ||
3070 | struct msix_entry hpsa_msix_entries[4] = { {0, 0}, {0, 1}, | ||
3071 | {0, 2}, {0, 3} | ||
3072 | }; | ||
3073 | |||
3074 | /* Some boards advertise MSI but don't really support it */ | ||
3075 | if ((board_id == 0x40700E11) || | ||
3076 | (board_id == 0x40800E11) || | ||
3077 | (board_id == 0x40820E11) || (board_id == 0x40830E11)) | ||
3078 | goto default_int_mode; | ||
3079 | if (pci_find_capability(pdev, PCI_CAP_ID_MSIX)) { | ||
3080 | dev_info(&pdev->dev, "MSIX\n"); | ||
3081 | err = pci_enable_msix(pdev, hpsa_msix_entries, 4); | ||
3082 | if (!err) { | ||
3083 | h->intr[0] = hpsa_msix_entries[0].vector; | ||
3084 | h->intr[1] = hpsa_msix_entries[1].vector; | ||
3085 | h->intr[2] = hpsa_msix_entries[2].vector; | ||
3086 | h->intr[3] = hpsa_msix_entries[3].vector; | ||
3087 | h->msix_vector = 1; | ||
3088 | return; | ||
3089 | } | ||
3090 | if (err > 0) { | ||
3091 | dev_warn(&pdev->dev, "only %d MSI-X vectors " | ||
3092 | "available\n", err); | ||
3093 | goto default_int_mode; | ||
3094 | } else { | ||
3095 | dev_warn(&pdev->dev, "MSI-X init failed %d\n", | ||
3096 | err); | ||
3097 | goto default_int_mode; | ||
3098 | } | ||
3099 | } | ||
3100 | if (pci_find_capability(pdev, PCI_CAP_ID_MSI)) { | ||
3101 | dev_info(&pdev->dev, "MSI\n"); | ||
3102 | if (!pci_enable_msi(pdev)) | ||
3103 | h->msi_vector = 1; | ||
3104 | else | ||
3105 | dev_warn(&pdev->dev, "MSI init failed\n"); | ||
3106 | } | ||
3107 | default_int_mode: | ||
3108 | #endif /* CONFIG_PCI_MSI */ | ||
3109 | /* if we get here we're going to use the default interrupt mode */ | ||
3110 | h->intr[SIMPLE_MODE_INT] = pdev->irq; | ||
3111 | return; | ||
3112 | } | ||
3113 | |||
3114 | static int hpsa_pci_init(struct ctlr_info *h, struct pci_dev *pdev) | ||
3115 | { | ||
3116 | ushort subsystem_vendor_id, subsystem_device_id, command; | ||
3117 | __u32 board_id, scratchpad = 0; | ||
3118 | __u64 cfg_offset; | ||
3119 | __u32 cfg_base_addr; | ||
3120 | __u64 cfg_base_addr_index; | ||
3121 | int i, prod_index, err; | ||
3122 | |||
3123 | subsystem_vendor_id = pdev->subsystem_vendor; | ||
3124 | subsystem_device_id = pdev->subsystem_device; | ||
3125 | board_id = (((__u32) (subsystem_device_id << 16) & 0xffff0000) | | ||
3126 | subsystem_vendor_id); | ||
3127 | |||
3128 | for (i = 0; i < ARRAY_SIZE(products); i++) | ||
3129 | if (board_id == products[i].board_id) | ||
3130 | break; | ||
3131 | |||
3132 | prod_index = i; | ||
3133 | |||
3134 | if (prod_index == ARRAY_SIZE(products)) { | ||
3135 | prod_index--; | ||
3136 | if (subsystem_vendor_id != PCI_VENDOR_ID_HP || | ||
3137 | !hpsa_allow_any) { | ||
3138 | dev_warn(&pdev->dev, "unrecognized board ID:" | ||
3139 | " 0x%08lx, ignoring.\n", | ||
3140 | (unsigned long) board_id); | ||
3141 | return -ENODEV; | ||
3142 | } | ||
3143 | } | ||
3144 | /* check to see if controller has been disabled | ||
3145 | * BEFORE trying to enable it | ||
3146 | */ | ||
3147 | (void)pci_read_config_word(pdev, PCI_COMMAND, &command); | ||
3148 | if (!(command & 0x02)) { | ||
3149 | dev_warn(&pdev->dev, "controller appears to be disabled\n"); | ||
3150 | return -ENODEV; | ||
3151 | } | ||
3152 | |||
3153 | err = pci_enable_device(pdev); | ||
3154 | if (err) { | ||
3155 | dev_warn(&pdev->dev, "unable to enable PCI device\n"); | ||
3156 | return err; | ||
3157 | } | ||
3158 | |||
3159 | err = pci_request_regions(pdev, "hpsa"); | ||
3160 | if (err) { | ||
3161 | dev_err(&pdev->dev, "cannot obtain PCI resources, aborting\n"); | ||
3162 | return err; | ||
3163 | } | ||
3164 | |||
3165 | /* If the kernel supports MSI/MSI-X we will try to enable that, | ||
3166 | * else we use the IO-APIC interrupt assigned to us by system ROM. | ||
3167 | */ | ||
3168 | hpsa_interrupt_mode(h, pdev, board_id); | ||
3169 | |||
3170 | /* find the memory BAR */ | ||
3171 | for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) { | ||
3172 | if (pci_resource_flags(pdev, i) & IORESOURCE_MEM) | ||
3173 | break; | ||
3174 | } | ||
3175 | if (i == DEVICE_COUNT_RESOURCE) { | ||
3176 | dev_warn(&pdev->dev, "no memory BAR found\n"); | ||
3177 | err = -ENODEV; | ||
3178 | goto err_out_free_res; | ||
3179 | } | ||
3180 | |||
3181 | h->paddr = pci_resource_start(pdev, i); /* addressing mode bits | ||
3182 | * already removed | ||
3183 | */ | ||
3184 | |||
3185 | h->vaddr = remap_pci_mem(h->paddr, 0x250); | ||
3186 | |||
3187 | /* Wait for the board to become ready. */ | ||
3188 | for (i = 0; i < HPSA_BOARD_READY_ITERATIONS; i++) { | ||
3189 | scratchpad = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET); | ||
3190 | if (scratchpad == HPSA_FIRMWARE_READY) | ||
3191 | break; | ||
3192 | msleep(HPSA_BOARD_READY_POLL_INTERVAL_MSECS); | ||
3193 | } | ||
3194 | if (scratchpad != HPSA_FIRMWARE_READY) { | ||
3195 | dev_warn(&pdev->dev, "board not ready, timed out.\n"); | ||
3196 | err = -ENODEV; | ||
3197 | goto err_out_free_res; | ||
3198 | } | ||
3199 | |||
3200 | /* get the address index number */ | ||
3201 | cfg_base_addr = readl(h->vaddr + SA5_CTCFG_OFFSET); | ||
3202 | cfg_base_addr &= (__u32) 0x0000ffff; | ||
3203 | cfg_base_addr_index = find_PCI_BAR_index(pdev, cfg_base_addr); | ||
3204 | if (cfg_base_addr_index == -1) { | ||
3205 | dev_warn(&pdev->dev, "cannot find cfg_base_addr_index\n"); | ||
3206 | err = -ENODEV; | ||
3207 | goto err_out_free_res; | ||
3208 | } | ||
3209 | |||
3210 | cfg_offset = readl(h->vaddr + SA5_CTMEM_OFFSET); | ||
3211 | h->cfgtable = remap_pci_mem(pci_resource_start(pdev, | ||
3212 | cfg_base_addr_index) + cfg_offset, | ||
3213 | sizeof(h->cfgtable)); | ||
3214 | h->board_id = board_id; | ||
3215 | |||
3216 | /* Query controller for max supported commands: */ | ||
3217 | h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); | ||
3218 | |||
3219 | h->product_name = products[prod_index].product_name; | ||
3220 | h->access = *(products[prod_index].access); | ||
3221 | /* Allow room for some ioctls */ | ||
3222 | h->nr_cmds = h->max_commands - 4; | ||
3223 | |||
3224 | if ((readb(&h->cfgtable->Signature[0]) != 'C') || | ||
3225 | (readb(&h->cfgtable->Signature[1]) != 'I') || | ||
3226 | (readb(&h->cfgtable->Signature[2]) != 'S') || | ||
3227 | (readb(&h->cfgtable->Signature[3]) != 'S')) { | ||
3228 | dev_warn(&pdev->dev, "not a valid CISS config table\n"); | ||
3229 | err = -ENODEV; | ||
3230 | goto err_out_free_res; | ||
3231 | } | ||
3232 | #ifdef CONFIG_X86 | ||
3233 | { | ||
3234 | /* Need to enable prefetch in the SCSI core for 6400 in x86 */ | ||
3235 | __u32 prefetch; | ||
3236 | prefetch = readl(&(h->cfgtable->SCSI_Prefetch)); | ||
3237 | prefetch |= 0x100; | ||
3238 | writel(prefetch, &(h->cfgtable->SCSI_Prefetch)); | ||
3239 | } | ||
3240 | #endif | ||
3241 | |||
3242 | /* Disabling DMA prefetch for the P600 | ||
3243 | * An ASIC bug may result in a prefetch beyond | ||
3244 | * physical memory. | ||
3245 | */ | ||
3246 | if (board_id == 0x3225103C) { | ||
3247 | __u32 dma_prefetch; | ||
3248 | dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG); | ||
3249 | dma_prefetch |= 0x8000; | ||
3250 | writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG); | ||
3251 | } | ||
3252 | |||
3253 | h->max_commands = readl(&(h->cfgtable->CmdsOutMax)); | ||
3254 | /* Update the field, and then ring the doorbell */ | ||
3255 | writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest)); | ||
3256 | writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL); | ||
3257 | |||
3258 | /* under certain very rare conditions, this can take awhile. | ||
3259 | * (e.g.: hot replace a failed 144GB drive in a RAID 5 set right | ||
3260 | * as we enter this code.) | ||
3261 | */ | ||
3262 | for (i = 0; i < MAX_CONFIG_WAIT; i++) { | ||
3263 | if (!(readl(h->vaddr + SA5_DOORBELL) & CFGTBL_ChangeReq)) | ||
3264 | break; | ||
3265 | /* delay and try again */ | ||
3266 | msleep(10); | ||
3267 | } | ||
3268 | |||
3269 | #ifdef HPSA_DEBUG | ||
3270 | print_cfg_table(&pdev->dev, h->cfgtable); | ||
3271 | #endif /* HPSA_DEBUG */ | ||
3272 | |||
3273 | if (!(readl(&(h->cfgtable->TransportActive)) & CFGTBL_Trans_Simple)) { | ||
3274 | dev_warn(&pdev->dev, "unable to get board into simple mode\n"); | ||
3275 | err = -ENODEV; | ||
3276 | goto err_out_free_res; | ||
3277 | } | ||
3278 | return 0; | ||
3279 | |||
3280 | err_out_free_res: | ||
3281 | /* | ||
3282 | * Deliberately omit pci_disable_device(): it does something nasty to | ||
3283 | * Smart Array controllers that pci_enable_device does not undo | ||
3284 | */ | ||
3285 | pci_release_regions(pdev); | ||
3286 | return err; | ||
3287 | } | ||
3288 | |||
3289 | static int __devinit hpsa_init_one(struct pci_dev *pdev, | ||
3290 | const struct pci_device_id *ent) | ||
3291 | { | ||
3292 | int i; | ||
3293 | int dac; | ||
3294 | struct ctlr_info *h; | ||
3295 | |||
3296 | if (number_of_controllers == 0) | ||
3297 | printk(KERN_INFO DRIVER_NAME "\n"); | ||
3298 | if (reset_devices) { | ||
3299 | /* Reset the controller with a PCI power-cycle */ | ||
3300 | if (hpsa_hard_reset_controller(pdev) || hpsa_reset_msi(pdev)) | ||
3301 | return -ENODEV; | ||
3302 | |||
3303 | /* Some devices (notably the HP Smart Array 5i Controller) | ||
3304 | need a little pause here */ | ||
3305 | msleep(HPSA_POST_RESET_PAUSE_MSECS); | ||
3306 | |||
3307 | /* Now try to get the controller to respond to a no-op */ | ||
3308 | for (i = 0; i < HPSA_POST_RESET_NOOP_RETRIES; i++) { | ||
3309 | if (hpsa_noop(pdev) == 0) | ||
3310 | break; | ||
3311 | else | ||
3312 | dev_warn(&pdev->dev, "no-op failed%s\n", | ||
3313 | (i < 11 ? "; re-trying" : "")); | ||
3314 | } | ||
3315 | } | ||
3316 | |||
3317 | BUILD_BUG_ON(sizeof(struct CommandList) % 8); | ||
3318 | h = kzalloc(sizeof(*h), GFP_KERNEL); | ||
3319 | if (!h) | ||
3320 | return -1; | ||
3321 | |||
3322 | h->busy_initializing = 1; | ||
3323 | INIT_HLIST_HEAD(&h->cmpQ); | ||
3324 | INIT_HLIST_HEAD(&h->reqQ); | ||
3325 | mutex_init(&h->busy_shutting_down); | ||
3326 | init_completion(&h->scan_wait); | ||
3327 | if (hpsa_pci_init(h, pdev) != 0) | ||
3328 | goto clean1; | ||
3329 | |||
3330 | sprintf(h->devname, "hpsa%d", number_of_controllers); | ||
3331 | h->ctlr = number_of_controllers; | ||
3332 | number_of_controllers++; | ||
3333 | h->pdev = pdev; | ||
3334 | |||
3335 | /* configure PCI DMA stuff */ | ||
3336 | if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(64))) | ||
3337 | dac = 1; | ||
3338 | else if (!pci_set_dma_mask(pdev, DMA_BIT_MASK(32))) | ||
3339 | dac = 0; | ||
3340 | else { | ||
3341 | dev_err(&pdev->dev, "no suitable DMA available\n"); | ||
3342 | goto clean1; | ||
3343 | } | ||
3344 | |||
3345 | /* make sure the board interrupts are off */ | ||
3346 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | ||
3347 | if (request_irq(h->intr[SIMPLE_MODE_INT], do_hpsa_intr, | ||
3348 | IRQF_DISABLED | IRQF_SHARED, h->devname, h)) { | ||
3349 | dev_err(&pdev->dev, "unable to get irq %d for %s\n", | ||
3350 | h->intr[SIMPLE_MODE_INT], h->devname); | ||
3351 | goto clean2; | ||
3352 | } | ||
3353 | |||
3354 | dev_info(&pdev->dev, "%s: <0x%x> at PCI %s IRQ %d%s using DAC\n", | ||
3355 | h->devname, pdev->device, pci_name(pdev), | ||
3356 | h->intr[SIMPLE_MODE_INT], dac ? "" : " not"); | ||
3357 | |||
3358 | h->cmd_pool_bits = | ||
3359 | kmalloc(((h->nr_cmds + BITS_PER_LONG - | ||
3360 | 1) / BITS_PER_LONG) * sizeof(unsigned long), GFP_KERNEL); | ||
3361 | h->cmd_pool = pci_alloc_consistent(h->pdev, | ||
3362 | h->nr_cmds * sizeof(*h->cmd_pool), | ||
3363 | &(h->cmd_pool_dhandle)); | ||
3364 | h->errinfo_pool = pci_alloc_consistent(h->pdev, | ||
3365 | h->nr_cmds * sizeof(*h->errinfo_pool), | ||
3366 | &(h->errinfo_pool_dhandle)); | ||
3367 | if ((h->cmd_pool_bits == NULL) | ||
3368 | || (h->cmd_pool == NULL) | ||
3369 | || (h->errinfo_pool == NULL)) { | ||
3370 | dev_err(&pdev->dev, "out of memory"); | ||
3371 | goto clean4; | ||
3372 | } | ||
3373 | spin_lock_init(&h->lock); | ||
3374 | |||
3375 | pci_set_drvdata(pdev, h); | ||
3376 | memset(h->cmd_pool_bits, 0, | ||
3377 | ((h->nr_cmds + BITS_PER_LONG - | ||
3378 | 1) / BITS_PER_LONG) * sizeof(unsigned long)); | ||
3379 | |||
3380 | hpsa_scsi_setup(h); | ||
3381 | |||
3382 | /* Turn the interrupts on so we can service requests */ | ||
3383 | h->access.set_intr_mask(h, HPSA_INTR_ON); | ||
3384 | |||
3385 | hpsa_register_scsi(h); /* hook ourselves into SCSI subsystem */ | ||
3386 | h->busy_initializing = 0; | ||
3387 | return 1; | ||
3388 | |||
3389 | clean4: | ||
3390 | kfree(h->cmd_pool_bits); | ||
3391 | if (h->cmd_pool) | ||
3392 | pci_free_consistent(h->pdev, | ||
3393 | h->nr_cmds * sizeof(struct CommandList), | ||
3394 | h->cmd_pool, h->cmd_pool_dhandle); | ||
3395 | if (h->errinfo_pool) | ||
3396 | pci_free_consistent(h->pdev, | ||
3397 | h->nr_cmds * sizeof(struct ErrorInfo), | ||
3398 | h->errinfo_pool, | ||
3399 | h->errinfo_pool_dhandle); | ||
3400 | free_irq(h->intr[SIMPLE_MODE_INT], h); | ||
3401 | clean2: | ||
3402 | clean1: | ||
3403 | h->busy_initializing = 0; | ||
3404 | kfree(h); | ||
3405 | return -1; | ||
3406 | } | ||
3407 | |||
3408 | static void hpsa_flush_cache(struct ctlr_info *h) | ||
3409 | { | ||
3410 | char *flush_buf; | ||
3411 | struct CommandList *c; | ||
3412 | |||
3413 | flush_buf = kzalloc(4, GFP_KERNEL); | ||
3414 | if (!flush_buf) | ||
3415 | return; | ||
3416 | |||
3417 | c = cmd_special_alloc(h); | ||
3418 | if (!c) { | ||
3419 | dev_warn(&h->pdev->dev, "cmd_special_alloc returned NULL!\n"); | ||
3420 | goto out_of_memory; | ||
3421 | } | ||
3422 | fill_cmd(c, HPSA_CACHE_FLUSH, h, flush_buf, 4, 0, | ||
3423 | RAID_CTLR_LUNID, TYPE_CMD); | ||
3424 | hpsa_scsi_do_simple_cmd_with_retry(h, c, PCI_DMA_TODEVICE); | ||
3425 | if (c->err_info->CommandStatus != 0) | ||
3426 | dev_warn(&h->pdev->dev, | ||
3427 | "error flushing cache on controller\n"); | ||
3428 | cmd_special_free(h, c); | ||
3429 | out_of_memory: | ||
3430 | kfree(flush_buf); | ||
3431 | } | ||
3432 | |||
3433 | static void hpsa_shutdown(struct pci_dev *pdev) | ||
3434 | { | ||
3435 | struct ctlr_info *h; | ||
3436 | |||
3437 | h = pci_get_drvdata(pdev); | ||
3438 | /* Turn board interrupts off and send the flush cache command | ||
3439 | * sendcmd will turn off interrupt, and send the flush... | ||
3440 | * To write all data in the battery backed cache to disks | ||
3441 | */ | ||
3442 | hpsa_flush_cache(h); | ||
3443 | h->access.set_intr_mask(h, HPSA_INTR_OFF); | ||
3444 | free_irq(h->intr[2], h); | ||
3445 | #ifdef CONFIG_PCI_MSI | ||
3446 | if (h->msix_vector) | ||
3447 | pci_disable_msix(h->pdev); | ||
3448 | else if (h->msi_vector) | ||
3449 | pci_disable_msi(h->pdev); | ||
3450 | #endif /* CONFIG_PCI_MSI */ | ||
3451 | } | ||
3452 | |||
3453 | static void __devexit hpsa_remove_one(struct pci_dev *pdev) | ||
3454 | { | ||
3455 | struct ctlr_info *h; | ||
3456 | |||
3457 | if (pci_get_drvdata(pdev) == NULL) { | ||
3458 | dev_err(&pdev->dev, "unable to remove device \n"); | ||
3459 | return; | ||
3460 | } | ||
3461 | h = pci_get_drvdata(pdev); | ||
3462 | mutex_lock(&h->busy_shutting_down); | ||
3463 | remove_from_scan_list(h); | ||
3464 | hpsa_unregister_scsi(h); /* unhook from SCSI subsystem */ | ||
3465 | hpsa_shutdown(pdev); | ||
3466 | iounmap(h->vaddr); | ||
3467 | pci_free_consistent(h->pdev, | ||
3468 | h->nr_cmds * sizeof(struct CommandList), | ||
3469 | h->cmd_pool, h->cmd_pool_dhandle); | ||
3470 | pci_free_consistent(h->pdev, | ||
3471 | h->nr_cmds * sizeof(struct ErrorInfo), | ||
3472 | h->errinfo_pool, h->errinfo_pool_dhandle); | ||
3473 | kfree(h->cmd_pool_bits); | ||
3474 | /* | ||
3475 | * Deliberately omit pci_disable_device(): it does something nasty to | ||
3476 | * Smart Array controllers that pci_enable_device does not undo | ||
3477 | */ | ||
3478 | pci_release_regions(pdev); | ||
3479 | pci_set_drvdata(pdev, NULL); | ||
3480 | mutex_unlock(&h->busy_shutting_down); | ||
3481 | kfree(h); | ||
3482 | } | ||
3483 | |||
3484 | static int hpsa_suspend(__attribute__((unused)) struct pci_dev *pdev, | ||
3485 | __attribute__((unused)) pm_message_t state) | ||
3486 | { | ||
3487 | return -ENOSYS; | ||
3488 | } | ||
3489 | |||
3490 | static int hpsa_resume(__attribute__((unused)) struct pci_dev *pdev) | ||
3491 | { | ||
3492 | return -ENOSYS; | ||
3493 | } | ||
3494 | |||
3495 | static struct pci_driver hpsa_pci_driver = { | ||
3496 | .name = "hpsa", | ||
3497 | .probe = hpsa_init_one, | ||
3498 | .remove = __devexit_p(hpsa_remove_one), | ||
3499 | .id_table = hpsa_pci_device_id, /* id_table */ | ||
3500 | .shutdown = hpsa_shutdown, | ||
3501 | .suspend = hpsa_suspend, | ||
3502 | .resume = hpsa_resume, | ||
3503 | }; | ||
3504 | |||
3505 | /* | ||
3506 | * This is it. Register the PCI driver information for the cards we control | ||
3507 | * the OS will call our registered routines when it finds one of our cards. | ||
3508 | */ | ||
3509 | static int __init hpsa_init(void) | ||
3510 | { | ||
3511 | int err; | ||
3512 | /* Start the scan thread */ | ||
3513 | hpsa_scan_thread = kthread_run(hpsa_scan_func, NULL, "hpsa_scan"); | ||
3514 | if (IS_ERR(hpsa_scan_thread)) { | ||
3515 | err = PTR_ERR(hpsa_scan_thread); | ||
3516 | return -ENODEV; | ||
3517 | } | ||
3518 | err = pci_register_driver(&hpsa_pci_driver); | ||
3519 | if (err) | ||
3520 | kthread_stop(hpsa_scan_thread); | ||
3521 | return err; | ||
3522 | } | ||
3523 | |||
3524 | static void __exit hpsa_cleanup(void) | ||
3525 | { | ||
3526 | pci_unregister_driver(&hpsa_pci_driver); | ||
3527 | kthread_stop(hpsa_scan_thread); | ||
3528 | } | ||
3529 | |||
3530 | module_init(hpsa_init); | ||
3531 | module_exit(hpsa_cleanup); | ||
diff --git a/drivers/scsi/hpsa.h b/drivers/scsi/hpsa.h new file mode 100644 index 000000000000..6bd1949144b5 --- /dev/null +++ b/drivers/scsi/hpsa.h | |||
@@ -0,0 +1,273 @@ | |||
1 | /* | ||
2 | * Disk Array driver for HP Smart Array SAS controllers | ||
3 | * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; version 2 of the License. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
12 | * NON INFRINGEMENT. See the GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | * | ||
18 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com | ||
19 | * | ||
20 | */ | ||
21 | #ifndef HPSA_H | ||
22 | #define HPSA_H | ||
23 | |||
24 | #include <scsi/scsicam.h> | ||
25 | |||
26 | #define IO_OK 0 | ||
27 | #define IO_ERROR 1 | ||
28 | |||
29 | struct ctlr_info; | ||
30 | |||
31 | struct access_method { | ||
32 | void (*submit_command)(struct ctlr_info *h, | ||
33 | struct CommandList *c); | ||
34 | void (*set_intr_mask)(struct ctlr_info *h, unsigned long val); | ||
35 | unsigned long (*fifo_full)(struct ctlr_info *h); | ||
36 | unsigned long (*intr_pending)(struct ctlr_info *h); | ||
37 | unsigned long (*command_completed)(struct ctlr_info *h); | ||
38 | }; | ||
39 | |||
40 | struct hpsa_scsi_dev_t { | ||
41 | int devtype; | ||
42 | int bus, target, lun; /* as presented to the OS */ | ||
43 | unsigned char scsi3addr[8]; /* as presented to the HW */ | ||
44 | #define RAID_CTLR_LUNID "\0\0\0\0\0\0\0\0" | ||
45 | unsigned char device_id[16]; /* from inquiry pg. 0x83 */ | ||
46 | unsigned char vendor[8]; /* bytes 8-15 of inquiry data */ | ||
47 | unsigned char model[16]; /* bytes 16-31 of inquiry data */ | ||
48 | unsigned char revision[4]; /* bytes 32-35 of inquiry data */ | ||
49 | unsigned char raid_level; /* from inquiry page 0xC1 */ | ||
50 | }; | ||
51 | |||
52 | struct ctlr_info { | ||
53 | int ctlr; | ||
54 | char devname[8]; | ||
55 | char *product_name; | ||
56 | char firm_ver[4]; /* Firmware version */ | ||
57 | struct pci_dev *pdev; | ||
58 | __u32 board_id; | ||
59 | void __iomem *vaddr; | ||
60 | unsigned long paddr; | ||
61 | int nr_cmds; /* Number of commands allowed on this controller */ | ||
62 | struct CfgTable __iomem *cfgtable; | ||
63 | int interrupts_enabled; | ||
64 | int major; | ||
65 | int max_commands; | ||
66 | int commands_outstanding; | ||
67 | int max_outstanding; /* Debug */ | ||
68 | int usage_count; /* number of opens all all minor devices */ | ||
69 | # define DOORBELL_INT 0 | ||
70 | # define PERF_MODE_INT 1 | ||
71 | # define SIMPLE_MODE_INT 2 | ||
72 | # define MEMQ_MODE_INT 3 | ||
73 | unsigned int intr[4]; | ||
74 | unsigned int msix_vector; | ||
75 | unsigned int msi_vector; | ||
76 | struct access_method access; | ||
77 | |||
78 | /* queue and queue Info */ | ||
79 | struct hlist_head reqQ; | ||
80 | struct hlist_head cmpQ; | ||
81 | unsigned int Qdepth; | ||
82 | unsigned int maxQsinceinit; | ||
83 | unsigned int maxSG; | ||
84 | spinlock_t lock; | ||
85 | |||
86 | /* pointers to command and error info pool */ | ||
87 | struct CommandList *cmd_pool; | ||
88 | dma_addr_t cmd_pool_dhandle; | ||
89 | struct ErrorInfo *errinfo_pool; | ||
90 | dma_addr_t errinfo_pool_dhandle; | ||
91 | unsigned long *cmd_pool_bits; | ||
92 | int nr_allocs; | ||
93 | int nr_frees; | ||
94 | int busy_initializing; | ||
95 | int busy_scanning; | ||
96 | struct mutex busy_shutting_down; | ||
97 | struct list_head scan_list; | ||
98 | struct completion scan_wait; | ||
99 | |||
100 | struct Scsi_Host *scsi_host; | ||
101 | spinlock_t devlock; /* to protect hba[ctlr]->dev[]; */ | ||
102 | int ndevices; /* number of used elements in .dev[] array. */ | ||
103 | #define HPSA_MAX_SCSI_DEVS_PER_HBA 256 | ||
104 | struct hpsa_scsi_dev_t *dev[HPSA_MAX_SCSI_DEVS_PER_HBA]; | ||
105 | }; | ||
106 | #define HPSA_ABORT_MSG 0 | ||
107 | #define HPSA_DEVICE_RESET_MSG 1 | ||
108 | #define HPSA_BUS_RESET_MSG 2 | ||
109 | #define HPSA_HOST_RESET_MSG 3 | ||
110 | #define HPSA_MSG_SEND_RETRY_LIMIT 10 | ||
111 | #define HPSA_MSG_SEND_RETRY_INTERVAL_MSECS 1000 | ||
112 | |||
113 | /* Maximum time in seconds driver will wait for command completions | ||
114 | * when polling before giving up. | ||
115 | */ | ||
116 | #define HPSA_MAX_POLL_TIME_SECS (20) | ||
117 | |||
118 | /* During SCSI error recovery, HPSA_TUR_RETRY_LIMIT defines | ||
119 | * how many times to retry TEST UNIT READY on a device | ||
120 | * while waiting for it to become ready before giving up. | ||
121 | * HPSA_MAX_WAIT_INTERVAL_SECS is the max wait interval | ||
122 | * between sending TURs while waiting for a device | ||
123 | * to become ready. | ||
124 | */ | ||
125 | #define HPSA_TUR_RETRY_LIMIT (20) | ||
126 | #define HPSA_MAX_WAIT_INTERVAL_SECS (30) | ||
127 | |||
128 | /* HPSA_BOARD_READY_WAIT_SECS is how long to wait for a board | ||
129 | * to become ready, in seconds, before giving up on it. | ||
130 | * HPSA_BOARD_READY_POLL_INTERVAL_MSECS * is how long to wait | ||
131 | * between polling the board to see if it is ready, in | ||
132 | * milliseconds. HPSA_BOARD_READY_POLL_INTERVAL and | ||
133 | * HPSA_BOARD_READY_ITERATIONS are derived from those. | ||
134 | */ | ||
135 | #define HPSA_BOARD_READY_WAIT_SECS (120) | ||
136 | #define HPSA_BOARD_READY_POLL_INTERVAL_MSECS (100) | ||
137 | #define HPSA_BOARD_READY_POLL_INTERVAL \ | ||
138 | ((HPSA_BOARD_READY_POLL_INTERVAL_MSECS * HZ) / 1000) | ||
139 | #define HPSA_BOARD_READY_ITERATIONS \ | ||
140 | ((HPSA_BOARD_READY_WAIT_SECS * 1000) / \ | ||
141 | HPSA_BOARD_READY_POLL_INTERVAL_MSECS) | ||
142 | #define HPSA_POST_RESET_PAUSE_MSECS (3000) | ||
143 | #define HPSA_POST_RESET_NOOP_RETRIES (12) | ||
144 | |||
145 | /* Defining the diffent access_menthods */ | ||
146 | /* | ||
147 | * Memory mapped FIFO interface (SMART 53xx cards) | ||
148 | */ | ||
149 | #define SA5_DOORBELL 0x20 | ||
150 | #define SA5_REQUEST_PORT_OFFSET 0x40 | ||
151 | #define SA5_REPLY_INTR_MASK_OFFSET 0x34 | ||
152 | #define SA5_REPLY_PORT_OFFSET 0x44 | ||
153 | #define SA5_INTR_STATUS 0x30 | ||
154 | #define SA5_SCRATCHPAD_OFFSET 0xB0 | ||
155 | |||
156 | #define SA5_CTCFG_OFFSET 0xB4 | ||
157 | #define SA5_CTMEM_OFFSET 0xB8 | ||
158 | |||
159 | #define SA5_INTR_OFF 0x08 | ||
160 | #define SA5B_INTR_OFF 0x04 | ||
161 | #define SA5_INTR_PENDING 0x08 | ||
162 | #define SA5B_INTR_PENDING 0x04 | ||
163 | #define FIFO_EMPTY 0xffffffff | ||
164 | #define HPSA_FIRMWARE_READY 0xffff0000 /* value in scratchpad register */ | ||
165 | |||
166 | #define HPSA_ERROR_BIT 0x02 | ||
167 | #define HPSA_TAG_CONTAINS_INDEX(tag) ((tag) & 0x04) | ||
168 | #define HPSA_TAG_TO_INDEX(tag) ((tag) >> 3) | ||
169 | #define HPSA_TAG_DISCARD_ERROR_BITS(tag) ((tag) & ~3) | ||
170 | |||
171 | #define HPSA_INTR_ON 1 | ||
172 | #define HPSA_INTR_OFF 0 | ||
173 | /* | ||
174 | Send the command to the hardware | ||
175 | */ | ||
176 | static void SA5_submit_command(struct ctlr_info *h, | ||
177 | struct CommandList *c) | ||
178 | { | ||
179 | #ifdef HPSA_DEBUG | ||
180 | printk(KERN_WARNING "hpsa: Sending %x - down to controller\n", | ||
181 | c->busaddr); | ||
182 | #endif /* HPSA_DEBUG */ | ||
183 | writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET); | ||
184 | h->commands_outstanding++; | ||
185 | if (h->commands_outstanding > h->max_outstanding) | ||
186 | h->max_outstanding = h->commands_outstanding; | ||
187 | } | ||
188 | |||
189 | /* | ||
190 | * This card is the opposite of the other cards. | ||
191 | * 0 turns interrupts on... | ||
192 | * 0x08 turns them off... | ||
193 | */ | ||
194 | static void SA5_intr_mask(struct ctlr_info *h, unsigned long val) | ||
195 | { | ||
196 | if (val) { /* Turn interrupts on */ | ||
197 | h->interrupts_enabled = 1; | ||
198 | writel(0, h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); | ||
199 | } else { /* Turn them off */ | ||
200 | h->interrupts_enabled = 0; | ||
201 | writel(SA5_INTR_OFF, | ||
202 | h->vaddr + SA5_REPLY_INTR_MASK_OFFSET); | ||
203 | } | ||
204 | } | ||
205 | /* | ||
206 | * Returns true if fifo is full. | ||
207 | * | ||
208 | */ | ||
209 | static unsigned long SA5_fifo_full(struct ctlr_info *h) | ||
210 | { | ||
211 | if (h->commands_outstanding >= h->max_commands) | ||
212 | return 1; | ||
213 | else | ||
214 | return 0; | ||
215 | |||
216 | } | ||
217 | /* | ||
218 | * returns value read from hardware. | ||
219 | * returns FIFO_EMPTY if there is nothing to read | ||
220 | */ | ||
221 | static unsigned long SA5_completed(struct ctlr_info *h) | ||
222 | { | ||
223 | unsigned long register_value | ||
224 | = readl(h->vaddr + SA5_REPLY_PORT_OFFSET); | ||
225 | |||
226 | if (register_value != FIFO_EMPTY) | ||
227 | h->commands_outstanding--; | ||
228 | |||
229 | #ifdef HPSA_DEBUG | ||
230 | if (register_value != FIFO_EMPTY) | ||
231 | printk(KERN_INFO "hpsa: Read %lx back from board\n", | ||
232 | register_value); | ||
233 | else | ||
234 | printk(KERN_INFO "hpsa: FIFO Empty read\n"); | ||
235 | #endif | ||
236 | |||
237 | return register_value; | ||
238 | } | ||
239 | /* | ||
240 | * Returns true if an interrupt is pending.. | ||
241 | */ | ||
242 | static unsigned long SA5_intr_pending(struct ctlr_info *h) | ||
243 | { | ||
244 | unsigned long register_value = | ||
245 | readl(h->vaddr + SA5_INTR_STATUS); | ||
246 | #ifdef HPSA_DEBUG | ||
247 | printk(KERN_INFO "hpsa: intr_pending %lx\n", register_value); | ||
248 | #endif /* HPSA_DEBUG */ | ||
249 | if (register_value & SA5_INTR_PENDING) | ||
250 | return 1; | ||
251 | return 0 ; | ||
252 | } | ||
253 | |||
254 | |||
255 | static struct access_method SA5_access = { | ||
256 | SA5_submit_command, | ||
257 | SA5_intr_mask, | ||
258 | SA5_fifo_full, | ||
259 | SA5_intr_pending, | ||
260 | SA5_completed, | ||
261 | }; | ||
262 | |||
263 | struct board_type { | ||
264 | __u32 board_id; | ||
265 | char *product_name; | ||
266 | struct access_method *access; | ||
267 | }; | ||
268 | |||
269 | |||
270 | /* end of old hpsa_scsi.h file */ | ||
271 | |||
272 | #endif /* HPSA_H */ | ||
273 | |||
diff --git a/drivers/scsi/hpsa_cmd.h b/drivers/scsi/hpsa_cmd.h new file mode 100644 index 000000000000..12d71387ed9a --- /dev/null +++ b/drivers/scsi/hpsa_cmd.h | |||
@@ -0,0 +1,326 @@ | |||
1 | /* | ||
2 | * Disk Array driver for HP Smart Array SAS controllers | ||
3 | * Copyright 2000, 2009 Hewlett-Packard Development Company, L.P. | ||
4 | * | ||
5 | * This program is free software; you can redistribute it and/or modify | ||
6 | * it under the terms of the GNU General Public License as published by | ||
7 | * the Free Software Foundation; version 2 of the License. | ||
8 | * | ||
9 | * This program is distributed in the hope that it will be useful, | ||
10 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
11 | * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or | ||
12 | * NON INFRINGEMENT. See the GNU General Public License for more details. | ||
13 | * | ||
14 | * You should have received a copy of the GNU General Public License | ||
15 | * along with this program; if not, write to the Free Software | ||
16 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
17 | * | ||
18 | * Questions/Comments/Bugfixes to iss_storagedev@hp.com | ||
19 | * | ||
20 | */ | ||
21 | #ifndef HPSA_CMD_H | ||
22 | #define HPSA_CMD_H | ||
23 | |||
24 | /* general boundary defintions */ | ||
25 | #define SENSEINFOBYTES 32 /* may vary between hbas */ | ||
26 | #define MAXSGENTRIES 31 | ||
27 | #define MAXREPLYQS 256 | ||
28 | |||
29 | /* Command Status value */ | ||
30 | #define CMD_SUCCESS 0x0000 | ||
31 | #define CMD_TARGET_STATUS 0x0001 | ||
32 | #define CMD_DATA_UNDERRUN 0x0002 | ||
33 | #define CMD_DATA_OVERRUN 0x0003 | ||
34 | #define CMD_INVALID 0x0004 | ||
35 | #define CMD_PROTOCOL_ERR 0x0005 | ||
36 | #define CMD_HARDWARE_ERR 0x0006 | ||
37 | #define CMD_CONNECTION_LOST 0x0007 | ||
38 | #define CMD_ABORTED 0x0008 | ||
39 | #define CMD_ABORT_FAILED 0x0009 | ||
40 | #define CMD_UNSOLICITED_ABORT 0x000A | ||
41 | #define CMD_TIMEOUT 0x000B | ||
42 | #define CMD_UNABORTABLE 0x000C | ||
43 | |||
44 | /* Unit Attentions ASC's as defined for the MSA2012sa */ | ||
45 | #define POWER_OR_RESET 0x29 | ||
46 | #define STATE_CHANGED 0x2a | ||
47 | #define UNIT_ATTENTION_CLEARED 0x2f | ||
48 | #define LUN_FAILED 0x3e | ||
49 | #define REPORT_LUNS_CHANGED 0x3f | ||
50 | |||
51 | /* Unit Attentions ASCQ's as defined for the MSA2012sa */ | ||
52 | |||
53 | /* These ASCQ's defined for ASC = POWER_OR_RESET */ | ||
54 | #define POWER_ON_RESET 0x00 | ||
55 | #define POWER_ON_REBOOT 0x01 | ||
56 | #define SCSI_BUS_RESET 0x02 | ||
57 | #define MSA_TARGET_RESET 0x03 | ||
58 | #define CONTROLLER_FAILOVER 0x04 | ||
59 | #define TRANSCEIVER_SE 0x05 | ||
60 | #define TRANSCEIVER_LVD 0x06 | ||
61 | |||
62 | /* These ASCQ's defined for ASC = STATE_CHANGED */ | ||
63 | #define RESERVATION_PREEMPTED 0x03 | ||
64 | #define ASYM_ACCESS_CHANGED 0x06 | ||
65 | #define LUN_CAPACITY_CHANGED 0x09 | ||
66 | |||
67 | /* transfer direction */ | ||
68 | #define XFER_NONE 0x00 | ||
69 | #define XFER_WRITE 0x01 | ||
70 | #define XFER_READ 0x02 | ||
71 | #define XFER_RSVD 0x03 | ||
72 | |||
73 | /* task attribute */ | ||
74 | #define ATTR_UNTAGGED 0x00 | ||
75 | #define ATTR_SIMPLE 0x04 | ||
76 | #define ATTR_HEADOFQUEUE 0x05 | ||
77 | #define ATTR_ORDERED 0x06 | ||
78 | #define ATTR_ACA 0x07 | ||
79 | |||
80 | /* cdb type */ | ||
81 | #define TYPE_CMD 0x00 | ||
82 | #define TYPE_MSG 0x01 | ||
83 | |||
84 | /* config space register offsets */ | ||
85 | #define CFG_VENDORID 0x00 | ||
86 | #define CFG_DEVICEID 0x02 | ||
87 | #define CFG_I2OBAR 0x10 | ||
88 | #define CFG_MEM1BAR 0x14 | ||
89 | |||
90 | /* i2o space register offsets */ | ||
91 | #define I2O_IBDB_SET 0x20 | ||
92 | #define I2O_IBDB_CLEAR 0x70 | ||
93 | #define I2O_INT_STATUS 0x30 | ||
94 | #define I2O_INT_MASK 0x34 | ||
95 | #define I2O_IBPOST_Q 0x40 | ||
96 | #define I2O_OBPOST_Q 0x44 | ||
97 | #define I2O_DMA1_CFG 0x214 | ||
98 | |||
99 | /* Configuration Table */ | ||
100 | #define CFGTBL_ChangeReq 0x00000001l | ||
101 | #define CFGTBL_AccCmds 0x00000001l | ||
102 | |||
103 | #define CFGTBL_Trans_Simple 0x00000002l | ||
104 | |||
105 | #define CFGTBL_BusType_Ultra2 0x00000001l | ||
106 | #define CFGTBL_BusType_Ultra3 0x00000002l | ||
107 | #define CFGTBL_BusType_Fibre1G 0x00000100l | ||
108 | #define CFGTBL_BusType_Fibre2G 0x00000200l | ||
109 | struct vals32 { | ||
110 | __u32 lower; | ||
111 | __u32 upper; | ||
112 | }; | ||
113 | |||
114 | union u64bit { | ||
115 | struct vals32 val32; | ||
116 | __u64 val; | ||
117 | }; | ||
118 | |||
119 | /* FIXME this is a per controller value (barf!) */ | ||
120 | #define HPSA_MAX_TARGETS_PER_CTLR 16 | ||
121 | #define HPSA_MAX_LUN 256 | ||
122 | #define HPSA_MAX_PHYS_LUN 1024 | ||
123 | |||
124 | /* SCSI-3 Commands */ | ||
125 | #pragma pack(1) | ||
126 | |||
127 | #define HPSA_INQUIRY 0x12 | ||
128 | struct InquiryData { | ||
129 | __u8 data_byte[36]; | ||
130 | }; | ||
131 | |||
132 | #define HPSA_REPORT_LOG 0xc2 /* Report Logical LUNs */ | ||
133 | #define HPSA_REPORT_PHYS 0xc3 /* Report Physical LUNs */ | ||
134 | struct ReportLUNdata { | ||
135 | __u8 LUNListLength[4]; | ||
136 | __u32 reserved; | ||
137 | __u8 LUN[HPSA_MAX_LUN][8]; | ||
138 | }; | ||
139 | |||
140 | struct ReportExtendedLUNdata { | ||
141 | __u8 LUNListLength[4]; | ||
142 | __u8 extended_response_flag; | ||
143 | __u8 reserved[3]; | ||
144 | __u8 LUN[HPSA_MAX_LUN][24]; | ||
145 | }; | ||
146 | |||
147 | struct SenseSubsystem_info { | ||
148 | __u8 reserved[36]; | ||
149 | __u8 portname[8]; | ||
150 | __u8 reserved1[1108]; | ||
151 | }; | ||
152 | |||
153 | #define HPSA_READ_CAPACITY 0x25 /* Read Capacity */ | ||
154 | struct ReadCapdata { | ||
155 | __u8 total_size[4]; /* Total size in blocks */ | ||
156 | __u8 block_size[4]; /* Size of blocks in bytes */ | ||
157 | }; | ||
158 | |||
159 | #if 0 | ||
160 | /* 12 byte commands not implemented in firmware yet. */ | ||
161 | #define HPSA_READ 0xa8 | ||
162 | #define HPSA_WRITE 0xaa | ||
163 | #endif | ||
164 | |||
165 | #define HPSA_READ 0x28 /* Read(10) */ | ||
166 | #define HPSA_WRITE 0x2a /* Write(10) */ | ||
167 | |||
168 | /* BMIC commands */ | ||
169 | #define BMIC_READ 0x26 | ||
170 | #define BMIC_WRITE 0x27 | ||
171 | #define BMIC_CACHE_FLUSH 0xc2 | ||
172 | #define HPSA_CACHE_FLUSH 0x01 /* C2 was already being used by HPSA */ | ||
173 | |||
174 | /* Command List Structure */ | ||
175 | union SCSI3Addr { | ||
176 | struct { | ||
177 | __u8 Dev; | ||
178 | __u8 Bus:6; | ||
179 | __u8 Mode:2; /* b00 */ | ||
180 | } PeripDev; | ||
181 | struct { | ||
182 | __u8 DevLSB; | ||
183 | __u8 DevMSB:6; | ||
184 | __u8 Mode:2; /* b01 */ | ||
185 | } LogDev; | ||
186 | struct { | ||
187 | __u8 Dev:5; | ||
188 | __u8 Bus:3; | ||
189 | __u8 Targ:6; | ||
190 | __u8 Mode:2; /* b10 */ | ||
191 | } LogUnit; | ||
192 | }; | ||
193 | |||
194 | struct PhysDevAddr { | ||
195 | __u32 TargetId:24; | ||
196 | __u32 Bus:6; | ||
197 | __u32 Mode:2; | ||
198 | /* 2 level target device addr */ | ||
199 | union SCSI3Addr Target[2]; | ||
200 | }; | ||
201 | |||
202 | struct LogDevAddr { | ||
203 | __u32 VolId:30; | ||
204 | __u32 Mode:2; | ||
205 | __u8 reserved[4]; | ||
206 | }; | ||
207 | |||
208 | union LUNAddr { | ||
209 | __u8 LunAddrBytes[8]; | ||
210 | union SCSI3Addr SCSI3Lun[4]; | ||
211 | struct PhysDevAddr PhysDev; | ||
212 | struct LogDevAddr LogDev; | ||
213 | }; | ||
214 | |||
215 | struct CommandListHeader { | ||
216 | __u8 ReplyQueue; | ||
217 | __u8 SGList; | ||
218 | __u16 SGTotal; | ||
219 | struct vals32 Tag; | ||
220 | union LUNAddr LUN; | ||
221 | }; | ||
222 | |||
223 | struct RequestBlock { | ||
224 | __u8 CDBLen; | ||
225 | struct { | ||
226 | __u8 Type:3; | ||
227 | __u8 Attribute:3; | ||
228 | __u8 Direction:2; | ||
229 | } Type; | ||
230 | __u16 Timeout; | ||
231 | __u8 CDB[16]; | ||
232 | }; | ||
233 | |||
234 | struct ErrDescriptor { | ||
235 | struct vals32 Addr; | ||
236 | __u32 Len; | ||
237 | }; | ||
238 | |||
239 | struct SGDescriptor { | ||
240 | struct vals32 Addr; | ||
241 | __u32 Len; | ||
242 | __u32 Ext; | ||
243 | }; | ||
244 | |||
245 | union MoreErrInfo { | ||
246 | struct { | ||
247 | __u8 Reserved[3]; | ||
248 | __u8 Type; | ||
249 | __u32 ErrorInfo; | ||
250 | } Common_Info; | ||
251 | struct { | ||
252 | __u8 Reserved[2]; | ||
253 | __u8 offense_size; /* size of offending entry */ | ||
254 | __u8 offense_num; /* byte # of offense 0-base */ | ||
255 | __u32 offense_value; | ||
256 | } Invalid_Cmd; | ||
257 | }; | ||
258 | struct ErrorInfo { | ||
259 | __u8 ScsiStatus; | ||
260 | __u8 SenseLen; | ||
261 | __u16 CommandStatus; | ||
262 | __u32 ResidualCnt; | ||
263 | union MoreErrInfo MoreErrInfo; | ||
264 | __u8 SenseInfo[SENSEINFOBYTES]; | ||
265 | }; | ||
266 | /* Command types */ | ||
267 | #define CMD_IOCTL_PEND 0x01 | ||
268 | #define CMD_SCSI 0x03 | ||
269 | |||
270 | struct ctlr_info; /* defined in hpsa.h */ | ||
271 | /* The size of this structure needs to be divisible by 8 | ||
272 | * od on all architectures, because the controller uses 2 | ||
273 | * lower bits of the address, and the driver uses 1 lower | ||
274 | * bit (3 bits total.) | ||
275 | */ | ||
276 | struct CommandList { | ||
277 | struct CommandListHeader Header; | ||
278 | struct RequestBlock Request; | ||
279 | struct ErrDescriptor ErrDesc; | ||
280 | struct SGDescriptor SG[MAXSGENTRIES]; | ||
281 | /* information associated with the command */ | ||
282 | __u32 busaddr; /* physical addr of this record */ | ||
283 | struct ErrorInfo *err_info; /* pointer to the allocated mem */ | ||
284 | struct ctlr_info *h; | ||
285 | int cmd_type; | ||
286 | long cmdindex; | ||
287 | struct hlist_node list; | ||
288 | struct CommandList *prev; | ||
289 | struct CommandList *next; | ||
290 | struct request *rq; | ||
291 | struct completion *waiting; | ||
292 | int retry_count; | ||
293 | void *scsi_cmd; | ||
294 | }; | ||
295 | |||
296 | /* Configuration Table Structure */ | ||
297 | struct HostWrite { | ||
298 | __u32 TransportRequest; | ||
299 | __u32 Reserved; | ||
300 | __u32 CoalIntDelay; | ||
301 | __u32 CoalIntCount; | ||
302 | }; | ||
303 | |||
304 | struct CfgTable { | ||
305 | __u8 Signature[4]; | ||
306 | __u32 SpecValence; | ||
307 | __u32 TransportSupport; | ||
308 | __u32 TransportActive; | ||
309 | struct HostWrite HostWrite; | ||
310 | __u32 CmdsOutMax; | ||
311 | __u32 BusTypes; | ||
312 | __u32 Reserved; | ||
313 | __u8 ServerName[16]; | ||
314 | __u32 HeartBeat; | ||
315 | __u32 SCSI_Prefetch; | ||
316 | }; | ||
317 | |||
318 | struct hpsa_pci_info { | ||
319 | unsigned char bus; | ||
320 | unsigned char dev_fn; | ||
321 | unsigned short domain; | ||
322 | __u32 board_id; | ||
323 | }; | ||
324 | |||
325 | #pragma pack() | ||
326 | #endif /* HPSA_CMD_H */ | ||
diff --git a/drivers/scsi/ipr.c b/drivers/scsi/ipr.c index 8643f5089361..9e52d16c7c39 100644 --- a/drivers/scsi/ipr.c +++ b/drivers/scsi/ipr.c | |||
@@ -6521,6 +6521,7 @@ static int ipr_reset_restore_cfg_space(struct ipr_cmnd *ipr_cmd) | |||
6521 | int rc; | 6521 | int rc; |
6522 | 6522 | ||
6523 | ENTER; | 6523 | ENTER; |
6524 | ioa_cfg->pdev->state_saved = true; | ||
6524 | rc = pci_restore_state(ioa_cfg->pdev); | 6525 | rc = pci_restore_state(ioa_cfg->pdev); |
6525 | 6526 | ||
6526 | if (rc != PCIBIOS_SUCCESSFUL) { | 6527 | if (rc != PCIBIOS_SUCCESSFUL) { |
diff --git a/drivers/scsi/libfc/fc_fcp.c b/drivers/scsi/libfc/fc_fcp.c index c4b58d042f6f..881d5dfe8c74 100644 --- a/drivers/scsi/libfc/fc_fcp.c +++ b/drivers/scsi/libfc/fc_fcp.c | |||
@@ -68,18 +68,20 @@ struct kmem_cache *scsi_pkt_cachep; | |||
68 | 68 | ||
69 | /** | 69 | /** |
70 | * struct fc_fcp_internal - FCP layer internal data | 70 | * struct fc_fcp_internal - FCP layer internal data |
71 | * @scsi_pkt_pool: Memory pool to draw FCP packets from | 71 | * @scsi_pkt_pool: Memory pool to draw FCP packets from |
72 | * @scsi_queue_lock: Protects the scsi_pkt_queue | ||
72 | * @scsi_pkt_queue: Current FCP packets | 73 | * @scsi_pkt_queue: Current FCP packets |
73 | * @last_can_queue_ramp_down_time: ramp down time | 74 | * @last_can_queue_ramp_down_time: ramp down time |
74 | * @last_can_queue_ramp_up_time: ramp up time | 75 | * @last_can_queue_ramp_up_time: ramp up time |
75 | * @max_can_queue: max can_queue size | 76 | * @max_can_queue: max can_queue size |
76 | */ | 77 | */ |
77 | struct fc_fcp_internal { | 78 | struct fc_fcp_internal { |
78 | mempool_t *scsi_pkt_pool; | 79 | mempool_t *scsi_pkt_pool; |
79 | struct list_head scsi_pkt_queue; | 80 | spinlock_t scsi_queue_lock; |
80 | unsigned long last_can_queue_ramp_down_time; | 81 | struct list_head scsi_pkt_queue; |
81 | unsigned long last_can_queue_ramp_up_time; | 82 | unsigned long last_can_queue_ramp_down_time; |
82 | int max_can_queue; | 83 | unsigned long last_can_queue_ramp_up_time; |
84 | int max_can_queue; | ||
83 | }; | 85 | }; |
84 | 86 | ||
85 | #define fc_get_scsi_internal(x) ((struct fc_fcp_internal *)(x)->scsi_priv) | 87 | #define fc_get_scsi_internal(x) ((struct fc_fcp_internal *)(x)->scsi_priv) |
@@ -410,12 +412,14 @@ static inline struct fc_frame *fc_fcp_frame_alloc(struct fc_lport *lport, | |||
410 | unsigned long flags; | 412 | unsigned long flags; |
411 | 413 | ||
412 | fp = fc_frame_alloc(lport, len); | 414 | fp = fc_frame_alloc(lport, len); |
413 | if (!fp) { | 415 | if (likely(fp)) |
414 | spin_lock_irqsave(lport->host->host_lock, flags); | 416 | return fp; |
415 | fc_fcp_can_queue_ramp_down(lport); | 417 | |
416 | spin_unlock_irqrestore(lport->host->host_lock, flags); | 418 | /* error case */ |
417 | } | 419 | spin_lock_irqsave(lport->host->host_lock, flags); |
418 | return fp; | 420 | fc_fcp_can_queue_ramp_down(lport); |
421 | spin_unlock_irqrestore(lport->host->host_lock, flags); | ||
422 | return NULL; | ||
419 | } | 423 | } |
420 | 424 | ||
421 | /** | 425 | /** |
@@ -990,7 +994,7 @@ static void fc_fcp_cleanup_each_cmd(struct fc_lport *lport, unsigned int id, | |||
990 | struct scsi_cmnd *sc_cmd; | 994 | struct scsi_cmnd *sc_cmd; |
991 | unsigned long flags; | 995 | unsigned long flags; |
992 | 996 | ||
993 | spin_lock_irqsave(lport->host->host_lock, flags); | 997 | spin_lock_irqsave(&si->scsi_queue_lock, flags); |
994 | restart: | 998 | restart: |
995 | list_for_each_entry(fsp, &si->scsi_pkt_queue, list) { | 999 | list_for_each_entry(fsp, &si->scsi_pkt_queue, list) { |
996 | sc_cmd = fsp->cmd; | 1000 | sc_cmd = fsp->cmd; |
@@ -1001,7 +1005,7 @@ restart: | |||
1001 | continue; | 1005 | continue; |
1002 | 1006 | ||
1003 | fc_fcp_pkt_hold(fsp); | 1007 | fc_fcp_pkt_hold(fsp); |
1004 | spin_unlock_irqrestore(lport->host->host_lock, flags); | 1008 | spin_unlock_irqrestore(&si->scsi_queue_lock, flags); |
1005 | 1009 | ||
1006 | if (!fc_fcp_lock_pkt(fsp)) { | 1010 | if (!fc_fcp_lock_pkt(fsp)) { |
1007 | fc_fcp_cleanup_cmd(fsp, error); | 1011 | fc_fcp_cleanup_cmd(fsp, error); |
@@ -1010,14 +1014,14 @@ restart: | |||
1010 | } | 1014 | } |
1011 | 1015 | ||
1012 | fc_fcp_pkt_release(fsp); | 1016 | fc_fcp_pkt_release(fsp); |
1013 | spin_lock_irqsave(lport->host->host_lock, flags); | 1017 | spin_lock_irqsave(&si->scsi_queue_lock, flags); |
1014 | /* | 1018 | /* |
1015 | * while we dropped the lock multiple pkts could | 1019 | * while we dropped the lock multiple pkts could |
1016 | * have been released, so we have to start over. | 1020 | * have been released, so we have to start over. |
1017 | */ | 1021 | */ |
1018 | goto restart; | 1022 | goto restart; |
1019 | } | 1023 | } |
1020 | spin_unlock_irqrestore(lport->host->host_lock, flags); | 1024 | spin_unlock_irqrestore(&si->scsi_queue_lock, flags); |
1021 | } | 1025 | } |
1022 | 1026 | ||
1023 | /** | 1027 | /** |
@@ -1035,11 +1039,12 @@ static void fc_fcp_abort_io(struct fc_lport *lport) | |||
1035 | * @fsp: The FCP packet to send | 1039 | * @fsp: The FCP packet to send |
1036 | * | 1040 | * |
1037 | * Return: Zero for success and -1 for failure | 1041 | * Return: Zero for success and -1 for failure |
1038 | * Locks: Called with the host lock and irqs disabled. | 1042 | * Locks: Called without locks held |
1039 | */ | 1043 | */ |
1040 | static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp) | 1044 | static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp) |
1041 | { | 1045 | { |
1042 | struct fc_fcp_internal *si = fc_get_scsi_internal(lport); | 1046 | struct fc_fcp_internal *si = fc_get_scsi_internal(lport); |
1047 | unsigned long flags; | ||
1043 | int rc; | 1048 | int rc; |
1044 | 1049 | ||
1045 | fsp->cmd->SCp.ptr = (char *)fsp; | 1050 | fsp->cmd->SCp.ptr = (char *)fsp; |
@@ -1049,13 +1054,16 @@ static int fc_fcp_pkt_send(struct fc_lport *lport, struct fc_fcp_pkt *fsp) | |||
1049 | int_to_scsilun(fsp->cmd->device->lun, | 1054 | int_to_scsilun(fsp->cmd->device->lun, |
1050 | (struct scsi_lun *)fsp->cdb_cmd.fc_lun); | 1055 | (struct scsi_lun *)fsp->cdb_cmd.fc_lun); |
1051 | memcpy(fsp->cdb_cmd.fc_cdb, fsp->cmd->cmnd, fsp->cmd->cmd_len); | 1056 | memcpy(fsp->cdb_cmd.fc_cdb, fsp->cmd->cmnd, fsp->cmd->cmd_len); |
1052 | list_add_tail(&fsp->list, &si->scsi_pkt_queue); | ||
1053 | 1057 | ||
1054 | spin_unlock_irq(lport->host->host_lock); | 1058 | spin_lock_irqsave(&si->scsi_queue_lock, flags); |
1059 | list_add_tail(&fsp->list, &si->scsi_pkt_queue); | ||
1060 | spin_unlock_irqrestore(&si->scsi_queue_lock, flags); | ||
1055 | rc = lport->tt.fcp_cmd_send(lport, fsp, fc_fcp_recv); | 1061 | rc = lport->tt.fcp_cmd_send(lport, fsp, fc_fcp_recv); |
1056 | spin_lock_irq(lport->host->host_lock); | 1062 | if (unlikely(rc)) { |
1057 | if (rc) | 1063 | spin_lock_irqsave(&si->scsi_queue_lock, flags); |
1058 | list_del(&fsp->list); | 1064 | list_del(&fsp->list); |
1065 | spin_unlock_irqrestore(&si->scsi_queue_lock, flags); | ||
1066 | } | ||
1059 | 1067 | ||
1060 | return rc; | 1068 | return rc; |
1061 | } | 1069 | } |
@@ -1752,6 +1760,7 @@ int fc_queuecommand(struct scsi_cmnd *sc_cmd, void (*done)(struct scsi_cmnd *)) | |||
1752 | struct fcoe_dev_stats *stats; | 1760 | struct fcoe_dev_stats *stats; |
1753 | 1761 | ||
1754 | lport = shost_priv(sc_cmd->device->host); | 1762 | lport = shost_priv(sc_cmd->device->host); |
1763 | spin_unlock_irq(lport->host->host_lock); | ||
1755 | 1764 | ||
1756 | rval = fc_remote_port_chkready(rport); | 1765 | rval = fc_remote_port_chkready(rport); |
1757 | if (rval) { | 1766 | if (rval) { |
@@ -1834,6 +1843,7 @@ int fc_queuecommand(struct scsi_cmnd *sc_cmd, void (*done)(struct scsi_cmnd *)) | |||
1834 | rc = SCSI_MLQUEUE_HOST_BUSY; | 1843 | rc = SCSI_MLQUEUE_HOST_BUSY; |
1835 | } | 1844 | } |
1836 | out: | 1845 | out: |
1846 | spin_lock_irq(lport->host->host_lock); | ||
1837 | return rc; | 1847 | return rc; |
1838 | } | 1848 | } |
1839 | EXPORT_SYMBOL(fc_queuecommand); | 1849 | EXPORT_SYMBOL(fc_queuecommand); |
@@ -1864,11 +1874,8 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp) | |||
1864 | 1874 | ||
1865 | lport = fsp->lp; | 1875 | lport = fsp->lp; |
1866 | si = fc_get_scsi_internal(lport); | 1876 | si = fc_get_scsi_internal(lport); |
1867 | spin_lock_irqsave(lport->host->host_lock, flags); | 1877 | if (!fsp->cmd) |
1868 | if (!fsp->cmd) { | ||
1869 | spin_unlock_irqrestore(lport->host->host_lock, flags); | ||
1870 | return; | 1878 | return; |
1871 | } | ||
1872 | 1879 | ||
1873 | /* | 1880 | /* |
1874 | * if can_queue ramp down is done then try can_queue ramp up | 1881 | * if can_queue ramp down is done then try can_queue ramp up |
@@ -1880,10 +1887,8 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp) | |||
1880 | sc_cmd = fsp->cmd; | 1887 | sc_cmd = fsp->cmd; |
1881 | fsp->cmd = NULL; | 1888 | fsp->cmd = NULL; |
1882 | 1889 | ||
1883 | if (!sc_cmd->SCp.ptr) { | 1890 | if (!sc_cmd->SCp.ptr) |
1884 | spin_unlock_irqrestore(lport->host->host_lock, flags); | ||
1885 | return; | 1891 | return; |
1886 | } | ||
1887 | 1892 | ||
1888 | CMD_SCSI_STATUS(sc_cmd) = fsp->cdb_status; | 1893 | CMD_SCSI_STATUS(sc_cmd) = fsp->cdb_status; |
1889 | switch (fsp->status_code) { | 1894 | switch (fsp->status_code) { |
@@ -1945,10 +1950,11 @@ static void fc_io_compl(struct fc_fcp_pkt *fsp) | |||
1945 | break; | 1950 | break; |
1946 | } | 1951 | } |
1947 | 1952 | ||
1953 | spin_lock_irqsave(&si->scsi_queue_lock, flags); | ||
1948 | list_del(&fsp->list); | 1954 | list_del(&fsp->list); |
1955 | spin_unlock_irqrestore(&si->scsi_queue_lock, flags); | ||
1949 | sc_cmd->SCp.ptr = NULL; | 1956 | sc_cmd->SCp.ptr = NULL; |
1950 | sc_cmd->scsi_done(sc_cmd); | 1957 | sc_cmd->scsi_done(sc_cmd); |
1951 | spin_unlock_irqrestore(lport->host->host_lock, flags); | ||
1952 | 1958 | ||
1953 | /* release ref from initial allocation in queue command */ | 1959 | /* release ref from initial allocation in queue command */ |
1954 | fc_fcp_pkt_release(fsp); | 1960 | fc_fcp_pkt_release(fsp); |
@@ -2216,6 +2222,7 @@ int fc_fcp_init(struct fc_lport *lport) | |||
2216 | lport->scsi_priv = si; | 2222 | lport->scsi_priv = si; |
2217 | si->max_can_queue = lport->host->can_queue; | 2223 | si->max_can_queue = lport->host->can_queue; |
2218 | INIT_LIST_HEAD(&si->scsi_pkt_queue); | 2224 | INIT_LIST_HEAD(&si->scsi_pkt_queue); |
2225 | spin_lock_init(&si->scsi_queue_lock); | ||
2219 | 2226 | ||
2220 | si->scsi_pkt_pool = mempool_create_slab_pool(2, scsi_pkt_cachep); | 2227 | si->scsi_pkt_pool = mempool_create_slab_pool(2, scsi_pkt_cachep); |
2221 | if (!si->scsi_pkt_pool) { | 2228 | if (!si->scsi_pkt_pool) { |
diff --git a/drivers/scsi/libfc/fc_lport.c b/drivers/scsi/libfc/fc_lport.c index 74338c83ad0a..0b165024a219 100644 --- a/drivers/scsi/libfc/fc_lport.c +++ b/drivers/scsi/libfc/fc_lport.c | |||
@@ -537,7 +537,9 @@ int fc_fabric_login(struct fc_lport *lport) | |||
537 | int rc = -1; | 537 | int rc = -1; |
538 | 538 | ||
539 | mutex_lock(&lport->lp_mutex); | 539 | mutex_lock(&lport->lp_mutex); |
540 | if (lport->state == LPORT_ST_DISABLED) { | 540 | if (lport->state == LPORT_ST_DISABLED || |
541 | lport->state == LPORT_ST_LOGO) { | ||
542 | fc_lport_state_enter(lport, LPORT_ST_RESET); | ||
541 | fc_lport_enter_reset(lport); | 543 | fc_lport_enter_reset(lport); |
542 | rc = 0; | 544 | rc = 0; |
543 | } | 545 | } |
@@ -967,6 +969,9 @@ static void fc_lport_enter_reset(struct fc_lport *lport) | |||
967 | FC_LPORT_DBG(lport, "Entered RESET state from %s state\n", | 969 | FC_LPORT_DBG(lport, "Entered RESET state from %s state\n", |
968 | fc_lport_state(lport)); | 970 | fc_lport_state(lport)); |
969 | 971 | ||
972 | if (lport->state == LPORT_ST_DISABLED || lport->state == LPORT_ST_LOGO) | ||
973 | return; | ||
974 | |||
970 | if (lport->vport) { | 975 | if (lport->vport) { |
971 | if (lport->link_up) | 976 | if (lport->link_up) |
972 | fc_vport_set_state(lport->vport, FC_VPORT_INITIALIZING); | 977 | fc_vport_set_state(lport->vport, FC_VPORT_INITIALIZING); |
diff --git a/drivers/scsi/libfc/fc_rport.c b/drivers/scsi/libfc/fc_rport.c index 35ca0e72df46..02300523b234 100644 --- a/drivers/scsi/libfc/fc_rport.c +++ b/drivers/scsi/libfc/fc_rport.c | |||
@@ -310,6 +310,7 @@ static void fc_rport_work(struct work_struct *work) | |||
310 | restart = 1; | 310 | restart = 1; |
311 | else | 311 | else |
312 | list_del(&rdata->peers); | 312 | list_del(&rdata->peers); |
313 | rdata->event = RPORT_EV_NONE; | ||
313 | mutex_unlock(&rdata->rp_mutex); | 314 | mutex_unlock(&rdata->rp_mutex); |
314 | mutex_unlock(&lport->disc.disc_mutex); | 315 | mutex_unlock(&lport->disc.disc_mutex); |
315 | } | 316 | } |
diff --git a/drivers/scsi/lpfc/lpfc_init.c b/drivers/scsi/lpfc/lpfc_init.c index 226920d15ea1..d4da6bdd0e73 100644 --- a/drivers/scsi/lpfc/lpfc_init.c +++ b/drivers/scsi/lpfc/lpfc_init.c | |||
@@ -4506,9 +4506,13 @@ lpfc_sli_pci_mem_setup(struct lpfc_hba *phba) | |||
4506 | pdev = phba->pcidev; | 4506 | pdev = phba->pcidev; |
4507 | 4507 | ||
4508 | /* Set the device DMA mask size */ | 4508 | /* Set the device DMA mask size */ |
4509 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) | 4509 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0 |
4510 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) | 4510 | || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) { |
4511 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0 | ||
4512 | || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) { | ||
4511 | return error; | 4513 | return error; |
4514 | } | ||
4515 | } | ||
4512 | 4516 | ||
4513 | /* Get the bus address of Bar0 and Bar2 and the number of bytes | 4517 | /* Get the bus address of Bar0 and Bar2 and the number of bytes |
4514 | * required by each mapping. | 4518 | * required by each mapping. |
@@ -6021,9 +6025,13 @@ lpfc_sli4_pci_mem_setup(struct lpfc_hba *phba) | |||
6021 | pdev = phba->pcidev; | 6025 | pdev = phba->pcidev; |
6022 | 6026 | ||
6023 | /* Set the device DMA mask size */ | 6027 | /* Set the device DMA mask size */ |
6024 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0) | 6028 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(64)) != 0 |
6025 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0) | 6029 | || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(64)) != 0) { |
6030 | if (pci_set_dma_mask(pdev, DMA_BIT_MASK(32)) != 0 | ||
6031 | || pci_set_consistent_dma_mask(pdev,DMA_BIT_MASK(32)) != 0) { | ||
6026 | return error; | 6032 | return error; |
6033 | } | ||
6034 | } | ||
6027 | 6035 | ||
6028 | /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the | 6036 | /* Get the bus address of SLI4 device Bar0, Bar1, and Bar2 and the |
6029 | * number of bytes required by each mapping. They are actually | 6037 | * number of bytes required by each mapping. They are actually |
diff --git a/drivers/scsi/megaraid/megaraid_sas.c b/drivers/scsi/megaraid/megaraid_sas.c index 134c63ef6d38..99ff99e45bee 100644 --- a/drivers/scsi/megaraid/megaraid_sas.c +++ b/drivers/scsi/megaraid/megaraid_sas.c | |||
@@ -2501,7 +2501,9 @@ static int megasas_init_mfi(struct megasas_instance *instance) | |||
2501 | instance->base_addr = pci_resource_start(instance->pdev, 0); | 2501 | instance->base_addr = pci_resource_start(instance->pdev, 0); |
2502 | } | 2502 | } |
2503 | 2503 | ||
2504 | if (pci_request_regions(instance->pdev, "megasas: LSI")) { | 2504 | if (pci_request_selected_regions(instance->pdev, |
2505 | pci_select_bars(instance->pdev, IORESOURCE_MEM), | ||
2506 | "megasas: LSI")) { | ||
2505 | printk(KERN_DEBUG "megasas: IO memory region busy!\n"); | 2507 | printk(KERN_DEBUG "megasas: IO memory region busy!\n"); |
2506 | return -EBUSY; | 2508 | return -EBUSY; |
2507 | } | 2509 | } |
@@ -2642,7 +2644,8 @@ static int megasas_init_mfi(struct megasas_instance *instance) | |||
2642 | iounmap(instance->reg_set); | 2644 | iounmap(instance->reg_set); |
2643 | 2645 | ||
2644 | fail_ioremap: | 2646 | fail_ioremap: |
2645 | pci_release_regions(instance->pdev); | 2647 | pci_release_selected_regions(instance->pdev, |
2648 | pci_select_bars(instance->pdev, IORESOURCE_MEM)); | ||
2646 | 2649 | ||
2647 | return -EINVAL; | 2650 | return -EINVAL; |
2648 | } | 2651 | } |
@@ -2662,7 +2665,8 @@ static void megasas_release_mfi(struct megasas_instance *instance) | |||
2662 | 2665 | ||
2663 | iounmap(instance->reg_set); | 2666 | iounmap(instance->reg_set); |
2664 | 2667 | ||
2665 | pci_release_regions(instance->pdev); | 2668 | pci_release_selected_regions(instance->pdev, |
2669 | pci_select_bars(instance->pdev, IORESOURCE_MEM)); | ||
2666 | } | 2670 | } |
2667 | 2671 | ||
2668 | /** | 2672 | /** |
@@ -2971,7 +2975,7 @@ megasas_probe_one(struct pci_dev *pdev, const struct pci_device_id *id) | |||
2971 | /* | 2975 | /* |
2972 | * PCI prepping: enable device set bus mastering and dma mask | 2976 | * PCI prepping: enable device set bus mastering and dma mask |
2973 | */ | 2977 | */ |
2974 | rval = pci_enable_device(pdev); | 2978 | rval = pci_enable_device_mem(pdev); |
2975 | 2979 | ||
2976 | if (rval) { | 2980 | if (rval) { |
2977 | return rval; | 2981 | return rval; |
@@ -3276,7 +3280,7 @@ megasas_resume(struct pci_dev *pdev) | |||
3276 | /* | 3280 | /* |
3277 | * PCI prepping: enable device set bus mastering and dma mask | 3281 | * PCI prepping: enable device set bus mastering and dma mask |
3278 | */ | 3282 | */ |
3279 | rval = pci_enable_device(pdev); | 3283 | rval = pci_enable_device_mem(pdev); |
3280 | 3284 | ||
3281 | if (rval) { | 3285 | if (rval) { |
3282 | printk(KERN_ERR "megasas: Enable device failed\n"); | 3286 | printk(KERN_ERR "megasas: Enable device failed\n"); |
diff --git a/drivers/scsi/mpt2sas/mpt2sas_base.c b/drivers/scsi/mpt2sas/mpt2sas_base.c index 6422e258fd52..89d02401b9ec 100644 --- a/drivers/scsi/mpt2sas/mpt2sas_base.c +++ b/drivers/scsi/mpt2sas/mpt2sas_base.c | |||
@@ -3583,6 +3583,11 @@ mpt2sas_base_attach(struct MPT2SAS_ADAPTER *ioc) | |||
3583 | ioc->transport_cmds.status = MPT2_CMD_NOT_USED; | 3583 | ioc->transport_cmds.status = MPT2_CMD_NOT_USED; |
3584 | mutex_init(&ioc->transport_cmds.mutex); | 3584 | mutex_init(&ioc->transport_cmds.mutex); |
3585 | 3585 | ||
3586 | /* scsih internal command bits */ | ||
3587 | ioc->scsih_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); | ||
3588 | ioc->scsih_cmds.status = MPT2_CMD_NOT_USED; | ||
3589 | mutex_init(&ioc->scsih_cmds.mutex); | ||
3590 | |||
3586 | /* task management internal command bits */ | 3591 | /* task management internal command bits */ |
3587 | ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); | 3592 | ioc->tm_cmds.reply = kzalloc(ioc->reply_sz, GFP_KERNEL); |
3588 | ioc->tm_cmds.status = MPT2_CMD_NOT_USED; | 3593 | ioc->tm_cmds.status = MPT2_CMD_NOT_USED; |
diff --git a/drivers/scsi/mvsas/mv_init.c b/drivers/scsi/mvsas/mv_init.c index c790d45876c4..cae6b2cf492f 100644 --- a/drivers/scsi/mvsas/mv_init.c +++ b/drivers/scsi/mvsas/mv_init.c | |||
@@ -657,6 +657,7 @@ static struct pci_device_id __devinitdata mvs_pci_table[] = { | |||
657 | { PCI_VDEVICE(MARVELL, 0x9180), chip_9180 }, | 657 | { PCI_VDEVICE(MARVELL, 0x9180), chip_9180 }, |
658 | { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1300), chip_1300 }, | 658 | { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1300), chip_1300 }, |
659 | { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1320), chip_1320 }, | 659 | { PCI_VDEVICE(ARECA, PCI_DEVICE_ID_ARECA_1320), chip_1320 }, |
660 | { PCI_VDEVICE(ADAPTEC2, 0x0450), chip_6440 }, | ||
660 | 661 | ||
661 | { } /* terminate list */ | 662 | { } /* terminate list */ |
662 | }; | 663 | }; |
diff --git a/drivers/scsi/osd/osd_initiator.c b/drivers/scsi/osd/osd_initiator.c index 950202a70bcf..24223473f573 100644 --- a/drivers/scsi/osd/osd_initiator.c +++ b/drivers/scsi/osd/osd_initiator.c | |||
@@ -432,30 +432,23 @@ static void _osd_free_seg(struct osd_request *or __unused, | |||
432 | seg->alloc_size = 0; | 432 | seg->alloc_size = 0; |
433 | } | 433 | } |
434 | 434 | ||
435 | static void _put_request(struct request *rq , bool is_async) | 435 | static void _put_request(struct request *rq) |
436 | { | 436 | { |
437 | if (is_async) { | 437 | /* |
438 | WARN_ON(rq->bio); | 438 | * If osd_finalize_request() was called but the request was not |
439 | __blk_put_request(rq->q, rq); | 439 | * executed through the block layer, then we must release BIOs. |
440 | } else { | 440 | * TODO: Keep error code in or->async_error. Need to audit all |
441 | /* | 441 | * code paths. |
442 | * If osd_finalize_request() was called but the request was not | 442 | */ |
443 | * executed through the block layer, then we must release BIOs. | 443 | if (unlikely(rq->bio)) |
444 | * TODO: Keep error code in or->async_error. Need to audit all | 444 | blk_end_request(rq, -ENOMEM, blk_rq_bytes(rq)); |
445 | * code paths. | 445 | else |
446 | */ | 446 | blk_put_request(rq); |
447 | if (unlikely(rq->bio)) | ||
448 | blk_end_request(rq, -ENOMEM, blk_rq_bytes(rq)); | ||
449 | else | ||
450 | blk_put_request(rq); | ||
451 | } | ||
452 | } | 447 | } |
453 | 448 | ||
454 | void osd_end_request(struct osd_request *or) | 449 | void osd_end_request(struct osd_request *or) |
455 | { | 450 | { |
456 | struct request *rq = or->request; | 451 | struct request *rq = or->request; |
457 | /* IMPORTANT: make sure this agrees with osd_execute_request_async */ | ||
458 | bool is_async = (or->request->end_io_data == or); | ||
459 | 452 | ||
460 | _osd_free_seg(or, &or->set_attr); | 453 | _osd_free_seg(or, &or->set_attr); |
461 | _osd_free_seg(or, &or->enc_get_attr); | 454 | _osd_free_seg(or, &or->enc_get_attr); |
@@ -463,20 +456,34 @@ void osd_end_request(struct osd_request *or) | |||
463 | 456 | ||
464 | if (rq) { | 457 | if (rq) { |
465 | if (rq->next_rq) { | 458 | if (rq->next_rq) { |
466 | _put_request(rq->next_rq, is_async); | 459 | _put_request(rq->next_rq); |
467 | rq->next_rq = NULL; | 460 | rq->next_rq = NULL; |
468 | } | 461 | } |
469 | 462 | ||
470 | _put_request(rq, is_async); | 463 | _put_request(rq); |
471 | } | 464 | } |
472 | _osd_request_free(or); | 465 | _osd_request_free(or); |
473 | } | 466 | } |
474 | EXPORT_SYMBOL(osd_end_request); | 467 | EXPORT_SYMBOL(osd_end_request); |
475 | 468 | ||
469 | static void _set_error_resid(struct osd_request *or, struct request *req, | ||
470 | int error) | ||
471 | { | ||
472 | or->async_error = error; | ||
473 | or->req_errors = req->errors ? : error; | ||
474 | or->sense_len = req->sense_len; | ||
475 | if (or->out.req) | ||
476 | or->out.residual = or->out.req->resid_len; | ||
477 | if (or->in.req) | ||
478 | or->in.residual = or->in.req->resid_len; | ||
479 | } | ||
480 | |||
476 | int osd_execute_request(struct osd_request *or) | 481 | int osd_execute_request(struct osd_request *or) |
477 | { | 482 | { |
478 | return or->async_error = | 483 | int error = blk_execute_rq(or->request->q, NULL, or->request, 0); |
479 | blk_execute_rq(or->request->q, NULL, or->request, 0); | 484 | |
485 | _set_error_resid(or, or->request, error); | ||
486 | return error; | ||
480 | } | 487 | } |
481 | EXPORT_SYMBOL(osd_execute_request); | 488 | EXPORT_SYMBOL(osd_execute_request); |
482 | 489 | ||
@@ -484,15 +491,17 @@ static void osd_request_async_done(struct request *req, int error) | |||
484 | { | 491 | { |
485 | struct osd_request *or = req->end_io_data; | 492 | struct osd_request *or = req->end_io_data; |
486 | 493 | ||
487 | or->async_error = error; | 494 | _set_error_resid(or, req, error); |
488 | 495 | if (req->next_rq) { | |
489 | if (unlikely(error)) { | 496 | __blk_put_request(req->q, req->next_rq); |
490 | OSD_DEBUG("osd_request_async_done error recieved %d " | 497 | req->next_rq = NULL; |
491 | "errors 0x%x\n", error, req->errors); | ||
492 | if (!req->errors) /* don't miss out on this one */ | ||
493 | req->errors = error; | ||
494 | } | 498 | } |
495 | 499 | ||
500 | __blk_put_request(req->q, req); | ||
501 | or->request = NULL; | ||
502 | or->in.req = NULL; | ||
503 | or->out.req = NULL; | ||
504 | |||
496 | if (or->async_done) | 505 | if (or->async_done) |
497 | or->async_done(or, or->async_private); | 506 | or->async_done(or, or->async_private); |
498 | else | 507 | else |
@@ -1489,21 +1498,18 @@ int osd_req_decode_sense_full(struct osd_request *or, | |||
1489 | #endif | 1498 | #endif |
1490 | int ret; | 1499 | int ret; |
1491 | 1500 | ||
1492 | if (likely(!or->request->errors)) { | 1501 | if (likely(!or->req_errors)) |
1493 | osi->out_resid = 0; | ||
1494 | osi->in_resid = 0; | ||
1495 | return 0; | 1502 | return 0; |
1496 | } | ||
1497 | 1503 | ||
1498 | osi = osi ? : &local_osi; | 1504 | osi = osi ? : &local_osi; |
1499 | memset(osi, 0, sizeof(*osi)); | 1505 | memset(osi, 0, sizeof(*osi)); |
1500 | 1506 | ||
1501 | ssdb = or->request->sense; | 1507 | ssdb = (typeof(ssdb))or->sense; |
1502 | sense_len = or->request->sense_len; | 1508 | sense_len = or->sense_len; |
1503 | if ((sense_len < (int)sizeof(*ssdb) || !ssdb->sense_key)) { | 1509 | if ((sense_len < (int)sizeof(*ssdb) || !ssdb->sense_key)) { |
1504 | OSD_ERR("Block-layer returned error(0x%x) but " | 1510 | OSD_ERR("Block-layer returned error(0x%x) but " |
1505 | "sense_len(%u) || key(%d) is empty\n", | 1511 | "sense_len(%u) || key(%d) is empty\n", |
1506 | or->request->errors, sense_len, ssdb->sense_key); | 1512 | or->req_errors, sense_len, ssdb->sense_key); |
1507 | goto analyze; | 1513 | goto analyze; |
1508 | } | 1514 | } |
1509 | 1515 | ||
@@ -1525,7 +1531,7 @@ int osd_req_decode_sense_full(struct osd_request *or, | |||
1525 | "additional_code=0x%x async_error=%d errors=0x%x\n", | 1531 | "additional_code=0x%x async_error=%d errors=0x%x\n", |
1526 | osi->key, original_sense_len, sense_len, | 1532 | osi->key, original_sense_len, sense_len, |
1527 | osi->additional_code, or->async_error, | 1533 | osi->additional_code, or->async_error, |
1528 | or->request->errors); | 1534 | or->req_errors); |
1529 | 1535 | ||
1530 | if (original_sense_len < sense_len) | 1536 | if (original_sense_len < sense_len) |
1531 | sense_len = original_sense_len; | 1537 | sense_len = original_sense_len; |
@@ -1695,10 +1701,10 @@ analyze: | |||
1695 | ret = -EIO; | 1701 | ret = -EIO; |
1696 | } | 1702 | } |
1697 | 1703 | ||
1698 | if (or->out.req) | 1704 | if (!or->out.residual) |
1699 | osi->out_resid = or->out.req->resid_len ?: or->out.total_bytes; | 1705 | or->out.residual = or->out.total_bytes; |
1700 | if (or->in.req) | 1706 | if (!or->in.residual) |
1701 | osi->in_resid = or->in.req->resid_len ?: or->in.total_bytes; | 1707 | or->in.residual = or->in.total_bytes; |
1702 | 1708 | ||
1703 | return ret; | 1709 | return ret; |
1704 | } | 1710 | } |
diff --git a/drivers/scsi/pm8001/pm8001_ctl.h b/drivers/scsi/pm8001/pm8001_ctl.h index 22644de26399..63ad4aa0c422 100644 --- a/drivers/scsi/pm8001/pm8001_ctl.h +++ b/drivers/scsi/pm8001/pm8001_ctl.h | |||
@@ -45,16 +45,6 @@ | |||
45 | #define HEADER_LEN 28 | 45 | #define HEADER_LEN 28 |
46 | #define SIZE_OFFSET 16 | 46 | #define SIZE_OFFSET 16 |
47 | 47 | ||
48 | struct pm8001_ioctl_payload { | ||
49 | u32 signature; | ||
50 | u16 major_function; | ||
51 | u16 minor_function; | ||
52 | u16 length; | ||
53 | u16 status; | ||
54 | u16 offset; | ||
55 | u16 id; | ||
56 | u8 func_specific[1]; | ||
57 | }; | ||
58 | 48 | ||
59 | #define FLASH_OK 0x000000 | 49 | #define FLASH_OK 0x000000 |
60 | #define FAIL_OPEN_BIOS_FILE 0x000100 | 50 | #define FAIL_OPEN_BIOS_FILE 0x000100 |
diff --git a/drivers/scsi/pm8001/pm8001_hwi.c b/drivers/scsi/pm8001/pm8001_hwi.c index a3de306b9045..9b44c6f1b10e 100644 --- a/drivers/scsi/pm8001/pm8001_hwi.c +++ b/drivers/scsi/pm8001/pm8001_hwi.c | |||
@@ -373,10 +373,7 @@ static int bar4_shift(struct pm8001_hba_info *pm8001_ha, u32 shiftValue) | |||
373 | static void __devinit | 373 | static void __devinit |
374 | mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit) | 374 | mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit) |
375 | { | 375 | { |
376 | u32 offset; | 376 | u32 value, offset, i; |
377 | u32 value; | ||
378 | u32 i, j; | ||
379 | u32 bit_cnt; | ||
380 | 377 | ||
381 | #define SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR 0x00030000 | 378 | #define SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR 0x00030000 |
382 | #define SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR 0x00040000 | 379 | #define SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR 0x00040000 |
@@ -392,55 +389,35 @@ mpi_set_phys_g3_with_ssc(struct pm8001_hba_info *pm8001_ha, u32 SSCbit) | |||
392 | */ | 389 | */ |
393 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR)) | 390 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_0_3_SHIFT_ADDR)) |
394 | return; | 391 | return; |
395 | /* set SSC bit of PHY 0 - 3 */ | 392 | |
396 | for (i = 0; i < 4; i++) { | 393 | for (i = 0; i < 4; i++) { |
397 | offset = SAS2_SETTINGS_LOCAL_PHY_0_3_OFFSET + 0x4000 * i; | 394 | offset = SAS2_SETTINGS_LOCAL_PHY_0_3_OFFSET + 0x4000 * i; |
398 | value = pm8001_cr32(pm8001_ha, 2, offset); | 395 | pm8001_cw32(pm8001_ha, 2, offset, 0x80001501); |
399 | if (SSCbit) { | ||
400 | value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT; | ||
401 | value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT); | ||
402 | } else { | ||
403 | value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT; | ||
404 | value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT); | ||
405 | } | ||
406 | bit_cnt = 0; | ||
407 | for (j = 0; j < 31; j++) | ||
408 | if ((value >> j) & 0x00000001) | ||
409 | bit_cnt++; | ||
410 | if (bit_cnt % 2) | ||
411 | value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY); | ||
412 | else | ||
413 | value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY; | ||
414 | |||
415 | pm8001_cw32(pm8001_ha, 2, offset, value); | ||
416 | } | 396 | } |
417 | |||
418 | /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */ | 397 | /* shift membase 3 for SAS2_SETTINGS_LOCAL_PHY 4 - 7 */ |
419 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR)) | 398 | if (-1 == bar4_shift(pm8001_ha, SAS2_SETTINGS_LOCAL_PHY_4_7_SHIFT_ADDR)) |
420 | return; | 399 | return; |
421 | |||
422 | /* set SSC bit of PHY 4 - 7 */ | ||
423 | for (i = 4; i < 8; i++) { | 400 | for (i = 4; i < 8; i++) { |
424 | offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4); | 401 | offset = SAS2_SETTINGS_LOCAL_PHY_4_7_OFFSET + 0x4000 * (i-4); |
425 | value = pm8001_cr32(pm8001_ha, 2, offset); | 402 | pm8001_cw32(pm8001_ha, 2, offset, 0x80001501); |
426 | if (SSCbit) { | ||
427 | value |= 0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT; | ||
428 | value &= ~(0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT); | ||
429 | } else { | ||
430 | value |= 0x00000001 << PHY_G3_WITHOUT_SSC_BIT_SHIFT; | ||
431 | value &= ~(0x00000001 << PHY_G3_WITH_SSC_BIT_SHIFT); | ||
432 | } | ||
433 | bit_cnt = 0; | ||
434 | for (j = 0; j < 31; j++) | ||
435 | if ((value >> j) & 0x00000001) | ||
436 | bit_cnt++; | ||
437 | if (bit_cnt % 2) | ||
438 | value &= ~(0x00000001 << SNW3_PHY_CAPABILITIES_PARITY); | ||
439 | else | ||
440 | value |= 0x00000001 << SNW3_PHY_CAPABILITIES_PARITY; | ||
441 | |||
442 | pm8001_cw32(pm8001_ha, 2, offset, value); | ||
443 | } | 403 | } |
404 | /************************************************************* | ||
405 | Change the SSC upspreading value to 0x0 so that upspreading is disabled. | ||
406 | Device MABC SMOD0 Controls | ||
407 | Address: (via MEMBASE-III): | ||
408 | Using shifted destination address 0x0_0000: with Offset 0xD8 | ||
409 | |||
410 | 31:28 R/W Reserved Do not change | ||
411 | 27:24 R/W SAS_SMOD_SPRDUP 0000 | ||
412 | 23:20 R/W SAS_SMOD_SPRDDN 0000 | ||
413 | 19:0 R/W Reserved Do not change | ||
414 | Upon power-up this register will read as 0x8990c016, | ||
415 | and I would like you to change the SAS_SMOD_SPRDUP bits to 0b0000 | ||
416 | so that the written value will be 0x8090c016. | ||
417 | This will ensure only down-spreading SSC is enabled on the SPC. | ||
418 | *************************************************************/ | ||
419 | value = pm8001_cr32(pm8001_ha, 2, 0xd8); | ||
420 | pm8001_cw32(pm8001_ha, 2, 0xd8, 0x8000C016); | ||
444 | 421 | ||
445 | /*set the shifted destination address to 0x0 to avoid error operation */ | 422 | /*set the shifted destination address to 0x0 to avoid error operation */ |
446 | bar4_shift(pm8001_ha, 0x0); | 423 | bar4_shift(pm8001_ha, 0x0); |
@@ -1901,7 +1878,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
1901 | { | 1878 | { |
1902 | struct sas_task *t; | 1879 | struct sas_task *t; |
1903 | struct pm8001_ccb_info *ccb; | 1880 | struct pm8001_ccb_info *ccb; |
1904 | unsigned long flags; | 1881 | unsigned long flags = 0; |
1905 | u32 param; | 1882 | u32 param; |
1906 | u32 status; | 1883 | u32 status; |
1907 | u32 tag; | 1884 | u32 tag; |
@@ -2040,7 +2017,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2040 | ts->stat = SAS_QUEUE_FULL; | 2017 | ts->stat = SAS_QUEUE_FULL; |
2041 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2018 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2042 | mb();/*in order to force CPU ordering*/ | 2019 | mb();/*in order to force CPU ordering*/ |
2020 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2043 | t->task_done(t); | 2021 | t->task_done(t); |
2022 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2044 | return; | 2023 | return; |
2045 | } | 2024 | } |
2046 | break; | 2025 | break; |
@@ -2058,7 +2037,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2058 | ts->stat = SAS_QUEUE_FULL; | 2037 | ts->stat = SAS_QUEUE_FULL; |
2059 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2038 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2060 | mb();/*ditto*/ | 2039 | mb();/*ditto*/ |
2040 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2061 | t->task_done(t); | 2041 | t->task_done(t); |
2042 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2062 | return; | 2043 | return; |
2063 | } | 2044 | } |
2064 | break; | 2045 | break; |
@@ -2084,7 +2065,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2084 | ts->stat = SAS_QUEUE_FULL; | 2065 | ts->stat = SAS_QUEUE_FULL; |
2085 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2066 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2086 | mb();/* ditto*/ | 2067 | mb();/* ditto*/ |
2068 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2087 | t->task_done(t); | 2069 | t->task_done(t); |
2070 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2088 | return; | 2071 | return; |
2089 | } | 2072 | } |
2090 | break; | 2073 | break; |
@@ -2149,7 +2132,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2149 | ts->stat = SAS_QUEUE_FULL; | 2132 | ts->stat = SAS_QUEUE_FULL; |
2150 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2133 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2151 | mb();/*ditto*/ | 2134 | mb();/*ditto*/ |
2135 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2152 | t->task_done(t); | 2136 | t->task_done(t); |
2137 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2153 | return; | 2138 | return; |
2154 | } | 2139 | } |
2155 | break; | 2140 | break; |
@@ -2171,7 +2156,9 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2171 | ts->stat = SAS_QUEUE_FULL; | 2156 | ts->stat = SAS_QUEUE_FULL; |
2172 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2157 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2173 | mb();/*ditto*/ | 2158 | mb();/*ditto*/ |
2159 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2174 | t->task_done(t); | 2160 | t->task_done(t); |
2161 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2175 | return; | 2162 | return; |
2176 | } | 2163 | } |
2177 | break; | 2164 | break; |
@@ -2200,11 +2187,20 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2200 | " resp 0x%x stat 0x%x but aborted by upper layer!\n", | 2187 | " resp 0x%x stat 0x%x but aborted by upper layer!\n", |
2201 | t, status, ts->resp, ts->stat)); | 2188 | t, status, ts->resp, ts->stat)); |
2202 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2189 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2203 | } else { | 2190 | } else if (t->uldd_task) { |
2204 | spin_unlock_irqrestore(&t->task_state_lock, flags); | 2191 | spin_unlock_irqrestore(&t->task_state_lock, flags); |
2205 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2192 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2206 | mb();/* ditto */ | 2193 | mb();/* ditto */ |
2194 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2207 | t->task_done(t); | 2195 | t->task_done(t); |
2196 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2197 | } else if (!t->uldd_task) { | ||
2198 | spin_unlock_irqrestore(&t->task_state_lock, flags); | ||
2199 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | ||
2200 | mb();/*ditto*/ | ||
2201 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2202 | t->task_done(t); | ||
2203 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2208 | } | 2204 | } |
2209 | } | 2205 | } |
2210 | 2206 | ||
@@ -2212,7 +2208,7 @@ mpi_sata_completion(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2212 | static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) | 2208 | static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) |
2213 | { | 2209 | { |
2214 | struct sas_task *t; | 2210 | struct sas_task *t; |
2215 | unsigned long flags; | 2211 | unsigned long flags = 0; |
2216 | struct task_status_struct *ts; | 2212 | struct task_status_struct *ts; |
2217 | struct pm8001_ccb_info *ccb; | 2213 | struct pm8001_ccb_info *ccb; |
2218 | struct pm8001_device *pm8001_dev; | 2214 | struct pm8001_device *pm8001_dev; |
@@ -2292,7 +2288,9 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) | |||
2292 | ts->stat = SAS_QUEUE_FULL; | 2288 | ts->stat = SAS_QUEUE_FULL; |
2293 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2289 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2294 | mb();/*ditto*/ | 2290 | mb();/*ditto*/ |
2291 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2295 | t->task_done(t); | 2292 | t->task_done(t); |
2293 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2296 | return; | 2294 | return; |
2297 | } | 2295 | } |
2298 | break; | 2296 | break; |
@@ -2401,11 +2399,20 @@ static void mpi_sata_event(struct pm8001_hba_info *pm8001_ha , void *piomb) | |||
2401 | " resp 0x%x stat 0x%x but aborted by upper layer!\n", | 2399 | " resp 0x%x stat 0x%x but aborted by upper layer!\n", |
2402 | t, event, ts->resp, ts->stat)); | 2400 | t, event, ts->resp, ts->stat)); |
2403 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2401 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2404 | } else { | 2402 | } else if (t->uldd_task) { |
2405 | spin_unlock_irqrestore(&t->task_state_lock, flags); | 2403 | spin_unlock_irqrestore(&t->task_state_lock, flags); |
2406 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | 2404 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); |
2407 | mb();/* in order to force CPU ordering */ | 2405 | mb();/* ditto */ |
2406 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2408 | t->task_done(t); | 2407 | t->task_done(t); |
2408 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2409 | } else if (!t->uldd_task) { | ||
2410 | spin_unlock_irqrestore(&t->task_state_lock, flags); | ||
2411 | pm8001_ccb_task_free(pm8001_ha, t, ccb, tag); | ||
2412 | mb();/*ditto*/ | ||
2413 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
2414 | t->task_done(t); | ||
2415 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
2409 | } | 2416 | } |
2410 | } | 2417 | } |
2411 | 2418 | ||
@@ -2876,15 +2883,20 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2876 | le32_to_cpu(pPayload->lr_evt_status_phyid_portid); | 2883 | le32_to_cpu(pPayload->lr_evt_status_phyid_portid); |
2877 | u8 link_rate = | 2884 | u8 link_rate = |
2878 | (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28); | 2885 | (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28); |
2886 | u8 port_id = (u8)(lr_evt_status_phyid_portid & 0x0000000F); | ||
2879 | u8 phy_id = | 2887 | u8 phy_id = |
2880 | (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); | 2888 | (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); |
2889 | u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); | ||
2890 | u8 portstate = (u8)(npip_portstate & 0x0000000F); | ||
2891 | struct pm8001_port *port = &pm8001_ha->port[port_id]; | ||
2881 | struct sas_ha_struct *sas_ha = pm8001_ha->sas; | 2892 | struct sas_ha_struct *sas_ha = pm8001_ha->sas; |
2882 | struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; | 2893 | struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; |
2883 | unsigned long flags; | 2894 | unsigned long flags; |
2884 | u8 deviceType = pPayload->sas_identify.dev_type; | 2895 | u8 deviceType = pPayload->sas_identify.dev_type; |
2885 | 2896 | port->port_state = portstate; | |
2886 | PM8001_MSG_DBG(pm8001_ha, | 2897 | PM8001_MSG_DBG(pm8001_ha, |
2887 | pm8001_printk("HW_EVENT_SAS_PHY_UP \n")); | 2898 | pm8001_printk("HW_EVENT_SAS_PHY_UP port id = %d, phy id = %d\n", |
2899 | port_id, phy_id)); | ||
2888 | 2900 | ||
2889 | switch (deviceType) { | 2901 | switch (deviceType) { |
2890 | case SAS_PHY_UNUSED: | 2902 | case SAS_PHY_UNUSED: |
@@ -2895,16 +2907,19 @@ hw_event_sas_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2895 | PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n")); | 2907 | PM8001_MSG_DBG(pm8001_ha, pm8001_printk("end device.\n")); |
2896 | pm8001_chip_phy_ctl_req(pm8001_ha, phy_id, | 2908 | pm8001_chip_phy_ctl_req(pm8001_ha, phy_id, |
2897 | PHY_NOTIFY_ENABLE_SPINUP); | 2909 | PHY_NOTIFY_ENABLE_SPINUP); |
2910 | port->port_attached = 1; | ||
2898 | get_lrate_mode(phy, link_rate); | 2911 | get_lrate_mode(phy, link_rate); |
2899 | break; | 2912 | break; |
2900 | case SAS_EDGE_EXPANDER_DEVICE: | 2913 | case SAS_EDGE_EXPANDER_DEVICE: |
2901 | PM8001_MSG_DBG(pm8001_ha, | 2914 | PM8001_MSG_DBG(pm8001_ha, |
2902 | pm8001_printk("expander device.\n")); | 2915 | pm8001_printk("expander device.\n")); |
2916 | port->port_attached = 1; | ||
2903 | get_lrate_mode(phy, link_rate); | 2917 | get_lrate_mode(phy, link_rate); |
2904 | break; | 2918 | break; |
2905 | case SAS_FANOUT_EXPANDER_DEVICE: | 2919 | case SAS_FANOUT_EXPANDER_DEVICE: |
2906 | PM8001_MSG_DBG(pm8001_ha, | 2920 | PM8001_MSG_DBG(pm8001_ha, |
2907 | pm8001_printk("fanout expander device.\n")); | 2921 | pm8001_printk("fanout expander device.\n")); |
2922 | port->port_attached = 1; | ||
2908 | get_lrate_mode(phy, link_rate); | 2923 | get_lrate_mode(phy, link_rate); |
2909 | break; | 2924 | break; |
2910 | default: | 2925 | default: |
@@ -2946,11 +2961,20 @@ hw_event_sata_phy_up(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2946 | le32_to_cpu(pPayload->lr_evt_status_phyid_portid); | 2961 | le32_to_cpu(pPayload->lr_evt_status_phyid_portid); |
2947 | u8 link_rate = | 2962 | u8 link_rate = |
2948 | (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28); | 2963 | (u8)((lr_evt_status_phyid_portid & 0xF0000000) >> 28); |
2964 | u8 port_id = (u8)(lr_evt_status_phyid_portid & 0x0000000F); | ||
2949 | u8 phy_id = | 2965 | u8 phy_id = |
2950 | (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); | 2966 | (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); |
2967 | u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); | ||
2968 | u8 portstate = (u8)(npip_portstate & 0x0000000F); | ||
2969 | struct pm8001_port *port = &pm8001_ha->port[port_id]; | ||
2951 | struct sas_ha_struct *sas_ha = pm8001_ha->sas; | 2970 | struct sas_ha_struct *sas_ha = pm8001_ha->sas; |
2952 | struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; | 2971 | struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; |
2953 | unsigned long flags; | 2972 | unsigned long flags; |
2973 | PM8001_MSG_DBG(pm8001_ha, | ||
2974 | pm8001_printk("HW_EVENT_SATA_PHY_UP port id = %d," | ||
2975 | " phy id = %d\n", port_id, phy_id)); | ||
2976 | port->port_state = portstate; | ||
2977 | port->port_attached = 1; | ||
2954 | get_lrate_mode(phy, link_rate); | 2978 | get_lrate_mode(phy, link_rate); |
2955 | phy->phy_type |= PORT_TYPE_SATA; | 2979 | phy->phy_type |= PORT_TYPE_SATA; |
2956 | phy->phy_attached = 1; | 2980 | phy->phy_attached = 1; |
@@ -2984,7 +3008,13 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2984 | (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); | 3008 | (u8)((lr_evt_status_phyid_portid & 0x000000F0) >> 4); |
2985 | u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); | 3009 | u32 npip_portstate = le32_to_cpu(pPayload->npip_portstate); |
2986 | u8 portstate = (u8)(npip_portstate & 0x0000000F); | 3010 | u8 portstate = (u8)(npip_portstate & 0x0000000F); |
2987 | 3011 | struct pm8001_port *port = &pm8001_ha->port[port_id]; | |
3012 | struct pm8001_phy *phy = &pm8001_ha->phy[phy_id]; | ||
3013 | port->port_state = portstate; | ||
3014 | phy->phy_type = 0; | ||
3015 | phy->identify.device_type = 0; | ||
3016 | phy->phy_attached = 0; | ||
3017 | memset(&phy->dev_sas_addr, 0, SAS_ADDR_SIZE); | ||
2988 | switch (portstate) { | 3018 | switch (portstate) { |
2989 | case PORT_VALID: | 3019 | case PORT_VALID: |
2990 | break; | 3020 | break; |
@@ -2993,26 +3023,30 @@ hw_event_phy_down(struct pm8001_hba_info *pm8001_ha, void *piomb) | |||
2993 | pm8001_printk(" PortInvalid portID %d \n", port_id)); | 3023 | pm8001_printk(" PortInvalid portID %d \n", port_id)); |
2994 | PM8001_MSG_DBG(pm8001_ha, | 3024 | PM8001_MSG_DBG(pm8001_ha, |
2995 | pm8001_printk(" Last phy Down and port invalid\n")); | 3025 | pm8001_printk(" Last phy Down and port invalid\n")); |
3026 | port->port_attached = 0; | ||
2996 | pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, | 3027 | pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, |
2997 | port_id, phy_id, 0, 0); | 3028 | port_id, phy_id, 0, 0); |
2998 | break; | 3029 | break; |
2999 | case PORT_IN_RESET: | 3030 | case PORT_IN_RESET: |
3000 | PM8001_MSG_DBG(pm8001_ha, | 3031 | PM8001_MSG_DBG(pm8001_ha, |
3001 | pm8001_printk(" PortInReset portID %d \n", port_id)); | 3032 | pm8001_printk(" Port In Reset portID %d \n", port_id)); |
3002 | break; | 3033 | break; |
3003 | case PORT_NOT_ESTABLISHED: | 3034 | case PORT_NOT_ESTABLISHED: |
3004 | PM8001_MSG_DBG(pm8001_ha, | 3035 | PM8001_MSG_DBG(pm8001_ha, |
3005 | pm8001_printk(" phy Down and PORT_NOT_ESTABLISHED\n")); | 3036 | pm8001_printk(" phy Down and PORT_NOT_ESTABLISHED\n")); |
3037 | port->port_attached = 0; | ||
3006 | break; | 3038 | break; |
3007 | case PORT_LOSTCOMM: | 3039 | case PORT_LOSTCOMM: |
3008 | PM8001_MSG_DBG(pm8001_ha, | 3040 | PM8001_MSG_DBG(pm8001_ha, |
3009 | pm8001_printk(" phy Down and PORT_LOSTCOMM\n")); | 3041 | pm8001_printk(" phy Down and PORT_LOSTCOMM\n")); |
3010 | PM8001_MSG_DBG(pm8001_ha, | 3042 | PM8001_MSG_DBG(pm8001_ha, |
3011 | pm8001_printk(" Last phy Down and port invalid\n")); | 3043 | pm8001_printk(" Last phy Down and port invalid\n")); |
3044 | port->port_attached = 0; | ||
3012 | pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, | 3045 | pm8001_hw_event_ack_req(pm8001_ha, 0, HW_EVENT_PHY_DOWN, |
3013 | port_id, phy_id, 0, 0); | 3046 | port_id, phy_id, 0, 0); |
3014 | break; | 3047 | break; |
3015 | default: | 3048 | default: |
3049 | port->port_attached = 0; | ||
3016 | PM8001_MSG_DBG(pm8001_ha, | 3050 | PM8001_MSG_DBG(pm8001_ha, |
3017 | pm8001_printk(" phy Down and(default) = %x\n", | 3051 | pm8001_printk(" phy Down and(default) = %x\n", |
3018 | portstate)); | 3052 | portstate)); |
@@ -3770,7 +3804,8 @@ static int pm8001_chip_ssp_io_req(struct pm8001_hba_info *pm8001_ha, | |||
3770 | u32 opc = OPC_INB_SSPINIIOSTART; | 3804 | u32 opc = OPC_INB_SSPINIIOSTART; |
3771 | memset(&ssp_cmd, 0, sizeof(ssp_cmd)); | 3805 | memset(&ssp_cmd, 0, sizeof(ssp_cmd)); |
3772 | memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); | 3806 | memcpy(ssp_cmd.ssp_iu.lun, task->ssp_task.LUN, 8); |
3773 | ssp_cmd.dir_m_tlr = data_dir_flags[task->data_dir] << 8 | 0x0;/*0 for | 3807 | ssp_cmd.dir_m_tlr = |
3808 | cpu_to_le32(data_dir_flags[task->data_dir] << 8 | 0x0);/*0 for | ||
3774 | SAS 1.1 compatible TLR*/ | 3809 | SAS 1.1 compatible TLR*/ |
3775 | ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); | 3810 | ssp_cmd.data_len = cpu_to_le32(task->total_xfer_len); |
3776 | ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); | 3811 | ssp_cmd.device_id = cpu_to_le32(pm8001_dev->device_id); |
@@ -3841,7 +3876,7 @@ static int pm8001_chip_sata_req(struct pm8001_hba_info *pm8001_ha, | |||
3841 | } | 3876 | } |
3842 | } | 3877 | } |
3843 | if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) | 3878 | if (task->ata_task.use_ncq && pm8001_get_ncq_tag(task, &hdr_tag)) |
3844 | ncg_tag = cpu_to_le32(hdr_tag); | 3879 | ncg_tag = hdr_tag; |
3845 | dir = data_dir_flags[task->data_dir] << 8; | 3880 | dir = data_dir_flags[task->data_dir] << 8; |
3846 | sata_cmd.tag = cpu_to_le32(tag); | 3881 | sata_cmd.tag = cpu_to_le32(tag); |
3847 | sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); | 3882 | sata_cmd.device_id = cpu_to_le32(pm8001_ha_dev->device_id); |
@@ -3986,7 +4021,7 @@ static int pm8001_chip_reg_dev_req(struct pm8001_hba_info *pm8001_ha, | |||
3986 | ((stp_sspsmp_sata & 0x03) * 0x10000000)); | 4021 | ((stp_sspsmp_sata & 0x03) * 0x10000000)); |
3987 | payload.firstburstsize_ITNexustimeout = | 4022 | payload.firstburstsize_ITNexustimeout = |
3988 | cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); | 4023 | cpu_to_le32(ITNT | (firstBurstSize * 0x10000)); |
3989 | memcpy(&payload.sas_addr_hi, pm8001_dev->sas_device->sas_addr, | 4024 | memcpy(payload.sas_addr, pm8001_dev->sas_device->sas_addr, |
3990 | SAS_ADDR_SIZE); | 4025 | SAS_ADDR_SIZE); |
3991 | rc = mpi_build_cmd(pm8001_ha, circularQ, opc, &payload); | 4026 | rc = mpi_build_cmd(pm8001_ha, circularQ, opc, &payload); |
3992 | return rc; | 4027 | return rc; |
@@ -4027,7 +4062,7 @@ static int pm8001_chip_phy_ctl_req(struct pm8001_hba_info *pm8001_ha, | |||
4027 | struct inbound_queue_table *circularQ; | 4062 | struct inbound_queue_table *circularQ; |
4028 | int ret; | 4063 | int ret; |
4029 | u32 opc = OPC_INB_LOCAL_PHY_CONTROL; | 4064 | u32 opc = OPC_INB_LOCAL_PHY_CONTROL; |
4030 | memset((u8 *)&payload, 0, sizeof(payload)); | 4065 | memset(&payload, 0, sizeof(payload)); |
4031 | circularQ = &pm8001_ha->inbnd_q_tbl[0]; | 4066 | circularQ = &pm8001_ha->inbnd_q_tbl[0]; |
4032 | payload.tag = 1; | 4067 | payload.tag = 1; |
4033 | payload.phyop_phyid = | 4068 | payload.phyop_phyid = |
diff --git a/drivers/scsi/pm8001/pm8001_hwi.h b/drivers/scsi/pm8001/pm8001_hwi.h index 96e4daa68b8f..833a5201eda4 100644 --- a/drivers/scsi/pm8001/pm8001_hwi.h +++ b/drivers/scsi/pm8001/pm8001_hwi.h | |||
@@ -242,8 +242,7 @@ struct reg_dev_req { | |||
242 | __le32 phyid_portid; | 242 | __le32 phyid_portid; |
243 | __le32 dtype_dlr_retry; | 243 | __le32 dtype_dlr_retry; |
244 | __le32 firstburstsize_ITNexustimeout; | 244 | __le32 firstburstsize_ITNexustimeout; |
245 | u32 sas_addr_hi; | 245 | u8 sas_addr[SAS_ADDR_SIZE]; |
246 | u32 sas_addr_low; | ||
247 | __le32 upper_device_id; | 246 | __le32 upper_device_id; |
248 | u32 reserved[8]; | 247 | u32 reserved[8]; |
249 | } __attribute__((packed, aligned(4))); | 248 | } __attribute__((packed, aligned(4))); |
diff --git a/drivers/scsi/pm8001/pm8001_init.c b/drivers/scsi/pm8001/pm8001_init.c index 42ebe725d5a5..c2f1032496cb 100644 --- a/drivers/scsi/pm8001/pm8001_init.c +++ b/drivers/scsi/pm8001/pm8001_init.c | |||
@@ -200,8 +200,13 @@ static int __devinit pm8001_alloc(struct pm8001_hba_info *pm8001_ha) | |||
200 | { | 200 | { |
201 | int i; | 201 | int i; |
202 | spin_lock_init(&pm8001_ha->lock); | 202 | spin_lock_init(&pm8001_ha->lock); |
203 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) | 203 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { |
204 | pm8001_phy_init(pm8001_ha, i); | 204 | pm8001_phy_init(pm8001_ha, i); |
205 | pm8001_ha->port[i].wide_port_phymap = 0; | ||
206 | pm8001_ha->port[i].port_attached = 0; | ||
207 | pm8001_ha->port[i].port_state = 0; | ||
208 | INIT_LIST_HEAD(&pm8001_ha->port[i].list); | ||
209 | } | ||
205 | 210 | ||
206 | pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL); | 211 | pm8001_ha->tags = kzalloc(PM8001_MAX_CCB, GFP_KERNEL); |
207 | if (!pm8001_ha->tags) | 212 | if (!pm8001_ha->tags) |
@@ -511,19 +516,23 @@ static void pm8001_init_sas_add(struct pm8001_hba_info *pm8001_ha) | |||
511 | u8 i; | 516 | u8 i; |
512 | #ifdef PM8001_READ_VPD | 517 | #ifdef PM8001_READ_VPD |
513 | DECLARE_COMPLETION_ONSTACK(completion); | 518 | DECLARE_COMPLETION_ONSTACK(completion); |
519 | struct pm8001_ioctl_payload payload; | ||
514 | pm8001_ha->nvmd_completion = &completion; | 520 | pm8001_ha->nvmd_completion = &completion; |
515 | PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, 0, 0); | 521 | payload.minor_function = 0; |
522 | payload.length = 128; | ||
523 | payload.func_specific = kzalloc(128, GFP_KERNEL); | ||
524 | PM8001_CHIP_DISP->get_nvmd_req(pm8001_ha, &payload); | ||
516 | wait_for_completion(&completion); | 525 | wait_for_completion(&completion); |
517 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { | 526 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { |
518 | memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr, | 527 | memcpy(&pm8001_ha->phy[i].dev_sas_addr, pm8001_ha->sas_addr, |
519 | SAS_ADDR_SIZE); | 528 | SAS_ADDR_SIZE); |
520 | PM8001_INIT_DBG(pm8001_ha, | 529 | PM8001_INIT_DBG(pm8001_ha, |
521 | pm8001_printk("phy %d sas_addr = %x \n", i, | 530 | pm8001_printk("phy %d sas_addr = %016llx \n", i, |
522 | (u64)pm8001_ha->phy[i].dev_sas_addr)); | 531 | pm8001_ha->phy[i].dev_sas_addr)); |
523 | } | 532 | } |
524 | #else | 533 | #else |
525 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { | 534 | for (i = 0; i < pm8001_ha->chip->n_phy; i++) { |
526 | pm8001_ha->phy[i].dev_sas_addr = 0x500e004010000004ULL; | 535 | pm8001_ha->phy[i].dev_sas_addr = 0x50010c600047f9d0ULL; |
527 | pm8001_ha->phy[i].dev_sas_addr = | 536 | pm8001_ha->phy[i].dev_sas_addr = |
528 | cpu_to_be64((u64) | 537 | cpu_to_be64((u64) |
529 | (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); | 538 | (*(u64 *)&pm8001_ha->phy[i].dev_sas_addr)); |
diff --git a/drivers/scsi/pm8001/pm8001_sas.c b/drivers/scsi/pm8001/pm8001_sas.c index 1f767a0e727a..7f9c83a76390 100644 --- a/drivers/scsi/pm8001/pm8001_sas.c +++ b/drivers/scsi/pm8001/pm8001_sas.c | |||
@@ -329,6 +329,23 @@ int pm8001_slave_configure(struct scsi_device *sdev) | |||
329 | } | 329 | } |
330 | return 0; | 330 | return 0; |
331 | } | 331 | } |
332 | /* Find the local port id that's attached to this device */ | ||
333 | static int sas_find_local_port_id(struct domain_device *dev) | ||
334 | { | ||
335 | struct domain_device *pdev = dev->parent; | ||
336 | |||
337 | /* Directly attached device */ | ||
338 | if (!pdev) | ||
339 | return dev->port->id; | ||
340 | while (pdev) { | ||
341 | struct domain_device *pdev_p = pdev->parent; | ||
342 | if (!pdev_p) | ||
343 | return pdev->port->id; | ||
344 | pdev = pdev->parent; | ||
345 | } | ||
346 | return 0; | ||
347 | } | ||
348 | |||
332 | /** | 349 | /** |
333 | * pm8001_task_exec - queue the task(ssp, smp && ata) to the hardware. | 350 | * pm8001_task_exec - queue the task(ssp, smp && ata) to the hardware. |
334 | * @task: the task to be execute. | 351 | * @task: the task to be execute. |
@@ -346,11 +363,12 @@ static int pm8001_task_exec(struct sas_task *task, const int num, | |||
346 | struct domain_device *dev = task->dev; | 363 | struct domain_device *dev = task->dev; |
347 | struct pm8001_hba_info *pm8001_ha; | 364 | struct pm8001_hba_info *pm8001_ha; |
348 | struct pm8001_device *pm8001_dev; | 365 | struct pm8001_device *pm8001_dev; |
366 | struct pm8001_port *port = NULL; | ||
349 | struct sas_task *t = task; | 367 | struct sas_task *t = task; |
350 | struct pm8001_ccb_info *ccb; | 368 | struct pm8001_ccb_info *ccb; |
351 | u32 tag = 0xdeadbeef, rc, n_elem = 0; | 369 | u32 tag = 0xdeadbeef, rc, n_elem = 0; |
352 | u32 n = num; | 370 | u32 n = num; |
353 | unsigned long flags = 0; | 371 | unsigned long flags = 0, flags_libsas = 0; |
354 | 372 | ||
355 | if (!dev->port) { | 373 | if (!dev->port) { |
356 | struct task_status_struct *tsm = &t->task_status; | 374 | struct task_status_struct *tsm = &t->task_status; |
@@ -379,6 +397,35 @@ static int pm8001_task_exec(struct sas_task *task, const int num, | |||
379 | rc = SAS_PHY_DOWN; | 397 | rc = SAS_PHY_DOWN; |
380 | goto out_done; | 398 | goto out_done; |
381 | } | 399 | } |
400 | port = &pm8001_ha->port[sas_find_local_port_id(dev)]; | ||
401 | if (!port->port_attached) { | ||
402 | if (sas_protocol_ata(t->task_proto)) { | ||
403 | struct task_status_struct *ts = &t->task_status; | ||
404 | ts->resp = SAS_TASK_UNDELIVERED; | ||
405 | ts->stat = SAS_PHY_DOWN; | ||
406 | |||
407 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | ||
408 | spin_unlock_irqrestore(dev->sata_dev.ap->lock, | ||
409 | flags_libsas); | ||
410 | t->task_done(t); | ||
411 | spin_lock_irqsave(dev->sata_dev.ap->lock, | ||
412 | flags_libsas); | ||
413 | spin_lock_irqsave(&pm8001_ha->lock, flags); | ||
414 | if (n > 1) | ||
415 | t = list_entry(t->list.next, | ||
416 | struct sas_task, list); | ||
417 | continue; | ||
418 | } else { | ||
419 | struct task_status_struct *ts = &t->task_status; | ||
420 | ts->resp = SAS_TASK_UNDELIVERED; | ||
421 | ts->stat = SAS_PHY_DOWN; | ||
422 | t->task_done(t); | ||
423 | if (n > 1) | ||
424 | t = list_entry(t->list.next, | ||
425 | struct sas_task, list); | ||
426 | continue; | ||
427 | } | ||
428 | } | ||
382 | rc = pm8001_tag_alloc(pm8001_ha, &tag); | 429 | rc = pm8001_tag_alloc(pm8001_ha, &tag); |
383 | if (rc) | 430 | if (rc) |
384 | goto err_out; | 431 | goto err_out; |
@@ -569,11 +616,11 @@ static int pm8001_dev_found_notify(struct domain_device *dev) | |||
569 | spin_lock_irqsave(&pm8001_ha->lock, flags); | 616 | spin_lock_irqsave(&pm8001_ha->lock, flags); |
570 | 617 | ||
571 | pm8001_device = pm8001_alloc_dev(pm8001_ha); | 618 | pm8001_device = pm8001_alloc_dev(pm8001_ha); |
572 | pm8001_device->sas_device = dev; | ||
573 | if (!pm8001_device) { | 619 | if (!pm8001_device) { |
574 | res = -1; | 620 | res = -1; |
575 | goto found_out; | 621 | goto found_out; |
576 | } | 622 | } |
623 | pm8001_device->sas_device = dev; | ||
577 | dev->lldd_dev = pm8001_device; | 624 | dev->lldd_dev = pm8001_device; |
578 | pm8001_device->dev_type = dev->dev_type; | 625 | pm8001_device->dev_type = dev->dev_type; |
579 | pm8001_device->dcompletion = &completion; | 626 | pm8001_device->dcompletion = &completion; |
@@ -609,7 +656,7 @@ static int pm8001_dev_found_notify(struct domain_device *dev) | |||
609 | wait_for_completion(&completion); | 656 | wait_for_completion(&completion); |
610 | if (dev->dev_type == SAS_END_DEV) | 657 | if (dev->dev_type == SAS_END_DEV) |
611 | msleep(50); | 658 | msleep(50); |
612 | pm8001_ha->flags = PM8001F_RUN_TIME ; | 659 | pm8001_ha->flags |= PM8001F_RUN_TIME ; |
613 | return 0; | 660 | return 0; |
614 | found_out: | 661 | found_out: |
615 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); | 662 | spin_unlock_irqrestore(&pm8001_ha->lock, flags); |
@@ -772,7 +819,7 @@ pm8001_exec_internal_task_abort(struct pm8001_hba_info *pm8001_ha, | |||
772 | task->task_done = pm8001_task_done; | 819 | task->task_done = pm8001_task_done; |
773 | task->timer.data = (unsigned long)task; | 820 | task->timer.data = (unsigned long)task; |
774 | task->timer.function = pm8001_tmf_timedout; | 821 | task->timer.function = pm8001_tmf_timedout; |
775 | task->timer.expires = jiffies + PM8001_TASK_TIMEOUT*HZ; | 822 | task->timer.expires = jiffies + PM8001_TASK_TIMEOUT * HZ; |
776 | add_timer(&task->timer); | 823 | add_timer(&task->timer); |
777 | 824 | ||
778 | res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); | 825 | res = pm8001_tag_alloc(pm8001_ha, &ccb_tag); |
@@ -897,6 +944,8 @@ int pm8001_I_T_nexus_reset(struct domain_device *dev) | |||
897 | 944 | ||
898 | if (dev_is_sata(dev)) { | 945 | if (dev_is_sata(dev)) { |
899 | DECLARE_COMPLETION_ONSTACK(completion_setstate); | 946 | DECLARE_COMPLETION_ONSTACK(completion_setstate); |
947 | if (scsi_is_sas_phy_local(phy)) | ||
948 | return 0; | ||
900 | rc = sas_phy_reset(phy, 1); | 949 | rc = sas_phy_reset(phy, 1); |
901 | msleep(2000); | 950 | msleep(2000); |
902 | rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev , | 951 | rc = pm8001_exec_internal_task_abort(pm8001_ha, pm8001_dev , |
diff --git a/drivers/scsi/pm8001/pm8001_sas.h b/drivers/scsi/pm8001/pm8001_sas.h index 30f2ede55a75..8e38ca8cd101 100644 --- a/drivers/scsi/pm8001/pm8001_sas.h +++ b/drivers/scsi/pm8001/pm8001_sas.h | |||
@@ -59,11 +59,11 @@ | |||
59 | 59 | ||
60 | #define DRV_NAME "pm8001" | 60 | #define DRV_NAME "pm8001" |
61 | #define DRV_VERSION "0.1.36" | 61 | #define DRV_VERSION "0.1.36" |
62 | #define PM8001_FAIL_LOGGING 0x01 /* libsas EH function logging */ | 62 | #define PM8001_FAIL_LOGGING 0x01 /* Error message logging */ |
63 | #define PM8001_INIT_LOGGING 0x02 /* driver init logging */ | 63 | #define PM8001_INIT_LOGGING 0x02 /* driver init logging */ |
64 | #define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */ | 64 | #define PM8001_DISC_LOGGING 0x04 /* discovery layer logging */ |
65 | #define PM8001_IO_LOGGING 0x08 /* I/O path logging */ | 65 | #define PM8001_IO_LOGGING 0x08 /* I/O path logging */ |
66 | #define PM8001_EH_LOGGING 0x10 /* Error message logging */ | 66 | #define PM8001_EH_LOGGING 0x10 /* libsas EH function logging*/ |
67 | #define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */ | 67 | #define PM8001_IOCTL_LOGGING 0x20 /* IOCTL message logging */ |
68 | #define PM8001_MSG_LOGGING 0x40 /* misc message logging */ | 68 | #define PM8001_MSG_LOGGING 0x40 /* misc message logging */ |
69 | #define pm8001_printk(format, arg...) printk(KERN_INFO "%s %d:" format,\ | 69 | #define pm8001_printk(format, arg...) printk(KERN_INFO "%s %d:" format,\ |
@@ -100,6 +100,7 @@ do { \ | |||
100 | 100 | ||
101 | #define PM8001_USE_TASKLET | 101 | #define PM8001_USE_TASKLET |
102 | #define PM8001_USE_MSIX | 102 | #define PM8001_USE_MSIX |
103 | #define PM8001_READ_VPD | ||
103 | 104 | ||
104 | 105 | ||
105 | #define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV)) | 106 | #define DEV_IS_EXPANDER(type) ((type == EDGE_DEV) || (type == FANOUT_DEV)) |
@@ -111,7 +112,22 @@ extern const struct pm8001_dispatch pm8001_8001_dispatch; | |||
111 | struct pm8001_hba_info; | 112 | struct pm8001_hba_info; |
112 | struct pm8001_ccb_info; | 113 | struct pm8001_ccb_info; |
113 | struct pm8001_device; | 114 | struct pm8001_device; |
114 | struct pm8001_tmf_task; | 115 | /* define task management IU */ |
116 | struct pm8001_tmf_task { | ||
117 | u8 tmf; | ||
118 | u32 tag_of_task_to_be_managed; | ||
119 | }; | ||
120 | struct pm8001_ioctl_payload { | ||
121 | u32 signature; | ||
122 | u16 major_function; | ||
123 | u16 minor_function; | ||
124 | u16 length; | ||
125 | u16 status; | ||
126 | u16 offset; | ||
127 | u16 id; | ||
128 | u8 *func_specific; | ||
129 | }; | ||
130 | |||
115 | struct pm8001_dispatch { | 131 | struct pm8001_dispatch { |
116 | char *name; | 132 | char *name; |
117 | int (*chip_init)(struct pm8001_hba_info *pm8001_ha); | 133 | int (*chip_init)(struct pm8001_hba_info *pm8001_ha); |
@@ -164,6 +180,10 @@ struct pm8001_chip_info { | |||
164 | 180 | ||
165 | struct pm8001_port { | 181 | struct pm8001_port { |
166 | struct asd_sas_port sas_port; | 182 | struct asd_sas_port sas_port; |
183 | u8 port_attached; | ||
184 | u8 wide_port_phymap; | ||
185 | u8 port_state; | ||
186 | struct list_head list; | ||
167 | }; | 187 | }; |
168 | 188 | ||
169 | struct pm8001_phy { | 189 | struct pm8001_phy { |
@@ -386,11 +406,7 @@ struct pm8001_fw_image_header { | |||
386 | __be32 startup_entry; | 406 | __be32 startup_entry; |
387 | } __attribute__((packed, aligned(4))); | 407 | } __attribute__((packed, aligned(4))); |
388 | 408 | ||
389 | /* define task management IU */ | 409 | |
390 | struct pm8001_tmf_task { | ||
391 | u8 tmf; | ||
392 | u32 tag_of_task_to_be_managed; | ||
393 | }; | ||
394 | /** | 410 | /** |
395 | * FW Flash Update status values | 411 | * FW Flash Update status values |
396 | */ | 412 | */ |
diff --git a/drivers/scsi/pmcraid.c b/drivers/scsi/pmcraid.c index 34c6b896a91b..e7d2688fbeba 100644 --- a/drivers/scsi/pmcraid.c +++ b/drivers/scsi/pmcraid.c | |||
@@ -1,7 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters | 2 | * pmcraid.c -- driver for PMC Sierra MaxRAID controller adapters |
3 | * | 3 | * |
4 | * Written By: PMC Sierra Corporation | 4 | * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> |
5 | * PMC-Sierra Inc | ||
5 | * | 6 | * |
6 | * Copyright (C) 2008, 2009 PMC Sierra Inc | 7 | * Copyright (C) 2008, 2009 PMC Sierra Inc |
7 | * | 8 | * |
@@ -79,7 +80,7 @@ DECLARE_BITMAP(pmcraid_minor, PMCRAID_MAX_ADAPTERS); | |||
79 | /* | 80 | /* |
80 | * Module parameters | 81 | * Module parameters |
81 | */ | 82 | */ |
82 | MODULE_AUTHOR("PMC Sierra Corporation, anil_ravindranath@pmc-sierra.com"); | 83 | MODULE_AUTHOR("Anil Ravindranath<anil_ravindranath@pmc-sierra.com>"); |
83 | MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); | 84 | MODULE_DESCRIPTION("PMC Sierra MaxRAID Controller Driver"); |
84 | MODULE_LICENSE("GPL"); | 85 | MODULE_LICENSE("GPL"); |
85 | MODULE_VERSION(PMCRAID_DRIVER_VERSION); | 86 | MODULE_VERSION(PMCRAID_DRIVER_VERSION); |
@@ -162,10 +163,10 @@ static int pmcraid_slave_alloc(struct scsi_device *scsi_dev) | |||
162 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | 163 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); |
163 | list_for_each_entry(temp, &pinstance->used_res_q, queue) { | 164 | list_for_each_entry(temp, &pinstance->used_res_q, queue) { |
164 | 165 | ||
165 | /* do not expose VSETs with order-ids >= 240 */ | 166 | /* do not expose VSETs with order-ids > MAX_VSET_TARGETS */ |
166 | if (RES_IS_VSET(temp->cfg_entry)) { | 167 | if (RES_IS_VSET(temp->cfg_entry)) { |
167 | target = temp->cfg_entry.unique_flags1; | 168 | target = temp->cfg_entry.unique_flags1; |
168 | if (target >= PMCRAID_MAX_VSET_TARGETS) | 169 | if (target > PMCRAID_MAX_VSET_TARGETS) |
169 | continue; | 170 | continue; |
170 | bus = PMCRAID_VSET_BUS_ID; | 171 | bus = PMCRAID_VSET_BUS_ID; |
171 | lun = 0; | 172 | lun = 0; |
@@ -1210,7 +1211,7 @@ static int pmcraid_expose_resource(struct pmcraid_config_table_entry *cfgte) | |||
1210 | int retval = 0; | 1211 | int retval = 0; |
1211 | 1212 | ||
1212 | if (cfgte->resource_type == RES_TYPE_VSET) | 1213 | if (cfgte->resource_type == RES_TYPE_VSET) |
1213 | retval = ((cfgte->unique_flags1 & 0xFF) < 0xFE); | 1214 | retval = ((cfgte->unique_flags1 & 0x80) == 0); |
1214 | else if (cfgte->resource_type == RES_TYPE_GSCSI) | 1215 | else if (cfgte->resource_type == RES_TYPE_GSCSI) |
1215 | retval = (RES_BUS(cfgte->resource_address) != | 1216 | retval = (RES_BUS(cfgte->resource_address) != |
1216 | PMCRAID_VIRTUAL_ENCL_BUS_ID); | 1217 | PMCRAID_VIRTUAL_ENCL_BUS_ID); |
@@ -1361,6 +1362,7 @@ static int pmcraid_notify_aen(struct pmcraid_instance *pinstance, u8 type) | |||
1361 | * Return value: | 1362 | * Return value: |
1362 | * none | 1363 | * none |
1363 | */ | 1364 | */ |
1365 | |||
1364 | static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) | 1366 | static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) |
1365 | { | 1367 | { |
1366 | struct pmcraid_config_table_entry *cfg_entry; | 1368 | struct pmcraid_config_table_entry *cfg_entry; |
@@ -1368,9 +1370,10 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) | |||
1368 | struct pmcraid_cmd *cmd; | 1370 | struct pmcraid_cmd *cmd; |
1369 | struct pmcraid_cmd *cfgcmd; | 1371 | struct pmcraid_cmd *cfgcmd; |
1370 | struct pmcraid_resource_entry *res = NULL; | 1372 | struct pmcraid_resource_entry *res = NULL; |
1371 | u32 new_entry = 1; | ||
1372 | unsigned long lock_flags; | 1373 | unsigned long lock_flags; |
1373 | unsigned long host_lock_flags; | 1374 | unsigned long host_lock_flags; |
1375 | u32 new_entry = 1; | ||
1376 | u32 hidden_entry = 0; | ||
1374 | int rc; | 1377 | int rc; |
1375 | 1378 | ||
1376 | ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; | 1379 | ccn_hcam = (struct pmcraid_hcam_ccn *)pinstance->ccn.hcam; |
@@ -1406,9 +1409,15 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) | |||
1406 | } | 1409 | } |
1407 | 1410 | ||
1408 | /* If this resource is not going to be added to mid-layer, just notify | 1411 | /* If this resource is not going to be added to mid-layer, just notify |
1409 | * applications and return | 1412 | * applications and return. If this notification is about hiding a VSET |
1413 | * resource, check if it was exposed already. | ||
1410 | */ | 1414 | */ |
1411 | if (!pmcraid_expose_resource(cfg_entry)) | 1415 | if (pinstance->ccn.hcam->notification_type == |
1416 | NOTIFICATION_TYPE_ENTRY_CHANGED && | ||
1417 | cfg_entry->resource_type == RES_TYPE_VSET && | ||
1418 | cfg_entry->unique_flags1 & 0x80) { | ||
1419 | hidden_entry = 1; | ||
1420 | } else if (!pmcraid_expose_resource(cfg_entry)) | ||
1412 | goto out_notify_apps; | 1421 | goto out_notify_apps; |
1413 | 1422 | ||
1414 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); | 1423 | spin_lock_irqsave(&pinstance->resource_lock, lock_flags); |
@@ -1424,6 +1433,12 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) | |||
1424 | 1433 | ||
1425 | if (new_entry) { | 1434 | if (new_entry) { |
1426 | 1435 | ||
1436 | if (hidden_entry) { | ||
1437 | spin_unlock_irqrestore(&pinstance->resource_lock, | ||
1438 | lock_flags); | ||
1439 | goto out_notify_apps; | ||
1440 | } | ||
1441 | |||
1427 | /* If there are more number of resources than what driver can | 1442 | /* If there are more number of resources than what driver can |
1428 | * manage, do not notify the applications about the CCN. Just | 1443 | * manage, do not notify the applications about the CCN. Just |
1429 | * ignore this notifications and re-register the same HCAM | 1444 | * ignore this notifications and re-register the same HCAM |
@@ -1454,8 +1469,9 @@ static void pmcraid_handle_config_change(struct pmcraid_instance *pinstance) | |||
1454 | sizeof(struct pmcraid_config_table_entry)); | 1469 | sizeof(struct pmcraid_config_table_entry)); |
1455 | 1470 | ||
1456 | if (pinstance->ccn.hcam->notification_type == | 1471 | if (pinstance->ccn.hcam->notification_type == |
1457 | NOTIFICATION_TYPE_ENTRY_DELETED) { | 1472 | NOTIFICATION_TYPE_ENTRY_DELETED || hidden_entry) { |
1458 | if (res->scsi_dev) { | 1473 | if (res->scsi_dev) { |
1474 | res->cfg_entry.unique_flags1 &= 0x7F; | ||
1459 | res->change_detected = RES_CHANGE_DEL; | 1475 | res->change_detected = RES_CHANGE_DEL; |
1460 | res->cfg_entry.resource_handle = | 1476 | res->cfg_entry.resource_handle = |
1461 | PMCRAID_INVALID_RES_HANDLE; | 1477 | PMCRAID_INVALID_RES_HANDLE; |
diff --git a/drivers/scsi/pmcraid.h b/drivers/scsi/pmcraid.h index 2752b56cad56..92f89d50850c 100644 --- a/drivers/scsi/pmcraid.h +++ b/drivers/scsi/pmcraid.h | |||
@@ -1,6 +1,9 @@ | |||
1 | /* | 1 | /* |
2 | * pmcraid.h -- PMC Sierra MaxRAID controller driver header file | 2 | * pmcraid.h -- PMC Sierra MaxRAID controller driver header file |
3 | * | 3 | * |
4 | * Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com> | ||
5 | * PMC-Sierra Inc | ||
6 | * | ||
4 | * Copyright (C) 2008, 2009 PMC Sierra Inc. | 7 | * Copyright (C) 2008, 2009 PMC Sierra Inc. |
5 | * | 8 | * |
6 | * This program is free software; you can redistribute it and/or modify | 9 | * This program is free software; you can redistribute it and/or modify |
@@ -106,7 +109,7 @@ | |||
106 | #define PMCRAID_VSET_LUN_ID 0x0 | 109 | #define PMCRAID_VSET_LUN_ID 0x0 |
107 | #define PMCRAID_PHYS_BUS_ID 0x0 | 110 | #define PMCRAID_PHYS_BUS_ID 0x0 |
108 | #define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8 | 111 | #define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8 |
109 | #define PMCRAID_MAX_VSET_TARGETS 240 | 112 | #define PMCRAID_MAX_VSET_TARGETS 0x7F |
110 | #define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8 | 113 | #define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8 |
111 | 114 | ||
112 | #define PMCRAID_IOA_MAX_SECTORS 32767 | 115 | #define PMCRAID_IOA_MAX_SECTORS 32767 |
diff --git a/drivers/scsi/qla2xxx/qla_def.h b/drivers/scsi/qla2xxx/qla_def.h index 6b9bf23c7735..384afda7dbe9 100644 --- a/drivers/scsi/qla2xxx/qla_def.h +++ b/drivers/scsi/qla2xxx/qla_def.h | |||
@@ -1570,9 +1570,6 @@ typedef struct fc_port { | |||
1570 | struct fc_rport *rport, *drport; | 1570 | struct fc_rport *rport, *drport; |
1571 | u32 supported_classes; | 1571 | u32 supported_classes; |
1572 | 1572 | ||
1573 | unsigned long last_queue_full; | ||
1574 | unsigned long last_ramp_up; | ||
1575 | |||
1576 | uint16_t vp_idx; | 1573 | uint16_t vp_idx; |
1577 | } fc_port_t; | 1574 | } fc_port_t; |
1578 | 1575 | ||
@@ -2265,6 +2262,7 @@ struct qla_hw_data { | |||
2265 | uint32_t port0 :1; | 2262 | uint32_t port0 :1; |
2266 | uint32_t running_gold_fw :1; | 2263 | uint32_t running_gold_fw :1; |
2267 | uint32_t cpu_affinity_enabled :1; | 2264 | uint32_t cpu_affinity_enabled :1; |
2265 | uint32_t disable_msix_handshake :1; | ||
2268 | } flags; | 2266 | } flags; |
2269 | 2267 | ||
2270 | /* This spinlock is used to protect "io transactions", you must | 2268 | /* This spinlock is used to protect "io transactions", you must |
@@ -2387,6 +2385,7 @@ struct qla_hw_data { | |||
2387 | #define IS_QLA81XX(ha) (IS_QLA8001(ha)) | 2385 | #define IS_QLA81XX(ha) (IS_QLA8001(ha)) |
2388 | #define IS_QLA2XXX_MIDTYPE(ha) (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \ | 2386 | #define IS_QLA2XXX_MIDTYPE(ha) (IS_QLA24XX(ha) || IS_QLA84XX(ha) || \ |
2389 | IS_QLA25XX(ha) || IS_QLA81XX(ha)) | 2387 | IS_QLA25XX(ha) || IS_QLA81XX(ha)) |
2388 | #define IS_MSIX_NACK_CAPABLE(ha) (IS_QLA81XX(ha)) | ||
2390 | #define IS_NOPOLLING_TYPE(ha) ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && \ | 2389 | #define IS_NOPOLLING_TYPE(ha) ((IS_QLA25XX(ha) || IS_QLA81XX(ha)) && \ |
2391 | (ha)->flags.msix_enabled) | 2390 | (ha)->flags.msix_enabled) |
2392 | #define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha)) | 2391 | #define IS_FAC_REQUIRED(ha) (IS_QLA81XX(ha)) |
diff --git a/drivers/scsi/qla2xxx/qla_gbl.h b/drivers/scsi/qla2xxx/qla_gbl.h index e21851358509..0b6801fc6389 100644 --- a/drivers/scsi/qla2xxx/qla_gbl.h +++ b/drivers/scsi/qla2xxx/qla_gbl.h | |||
@@ -72,8 +72,6 @@ extern int ql2xloginretrycount; | |||
72 | extern int ql2xfdmienable; | 72 | extern int ql2xfdmienable; |
73 | extern int ql2xallocfwdump; | 73 | extern int ql2xallocfwdump; |
74 | extern int ql2xextended_error_logging; | 74 | extern int ql2xextended_error_logging; |
75 | extern int ql2xqfullrampup; | ||
76 | extern int ql2xqfulltracking; | ||
77 | extern int ql2xiidmaenable; | 75 | extern int ql2xiidmaenable; |
78 | extern int ql2xmaxqueues; | 76 | extern int ql2xmaxqueues; |
79 | extern int ql2xmultique_tag; | 77 | extern int ql2xmultique_tag; |
diff --git a/drivers/scsi/qla2xxx/qla_init.c b/drivers/scsi/qla2xxx/qla_init.c index b74924b279ef..73a793539d45 100644 --- a/drivers/scsi/qla2xxx/qla_init.c +++ b/drivers/scsi/qla2xxx/qla_init.c | |||
@@ -1442,7 +1442,17 @@ qla24xx_config_rings(struct scsi_qla_host *vha) | |||
1442 | icb->firmware_options_2 |= | 1442 | icb->firmware_options_2 |= |
1443 | __constant_cpu_to_le32(BIT_18); | 1443 | __constant_cpu_to_le32(BIT_18); |
1444 | 1444 | ||
1445 | icb->firmware_options_2 &= __constant_cpu_to_le32(~BIT_22); | 1445 | /* Use Disable MSIX Handshake mode for capable adapters */ |
1446 | if (IS_MSIX_NACK_CAPABLE(ha)) { | ||
1447 | icb->firmware_options_2 &= | ||
1448 | __constant_cpu_to_le32(~BIT_22); | ||
1449 | ha->flags.disable_msix_handshake = 1; | ||
1450 | qla_printk(KERN_INFO, ha, | ||
1451 | "MSIX Handshake Disable Mode turned on\n"); | ||
1452 | } else { | ||
1453 | icb->firmware_options_2 |= | ||
1454 | __constant_cpu_to_le32(BIT_22); | ||
1455 | } | ||
1446 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); | 1456 | icb->firmware_options_2 |= __constant_cpu_to_le32(BIT_23); |
1447 | 1457 | ||
1448 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); | 1458 | WRT_REG_DWORD(®->isp25mq.req_q_in, 0); |
diff --git a/drivers/scsi/qla2xxx/qla_isr.c b/drivers/scsi/qla2xxx/qla_isr.c index 804987397b77..1692a883f4de 100644 --- a/drivers/scsi/qla2xxx/qla_isr.c +++ b/drivers/scsi/qla2xxx/qla_isr.c | |||
@@ -811,78 +811,6 @@ skip_rio: | |||
811 | qla2x00_alert_all_vps(rsp, mb); | 811 | qla2x00_alert_all_vps(rsp, mb); |
812 | } | 812 | } |
813 | 813 | ||
814 | static void | ||
815 | qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, void *data) | ||
816 | { | ||
817 | fc_port_t *fcport = data; | ||
818 | struct scsi_qla_host *vha = fcport->vha; | ||
819 | struct qla_hw_data *ha = vha->hw; | ||
820 | struct req_que *req = NULL; | ||
821 | |||
822 | if (!ql2xqfulltracking) | ||
823 | return; | ||
824 | |||
825 | req = vha->req; | ||
826 | if (!req) | ||
827 | return; | ||
828 | if (req->max_q_depth <= sdev->queue_depth) | ||
829 | return; | ||
830 | |||
831 | if (sdev->ordered_tags) | ||
832 | scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, | ||
833 | sdev->queue_depth + 1); | ||
834 | else | ||
835 | scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, | ||
836 | sdev->queue_depth + 1); | ||
837 | |||
838 | fcport->last_ramp_up = jiffies; | ||
839 | |||
840 | DEBUG2(qla_printk(KERN_INFO, ha, | ||
841 | "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n", | ||
842 | fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun, | ||
843 | sdev->queue_depth)); | ||
844 | } | ||
845 | |||
846 | static void | ||
847 | qla2x00_adjust_sdev_qdepth_down(struct scsi_device *sdev, void *data) | ||
848 | { | ||
849 | fc_port_t *fcport = data; | ||
850 | |||
851 | if (!scsi_track_queue_full(sdev, sdev->queue_depth - 1)) | ||
852 | return; | ||
853 | |||
854 | DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw, | ||
855 | "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n", | ||
856 | fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun, | ||
857 | sdev->queue_depth)); | ||
858 | } | ||
859 | |||
860 | static inline void | ||
861 | qla2x00_ramp_up_queue_depth(scsi_qla_host_t *vha, struct req_que *req, | ||
862 | srb_t *sp) | ||
863 | { | ||
864 | fc_port_t *fcport; | ||
865 | struct scsi_device *sdev; | ||
866 | |||
867 | if (!ql2xqfulltracking) | ||
868 | return; | ||
869 | |||
870 | sdev = sp->cmd->device; | ||
871 | if (sdev->queue_depth >= req->max_q_depth) | ||
872 | return; | ||
873 | |||
874 | fcport = sp->fcport; | ||
875 | if (time_before(jiffies, | ||
876 | fcport->last_ramp_up + ql2xqfullrampup * HZ)) | ||
877 | return; | ||
878 | if (time_before(jiffies, | ||
879 | fcport->last_queue_full + ql2xqfullrampup * HZ)) | ||
880 | return; | ||
881 | |||
882 | starget_for_each_device(sdev->sdev_target, fcport, | ||
883 | qla2x00_adjust_sdev_qdepth_up); | ||
884 | } | ||
885 | |||
886 | /** | 814 | /** |
887 | * qla2x00_process_completed_request() - Process a Fast Post response. | 815 | * qla2x00_process_completed_request() - Process a Fast Post response. |
888 | * @ha: SCSI driver HA context | 816 | * @ha: SCSI driver HA context |
@@ -913,8 +841,6 @@ qla2x00_process_completed_request(struct scsi_qla_host *vha, | |||
913 | 841 | ||
914 | /* Save ISP completion status */ | 842 | /* Save ISP completion status */ |
915 | sp->cmd->result = DID_OK << 16; | 843 | sp->cmd->result = DID_OK << 16; |
916 | |||
917 | qla2x00_ramp_up_queue_depth(vha, req, sp); | ||
918 | qla2x00_sp_compl(ha, sp); | 844 | qla2x00_sp_compl(ha, sp); |
919 | } else { | 845 | } else { |
920 | DEBUG2(printk("scsi(%ld) Req:%d: Invalid ISP SCSI completion" | 846 | DEBUG2(printk("scsi(%ld) Req:%d: Invalid ISP SCSI completion" |
@@ -1435,13 +1361,6 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) | |||
1435 | "scsi(%ld): QUEUE FULL status detected " | 1361 | "scsi(%ld): QUEUE FULL status detected " |
1436 | "0x%x-0x%x.\n", vha->host_no, comp_status, | 1362 | "0x%x-0x%x.\n", vha->host_no, comp_status, |
1437 | scsi_status)); | 1363 | scsi_status)); |
1438 | |||
1439 | /* Adjust queue depth for all luns on the port. */ | ||
1440 | if (!ql2xqfulltracking) | ||
1441 | break; | ||
1442 | fcport->last_queue_full = jiffies; | ||
1443 | starget_for_each_device(cp->device->sdev_target, | ||
1444 | fcport, qla2x00_adjust_sdev_qdepth_down); | ||
1445 | break; | 1364 | break; |
1446 | } | 1365 | } |
1447 | if (lscsi_status != SS_CHECK_CONDITION) | 1366 | if (lscsi_status != SS_CHECK_CONDITION) |
@@ -1516,17 +1435,6 @@ qla2x00_status_entry(scsi_qla_host_t *vha, struct rsp_que *rsp, void *pkt) | |||
1516 | "scsi(%ld): QUEUE FULL status detected " | 1435 | "scsi(%ld): QUEUE FULL status detected " |
1517 | "0x%x-0x%x.\n", vha->host_no, comp_status, | 1436 | "0x%x-0x%x.\n", vha->host_no, comp_status, |
1518 | scsi_status)); | 1437 | scsi_status)); |
1519 | |||
1520 | /* | ||
1521 | * Adjust queue depth for all luns on the | ||
1522 | * port. | ||
1523 | */ | ||
1524 | if (!ql2xqfulltracking) | ||
1525 | break; | ||
1526 | fcport->last_queue_full = jiffies; | ||
1527 | starget_for_each_device( | ||
1528 | cp->device->sdev_target, fcport, | ||
1529 | qla2x00_adjust_sdev_qdepth_down); | ||
1530 | break; | 1438 | break; |
1531 | } | 1439 | } |
1532 | if (lscsi_status != SS_CHECK_CONDITION) | 1440 | if (lscsi_status != SS_CHECK_CONDITION) |
@@ -2020,7 +1928,7 @@ qla24xx_msix_rsp_q(int irq, void *dev_id) | |||
2020 | 1928 | ||
2021 | vha = qla25xx_get_host(rsp); | 1929 | vha = qla25xx_get_host(rsp); |
2022 | qla24xx_process_response_queue(vha, rsp); | 1930 | qla24xx_process_response_queue(vha, rsp); |
2023 | if (!ha->mqenable) { | 1931 | if (!ha->flags.disable_msix_handshake) { |
2024 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | 1932 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); |
2025 | RD_REG_DWORD_RELAXED(®->hccr); | 1933 | RD_REG_DWORD_RELAXED(®->hccr); |
2026 | } | 1934 | } |
@@ -2034,6 +1942,7 @@ qla25xx_msix_rsp_q(int irq, void *dev_id) | |||
2034 | { | 1942 | { |
2035 | struct qla_hw_data *ha; | 1943 | struct qla_hw_data *ha; |
2036 | struct rsp_que *rsp; | 1944 | struct rsp_que *rsp; |
1945 | struct device_reg_24xx __iomem *reg; | ||
2037 | 1946 | ||
2038 | rsp = (struct rsp_que *) dev_id; | 1947 | rsp = (struct rsp_que *) dev_id; |
2039 | if (!rsp) { | 1948 | if (!rsp) { |
@@ -2043,6 +1952,14 @@ qla25xx_msix_rsp_q(int irq, void *dev_id) | |||
2043 | } | 1952 | } |
2044 | ha = rsp->hw; | 1953 | ha = rsp->hw; |
2045 | 1954 | ||
1955 | /* Clear the interrupt, if enabled, for this response queue */ | ||
1956 | if (rsp->options & ~BIT_6) { | ||
1957 | reg = &ha->iobase->isp24; | ||
1958 | spin_lock_irq(&ha->hardware_lock); | ||
1959 | WRT_REG_DWORD(®->hccr, HCCRX_CLR_RISC_INT); | ||
1960 | RD_REG_DWORD_RELAXED(®->hccr); | ||
1961 | spin_unlock_irq(&ha->hardware_lock); | ||
1962 | } | ||
2046 | queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); | 1963 | queue_work_on((int) (rsp->id - 1), ha->wq, &rsp->q_work); |
2047 | 1964 | ||
2048 | return IRQ_HANDLED; | 1965 | return IRQ_HANDLED; |
diff --git a/drivers/scsi/qla2xxx/qla_mid.c b/drivers/scsi/qla2xxx/qla_mid.c index a47d34308a3a..2a4c7f4e7b69 100644 --- a/drivers/scsi/qla2xxx/qla_mid.c +++ b/drivers/scsi/qla2xxx/qla_mid.c | |||
@@ -696,6 +696,10 @@ qla25xx_create_rsp_que(struct qla_hw_data *ha, uint16_t options, | |||
696 | /* Use alternate PCI devfn */ | 696 | /* Use alternate PCI devfn */ |
697 | if (LSB(rsp->rid)) | 697 | if (LSB(rsp->rid)) |
698 | options |= BIT_5; | 698 | options |= BIT_5; |
699 | /* Enable MSIX handshake mode on for uncapable adapters */ | ||
700 | if (!IS_MSIX_NACK_CAPABLE(ha)) | ||
701 | options |= BIT_6; | ||
702 | |||
699 | rsp->options = options; | 703 | rsp->options = options; |
700 | rsp->id = que_id; | 704 | rsp->id = que_id; |
701 | reg = ISP_QUE_REG(ha, que_id); | 705 | reg = ISP_QUE_REG(ha, que_id); |
diff --git a/drivers/scsi/qla2xxx/qla_os.c b/drivers/scsi/qla2xxx/qla_os.c index 41669357b186..2f873d237325 100644 --- a/drivers/scsi/qla2xxx/qla_os.c +++ b/drivers/scsi/qla2xxx/qla_os.c | |||
@@ -78,21 +78,6 @@ module_param(ql2xmaxqdepth, int, S_IRUGO|S_IWUSR); | |||
78 | MODULE_PARM_DESC(ql2xmaxqdepth, | 78 | MODULE_PARM_DESC(ql2xmaxqdepth, |
79 | "Maximum queue depth to report for target devices."); | 79 | "Maximum queue depth to report for target devices."); |
80 | 80 | ||
81 | int ql2xqfulltracking = 1; | ||
82 | module_param(ql2xqfulltracking, int, S_IRUGO|S_IWUSR); | ||
83 | MODULE_PARM_DESC(ql2xqfulltracking, | ||
84 | "Controls whether the driver tracks queue full status " | ||
85 | "returns and dynamically adjusts a scsi device's queue " | ||
86 | "depth. Default is 1, perform tracking. Set to 0 to " | ||
87 | "disable dynamic tracking and adjustment of queue depth."); | ||
88 | |||
89 | int ql2xqfullrampup = 120; | ||
90 | module_param(ql2xqfullrampup, int, S_IRUGO|S_IWUSR); | ||
91 | MODULE_PARM_DESC(ql2xqfullrampup, | ||
92 | "Number of seconds to wait to begin to ramp-up the queue " | ||
93 | "depth for a device after a queue-full condition has been " | ||
94 | "detected. Default is 120 seconds."); | ||
95 | |||
96 | int ql2xiidmaenable=1; | 81 | int ql2xiidmaenable=1; |
97 | module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR); | 82 | module_param(ql2xiidmaenable, int, S_IRUGO|S_IRUSR); |
98 | MODULE_PARM_DESC(ql2xiidmaenable, | 83 | MODULE_PARM_DESC(ql2xiidmaenable, |
@@ -1217,13 +1202,61 @@ qla2xxx_slave_destroy(struct scsi_device *sdev) | |||
1217 | sdev->hostdata = NULL; | 1202 | sdev->hostdata = NULL; |
1218 | } | 1203 | } |
1219 | 1204 | ||
1205 | static void qla2x00_handle_queue_full(struct scsi_device *sdev, int qdepth) | ||
1206 | { | ||
1207 | fc_port_t *fcport = (struct fc_port *) sdev->hostdata; | ||
1208 | |||
1209 | if (!scsi_track_queue_full(sdev, qdepth)) | ||
1210 | return; | ||
1211 | |||
1212 | DEBUG2(qla_printk(KERN_INFO, fcport->vha->hw, | ||
1213 | "scsi(%ld:%d:%d:%d): Queue depth adjusted-down to %d.\n", | ||
1214 | fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun, | ||
1215 | sdev->queue_depth)); | ||
1216 | } | ||
1217 | |||
1218 | static void qla2x00_adjust_sdev_qdepth_up(struct scsi_device *sdev, int qdepth) | ||
1219 | { | ||
1220 | fc_port_t *fcport = sdev->hostdata; | ||
1221 | struct scsi_qla_host *vha = fcport->vha; | ||
1222 | struct qla_hw_data *ha = vha->hw; | ||
1223 | struct req_que *req = NULL; | ||
1224 | |||
1225 | req = vha->req; | ||
1226 | if (!req) | ||
1227 | return; | ||
1228 | |||
1229 | if (req->max_q_depth <= sdev->queue_depth || req->max_q_depth < qdepth) | ||
1230 | return; | ||
1231 | |||
1232 | if (sdev->ordered_tags) | ||
1233 | scsi_adjust_queue_depth(sdev, MSG_ORDERED_TAG, qdepth); | ||
1234 | else | ||
1235 | scsi_adjust_queue_depth(sdev, MSG_SIMPLE_TAG, qdepth); | ||
1236 | |||
1237 | DEBUG2(qla_printk(KERN_INFO, ha, | ||
1238 | "scsi(%ld:%d:%d:%d): Queue depth adjusted-up to %d.\n", | ||
1239 | fcport->vha->host_no, sdev->channel, sdev->id, sdev->lun, | ||
1240 | sdev->queue_depth)); | ||
1241 | } | ||
1242 | |||
1220 | static int | 1243 | static int |
1221 | qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason) | 1244 | qla2x00_change_queue_depth(struct scsi_device *sdev, int qdepth, int reason) |
1222 | { | 1245 | { |
1223 | if (reason != SCSI_QDEPTH_DEFAULT) | 1246 | switch (reason) { |
1224 | return -EOPNOTSUPP; | 1247 | case SCSI_QDEPTH_DEFAULT: |
1248 | scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); | ||
1249 | break; | ||
1250 | case SCSI_QDEPTH_QFULL: | ||
1251 | qla2x00_handle_queue_full(sdev, qdepth); | ||
1252 | break; | ||
1253 | case SCSI_QDEPTH_RAMP_UP: | ||
1254 | qla2x00_adjust_sdev_qdepth_up(sdev, qdepth); | ||
1255 | break; | ||
1256 | default: | ||
1257 | return EOPNOTSUPP; | ||
1258 | } | ||
1225 | 1259 | ||
1226 | scsi_adjust_queue_depth(sdev, scsi_get_tag_type(sdev), qdepth); | ||
1227 | return sdev->queue_depth; | 1260 | return sdev->queue_depth; |
1228 | } | 1261 | } |
1229 | 1262 | ||
@@ -2003,13 +2036,13 @@ skip_dpc: | |||
2003 | DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n", | 2036 | DEBUG2(printk("DEBUG: detect hba %ld at address = %p\n", |
2004 | base_vha->host_no, ha)); | 2037 | base_vha->host_no, ha)); |
2005 | 2038 | ||
2006 | base_vha->flags.init_done = 1; | ||
2007 | base_vha->flags.online = 1; | ||
2008 | |||
2009 | ret = scsi_add_host(host, &pdev->dev); | 2039 | ret = scsi_add_host(host, &pdev->dev); |
2010 | if (ret) | 2040 | if (ret) |
2011 | goto probe_failed; | 2041 | goto probe_failed; |
2012 | 2042 | ||
2043 | base_vha->flags.init_done = 1; | ||
2044 | base_vha->flags.online = 1; | ||
2045 | |||
2013 | ha->isp_ops->enable_intrs(ha); | 2046 | ha->isp_ops->enable_intrs(ha); |
2014 | 2047 | ||
2015 | scsi_scan_host(host); | 2048 | scsi_scan_host(host); |
diff --git a/drivers/scsi/qla2xxx/qla_version.h b/drivers/scsi/qla2xxx/qla_version.h index 807e0dbc67fa..c482220f7eed 100644 --- a/drivers/scsi/qla2xxx/qla_version.h +++ b/drivers/scsi/qla2xxx/qla_version.h | |||
@@ -7,7 +7,7 @@ | |||
7 | /* | 7 | /* |
8 | * Driver version | 8 | * Driver version |
9 | */ | 9 | */ |
10 | #define QLA2XXX_VERSION "8.03.01-k7" | 10 | #define QLA2XXX_VERSION "8.03.01-k8" |
11 | 11 | ||
12 | #define QLA_DRIVER_MAJOR_VER 8 | 12 | #define QLA_DRIVER_MAJOR_VER 8 |
13 | #define QLA_DRIVER_MINOR_VER 3 | 13 | #define QLA_DRIVER_MINOR_VER 3 |
diff --git a/drivers/scsi/scsi_lib.c b/drivers/scsi/scsi_lib.c index e495d3813948..d8927681ec88 100644 --- a/drivers/scsi/scsi_lib.c +++ b/drivers/scsi/scsi_lib.c | |||
@@ -859,6 +859,7 @@ void scsi_io_completion(struct scsi_cmnd *cmd, unsigned int good_bytes) | |||
859 | case 0x07: /* operation in progress */ | 859 | case 0x07: /* operation in progress */ |
860 | case 0x08: /* Long write in progress */ | 860 | case 0x08: /* Long write in progress */ |
861 | case 0x09: /* self test in progress */ | 861 | case 0x09: /* self test in progress */ |
862 | case 0x14: /* space allocation in progress */ | ||
862 | action = ACTION_DELAYED_RETRY; | 863 | action = ACTION_DELAYED_RETRY; |
863 | break; | 864 | break; |
864 | default: | 865 | default: |
diff --git a/drivers/scsi/scsi_transport_fc.c b/drivers/scsi/scsi_transport_fc.c index 6531c91501be..ddfcecd5099f 100644 --- a/drivers/scsi/scsi_transport_fc.c +++ b/drivers/scsi/scsi_transport_fc.c | |||
@@ -649,11 +649,22 @@ static __init int fc_transport_init(void) | |||
649 | return error; | 649 | return error; |
650 | error = transport_class_register(&fc_vport_class); | 650 | error = transport_class_register(&fc_vport_class); |
651 | if (error) | 651 | if (error) |
652 | return error; | 652 | goto unreg_host_class; |
653 | error = transport_class_register(&fc_rport_class); | 653 | error = transport_class_register(&fc_rport_class); |
654 | if (error) | 654 | if (error) |
655 | return error; | 655 | goto unreg_vport_class; |
656 | return transport_class_register(&fc_transport_class); | 656 | error = transport_class_register(&fc_transport_class); |
657 | if (error) | ||
658 | goto unreg_rport_class; | ||
659 | return 0; | ||
660 | |||
661 | unreg_rport_class: | ||
662 | transport_class_unregister(&fc_rport_class); | ||
663 | unreg_vport_class: | ||
664 | transport_class_unregister(&fc_vport_class); | ||
665 | unreg_host_class: | ||
666 | transport_class_unregister(&fc_host_class); | ||
667 | return error; | ||
657 | } | 668 | } |
658 | 669 | ||
659 | static void __exit fc_transport_exit(void) | 670 | static void __exit fc_transport_exit(void) |
diff --git a/drivers/scsi/sd.c b/drivers/scsi/sd.c index 9093c7261f33..255da53e5a01 100644 --- a/drivers/scsi/sd.c +++ b/drivers/scsi/sd.c | |||
@@ -264,6 +264,15 @@ sd_show_app_tag_own(struct device *dev, struct device_attribute *attr, | |||
264 | return snprintf(buf, 20, "%u\n", sdkp->ATO); | 264 | return snprintf(buf, 20, "%u\n", sdkp->ATO); |
265 | } | 265 | } |
266 | 266 | ||
267 | static ssize_t | ||
268 | sd_show_thin_provisioning(struct device *dev, struct device_attribute *attr, | ||
269 | char *buf) | ||
270 | { | ||
271 | struct scsi_disk *sdkp = to_scsi_disk(dev); | ||
272 | |||
273 | return snprintf(buf, 20, "%u\n", sdkp->thin_provisioning); | ||
274 | } | ||
275 | |||
267 | static struct device_attribute sd_disk_attrs[] = { | 276 | static struct device_attribute sd_disk_attrs[] = { |
268 | __ATTR(cache_type, S_IRUGO|S_IWUSR, sd_show_cache_type, | 277 | __ATTR(cache_type, S_IRUGO|S_IWUSR, sd_show_cache_type, |
269 | sd_store_cache_type), | 278 | sd_store_cache_type), |
@@ -274,6 +283,7 @@ static struct device_attribute sd_disk_attrs[] = { | |||
274 | sd_store_manage_start_stop), | 283 | sd_store_manage_start_stop), |
275 | __ATTR(protection_type, S_IRUGO, sd_show_protection_type, NULL), | 284 | __ATTR(protection_type, S_IRUGO, sd_show_protection_type, NULL), |
276 | __ATTR(app_tag_own, S_IRUGO, sd_show_app_tag_own, NULL), | 285 | __ATTR(app_tag_own, S_IRUGO, sd_show_app_tag_own, NULL), |
286 | __ATTR(thin_provisioning, S_IRUGO, sd_show_thin_provisioning, NULL), | ||
277 | __ATTR_NULL, | 287 | __ATTR_NULL, |
278 | }; | 288 | }; |
279 | 289 | ||
@@ -399,6 +409,57 @@ static void sd_prot_op(struct scsi_cmnd *scmd, unsigned int dif) | |||
399 | } | 409 | } |
400 | 410 | ||
401 | /** | 411 | /** |
412 | * sd_prepare_discard - unmap blocks on thinly provisioned device | ||
413 | * @rq: Request to prepare | ||
414 | * | ||
415 | * Will issue either UNMAP or WRITE SAME(16) depending on preference | ||
416 | * indicated by target device. | ||
417 | **/ | ||
418 | static int sd_prepare_discard(struct request *rq) | ||
419 | { | ||
420 | struct scsi_disk *sdkp = scsi_disk(rq->rq_disk); | ||
421 | struct bio *bio = rq->bio; | ||
422 | sector_t sector = bio->bi_sector; | ||
423 | unsigned int num = bio_sectors(bio); | ||
424 | |||
425 | if (sdkp->device->sector_size == 4096) { | ||
426 | sector >>= 3; | ||
427 | num >>= 3; | ||
428 | } | ||
429 | |||
430 | rq->cmd_type = REQ_TYPE_BLOCK_PC; | ||
431 | rq->timeout = SD_TIMEOUT; | ||
432 | |||
433 | memset(rq->cmd, 0, rq->cmd_len); | ||
434 | |||
435 | if (sdkp->unmap) { | ||
436 | char *buf = kmap_atomic(bio_page(bio), KM_USER0); | ||
437 | |||
438 | rq->cmd[0] = UNMAP; | ||
439 | rq->cmd[8] = 24; | ||
440 | rq->cmd_len = 10; | ||
441 | |||
442 | /* Ensure that data length matches payload */ | ||
443 | rq->__data_len = bio->bi_size = bio->bi_io_vec->bv_len = 24; | ||
444 | |||
445 | put_unaligned_be16(6 + 16, &buf[0]); | ||
446 | put_unaligned_be16(16, &buf[2]); | ||
447 | put_unaligned_be64(sector, &buf[8]); | ||
448 | put_unaligned_be32(num, &buf[16]); | ||
449 | |||
450 | kunmap_atomic(buf, KM_USER0); | ||
451 | } else { | ||
452 | rq->cmd[0] = WRITE_SAME_16; | ||
453 | rq->cmd[1] = 0x8; /* UNMAP */ | ||
454 | put_unaligned_be64(sector, &rq->cmd[2]); | ||
455 | put_unaligned_be32(num, &rq->cmd[10]); | ||
456 | rq->cmd_len = 16; | ||
457 | } | ||
458 | |||
459 | return BLKPREP_OK; | ||
460 | } | ||
461 | |||
462 | /** | ||
402 | * sd_init_command - build a scsi (read or write) command from | 463 | * sd_init_command - build a scsi (read or write) command from |
403 | * information in the request structure. | 464 | * information in the request structure. |
404 | * @SCpnt: pointer to mid-level's per scsi command structure that | 465 | * @SCpnt: pointer to mid-level's per scsi command structure that |
@@ -418,6 +479,13 @@ static int sd_prep_fn(struct request_queue *q, struct request *rq) | |||
418 | int ret, host_dif; | 479 | int ret, host_dif; |
419 | unsigned char protect; | 480 | unsigned char protect; |
420 | 481 | ||
482 | /* | ||
483 | * Discard request come in as REQ_TYPE_FS but we turn them into | ||
484 | * block PC requests to make life easier. | ||
485 | */ | ||
486 | if (blk_discard_rq(rq)) | ||
487 | ret = sd_prepare_discard(rq); | ||
488 | |||
421 | if (rq->cmd_type == REQ_TYPE_BLOCK_PC) { | 489 | if (rq->cmd_type == REQ_TYPE_BLOCK_PC) { |
422 | ret = scsi_setup_blk_pc_cmnd(sdp, rq); | 490 | ret = scsi_setup_blk_pc_cmnd(sdp, rq); |
423 | goto out; | 491 | goto out; |
@@ -1432,6 +1500,19 @@ static int read_capacity_16(struct scsi_disk *sdkp, struct scsi_device *sdp, | |||
1432 | sd_printk(KERN_NOTICE, sdkp, | 1500 | sd_printk(KERN_NOTICE, sdkp, |
1433 | "physical block alignment offset: %u\n", alignment); | 1501 | "physical block alignment offset: %u\n", alignment); |
1434 | 1502 | ||
1503 | if (buffer[14] & 0x80) { /* TPE */ | ||
1504 | struct request_queue *q = sdp->request_queue; | ||
1505 | |||
1506 | sdkp->thin_provisioning = 1; | ||
1507 | q->limits.discard_granularity = sdkp->hw_sector_size; | ||
1508 | q->limits.max_discard_sectors = 0xffffffff; | ||
1509 | |||
1510 | if (buffer[14] & 0x40) /* TPRZ */ | ||
1511 | q->limits.discard_zeroes_data = 1; | ||
1512 | |||
1513 | queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, q); | ||
1514 | } | ||
1515 | |||
1435 | sdkp->capacity = lba + 1; | 1516 | sdkp->capacity = lba + 1; |
1436 | return sector_size; | 1517 | return sector_size; |
1437 | } | 1518 | } |
@@ -1863,6 +1944,7 @@ void sd_read_app_tag_own(struct scsi_disk *sdkp, unsigned char *buffer) | |||
1863 | */ | 1944 | */ |
1864 | static void sd_read_block_limits(struct scsi_disk *sdkp) | 1945 | static void sd_read_block_limits(struct scsi_disk *sdkp) |
1865 | { | 1946 | { |
1947 | struct request_queue *q = sdkp->disk->queue; | ||
1866 | unsigned int sector_sz = sdkp->device->sector_size; | 1948 | unsigned int sector_sz = sdkp->device->sector_size; |
1867 | char *buffer; | 1949 | char *buffer; |
1868 | 1950 | ||
@@ -1877,6 +1959,31 @@ static void sd_read_block_limits(struct scsi_disk *sdkp) | |||
1877 | blk_queue_io_opt(sdkp->disk->queue, | 1959 | blk_queue_io_opt(sdkp->disk->queue, |
1878 | get_unaligned_be32(&buffer[12]) * sector_sz); | 1960 | get_unaligned_be32(&buffer[12]) * sector_sz); |
1879 | 1961 | ||
1962 | /* Thin provisioning enabled and page length indicates TP support */ | ||
1963 | if (sdkp->thin_provisioning && buffer[3] == 0x3c) { | ||
1964 | unsigned int lba_count, desc_count, granularity; | ||
1965 | |||
1966 | lba_count = get_unaligned_be32(&buffer[20]); | ||
1967 | desc_count = get_unaligned_be32(&buffer[24]); | ||
1968 | |||
1969 | if (lba_count) { | ||
1970 | q->limits.max_discard_sectors = | ||
1971 | lba_count * sector_sz >> 9; | ||
1972 | |||
1973 | if (desc_count) | ||
1974 | sdkp->unmap = 1; | ||
1975 | } | ||
1976 | |||
1977 | granularity = get_unaligned_be32(&buffer[28]); | ||
1978 | |||
1979 | if (granularity) | ||
1980 | q->limits.discard_granularity = granularity * sector_sz; | ||
1981 | |||
1982 | if (buffer[32] & 0x80) | ||
1983 | q->limits.discard_alignment = | ||
1984 | get_unaligned_be32(&buffer[32]) & ~(1 << 31); | ||
1985 | } | ||
1986 | |||
1880 | kfree(buffer); | 1987 | kfree(buffer); |
1881 | } | 1988 | } |
1882 | 1989 | ||
diff --git a/drivers/scsi/sd.h b/drivers/scsi/sd.h index e374804d26fb..43d3caf268ef 100644 --- a/drivers/scsi/sd.h +++ b/drivers/scsi/sd.h | |||
@@ -60,6 +60,8 @@ struct scsi_disk { | |||
60 | unsigned RCD : 1; /* state of disk RCD bit, unused */ | 60 | unsigned RCD : 1; /* state of disk RCD bit, unused */ |
61 | unsigned DPOFUA : 1; /* state of disk DPOFUA bit */ | 61 | unsigned DPOFUA : 1; /* state of disk DPOFUA bit */ |
62 | unsigned first_scan : 1; | 62 | unsigned first_scan : 1; |
63 | unsigned thin_provisioning : 1; | ||
64 | unsigned unmap : 1; | ||
63 | }; | 65 | }; |
64 | #define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev) | 66 | #define to_scsi_disk(obj) container_of(obj,struct scsi_disk,dev) |
65 | 67 | ||
diff --git a/drivers/scsi/st.c b/drivers/scsi/st.c index ad59abb47722..d04ea9a6f673 100644 --- a/drivers/scsi/st.c +++ b/drivers/scsi/st.c | |||
@@ -552,13 +552,15 @@ st_do_scsi(struct st_request * SRpnt, struct scsi_tape * STp, unsigned char *cmd | |||
552 | SRpnt->waiting = waiting; | 552 | SRpnt->waiting = waiting; |
553 | 553 | ||
554 | if (STp->buffer->do_dio) { | 554 | if (STp->buffer->do_dio) { |
555 | mdata->page_order = 0; | ||
555 | mdata->nr_entries = STp->buffer->sg_segs; | 556 | mdata->nr_entries = STp->buffer->sg_segs; |
556 | mdata->pages = STp->buffer->mapped_pages; | 557 | mdata->pages = STp->buffer->mapped_pages; |
557 | } else { | 558 | } else { |
559 | mdata->page_order = STp->buffer->reserved_page_order; | ||
558 | mdata->nr_entries = | 560 | mdata->nr_entries = |
559 | DIV_ROUND_UP(bytes, PAGE_SIZE << mdata->page_order); | 561 | DIV_ROUND_UP(bytes, PAGE_SIZE << mdata->page_order); |
560 | STp->buffer->map_data.pages = STp->buffer->reserved_pages; | 562 | mdata->pages = STp->buffer->reserved_pages; |
561 | STp->buffer->map_data.offset = 0; | 563 | mdata->offset = 0; |
562 | } | 564 | } |
563 | 565 | ||
564 | memcpy(SRpnt->cmd, cmd, sizeof(SRpnt->cmd)); | 566 | memcpy(SRpnt->cmd, cmd, sizeof(SRpnt->cmd)); |
@@ -3719,7 +3721,7 @@ static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dm | |||
3719 | priority |= __GFP_ZERO; | 3721 | priority |= __GFP_ZERO; |
3720 | 3722 | ||
3721 | if (STbuffer->frp_segs) { | 3723 | if (STbuffer->frp_segs) { |
3722 | order = STbuffer->map_data.page_order; | 3724 | order = STbuffer->reserved_page_order; |
3723 | b_size = PAGE_SIZE << order; | 3725 | b_size = PAGE_SIZE << order; |
3724 | } else { | 3726 | } else { |
3725 | for (b_size = PAGE_SIZE, order = 0; | 3727 | for (b_size = PAGE_SIZE, order = 0; |
@@ -3752,7 +3754,7 @@ static int enlarge_buffer(struct st_buffer * STbuffer, int new_size, int need_dm | |||
3752 | segs++; | 3754 | segs++; |
3753 | } | 3755 | } |
3754 | STbuffer->b_data = page_address(STbuffer->reserved_pages[0]); | 3756 | STbuffer->b_data = page_address(STbuffer->reserved_pages[0]); |
3755 | STbuffer->map_data.page_order = order; | 3757 | STbuffer->reserved_page_order = order; |
3756 | 3758 | ||
3757 | return 1; | 3759 | return 1; |
3758 | } | 3760 | } |
@@ -3765,7 +3767,7 @@ static void clear_buffer(struct st_buffer * st_bp) | |||
3765 | 3767 | ||
3766 | for (i=0; i < st_bp->frp_segs; i++) | 3768 | for (i=0; i < st_bp->frp_segs; i++) |
3767 | memset(page_address(st_bp->reserved_pages[i]), 0, | 3769 | memset(page_address(st_bp->reserved_pages[i]), 0, |
3768 | PAGE_SIZE << st_bp->map_data.page_order); | 3770 | PAGE_SIZE << st_bp->reserved_page_order); |
3769 | st_bp->cleared = 1; | 3771 | st_bp->cleared = 1; |
3770 | } | 3772 | } |
3771 | 3773 | ||
@@ -3773,7 +3775,7 @@ static void clear_buffer(struct st_buffer * st_bp) | |||
3773 | /* Release the extra buffer */ | 3775 | /* Release the extra buffer */ |
3774 | static void normalize_buffer(struct st_buffer * STbuffer) | 3776 | static void normalize_buffer(struct st_buffer * STbuffer) |
3775 | { | 3777 | { |
3776 | int i, order = STbuffer->map_data.page_order; | 3778 | int i, order = STbuffer->reserved_page_order; |
3777 | 3779 | ||
3778 | for (i = 0; i < STbuffer->frp_segs; i++) { | 3780 | for (i = 0; i < STbuffer->frp_segs; i++) { |
3779 | __free_pages(STbuffer->reserved_pages[i], order); | 3781 | __free_pages(STbuffer->reserved_pages[i], order); |
@@ -3781,7 +3783,7 @@ static void normalize_buffer(struct st_buffer * STbuffer) | |||
3781 | } | 3783 | } |
3782 | STbuffer->frp_segs = 0; | 3784 | STbuffer->frp_segs = 0; |
3783 | STbuffer->sg_segs = 0; | 3785 | STbuffer->sg_segs = 0; |
3784 | STbuffer->map_data.page_order = 0; | 3786 | STbuffer->reserved_page_order = 0; |
3785 | STbuffer->map_data.offset = 0; | 3787 | STbuffer->map_data.offset = 0; |
3786 | } | 3788 | } |
3787 | 3789 | ||
@@ -3791,7 +3793,7 @@ static void normalize_buffer(struct st_buffer * STbuffer) | |||
3791 | static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, int do_count) | 3793 | static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, int do_count) |
3792 | { | 3794 | { |
3793 | int i, cnt, res, offset; | 3795 | int i, cnt, res, offset; |
3794 | int length = PAGE_SIZE << st_bp->map_data.page_order; | 3796 | int length = PAGE_SIZE << st_bp->reserved_page_order; |
3795 | 3797 | ||
3796 | for (i = 0, offset = st_bp->buffer_bytes; | 3798 | for (i = 0, offset = st_bp->buffer_bytes; |
3797 | i < st_bp->frp_segs && offset >= length; i++) | 3799 | i < st_bp->frp_segs && offset >= length; i++) |
@@ -3823,7 +3825,7 @@ static int append_to_buffer(const char __user *ubp, struct st_buffer * st_bp, in | |||
3823 | static int from_buffer(struct st_buffer * st_bp, char __user *ubp, int do_count) | 3825 | static int from_buffer(struct st_buffer * st_bp, char __user *ubp, int do_count) |
3824 | { | 3826 | { |
3825 | int i, cnt, res, offset; | 3827 | int i, cnt, res, offset; |
3826 | int length = PAGE_SIZE << st_bp->map_data.page_order; | 3828 | int length = PAGE_SIZE << st_bp->reserved_page_order; |
3827 | 3829 | ||
3828 | for (i = 0, offset = st_bp->read_pointer; | 3830 | for (i = 0, offset = st_bp->read_pointer; |
3829 | i < st_bp->frp_segs && offset >= length; i++) | 3831 | i < st_bp->frp_segs && offset >= length; i++) |
@@ -3856,7 +3858,7 @@ static void move_buffer_data(struct st_buffer * st_bp, int offset) | |||
3856 | { | 3858 | { |
3857 | int src_seg, dst_seg, src_offset = 0, dst_offset; | 3859 | int src_seg, dst_seg, src_offset = 0, dst_offset; |
3858 | int count, total; | 3860 | int count, total; |
3859 | int length = PAGE_SIZE << st_bp->map_data.page_order; | 3861 | int length = PAGE_SIZE << st_bp->reserved_page_order; |
3860 | 3862 | ||
3861 | if (offset == 0) | 3863 | if (offset == 0) |
3862 | return; | 3864 | return; |
@@ -4578,7 +4580,6 @@ static int sgl_map_user_pages(struct st_buffer *STbp, | |||
4578 | } | 4580 | } |
4579 | 4581 | ||
4580 | mdata->offset = uaddr & ~PAGE_MASK; | 4582 | mdata->offset = uaddr & ~PAGE_MASK; |
4581 | mdata->page_order = 0; | ||
4582 | STbp->mapped_pages = pages; | 4583 | STbp->mapped_pages = pages; |
4583 | 4584 | ||
4584 | return nr_pages; | 4585 | return nr_pages; |
diff --git a/drivers/scsi/st.h b/drivers/scsi/st.h index 544dc6b1f548..f91a67c6d968 100644 --- a/drivers/scsi/st.h +++ b/drivers/scsi/st.h | |||
@@ -46,6 +46,7 @@ struct st_buffer { | |||
46 | struct st_request *last_SRpnt; | 46 | struct st_request *last_SRpnt; |
47 | struct st_cmdstatus cmdstat; | 47 | struct st_cmdstatus cmdstat; |
48 | struct page **reserved_pages; | 48 | struct page **reserved_pages; |
49 | int reserved_page_order; | ||
49 | struct page **mapped_pages; | 50 | struct page **mapped_pages; |
50 | struct rq_map_data map_data; | 51 | struct rq_map_data map_data; |
51 | unsigned char *b_data; | 52 | unsigned char *b_data; |
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 2d9d70359360..f55eb0107336 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig | |||
@@ -216,6 +216,17 @@ config SPI_S3C24XX | |||
216 | help | 216 | help |
217 | SPI driver for Samsung S3C24XX series ARM SoCs | 217 | SPI driver for Samsung S3C24XX series ARM SoCs |
218 | 218 | ||
219 | config SPI_S3C24XX_FIQ | ||
220 | bool "S3C24XX driver with FIQ pseudo-DMA" | ||
221 | depends on SPI_S3C24XX | ||
222 | select FIQ | ||
223 | help | ||
224 | Enable FIQ support for the S3C24XX SPI driver to provide pseudo | ||
225 | DMA by using the fast-interrupt request framework, This allows | ||
226 | the driver to get DMA-like performance when there are either | ||
227 | no free DMA channels, or when doing transfers that required both | ||
228 | TX and RX data paths. | ||
229 | |||
219 | config SPI_S3C24XX_GPIO | 230 | config SPI_S3C24XX_GPIO |
220 | tristate "Samsung S3C24XX series SPI by GPIO" | 231 | tristate "Samsung S3C24XX series SPI by GPIO" |
221 | depends on ARCH_S3C2410 && EXPERIMENTAL | 232 | depends on ARCH_S3C2410 && EXPERIMENTAL |
@@ -226,6 +237,13 @@ config SPI_S3C24XX_GPIO | |||
226 | the inbuilt hardware cannot provide the transfer mode, or | 237 | the inbuilt hardware cannot provide the transfer mode, or |
227 | where the board is using non hardware connected pins. | 238 | where the board is using non hardware connected pins. |
228 | 239 | ||
240 | config SPI_S3C64XX | ||
241 | tristate "Samsung S3C64XX series type SPI" | ||
242 | depends on ARCH_S3C64XX && EXPERIMENTAL | ||
243 | select S3C64XX_DMA | ||
244 | help | ||
245 | SPI driver for Samsung S3C64XX and newer SoCs. | ||
246 | |||
229 | config SPI_SH_MSIOF | 247 | config SPI_SH_MSIOF |
230 | tristate "SuperH MSIOF SPI controller" | 248 | tristate "SuperH MSIOF SPI controller" |
231 | depends on SUPERH && HAVE_CLK | 249 | depends on SUPERH && HAVE_CLK |
@@ -289,6 +307,16 @@ config SPI_NUC900 | |||
289 | # Add new SPI master controllers in alphabetical order above this line | 307 | # Add new SPI master controllers in alphabetical order above this line |
290 | # | 308 | # |
291 | 309 | ||
310 | config SPI_DESIGNWARE | ||
311 | bool "DesignWare SPI controller core support" | ||
312 | depends on SPI_MASTER | ||
313 | help | ||
314 | general driver for SPI controller core from DesignWare | ||
315 | |||
316 | config SPI_DW_PCI | ||
317 | tristate "PCI interface driver for DW SPI core" | ||
318 | depends on SPI_DESIGNWARE && PCI | ||
319 | |||
292 | # | 320 | # |
293 | # There are lots of SPI device types, with sensors and memory | 321 | # There are lots of SPI device types, with sensors and memory |
294 | # being probably the most widely used ones. | 322 | # being probably the most widely used ones. |
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index ed8c1675b52f..f3d2810ba11c 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile | |||
@@ -16,6 +16,8 @@ obj-$(CONFIG_SPI_BFIN) += spi_bfin5xx.o | |||
16 | obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o | 16 | obj-$(CONFIG_SPI_BITBANG) += spi_bitbang.o |
17 | obj-$(CONFIG_SPI_AU1550) += au1550_spi.o | 17 | obj-$(CONFIG_SPI_AU1550) += au1550_spi.o |
18 | obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o | 18 | obj-$(CONFIG_SPI_BUTTERFLY) += spi_butterfly.o |
19 | obj-$(CONFIG_SPI_DESIGNWARE) += dw_spi.o | ||
20 | obj-$(CONFIG_SPI_DW_PCI) += dw_spi_pci.o | ||
19 | obj-$(CONFIG_SPI_GPIO) += spi_gpio.o | 21 | obj-$(CONFIG_SPI_GPIO) += spi_gpio.o |
20 | obj-$(CONFIG_SPI_IMX) += spi_imx.o | 22 | obj-$(CONFIG_SPI_IMX) += spi_imx.o |
21 | obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o | 23 | obj-$(CONFIG_SPI_LM70_LLP) += spi_lm70llp.o |
@@ -30,7 +32,8 @@ obj-$(CONFIG_SPI_MPC52xx) += mpc52xx_spi.o | |||
30 | obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o | 32 | obj-$(CONFIG_SPI_MPC8xxx) += spi_mpc8xxx.o |
31 | obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o | 33 | obj-$(CONFIG_SPI_PPC4xx) += spi_ppc4xx.o |
32 | obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o | 34 | obj-$(CONFIG_SPI_S3C24XX_GPIO) += spi_s3c24xx_gpio.o |
33 | obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx.o | 35 | obj-$(CONFIG_SPI_S3C24XX) += spi_s3c24xx_hw.o |
36 | obj-$(CONFIG_SPI_S3C64XX) += spi_s3c64xx.o | ||
34 | obj-$(CONFIG_SPI_TXX9) += spi_txx9.o | 37 | obj-$(CONFIG_SPI_TXX9) += spi_txx9.o |
35 | obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o | 38 | obj-$(CONFIG_SPI_XILINX) += xilinx_spi.o |
36 | obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o | 39 | obj-$(CONFIG_SPI_XILINX_OF) += xilinx_spi_of.o |
@@ -39,6 +42,11 @@ obj-$(CONFIG_SPI_SH_SCI) += spi_sh_sci.o | |||
39 | obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o | 42 | obj-$(CONFIG_SPI_SH_MSIOF) += spi_sh_msiof.o |
40 | obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o | 43 | obj-$(CONFIG_SPI_STMP3XXX) += spi_stmp.o |
41 | obj-$(CONFIG_SPI_NUC900) += spi_nuc900.o | 44 | obj-$(CONFIG_SPI_NUC900) += spi_nuc900.o |
45 | |||
46 | # special build for s3c24xx spi driver with fiq support | ||
47 | spi_s3c24xx_hw-y := spi_s3c24xx.o | ||
48 | spi_s3c24xx_hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi_s3c24xx_fiq.o | ||
49 | |||
42 | # ... add above this line ... | 50 | # ... add above this line ... |
43 | 51 | ||
44 | # SPI protocol drivers (device/link on bus) | 52 | # SPI protocol drivers (device/link on bus) |
diff --git a/drivers/spi/atmel_spi.c b/drivers/spi/atmel_spi.c index f5b3fdbb1e27..d21c24eaf0a9 100644 --- a/drivers/spi/atmel_spi.c +++ b/drivers/spi/atmel_spi.c | |||
@@ -189,14 +189,14 @@ static void atmel_spi_next_xfer_data(struct spi_master *master, | |||
189 | 189 | ||
190 | /* use scratch buffer only when rx or tx data is unspecified */ | 190 | /* use scratch buffer only when rx or tx data is unspecified */ |
191 | if (xfer->rx_buf) | 191 | if (xfer->rx_buf) |
192 | *rx_dma = xfer->rx_dma + xfer->len - len; | 192 | *rx_dma = xfer->rx_dma + xfer->len - *plen; |
193 | else { | 193 | else { |
194 | *rx_dma = as->buffer_dma; | 194 | *rx_dma = as->buffer_dma; |
195 | if (len > BUFFER_SIZE) | 195 | if (len > BUFFER_SIZE) |
196 | len = BUFFER_SIZE; | 196 | len = BUFFER_SIZE; |
197 | } | 197 | } |
198 | if (xfer->tx_buf) | 198 | if (xfer->tx_buf) |
199 | *tx_dma = xfer->tx_dma + xfer->len - len; | 199 | *tx_dma = xfer->tx_dma + xfer->len - *plen; |
200 | else { | 200 | else { |
201 | *tx_dma = as->buffer_dma; | 201 | *tx_dma = as->buffer_dma; |
202 | if (len > BUFFER_SIZE) | 202 | if (len > BUFFER_SIZE) |
@@ -788,7 +788,7 @@ static int __init atmel_spi_probe(struct platform_device *pdev) | |||
788 | spin_lock_init(&as->lock); | 788 | spin_lock_init(&as->lock); |
789 | INIT_LIST_HEAD(&as->queue); | 789 | INIT_LIST_HEAD(&as->queue); |
790 | as->pdev = pdev; | 790 | as->pdev = pdev; |
791 | as->regs = ioremap(regs->start, (regs->end - regs->start) + 1); | 791 | as->regs = ioremap(regs->start, resource_size(regs)); |
792 | if (!as->regs) | 792 | if (!as->regs) |
793 | goto out_free_buffer; | 793 | goto out_free_buffer; |
794 | as->irq = irq; | 794 | as->irq = irq; |
diff --git a/drivers/spi/dw_spi.c b/drivers/spi/dw_spi.c new file mode 100644 index 000000000000..31620fae77be --- /dev/null +++ b/drivers/spi/dw_spi.c | |||
@@ -0,0 +1,944 @@ | |||
1 | /* | ||
2 | * dw_spi.c - Designware SPI core controller driver (refer pxa2xx_spi.c) | ||
3 | * | ||
4 | * Copyright (c) 2009, Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along with | ||
16 | * this program; if not, write to the Free Software Foundation, Inc., | ||
17 | * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | */ | ||
19 | |||
20 | #include <linux/dma-mapping.h> | ||
21 | #include <linux/interrupt.h> | ||
22 | #include <linux/highmem.h> | ||
23 | #include <linux/delay.h> | ||
24 | |||
25 | #include <linux/spi/dw_spi.h> | ||
26 | #include <linux/spi/spi.h> | ||
27 | |||
28 | #ifdef CONFIG_DEBUG_FS | ||
29 | #include <linux/debugfs.h> | ||
30 | #endif | ||
31 | |||
32 | #define START_STATE ((void *)0) | ||
33 | #define RUNNING_STATE ((void *)1) | ||
34 | #define DONE_STATE ((void *)2) | ||
35 | #define ERROR_STATE ((void *)-1) | ||
36 | |||
37 | #define QUEUE_RUNNING 0 | ||
38 | #define QUEUE_STOPPED 1 | ||
39 | |||
40 | #define MRST_SPI_DEASSERT 0 | ||
41 | #define MRST_SPI_ASSERT 1 | ||
42 | |||
43 | /* Slave spi_dev related */ | ||
44 | struct chip_data { | ||
45 | u16 cr0; | ||
46 | u8 cs; /* chip select pin */ | ||
47 | u8 n_bytes; /* current is a 1/2/4 byte op */ | ||
48 | u8 tmode; /* TR/TO/RO/EEPROM */ | ||
49 | u8 type; /* SPI/SSP/MicroWire */ | ||
50 | |||
51 | u8 poll_mode; /* 1 means use poll mode */ | ||
52 | |||
53 | u32 dma_width; | ||
54 | u32 rx_threshold; | ||
55 | u32 tx_threshold; | ||
56 | u8 enable_dma; | ||
57 | u8 bits_per_word; | ||
58 | u16 clk_div; /* baud rate divider */ | ||
59 | u32 speed_hz; /* baud rate */ | ||
60 | int (*write)(struct dw_spi *dws); | ||
61 | int (*read)(struct dw_spi *dws); | ||
62 | void (*cs_control)(u32 command); | ||
63 | }; | ||
64 | |||
65 | #ifdef CONFIG_DEBUG_FS | ||
66 | static int spi_show_regs_open(struct inode *inode, struct file *file) | ||
67 | { | ||
68 | file->private_data = inode->i_private; | ||
69 | return 0; | ||
70 | } | ||
71 | |||
72 | #define SPI_REGS_BUFSIZE 1024 | ||
73 | static ssize_t spi_show_regs(struct file *file, char __user *user_buf, | ||
74 | size_t count, loff_t *ppos) | ||
75 | { | ||
76 | struct dw_spi *dws; | ||
77 | char *buf; | ||
78 | u32 len = 0; | ||
79 | ssize_t ret; | ||
80 | |||
81 | dws = file->private_data; | ||
82 | |||
83 | buf = kzalloc(SPI_REGS_BUFSIZE, GFP_KERNEL); | ||
84 | if (!buf) | ||
85 | return 0; | ||
86 | |||
87 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
88 | "MRST SPI0 registers:\n"); | ||
89 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
90 | "=================================\n"); | ||
91 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
92 | "CTRL0: \t\t0x%08x\n", dw_readl(dws, ctrl0)); | ||
93 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
94 | "CTRL1: \t\t0x%08x\n", dw_readl(dws, ctrl1)); | ||
95 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
96 | "SSIENR: \t0x%08x\n", dw_readl(dws, ssienr)); | ||
97 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
98 | "SER: \t\t0x%08x\n", dw_readl(dws, ser)); | ||
99 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
100 | "BAUDR: \t\t0x%08x\n", dw_readl(dws, baudr)); | ||
101 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
102 | "TXFTLR: \t0x%08x\n", dw_readl(dws, txfltr)); | ||
103 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
104 | "RXFTLR: \t0x%08x\n", dw_readl(dws, rxfltr)); | ||
105 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
106 | "TXFLR: \t\t0x%08x\n", dw_readl(dws, txflr)); | ||
107 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
108 | "RXFLR: \t\t0x%08x\n", dw_readl(dws, rxflr)); | ||
109 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
110 | "SR: \t\t0x%08x\n", dw_readl(dws, sr)); | ||
111 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
112 | "IMR: \t\t0x%08x\n", dw_readl(dws, imr)); | ||
113 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
114 | "ISR: \t\t0x%08x\n", dw_readl(dws, isr)); | ||
115 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
116 | "DMACR: \t\t0x%08x\n", dw_readl(dws, dmacr)); | ||
117 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
118 | "DMATDLR: \t0x%08x\n", dw_readl(dws, dmatdlr)); | ||
119 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
120 | "DMARDLR: \t0x%08x\n", dw_readl(dws, dmardlr)); | ||
121 | len += snprintf(buf + len, SPI_REGS_BUFSIZE - len, | ||
122 | "=================================\n"); | ||
123 | |||
124 | ret = simple_read_from_buffer(user_buf, count, ppos, buf, len); | ||
125 | kfree(buf); | ||
126 | return ret; | ||
127 | } | ||
128 | |||
129 | static const struct file_operations mrst_spi_regs_ops = { | ||
130 | .owner = THIS_MODULE, | ||
131 | .open = spi_show_regs_open, | ||
132 | .read = spi_show_regs, | ||
133 | }; | ||
134 | |||
135 | static int mrst_spi_debugfs_init(struct dw_spi *dws) | ||
136 | { | ||
137 | dws->debugfs = debugfs_create_dir("mrst_spi", NULL); | ||
138 | if (!dws->debugfs) | ||
139 | return -ENOMEM; | ||
140 | |||
141 | debugfs_create_file("registers", S_IFREG | S_IRUGO, | ||
142 | dws->debugfs, (void *)dws, &mrst_spi_regs_ops); | ||
143 | return 0; | ||
144 | } | ||
145 | |||
146 | static void mrst_spi_debugfs_remove(struct dw_spi *dws) | ||
147 | { | ||
148 | if (dws->debugfs) | ||
149 | debugfs_remove_recursive(dws->debugfs); | ||
150 | } | ||
151 | |||
152 | #else | ||
153 | static inline int mrst_spi_debugfs_init(struct dw_spi *dws) | ||
154 | { | ||
155 | } | ||
156 | |||
157 | static inline void mrst_spi_debugfs_remove(struct dw_spi *dws) | ||
158 | { | ||
159 | } | ||
160 | #endif /* CONFIG_DEBUG_FS */ | ||
161 | |||
162 | static void wait_till_not_busy(struct dw_spi *dws) | ||
163 | { | ||
164 | unsigned long end = jiffies + usecs_to_jiffies(1000); | ||
165 | |||
166 | while (time_before(jiffies, end)) { | ||
167 | if (!(dw_readw(dws, sr) & SR_BUSY)) | ||
168 | return; | ||
169 | } | ||
170 | dev_err(&dws->master->dev, | ||
171 | "DW SPI: Stutus keeps busy for 1000us after a read/write!\n"); | ||
172 | } | ||
173 | |||
174 | static void flush(struct dw_spi *dws) | ||
175 | { | ||
176 | while (dw_readw(dws, sr) & SR_RF_NOT_EMPT) | ||
177 | dw_readw(dws, dr); | ||
178 | |||
179 | wait_till_not_busy(dws); | ||
180 | } | ||
181 | |||
182 | static void null_cs_control(u32 command) | ||
183 | { | ||
184 | } | ||
185 | |||
186 | static int null_writer(struct dw_spi *dws) | ||
187 | { | ||
188 | u8 n_bytes = dws->n_bytes; | ||
189 | |||
190 | if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL) | ||
191 | || (dws->tx == dws->tx_end)) | ||
192 | return 0; | ||
193 | dw_writew(dws, dr, 0); | ||
194 | dws->tx += n_bytes; | ||
195 | |||
196 | wait_till_not_busy(dws); | ||
197 | return 1; | ||
198 | } | ||
199 | |||
200 | static int null_reader(struct dw_spi *dws) | ||
201 | { | ||
202 | u8 n_bytes = dws->n_bytes; | ||
203 | |||
204 | while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT) | ||
205 | && (dws->rx < dws->rx_end)) { | ||
206 | dw_readw(dws, dr); | ||
207 | dws->rx += n_bytes; | ||
208 | } | ||
209 | wait_till_not_busy(dws); | ||
210 | return dws->rx == dws->rx_end; | ||
211 | } | ||
212 | |||
213 | static int u8_writer(struct dw_spi *dws) | ||
214 | { | ||
215 | if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL) | ||
216 | || (dws->tx == dws->tx_end)) | ||
217 | return 0; | ||
218 | |||
219 | dw_writew(dws, dr, *(u8 *)(dws->tx)); | ||
220 | ++dws->tx; | ||
221 | |||
222 | wait_till_not_busy(dws); | ||
223 | return 1; | ||
224 | } | ||
225 | |||
226 | static int u8_reader(struct dw_spi *dws) | ||
227 | { | ||
228 | while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT) | ||
229 | && (dws->rx < dws->rx_end)) { | ||
230 | *(u8 *)(dws->rx) = dw_readw(dws, dr); | ||
231 | ++dws->rx; | ||
232 | } | ||
233 | |||
234 | wait_till_not_busy(dws); | ||
235 | return dws->rx == dws->rx_end; | ||
236 | } | ||
237 | |||
238 | static int u16_writer(struct dw_spi *dws) | ||
239 | { | ||
240 | if (!(dw_readw(dws, sr) & SR_TF_NOT_FULL) | ||
241 | || (dws->tx == dws->tx_end)) | ||
242 | return 0; | ||
243 | |||
244 | dw_writew(dws, dr, *(u16 *)(dws->tx)); | ||
245 | dws->tx += 2; | ||
246 | |||
247 | wait_till_not_busy(dws); | ||
248 | return 1; | ||
249 | } | ||
250 | |||
251 | static int u16_reader(struct dw_spi *dws) | ||
252 | { | ||
253 | u16 temp; | ||
254 | |||
255 | while ((dw_readw(dws, sr) & SR_RF_NOT_EMPT) | ||
256 | && (dws->rx < dws->rx_end)) { | ||
257 | temp = dw_readw(dws, dr); | ||
258 | *(u16 *)(dws->rx) = temp; | ||
259 | dws->rx += 2; | ||
260 | } | ||
261 | |||
262 | wait_till_not_busy(dws); | ||
263 | return dws->rx == dws->rx_end; | ||
264 | } | ||
265 | |||
266 | static void *next_transfer(struct dw_spi *dws) | ||
267 | { | ||
268 | struct spi_message *msg = dws->cur_msg; | ||
269 | struct spi_transfer *trans = dws->cur_transfer; | ||
270 | |||
271 | /* Move to next transfer */ | ||
272 | if (trans->transfer_list.next != &msg->transfers) { | ||
273 | dws->cur_transfer = | ||
274 | list_entry(trans->transfer_list.next, | ||
275 | struct spi_transfer, | ||
276 | transfer_list); | ||
277 | return RUNNING_STATE; | ||
278 | } else | ||
279 | return DONE_STATE; | ||
280 | } | ||
281 | |||
282 | /* | ||
283 | * Note: first step is the protocol driver prepares | ||
284 | * a dma-capable memory, and this func just need translate | ||
285 | * the virt addr to physical | ||
286 | */ | ||
287 | static int map_dma_buffers(struct dw_spi *dws) | ||
288 | { | ||
289 | if (!dws->cur_msg->is_dma_mapped || !dws->dma_inited | ||
290 | || !dws->cur_chip->enable_dma) | ||
291 | return 0; | ||
292 | |||
293 | if (dws->cur_transfer->tx_dma) | ||
294 | dws->tx_dma = dws->cur_transfer->tx_dma; | ||
295 | |||
296 | if (dws->cur_transfer->rx_dma) | ||
297 | dws->rx_dma = dws->cur_transfer->rx_dma; | ||
298 | |||
299 | return 1; | ||
300 | } | ||
301 | |||
302 | /* Caller already set message->status; dma and pio irqs are blocked */ | ||
303 | static void giveback(struct dw_spi *dws) | ||
304 | { | ||
305 | struct spi_transfer *last_transfer; | ||
306 | unsigned long flags; | ||
307 | struct spi_message *msg; | ||
308 | |||
309 | spin_lock_irqsave(&dws->lock, flags); | ||
310 | msg = dws->cur_msg; | ||
311 | dws->cur_msg = NULL; | ||
312 | dws->cur_transfer = NULL; | ||
313 | dws->prev_chip = dws->cur_chip; | ||
314 | dws->cur_chip = NULL; | ||
315 | dws->dma_mapped = 0; | ||
316 | queue_work(dws->workqueue, &dws->pump_messages); | ||
317 | spin_unlock_irqrestore(&dws->lock, flags); | ||
318 | |||
319 | last_transfer = list_entry(msg->transfers.prev, | ||
320 | struct spi_transfer, | ||
321 | transfer_list); | ||
322 | |||
323 | if (!last_transfer->cs_change) | ||
324 | dws->cs_control(MRST_SPI_DEASSERT); | ||
325 | |||
326 | msg->state = NULL; | ||
327 | if (msg->complete) | ||
328 | msg->complete(msg->context); | ||
329 | } | ||
330 | |||
331 | static void int_error_stop(struct dw_spi *dws, const char *msg) | ||
332 | { | ||
333 | /* Stop and reset hw */ | ||
334 | flush(dws); | ||
335 | spi_enable_chip(dws, 0); | ||
336 | |||
337 | dev_err(&dws->master->dev, "%s\n", msg); | ||
338 | dws->cur_msg->state = ERROR_STATE; | ||
339 | tasklet_schedule(&dws->pump_transfers); | ||
340 | } | ||
341 | |||
342 | static void transfer_complete(struct dw_spi *dws) | ||
343 | { | ||
344 | /* Update total byte transfered return count actual bytes read */ | ||
345 | dws->cur_msg->actual_length += dws->len; | ||
346 | |||
347 | /* Move to next transfer */ | ||
348 | dws->cur_msg->state = next_transfer(dws); | ||
349 | |||
350 | /* Handle end of message */ | ||
351 | if (dws->cur_msg->state == DONE_STATE) { | ||
352 | dws->cur_msg->status = 0; | ||
353 | giveback(dws); | ||
354 | } else | ||
355 | tasklet_schedule(&dws->pump_transfers); | ||
356 | } | ||
357 | |||
358 | static irqreturn_t interrupt_transfer(struct dw_spi *dws) | ||
359 | { | ||
360 | u16 irq_status, irq_mask = 0x3f; | ||
361 | |||
362 | irq_status = dw_readw(dws, isr) & irq_mask; | ||
363 | /* Error handling */ | ||
364 | if (irq_status & (SPI_INT_TXOI | SPI_INT_RXOI | SPI_INT_RXUI)) { | ||
365 | dw_readw(dws, txoicr); | ||
366 | dw_readw(dws, rxoicr); | ||
367 | dw_readw(dws, rxuicr); | ||
368 | int_error_stop(dws, "interrupt_transfer: fifo overrun"); | ||
369 | return IRQ_HANDLED; | ||
370 | } | ||
371 | |||
372 | /* INT comes from tx */ | ||
373 | if (dws->tx && (irq_status & SPI_INT_TXEI)) { | ||
374 | while (dws->tx < dws->tx_end) | ||
375 | dws->write(dws); | ||
376 | |||
377 | if (dws->tx == dws->tx_end) { | ||
378 | spi_mask_intr(dws, SPI_INT_TXEI); | ||
379 | transfer_complete(dws); | ||
380 | } | ||
381 | } | ||
382 | |||
383 | /* INT comes from rx */ | ||
384 | if (dws->rx && (irq_status & SPI_INT_RXFI)) { | ||
385 | if (dws->read(dws)) | ||
386 | transfer_complete(dws); | ||
387 | } | ||
388 | return IRQ_HANDLED; | ||
389 | } | ||
390 | |||
391 | static irqreturn_t dw_spi_irq(int irq, void *dev_id) | ||
392 | { | ||
393 | struct dw_spi *dws = dev_id; | ||
394 | |||
395 | if (!dws->cur_msg) { | ||
396 | spi_mask_intr(dws, SPI_INT_TXEI); | ||
397 | /* Never fail */ | ||
398 | return IRQ_HANDLED; | ||
399 | } | ||
400 | |||
401 | return dws->transfer_handler(dws); | ||
402 | } | ||
403 | |||
404 | /* Must be called inside pump_transfers() */ | ||
405 | static void poll_transfer(struct dw_spi *dws) | ||
406 | { | ||
407 | if (dws->tx) { | ||
408 | while (dws->write(dws)) | ||
409 | dws->read(dws); | ||
410 | } | ||
411 | |||
412 | dws->read(dws); | ||
413 | transfer_complete(dws); | ||
414 | } | ||
415 | |||
416 | static void dma_transfer(struct dw_spi *dws, int cs_change) | ||
417 | { | ||
418 | } | ||
419 | |||
420 | static void pump_transfers(unsigned long data) | ||
421 | { | ||
422 | struct dw_spi *dws = (struct dw_spi *)data; | ||
423 | struct spi_message *message = NULL; | ||
424 | struct spi_transfer *transfer = NULL; | ||
425 | struct spi_transfer *previous = NULL; | ||
426 | struct spi_device *spi = NULL; | ||
427 | struct chip_data *chip = NULL; | ||
428 | u8 bits = 0; | ||
429 | u8 imask = 0; | ||
430 | u8 cs_change = 0; | ||
431 | u16 clk_div = 0; | ||
432 | u32 speed = 0; | ||
433 | u32 cr0 = 0; | ||
434 | |||
435 | /* Get current state information */ | ||
436 | message = dws->cur_msg; | ||
437 | transfer = dws->cur_transfer; | ||
438 | chip = dws->cur_chip; | ||
439 | spi = message->spi; | ||
440 | |||
441 | if (message->state == ERROR_STATE) { | ||
442 | message->status = -EIO; | ||
443 | goto early_exit; | ||
444 | } | ||
445 | |||
446 | /* Handle end of message */ | ||
447 | if (message->state == DONE_STATE) { | ||
448 | message->status = 0; | ||
449 | goto early_exit; | ||
450 | } | ||
451 | |||
452 | /* Delay if requested at end of transfer*/ | ||
453 | if (message->state == RUNNING_STATE) { | ||
454 | previous = list_entry(transfer->transfer_list.prev, | ||
455 | struct spi_transfer, | ||
456 | transfer_list); | ||
457 | if (previous->delay_usecs) | ||
458 | udelay(previous->delay_usecs); | ||
459 | } | ||
460 | |||
461 | dws->n_bytes = chip->n_bytes; | ||
462 | dws->dma_width = chip->dma_width; | ||
463 | dws->cs_control = chip->cs_control; | ||
464 | |||
465 | dws->rx_dma = transfer->rx_dma; | ||
466 | dws->tx_dma = transfer->tx_dma; | ||
467 | dws->tx = (void *)transfer->tx_buf; | ||
468 | dws->tx_end = dws->tx + transfer->len; | ||
469 | dws->rx = transfer->rx_buf; | ||
470 | dws->rx_end = dws->rx + transfer->len; | ||
471 | dws->write = dws->tx ? chip->write : null_writer; | ||
472 | dws->read = dws->rx ? chip->read : null_reader; | ||
473 | dws->cs_change = transfer->cs_change; | ||
474 | dws->len = dws->cur_transfer->len; | ||
475 | if (chip != dws->prev_chip) | ||
476 | cs_change = 1; | ||
477 | |||
478 | cr0 = chip->cr0; | ||
479 | |||
480 | /* Handle per transfer options for bpw and speed */ | ||
481 | if (transfer->speed_hz) { | ||
482 | speed = chip->speed_hz; | ||
483 | |||
484 | if (transfer->speed_hz != speed) { | ||
485 | speed = transfer->speed_hz; | ||
486 | if (speed > dws->max_freq) { | ||
487 | printk(KERN_ERR "MRST SPI0: unsupported" | ||
488 | "freq: %dHz\n", speed); | ||
489 | message->status = -EIO; | ||
490 | goto early_exit; | ||
491 | } | ||
492 | |||
493 | /* clk_div doesn't support odd number */ | ||
494 | clk_div = dws->max_freq / speed; | ||
495 | clk_div = (clk_div >> 1) << 1; | ||
496 | |||
497 | chip->speed_hz = speed; | ||
498 | chip->clk_div = clk_div; | ||
499 | } | ||
500 | } | ||
501 | if (transfer->bits_per_word) { | ||
502 | bits = transfer->bits_per_word; | ||
503 | |||
504 | switch (bits) { | ||
505 | case 8: | ||
506 | dws->n_bytes = 1; | ||
507 | dws->dma_width = 1; | ||
508 | dws->read = (dws->read != null_reader) ? | ||
509 | u8_reader : null_reader; | ||
510 | dws->write = (dws->write != null_writer) ? | ||
511 | u8_writer : null_writer; | ||
512 | break; | ||
513 | case 16: | ||
514 | dws->n_bytes = 2; | ||
515 | dws->dma_width = 2; | ||
516 | dws->read = (dws->read != null_reader) ? | ||
517 | u16_reader : null_reader; | ||
518 | dws->write = (dws->write != null_writer) ? | ||
519 | u16_writer : null_writer; | ||
520 | break; | ||
521 | default: | ||
522 | printk(KERN_ERR "MRST SPI0: unsupported bits:" | ||
523 | "%db\n", bits); | ||
524 | message->status = -EIO; | ||
525 | goto early_exit; | ||
526 | } | ||
527 | |||
528 | cr0 = (bits - 1) | ||
529 | | (chip->type << SPI_FRF_OFFSET) | ||
530 | | (spi->mode << SPI_MODE_OFFSET) | ||
531 | | (chip->tmode << SPI_TMOD_OFFSET); | ||
532 | } | ||
533 | message->state = RUNNING_STATE; | ||
534 | |||
535 | /* Check if current transfer is a DMA transaction */ | ||
536 | dws->dma_mapped = map_dma_buffers(dws); | ||
537 | |||
538 | if (!dws->dma_mapped && !chip->poll_mode) { | ||
539 | if (dws->rx) | ||
540 | imask |= SPI_INT_RXFI; | ||
541 | if (dws->tx) | ||
542 | imask |= SPI_INT_TXEI; | ||
543 | dws->transfer_handler = interrupt_transfer; | ||
544 | } | ||
545 | |||
546 | /* | ||
547 | * Reprogram registers only if | ||
548 | * 1. chip select changes | ||
549 | * 2. clk_div is changed | ||
550 | * 3. control value changes | ||
551 | */ | ||
552 | if (dw_readw(dws, ctrl0) != cr0 || cs_change || clk_div) { | ||
553 | spi_enable_chip(dws, 0); | ||
554 | |||
555 | if (dw_readw(dws, ctrl0) != cr0) | ||
556 | dw_writew(dws, ctrl0, cr0); | ||
557 | |||
558 | /* Set the interrupt mask, for poll mode just diable all int */ | ||
559 | spi_mask_intr(dws, 0xff); | ||
560 | if (!chip->poll_mode) | ||
561 | spi_umask_intr(dws, imask); | ||
562 | |||
563 | spi_set_clk(dws, clk_div ? clk_div : chip->clk_div); | ||
564 | spi_chip_sel(dws, spi->chip_select); | ||
565 | spi_enable_chip(dws, 1); | ||
566 | |||
567 | if (cs_change) | ||
568 | dws->prev_chip = chip; | ||
569 | } | ||
570 | |||
571 | if (dws->dma_mapped) | ||
572 | dma_transfer(dws, cs_change); | ||
573 | |||
574 | if (chip->poll_mode) | ||
575 | poll_transfer(dws); | ||
576 | |||
577 | return; | ||
578 | |||
579 | early_exit: | ||
580 | giveback(dws); | ||
581 | return; | ||
582 | } | ||
583 | |||
584 | static void pump_messages(struct work_struct *work) | ||
585 | { | ||
586 | struct dw_spi *dws = | ||
587 | container_of(work, struct dw_spi, pump_messages); | ||
588 | unsigned long flags; | ||
589 | |||
590 | /* Lock queue and check for queue work */ | ||
591 | spin_lock_irqsave(&dws->lock, flags); | ||
592 | if (list_empty(&dws->queue) || dws->run == QUEUE_STOPPED) { | ||
593 | dws->busy = 0; | ||
594 | spin_unlock_irqrestore(&dws->lock, flags); | ||
595 | return; | ||
596 | } | ||
597 | |||
598 | /* Make sure we are not already running a message */ | ||
599 | if (dws->cur_msg) { | ||
600 | spin_unlock_irqrestore(&dws->lock, flags); | ||
601 | return; | ||
602 | } | ||
603 | |||
604 | /* Extract head of queue */ | ||
605 | dws->cur_msg = list_entry(dws->queue.next, struct spi_message, queue); | ||
606 | list_del_init(&dws->cur_msg->queue); | ||
607 | |||
608 | /* Initial message state*/ | ||
609 | dws->cur_msg->state = START_STATE; | ||
610 | dws->cur_transfer = list_entry(dws->cur_msg->transfers.next, | ||
611 | struct spi_transfer, | ||
612 | transfer_list); | ||
613 | dws->cur_chip = spi_get_ctldata(dws->cur_msg->spi); | ||
614 | |||
615 | /* Mark as busy and launch transfers */ | ||
616 | tasklet_schedule(&dws->pump_transfers); | ||
617 | |||
618 | dws->busy = 1; | ||
619 | spin_unlock_irqrestore(&dws->lock, flags); | ||
620 | } | ||
621 | |||
622 | /* spi_device use this to queue in their spi_msg */ | ||
623 | static int dw_spi_transfer(struct spi_device *spi, struct spi_message *msg) | ||
624 | { | ||
625 | struct dw_spi *dws = spi_master_get_devdata(spi->master); | ||
626 | unsigned long flags; | ||
627 | |||
628 | spin_lock_irqsave(&dws->lock, flags); | ||
629 | |||
630 | if (dws->run == QUEUE_STOPPED) { | ||
631 | spin_unlock_irqrestore(&dws->lock, flags); | ||
632 | return -ESHUTDOWN; | ||
633 | } | ||
634 | |||
635 | msg->actual_length = 0; | ||
636 | msg->status = -EINPROGRESS; | ||
637 | msg->state = START_STATE; | ||
638 | |||
639 | list_add_tail(&msg->queue, &dws->queue); | ||
640 | |||
641 | if (dws->run == QUEUE_RUNNING && !dws->busy) { | ||
642 | |||
643 | if (dws->cur_transfer || dws->cur_msg) | ||
644 | queue_work(dws->workqueue, | ||
645 | &dws->pump_messages); | ||
646 | else { | ||
647 | /* If no other data transaction in air, just go */ | ||
648 | spin_unlock_irqrestore(&dws->lock, flags); | ||
649 | pump_messages(&dws->pump_messages); | ||
650 | return 0; | ||
651 | } | ||
652 | } | ||
653 | |||
654 | spin_unlock_irqrestore(&dws->lock, flags); | ||
655 | return 0; | ||
656 | } | ||
657 | |||
658 | /* This may be called twice for each spi dev */ | ||
659 | static int dw_spi_setup(struct spi_device *spi) | ||
660 | { | ||
661 | struct dw_spi_chip *chip_info = NULL; | ||
662 | struct chip_data *chip; | ||
663 | |||
664 | if (spi->bits_per_word != 8 && spi->bits_per_word != 16) | ||
665 | return -EINVAL; | ||
666 | |||
667 | /* Only alloc on first setup */ | ||
668 | chip = spi_get_ctldata(spi); | ||
669 | if (!chip) { | ||
670 | chip = kzalloc(sizeof(struct chip_data), GFP_KERNEL); | ||
671 | if (!chip) | ||
672 | return -ENOMEM; | ||
673 | |||
674 | chip->cs_control = null_cs_control; | ||
675 | chip->enable_dma = 0; | ||
676 | } | ||
677 | |||
678 | /* | ||
679 | * Protocol drivers may change the chip settings, so... | ||
680 | * if chip_info exists, use it | ||
681 | */ | ||
682 | chip_info = spi->controller_data; | ||
683 | |||
684 | /* chip_info doesn't always exist */ | ||
685 | if (chip_info) { | ||
686 | if (chip_info->cs_control) | ||
687 | chip->cs_control = chip_info->cs_control; | ||
688 | |||
689 | chip->poll_mode = chip_info->poll_mode; | ||
690 | chip->type = chip_info->type; | ||
691 | |||
692 | chip->rx_threshold = 0; | ||
693 | chip->tx_threshold = 0; | ||
694 | |||
695 | chip->enable_dma = chip_info->enable_dma; | ||
696 | } | ||
697 | |||
698 | if (spi->bits_per_word <= 8) { | ||
699 | chip->n_bytes = 1; | ||
700 | chip->dma_width = 1; | ||
701 | chip->read = u8_reader; | ||
702 | chip->write = u8_writer; | ||
703 | } else if (spi->bits_per_word <= 16) { | ||
704 | chip->n_bytes = 2; | ||
705 | chip->dma_width = 2; | ||
706 | chip->read = u16_reader; | ||
707 | chip->write = u16_writer; | ||
708 | } else { | ||
709 | /* Never take >16b case for MRST SPIC */ | ||
710 | dev_err(&spi->dev, "invalid wordsize\n"); | ||
711 | return -EINVAL; | ||
712 | } | ||
713 | chip->bits_per_word = spi->bits_per_word; | ||
714 | |||
715 | chip->speed_hz = spi->max_speed_hz; | ||
716 | if (chip->speed_hz) | ||
717 | chip->clk_div = 25000000 / chip->speed_hz; | ||
718 | else | ||
719 | chip->clk_div = 8; /* default value */ | ||
720 | |||
721 | chip->tmode = 0; /* Tx & Rx */ | ||
722 | /* Default SPI mode is SCPOL = 0, SCPH = 0 */ | ||
723 | chip->cr0 = (chip->bits_per_word - 1) | ||
724 | | (chip->type << SPI_FRF_OFFSET) | ||
725 | | (spi->mode << SPI_MODE_OFFSET) | ||
726 | | (chip->tmode << SPI_TMOD_OFFSET); | ||
727 | |||
728 | spi_set_ctldata(spi, chip); | ||
729 | return 0; | ||
730 | } | ||
731 | |||
732 | static void dw_spi_cleanup(struct spi_device *spi) | ||
733 | { | ||
734 | struct chip_data *chip = spi_get_ctldata(spi); | ||
735 | kfree(chip); | ||
736 | } | ||
737 | |||
738 | static int __init init_queue(struct dw_spi *dws) | ||
739 | { | ||
740 | INIT_LIST_HEAD(&dws->queue); | ||
741 | spin_lock_init(&dws->lock); | ||
742 | |||
743 | dws->run = QUEUE_STOPPED; | ||
744 | dws->busy = 0; | ||
745 | |||
746 | tasklet_init(&dws->pump_transfers, | ||
747 | pump_transfers, (unsigned long)dws); | ||
748 | |||
749 | INIT_WORK(&dws->pump_messages, pump_messages); | ||
750 | dws->workqueue = create_singlethread_workqueue( | ||
751 | dev_name(dws->master->dev.parent)); | ||
752 | if (dws->workqueue == NULL) | ||
753 | return -EBUSY; | ||
754 | |||
755 | return 0; | ||
756 | } | ||
757 | |||
758 | static int start_queue(struct dw_spi *dws) | ||
759 | { | ||
760 | unsigned long flags; | ||
761 | |||
762 | spin_lock_irqsave(&dws->lock, flags); | ||
763 | |||
764 | if (dws->run == QUEUE_RUNNING || dws->busy) { | ||
765 | spin_unlock_irqrestore(&dws->lock, flags); | ||
766 | return -EBUSY; | ||
767 | } | ||
768 | |||
769 | dws->run = QUEUE_RUNNING; | ||
770 | dws->cur_msg = NULL; | ||
771 | dws->cur_transfer = NULL; | ||
772 | dws->cur_chip = NULL; | ||
773 | dws->prev_chip = NULL; | ||
774 | spin_unlock_irqrestore(&dws->lock, flags); | ||
775 | |||
776 | queue_work(dws->workqueue, &dws->pump_messages); | ||
777 | |||
778 | return 0; | ||
779 | } | ||
780 | |||
781 | static int stop_queue(struct dw_spi *dws) | ||
782 | { | ||
783 | unsigned long flags; | ||
784 | unsigned limit = 50; | ||
785 | int status = 0; | ||
786 | |||
787 | spin_lock_irqsave(&dws->lock, flags); | ||
788 | dws->run = QUEUE_STOPPED; | ||
789 | while (!list_empty(&dws->queue) && dws->busy && limit--) { | ||
790 | spin_unlock_irqrestore(&dws->lock, flags); | ||
791 | msleep(10); | ||
792 | spin_lock_irqsave(&dws->lock, flags); | ||
793 | } | ||
794 | |||
795 | if (!list_empty(&dws->queue) || dws->busy) | ||
796 | status = -EBUSY; | ||
797 | spin_unlock_irqrestore(&dws->lock, flags); | ||
798 | |||
799 | return status; | ||
800 | } | ||
801 | |||
802 | static int destroy_queue(struct dw_spi *dws) | ||
803 | { | ||
804 | int status; | ||
805 | |||
806 | status = stop_queue(dws); | ||
807 | if (status != 0) | ||
808 | return status; | ||
809 | destroy_workqueue(dws->workqueue); | ||
810 | return 0; | ||
811 | } | ||
812 | |||
813 | /* Restart the controller, disable all interrupts, clean rx fifo */ | ||
814 | static void spi_hw_init(struct dw_spi *dws) | ||
815 | { | ||
816 | spi_enable_chip(dws, 0); | ||
817 | spi_mask_intr(dws, 0xff); | ||
818 | spi_enable_chip(dws, 1); | ||
819 | flush(dws); | ||
820 | } | ||
821 | |||
822 | int __devinit dw_spi_add_host(struct dw_spi *dws) | ||
823 | { | ||
824 | struct spi_master *master; | ||
825 | int ret; | ||
826 | |||
827 | BUG_ON(dws == NULL); | ||
828 | |||
829 | master = spi_alloc_master(dws->parent_dev, 0); | ||
830 | if (!master) { | ||
831 | ret = -ENOMEM; | ||
832 | goto exit; | ||
833 | } | ||
834 | |||
835 | dws->master = master; | ||
836 | dws->type = SSI_MOTO_SPI; | ||
837 | dws->prev_chip = NULL; | ||
838 | dws->dma_inited = 0; | ||
839 | dws->dma_addr = (dma_addr_t)(dws->paddr + 0x60); | ||
840 | |||
841 | ret = request_irq(dws->irq, dw_spi_irq, 0, | ||
842 | "dw_spi", dws); | ||
843 | if (ret < 0) { | ||
844 | dev_err(&master->dev, "can not get IRQ\n"); | ||
845 | goto err_free_master; | ||
846 | } | ||
847 | |||
848 | master->mode_bits = SPI_CPOL | SPI_CPHA; | ||
849 | master->bus_num = dws->bus_num; | ||
850 | master->num_chipselect = dws->num_cs; | ||
851 | master->cleanup = dw_spi_cleanup; | ||
852 | master->setup = dw_spi_setup; | ||
853 | master->transfer = dw_spi_transfer; | ||
854 | |||
855 | dws->dma_inited = 0; | ||
856 | |||
857 | /* Basic HW init */ | ||
858 | spi_hw_init(dws); | ||
859 | |||
860 | /* Initial and start queue */ | ||
861 | ret = init_queue(dws); | ||
862 | if (ret) { | ||
863 | dev_err(&master->dev, "problem initializing queue\n"); | ||
864 | goto err_diable_hw; | ||
865 | } | ||
866 | ret = start_queue(dws); | ||
867 | if (ret) { | ||
868 | dev_err(&master->dev, "problem starting queue\n"); | ||
869 | goto err_diable_hw; | ||
870 | } | ||
871 | |||
872 | spi_master_set_devdata(master, dws); | ||
873 | ret = spi_register_master(master); | ||
874 | if (ret) { | ||
875 | dev_err(&master->dev, "problem registering spi master\n"); | ||
876 | goto err_queue_alloc; | ||
877 | } | ||
878 | |||
879 | mrst_spi_debugfs_init(dws); | ||
880 | return 0; | ||
881 | |||
882 | err_queue_alloc: | ||
883 | destroy_queue(dws); | ||
884 | err_diable_hw: | ||
885 | spi_enable_chip(dws, 0); | ||
886 | free_irq(dws->irq, dws); | ||
887 | err_free_master: | ||
888 | spi_master_put(master); | ||
889 | exit: | ||
890 | return ret; | ||
891 | } | ||
892 | EXPORT_SYMBOL(dw_spi_add_host); | ||
893 | |||
894 | void __devexit dw_spi_remove_host(struct dw_spi *dws) | ||
895 | { | ||
896 | int status = 0; | ||
897 | |||
898 | if (!dws) | ||
899 | return; | ||
900 | mrst_spi_debugfs_remove(dws); | ||
901 | |||
902 | /* Remove the queue */ | ||
903 | status = destroy_queue(dws); | ||
904 | if (status != 0) | ||
905 | dev_err(&dws->master->dev, "dw_spi_remove: workqueue will not " | ||
906 | "complete, message memory not freed\n"); | ||
907 | |||
908 | spi_enable_chip(dws, 0); | ||
909 | /* Disable clk */ | ||
910 | spi_set_clk(dws, 0); | ||
911 | free_irq(dws->irq, dws); | ||
912 | |||
913 | /* Disconnect from the SPI framework */ | ||
914 | spi_unregister_master(dws->master); | ||
915 | } | ||
916 | |||
917 | int dw_spi_suspend_host(struct dw_spi *dws) | ||
918 | { | ||
919 | int ret = 0; | ||
920 | |||
921 | ret = stop_queue(dws); | ||
922 | if (ret) | ||
923 | return ret; | ||
924 | spi_enable_chip(dws, 0); | ||
925 | spi_set_clk(dws, 0); | ||
926 | return ret; | ||
927 | } | ||
928 | EXPORT_SYMBOL(dw_spi_suspend_host); | ||
929 | |||
930 | int dw_spi_resume_host(struct dw_spi *dws) | ||
931 | { | ||
932 | int ret; | ||
933 | |||
934 | spi_hw_init(dws); | ||
935 | ret = start_queue(dws); | ||
936 | if (ret) | ||
937 | dev_err(&dws->master->dev, "fail to start queue (%d)\n", ret); | ||
938 | return ret; | ||
939 | } | ||
940 | EXPORT_SYMBOL(dw_spi_resume_host); | ||
941 | |||
942 | MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>"); | ||
943 | MODULE_DESCRIPTION("Driver for DesignWare SPI controller core"); | ||
944 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/spi/dw_spi_pci.c b/drivers/spi/dw_spi_pci.c new file mode 100644 index 000000000000..34ba69161734 --- /dev/null +++ b/drivers/spi/dw_spi_pci.c | |||
@@ -0,0 +1,169 @@ | |||
1 | /* | ||
2 | * mrst_spi_pci.c - PCI interface driver for DW SPI Core | ||
3 | * | ||
4 | * Copyright (c) 2009, Intel Corporation. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms and conditions of the GNU General Public License, | ||
8 | * version 2, as published by the Free Software Foundation. | ||
9 | * | ||
10 | * This program is distributed in the hope it will be useful, but WITHOUT | ||
11 | * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or | ||
12 | * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for | ||
13 | * more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License along | ||
16 | * with this program; if not, write to the Free Software Foundation, | ||
17 | * Inc., 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA. | ||
18 | */ | ||
19 | |||
20 | #include <linux/interrupt.h> | ||
21 | #include <linux/pci.h> | ||
22 | #include <linux/spi/dw_spi.h> | ||
23 | #include <linux/spi/spi.h> | ||
24 | |||
25 | #define DRIVER_NAME "dw_spi_pci" | ||
26 | |||
27 | struct dw_spi_pci { | ||
28 | struct pci_dev *pdev; | ||
29 | struct dw_spi dws; | ||
30 | }; | ||
31 | |||
32 | static int __devinit spi_pci_probe(struct pci_dev *pdev, | ||
33 | const struct pci_device_id *ent) | ||
34 | { | ||
35 | struct dw_spi_pci *dwpci; | ||
36 | struct dw_spi *dws; | ||
37 | int pci_bar = 0; | ||
38 | int ret; | ||
39 | |||
40 | printk(KERN_INFO "DW: found PCI SPI controller(ID: %04x:%04x)\n", | ||
41 | pdev->vendor, pdev->device); | ||
42 | |||
43 | ret = pci_enable_device(pdev); | ||
44 | if (ret) | ||
45 | return ret; | ||
46 | |||
47 | dwpci = kzalloc(sizeof(struct dw_spi_pci), GFP_KERNEL); | ||
48 | if (!dwpci) { | ||
49 | ret = -ENOMEM; | ||
50 | goto err_disable; | ||
51 | } | ||
52 | |||
53 | dwpci->pdev = pdev; | ||
54 | dws = &dwpci->dws; | ||
55 | |||
56 | /* Get basic io resource and map it */ | ||
57 | dws->paddr = pci_resource_start(pdev, pci_bar); | ||
58 | dws->iolen = pci_resource_len(pdev, pci_bar); | ||
59 | |||
60 | ret = pci_request_region(pdev, pci_bar, dev_name(&pdev->dev)); | ||
61 | if (ret) | ||
62 | goto err_kfree; | ||
63 | |||
64 | dws->regs = ioremap_nocache((unsigned long)dws->paddr, | ||
65 | pci_resource_len(pdev, pci_bar)); | ||
66 | if (!dws->regs) { | ||
67 | ret = -ENOMEM; | ||
68 | goto err_release_reg; | ||
69 | } | ||
70 | |||
71 | dws->parent_dev = &pdev->dev; | ||
72 | dws->bus_num = 0; | ||
73 | dws->num_cs = 4; | ||
74 | dws->max_freq = 25000000; /* for Moorestwon */ | ||
75 | dws->irq = pdev->irq; | ||
76 | |||
77 | ret = dw_spi_add_host(dws); | ||
78 | if (ret) | ||
79 | goto err_unmap; | ||
80 | |||
81 | /* PCI hook and SPI hook use the same drv data */ | ||
82 | pci_set_drvdata(pdev, dwpci); | ||
83 | return 0; | ||
84 | |||
85 | err_unmap: | ||
86 | iounmap(dws->regs); | ||
87 | err_release_reg: | ||
88 | pci_release_region(pdev, pci_bar); | ||
89 | err_kfree: | ||
90 | kfree(dwpci); | ||
91 | err_disable: | ||
92 | pci_disable_device(pdev); | ||
93 | return ret; | ||
94 | } | ||
95 | |||
96 | static void __devexit spi_pci_remove(struct pci_dev *pdev) | ||
97 | { | ||
98 | struct dw_spi_pci *dwpci = pci_get_drvdata(pdev); | ||
99 | |||
100 | pci_set_drvdata(pdev, NULL); | ||
101 | iounmap(dwpci->dws.regs); | ||
102 | pci_release_region(pdev, 0); | ||
103 | kfree(dwpci); | ||
104 | pci_disable_device(pdev); | ||
105 | } | ||
106 | |||
107 | #ifdef CONFIG_PM | ||
108 | static int spi_suspend(struct pci_dev *pdev, pm_message_t state) | ||
109 | { | ||
110 | struct dw_spi_pci *dwpci = pci_get_drvdata(pdev); | ||
111 | int ret; | ||
112 | |||
113 | ret = dw_spi_suspend_host(&dwpci->dws); | ||
114 | if (ret) | ||
115 | return ret; | ||
116 | pci_save_state(pdev); | ||
117 | pci_disable_device(pdev); | ||
118 | pci_set_power_state(pdev, pci_choose_state(pdev, state)); | ||
119 | return ret; | ||
120 | } | ||
121 | |||
122 | static int spi_resume(struct pci_dev *pdev) | ||
123 | { | ||
124 | struct dw_spi_pci *dwpci = pci_get_drvdata(pdev); | ||
125 | int ret; | ||
126 | |||
127 | pci_set_power_state(pdev, PCI_D0); | ||
128 | pci_restore_state(pdev); | ||
129 | ret = pci_enable_device(pdev); | ||
130 | if (ret) | ||
131 | return ret; | ||
132 | return dw_spi_resume_host(&dwpci->dws); | ||
133 | } | ||
134 | #else | ||
135 | #define spi_suspend NULL | ||
136 | #define spi_resume NULL | ||
137 | #endif | ||
138 | |||
139 | static const struct pci_device_id pci_ids[] __devinitdata = { | ||
140 | /* Intel Moorestown platform SPI controller 0 */ | ||
141 | { PCI_DEVICE(PCI_VENDOR_ID_INTEL, 0x0800) }, | ||
142 | {}, | ||
143 | }; | ||
144 | |||
145 | static struct pci_driver dw_spi_driver = { | ||
146 | .name = DRIVER_NAME, | ||
147 | .id_table = pci_ids, | ||
148 | .probe = spi_pci_probe, | ||
149 | .remove = __devexit_p(spi_pci_remove), | ||
150 | .suspend = spi_suspend, | ||
151 | .resume = spi_resume, | ||
152 | }; | ||
153 | |||
154 | static int __init mrst_spi_init(void) | ||
155 | { | ||
156 | return pci_register_driver(&dw_spi_driver); | ||
157 | } | ||
158 | |||
159 | static void __exit mrst_spi_exit(void) | ||
160 | { | ||
161 | pci_unregister_driver(&dw_spi_driver); | ||
162 | } | ||
163 | |||
164 | module_init(mrst_spi_init); | ||
165 | module_exit(mrst_spi_exit); | ||
166 | |||
167 | MODULE_AUTHOR("Feng Tang <feng.tang@intel.com>"); | ||
168 | MODULE_DESCRIPTION("PCI interface driver for DW SPI Core"); | ||
169 | MODULE_LICENSE("GPL v2"); | ||
diff --git a/drivers/spi/spi_bfin5xx.c b/drivers/spi/spi_bfin5xx.c index 73e24ef5a2f9..1d41058bbab2 100644 --- a/drivers/spi/spi_bfin5xx.c +++ b/drivers/spi/spi_bfin5xx.c | |||
@@ -1294,7 +1294,7 @@ static int __init bfin_spi_probe(struct platform_device *pdev) | |||
1294 | goto out_error_get_res; | 1294 | goto out_error_get_res; |
1295 | } | 1295 | } |
1296 | 1296 | ||
1297 | drv_data->regs_base = ioremap(res->start, (res->end - res->start + 1)); | 1297 | drv_data->regs_base = ioremap(res->start, resource_size(res)); |
1298 | if (drv_data->regs_base == NULL) { | 1298 | if (drv_data->regs_base == NULL) { |
1299 | dev_err(dev, "Cannot map IO\n"); | 1299 | dev_err(dev, "Cannot map IO\n"); |
1300 | status = -ENXIO; | 1300 | status = -ENXIO; |
diff --git a/drivers/spi/spi_mpc8xxx.c b/drivers/spi/spi_mpc8xxx.c index e9390d747bfc..1fb2a6ea328c 100644 --- a/drivers/spi/spi_mpc8xxx.c +++ b/drivers/spi/spi_mpc8xxx.c | |||
@@ -1013,7 +1013,7 @@ mpc8xxx_spi_probe(struct device *dev, struct resource *mem, unsigned int irq) | |||
1013 | 1013 | ||
1014 | init_completion(&mpc8xxx_spi->done); | 1014 | init_completion(&mpc8xxx_spi->done); |
1015 | 1015 | ||
1016 | mpc8xxx_spi->base = ioremap(mem->start, mem->end - mem->start + 1); | 1016 | mpc8xxx_spi->base = ioremap(mem->start, resource_size(mem)); |
1017 | if (mpc8xxx_spi->base == NULL) { | 1017 | if (mpc8xxx_spi->base == NULL) { |
1018 | ret = -ENOMEM; | 1018 | ret = -ENOMEM; |
1019 | goto err_ioremap; | 1019 | goto err_ioremap; |
diff --git a/drivers/spi/spi_s3c24xx.c b/drivers/spi/spi_s3c24xx.c index 276591569c8b..c010733877ae 100644 --- a/drivers/spi/spi_s3c24xx.c +++ b/drivers/spi/spi_s3c24xx.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /* linux/drivers/spi/spi_s3c24xx.c | 1 | /* linux/drivers/spi/spi_s3c24xx.c |
2 | * | 2 | * |
3 | * Copyright (c) 2006 Ben Dooks | 3 | * Copyright (c) 2006 Ben Dooks |
4 | * Copyright (c) 2006 Simtec Electronics | 4 | * Copyright 2006-2009 Simtec Electronics |
5 | * Ben Dooks <ben@simtec.co.uk> | 5 | * Ben Dooks <ben@simtec.co.uk> |
6 | * | 6 | * |
7 | * This program is free software; you can redistribute it and/or modify | 7 | * This program is free software; you can redistribute it and/or modify |
@@ -28,6 +28,11 @@ | |||
28 | #include <plat/regs-spi.h> | 28 | #include <plat/regs-spi.h> |
29 | #include <mach/spi.h> | 29 | #include <mach/spi.h> |
30 | 30 | ||
31 | #include <plat/fiq.h> | ||
32 | #include <asm/fiq.h> | ||
33 | |||
34 | #include "spi_s3c24xx_fiq.h" | ||
35 | |||
31 | /** | 36 | /** |
32 | * s3c24xx_spi_devstate - per device data | 37 | * s3c24xx_spi_devstate - per device data |
33 | * @hz: Last frequency calculated for @sppre field. | 38 | * @hz: Last frequency calculated for @sppre field. |
@@ -42,6 +47,13 @@ struct s3c24xx_spi_devstate { | |||
42 | u8 sppre; | 47 | u8 sppre; |
43 | }; | 48 | }; |
44 | 49 | ||
50 | enum spi_fiq_mode { | ||
51 | FIQ_MODE_NONE = 0, | ||
52 | FIQ_MODE_TX = 1, | ||
53 | FIQ_MODE_RX = 2, | ||
54 | FIQ_MODE_TXRX = 3, | ||
55 | }; | ||
56 | |||
45 | struct s3c24xx_spi { | 57 | struct s3c24xx_spi { |
46 | /* bitbang has to be first */ | 58 | /* bitbang has to be first */ |
47 | struct spi_bitbang bitbang; | 59 | struct spi_bitbang bitbang; |
@@ -52,6 +64,11 @@ struct s3c24xx_spi { | |||
52 | int len; | 64 | int len; |
53 | int count; | 65 | int count; |
54 | 66 | ||
67 | struct fiq_handler fiq_handler; | ||
68 | enum spi_fiq_mode fiq_mode; | ||
69 | unsigned char fiq_inuse; | ||
70 | unsigned char fiq_claimed; | ||
71 | |||
55 | void (*set_cs)(struct s3c2410_spi_info *spi, | 72 | void (*set_cs)(struct s3c2410_spi_info *spi, |
56 | int cs, int pol); | 73 | int cs, int pol); |
57 | 74 | ||
@@ -67,6 +84,7 @@ struct s3c24xx_spi { | |||
67 | struct s3c2410_spi_info *pdata; | 84 | struct s3c2410_spi_info *pdata; |
68 | }; | 85 | }; |
69 | 86 | ||
87 | |||
70 | #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT) | 88 | #define SPCON_DEFAULT (S3C2410_SPCON_MSTR | S3C2410_SPCON_SMOD_INT) |
71 | #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP) | 89 | #define SPPIN_DEFAULT (S3C2410_SPPIN_KEEP) |
72 | 90 | ||
@@ -127,7 +145,7 @@ static int s3c24xx_spi_update_state(struct spi_device *spi, | |||
127 | } | 145 | } |
128 | 146 | ||
129 | if (spi->mode != cs->mode) { | 147 | if (spi->mode != cs->mode) { |
130 | u8 spcon = SPCON_DEFAULT; | 148 | u8 spcon = SPCON_DEFAULT | S3C2410_SPCON_ENSCK; |
131 | 149 | ||
132 | if (spi->mode & SPI_CPHA) | 150 | if (spi->mode & SPI_CPHA) |
133 | spcon |= S3C2410_SPCON_CPHA_FMTB; | 151 | spcon |= S3C2410_SPCON_CPHA_FMTB; |
@@ -214,13 +232,196 @@ static inline unsigned int hw_txbyte(struct s3c24xx_spi *hw, int count) | |||
214 | return hw->tx ? hw->tx[count] : 0; | 232 | return hw->tx ? hw->tx[count] : 0; |
215 | } | 233 | } |
216 | 234 | ||
235 | #ifdef CONFIG_SPI_S3C24XX_FIQ | ||
236 | /* Support for FIQ based pseudo-DMA to improve the transfer speed. | ||
237 | * | ||
238 | * This code uses the assembly helper in spi_s3c24xx_spi.S which is | ||
239 | * used by the FIQ core to move data between main memory and the peripheral | ||
240 | * block. Since this is code running on the processor, there is no problem | ||
241 | * with cache coherency of the buffers, so we can use any buffer we like. | ||
242 | */ | ||
243 | |||
244 | /** | ||
245 | * struct spi_fiq_code - FIQ code and header | ||
246 | * @length: The length of the code fragment, excluding this header. | ||
247 | * @ack_offset: The offset from @data to the word to place the IRQ ACK bit at. | ||
248 | * @data: The code itself to install as a FIQ handler. | ||
249 | */ | ||
250 | struct spi_fiq_code { | ||
251 | u32 length; | ||
252 | u32 ack_offset; | ||
253 | u8 data[0]; | ||
254 | }; | ||
255 | |||
256 | extern struct spi_fiq_code s3c24xx_spi_fiq_txrx; | ||
257 | extern struct spi_fiq_code s3c24xx_spi_fiq_tx; | ||
258 | extern struct spi_fiq_code s3c24xx_spi_fiq_rx; | ||
259 | |||
260 | /** | ||
261 | * ack_bit - turn IRQ into IRQ acknowledgement bit | ||
262 | * @irq: The interrupt number | ||
263 | * | ||
264 | * Returns the bit to write to the interrupt acknowledge register. | ||
265 | */ | ||
266 | static inline u32 ack_bit(unsigned int irq) | ||
267 | { | ||
268 | return 1 << (irq - IRQ_EINT0); | ||
269 | } | ||
270 | |||
271 | /** | ||
272 | * s3c24xx_spi_tryfiq - attempt to claim and setup FIQ for transfer | ||
273 | * @hw: The hardware state. | ||
274 | * | ||
275 | * Claim the FIQ handler (only one can be active at any one time) and | ||
276 | * then setup the correct transfer code for this transfer. | ||
277 | * | ||
278 | * This call updates all the necessary state information if sucessful, | ||
279 | * so the caller does not need to do anything more than start the transfer | ||
280 | * as normal, since the IRQ will have been re-routed to the FIQ handler. | ||
281 | */ | ||
282 | void s3c24xx_spi_tryfiq(struct s3c24xx_spi *hw) | ||
283 | { | ||
284 | struct pt_regs regs; | ||
285 | enum spi_fiq_mode mode; | ||
286 | struct spi_fiq_code *code; | ||
287 | int ret; | ||
288 | |||
289 | if (!hw->fiq_claimed) { | ||
290 | /* try and claim fiq if we haven't got it, and if not | ||
291 | * then return and simply use another transfer method */ | ||
292 | |||
293 | ret = claim_fiq(&hw->fiq_handler); | ||
294 | if (ret) | ||
295 | return; | ||
296 | } | ||
297 | |||
298 | if (hw->tx && !hw->rx) | ||
299 | mode = FIQ_MODE_TX; | ||
300 | else if (hw->rx && !hw->tx) | ||
301 | mode = FIQ_MODE_RX; | ||
302 | else | ||
303 | mode = FIQ_MODE_TXRX; | ||
304 | |||
305 | regs.uregs[fiq_rspi] = (long)hw->regs; | ||
306 | regs.uregs[fiq_rrx] = (long)hw->rx; | ||
307 | regs.uregs[fiq_rtx] = (long)hw->tx + 1; | ||
308 | regs.uregs[fiq_rcount] = hw->len - 1; | ||
309 | regs.uregs[fiq_rirq] = (long)S3C24XX_VA_IRQ; | ||
310 | |||
311 | set_fiq_regs(®s); | ||
312 | |||
313 | if (hw->fiq_mode != mode) { | ||
314 | u32 *ack_ptr; | ||
315 | |||
316 | hw->fiq_mode = mode; | ||
317 | |||
318 | switch (mode) { | ||
319 | case FIQ_MODE_TX: | ||
320 | code = &s3c24xx_spi_fiq_tx; | ||
321 | break; | ||
322 | case FIQ_MODE_RX: | ||
323 | code = &s3c24xx_spi_fiq_rx; | ||
324 | break; | ||
325 | case FIQ_MODE_TXRX: | ||
326 | code = &s3c24xx_spi_fiq_txrx; | ||
327 | break; | ||
328 | default: | ||
329 | code = NULL; | ||
330 | } | ||
331 | |||
332 | BUG_ON(!code); | ||
333 | |||
334 | ack_ptr = (u32 *)&code->data[code->ack_offset]; | ||
335 | *ack_ptr = ack_bit(hw->irq); | ||
336 | |||
337 | set_fiq_handler(&code->data, code->length); | ||
338 | } | ||
339 | |||
340 | s3c24xx_set_fiq(hw->irq, true); | ||
341 | |||
342 | hw->fiq_mode = mode; | ||
343 | hw->fiq_inuse = 1; | ||
344 | } | ||
345 | |||
346 | /** | ||
347 | * s3c24xx_spi_fiqop - FIQ core code callback | ||
348 | * @pw: Data registered with the handler | ||
349 | * @release: Whether this is a release or a return. | ||
350 | * | ||
351 | * Called by the FIQ code when another module wants to use the FIQ, so | ||
352 | * return whether we are currently using this or not and then update our | ||
353 | * internal state. | ||
354 | */ | ||
355 | static int s3c24xx_spi_fiqop(void *pw, int release) | ||
356 | { | ||
357 | struct s3c24xx_spi *hw = pw; | ||
358 | int ret = 0; | ||
359 | |||
360 | if (release) { | ||
361 | if (hw->fiq_inuse) | ||
362 | ret = -EBUSY; | ||
363 | |||
364 | /* note, we do not need to unroute the FIQ, as the FIQ | ||
365 | * vector code de-routes it to signal the end of transfer */ | ||
366 | |||
367 | hw->fiq_mode = FIQ_MODE_NONE; | ||
368 | hw->fiq_claimed = 0; | ||
369 | } else { | ||
370 | hw->fiq_claimed = 1; | ||
371 | } | ||
372 | |||
373 | return ret; | ||
374 | } | ||
375 | |||
376 | /** | ||
377 | * s3c24xx_spi_initfiq - setup the information for the FIQ core | ||
378 | * @hw: The hardware state. | ||
379 | * | ||
380 | * Setup the fiq_handler block to pass to the FIQ core. | ||
381 | */ | ||
382 | static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *hw) | ||
383 | { | ||
384 | hw->fiq_handler.dev_id = hw; | ||
385 | hw->fiq_handler.name = dev_name(hw->dev); | ||
386 | hw->fiq_handler.fiq_op = s3c24xx_spi_fiqop; | ||
387 | } | ||
388 | |||
389 | /** | ||
390 | * s3c24xx_spi_usefiq - return if we should be using FIQ. | ||
391 | * @hw: The hardware state. | ||
392 | * | ||
393 | * Return true if the platform data specifies whether this channel is | ||
394 | * allowed to use the FIQ. | ||
395 | */ | ||
396 | static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *hw) | ||
397 | { | ||
398 | return hw->pdata->use_fiq; | ||
399 | } | ||
400 | |||
401 | /** | ||
402 | * s3c24xx_spi_usingfiq - return if channel is using FIQ | ||
403 | * @spi: The hardware state. | ||
404 | * | ||
405 | * Return whether the channel is currently using the FIQ (separate from | ||
406 | * whether the FIQ is claimed). | ||
407 | */ | ||
408 | static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *spi) | ||
409 | { | ||
410 | return spi->fiq_inuse; | ||
411 | } | ||
412 | #else | ||
413 | |||
414 | static inline void s3c24xx_spi_initfiq(struct s3c24xx_spi *s) { } | ||
415 | static inline void s3c24xx_spi_tryfiq(struct s3c24xx_spi *s) { } | ||
416 | static inline bool s3c24xx_spi_usefiq(struct s3c24xx_spi *s) { return false; } | ||
417 | static inline bool s3c24xx_spi_usingfiq(struct s3c24xx_spi *s) { return false; } | ||
418 | |||
419 | #endif /* CONFIG_SPI_S3C24XX_FIQ */ | ||
420 | |||
217 | static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t) | 421 | static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t) |
218 | { | 422 | { |
219 | struct s3c24xx_spi *hw = to_hw(spi); | 423 | struct s3c24xx_spi *hw = to_hw(spi); |
220 | 424 | ||
221 | dev_dbg(&spi->dev, "txrx: tx %p, rx %p, len %d\n", | ||
222 | t->tx_buf, t->rx_buf, t->len); | ||
223 | |||
224 | hw->tx = t->tx_buf; | 425 | hw->tx = t->tx_buf; |
225 | hw->rx = t->rx_buf; | 426 | hw->rx = t->rx_buf; |
226 | hw->len = t->len; | 427 | hw->len = t->len; |
@@ -228,11 +429,14 @@ static int s3c24xx_spi_txrx(struct spi_device *spi, struct spi_transfer *t) | |||
228 | 429 | ||
229 | init_completion(&hw->done); | 430 | init_completion(&hw->done); |
230 | 431 | ||
432 | hw->fiq_inuse = 0; | ||
433 | if (s3c24xx_spi_usefiq(hw) && t->len >= 3) | ||
434 | s3c24xx_spi_tryfiq(hw); | ||
435 | |||
231 | /* send the first byte */ | 436 | /* send the first byte */ |
232 | writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT); | 437 | writeb(hw_txbyte(hw, 0), hw->regs + S3C2410_SPTDAT); |
233 | 438 | ||
234 | wait_for_completion(&hw->done); | 439 | wait_for_completion(&hw->done); |
235 | |||
236 | return hw->count; | 440 | return hw->count; |
237 | } | 441 | } |
238 | 442 | ||
@@ -254,17 +458,27 @@ static irqreturn_t s3c24xx_spi_irq(int irq, void *dev) | |||
254 | goto irq_done; | 458 | goto irq_done; |
255 | } | 459 | } |
256 | 460 | ||
257 | hw->count++; | 461 | if (!s3c24xx_spi_usingfiq(hw)) { |
462 | hw->count++; | ||
258 | 463 | ||
259 | if (hw->rx) | 464 | if (hw->rx) |
260 | hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT); | 465 | hw->rx[count] = readb(hw->regs + S3C2410_SPRDAT); |
261 | 466 | ||
262 | count++; | 467 | count++; |
468 | |||
469 | if (count < hw->len) | ||
470 | writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT); | ||
471 | else | ||
472 | complete(&hw->done); | ||
473 | } else { | ||
474 | hw->count = hw->len; | ||
475 | hw->fiq_inuse = 0; | ||
476 | |||
477 | if (hw->rx) | ||
478 | hw->rx[hw->len-1] = readb(hw->regs + S3C2410_SPRDAT); | ||
263 | 479 | ||
264 | if (count < hw->len) | ||
265 | writeb(hw_txbyte(hw, count), hw->regs + S3C2410_SPTDAT); | ||
266 | else | ||
267 | complete(&hw->done); | 480 | complete(&hw->done); |
481 | } | ||
268 | 482 | ||
269 | irq_done: | 483 | irq_done: |
270 | return IRQ_HANDLED; | 484 | return IRQ_HANDLED; |
@@ -322,6 +536,10 @@ static int __init s3c24xx_spi_probe(struct platform_device *pdev) | |||
322 | platform_set_drvdata(pdev, hw); | 536 | platform_set_drvdata(pdev, hw); |
323 | init_completion(&hw->done); | 537 | init_completion(&hw->done); |
324 | 538 | ||
539 | /* initialise fiq handler */ | ||
540 | |||
541 | s3c24xx_spi_initfiq(hw); | ||
542 | |||
325 | /* setup the master state. */ | 543 | /* setup the master state. */ |
326 | 544 | ||
327 | /* the spi->mode bits understood by this driver: */ | 545 | /* the spi->mode bits understood by this driver: */ |
diff --git a/drivers/spi/spi_s3c24xx_fiq.S b/drivers/spi/spi_s3c24xx_fiq.S new file mode 100644 index 000000000000..3793cae361db --- /dev/null +++ b/drivers/spi/spi_s3c24xx_fiq.S | |||
@@ -0,0 +1,116 @@ | |||
1 | /* linux/drivers/spi/spi_s3c24xx_fiq.S | ||
2 | * | ||
3 | * Copyright 2009 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C24XX SPI - FIQ pseudo-DMA transfer code | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | #include <linux/linkage.h> | ||
14 | #include <asm/assembler.h> | ||
15 | |||
16 | #include <mach/map.h> | ||
17 | #include <mach/regs-irq.h> | ||
18 | #include <plat/regs-spi.h> | ||
19 | |||
20 | #include "spi_s3c24xx_fiq.h" | ||
21 | |||
22 | .text | ||
23 | |||
24 | @ entry to these routines is as follows, with the register names | ||
25 | @ defined in fiq.h so that they can be shared with the C files which | ||
26 | @ setup the calling registers. | ||
27 | @ | ||
28 | @ fiq_rirq The base of the IRQ registers to find S3C2410_SRCPND | ||
29 | @ fiq_rtmp Temporary register to hold tx/rx data | ||
30 | @ fiq_rspi The base of the SPI register block | ||
31 | @ fiq_rtx The tx buffer pointer | ||
32 | @ fiq_rrx The rx buffer pointer | ||
33 | @ fiq_rcount The number of bytes to move | ||
34 | |||
35 | @ each entry starts with a word entry of how long it is | ||
36 | @ and an offset to the irq acknowledgment word | ||
37 | |||
38 | ENTRY(s3c24xx_spi_fiq_rx) | ||
39 | s3c24xx_spi_fix_rx: | ||
40 | .word fiq_rx_end - fiq_rx_start | ||
41 | .word fiq_rx_irq_ack - fiq_rx_start | ||
42 | fiq_rx_start: | ||
43 | ldr fiq_rtmp, fiq_rx_irq_ack | ||
44 | str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] | ||
45 | |||
46 | ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] | ||
47 | strb fiq_rtmp, [ fiq_rrx ], #1 | ||
48 | |||
49 | mov fiq_rtmp, #0xff | ||
50 | strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] | ||
51 | |||
52 | subs fiq_rcount, fiq_rcount, #1 | ||
53 | subnes pc, lr, #4 @@ return, still have work to do | ||
54 | |||
55 | @@ set IRQ controller so that next op will trigger IRQ | ||
56 | mov fiq_rtmp, #0 | ||
57 | str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] | ||
58 | subs pc, lr, #4 | ||
59 | |||
60 | fiq_rx_irq_ack: | ||
61 | .word 0 | ||
62 | fiq_rx_end: | ||
63 | |||
64 | ENTRY(s3c24xx_spi_fiq_txrx) | ||
65 | s3c24xx_spi_fiq_txrx: | ||
66 | .word fiq_txrx_end - fiq_txrx_start | ||
67 | .word fiq_txrx_irq_ack - fiq_txrx_start | ||
68 | fiq_txrx_start: | ||
69 | |||
70 | ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] | ||
71 | strb fiq_rtmp, [ fiq_rrx ], #1 | ||
72 | |||
73 | ldr fiq_rtmp, fiq_txrx_irq_ack | ||
74 | str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] | ||
75 | |||
76 | ldrb fiq_rtmp, [ fiq_rtx ], #1 | ||
77 | strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] | ||
78 | |||
79 | subs fiq_rcount, fiq_rcount, #1 | ||
80 | subnes pc, lr, #4 @@ return, still have work to do | ||
81 | |||
82 | mov fiq_rtmp, #0 | ||
83 | str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] | ||
84 | subs pc, lr, #4 | ||
85 | |||
86 | fiq_txrx_irq_ack: | ||
87 | .word 0 | ||
88 | |||
89 | fiq_txrx_end: | ||
90 | |||
91 | ENTRY(s3c24xx_spi_fiq_tx) | ||
92 | s3c24xx_spi_fix_tx: | ||
93 | .word fiq_tx_end - fiq_tx_start | ||
94 | .word fiq_tx_irq_ack - fiq_tx_start | ||
95 | fiq_tx_start: | ||
96 | ldrb fiq_rtmp, [ fiq_rspi, # S3C2410_SPRDAT ] | ||
97 | |||
98 | ldr fiq_rtmp, fiq_tx_irq_ack | ||
99 | str fiq_rtmp, [ fiq_rirq, # S3C2410_SRCPND - S3C24XX_VA_IRQ ] | ||
100 | |||
101 | ldrb fiq_rtmp, [ fiq_rtx ], #1 | ||
102 | strb fiq_rtmp, [ fiq_rspi, # S3C2410_SPTDAT ] | ||
103 | |||
104 | subs fiq_rcount, fiq_rcount, #1 | ||
105 | subnes pc, lr, #4 @@ return, still have work to do | ||
106 | |||
107 | mov fiq_rtmp, #0 | ||
108 | str fiq_rtmp, [ fiq_rirq, # S3C2410_INTMOD - S3C24XX_VA_IRQ ] | ||
109 | subs pc, lr, #4 | ||
110 | |||
111 | fiq_tx_irq_ack: | ||
112 | .word 0 | ||
113 | |||
114 | fiq_tx_end: | ||
115 | |||
116 | .end | ||
diff --git a/drivers/spi/spi_s3c24xx_fiq.h b/drivers/spi/spi_s3c24xx_fiq.h new file mode 100644 index 000000000000..a5950bb25b51 --- /dev/null +++ b/drivers/spi/spi_s3c24xx_fiq.h | |||
@@ -0,0 +1,26 @@ | |||
1 | /* linux/drivers/spi/spi_s3c24xx_fiq.h | ||
2 | * | ||
3 | * Copyright 2009 Simtec Electronics | ||
4 | * Ben Dooks <ben@simtec.co.uk> | ||
5 | * | ||
6 | * S3C24XX SPI - FIQ pseudo-DMA transfer support | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License version 2 as | ||
10 | * published by the Free Software Foundation. | ||
11 | */ | ||
12 | |||
13 | /* We have R8 through R13 to play with */ | ||
14 | |||
15 | #ifdef __ASSEMBLY__ | ||
16 | #define __REG_NR(x) r##x | ||
17 | #else | ||
18 | #define __REG_NR(x) (x) | ||
19 | #endif | ||
20 | |||
21 | #define fiq_rspi __REG_NR(8) | ||
22 | #define fiq_rtmp __REG_NR(9) | ||
23 | #define fiq_rrx __REG_NR(10) | ||
24 | #define fiq_rtx __REG_NR(11) | ||
25 | #define fiq_rcount __REG_NR(12) | ||
26 | #define fiq_rirq __REG_NR(13) | ||
diff --git a/drivers/spi/spi_s3c64xx.c b/drivers/spi/spi_s3c64xx.c new file mode 100644 index 000000000000..88a456dba967 --- /dev/null +++ b/drivers/spi/spi_s3c64xx.c | |||
@@ -0,0 +1,1196 @@ | |||
1 | /* linux/drivers/spi/spi_s3c64xx.c | ||
2 | * | ||
3 | * Copyright (C) 2009 Samsung Electronics Ltd. | ||
4 | * Jaswinder Singh <jassi.brar@samsung.com> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; either version 2 of the License, or | ||
9 | * (at your option) any later version. | ||
10 | * | ||
11 | * This program is distributed in the hope that it will be useful, | ||
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
14 | * GNU General Public License for more details. | ||
15 | * | ||
16 | * You should have received a copy of the GNU General Public License | ||
17 | * along with this program; if not, write to the Free Software | ||
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | ||
19 | */ | ||
20 | |||
21 | #include <linux/init.h> | ||
22 | #include <linux/module.h> | ||
23 | #include <linux/workqueue.h> | ||
24 | #include <linux/delay.h> | ||
25 | #include <linux/clk.h> | ||
26 | #include <linux/dma-mapping.h> | ||
27 | #include <linux/platform_device.h> | ||
28 | #include <linux/spi/spi.h> | ||
29 | |||
30 | #include <mach/dma.h> | ||
31 | #include <plat/spi.h> | ||
32 | |||
33 | /* Registers and bit-fields */ | ||
34 | |||
35 | #define S3C64XX_SPI_CH_CFG 0x00 | ||
36 | #define S3C64XX_SPI_CLK_CFG 0x04 | ||
37 | #define S3C64XX_SPI_MODE_CFG 0x08 | ||
38 | #define S3C64XX_SPI_SLAVE_SEL 0x0C | ||
39 | #define S3C64XX_SPI_INT_EN 0x10 | ||
40 | #define S3C64XX_SPI_STATUS 0x14 | ||
41 | #define S3C64XX_SPI_TX_DATA 0x18 | ||
42 | #define S3C64XX_SPI_RX_DATA 0x1C | ||
43 | #define S3C64XX_SPI_PACKET_CNT 0x20 | ||
44 | #define S3C64XX_SPI_PENDING_CLR 0x24 | ||
45 | #define S3C64XX_SPI_SWAP_CFG 0x28 | ||
46 | #define S3C64XX_SPI_FB_CLK 0x2C | ||
47 | |||
48 | #define S3C64XX_SPI_CH_HS_EN (1<<6) /* High Speed Enable */ | ||
49 | #define S3C64XX_SPI_CH_SW_RST (1<<5) | ||
50 | #define S3C64XX_SPI_CH_SLAVE (1<<4) | ||
51 | #define S3C64XX_SPI_CPOL_L (1<<3) | ||
52 | #define S3C64XX_SPI_CPHA_B (1<<2) | ||
53 | #define S3C64XX_SPI_CH_RXCH_ON (1<<1) | ||
54 | #define S3C64XX_SPI_CH_TXCH_ON (1<<0) | ||
55 | |||
56 | #define S3C64XX_SPI_CLKSEL_SRCMSK (3<<9) | ||
57 | #define S3C64XX_SPI_CLKSEL_SRCSHFT 9 | ||
58 | #define S3C64XX_SPI_ENCLK_ENABLE (1<<8) | ||
59 | #define S3C64XX_SPI_PSR_MASK 0xff | ||
60 | |||
61 | #define S3C64XX_SPI_MODE_CH_TSZ_BYTE (0<<29) | ||
62 | #define S3C64XX_SPI_MODE_CH_TSZ_HALFWORD (1<<29) | ||
63 | #define S3C64XX_SPI_MODE_CH_TSZ_WORD (2<<29) | ||
64 | #define S3C64XX_SPI_MODE_CH_TSZ_MASK (3<<29) | ||
65 | #define S3C64XX_SPI_MODE_BUS_TSZ_BYTE (0<<17) | ||
66 | #define S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD (1<<17) | ||
67 | #define S3C64XX_SPI_MODE_BUS_TSZ_WORD (2<<17) | ||
68 | #define S3C64XX_SPI_MODE_BUS_TSZ_MASK (3<<17) | ||
69 | #define S3C64XX_SPI_MODE_RXDMA_ON (1<<2) | ||
70 | #define S3C64XX_SPI_MODE_TXDMA_ON (1<<1) | ||
71 | #define S3C64XX_SPI_MODE_4BURST (1<<0) | ||
72 | |||
73 | #define S3C64XX_SPI_SLAVE_AUTO (1<<1) | ||
74 | #define S3C64XX_SPI_SLAVE_SIG_INACT (1<<0) | ||
75 | |||
76 | #define S3C64XX_SPI_ACT(c) writel(0, (c)->regs + S3C64XX_SPI_SLAVE_SEL) | ||
77 | |||
78 | #define S3C64XX_SPI_DEACT(c) writel(S3C64XX_SPI_SLAVE_SIG_INACT, \ | ||
79 | (c)->regs + S3C64XX_SPI_SLAVE_SEL) | ||
80 | |||
81 | #define S3C64XX_SPI_INT_TRAILING_EN (1<<6) | ||
82 | #define S3C64XX_SPI_INT_RX_OVERRUN_EN (1<<5) | ||
83 | #define S3C64XX_SPI_INT_RX_UNDERRUN_EN (1<<4) | ||
84 | #define S3C64XX_SPI_INT_TX_OVERRUN_EN (1<<3) | ||
85 | #define S3C64XX_SPI_INT_TX_UNDERRUN_EN (1<<2) | ||
86 | #define S3C64XX_SPI_INT_RX_FIFORDY_EN (1<<1) | ||
87 | #define S3C64XX_SPI_INT_TX_FIFORDY_EN (1<<0) | ||
88 | |||
89 | #define S3C64XX_SPI_ST_RX_OVERRUN_ERR (1<<5) | ||
90 | #define S3C64XX_SPI_ST_RX_UNDERRUN_ERR (1<<4) | ||
91 | #define S3C64XX_SPI_ST_TX_OVERRUN_ERR (1<<3) | ||
92 | #define S3C64XX_SPI_ST_TX_UNDERRUN_ERR (1<<2) | ||
93 | #define S3C64XX_SPI_ST_RX_FIFORDY (1<<1) | ||
94 | #define S3C64XX_SPI_ST_TX_FIFORDY (1<<0) | ||
95 | |||
96 | #define S3C64XX_SPI_PACKET_CNT_EN (1<<16) | ||
97 | |||
98 | #define S3C64XX_SPI_PND_TX_UNDERRUN_CLR (1<<4) | ||
99 | #define S3C64XX_SPI_PND_TX_OVERRUN_CLR (1<<3) | ||
100 | #define S3C64XX_SPI_PND_RX_UNDERRUN_CLR (1<<2) | ||
101 | #define S3C64XX_SPI_PND_RX_OVERRUN_CLR (1<<1) | ||
102 | #define S3C64XX_SPI_PND_TRAILING_CLR (1<<0) | ||
103 | |||
104 | #define S3C64XX_SPI_SWAP_RX_HALF_WORD (1<<7) | ||
105 | #define S3C64XX_SPI_SWAP_RX_BYTE (1<<6) | ||
106 | #define S3C64XX_SPI_SWAP_RX_BIT (1<<5) | ||
107 | #define S3C64XX_SPI_SWAP_RX_EN (1<<4) | ||
108 | #define S3C64XX_SPI_SWAP_TX_HALF_WORD (1<<3) | ||
109 | #define S3C64XX_SPI_SWAP_TX_BYTE (1<<2) | ||
110 | #define S3C64XX_SPI_SWAP_TX_BIT (1<<1) | ||
111 | #define S3C64XX_SPI_SWAP_TX_EN (1<<0) | ||
112 | |||
113 | #define S3C64XX_SPI_FBCLK_MSK (3<<0) | ||
114 | |||
115 | #define S3C64XX_SPI_ST_TRLCNTZ(v, i) ((((v) >> (i)->rx_lvl_offset) & \ | ||
116 | (((i)->fifo_lvl_mask + 1))) \ | ||
117 | ? 1 : 0) | ||
118 | |||
119 | #define S3C64XX_SPI_ST_TX_DONE(v, i) ((((v) >> (i)->rx_lvl_offset) & \ | ||
120 | (((i)->fifo_lvl_mask + 1) << 1)) \ | ||
121 | ? 1 : 0) | ||
122 | #define TX_FIFO_LVL(v, i) (((v) >> 6) & (i)->fifo_lvl_mask) | ||
123 | #define RX_FIFO_LVL(v, i) (((v) >> (i)->rx_lvl_offset) & (i)->fifo_lvl_mask) | ||
124 | |||
125 | #define S3C64XX_SPI_MAX_TRAILCNT 0x3ff | ||
126 | #define S3C64XX_SPI_TRAILCNT_OFF 19 | ||
127 | |||
128 | #define S3C64XX_SPI_TRAILCNT S3C64XX_SPI_MAX_TRAILCNT | ||
129 | |||
130 | #define msecs_to_loops(t) (loops_per_jiffy / 1000 * HZ * t) | ||
131 | |||
132 | #define SUSPND (1<<0) | ||
133 | #define SPIBUSY (1<<1) | ||
134 | #define RXBUSY (1<<2) | ||
135 | #define TXBUSY (1<<3) | ||
136 | |||
137 | /** | ||
138 | * struct s3c64xx_spi_driver_data - Runtime info holder for SPI driver. | ||
139 | * @clk: Pointer to the spi clock. | ||
140 | * @master: Pointer to the SPI Protocol master. | ||
141 | * @workqueue: Work queue for the SPI xfer requests. | ||
142 | * @cntrlr_info: Platform specific data for the controller this driver manages. | ||
143 | * @tgl_spi: Pointer to the last CS left untoggled by the cs_change hint. | ||
144 | * @work: Work | ||
145 | * @queue: To log SPI xfer requests. | ||
146 | * @lock: Controller specific lock. | ||
147 | * @state: Set of FLAGS to indicate status. | ||
148 | * @rx_dmach: Controller's DMA channel for Rx. | ||
149 | * @tx_dmach: Controller's DMA channel for Tx. | ||
150 | * @sfr_start: BUS address of SPI controller regs. | ||
151 | * @regs: Pointer to ioremap'ed controller registers. | ||
152 | * @xfer_completion: To indicate completion of xfer task. | ||
153 | * @cur_mode: Stores the active configuration of the controller. | ||
154 | * @cur_bpw: Stores the active bits per word settings. | ||
155 | * @cur_speed: Stores the active xfer clock speed. | ||
156 | */ | ||
157 | struct s3c64xx_spi_driver_data { | ||
158 | void __iomem *regs; | ||
159 | struct clk *clk; | ||
160 | struct platform_device *pdev; | ||
161 | struct spi_master *master; | ||
162 | struct workqueue_struct *workqueue; | ||
163 | struct s3c64xx_spi_cntrlr_info *cntrlr_info; | ||
164 | struct spi_device *tgl_spi; | ||
165 | struct work_struct work; | ||
166 | struct list_head queue; | ||
167 | spinlock_t lock; | ||
168 | enum dma_ch rx_dmach; | ||
169 | enum dma_ch tx_dmach; | ||
170 | unsigned long sfr_start; | ||
171 | struct completion xfer_completion; | ||
172 | unsigned state; | ||
173 | unsigned cur_mode, cur_bpw; | ||
174 | unsigned cur_speed; | ||
175 | }; | ||
176 | |||
177 | static struct s3c2410_dma_client s3c64xx_spi_dma_client = { | ||
178 | .name = "samsung-spi-dma", | ||
179 | }; | ||
180 | |||
181 | static void flush_fifo(struct s3c64xx_spi_driver_data *sdd) | ||
182 | { | ||
183 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
184 | void __iomem *regs = sdd->regs; | ||
185 | unsigned long loops; | ||
186 | u32 val; | ||
187 | |||
188 | writel(0, regs + S3C64XX_SPI_PACKET_CNT); | ||
189 | |||
190 | val = readl(regs + S3C64XX_SPI_CH_CFG); | ||
191 | val |= S3C64XX_SPI_CH_SW_RST; | ||
192 | val &= ~S3C64XX_SPI_CH_HS_EN; | ||
193 | writel(val, regs + S3C64XX_SPI_CH_CFG); | ||
194 | |||
195 | /* Flush TxFIFO*/ | ||
196 | loops = msecs_to_loops(1); | ||
197 | do { | ||
198 | val = readl(regs + S3C64XX_SPI_STATUS); | ||
199 | } while (TX_FIFO_LVL(val, sci) && loops--); | ||
200 | |||
201 | /* Flush RxFIFO*/ | ||
202 | loops = msecs_to_loops(1); | ||
203 | do { | ||
204 | val = readl(regs + S3C64XX_SPI_STATUS); | ||
205 | if (RX_FIFO_LVL(val, sci)) | ||
206 | readl(regs + S3C64XX_SPI_RX_DATA); | ||
207 | else | ||
208 | break; | ||
209 | } while (loops--); | ||
210 | |||
211 | val = readl(regs + S3C64XX_SPI_CH_CFG); | ||
212 | val &= ~S3C64XX_SPI_CH_SW_RST; | ||
213 | writel(val, regs + S3C64XX_SPI_CH_CFG); | ||
214 | |||
215 | val = readl(regs + S3C64XX_SPI_MODE_CFG); | ||
216 | val &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON); | ||
217 | writel(val, regs + S3C64XX_SPI_MODE_CFG); | ||
218 | |||
219 | val = readl(regs + S3C64XX_SPI_CH_CFG); | ||
220 | val &= ~(S3C64XX_SPI_CH_RXCH_ON | S3C64XX_SPI_CH_TXCH_ON); | ||
221 | writel(val, regs + S3C64XX_SPI_CH_CFG); | ||
222 | } | ||
223 | |||
224 | static void enable_datapath(struct s3c64xx_spi_driver_data *sdd, | ||
225 | struct spi_device *spi, | ||
226 | struct spi_transfer *xfer, int dma_mode) | ||
227 | { | ||
228 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
229 | void __iomem *regs = sdd->regs; | ||
230 | u32 modecfg, chcfg; | ||
231 | |||
232 | modecfg = readl(regs + S3C64XX_SPI_MODE_CFG); | ||
233 | modecfg &= ~(S3C64XX_SPI_MODE_TXDMA_ON | S3C64XX_SPI_MODE_RXDMA_ON); | ||
234 | |||
235 | chcfg = readl(regs + S3C64XX_SPI_CH_CFG); | ||
236 | chcfg &= ~S3C64XX_SPI_CH_TXCH_ON; | ||
237 | |||
238 | if (dma_mode) { | ||
239 | chcfg &= ~S3C64XX_SPI_CH_RXCH_ON; | ||
240 | } else { | ||
241 | /* Always shift in data in FIFO, even if xfer is Tx only, | ||
242 | * this helps setting PCKT_CNT value for generating clocks | ||
243 | * as exactly needed. | ||
244 | */ | ||
245 | chcfg |= S3C64XX_SPI_CH_RXCH_ON; | ||
246 | writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) | ||
247 | | S3C64XX_SPI_PACKET_CNT_EN, | ||
248 | regs + S3C64XX_SPI_PACKET_CNT); | ||
249 | } | ||
250 | |||
251 | if (xfer->tx_buf != NULL) { | ||
252 | sdd->state |= TXBUSY; | ||
253 | chcfg |= S3C64XX_SPI_CH_TXCH_ON; | ||
254 | if (dma_mode) { | ||
255 | modecfg |= S3C64XX_SPI_MODE_TXDMA_ON; | ||
256 | s3c2410_dma_config(sdd->tx_dmach, 1); | ||
257 | s3c2410_dma_enqueue(sdd->tx_dmach, (void *)sdd, | ||
258 | xfer->tx_dma, xfer->len); | ||
259 | s3c2410_dma_ctrl(sdd->tx_dmach, S3C2410_DMAOP_START); | ||
260 | } else { | ||
261 | unsigned char *buf = (unsigned char *) xfer->tx_buf; | ||
262 | int i = 0; | ||
263 | while (i < xfer->len) | ||
264 | writeb(buf[i++], regs + S3C64XX_SPI_TX_DATA); | ||
265 | } | ||
266 | } | ||
267 | |||
268 | if (xfer->rx_buf != NULL) { | ||
269 | sdd->state |= RXBUSY; | ||
270 | |||
271 | if (sci->high_speed && sdd->cur_speed >= 30000000UL | ||
272 | && !(sdd->cur_mode & SPI_CPHA)) | ||
273 | chcfg |= S3C64XX_SPI_CH_HS_EN; | ||
274 | |||
275 | if (dma_mode) { | ||
276 | modecfg |= S3C64XX_SPI_MODE_RXDMA_ON; | ||
277 | chcfg |= S3C64XX_SPI_CH_RXCH_ON; | ||
278 | writel(((xfer->len * 8 / sdd->cur_bpw) & 0xffff) | ||
279 | | S3C64XX_SPI_PACKET_CNT_EN, | ||
280 | regs + S3C64XX_SPI_PACKET_CNT); | ||
281 | s3c2410_dma_config(sdd->rx_dmach, 1); | ||
282 | s3c2410_dma_enqueue(sdd->rx_dmach, (void *)sdd, | ||
283 | xfer->rx_dma, xfer->len); | ||
284 | s3c2410_dma_ctrl(sdd->rx_dmach, S3C2410_DMAOP_START); | ||
285 | } | ||
286 | } | ||
287 | |||
288 | writel(modecfg, regs + S3C64XX_SPI_MODE_CFG); | ||
289 | writel(chcfg, regs + S3C64XX_SPI_CH_CFG); | ||
290 | } | ||
291 | |||
292 | static inline void enable_cs(struct s3c64xx_spi_driver_data *sdd, | ||
293 | struct spi_device *spi) | ||
294 | { | ||
295 | struct s3c64xx_spi_csinfo *cs; | ||
296 | |||
297 | if (sdd->tgl_spi != NULL) { /* If last device toggled after mssg */ | ||
298 | if (sdd->tgl_spi != spi) { /* if last mssg on diff device */ | ||
299 | /* Deselect the last toggled device */ | ||
300 | cs = sdd->tgl_spi->controller_data; | ||
301 | cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1); | ||
302 | } | ||
303 | sdd->tgl_spi = NULL; | ||
304 | } | ||
305 | |||
306 | cs = spi->controller_data; | ||
307 | cs->set_level(spi->mode & SPI_CS_HIGH ? 1 : 0); | ||
308 | } | ||
309 | |||
310 | static int wait_for_xfer(struct s3c64xx_spi_driver_data *sdd, | ||
311 | struct spi_transfer *xfer, int dma_mode) | ||
312 | { | ||
313 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
314 | void __iomem *regs = sdd->regs; | ||
315 | unsigned long val; | ||
316 | int ms; | ||
317 | |||
318 | /* millisecs to xfer 'len' bytes @ 'cur_speed' */ | ||
319 | ms = xfer->len * 8 * 1000 / sdd->cur_speed; | ||
320 | ms += 5; /* some tolerance */ | ||
321 | |||
322 | if (dma_mode) { | ||
323 | val = msecs_to_jiffies(ms) + 10; | ||
324 | val = wait_for_completion_timeout(&sdd->xfer_completion, val); | ||
325 | } else { | ||
326 | val = msecs_to_loops(ms); | ||
327 | do { | ||
328 | val = readl(regs + S3C64XX_SPI_STATUS); | ||
329 | } while (RX_FIFO_LVL(val, sci) < xfer->len && --val); | ||
330 | } | ||
331 | |||
332 | if (!val) | ||
333 | return -EIO; | ||
334 | |||
335 | if (dma_mode) { | ||
336 | u32 status; | ||
337 | |||
338 | /* | ||
339 | * DmaTx returns after simply writing data in the FIFO, | ||
340 | * w/o waiting for real transmission on the bus to finish. | ||
341 | * DmaRx returns only after Dma read data from FIFO which | ||
342 | * needs bus transmission to finish, so we don't worry if | ||
343 | * Xfer involved Rx(with or without Tx). | ||
344 | */ | ||
345 | if (xfer->rx_buf == NULL) { | ||
346 | val = msecs_to_loops(10); | ||
347 | status = readl(regs + S3C64XX_SPI_STATUS); | ||
348 | while ((TX_FIFO_LVL(status, sci) | ||
349 | || !S3C64XX_SPI_ST_TX_DONE(status, sci)) | ||
350 | && --val) { | ||
351 | cpu_relax(); | ||
352 | status = readl(regs + S3C64XX_SPI_STATUS); | ||
353 | } | ||
354 | |||
355 | if (!val) | ||
356 | return -EIO; | ||
357 | } | ||
358 | } else { | ||
359 | unsigned char *buf; | ||
360 | int i; | ||
361 | |||
362 | /* If it was only Tx */ | ||
363 | if (xfer->rx_buf == NULL) { | ||
364 | sdd->state &= ~TXBUSY; | ||
365 | return 0; | ||
366 | } | ||
367 | |||
368 | i = 0; | ||
369 | buf = xfer->rx_buf; | ||
370 | while (i < xfer->len) | ||
371 | buf[i++] = readb(regs + S3C64XX_SPI_RX_DATA); | ||
372 | |||
373 | sdd->state &= ~RXBUSY; | ||
374 | } | ||
375 | |||
376 | return 0; | ||
377 | } | ||
378 | |||
379 | static inline void disable_cs(struct s3c64xx_spi_driver_data *sdd, | ||
380 | struct spi_device *spi) | ||
381 | { | ||
382 | struct s3c64xx_spi_csinfo *cs = spi->controller_data; | ||
383 | |||
384 | if (sdd->tgl_spi == spi) | ||
385 | sdd->tgl_spi = NULL; | ||
386 | |||
387 | cs->set_level(spi->mode & SPI_CS_HIGH ? 0 : 1); | ||
388 | } | ||
389 | |||
390 | static void s3c64xx_spi_config(struct s3c64xx_spi_driver_data *sdd) | ||
391 | { | ||
392 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
393 | void __iomem *regs = sdd->regs; | ||
394 | u32 val; | ||
395 | |||
396 | /* Disable Clock */ | ||
397 | val = readl(regs + S3C64XX_SPI_CLK_CFG); | ||
398 | val &= ~S3C64XX_SPI_ENCLK_ENABLE; | ||
399 | writel(val, regs + S3C64XX_SPI_CLK_CFG); | ||
400 | |||
401 | /* Set Polarity and Phase */ | ||
402 | val = readl(regs + S3C64XX_SPI_CH_CFG); | ||
403 | val &= ~(S3C64XX_SPI_CH_SLAVE | | ||
404 | S3C64XX_SPI_CPOL_L | | ||
405 | S3C64XX_SPI_CPHA_B); | ||
406 | |||
407 | if (sdd->cur_mode & SPI_CPOL) | ||
408 | val |= S3C64XX_SPI_CPOL_L; | ||
409 | |||
410 | if (sdd->cur_mode & SPI_CPHA) | ||
411 | val |= S3C64XX_SPI_CPHA_B; | ||
412 | |||
413 | writel(val, regs + S3C64XX_SPI_CH_CFG); | ||
414 | |||
415 | /* Set Channel & DMA Mode */ | ||
416 | val = readl(regs + S3C64XX_SPI_MODE_CFG); | ||
417 | val &= ~(S3C64XX_SPI_MODE_BUS_TSZ_MASK | ||
418 | | S3C64XX_SPI_MODE_CH_TSZ_MASK); | ||
419 | |||
420 | switch (sdd->cur_bpw) { | ||
421 | case 32: | ||
422 | val |= S3C64XX_SPI_MODE_BUS_TSZ_WORD; | ||
423 | break; | ||
424 | case 16: | ||
425 | val |= S3C64XX_SPI_MODE_BUS_TSZ_HALFWORD; | ||
426 | break; | ||
427 | default: | ||
428 | val |= S3C64XX_SPI_MODE_BUS_TSZ_BYTE; | ||
429 | break; | ||
430 | } | ||
431 | val |= S3C64XX_SPI_MODE_CH_TSZ_BYTE; /* Always 8bits wide */ | ||
432 | |||
433 | writel(val, regs + S3C64XX_SPI_MODE_CFG); | ||
434 | |||
435 | /* Configure Clock */ | ||
436 | val = readl(regs + S3C64XX_SPI_CLK_CFG); | ||
437 | val &= ~S3C64XX_SPI_PSR_MASK; | ||
438 | val |= ((clk_get_rate(sci->src_clk) / sdd->cur_speed / 2 - 1) | ||
439 | & S3C64XX_SPI_PSR_MASK); | ||
440 | writel(val, regs + S3C64XX_SPI_CLK_CFG); | ||
441 | |||
442 | /* Enable Clock */ | ||
443 | val = readl(regs + S3C64XX_SPI_CLK_CFG); | ||
444 | val |= S3C64XX_SPI_ENCLK_ENABLE; | ||
445 | writel(val, regs + S3C64XX_SPI_CLK_CFG); | ||
446 | } | ||
447 | |||
448 | void s3c64xx_spi_dma_rxcb(struct s3c2410_dma_chan *chan, void *buf_id, | ||
449 | int size, enum s3c2410_dma_buffresult res) | ||
450 | { | ||
451 | struct s3c64xx_spi_driver_data *sdd = buf_id; | ||
452 | unsigned long flags; | ||
453 | |||
454 | spin_lock_irqsave(&sdd->lock, flags); | ||
455 | |||
456 | if (res == S3C2410_RES_OK) | ||
457 | sdd->state &= ~RXBUSY; | ||
458 | else | ||
459 | dev_err(&sdd->pdev->dev, "DmaAbrtRx-%d\n", size); | ||
460 | |||
461 | /* If the other done */ | ||
462 | if (!(sdd->state & TXBUSY)) | ||
463 | complete(&sdd->xfer_completion); | ||
464 | |||
465 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
466 | } | ||
467 | |||
468 | void s3c64xx_spi_dma_txcb(struct s3c2410_dma_chan *chan, void *buf_id, | ||
469 | int size, enum s3c2410_dma_buffresult res) | ||
470 | { | ||
471 | struct s3c64xx_spi_driver_data *sdd = buf_id; | ||
472 | unsigned long flags; | ||
473 | |||
474 | spin_lock_irqsave(&sdd->lock, flags); | ||
475 | |||
476 | if (res == S3C2410_RES_OK) | ||
477 | sdd->state &= ~TXBUSY; | ||
478 | else | ||
479 | dev_err(&sdd->pdev->dev, "DmaAbrtTx-%d \n", size); | ||
480 | |||
481 | /* If the other done */ | ||
482 | if (!(sdd->state & RXBUSY)) | ||
483 | complete(&sdd->xfer_completion); | ||
484 | |||
485 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
486 | } | ||
487 | |||
488 | #define XFER_DMAADDR_INVALID DMA_BIT_MASK(32) | ||
489 | |||
490 | static int s3c64xx_spi_map_mssg(struct s3c64xx_spi_driver_data *sdd, | ||
491 | struct spi_message *msg) | ||
492 | { | ||
493 | struct device *dev = &sdd->pdev->dev; | ||
494 | struct spi_transfer *xfer; | ||
495 | |||
496 | if (msg->is_dma_mapped) | ||
497 | return 0; | ||
498 | |||
499 | /* First mark all xfer unmapped */ | ||
500 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
501 | xfer->rx_dma = XFER_DMAADDR_INVALID; | ||
502 | xfer->tx_dma = XFER_DMAADDR_INVALID; | ||
503 | } | ||
504 | |||
505 | /* Map until end or first fail */ | ||
506 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
507 | |||
508 | if (xfer->tx_buf != NULL) { | ||
509 | xfer->tx_dma = dma_map_single(dev, xfer->tx_buf, | ||
510 | xfer->len, DMA_TO_DEVICE); | ||
511 | if (dma_mapping_error(dev, xfer->tx_dma)) { | ||
512 | dev_err(dev, "dma_map_single Tx failed\n"); | ||
513 | xfer->tx_dma = XFER_DMAADDR_INVALID; | ||
514 | return -ENOMEM; | ||
515 | } | ||
516 | } | ||
517 | |||
518 | if (xfer->rx_buf != NULL) { | ||
519 | xfer->rx_dma = dma_map_single(dev, xfer->rx_buf, | ||
520 | xfer->len, DMA_FROM_DEVICE); | ||
521 | if (dma_mapping_error(dev, xfer->rx_dma)) { | ||
522 | dev_err(dev, "dma_map_single Rx failed\n"); | ||
523 | dma_unmap_single(dev, xfer->tx_dma, | ||
524 | xfer->len, DMA_TO_DEVICE); | ||
525 | xfer->tx_dma = XFER_DMAADDR_INVALID; | ||
526 | xfer->rx_dma = XFER_DMAADDR_INVALID; | ||
527 | return -ENOMEM; | ||
528 | } | ||
529 | } | ||
530 | } | ||
531 | |||
532 | return 0; | ||
533 | } | ||
534 | |||
535 | static void s3c64xx_spi_unmap_mssg(struct s3c64xx_spi_driver_data *sdd, | ||
536 | struct spi_message *msg) | ||
537 | { | ||
538 | struct device *dev = &sdd->pdev->dev; | ||
539 | struct spi_transfer *xfer; | ||
540 | |||
541 | if (msg->is_dma_mapped) | ||
542 | return; | ||
543 | |||
544 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
545 | |||
546 | if (xfer->rx_buf != NULL | ||
547 | && xfer->rx_dma != XFER_DMAADDR_INVALID) | ||
548 | dma_unmap_single(dev, xfer->rx_dma, | ||
549 | xfer->len, DMA_FROM_DEVICE); | ||
550 | |||
551 | if (xfer->tx_buf != NULL | ||
552 | && xfer->tx_dma != XFER_DMAADDR_INVALID) | ||
553 | dma_unmap_single(dev, xfer->tx_dma, | ||
554 | xfer->len, DMA_TO_DEVICE); | ||
555 | } | ||
556 | } | ||
557 | |||
558 | static void handle_msg(struct s3c64xx_spi_driver_data *sdd, | ||
559 | struct spi_message *msg) | ||
560 | { | ||
561 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
562 | struct spi_device *spi = msg->spi; | ||
563 | struct s3c64xx_spi_csinfo *cs = spi->controller_data; | ||
564 | struct spi_transfer *xfer; | ||
565 | int status = 0, cs_toggle = 0; | ||
566 | u32 speed; | ||
567 | u8 bpw; | ||
568 | |||
569 | /* If Master's(controller) state differs from that needed by Slave */ | ||
570 | if (sdd->cur_speed != spi->max_speed_hz | ||
571 | || sdd->cur_mode != spi->mode | ||
572 | || sdd->cur_bpw != spi->bits_per_word) { | ||
573 | sdd->cur_bpw = spi->bits_per_word; | ||
574 | sdd->cur_speed = spi->max_speed_hz; | ||
575 | sdd->cur_mode = spi->mode; | ||
576 | s3c64xx_spi_config(sdd); | ||
577 | } | ||
578 | |||
579 | /* Map all the transfers if needed */ | ||
580 | if (s3c64xx_spi_map_mssg(sdd, msg)) { | ||
581 | dev_err(&spi->dev, | ||
582 | "Xfer: Unable to map message buffers!\n"); | ||
583 | status = -ENOMEM; | ||
584 | goto out; | ||
585 | } | ||
586 | |||
587 | /* Configure feedback delay */ | ||
588 | writel(cs->fb_delay & 0x3, sdd->regs + S3C64XX_SPI_FB_CLK); | ||
589 | |||
590 | list_for_each_entry(xfer, &msg->transfers, transfer_list) { | ||
591 | |||
592 | unsigned long flags; | ||
593 | int use_dma; | ||
594 | |||
595 | INIT_COMPLETION(sdd->xfer_completion); | ||
596 | |||
597 | /* Only BPW and Speed may change across transfers */ | ||
598 | bpw = xfer->bits_per_word ? : spi->bits_per_word; | ||
599 | speed = xfer->speed_hz ? : spi->max_speed_hz; | ||
600 | |||
601 | if (bpw != sdd->cur_bpw || speed != sdd->cur_speed) { | ||
602 | sdd->cur_bpw = bpw; | ||
603 | sdd->cur_speed = speed; | ||
604 | s3c64xx_spi_config(sdd); | ||
605 | } | ||
606 | |||
607 | /* Polling method for xfers not bigger than FIFO capacity */ | ||
608 | if (xfer->len <= ((sci->fifo_lvl_mask >> 1) + 1)) | ||
609 | use_dma = 0; | ||
610 | else | ||
611 | use_dma = 1; | ||
612 | |||
613 | spin_lock_irqsave(&sdd->lock, flags); | ||
614 | |||
615 | /* Pending only which is to be done */ | ||
616 | sdd->state &= ~RXBUSY; | ||
617 | sdd->state &= ~TXBUSY; | ||
618 | |||
619 | enable_datapath(sdd, spi, xfer, use_dma); | ||
620 | |||
621 | /* Slave Select */ | ||
622 | enable_cs(sdd, spi); | ||
623 | |||
624 | /* Start the signals */ | ||
625 | S3C64XX_SPI_ACT(sdd); | ||
626 | |||
627 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
628 | |||
629 | status = wait_for_xfer(sdd, xfer, use_dma); | ||
630 | |||
631 | /* Quiese the signals */ | ||
632 | S3C64XX_SPI_DEACT(sdd); | ||
633 | |||
634 | if (status) { | ||
635 | dev_err(&spi->dev, "I/O Error: \ | ||
636 | rx-%d tx-%d res:rx-%c tx-%c len-%d\n", | ||
637 | xfer->rx_buf ? 1 : 0, xfer->tx_buf ? 1 : 0, | ||
638 | (sdd->state & RXBUSY) ? 'f' : 'p', | ||
639 | (sdd->state & TXBUSY) ? 'f' : 'p', | ||
640 | xfer->len); | ||
641 | |||
642 | if (use_dma) { | ||
643 | if (xfer->tx_buf != NULL | ||
644 | && (sdd->state & TXBUSY)) | ||
645 | s3c2410_dma_ctrl(sdd->tx_dmach, | ||
646 | S3C2410_DMAOP_FLUSH); | ||
647 | if (xfer->rx_buf != NULL | ||
648 | && (sdd->state & RXBUSY)) | ||
649 | s3c2410_dma_ctrl(sdd->rx_dmach, | ||
650 | S3C2410_DMAOP_FLUSH); | ||
651 | } | ||
652 | |||
653 | goto out; | ||
654 | } | ||
655 | |||
656 | if (xfer->delay_usecs) | ||
657 | udelay(xfer->delay_usecs); | ||
658 | |||
659 | if (xfer->cs_change) { | ||
660 | /* Hint that the next mssg is gonna be | ||
661 | for the same device */ | ||
662 | if (list_is_last(&xfer->transfer_list, | ||
663 | &msg->transfers)) | ||
664 | cs_toggle = 1; | ||
665 | else | ||
666 | disable_cs(sdd, spi); | ||
667 | } | ||
668 | |||
669 | msg->actual_length += xfer->len; | ||
670 | |||
671 | flush_fifo(sdd); | ||
672 | } | ||
673 | |||
674 | out: | ||
675 | if (!cs_toggle || status) | ||
676 | disable_cs(sdd, spi); | ||
677 | else | ||
678 | sdd->tgl_spi = spi; | ||
679 | |||
680 | s3c64xx_spi_unmap_mssg(sdd, msg); | ||
681 | |||
682 | msg->status = status; | ||
683 | |||
684 | if (msg->complete) | ||
685 | msg->complete(msg->context); | ||
686 | } | ||
687 | |||
688 | static int acquire_dma(struct s3c64xx_spi_driver_data *sdd) | ||
689 | { | ||
690 | if (s3c2410_dma_request(sdd->rx_dmach, | ||
691 | &s3c64xx_spi_dma_client, NULL) < 0) { | ||
692 | dev_err(&sdd->pdev->dev, "cannot get RxDMA\n"); | ||
693 | return 0; | ||
694 | } | ||
695 | s3c2410_dma_set_buffdone_fn(sdd->rx_dmach, s3c64xx_spi_dma_rxcb); | ||
696 | s3c2410_dma_devconfig(sdd->rx_dmach, S3C2410_DMASRC_HW, | ||
697 | sdd->sfr_start + S3C64XX_SPI_RX_DATA); | ||
698 | |||
699 | if (s3c2410_dma_request(sdd->tx_dmach, | ||
700 | &s3c64xx_spi_dma_client, NULL) < 0) { | ||
701 | dev_err(&sdd->pdev->dev, "cannot get TxDMA\n"); | ||
702 | s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client); | ||
703 | return 0; | ||
704 | } | ||
705 | s3c2410_dma_set_buffdone_fn(sdd->tx_dmach, s3c64xx_spi_dma_txcb); | ||
706 | s3c2410_dma_devconfig(sdd->tx_dmach, S3C2410_DMASRC_MEM, | ||
707 | sdd->sfr_start + S3C64XX_SPI_TX_DATA); | ||
708 | |||
709 | return 1; | ||
710 | } | ||
711 | |||
712 | static void s3c64xx_spi_work(struct work_struct *work) | ||
713 | { | ||
714 | struct s3c64xx_spi_driver_data *sdd = container_of(work, | ||
715 | struct s3c64xx_spi_driver_data, work); | ||
716 | unsigned long flags; | ||
717 | |||
718 | /* Acquire DMA channels */ | ||
719 | while (!acquire_dma(sdd)) | ||
720 | msleep(10); | ||
721 | |||
722 | spin_lock_irqsave(&sdd->lock, flags); | ||
723 | |||
724 | while (!list_empty(&sdd->queue) | ||
725 | && !(sdd->state & SUSPND)) { | ||
726 | |||
727 | struct spi_message *msg; | ||
728 | |||
729 | msg = container_of(sdd->queue.next, struct spi_message, queue); | ||
730 | |||
731 | list_del_init(&msg->queue); | ||
732 | |||
733 | /* Set Xfer busy flag */ | ||
734 | sdd->state |= SPIBUSY; | ||
735 | |||
736 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
737 | |||
738 | handle_msg(sdd, msg); | ||
739 | |||
740 | spin_lock_irqsave(&sdd->lock, flags); | ||
741 | |||
742 | sdd->state &= ~SPIBUSY; | ||
743 | } | ||
744 | |||
745 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
746 | |||
747 | /* Free DMA channels */ | ||
748 | s3c2410_dma_free(sdd->tx_dmach, &s3c64xx_spi_dma_client); | ||
749 | s3c2410_dma_free(sdd->rx_dmach, &s3c64xx_spi_dma_client); | ||
750 | } | ||
751 | |||
752 | static int s3c64xx_spi_transfer(struct spi_device *spi, | ||
753 | struct spi_message *msg) | ||
754 | { | ||
755 | struct s3c64xx_spi_driver_data *sdd; | ||
756 | unsigned long flags; | ||
757 | |||
758 | sdd = spi_master_get_devdata(spi->master); | ||
759 | |||
760 | spin_lock_irqsave(&sdd->lock, flags); | ||
761 | |||
762 | if (sdd->state & SUSPND) { | ||
763 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
764 | return -ESHUTDOWN; | ||
765 | } | ||
766 | |||
767 | msg->status = -EINPROGRESS; | ||
768 | msg->actual_length = 0; | ||
769 | |||
770 | list_add_tail(&msg->queue, &sdd->queue); | ||
771 | |||
772 | queue_work(sdd->workqueue, &sdd->work); | ||
773 | |||
774 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
775 | |||
776 | return 0; | ||
777 | } | ||
778 | |||
779 | /* | ||
780 | * Here we only check the validity of requested configuration | ||
781 | * and save the configuration in a local data-structure. | ||
782 | * The controller is actually configured only just before we | ||
783 | * get a message to transfer. | ||
784 | */ | ||
785 | static int s3c64xx_spi_setup(struct spi_device *spi) | ||
786 | { | ||
787 | struct s3c64xx_spi_csinfo *cs = spi->controller_data; | ||
788 | struct s3c64xx_spi_driver_data *sdd; | ||
789 | struct s3c64xx_spi_cntrlr_info *sci; | ||
790 | struct spi_message *msg; | ||
791 | u32 psr, speed; | ||
792 | unsigned long flags; | ||
793 | int err = 0; | ||
794 | |||
795 | if (cs == NULL || cs->set_level == NULL) { | ||
796 | dev_err(&spi->dev, "No CS for SPI(%d)\n", spi->chip_select); | ||
797 | return -ENODEV; | ||
798 | } | ||
799 | |||
800 | sdd = spi_master_get_devdata(spi->master); | ||
801 | sci = sdd->cntrlr_info; | ||
802 | |||
803 | spin_lock_irqsave(&sdd->lock, flags); | ||
804 | |||
805 | list_for_each_entry(msg, &sdd->queue, queue) { | ||
806 | /* Is some mssg is already queued for this device */ | ||
807 | if (msg->spi == spi) { | ||
808 | dev_err(&spi->dev, | ||
809 | "setup: attempt while mssg in queue!\n"); | ||
810 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
811 | return -EBUSY; | ||
812 | } | ||
813 | } | ||
814 | |||
815 | if (sdd->state & SUSPND) { | ||
816 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
817 | dev_err(&spi->dev, | ||
818 | "setup: SPI-%d not active!\n", spi->master->bus_num); | ||
819 | return -ESHUTDOWN; | ||
820 | } | ||
821 | |||
822 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
823 | |||
824 | if (spi->bits_per_word != 8 | ||
825 | && spi->bits_per_word != 16 | ||
826 | && spi->bits_per_word != 32) { | ||
827 | dev_err(&spi->dev, "setup: %dbits/wrd not supported!\n", | ||
828 | spi->bits_per_word); | ||
829 | err = -EINVAL; | ||
830 | goto setup_exit; | ||
831 | } | ||
832 | |||
833 | /* Check if we can provide the requested rate */ | ||
834 | speed = clk_get_rate(sci->src_clk) / 2 / (0 + 1); /* Max possible */ | ||
835 | |||
836 | if (spi->max_speed_hz > speed) | ||
837 | spi->max_speed_hz = speed; | ||
838 | |||
839 | psr = clk_get_rate(sci->src_clk) / 2 / spi->max_speed_hz - 1; | ||
840 | psr &= S3C64XX_SPI_PSR_MASK; | ||
841 | if (psr == S3C64XX_SPI_PSR_MASK) | ||
842 | psr--; | ||
843 | |||
844 | speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1); | ||
845 | if (spi->max_speed_hz < speed) { | ||
846 | if (psr+1 < S3C64XX_SPI_PSR_MASK) { | ||
847 | psr++; | ||
848 | } else { | ||
849 | err = -EINVAL; | ||
850 | goto setup_exit; | ||
851 | } | ||
852 | } | ||
853 | |||
854 | speed = clk_get_rate(sci->src_clk) / 2 / (psr + 1); | ||
855 | if (spi->max_speed_hz >= speed) | ||
856 | spi->max_speed_hz = speed; | ||
857 | else | ||
858 | err = -EINVAL; | ||
859 | |||
860 | setup_exit: | ||
861 | |||
862 | /* setup() returns with device de-selected */ | ||
863 | disable_cs(sdd, spi); | ||
864 | |||
865 | return err; | ||
866 | } | ||
867 | |||
868 | static void s3c64xx_spi_hwinit(struct s3c64xx_spi_driver_data *sdd, int channel) | ||
869 | { | ||
870 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
871 | void __iomem *regs = sdd->regs; | ||
872 | unsigned int val; | ||
873 | |||
874 | sdd->cur_speed = 0; | ||
875 | |||
876 | S3C64XX_SPI_DEACT(sdd); | ||
877 | |||
878 | /* Disable Interrupts - we use Polling if not DMA mode */ | ||
879 | writel(0, regs + S3C64XX_SPI_INT_EN); | ||
880 | |||
881 | writel(sci->src_clk_nr << S3C64XX_SPI_CLKSEL_SRCSHFT, | ||
882 | regs + S3C64XX_SPI_CLK_CFG); | ||
883 | writel(0, regs + S3C64XX_SPI_MODE_CFG); | ||
884 | writel(0, regs + S3C64XX_SPI_PACKET_CNT); | ||
885 | |||
886 | /* Clear any irq pending bits */ | ||
887 | writel(readl(regs + S3C64XX_SPI_PENDING_CLR), | ||
888 | regs + S3C64XX_SPI_PENDING_CLR); | ||
889 | |||
890 | writel(0, regs + S3C64XX_SPI_SWAP_CFG); | ||
891 | |||
892 | val = readl(regs + S3C64XX_SPI_MODE_CFG); | ||
893 | val &= ~S3C64XX_SPI_MODE_4BURST; | ||
894 | val &= ~(S3C64XX_SPI_MAX_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF); | ||
895 | val |= (S3C64XX_SPI_TRAILCNT << S3C64XX_SPI_TRAILCNT_OFF); | ||
896 | writel(val, regs + S3C64XX_SPI_MODE_CFG); | ||
897 | |||
898 | flush_fifo(sdd); | ||
899 | } | ||
900 | |||
901 | static int __init s3c64xx_spi_probe(struct platform_device *pdev) | ||
902 | { | ||
903 | struct resource *mem_res, *dmatx_res, *dmarx_res; | ||
904 | struct s3c64xx_spi_driver_data *sdd; | ||
905 | struct s3c64xx_spi_cntrlr_info *sci; | ||
906 | struct spi_master *master; | ||
907 | int ret; | ||
908 | |||
909 | if (pdev->id < 0) { | ||
910 | dev_err(&pdev->dev, | ||
911 | "Invalid platform device id-%d\n", pdev->id); | ||
912 | return -ENODEV; | ||
913 | } | ||
914 | |||
915 | if (pdev->dev.platform_data == NULL) { | ||
916 | dev_err(&pdev->dev, "platform_data missing!\n"); | ||
917 | return -ENODEV; | ||
918 | } | ||
919 | |||
920 | /* Check for availability of necessary resource */ | ||
921 | |||
922 | dmatx_res = platform_get_resource(pdev, IORESOURCE_DMA, 0); | ||
923 | if (dmatx_res == NULL) { | ||
924 | dev_err(&pdev->dev, "Unable to get SPI-Tx dma resource\n"); | ||
925 | return -ENXIO; | ||
926 | } | ||
927 | |||
928 | dmarx_res = platform_get_resource(pdev, IORESOURCE_DMA, 1); | ||
929 | if (dmarx_res == NULL) { | ||
930 | dev_err(&pdev->dev, "Unable to get SPI-Rx dma resource\n"); | ||
931 | return -ENXIO; | ||
932 | } | ||
933 | |||
934 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
935 | if (mem_res == NULL) { | ||
936 | dev_err(&pdev->dev, "Unable to get SPI MEM resource\n"); | ||
937 | return -ENXIO; | ||
938 | } | ||
939 | |||
940 | master = spi_alloc_master(&pdev->dev, | ||
941 | sizeof(struct s3c64xx_spi_driver_data)); | ||
942 | if (master == NULL) { | ||
943 | dev_err(&pdev->dev, "Unable to allocate SPI Master\n"); | ||
944 | return -ENOMEM; | ||
945 | } | ||
946 | |||
947 | sci = pdev->dev.platform_data; | ||
948 | |||
949 | platform_set_drvdata(pdev, master); | ||
950 | |||
951 | sdd = spi_master_get_devdata(master); | ||
952 | sdd->master = master; | ||
953 | sdd->cntrlr_info = sci; | ||
954 | sdd->pdev = pdev; | ||
955 | sdd->sfr_start = mem_res->start; | ||
956 | sdd->tx_dmach = dmatx_res->start; | ||
957 | sdd->rx_dmach = dmarx_res->start; | ||
958 | |||
959 | sdd->cur_bpw = 8; | ||
960 | |||
961 | master->bus_num = pdev->id; | ||
962 | master->setup = s3c64xx_spi_setup; | ||
963 | master->transfer = s3c64xx_spi_transfer; | ||
964 | master->num_chipselect = sci->num_cs; | ||
965 | master->dma_alignment = 8; | ||
966 | /* the spi->mode bits understood by this driver: */ | ||
967 | master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH; | ||
968 | |||
969 | if (request_mem_region(mem_res->start, | ||
970 | resource_size(mem_res), pdev->name) == NULL) { | ||
971 | dev_err(&pdev->dev, "Req mem region failed\n"); | ||
972 | ret = -ENXIO; | ||
973 | goto err0; | ||
974 | } | ||
975 | |||
976 | sdd->regs = ioremap(mem_res->start, resource_size(mem_res)); | ||
977 | if (sdd->regs == NULL) { | ||
978 | dev_err(&pdev->dev, "Unable to remap IO\n"); | ||
979 | ret = -ENXIO; | ||
980 | goto err1; | ||
981 | } | ||
982 | |||
983 | if (sci->cfg_gpio == NULL || sci->cfg_gpio(pdev)) { | ||
984 | dev_err(&pdev->dev, "Unable to config gpio\n"); | ||
985 | ret = -EBUSY; | ||
986 | goto err2; | ||
987 | } | ||
988 | |||
989 | /* Setup clocks */ | ||
990 | sdd->clk = clk_get(&pdev->dev, "spi"); | ||
991 | if (IS_ERR(sdd->clk)) { | ||
992 | dev_err(&pdev->dev, "Unable to acquire clock 'spi'\n"); | ||
993 | ret = PTR_ERR(sdd->clk); | ||
994 | goto err3; | ||
995 | } | ||
996 | |||
997 | if (clk_enable(sdd->clk)) { | ||
998 | dev_err(&pdev->dev, "Couldn't enable clock 'spi'\n"); | ||
999 | ret = -EBUSY; | ||
1000 | goto err4; | ||
1001 | } | ||
1002 | |||
1003 | if (sci->src_clk_nr == S3C64XX_SPI_SRCCLK_PCLK) | ||
1004 | sci->src_clk = sdd->clk; | ||
1005 | else | ||
1006 | sci->src_clk = clk_get(&pdev->dev, sci->src_clk_name); | ||
1007 | if (IS_ERR(sci->src_clk)) { | ||
1008 | dev_err(&pdev->dev, | ||
1009 | "Unable to acquire clock '%s'\n", sci->src_clk_name); | ||
1010 | ret = PTR_ERR(sci->src_clk); | ||
1011 | goto err5; | ||
1012 | } | ||
1013 | |||
1014 | if (sci->src_clk != sdd->clk && clk_enable(sci->src_clk)) { | ||
1015 | dev_err(&pdev->dev, "Couldn't enable clock '%s'\n", | ||
1016 | sci->src_clk_name); | ||
1017 | ret = -EBUSY; | ||
1018 | goto err6; | ||
1019 | } | ||
1020 | |||
1021 | sdd->workqueue = create_singlethread_workqueue( | ||
1022 | dev_name(master->dev.parent)); | ||
1023 | if (sdd->workqueue == NULL) { | ||
1024 | dev_err(&pdev->dev, "Unable to create workqueue\n"); | ||
1025 | ret = -ENOMEM; | ||
1026 | goto err7; | ||
1027 | } | ||
1028 | |||
1029 | /* Setup Deufult Mode */ | ||
1030 | s3c64xx_spi_hwinit(sdd, pdev->id); | ||
1031 | |||
1032 | spin_lock_init(&sdd->lock); | ||
1033 | init_completion(&sdd->xfer_completion); | ||
1034 | INIT_WORK(&sdd->work, s3c64xx_spi_work); | ||
1035 | INIT_LIST_HEAD(&sdd->queue); | ||
1036 | |||
1037 | if (spi_register_master(master)) { | ||
1038 | dev_err(&pdev->dev, "cannot register SPI master\n"); | ||
1039 | ret = -EBUSY; | ||
1040 | goto err8; | ||
1041 | } | ||
1042 | |||
1043 | dev_dbg(&pdev->dev, "Samsung SoC SPI Driver loaded for Bus SPI-%d \ | ||
1044 | with %d Slaves attached\n", | ||
1045 | pdev->id, master->num_chipselect); | ||
1046 | dev_dbg(&pdev->dev, "\tIOmem=[0x%x-0x%x]\ | ||
1047 | \tDMA=[Rx-%d, Tx-%d]\n", | ||
1048 | mem_res->end, mem_res->start, | ||
1049 | sdd->rx_dmach, sdd->tx_dmach); | ||
1050 | |||
1051 | return 0; | ||
1052 | |||
1053 | err8: | ||
1054 | destroy_workqueue(sdd->workqueue); | ||
1055 | err7: | ||
1056 | if (sci->src_clk != sdd->clk) | ||
1057 | clk_disable(sci->src_clk); | ||
1058 | err6: | ||
1059 | if (sci->src_clk != sdd->clk) | ||
1060 | clk_put(sci->src_clk); | ||
1061 | err5: | ||
1062 | clk_disable(sdd->clk); | ||
1063 | err4: | ||
1064 | clk_put(sdd->clk); | ||
1065 | err3: | ||
1066 | err2: | ||
1067 | iounmap((void *) sdd->regs); | ||
1068 | err1: | ||
1069 | release_mem_region(mem_res->start, resource_size(mem_res)); | ||
1070 | err0: | ||
1071 | platform_set_drvdata(pdev, NULL); | ||
1072 | spi_master_put(master); | ||
1073 | |||
1074 | return ret; | ||
1075 | } | ||
1076 | |||
1077 | static int s3c64xx_spi_remove(struct platform_device *pdev) | ||
1078 | { | ||
1079 | struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); | ||
1080 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); | ||
1081 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
1082 | struct resource *mem_res; | ||
1083 | unsigned long flags; | ||
1084 | |||
1085 | spin_lock_irqsave(&sdd->lock, flags); | ||
1086 | sdd->state |= SUSPND; | ||
1087 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
1088 | |||
1089 | while (sdd->state & SPIBUSY) | ||
1090 | msleep(10); | ||
1091 | |||
1092 | spi_unregister_master(master); | ||
1093 | |||
1094 | destroy_workqueue(sdd->workqueue); | ||
1095 | |||
1096 | if (sci->src_clk != sdd->clk) | ||
1097 | clk_disable(sci->src_clk); | ||
1098 | |||
1099 | if (sci->src_clk != sdd->clk) | ||
1100 | clk_put(sci->src_clk); | ||
1101 | |||
1102 | clk_disable(sdd->clk); | ||
1103 | clk_put(sdd->clk); | ||
1104 | |||
1105 | iounmap((void *) sdd->regs); | ||
1106 | |||
1107 | mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | ||
1108 | release_mem_region(mem_res->start, resource_size(mem_res)); | ||
1109 | |||
1110 | platform_set_drvdata(pdev, NULL); | ||
1111 | spi_master_put(master); | ||
1112 | |||
1113 | return 0; | ||
1114 | } | ||
1115 | |||
1116 | #ifdef CONFIG_PM | ||
1117 | static int s3c64xx_spi_suspend(struct platform_device *pdev, pm_message_t state) | ||
1118 | { | ||
1119 | struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); | ||
1120 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); | ||
1121 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
1122 | struct s3c64xx_spi_csinfo *cs; | ||
1123 | unsigned long flags; | ||
1124 | |||
1125 | spin_lock_irqsave(&sdd->lock, flags); | ||
1126 | sdd->state |= SUSPND; | ||
1127 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
1128 | |||
1129 | while (sdd->state & SPIBUSY) | ||
1130 | msleep(10); | ||
1131 | |||
1132 | /* Disable the clock */ | ||
1133 | if (sci->src_clk != sdd->clk) | ||
1134 | clk_disable(sci->src_clk); | ||
1135 | |||
1136 | clk_disable(sdd->clk); | ||
1137 | |||
1138 | sdd->cur_speed = 0; /* Output Clock is stopped */ | ||
1139 | |||
1140 | return 0; | ||
1141 | } | ||
1142 | |||
1143 | static int s3c64xx_spi_resume(struct platform_device *pdev) | ||
1144 | { | ||
1145 | struct spi_master *master = spi_master_get(platform_get_drvdata(pdev)); | ||
1146 | struct s3c64xx_spi_driver_data *sdd = spi_master_get_devdata(master); | ||
1147 | struct s3c64xx_spi_cntrlr_info *sci = sdd->cntrlr_info; | ||
1148 | unsigned long flags; | ||
1149 | |||
1150 | sci->cfg_gpio(pdev); | ||
1151 | |||
1152 | /* Enable the clock */ | ||
1153 | if (sci->src_clk != sdd->clk) | ||
1154 | clk_enable(sci->src_clk); | ||
1155 | |||
1156 | clk_enable(sdd->clk); | ||
1157 | |||
1158 | s3c64xx_spi_hwinit(sdd, pdev->id); | ||
1159 | |||
1160 | spin_lock_irqsave(&sdd->lock, flags); | ||
1161 | sdd->state &= ~SUSPND; | ||
1162 | spin_unlock_irqrestore(&sdd->lock, flags); | ||
1163 | |||
1164 | return 0; | ||
1165 | } | ||
1166 | #else | ||
1167 | #define s3c64xx_spi_suspend NULL | ||
1168 | #define s3c64xx_spi_resume NULL | ||
1169 | #endif /* CONFIG_PM */ | ||
1170 | |||
1171 | static struct platform_driver s3c64xx_spi_driver = { | ||
1172 | .driver = { | ||
1173 | .name = "s3c64xx-spi", | ||
1174 | .owner = THIS_MODULE, | ||
1175 | }, | ||
1176 | .remove = s3c64xx_spi_remove, | ||
1177 | .suspend = s3c64xx_spi_suspend, | ||
1178 | .resume = s3c64xx_spi_resume, | ||
1179 | }; | ||
1180 | MODULE_ALIAS("platform:s3c64xx-spi"); | ||
1181 | |||
1182 | static int __init s3c64xx_spi_init(void) | ||
1183 | { | ||
1184 | return platform_driver_probe(&s3c64xx_spi_driver, s3c64xx_spi_probe); | ||
1185 | } | ||
1186 | module_init(s3c64xx_spi_init); | ||
1187 | |||
1188 | static void __exit s3c64xx_spi_exit(void) | ||
1189 | { | ||
1190 | platform_driver_unregister(&s3c64xx_spi_driver); | ||
1191 | } | ||
1192 | module_exit(s3c64xx_spi_exit); | ||
1193 | |||
1194 | MODULE_AUTHOR("Jaswinder Singh <jassi.brar@samsung.com>"); | ||
1195 | MODULE_DESCRIPTION("S3C64XX SPI Controller Driver"); | ||
1196 | MODULE_LICENSE("GPL"); | ||
diff --git a/drivers/spi/spi_sh_sci.c b/drivers/spi/spi_sh_sci.c index 7d36720eb982..a65c12ffa733 100644 --- a/drivers/spi/spi_sh_sci.c +++ b/drivers/spi/spi_sh_sci.c | |||
@@ -148,7 +148,7 @@ static int sh_sci_spi_probe(struct platform_device *dev) | |||
148 | ret = -ENOENT; | 148 | ret = -ENOENT; |
149 | goto err1; | 149 | goto err1; |
150 | } | 150 | } |
151 | sp->membase = ioremap(r->start, r->end - r->start + 1); | 151 | sp->membase = ioremap(r->start, resource_size(r)); |
152 | if (!sp->membase) { | 152 | if (!sp->membase) { |
153 | ret = -ENXIO; | 153 | ret = -ENXIO; |
154 | goto err1; | 154 | goto err1; |
diff --git a/drivers/spi/spi_txx9.c b/drivers/spi/spi_txx9.c index 19f75627c3de..dfa024b633e1 100644 --- a/drivers/spi/spi_txx9.c +++ b/drivers/spi/spi_txx9.c | |||
@@ -375,12 +375,10 @@ static int __init txx9spi_probe(struct platform_device *dev) | |||
375 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); | 375 | res = platform_get_resource(dev, IORESOURCE_MEM, 0); |
376 | if (!res) | 376 | if (!res) |
377 | goto exit_busy; | 377 | goto exit_busy; |
378 | if (!devm_request_mem_region(&dev->dev, | 378 | if (!devm_request_mem_region(&dev->dev, res->start, resource_size(res), |
379 | res->start, res->end - res->start + 1, | ||
380 | "spi_txx9")) | 379 | "spi_txx9")) |
381 | goto exit_busy; | 380 | goto exit_busy; |
382 | c->membase = devm_ioremap(&dev->dev, | 381 | c->membase = devm_ioremap(&dev->dev, res->start, resource_size(res)); |
383 | res->start, res->end - res->start + 1); | ||
384 | if (!c->membase) | 382 | if (!c->membase) |
385 | goto exit_busy; | 383 | goto exit_busy; |
386 | 384 | ||
diff --git a/drivers/spi/spidev.c b/drivers/spi/spidev.c index 9c446e6003d5..ea1bec3c9a13 100644 --- a/drivers/spi/spidev.c +++ b/drivers/spi/spidev.c | |||
@@ -53,7 +53,7 @@ | |||
53 | #define SPIDEV_MAJOR 153 /* assigned */ | 53 | #define SPIDEV_MAJOR 153 /* assigned */ |
54 | #define N_SPI_MINORS 32 /* ... up to 256 */ | 54 | #define N_SPI_MINORS 32 /* ... up to 256 */ |
55 | 55 | ||
56 | static unsigned long minors[N_SPI_MINORS / BITS_PER_LONG]; | 56 | static DECLARE_BITMAP(minors, N_SPI_MINORS); |
57 | 57 | ||
58 | 58 | ||
59 | /* Bit masks for spi_device.mode management. Note that incorrect | 59 | /* Bit masks for spi_device.mode management. Note that incorrect |
@@ -558,7 +558,7 @@ static struct class *spidev_class; | |||
558 | 558 | ||
559 | /*-------------------------------------------------------------------------*/ | 559 | /*-------------------------------------------------------------------------*/ |
560 | 560 | ||
561 | static int spidev_probe(struct spi_device *spi) | 561 | static int __devinit spidev_probe(struct spi_device *spi) |
562 | { | 562 | { |
563 | struct spidev_data *spidev; | 563 | struct spidev_data *spidev; |
564 | int status; | 564 | int status; |
@@ -607,7 +607,7 @@ static int spidev_probe(struct spi_device *spi) | |||
607 | return status; | 607 | return status; |
608 | } | 608 | } |
609 | 609 | ||
610 | static int spidev_remove(struct spi_device *spi) | 610 | static int __devexit spidev_remove(struct spi_device *spi) |
611 | { | 611 | { |
612 | struct spidev_data *spidev = spi_get_drvdata(spi); | 612 | struct spidev_data *spidev = spi_get_drvdata(spi); |
613 | 613 | ||
@@ -629,7 +629,7 @@ static int spidev_remove(struct spi_device *spi) | |||
629 | return 0; | 629 | return 0; |
630 | } | 630 | } |
631 | 631 | ||
632 | static struct spi_driver spidev_spi = { | 632 | static struct spi_driver spidev_spi_driver = { |
633 | .driver = { | 633 | .driver = { |
634 | .name = "spidev", | 634 | .name = "spidev", |
635 | .owner = THIS_MODULE, | 635 | .owner = THIS_MODULE, |
@@ -661,14 +661,14 @@ static int __init spidev_init(void) | |||
661 | 661 | ||
662 | spidev_class = class_create(THIS_MODULE, "spidev"); | 662 | spidev_class = class_create(THIS_MODULE, "spidev"); |
663 | if (IS_ERR(spidev_class)) { | 663 | if (IS_ERR(spidev_class)) { |
664 | unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name); | 664 | unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name); |
665 | return PTR_ERR(spidev_class); | 665 | return PTR_ERR(spidev_class); |
666 | } | 666 | } |
667 | 667 | ||
668 | status = spi_register_driver(&spidev_spi); | 668 | status = spi_register_driver(&spidev_spi_driver); |
669 | if (status < 0) { | 669 | if (status < 0) { |
670 | class_destroy(spidev_class); | 670 | class_destroy(spidev_class); |
671 | unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name); | 671 | unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name); |
672 | } | 672 | } |
673 | return status; | 673 | return status; |
674 | } | 674 | } |
@@ -676,9 +676,9 @@ module_init(spidev_init); | |||
676 | 676 | ||
677 | static void __exit spidev_exit(void) | 677 | static void __exit spidev_exit(void) |
678 | { | 678 | { |
679 | spi_unregister_driver(&spidev_spi); | 679 | spi_unregister_driver(&spidev_spi_driver); |
680 | class_destroy(spidev_class); | 680 | class_destroy(spidev_class); |
681 | unregister_chrdev(SPIDEV_MAJOR, spidev_spi.driver.name); | 681 | unregister_chrdev(SPIDEV_MAJOR, spidev_spi_driver.driver.name); |
682 | } | 682 | } |
683 | module_exit(spidev_exit); | 683 | module_exit(spidev_exit); |
684 | 684 | ||
diff --git a/drivers/staging/iio/ring_sw.h b/drivers/staging/iio/ring_sw.h index f0b86f02cd80..fd677f008365 100644 --- a/drivers/staging/iio/ring_sw.h +++ b/drivers/staging/iio/ring_sw.h | |||
@@ -29,7 +29,6 @@ | |||
29 | * driver requests - some may support multiple options */ | 29 | * driver requests - some may support multiple options */ |
30 | 30 | ||
31 | 31 | ||
32 | #include <linux/autoconf.h> | ||
33 | #include "iio.h" | 32 | #include "iio.h" |
34 | #include "ring_generic.h" | 33 | #include "ring_generic.h" |
35 | 34 | ||
diff --git a/drivers/staging/octeon/Kconfig b/drivers/staging/octeon/Kconfig index 536e2382de54..638ad6b35891 100644 --- a/drivers/staging/octeon/Kconfig +++ b/drivers/staging/octeon/Kconfig | |||
@@ -1,7 +1,8 @@ | |||
1 | config OCTEON_ETHERNET | 1 | config OCTEON_ETHERNET |
2 | tristate "Cavium Networks Octeon Ethernet support" | 2 | tristate "Cavium Networks Octeon Ethernet support" |
3 | depends on CPU_CAVIUM_OCTEON | 3 | depends on CPU_CAVIUM_OCTEON |
4 | select MII | 4 | select PHYLIB |
5 | select MDIO_OCTEON | ||
5 | help | 6 | help |
6 | This driver supports the builtin ethernet ports on Cavium | 7 | This driver supports the builtin ethernet ports on Cavium |
7 | Networks' products in the Octeon family. This driver supports the | 8 | Networks' products in the Octeon family. This driver supports the |
diff --git a/drivers/staging/octeon/ethernet-mdio.c b/drivers/staging/octeon/ethernet-mdio.c index 31a58e508924..05a5cc0f43ed 100644 --- a/drivers/staging/octeon/ethernet-mdio.c +++ b/drivers/staging/octeon/ethernet-mdio.c | |||
@@ -26,7 +26,8 @@ | |||
26 | **********************************************************************/ | 26 | **********************************************************************/ |
27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | #include <linux/ethtool.h> | 28 | #include <linux/ethtool.h> |
29 | #include <linux/mii.h> | 29 | #include <linux/phy.h> |
30 | |||
30 | #include <net/dst.h> | 31 | #include <net/dst.h> |
31 | 32 | ||
32 | #include <asm/octeon/octeon.h> | 33 | #include <asm/octeon/octeon.h> |
@@ -34,86 +35,12 @@ | |||
34 | #include "ethernet-defines.h" | 35 | #include "ethernet-defines.h" |
35 | #include "octeon-ethernet.h" | 36 | #include "octeon-ethernet.h" |
36 | #include "ethernet-mdio.h" | 37 | #include "ethernet-mdio.h" |
38 | #include "ethernet-util.h" | ||
37 | 39 | ||
38 | #include "cvmx-helper-board.h" | 40 | #include "cvmx-helper-board.h" |
39 | 41 | ||
40 | #include "cvmx-smix-defs.h" | 42 | #include "cvmx-smix-defs.h" |
41 | 43 | ||
42 | DECLARE_MUTEX(mdio_sem); | ||
43 | |||
44 | /** | ||
45 | * Perform an MII read. Called by the generic MII routines | ||
46 | * | ||
47 | * @dev: Device to perform read for | ||
48 | * @phy_id: The MII phy id | ||
49 | * @location: Register location to read | ||
50 | * Returns Result from the read or zero on failure | ||
51 | */ | ||
52 | static int cvm_oct_mdio_read(struct net_device *dev, int phy_id, int location) | ||
53 | { | ||
54 | union cvmx_smix_cmd smi_cmd; | ||
55 | union cvmx_smix_rd_dat smi_rd; | ||
56 | |||
57 | smi_cmd.u64 = 0; | ||
58 | smi_cmd.s.phy_op = 1; | ||
59 | smi_cmd.s.phy_adr = phy_id; | ||
60 | smi_cmd.s.reg_adr = location; | ||
61 | cvmx_write_csr(CVMX_SMIX_CMD(0), smi_cmd.u64); | ||
62 | |||
63 | do { | ||
64 | if (!in_interrupt()) | ||
65 | yield(); | ||
66 | smi_rd.u64 = cvmx_read_csr(CVMX_SMIX_RD_DAT(0)); | ||
67 | } while (smi_rd.s.pending); | ||
68 | |||
69 | if (smi_rd.s.val) | ||
70 | return smi_rd.s.dat; | ||
71 | else | ||
72 | return 0; | ||
73 | } | ||
74 | |||
75 | static int cvm_oct_mdio_dummy_read(struct net_device *dev, int phy_id, | ||
76 | int location) | ||
77 | { | ||
78 | return 0xffff; | ||
79 | } | ||
80 | |||
81 | /** | ||
82 | * Perform an MII write. Called by the generic MII routines | ||
83 | * | ||
84 | * @dev: Device to perform write for | ||
85 | * @phy_id: The MII phy id | ||
86 | * @location: Register location to write | ||
87 | * @val: Value to write | ||
88 | */ | ||
89 | static void cvm_oct_mdio_write(struct net_device *dev, int phy_id, int location, | ||
90 | int val) | ||
91 | { | ||
92 | union cvmx_smix_cmd smi_cmd; | ||
93 | union cvmx_smix_wr_dat smi_wr; | ||
94 | |||
95 | smi_wr.u64 = 0; | ||
96 | smi_wr.s.dat = val; | ||
97 | cvmx_write_csr(CVMX_SMIX_WR_DAT(0), smi_wr.u64); | ||
98 | |||
99 | smi_cmd.u64 = 0; | ||
100 | smi_cmd.s.phy_op = 0; | ||
101 | smi_cmd.s.phy_adr = phy_id; | ||
102 | smi_cmd.s.reg_adr = location; | ||
103 | cvmx_write_csr(CVMX_SMIX_CMD(0), smi_cmd.u64); | ||
104 | |||
105 | do { | ||
106 | if (!in_interrupt()) | ||
107 | yield(); | ||
108 | smi_wr.u64 = cvmx_read_csr(CVMX_SMIX_WR_DAT(0)); | ||
109 | } while (smi_wr.s.pending); | ||
110 | } | ||
111 | |||
112 | static void cvm_oct_mdio_dummy_write(struct net_device *dev, int phy_id, | ||
113 | int location, int val) | ||
114 | { | ||
115 | } | ||
116 | |||
117 | static void cvm_oct_get_drvinfo(struct net_device *dev, | 44 | static void cvm_oct_get_drvinfo(struct net_device *dev, |
118 | struct ethtool_drvinfo *info) | 45 | struct ethtool_drvinfo *info) |
119 | { | 46 | { |
@@ -125,49 +52,37 @@ static void cvm_oct_get_drvinfo(struct net_device *dev, | |||
125 | static int cvm_oct_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 52 | static int cvm_oct_get_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
126 | { | 53 | { |
127 | struct octeon_ethernet *priv = netdev_priv(dev); | 54 | struct octeon_ethernet *priv = netdev_priv(dev); |
128 | int ret; | ||
129 | 55 | ||
130 | down(&mdio_sem); | 56 | if (priv->phydev) |
131 | ret = mii_ethtool_gset(&priv->mii_info, cmd); | 57 | return phy_ethtool_gset(priv->phydev, cmd); |
132 | up(&mdio_sem); | ||
133 | 58 | ||
134 | return ret; | 59 | return -EINVAL; |
135 | } | 60 | } |
136 | 61 | ||
137 | static int cvm_oct_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) | 62 | static int cvm_oct_set_settings(struct net_device *dev, struct ethtool_cmd *cmd) |
138 | { | 63 | { |
139 | struct octeon_ethernet *priv = netdev_priv(dev); | 64 | struct octeon_ethernet *priv = netdev_priv(dev); |
140 | int ret; | ||
141 | 65 | ||
142 | down(&mdio_sem); | 66 | if (!capable(CAP_NET_ADMIN)) |
143 | ret = mii_ethtool_sset(&priv->mii_info, cmd); | 67 | return -EPERM; |
144 | up(&mdio_sem); | 68 | |
69 | if (priv->phydev) | ||
70 | return phy_ethtool_sset(priv->phydev, cmd); | ||
145 | 71 | ||
146 | return ret; | 72 | return -EINVAL; |
147 | } | 73 | } |
148 | 74 | ||
149 | static int cvm_oct_nway_reset(struct net_device *dev) | 75 | static int cvm_oct_nway_reset(struct net_device *dev) |
150 | { | 76 | { |
151 | struct octeon_ethernet *priv = netdev_priv(dev); | 77 | struct octeon_ethernet *priv = netdev_priv(dev); |
152 | int ret; | ||
153 | 78 | ||
154 | down(&mdio_sem); | 79 | if (!capable(CAP_NET_ADMIN)) |
155 | ret = mii_nway_restart(&priv->mii_info); | 80 | return -EPERM; |
156 | up(&mdio_sem); | ||
157 | 81 | ||
158 | return ret; | 82 | if (priv->phydev) |
159 | } | 83 | return phy_start_aneg(priv->phydev); |
160 | 84 | ||
161 | static u32 cvm_oct_get_link(struct net_device *dev) | 85 | return -EINVAL; |
162 | { | ||
163 | struct octeon_ethernet *priv = netdev_priv(dev); | ||
164 | u32 ret; | ||
165 | |||
166 | down(&mdio_sem); | ||
167 | ret = mii_link_ok(&priv->mii_info); | ||
168 | up(&mdio_sem); | ||
169 | |||
170 | return ret; | ||
171 | } | 86 | } |
172 | 87 | ||
173 | const struct ethtool_ops cvm_oct_ethtool_ops = { | 88 | const struct ethtool_ops cvm_oct_ethtool_ops = { |
@@ -175,7 +90,7 @@ const struct ethtool_ops cvm_oct_ethtool_ops = { | |||
175 | .get_settings = cvm_oct_get_settings, | 90 | .get_settings = cvm_oct_get_settings, |
176 | .set_settings = cvm_oct_set_settings, | 91 | .set_settings = cvm_oct_set_settings, |
177 | .nway_reset = cvm_oct_nway_reset, | 92 | .nway_reset = cvm_oct_nway_reset, |
178 | .get_link = cvm_oct_get_link, | 93 | .get_link = ethtool_op_get_link, |
179 | .get_sg = ethtool_op_get_sg, | 94 | .get_sg = ethtool_op_get_sg, |
180 | .get_tx_csum = ethtool_op_get_tx_csum, | 95 | .get_tx_csum = ethtool_op_get_tx_csum, |
181 | }; | 96 | }; |
@@ -191,41 +106,78 @@ const struct ethtool_ops cvm_oct_ethtool_ops = { | |||
191 | int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) | 106 | int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd) |
192 | { | 107 | { |
193 | struct octeon_ethernet *priv = netdev_priv(dev); | 108 | struct octeon_ethernet *priv = netdev_priv(dev); |
194 | struct mii_ioctl_data *data = if_mii(rq); | ||
195 | unsigned int duplex_chg; | ||
196 | int ret; | ||
197 | 109 | ||
198 | down(&mdio_sem); | 110 | if (!netif_running(dev)) |
199 | ret = generic_mii_ioctl(&priv->mii_info, data, cmd, &duplex_chg); | 111 | return -EINVAL; |
200 | up(&mdio_sem); | 112 | |
113 | if (!priv->phydev) | ||
114 | return -EINVAL; | ||
115 | |||
116 | return phy_mii_ioctl(priv->phydev, if_mii(rq), cmd); | ||
117 | } | ||
201 | 118 | ||
202 | return ret; | 119 | static void cvm_oct_adjust_link(struct net_device *dev) |
120 | { | ||
121 | struct octeon_ethernet *priv = netdev_priv(dev); | ||
122 | cvmx_helper_link_info_t link_info; | ||
123 | |||
124 | if (priv->last_link != priv->phydev->link) { | ||
125 | priv->last_link = priv->phydev->link; | ||
126 | link_info.u64 = 0; | ||
127 | link_info.s.link_up = priv->last_link ? 1 : 0; | ||
128 | link_info.s.full_duplex = priv->phydev->duplex ? 1 : 0; | ||
129 | link_info.s.speed = priv->phydev->speed; | ||
130 | cvmx_helper_link_set( priv->port, link_info); | ||
131 | if (priv->last_link) { | ||
132 | netif_carrier_on(dev); | ||
133 | if (priv->queue != -1) | ||
134 | DEBUGPRINT("%s: %u Mbps %s duplex, " | ||
135 | "port %2d, queue %2d\n", | ||
136 | dev->name, priv->phydev->speed, | ||
137 | priv->phydev->duplex ? | ||
138 | "Full" : "Half", | ||
139 | priv->port, priv->queue); | ||
140 | else | ||
141 | DEBUGPRINT("%s: %u Mbps %s duplex, " | ||
142 | "port %2d, POW\n", | ||
143 | dev->name, priv->phydev->speed, | ||
144 | priv->phydev->duplex ? | ||
145 | "Full" : "Half", | ||
146 | priv->port); | ||
147 | } else { | ||
148 | netif_carrier_off(dev); | ||
149 | DEBUGPRINT("%s: Link down\n", dev->name); | ||
150 | } | ||
151 | } | ||
203 | } | 152 | } |
204 | 153 | ||
154 | |||
205 | /** | 155 | /** |
206 | * Setup the MDIO device structures | 156 | * Setup the PHY |
207 | * | 157 | * |
208 | * @dev: Device to setup | 158 | * @dev: Device to setup |
209 | * | 159 | * |
210 | * Returns Zero on success, negative on failure | 160 | * Returns Zero on success, negative on failure |
211 | */ | 161 | */ |
212 | int cvm_oct_mdio_setup_device(struct net_device *dev) | 162 | int cvm_oct_phy_setup_device(struct net_device *dev) |
213 | { | 163 | { |
214 | struct octeon_ethernet *priv = netdev_priv(dev); | 164 | struct octeon_ethernet *priv = netdev_priv(dev); |
215 | int phy_id = cvmx_helper_board_get_mii_address(priv->port); | 165 | |
216 | if (phy_id != -1) { | 166 | int phy_addr = cvmx_helper_board_get_mii_address(priv->port); |
217 | priv->mii_info.dev = dev; | 167 | if (phy_addr != -1) { |
218 | priv->mii_info.phy_id = phy_id; | 168 | char phy_id[20]; |
219 | priv->mii_info.phy_id_mask = 0xff; | 169 | |
220 | priv->mii_info.supports_gmii = 1; | 170 | snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT, "0", phy_addr); |
221 | priv->mii_info.reg_num_mask = 0x1f; | 171 | |
222 | priv->mii_info.mdio_read = cvm_oct_mdio_read; | 172 | priv->phydev = phy_connect(dev, phy_id, cvm_oct_adjust_link, 0, |
223 | priv->mii_info.mdio_write = cvm_oct_mdio_write; | 173 | PHY_INTERFACE_MODE_GMII); |
224 | } else { | 174 | |
225 | /* Supply dummy MDIO routines so the kernel won't crash | 175 | if (IS_ERR(priv->phydev)) { |
226 | if the user tries to read them */ | 176 | priv->phydev = NULL; |
227 | priv->mii_info.mdio_read = cvm_oct_mdio_dummy_read; | 177 | return -1; |
228 | priv->mii_info.mdio_write = cvm_oct_mdio_dummy_write; | 178 | } |
179 | priv->last_link = 0; | ||
180 | phy_start_aneg(priv->phydev); | ||
229 | } | 181 | } |
230 | return 0; | 182 | return 0; |
231 | } | 183 | } |
diff --git a/drivers/staging/octeon/ethernet-mdio.h b/drivers/staging/octeon/ethernet-mdio.h index b3328aeec2df..55d0614a7cd9 100644 --- a/drivers/staging/octeon/ethernet-mdio.h +++ b/drivers/staging/octeon/ethernet-mdio.h | |||
@@ -43,4 +43,4 @@ | |||
43 | 43 | ||
44 | extern const struct ethtool_ops cvm_oct_ethtool_ops; | 44 | extern const struct ethtool_ops cvm_oct_ethtool_ops; |
45 | int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); | 45 | int cvm_oct_ioctl(struct net_device *dev, struct ifreq *rq, int cmd); |
46 | int cvm_oct_mdio_setup_device(struct net_device *dev); | 46 | int cvm_oct_phy_setup_device(struct net_device *dev); |
diff --git a/drivers/staging/octeon/ethernet-proc.c b/drivers/staging/octeon/ethernet-proc.c index 8fa88fc419b7..16308d484d3b 100644 --- a/drivers/staging/octeon/ethernet-proc.c +++ b/drivers/staging/octeon/ethernet-proc.c | |||
@@ -25,7 +25,6 @@ | |||
25 | * Contact Cavium Networks for more information | 25 | * Contact Cavium Networks for more information |
26 | **********************************************************************/ | 26 | **********************************************************************/ |
27 | #include <linux/kernel.h> | 27 | #include <linux/kernel.h> |
28 | #include <linux/mii.h> | ||
29 | #include <linux/seq_file.h> | 28 | #include <linux/seq_file.h> |
30 | #include <linux/proc_fs.h> | 29 | #include <linux/proc_fs.h> |
31 | #include <net/dst.h> | 30 | #include <net/dst.h> |
@@ -38,112 +37,6 @@ | |||
38 | #include "cvmx-helper.h" | 37 | #include "cvmx-helper.h" |
39 | #include "cvmx-pip.h" | 38 | #include "cvmx-pip.h" |
40 | 39 | ||
41 | static unsigned long long cvm_oct_stats_read_switch(struct net_device *dev, | ||
42 | int phy_id, int offset) | ||
43 | { | ||
44 | struct octeon_ethernet *priv = netdev_priv(dev); | ||
45 | |||
46 | priv->mii_info.mdio_write(dev, phy_id, 0x1d, 0xcc00 | offset); | ||
47 | return ((uint64_t) priv->mii_info. | ||
48 | mdio_read(dev, phy_id, | ||
49 | 0x1e) << 16) | (uint64_t) priv->mii_info. | ||
50 | mdio_read(dev, phy_id, 0x1f); | ||
51 | } | ||
52 | |||
53 | static int cvm_oct_stats_switch_show(struct seq_file *m, void *v) | ||
54 | { | ||
55 | static const int ports[] = { 0, 1, 2, 3, 9, -1 }; | ||
56 | struct net_device *dev = cvm_oct_device[0]; | ||
57 | int index = 0; | ||
58 | |||
59 | while (ports[index] != -1) { | ||
60 | |||
61 | /* Latch port */ | ||
62 | struct octeon_ethernet *priv = netdev_priv(dev); | ||
63 | |||
64 | priv->mii_info.mdio_write(dev, 0x1b, 0x1d, | ||
65 | 0xdc00 | ports[index]); | ||
66 | seq_printf(m, "\nSwitch Port %d\n", ports[index]); | ||
67 | seq_printf(m, "InGoodOctets: %12llu\t" | ||
68 | "OutOctets: %12llu\t" | ||
69 | "64 Octets: %12llu\n", | ||
70 | cvm_oct_stats_read_switch(dev, 0x1b, | ||
71 | 0x00) | | ||
72 | (cvm_oct_stats_read_switch(dev, 0x1b, 0x01) << 32), | ||
73 | cvm_oct_stats_read_switch(dev, 0x1b, | ||
74 | 0x0E) | | ||
75 | (cvm_oct_stats_read_switch(dev, 0x1b, 0x0F) << 32), | ||
76 | cvm_oct_stats_read_switch(dev, 0x1b, 0x08)); | ||
77 | |||
78 | seq_printf(m, "InBadOctets: %12llu\t" | ||
79 | "OutUnicast: %12llu\t" | ||
80 | "65-127 Octets: %12llu\n", | ||
81 | cvm_oct_stats_read_switch(dev, 0x1b, 0x02), | ||
82 | cvm_oct_stats_read_switch(dev, 0x1b, 0x10), | ||
83 | cvm_oct_stats_read_switch(dev, 0x1b, 0x09)); | ||
84 | |||
85 | seq_printf(m, "InUnicast: %12llu\t" | ||
86 | "OutBroadcasts: %12llu\t" | ||
87 | "128-255 Octets: %12llu\n", | ||
88 | cvm_oct_stats_read_switch(dev, 0x1b, 0x04), | ||
89 | cvm_oct_stats_read_switch(dev, 0x1b, 0x13), | ||
90 | cvm_oct_stats_read_switch(dev, 0x1b, 0x0A)); | ||
91 | |||
92 | seq_printf(m, "InBroadcasts: %12llu\t" | ||
93 | "OutMulticasts: %12llu\t" | ||
94 | "256-511 Octets: %12llu\n", | ||
95 | cvm_oct_stats_read_switch(dev, 0x1b, 0x06), | ||
96 | cvm_oct_stats_read_switch(dev, 0x1b, 0x12), | ||
97 | cvm_oct_stats_read_switch(dev, 0x1b, 0x0B)); | ||
98 | |||
99 | seq_printf(m, "InMulticasts: %12llu\t" | ||
100 | "OutPause: %12llu\t" | ||
101 | "512-1023 Octets:%12llu\n", | ||
102 | cvm_oct_stats_read_switch(dev, 0x1b, 0x07), | ||
103 | cvm_oct_stats_read_switch(dev, 0x1b, 0x15), | ||
104 | cvm_oct_stats_read_switch(dev, 0x1b, 0x0C)); | ||
105 | |||
106 | seq_printf(m, "InPause: %12llu\t" | ||
107 | "Excessive: %12llu\t" | ||
108 | "1024-Max Octets:%12llu\n", | ||
109 | cvm_oct_stats_read_switch(dev, 0x1b, 0x16), | ||
110 | cvm_oct_stats_read_switch(dev, 0x1b, 0x11), | ||
111 | cvm_oct_stats_read_switch(dev, 0x1b, 0x0D)); | ||
112 | |||
113 | seq_printf(m, "InUndersize: %12llu\t" | ||
114 | "Collisions: %12llu\n", | ||
115 | cvm_oct_stats_read_switch(dev, 0x1b, 0x18), | ||
116 | cvm_oct_stats_read_switch(dev, 0x1b, 0x1E)); | ||
117 | |||
118 | seq_printf(m, "InFragments: %12llu\t" | ||
119 | "Deferred: %12llu\n", | ||
120 | cvm_oct_stats_read_switch(dev, 0x1b, 0x19), | ||
121 | cvm_oct_stats_read_switch(dev, 0x1b, 0x05)); | ||
122 | |||
123 | seq_printf(m, "InOversize: %12llu\t" | ||
124 | "Single: %12llu\n", | ||
125 | cvm_oct_stats_read_switch(dev, 0x1b, 0x1A), | ||
126 | cvm_oct_stats_read_switch(dev, 0x1b, 0x14)); | ||
127 | |||
128 | seq_printf(m, "InJabber: %12llu\t" | ||
129 | "Multiple: %12llu\n", | ||
130 | cvm_oct_stats_read_switch(dev, 0x1b, 0x1B), | ||
131 | cvm_oct_stats_read_switch(dev, 0x1b, 0x17)); | ||
132 | |||
133 | seq_printf(m, "In RxErr: %12llu\t" | ||
134 | "OutFCSErr: %12llu\n", | ||
135 | cvm_oct_stats_read_switch(dev, 0x1b, 0x1C), | ||
136 | cvm_oct_stats_read_switch(dev, 0x1b, 0x03)); | ||
137 | |||
138 | seq_printf(m, "InFCSErr: %12llu\t" | ||
139 | "Late: %12llu\n", | ||
140 | cvm_oct_stats_read_switch(dev, 0x1b, 0x1D), | ||
141 | cvm_oct_stats_read_switch(dev, 0x1b, 0x1F)); | ||
142 | index++; | ||
143 | } | ||
144 | return 0; | ||
145 | } | ||
146 | |||
147 | /** | 40 | /** |
148 | * User is reading /proc/octeon_ethernet_stats | 41 | * User is reading /proc/octeon_ethernet_stats |
149 | * | 42 | * |
@@ -215,11 +108,6 @@ static int cvm_oct_stats_show(struct seq_file *m, void *v) | |||
215 | } | 108 | } |
216 | } | 109 | } |
217 | 110 | ||
218 | if (cvm_oct_device[0]) { | ||
219 | priv = netdev_priv(cvm_oct_device[0]); | ||
220 | if (priv->imode == CVMX_HELPER_INTERFACE_MODE_GMII) | ||
221 | cvm_oct_stats_switch_show(m, v); | ||
222 | } | ||
223 | return 0; | 111 | return 0; |
224 | } | 112 | } |
225 | 113 | ||
diff --git a/drivers/staging/octeon/ethernet-rgmii.c b/drivers/staging/octeon/ethernet-rgmii.c index fbaa465d2fac..3820f1ec11d1 100644 --- a/drivers/staging/octeon/ethernet-rgmii.c +++ b/drivers/staging/octeon/ethernet-rgmii.c | |||
@@ -147,32 +147,36 @@ static void cvm_oct_rgmii_poll(struct net_device *dev) | |||
147 | cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), | 147 | cvmx_write_csr(CVMX_GMXX_RXX_INT_REG(index, interface), |
148 | gmxx_rxx_int_reg.u64); | 148 | gmxx_rxx_int_reg.u64); |
149 | } | 149 | } |
150 | 150 | if (priv->phydev == NULL) { | |
151 | link_info = cvmx_helper_link_autoconf(priv->port); | 151 | link_info = cvmx_helper_link_autoconf(priv->port); |
152 | priv->link_info = link_info.u64; | 152 | priv->link_info = link_info.u64; |
153 | } | ||
153 | spin_unlock_irqrestore(&global_register_lock, flags); | 154 | spin_unlock_irqrestore(&global_register_lock, flags); |
154 | 155 | ||
155 | /* Tell Linux */ | 156 | if (priv->phydev == NULL) { |
156 | if (link_info.s.link_up) { | 157 | /* Tell core. */ |
157 | 158 | if (link_info.s.link_up) { | |
158 | if (!netif_carrier_ok(dev)) | 159 | if (!netif_carrier_ok(dev)) |
159 | netif_carrier_on(dev); | 160 | netif_carrier_on(dev); |
160 | if (priv->queue != -1) | 161 | if (priv->queue != -1) |
161 | DEBUGPRINT | 162 | DEBUGPRINT("%s: %u Mbps %s duplex, " |
162 | ("%s: %u Mbps %s duplex, port %2d, queue %2d\n", | 163 | "port %2d, queue %2d\n", |
163 | dev->name, link_info.s.speed, | 164 | dev->name, link_info.s.speed, |
164 | (link_info.s.full_duplex) ? "Full" : "Half", | 165 | (link_info.s.full_duplex) ? |
165 | priv->port, priv->queue); | 166 | "Full" : "Half", |
166 | else | 167 | priv->port, priv->queue); |
167 | DEBUGPRINT("%s: %u Mbps %s duplex, port %2d, POW\n", | 168 | else |
168 | dev->name, link_info.s.speed, | 169 | DEBUGPRINT("%s: %u Mbps %s duplex, " |
169 | (link_info.s.full_duplex) ? "Full" : "Half", | 170 | "port %2d, POW\n", |
170 | priv->port); | 171 | dev->name, link_info.s.speed, |
171 | } else { | 172 | (link_info.s.full_duplex) ? |
172 | 173 | "Full" : "Half", | |
173 | if (netif_carrier_ok(dev)) | 174 | priv->port); |
174 | netif_carrier_off(dev); | 175 | } else { |
175 | DEBUGPRINT("%s: Link down\n", dev->name); | 176 | if (netif_carrier_ok(dev)) |
177 | netif_carrier_off(dev); | ||
178 | DEBUGPRINT("%s: Link down\n", dev->name); | ||
179 | } | ||
176 | } | 180 | } |
177 | } | 181 | } |
178 | 182 | ||
diff --git a/drivers/staging/octeon/ethernet-sgmii.c b/drivers/staging/octeon/ethernet-sgmii.c index 2b54996bd85d..6061d01eca2d 100644 --- a/drivers/staging/octeon/ethernet-sgmii.c +++ b/drivers/staging/octeon/ethernet-sgmii.c | |||
@@ -113,7 +113,7 @@ int cvm_oct_sgmii_init(struct net_device *dev) | |||
113 | struct octeon_ethernet *priv = netdev_priv(dev); | 113 | struct octeon_ethernet *priv = netdev_priv(dev); |
114 | cvm_oct_common_init(dev); | 114 | cvm_oct_common_init(dev); |
115 | dev->netdev_ops->ndo_stop(dev); | 115 | dev->netdev_ops->ndo_stop(dev); |
116 | if (!octeon_is_simulation()) | 116 | if (!octeon_is_simulation() && priv->phydev == NULL) |
117 | priv->poll = cvm_oct_sgmii_poll; | 117 | priv->poll = cvm_oct_sgmii_poll; |
118 | 118 | ||
119 | /* FIXME: Need autoneg logic */ | 119 | /* FIXME: Need autoneg logic */ |
diff --git a/drivers/staging/octeon/ethernet-xaui.c b/drivers/staging/octeon/ethernet-xaui.c index 0c2e7cc40f35..ee3dc41b2c53 100644 --- a/drivers/staging/octeon/ethernet-xaui.c +++ b/drivers/staging/octeon/ethernet-xaui.c | |||
@@ -112,7 +112,7 @@ int cvm_oct_xaui_init(struct net_device *dev) | |||
112 | struct octeon_ethernet *priv = netdev_priv(dev); | 112 | struct octeon_ethernet *priv = netdev_priv(dev); |
113 | cvm_oct_common_init(dev); | 113 | cvm_oct_common_init(dev); |
114 | dev->netdev_ops->ndo_stop(dev); | 114 | dev->netdev_ops->ndo_stop(dev); |
115 | if (!octeon_is_simulation()) | 115 | if (!octeon_is_simulation() && priv->phydev == NULL) |
116 | priv->poll = cvm_oct_xaui_poll; | 116 | priv->poll = cvm_oct_xaui_poll; |
117 | 117 | ||
118 | return 0; | 118 | return 0; |
diff --git a/drivers/staging/octeon/ethernet.c b/drivers/staging/octeon/ethernet.c index 492c5029992d..4cfd4b136b32 100644 --- a/drivers/staging/octeon/ethernet.c +++ b/drivers/staging/octeon/ethernet.c | |||
@@ -30,7 +30,7 @@ | |||
30 | #include <linux/netdevice.h> | 30 | #include <linux/netdevice.h> |
31 | #include <linux/etherdevice.h> | 31 | #include <linux/etherdevice.h> |
32 | #include <linux/delay.h> | 32 | #include <linux/delay.h> |
33 | #include <linux/mii.h> | 33 | #include <linux/phy.h> |
34 | 34 | ||
35 | #include <net/dst.h> | 35 | #include <net/dst.h> |
36 | 36 | ||
@@ -132,8 +132,6 @@ static struct timer_list cvm_oct_poll_timer; | |||
132 | */ | 132 | */ |
133 | struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; | 133 | struct net_device *cvm_oct_device[TOTAL_NUMBER_OF_PORTS]; |
134 | 134 | ||
135 | extern struct semaphore mdio_sem; | ||
136 | |||
137 | /** | 135 | /** |
138 | * Periodic timer tick for slow management operations | 136 | * Periodic timer tick for slow management operations |
139 | * | 137 | * |
@@ -160,13 +158,8 @@ static void cvm_do_timer(unsigned long arg) | |||
160 | goto out; | 158 | goto out; |
161 | 159 | ||
162 | priv = netdev_priv(cvm_oct_device[port]); | 160 | priv = netdev_priv(cvm_oct_device[port]); |
163 | if (priv->poll) { | 161 | if (priv->poll) |
164 | /* skip polling if we don't get the lock */ | 162 | priv->poll(cvm_oct_device[port]); |
165 | if (!down_trylock(&mdio_sem)) { | ||
166 | priv->poll(cvm_oct_device[port]); | ||
167 | up(&mdio_sem); | ||
168 | } | ||
169 | } | ||
170 | 163 | ||
171 | queues_per_port = cvmx_pko_get_num_queues(port); | 164 | queues_per_port = cvmx_pko_get_num_queues(port); |
172 | /* Drain any pending packets in the free list */ | 165 | /* Drain any pending packets in the free list */ |
@@ -524,7 +517,7 @@ int cvm_oct_common_init(struct net_device *dev) | |||
524 | dev->features |= NETIF_F_LLTX; | 517 | dev->features |= NETIF_F_LLTX; |
525 | SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops); | 518 | SET_ETHTOOL_OPS(dev, &cvm_oct_ethtool_ops); |
526 | 519 | ||
527 | cvm_oct_mdio_setup_device(dev); | 520 | cvm_oct_phy_setup_device(dev); |
528 | dev->netdev_ops->ndo_set_mac_address(dev, &sa); | 521 | dev->netdev_ops->ndo_set_mac_address(dev, &sa); |
529 | dev->netdev_ops->ndo_change_mtu(dev, dev->mtu); | 522 | dev->netdev_ops->ndo_change_mtu(dev, dev->mtu); |
530 | 523 | ||
@@ -540,7 +533,10 @@ int cvm_oct_common_init(struct net_device *dev) | |||
540 | 533 | ||
541 | void cvm_oct_common_uninit(struct net_device *dev) | 534 | void cvm_oct_common_uninit(struct net_device *dev) |
542 | { | 535 | { |
543 | /* Currently nothing to do */ | 536 | struct octeon_ethernet *priv = netdev_priv(dev); |
537 | |||
538 | if (priv->phydev) | ||
539 | phy_disconnect(priv->phydev); | ||
544 | } | 540 | } |
545 | 541 | ||
546 | static const struct net_device_ops cvm_oct_npi_netdev_ops = { | 542 | static const struct net_device_ops cvm_oct_npi_netdev_ops = { |
@@ -627,6 +623,8 @@ static const struct net_device_ops cvm_oct_pow_netdev_ops = { | |||
627 | #endif | 623 | #endif |
628 | }; | 624 | }; |
629 | 625 | ||
626 | extern void octeon_mdiobus_force_mod_depencency(void); | ||
627 | |||
630 | /** | 628 | /** |
631 | * Module/ driver initialization. Creates the linux network | 629 | * Module/ driver initialization. Creates the linux network |
632 | * devices. | 630 | * devices. |
@@ -640,6 +638,7 @@ static int __init cvm_oct_init_module(void) | |||
640 | int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; | 638 | int fau = FAU_NUM_PACKET_BUFFERS_TO_FREE; |
641 | int qos; | 639 | int qos; |
642 | 640 | ||
641 | octeon_mdiobus_force_mod_depencency(); | ||
643 | pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION); | 642 | pr_notice("cavium-ethernet %s\n", OCTEON_ETHERNET_VERSION); |
644 | 643 | ||
645 | if (OCTEON_IS_MODEL(OCTEON_CN52XX)) | 644 | if (OCTEON_IS_MODEL(OCTEON_CN52XX)) |
diff --git a/drivers/staging/octeon/octeon-ethernet.h b/drivers/staging/octeon/octeon-ethernet.h index 3aef9878fc0a..402a15b9bb0e 100644 --- a/drivers/staging/octeon/octeon-ethernet.h +++ b/drivers/staging/octeon/octeon-ethernet.h | |||
@@ -50,9 +50,9 @@ struct octeon_ethernet { | |||
50 | /* List of outstanding tx buffers per queue */ | 50 | /* List of outstanding tx buffers per queue */ |
51 | struct sk_buff_head tx_free_list[16]; | 51 | struct sk_buff_head tx_free_list[16]; |
52 | /* Device statistics */ | 52 | /* Device statistics */ |
53 | struct net_device_stats stats | 53 | struct net_device_stats stats; |
54 | ; /* Generic MII info structure */ | 54 | struct phy_device *phydev; |
55 | struct mii_if_info mii_info; | 55 | unsigned int last_link; |
56 | /* Last negotiated link state */ | 56 | /* Last negotiated link state */ |
57 | uint64_t link_info; | 57 | uint64_t link_info; |
58 | /* Called periodically to check link status */ | 58 | /* Called periodically to check link status */ |
diff --git a/drivers/staging/panel/panel.c b/drivers/staging/panel/panel.c index 4ce399b6d237..f98a52448eae 100644 --- a/drivers/staging/panel/panel.c +++ b/drivers/staging/panel/panel.c | |||
@@ -55,7 +55,7 @@ | |||
55 | #include <linux/list.h> | 55 | #include <linux/list.h> |
56 | #include <linux/notifier.h> | 56 | #include <linux/notifier.h> |
57 | #include <linux/reboot.h> | 57 | #include <linux/reboot.h> |
58 | #include <linux/utsrelease.h> | 58 | #include <generated/utsrelease.h> |
59 | 59 | ||
60 | #include <linux/io.h> | 60 | #include <linux/io.h> |
61 | #include <asm/uaccess.h> | 61 | #include <asm/uaccess.h> |
diff --git a/drivers/usb/host/ehci-omap.c b/drivers/usb/host/ehci-omap.c index 12f1ad2fd0e8..74d07f4e8b7d 100644 --- a/drivers/usb/host/ehci-omap.c +++ b/drivers/usb/host/ehci-omap.c | |||
@@ -37,7 +37,7 @@ | |||
37 | #include <linux/platform_device.h> | 37 | #include <linux/platform_device.h> |
38 | #include <linux/clk.h> | 38 | #include <linux/clk.h> |
39 | #include <linux/gpio.h> | 39 | #include <linux/gpio.h> |
40 | #include <mach/usb.h> | 40 | #include <plat/usb.h> |
41 | 41 | ||
42 | /* | 42 | /* |
43 | * OMAP USBHOST Register addresses: VIRTUAL ADDRESSES | 43 | * OMAP USBHOST Register addresses: VIRTUAL ADDRESSES |
diff --git a/drivers/video/atafb.c b/drivers/video/atafb.c index 2051c9dc813b..b7687c55fe16 100644 --- a/drivers/video/atafb.c +++ b/drivers/video/atafb.c | |||
@@ -2245,9 +2245,6 @@ static int ext_setcolreg(unsigned int regno, unsigned int red, | |||
2245 | if (regno > 255) | 2245 | if (regno > 255) |
2246 | return 1; | 2246 | return 1; |
2247 | 2247 | ||
2248 | if (regno > 255) | ||
2249 | return 1; | ||
2250 | |||
2251 | switch (external_card_type) { | 2248 | switch (external_card_type) { |
2252 | case IS_VGA: | 2249 | case IS_VGA: |
2253 | OUTB(0x3c8, regno); | 2250 | OUTB(0x3c8, regno); |
diff --git a/drivers/video/backlight/adp5520_bl.c b/drivers/video/backlight/adp5520_bl.c index 4c10edecfb66..86d95c228adb 100644 --- a/drivers/video/backlight/adp5520_bl.c +++ b/drivers/video/backlight/adp5520_bl.c | |||
@@ -85,7 +85,7 @@ static int adp5520_bl_get_brightness(struct backlight_device *bl) | |||
85 | return error ? data->current_brightness : reg_val; | 85 | return error ? data->current_brightness : reg_val; |
86 | } | 86 | } |
87 | 87 | ||
88 | static struct backlight_ops adp5520_bl_ops = { | 88 | static const struct backlight_ops adp5520_bl_ops = { |
89 | .update_status = adp5520_bl_update_status, | 89 | .update_status = adp5520_bl_update_status, |
90 | .get_brightness = adp5520_bl_get_brightness, | 90 | .get_brightness = adp5520_bl_get_brightness, |
91 | }; | 91 | }; |
diff --git a/drivers/video/backlight/adx_bl.c b/drivers/video/backlight/adx_bl.c index 2c3bdfc620b7..d769b0bab21a 100644 --- a/drivers/video/backlight/adx_bl.c +++ b/drivers/video/backlight/adx_bl.c | |||
@@ -61,7 +61,7 @@ static int adx_backlight_check_fb(struct fb_info *fb) | |||
61 | return 1; | 61 | return 1; |
62 | } | 62 | } |
63 | 63 | ||
64 | static struct backlight_ops adx_backlight_ops = { | 64 | static const struct backlight_ops adx_backlight_ops = { |
65 | .options = 0, | 65 | .options = 0, |
66 | .update_status = adx_backlight_update_status, | 66 | .update_status = adx_backlight_update_status, |
67 | .get_brightness = adx_backlight_get_brightness, | 67 | .get_brightness = adx_backlight_get_brightness, |
diff --git a/drivers/video/backlight/atmel-pwm-bl.c b/drivers/video/backlight/atmel-pwm-bl.c index 2cf7ba52f67c..f625ffc69ad3 100644 --- a/drivers/video/backlight/atmel-pwm-bl.c +++ b/drivers/video/backlight/atmel-pwm-bl.c | |||
@@ -113,7 +113,7 @@ static int atmel_pwm_bl_init_pwm(struct atmel_pwm_bl *pwmbl) | |||
113 | return pwm_channel_enable(&pwmbl->pwmc); | 113 | return pwm_channel_enable(&pwmbl->pwmc); |
114 | } | 114 | } |
115 | 115 | ||
116 | static struct backlight_ops atmel_pwm_bl_ops = { | 116 | static const struct backlight_ops atmel_pwm_bl_ops = { |
117 | .get_brightness = atmel_pwm_bl_get_intensity, | 117 | .get_brightness = atmel_pwm_bl_get_intensity, |
118 | .update_status = atmel_pwm_bl_set_intensity, | 118 | .update_status = atmel_pwm_bl_set_intensity, |
119 | }; | 119 | }; |
diff --git a/drivers/video/backlight/backlight.c b/drivers/video/backlight/backlight.c index 6615ac7fa60a..18829cf68b1b 100644 --- a/drivers/video/backlight/backlight.c +++ b/drivers/video/backlight/backlight.c | |||
@@ -269,7 +269,7 @@ EXPORT_SYMBOL(backlight_force_update); | |||
269 | * ERR_PTR() or a pointer to the newly allocated device. | 269 | * ERR_PTR() or a pointer to the newly allocated device. |
270 | */ | 270 | */ |
271 | struct backlight_device *backlight_device_register(const char *name, | 271 | struct backlight_device *backlight_device_register(const char *name, |
272 | struct device *parent, void *devdata, struct backlight_ops *ops) | 272 | struct device *parent, void *devdata, const struct backlight_ops *ops) |
273 | { | 273 | { |
274 | struct backlight_device *new_bd; | 274 | struct backlight_device *new_bd; |
275 | int rc; | 275 | int rc; |
diff --git a/drivers/video/backlight/corgi_lcd.c b/drivers/video/backlight/corgi_lcd.c index 96774949cd30..b4bcf8043797 100644 --- a/drivers/video/backlight/corgi_lcd.c +++ b/drivers/video/backlight/corgi_lcd.c | |||
@@ -451,7 +451,7 @@ void corgi_lcd_limit_intensity(int limit) | |||
451 | } | 451 | } |
452 | EXPORT_SYMBOL(corgi_lcd_limit_intensity); | 452 | EXPORT_SYMBOL(corgi_lcd_limit_intensity); |
453 | 453 | ||
454 | static struct backlight_ops corgi_bl_ops = { | 454 | static const struct backlight_ops corgi_bl_ops = { |
455 | .get_brightness = corgi_bl_get_intensity, | 455 | .get_brightness = corgi_bl_get_intensity, |
456 | .update_status = corgi_bl_update_status, | 456 | .update_status = corgi_bl_update_status, |
457 | }; | 457 | }; |
diff --git a/drivers/video/backlight/cr_bllcd.c b/drivers/video/backlight/cr_bllcd.c index b9fe62b475c6..da86db4374a0 100644 --- a/drivers/video/backlight/cr_bllcd.c +++ b/drivers/video/backlight/cr_bllcd.c | |||
@@ -108,7 +108,7 @@ static int cr_backlight_get_intensity(struct backlight_device *bd) | |||
108 | return intensity; | 108 | return intensity; |
109 | } | 109 | } |
110 | 110 | ||
111 | static struct backlight_ops cr_backlight_ops = { | 111 | static const struct backlight_ops cr_backlight_ops = { |
112 | .get_brightness = cr_backlight_get_intensity, | 112 | .get_brightness = cr_backlight_get_intensity, |
113 | .update_status = cr_backlight_set_intensity, | 113 | .update_status = cr_backlight_set_intensity, |
114 | }; | 114 | }; |
@@ -201,7 +201,7 @@ static int cr_backlight_probe(struct platform_device *pdev) | |||
201 | if (IS_ERR(ldp)) { | 201 | if (IS_ERR(ldp)) { |
202 | backlight_device_unregister(bdp); | 202 | backlight_device_unregister(bdp); |
203 | pci_dev_put(lpc_dev); | 203 | pci_dev_put(lpc_dev); |
204 | return PTR_ERR(bdp); | 204 | return PTR_ERR(ldp); |
205 | } | 205 | } |
206 | 206 | ||
207 | pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR, | 207 | pci_read_config_dword(lpc_dev, CRVML_REG_GPIOBAR, |
diff --git a/drivers/video/backlight/da903x_bl.c b/drivers/video/backlight/da903x_bl.c index f2d76dae1eb3..74cdc640173d 100644 --- a/drivers/video/backlight/da903x_bl.c +++ b/drivers/video/backlight/da903x_bl.c | |||
@@ -95,7 +95,7 @@ static int da903x_backlight_get_brightness(struct backlight_device *bl) | |||
95 | return data->current_brightness; | 95 | return data->current_brightness; |
96 | } | 96 | } |
97 | 97 | ||
98 | static struct backlight_ops da903x_backlight_ops = { | 98 | static const struct backlight_ops da903x_backlight_ops = { |
99 | .update_status = da903x_backlight_update_status, | 99 | .update_status = da903x_backlight_update_status, |
100 | .get_brightness = da903x_backlight_get_brightness, | 100 | .get_brightness = da903x_backlight_get_brightness, |
101 | }; | 101 | }; |
diff --git a/drivers/video/backlight/generic_bl.c b/drivers/video/backlight/generic_bl.c index 6d27f62fdcd0..e6d348e63596 100644 --- a/drivers/video/backlight/generic_bl.c +++ b/drivers/video/backlight/generic_bl.c | |||
@@ -70,7 +70,7 @@ void corgibl_limit_intensity(int limit) | |||
70 | } | 70 | } |
71 | EXPORT_SYMBOL(corgibl_limit_intensity); | 71 | EXPORT_SYMBOL(corgibl_limit_intensity); |
72 | 72 | ||
73 | static struct backlight_ops genericbl_ops = { | 73 | static const struct backlight_ops genericbl_ops = { |
74 | .options = BL_CORE_SUSPENDRESUME, | 74 | .options = BL_CORE_SUSPENDRESUME, |
75 | .get_brightness = genericbl_get_intensity, | 75 | .get_brightness = genericbl_get_intensity, |
76 | .update_status = genericbl_send_intensity, | 76 | .update_status = genericbl_send_intensity, |
diff --git a/drivers/video/backlight/hp680_bl.c b/drivers/video/backlight/hp680_bl.c index 7fb4eefff80d..f7cc528d5be7 100644 --- a/drivers/video/backlight/hp680_bl.c +++ b/drivers/video/backlight/hp680_bl.c | |||
@@ -98,7 +98,7 @@ static int hp680bl_get_intensity(struct backlight_device *bd) | |||
98 | return current_intensity; | 98 | return current_intensity; |
99 | } | 99 | } |
100 | 100 | ||
101 | static struct backlight_ops hp680bl_ops = { | 101 | static const struct backlight_ops hp680bl_ops = { |
102 | .get_brightness = hp680bl_get_intensity, | 102 | .get_brightness = hp680bl_get_intensity, |
103 | .update_status = hp680bl_set_intensity, | 103 | .update_status = hp680bl_set_intensity, |
104 | }; | 104 | }; |
diff --git a/drivers/video/backlight/jornada720_bl.c b/drivers/video/backlight/jornada720_bl.c index 7aed2565c1bd..db9071fc5665 100644 --- a/drivers/video/backlight/jornada720_bl.c +++ b/drivers/video/backlight/jornada720_bl.c | |||
@@ -93,7 +93,7 @@ out: | |||
93 | return ret; | 93 | return ret; |
94 | } | 94 | } |
95 | 95 | ||
96 | static struct backlight_ops jornada_bl_ops = { | 96 | static const struct backlight_ops jornada_bl_ops = { |
97 | .get_brightness = jornada_bl_get_brightness, | 97 | .get_brightness = jornada_bl_get_brightness, |
98 | .update_status = jornada_bl_update_status, | 98 | .update_status = jornada_bl_update_status, |
99 | .options = BL_CORE_SUSPENDRESUME, | 99 | .options = BL_CORE_SUSPENDRESUME, |
diff --git a/drivers/video/backlight/kb3886_bl.c b/drivers/video/backlight/kb3886_bl.c index a38fda1742dd..939e7b830cf3 100644 --- a/drivers/video/backlight/kb3886_bl.c +++ b/drivers/video/backlight/kb3886_bl.c | |||
@@ -134,7 +134,7 @@ static int kb3886bl_get_intensity(struct backlight_device *bd) | |||
134 | return kb3886bl_intensity; | 134 | return kb3886bl_intensity; |
135 | } | 135 | } |
136 | 136 | ||
137 | static struct backlight_ops kb3886bl_ops = { | 137 | static const struct backlight_ops kb3886bl_ops = { |
138 | .get_brightness = kb3886bl_get_intensity, | 138 | .get_brightness = kb3886bl_get_intensity, |
139 | .update_status = kb3886bl_send_intensity, | 139 | .update_status = kb3886bl_send_intensity, |
140 | }; | 140 | }; |
diff --git a/drivers/video/backlight/locomolcd.c b/drivers/video/backlight/locomolcd.c index 6b488b8a7eee..00a9591b0003 100644 --- a/drivers/video/backlight/locomolcd.c +++ b/drivers/video/backlight/locomolcd.c | |||
@@ -141,7 +141,7 @@ static int locomolcd_get_intensity(struct backlight_device *bd) | |||
141 | return current_intensity; | 141 | return current_intensity; |
142 | } | 142 | } |
143 | 143 | ||
144 | static struct backlight_ops locomobl_data = { | 144 | static const struct backlight_ops locomobl_data = { |
145 | .get_brightness = locomolcd_get_intensity, | 145 | .get_brightness = locomolcd_get_intensity, |
146 | .update_status = locomolcd_set_intensity, | 146 | .update_status = locomolcd_set_intensity, |
147 | }; | 147 | }; |
diff --git a/drivers/video/backlight/mbp_nvidia_bl.c b/drivers/video/backlight/mbp_nvidia_bl.c index 9edb8d7c295f..2e78b0784bdc 100644 --- a/drivers/video/backlight/mbp_nvidia_bl.c +++ b/drivers/video/backlight/mbp_nvidia_bl.c | |||
@@ -33,7 +33,7 @@ struct dmi_match_data { | |||
33 | unsigned long iostart; | 33 | unsigned long iostart; |
34 | unsigned long iolen; | 34 | unsigned long iolen; |
35 | /* Backlight operations structure. */ | 35 | /* Backlight operations structure. */ |
36 | struct backlight_ops backlight_ops; | 36 | const struct backlight_ops backlight_ops; |
37 | }; | 37 | }; |
38 | 38 | ||
39 | /* Module parameters. */ | 39 | /* Module parameters. */ |
@@ -220,6 +220,24 @@ static const struct dmi_system_id __initdata mbp_device_table[] = { | |||
220 | }, | 220 | }, |
221 | { | 221 | { |
222 | .callback = mbp_dmi_match, | 222 | .callback = mbp_dmi_match, |
223 | .ident = "MacBookPro 5,3", | ||
224 | .matches = { | ||
225 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | ||
226 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,3"), | ||
227 | }, | ||
228 | .driver_data = (void *)&nvidia_chipset_data, | ||
229 | }, | ||
230 | { | ||
231 | .callback = mbp_dmi_match, | ||
232 | .ident = "MacBookPro 5,4", | ||
233 | .matches = { | ||
234 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | ||
235 | DMI_MATCH(DMI_PRODUCT_NAME, "MacBookPro5,4"), | ||
236 | }, | ||
237 | .driver_data = (void *)&nvidia_chipset_data, | ||
238 | }, | ||
239 | { | ||
240 | .callback = mbp_dmi_match, | ||
223 | .ident = "MacBookPro 5,5", | 241 | .ident = "MacBookPro 5,5", |
224 | .matches = { | 242 | .matches = { |
225 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), | 243 | DMI_MATCH(DMI_SYS_VENDOR, "Apple Inc."), |
diff --git a/drivers/video/backlight/omap1_bl.c b/drivers/video/backlight/omap1_bl.c index 8693e5fcd2eb..409ca9643528 100644 --- a/drivers/video/backlight/omap1_bl.c +++ b/drivers/video/backlight/omap1_bl.c | |||
@@ -125,7 +125,7 @@ static int omapbl_get_intensity(struct backlight_device *dev) | |||
125 | return bl->current_intensity; | 125 | return bl->current_intensity; |
126 | } | 126 | } |
127 | 127 | ||
128 | static struct backlight_ops omapbl_ops = { | 128 | static const struct backlight_ops omapbl_ops = { |
129 | .get_brightness = omapbl_get_intensity, | 129 | .get_brightness = omapbl_get_intensity, |
130 | .update_status = omapbl_update_status, | 130 | .update_status = omapbl_update_status, |
131 | }; | 131 | }; |
diff --git a/drivers/video/backlight/progear_bl.c b/drivers/video/backlight/progear_bl.c index 9edaf24fd82d..075786e05034 100644 --- a/drivers/video/backlight/progear_bl.c +++ b/drivers/video/backlight/progear_bl.c | |||
@@ -54,7 +54,7 @@ static int progearbl_get_intensity(struct backlight_device *bd) | |||
54 | return intensity - HW_LEVEL_MIN; | 54 | return intensity - HW_LEVEL_MIN; |
55 | } | 55 | } |
56 | 56 | ||
57 | static struct backlight_ops progearbl_ops = { | 57 | static const struct backlight_ops progearbl_ops = { |
58 | .get_brightness = progearbl_get_intensity, | 58 | .get_brightness = progearbl_get_intensity, |
59 | .update_status = progearbl_set_intensity, | 59 | .update_status = progearbl_set_intensity, |
60 | }; | 60 | }; |
diff --git a/drivers/video/backlight/pwm_bl.c b/drivers/video/backlight/pwm_bl.c index 887166267443..9d2ec2a1cce8 100644 --- a/drivers/video/backlight/pwm_bl.c +++ b/drivers/video/backlight/pwm_bl.c | |||
@@ -22,8 +22,10 @@ | |||
22 | 22 | ||
23 | struct pwm_bl_data { | 23 | struct pwm_bl_data { |
24 | struct pwm_device *pwm; | 24 | struct pwm_device *pwm; |
25 | struct device *dev; | ||
25 | unsigned int period; | 26 | unsigned int period; |
26 | int (*notify)(int brightness); | 27 | int (*notify)(struct device *, |
28 | int brightness); | ||
27 | }; | 29 | }; |
28 | 30 | ||
29 | static int pwm_backlight_update_status(struct backlight_device *bl) | 31 | static int pwm_backlight_update_status(struct backlight_device *bl) |
@@ -39,7 +41,7 @@ static int pwm_backlight_update_status(struct backlight_device *bl) | |||
39 | brightness = 0; | 41 | brightness = 0; |
40 | 42 | ||
41 | if (pb->notify) | 43 | if (pb->notify) |
42 | brightness = pb->notify(brightness); | 44 | brightness = pb->notify(pb->dev, brightness); |
43 | 45 | ||
44 | if (brightness == 0) { | 46 | if (brightness == 0) { |
45 | pwm_config(pb->pwm, 0, pb->period); | 47 | pwm_config(pb->pwm, 0, pb->period); |
@@ -56,7 +58,7 @@ static int pwm_backlight_get_brightness(struct backlight_device *bl) | |||
56 | return bl->props.brightness; | 58 | return bl->props.brightness; |
57 | } | 59 | } |
58 | 60 | ||
59 | static struct backlight_ops pwm_backlight_ops = { | 61 | static const struct backlight_ops pwm_backlight_ops = { |
60 | .update_status = pwm_backlight_update_status, | 62 | .update_status = pwm_backlight_update_status, |
61 | .get_brightness = pwm_backlight_get_brightness, | 63 | .get_brightness = pwm_backlight_get_brightness, |
62 | }; | 64 | }; |
@@ -88,6 +90,7 @@ static int pwm_backlight_probe(struct platform_device *pdev) | |||
88 | 90 | ||
89 | pb->period = data->pwm_period_ns; | 91 | pb->period = data->pwm_period_ns; |
90 | pb->notify = data->notify; | 92 | pb->notify = data->notify; |
93 | pb->dev = &pdev->dev; | ||
91 | 94 | ||
92 | pb->pwm = pwm_request(data->pwm_id, "backlight"); | 95 | pb->pwm = pwm_request(data->pwm_id, "backlight"); |
93 | if (IS_ERR(pb->pwm)) { | 96 | if (IS_ERR(pb->pwm)) { |
@@ -146,7 +149,7 @@ static int pwm_backlight_suspend(struct platform_device *pdev, | |||
146 | struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev); | 149 | struct pwm_bl_data *pb = dev_get_drvdata(&bl->dev); |
147 | 150 | ||
148 | if (pb->notify) | 151 | if (pb->notify) |
149 | pb->notify(0); | 152 | pb->notify(pb->dev, 0); |
150 | pwm_config(pb->pwm, 0, pb->period); | 153 | pwm_config(pb->pwm, 0, pb->period); |
151 | pwm_disable(pb->pwm); | 154 | pwm_disable(pb->pwm); |
152 | return 0; | 155 | return 0; |
diff --git a/drivers/video/backlight/tosa_bl.c b/drivers/video/backlight/tosa_bl.c index 43edbada12d1..e14ce4d469f5 100644 --- a/drivers/video/backlight/tosa_bl.c +++ b/drivers/video/backlight/tosa_bl.c | |||
@@ -72,7 +72,7 @@ static int tosa_bl_get_brightness(struct backlight_device *dev) | |||
72 | return props->brightness; | 72 | return props->brightness; |
73 | } | 73 | } |
74 | 74 | ||
75 | static struct backlight_ops bl_ops = { | 75 | static const struct backlight_ops bl_ops = { |
76 | .get_brightness = tosa_bl_get_brightness, | 76 | .get_brightness = tosa_bl_get_brightness, |
77 | .update_status = tosa_bl_update_status, | 77 | .update_status = tosa_bl_update_status, |
78 | }; | 78 | }; |
diff --git a/drivers/video/backlight/wm831x_bl.c b/drivers/video/backlight/wm831x_bl.c index 467bdb7efb23..e32add37a203 100644 --- a/drivers/video/backlight/wm831x_bl.c +++ b/drivers/video/backlight/wm831x_bl.c | |||
@@ -112,7 +112,7 @@ static int wm831x_backlight_get_brightness(struct backlight_device *bl) | |||
112 | return data->current_brightness; | 112 | return data->current_brightness; |
113 | } | 113 | } |
114 | 114 | ||
115 | static struct backlight_ops wm831x_backlight_ops = { | 115 | static const struct backlight_ops wm831x_backlight_ops = { |
116 | .options = BL_CORE_SUSPENDRESUME, | 116 | .options = BL_CORE_SUSPENDRESUME, |
117 | .update_status = wm831x_backlight_update_status, | 117 | .update_status = wm831x_backlight_update_status, |
118 | .get_brightness = wm831x_backlight_get_brightness, | 118 | .get_brightness = wm831x_backlight_get_brightness, |
diff --git a/drivers/video/omap/lcd_ldp.c b/drivers/video/omap/lcd_ldp.c index 5bb7f6f14601..0f5952cae85e 100644 --- a/drivers/video/omap/lcd_ldp.c +++ b/drivers/video/omap/lcd_ldp.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/module.h> | 24 | #include <linux/module.h> |
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/delay.h> | 26 | #include <linux/delay.h> |
27 | #include <linux/i2c/twl4030.h> | 27 | #include <linux/i2c/twl.h> |
28 | 28 | ||
29 | #include <mach/gpio.h> | 29 | #include <mach/gpio.h> |
30 | #include <plat/mux.h> | 30 | #include <plat/mux.h> |
@@ -59,7 +59,7 @@ | |||
59 | #define TWL4030_VPLL2_DEV_GRP 0x33 | 59 | #define TWL4030_VPLL2_DEV_GRP 0x33 |
60 | #define TWL4030_VPLL2_DEDICATED 0x36 | 60 | #define TWL4030_VPLL2_DEDICATED 0x36 |
61 | 61 | ||
62 | #define t2_out(c, r, v) twl4030_i2c_write_u8(c, r, v) | 62 | #define t2_out(c, r, v) twl_i2c_write_u8(c, r, v) |
63 | 63 | ||
64 | 64 | ||
65 | static int ldp_panel_init(struct lcd_panel *panel, | 65 | static int ldp_panel_init(struct lcd_panel *panel, |
diff --git a/drivers/video/omap/lcd_omap2evm.c b/drivers/video/omap/lcd_omap2evm.c index 006c2fe7360e..7e7a65c08452 100644 --- a/drivers/video/omap/lcd_omap2evm.c +++ b/drivers/video/omap/lcd_omap2evm.c | |||
@@ -24,7 +24,7 @@ | |||
24 | #include <linux/module.h> | 24 | #include <linux/module.h> |
25 | #include <linux/platform_device.h> | 25 | #include <linux/platform_device.h> |
26 | #include <linux/gpio.h> | 26 | #include <linux/gpio.h> |
27 | #include <linux/i2c/twl4030.h> | 27 | #include <linux/i2c/twl.h> |
28 | 28 | ||
29 | #include <plat/mux.h> | 29 | #include <plat/mux.h> |
30 | #include <asm/mach-types.h> | 30 | #include <asm/mach-types.h> |
@@ -61,9 +61,9 @@ static int omap2evm_panel_init(struct lcd_panel *panel, | |||
61 | gpio_direction_output(LCD_PANEL_LR, 1); | 61 | gpio_direction_output(LCD_PANEL_LR, 1); |
62 | gpio_direction_output(LCD_PANEL_UD, 1); | 62 | gpio_direction_output(LCD_PANEL_UD, 1); |
63 | 63 | ||
64 | twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); | 64 | twl_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); |
65 | twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); | 65 | twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); |
66 | twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); | 66 | twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); |
67 | bklight_level = 100; | 67 | bklight_level = 100; |
68 | 68 | ||
69 | return 0; | 69 | return 0; |
@@ -101,7 +101,7 @@ static int omap2evm_bklight_setlevel(struct lcd_panel *panel, | |||
101 | u8 c; | 101 | u8 c; |
102 | if ((level >= 0) && (level <= 100)) { | 102 | if ((level >= 0) && (level <= 100)) { |
103 | c = (125 * (100 - level)) / 100 + 2; | 103 | c = (125 * (100 - level)) / 100 + 2; |
104 | twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); | 104 | twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); |
105 | bklight_level = level; | 105 | bklight_level = level; |
106 | } | 106 | } |
107 | return 0; | 107 | return 0; |
diff --git a/drivers/video/omap/lcd_omap3beagle.c b/drivers/video/omap/lcd_omap3beagle.c index fc503d8f3c24..ca75cc2a87a5 100644 --- a/drivers/video/omap/lcd_omap3beagle.c +++ b/drivers/video/omap/lcd_omap3beagle.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
26 | #include <linux/i2c/twl4030.h> | 26 | #include <linux/i2c/twl.h> |
27 | 27 | ||
28 | #include <plat/mux.h> | 28 | #include <plat/mux.h> |
29 | #include <plat/mux.h> | 29 | #include <plat/mux.h> |
diff --git a/drivers/video/omap/lcd_omap3evm.c b/drivers/video/omap/lcd_omap3evm.c index ae2edc4081a8..06840da0b094 100644 --- a/drivers/video/omap/lcd_omap3evm.c +++ b/drivers/video/omap/lcd_omap3evm.c | |||
@@ -23,7 +23,7 @@ | |||
23 | #include <linux/module.h> | 23 | #include <linux/module.h> |
24 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
25 | #include <linux/gpio.h> | 25 | #include <linux/gpio.h> |
26 | #include <linux/i2c/twl4030.h> | 26 | #include <linux/i2c/twl.h> |
27 | 27 | ||
28 | #include <plat/mux.h> | 28 | #include <plat/mux.h> |
29 | #include <asm/mach-types.h> | 29 | #include <asm/mach-types.h> |
@@ -63,9 +63,9 @@ static int omap3evm_panel_init(struct lcd_panel *panel, | |||
63 | gpio_direction_output(LCD_PANEL_LR, 1); | 63 | gpio_direction_output(LCD_PANEL_LR, 1); |
64 | gpio_direction_output(LCD_PANEL_UD, 1); | 64 | gpio_direction_output(LCD_PANEL_UD, 1); |
65 | 65 | ||
66 | twl4030_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); | 66 | twl_i2c_write_u8(TWL4030_MODULE_LED, 0x11, TWL_LED_LEDEN); |
67 | twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); | 67 | twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x01, TWL_PWMA_PWMAON); |
68 | twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); | 68 | twl_i2c_write_u8(TWL4030_MODULE_PWMA, 0x02, TWL_PWMA_PWMAOFF); |
69 | bklight_level = 100; | 69 | bklight_level = 100; |
70 | 70 | ||
71 | return 0; | 71 | return 0; |
@@ -102,7 +102,7 @@ static int omap3evm_bklight_setlevel(struct lcd_panel *panel, | |||
102 | u8 c; | 102 | u8 c; |
103 | if ((level >= 0) && (level <= 100)) { | 103 | if ((level >= 0) && (level <= 100)) { |
104 | c = (125 * (100 - level)) / 100 + 2; | 104 | c = (125 * (100 - level)) / 100 + 2; |
105 | twl4030_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); | 105 | twl_i2c_write_u8(TWL4030_MODULE_PWMA, c, TWL_PWMA_PWMAOFF); |
106 | bklight_level = level; | 106 | bklight_level = level; |
107 | } | 107 | } |
108 | return 0; | 108 | return 0; |
diff --git a/drivers/video/omap/lcd_overo.c b/drivers/video/omap/lcd_overo.c index 56ee192e9ee2..564933ffac6e 100644 --- a/drivers/video/omap/lcd_overo.c +++ b/drivers/video/omap/lcd_overo.c | |||
@@ -21,7 +21,7 @@ | |||
21 | 21 | ||
22 | #include <linux/module.h> | 22 | #include <linux/module.h> |
23 | #include <linux/platform_device.h> | 23 | #include <linux/platform_device.h> |
24 | #include <linux/i2c/twl4030.h> | 24 | #include <linux/i2c/twl.h> |
25 | 25 | ||
26 | #include <mach/gpio.h> | 26 | #include <mach/gpio.h> |
27 | #include <plat/mux.h> | 27 | #include <plat/mux.h> |
diff --git a/drivers/video/via/viafbdev.c b/drivers/video/via/viafbdev.c index 10d8c4b4baeb..d8df17a7d5fc 100644 --- a/drivers/video/via/viafbdev.c +++ b/drivers/video/via/viafbdev.c | |||
@@ -680,7 +680,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg) | |||
680 | if (!viafb_gamma_table) | 680 | if (!viafb_gamma_table) |
681 | return -ENOMEM; | 681 | return -ENOMEM; |
682 | if (copy_from_user(viafb_gamma_table, argp, | 682 | if (copy_from_user(viafb_gamma_table, argp, |
683 | sizeof(viafb_gamma_table))) { | 683 | 256 * sizeof(u32))) { |
684 | kfree(viafb_gamma_table); | 684 | kfree(viafb_gamma_table); |
685 | return -EFAULT; | 685 | return -EFAULT; |
686 | } | 686 | } |
@@ -694,7 +694,7 @@ static int viafb_ioctl(struct fb_info *info, u_int cmd, u_long arg) | |||
694 | return -ENOMEM; | 694 | return -ENOMEM; |
695 | viafb_get_gamma_table(viafb_gamma_table); | 695 | viafb_get_gamma_table(viafb_gamma_table); |
696 | if (copy_to_user(argp, viafb_gamma_table, | 696 | if (copy_to_user(argp, viafb_gamma_table, |
697 | sizeof(viafb_gamma_table))) { | 697 | 256 * sizeof(u32))) { |
698 | kfree(viafb_gamma_table); | 698 | kfree(viafb_gamma_table); |
699 | return -EFAULT; | 699 | return -EFAULT; |
700 | } | 700 | } |
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index d958b76430a2..088f32f29a6e 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig | |||
@@ -368,7 +368,7 @@ config ALIM7101_WDT | |||
368 | 368 | ||
369 | config GEODE_WDT | 369 | config GEODE_WDT |
370 | tristate "AMD Geode CS5535/CS5536 Watchdog" | 370 | tristate "AMD Geode CS5535/CS5536 Watchdog" |
371 | depends on MGEODE_LX | 371 | depends on CS5535_MFGPT |
372 | help | 372 | help |
373 | This driver enables a watchdog capability built into the | 373 | This driver enables a watchdog capability built into the |
374 | CS5535/CS5536 companion chips for the AMD Geode GX and LX | 374 | CS5535/CS5536 companion chips for the AMD Geode GX and LX |
@@ -815,16 +815,6 @@ config PNX833X_WDT | |||
815 | timer has expired and no process has written to /dev/watchdog during | 815 | timer has expired and no process has written to /dev/watchdog during |
816 | that time. | 816 | that time. |
817 | 817 | ||
818 | config WDT_RM9K_GPI | ||
819 | tristate "RM9000/GPI hardware watchdog" | ||
820 | depends on CPU_RM9000 | ||
821 | help | ||
822 | Watchdog implementation using the GPI hardware found on | ||
823 | PMC-Sierra RM9xxx CPUs. | ||
824 | |||
825 | To compile this driver as a module, choose M here: the | ||
826 | module will be called rm9k_wdt. | ||
827 | |||
828 | config SIBYTE_WDOG | 818 | config SIBYTE_WDOG |
829 | tristate "Sibyte SoC hardware watchdog" | 819 | tristate "Sibyte SoC hardware watchdog" |
830 | depends on CPU_SB1 | 820 | depends on CPU_SB1 |
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 89c045dc468e..475c61100069 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile | |||
@@ -109,7 +109,6 @@ obj-$(CONFIG_RC32434_WDT) += rc32434_wdt.o | |||
109 | obj-$(CONFIG_INDYDOG) += indydog.o | 109 | obj-$(CONFIG_INDYDOG) += indydog.o |
110 | obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o | 110 | obj-$(CONFIG_WDT_MTX1) += mtx-1_wdt.o |
111 | obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o | 111 | obj-$(CONFIG_PNX833X_WDT) += pnx833x_wdt.o |
112 | obj-$(CONFIG_WDT_RM9K_GPI) += rm9k_wdt.o | ||
113 | obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o | 112 | obj-$(CONFIG_SIBYTE_WDOG) += sb_wdog.o |
114 | obj-$(CONFIG_AR7_WDT) += ar7_wdt.o | 113 | obj-$(CONFIG_AR7_WDT) += ar7_wdt.o |
115 | obj-$(CONFIG_TXX9_WDT) += txx9wdt.o | 114 | obj-$(CONFIG_TXX9_WDT) += txx9wdt.o |
diff --git a/drivers/watchdog/geodewdt.c b/drivers/watchdog/geodewdt.c index 9acf0015a1e7..38252ff828ca 100644 --- a/drivers/watchdog/geodewdt.c +++ b/drivers/watchdog/geodewdt.c | |||
@@ -1,6 +1,7 @@ | |||
1 | /* Watchdog timer for the Geode GX/LX with the CS5535/CS5536 companion chip | 1 | /* Watchdog timer for machines with the CS5535/CS5536 companion chip |
2 | * | 2 | * |
3 | * Copyright (C) 2006-2007, Advanced Micro Devices, Inc. | 3 | * Copyright (C) 2006-2007, Advanced Micro Devices, Inc. |
4 | * Copyright (C) 2009 Andres Salomon <dilinger@collabora.co.uk> | ||
4 | * | 5 | * |
5 | * This program is free software; you can redistribute it and/or | 6 | * This program is free software; you can redistribute it and/or |
6 | * modify it under the terms of the GNU General Public License | 7 | * modify it under the terms of the GNU General Public License |
@@ -19,7 +20,7 @@ | |||
19 | #include <linux/reboot.h> | 20 | #include <linux/reboot.h> |
20 | #include <linux/uaccess.h> | 21 | #include <linux/uaccess.h> |
21 | 22 | ||
22 | #include <asm/geode.h> | 23 | #include <linux/cs5535.h> |
23 | 24 | ||
24 | #define GEODEWDT_HZ 500 | 25 | #define GEODEWDT_HZ 500 |
25 | #define GEODEWDT_SCALE 6 | 26 | #define GEODEWDT_SCALE 6 |
@@ -46,25 +47,25 @@ MODULE_PARM_DESC(nowayout, | |||
46 | 47 | ||
47 | static struct platform_device *geodewdt_platform_device; | 48 | static struct platform_device *geodewdt_platform_device; |
48 | static unsigned long wdt_flags; | 49 | static unsigned long wdt_flags; |
49 | static int wdt_timer; | 50 | static struct cs5535_mfgpt_timer *wdt_timer; |
50 | static int safe_close; | 51 | static int safe_close; |
51 | 52 | ||
52 | static void geodewdt_ping(void) | 53 | static void geodewdt_ping(void) |
53 | { | 54 | { |
54 | /* Stop the counter */ | 55 | /* Stop the counter */ |
55 | geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); | 56 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); |
56 | 57 | ||
57 | /* Reset the counter */ | 58 | /* Reset the counter */ |
58 | geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); | 59 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); |
59 | 60 | ||
60 | /* Enable the counter */ | 61 | /* Enable the counter */ |
61 | geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN); | 62 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN); |
62 | } | 63 | } |
63 | 64 | ||
64 | static void geodewdt_disable(void) | 65 | static void geodewdt_disable(void) |
65 | { | 66 | { |
66 | geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); | 67 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); |
67 | geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); | 68 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); |
68 | } | 69 | } |
69 | 70 | ||
70 | static int geodewdt_set_heartbeat(int val) | 71 | static int geodewdt_set_heartbeat(int val) |
@@ -72,10 +73,10 @@ static int geodewdt_set_heartbeat(int val) | |||
72 | if (val < 1 || val > GEODEWDT_MAX_SECONDS) | 73 | if (val < 1 || val > GEODEWDT_MAX_SECONDS) |
73 | return -EINVAL; | 74 | return -EINVAL; |
74 | 75 | ||
75 | geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); | 76 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, 0); |
76 | geode_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, val * GEODEWDT_HZ); | 77 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, val * GEODEWDT_HZ); |
77 | geode_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); | 78 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_COUNTER, 0); |
78 | geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN); | 79 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, MFGPT_SETUP_CNTEN); |
79 | 80 | ||
80 | timeout = val; | 81 | timeout = val; |
81 | return 0; | 82 | return 0; |
@@ -215,28 +216,25 @@ static struct miscdevice geodewdt_miscdev = { | |||
215 | 216 | ||
216 | static int __devinit geodewdt_probe(struct platform_device *dev) | 217 | static int __devinit geodewdt_probe(struct platform_device *dev) |
217 | { | 218 | { |
218 | int ret, timer; | 219 | int ret; |
219 | |||
220 | timer = geode_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING); | ||
221 | 220 | ||
222 | if (timer == -1) { | 221 | wdt_timer = cs5535_mfgpt_alloc_timer(MFGPT_TIMER_ANY, MFGPT_DOMAIN_WORKING); |
222 | if (!wdt_timer) { | ||
223 | printk(KERN_ERR "geodewdt: No timers were available\n"); | 223 | printk(KERN_ERR "geodewdt: No timers were available\n"); |
224 | return -ENODEV; | 224 | return -ENODEV; |
225 | } | 225 | } |
226 | 226 | ||
227 | wdt_timer = timer; | ||
228 | |||
229 | /* Set up the timer */ | 227 | /* Set up the timer */ |
230 | 228 | ||
231 | geode_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, | 229 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_SETUP, |
232 | GEODEWDT_SCALE | (3 << 8)); | 230 | GEODEWDT_SCALE | (3 << 8)); |
233 | 231 | ||
234 | /* Set up comparator 2 to reset when the event fires */ | 232 | /* Set up comparator 2 to reset when the event fires */ |
235 | geode_mfgpt_toggle_event(wdt_timer, MFGPT_CMP2, MFGPT_EVENT_RESET, 1); | 233 | cs5535_mfgpt_toggle_event(wdt_timer, MFGPT_CMP2, MFGPT_EVENT_RESET, 1); |
236 | 234 | ||
237 | /* Set up the initial timeout */ | 235 | /* Set up the initial timeout */ |
238 | 236 | ||
239 | geode_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, | 237 | cs5535_mfgpt_write(wdt_timer, MFGPT_REG_CMP2, |
240 | timeout * GEODEWDT_HZ); | 238 | timeout * GEODEWDT_HZ); |
241 | 239 | ||
242 | ret = misc_register(&geodewdt_miscdev); | 240 | ret = misc_register(&geodewdt_miscdev); |
diff --git a/drivers/watchdog/rm9k_wdt.c b/drivers/watchdog/rm9k_wdt.c deleted file mode 100644 index bb66958b9433..000000000000 --- a/drivers/watchdog/rm9k_wdt.c +++ /dev/null | |||
@@ -1,419 +0,0 @@ | |||
1 | /* | ||
2 | * Watchdog implementation for GPI h/w found on PMC-Sierra RM9xxx | ||
3 | * chips. | ||
4 | * | ||
5 | * Copyright (C) 2004 by Basler Vision Technologies AG | ||
6 | * Author: Thomas Koeller <thomas.koeller@baslerweb.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the GNU General Public License as published by | ||
10 | * the Free Software Foundation; either version 2 of the License, or | ||
11 | * (at your option) any later version. | ||
12 | * | ||
13 | * This program is distributed in the hope that it will be useful, | ||
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
16 | * GNU General Public License for more details. | ||
17 | * | ||
18 | * You should have received a copy of the GNU General Public License | ||
19 | * along with this program; if not, write to the Free Software | ||
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
21 | */ | ||
22 | |||
23 | #include <linux/platform_device.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/moduleparam.h> | ||
26 | #include <linux/interrupt.h> | ||
27 | #include <linux/fs.h> | ||
28 | #include <linux/reboot.h> | ||
29 | #include <linux/notifier.h> | ||
30 | #include <linux/miscdevice.h> | ||
31 | #include <linux/watchdog.h> | ||
32 | #include <linux/io.h> | ||
33 | #include <linux/uaccess.h> | ||
34 | #include <asm/atomic.h> | ||
35 | #include <asm/processor.h> | ||
36 | #include <asm/system.h> | ||
37 | #include <asm/rm9k-ocd.h> | ||
38 | |||
39 | #include <rm9k_wdt.h> | ||
40 | |||
41 | |||
42 | #define CLOCK 125000000 | ||
43 | #define MAX_TIMEOUT_SECONDS 32 | ||
44 | #define CPCCR 0x0080 | ||
45 | #define CPGIG1SR 0x0044 | ||
46 | #define CPGIG1ER 0x0054 | ||
47 | |||
48 | |||
49 | /* Function prototypes */ | ||
50 | static irqreturn_t wdt_gpi_irqhdl(int, void *); | ||
51 | static void wdt_gpi_start(void); | ||
52 | static void wdt_gpi_stop(void); | ||
53 | static void wdt_gpi_set_timeout(unsigned int); | ||
54 | static int wdt_gpi_open(struct inode *, struct file *); | ||
55 | static int wdt_gpi_release(struct inode *, struct file *); | ||
56 | static ssize_t wdt_gpi_write(struct file *, const char __user *, size_t, | ||
57 | loff_t *); | ||
58 | static long wdt_gpi_ioctl(struct file *, unsigned int, unsigned long); | ||
59 | static int wdt_gpi_notify(struct notifier_block *, unsigned long, void *); | ||
60 | static const struct resource *wdt_gpi_get_resource(struct platform_device *, | ||
61 | const char *, unsigned int); | ||
62 | static int __init wdt_gpi_probe(struct platform_device *); | ||
63 | static int __exit wdt_gpi_remove(struct platform_device *); | ||
64 | |||
65 | |||
66 | static const char wdt_gpi_name[] = "wdt_gpi"; | ||
67 | static atomic_t opencnt; | ||
68 | static int expect_close; | ||
69 | static int locked; | ||
70 | |||
71 | |||
72 | /* These are set from device resources */ | ||
73 | static void __iomem *wd_regs; | ||
74 | static unsigned int wd_irq, wd_ctr; | ||
75 | |||
76 | |||
77 | /* Module arguments */ | ||
78 | static int timeout = MAX_TIMEOUT_SECONDS; | ||
79 | module_param(timeout, int, 0444); | ||
80 | MODULE_PARM_DESC(timeout, "Watchdog timeout in seconds"); | ||
81 | |||
82 | static unsigned long resetaddr = 0xbffdc200; | ||
83 | module_param(resetaddr, ulong, 0444); | ||
84 | MODULE_PARM_DESC(resetaddr, "Address to write to to force a reset"); | ||
85 | |||
86 | static unsigned long flagaddr = 0xbffdc104; | ||
87 | module_param(flagaddr, ulong, 0444); | ||
88 | MODULE_PARM_DESC(flagaddr, "Address to write to boot flags to"); | ||
89 | |||
90 | static int powercycle; | ||
91 | module_param(powercycle, bool, 0444); | ||
92 | MODULE_PARM_DESC(powercycle, "Cycle power if watchdog expires"); | ||
93 | |||
94 | static int nowayout = WATCHDOG_NOWAYOUT; | ||
95 | module_param(nowayout, bool, 0444); | ||
96 | MODULE_PARM_DESC(nowayout, "Watchdog cannot be disabled once started"); | ||
97 | |||
98 | |||
99 | /* Kernel interfaces */ | ||
100 | static const struct file_operations fops = { | ||
101 | .owner = THIS_MODULE, | ||
102 | .open = wdt_gpi_open, | ||
103 | .release = wdt_gpi_release, | ||
104 | .write = wdt_gpi_write, | ||
105 | .unlocked_ioctl = wdt_gpi_ioctl, | ||
106 | }; | ||
107 | |||
108 | static struct miscdevice miscdev = { | ||
109 | .minor = WATCHDOG_MINOR, | ||
110 | .name = wdt_gpi_name, | ||
111 | .fops = &fops, | ||
112 | }; | ||
113 | |||
114 | static struct notifier_block wdt_gpi_shutdown = { | ||
115 | .notifier_call = wdt_gpi_notify, | ||
116 | }; | ||
117 | |||
118 | |||
119 | /* Interrupt handler */ | ||
120 | static irqreturn_t wdt_gpi_irqhdl(int irq, void *ctxt) | ||
121 | { | ||
122 | if (!unlikely(__raw_readl(wd_regs + 0x0008) & 0x1)) | ||
123 | return IRQ_NONE; | ||
124 | __raw_writel(0x1, wd_regs + 0x0008); | ||
125 | |||
126 | |||
127 | printk(KERN_CRIT "%s: watchdog expired - resetting system\n", | ||
128 | wdt_gpi_name); | ||
129 | |||
130 | *(volatile char *) flagaddr |= 0x01; | ||
131 | *(volatile char *) resetaddr = powercycle ? 0x01 : 0x2; | ||
132 | iob(); | ||
133 | while (1) | ||
134 | cpu_relax(); | ||
135 | } | ||
136 | |||
137 | |||
138 | /* Watchdog functions */ | ||
139 | static void wdt_gpi_start(void) | ||
140 | { | ||
141 | u32 reg; | ||
142 | |||
143 | lock_titan_regs(); | ||
144 | reg = titan_readl(CPGIG1ER); | ||
145 | titan_writel(reg | (0x100 << wd_ctr), CPGIG1ER); | ||
146 | iob(); | ||
147 | unlock_titan_regs(); | ||
148 | } | ||
149 | |||
150 | static void wdt_gpi_stop(void) | ||
151 | { | ||
152 | u32 reg; | ||
153 | |||
154 | lock_titan_regs(); | ||
155 | reg = titan_readl(CPCCR) & ~(0xf << (wd_ctr * 4)); | ||
156 | titan_writel(reg, CPCCR); | ||
157 | reg = titan_readl(CPGIG1ER); | ||
158 | titan_writel(reg & ~(0x100 << wd_ctr), CPGIG1ER); | ||
159 | iob(); | ||
160 | unlock_titan_regs(); | ||
161 | } | ||
162 | |||
163 | static void wdt_gpi_set_timeout(unsigned int to) | ||
164 | { | ||
165 | u32 reg; | ||
166 | const u32 wdval = (to * CLOCK) & ~0x0000000f; | ||
167 | |||
168 | lock_titan_regs(); | ||
169 | reg = titan_readl(CPCCR) & ~(0xf << (wd_ctr * 4)); | ||
170 | titan_writel(reg, CPCCR); | ||
171 | wmb(); | ||
172 | __raw_writel(wdval, wd_regs + 0x0000); | ||
173 | wmb(); | ||
174 | titan_writel(reg | (0x2 << (wd_ctr * 4)), CPCCR); | ||
175 | wmb(); | ||
176 | titan_writel(reg | (0x5 << (wd_ctr * 4)), CPCCR); | ||
177 | iob(); | ||
178 | unlock_titan_regs(); | ||
179 | } | ||
180 | |||
181 | |||
182 | /* /dev/watchdog operations */ | ||
183 | static int wdt_gpi_open(struct inode *inode, struct file *file) | ||
184 | { | ||
185 | int res; | ||
186 | |||
187 | if (unlikely(atomic_dec_if_positive(&opencnt) < 0)) | ||
188 | return -EBUSY; | ||
189 | |||
190 | expect_close = 0; | ||
191 | if (locked) { | ||
192 | module_put(THIS_MODULE); | ||
193 | free_irq(wd_irq, &miscdev); | ||
194 | locked = 0; | ||
195 | } | ||
196 | |||
197 | res = request_irq(wd_irq, wdt_gpi_irqhdl, IRQF_SHARED | IRQF_DISABLED, | ||
198 | wdt_gpi_name, &miscdev); | ||
199 | if (unlikely(res)) | ||
200 | return res; | ||
201 | |||
202 | wdt_gpi_set_timeout(timeout); | ||
203 | wdt_gpi_start(); | ||
204 | |||
205 | printk(KERN_INFO "%s: watchdog started, timeout = %u seconds\n", | ||
206 | wdt_gpi_name, timeout); | ||
207 | return nonseekable_open(inode, file); | ||
208 | } | ||
209 | |||
210 | static int wdt_gpi_release(struct inode *inode, struct file *file) | ||
211 | { | ||
212 | if (nowayout) { | ||
213 | printk(KERN_INFO "%s: no way out - watchdog left running\n", | ||
214 | wdt_gpi_name); | ||
215 | __module_get(THIS_MODULE); | ||
216 | locked = 1; | ||
217 | } else { | ||
218 | if (expect_close) { | ||
219 | wdt_gpi_stop(); | ||
220 | free_irq(wd_irq, &miscdev); | ||
221 | printk(KERN_INFO "%s: watchdog stopped\n", | ||
222 | wdt_gpi_name); | ||
223 | } else { | ||
224 | printk(KERN_CRIT "%s: unexpected close() -" | ||
225 | " watchdog left running\n", | ||
226 | wdt_gpi_name); | ||
227 | wdt_gpi_set_timeout(timeout); | ||
228 | __module_get(THIS_MODULE); | ||
229 | locked = 1; | ||
230 | } | ||
231 | } | ||
232 | |||
233 | atomic_inc(&opencnt); | ||
234 | return 0; | ||
235 | } | ||
236 | |||
237 | static ssize_t wdt_gpi_write(struct file *f, const char __user *d, size_t s, | ||
238 | loff_t *o) | ||
239 | { | ||
240 | char val; | ||
241 | |||
242 | wdt_gpi_set_timeout(timeout); | ||
243 | expect_close = (s > 0) && !get_user(val, d) && (val == 'V'); | ||
244 | return s ? 1 : 0; | ||
245 | } | ||
246 | |||
247 | static long wdt_gpi_ioctl(struct file *f, unsigned int cmd, unsigned long arg) | ||
248 | { | ||
249 | long res = -ENOTTY; | ||
250 | const long size = _IOC_SIZE(cmd); | ||
251 | int stat; | ||
252 | void __user *argp = (void __user *)arg; | ||
253 | static struct watchdog_info wdinfo = { | ||
254 | .identity = "RM9xxx/GPI watchdog", | ||
255 | .firmware_version = 0, | ||
256 | .options = WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | ||
257 | }; | ||
258 | |||
259 | if (unlikely(_IOC_TYPE(cmd) != WATCHDOG_IOCTL_BASE)) | ||
260 | return -ENOTTY; | ||
261 | |||
262 | if ((_IOC_DIR(cmd) & _IOC_READ) | ||
263 | && !access_ok(VERIFY_WRITE, arg, size)) | ||
264 | return -EFAULT; | ||
265 | |||
266 | if ((_IOC_DIR(cmd) & _IOC_WRITE) | ||
267 | && !access_ok(VERIFY_READ, arg, size)) | ||
268 | return -EFAULT; | ||
269 | |||
270 | expect_close = 0; | ||
271 | |||
272 | switch (cmd) { | ||
273 | case WDIOC_GETSUPPORT: | ||
274 | wdinfo.options = nowayout ? | ||
275 | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING : | ||
276 | WDIOF_SETTIMEOUT | WDIOF_KEEPALIVEPING | | ||
277 | WDIOF_MAGICCLOSE; | ||
278 | res = __copy_to_user(argp, &wdinfo, size) ? -EFAULT : size; | ||
279 | break; | ||
280 | |||
281 | case WDIOC_GETSTATUS: | ||
282 | break; | ||
283 | |||
284 | case WDIOC_GETBOOTSTATUS: | ||
285 | stat = (*(volatile char *) flagaddr & 0x01) | ||
286 | ? WDIOF_CARDRESET : 0; | ||
287 | res = __copy_to_user(argp, &stat, size) ? | ||
288 | -EFAULT : size; | ||
289 | break; | ||
290 | |||
291 | case WDIOC_SETOPTIONS: | ||
292 | break; | ||
293 | |||
294 | case WDIOC_KEEPALIVE: | ||
295 | wdt_gpi_set_timeout(timeout); | ||
296 | res = size; | ||
297 | break; | ||
298 | |||
299 | case WDIOC_SETTIMEOUT: | ||
300 | { | ||
301 | int val; | ||
302 | if (unlikely(__copy_from_user(&val, argp, size))) { | ||
303 | res = -EFAULT; | ||
304 | break; | ||
305 | } | ||
306 | |||
307 | if (val > MAX_TIMEOUT_SECONDS) | ||
308 | val = MAX_TIMEOUT_SECONDS; | ||
309 | timeout = val; | ||
310 | wdt_gpi_set_timeout(val); | ||
311 | res = size; | ||
312 | printk(KERN_INFO "%s: timeout set to %u seconds\n", | ||
313 | wdt_gpi_name, timeout); | ||
314 | } | ||
315 | break; | ||
316 | |||
317 | case WDIOC_GETTIMEOUT: | ||
318 | res = __copy_to_user(argp, &timeout, size) ? | ||
319 | -EFAULT : size; | ||
320 | break; | ||
321 | } | ||
322 | |||
323 | return res; | ||
324 | } | ||
325 | |||
326 | |||
327 | /* Shutdown notifier */ | ||
328 | static int wdt_gpi_notify(struct notifier_block *this, unsigned long code, | ||
329 | void *unused) | ||
330 | { | ||
331 | if (code == SYS_DOWN || code == SYS_HALT) | ||
332 | wdt_gpi_stop(); | ||
333 | |||
334 | return NOTIFY_DONE; | ||
335 | } | ||
336 | |||
337 | |||
338 | /* Init & exit procedures */ | ||
339 | static const struct resource *wdt_gpi_get_resource(struct platform_device *pdv, | ||
340 | const char *name, unsigned int type) | ||
341 | { | ||
342 | char buf[80]; | ||
343 | if (snprintf(buf, sizeof(buf), "%s_0", name) >= sizeof(buf)) | ||
344 | return NULL; | ||
345 | return platform_get_resource_byname(pdv, type, buf); | ||
346 | } | ||
347 | |||
348 | /* No hotplugging on the platform bus - use __devinit */ | ||
349 | static int __devinit wdt_gpi_probe(struct platform_device *pdv) | ||
350 | { | ||
351 | int res; | ||
352 | const struct resource | ||
353 | * const rr = wdt_gpi_get_resource(pdv, WDT_RESOURCE_REGS, | ||
354 | IORESOURCE_MEM), | ||
355 | * const ri = wdt_gpi_get_resource(pdv, WDT_RESOURCE_IRQ, | ||
356 | IORESOURCE_IRQ), | ||
357 | * const rc = wdt_gpi_get_resource(pdv, WDT_RESOURCE_COUNTER, | ||
358 | 0); | ||
359 | |||
360 | if (unlikely(!rr || !ri || !rc)) | ||
361 | return -ENXIO; | ||
362 | |||
363 | wd_regs = ioremap_nocache(rr->start, rr->end + 1 - rr->start); | ||
364 | if (unlikely(!wd_regs)) | ||
365 | return -ENOMEM; | ||
366 | wd_irq = ri->start; | ||
367 | wd_ctr = rc->start; | ||
368 | res = misc_register(&miscdev); | ||
369 | if (res) | ||
370 | iounmap(wd_regs); | ||
371 | else | ||
372 | register_reboot_notifier(&wdt_gpi_shutdown); | ||
373 | return res; | ||
374 | } | ||
375 | |||
376 | static int __devexit wdt_gpi_remove(struct platform_device *dev) | ||
377 | { | ||
378 | int res; | ||
379 | |||
380 | unregister_reboot_notifier(&wdt_gpi_shutdown); | ||
381 | res = misc_deregister(&miscdev); | ||
382 | iounmap(wd_regs); | ||
383 | wd_regs = NULL; | ||
384 | return res; | ||
385 | } | ||
386 | |||
387 | |||
388 | /* Device driver init & exit */ | ||
389 | static struct platform_driver wgt_gpi_driver = { | ||
390 | .driver = { | ||
391 | .name = wdt_gpi_name, | ||
392 | .owner = THIS_MODULE, | ||
393 | }, | ||
394 | .probe = wdt_gpi_probe, | ||
395 | .remove = __devexit_p(wdt_gpi_remove), | ||
396 | }; | ||
397 | |||
398 | static int __init wdt_gpi_init_module(void) | ||
399 | { | ||
400 | atomic_set(&opencnt, 1); | ||
401 | if (timeout > MAX_TIMEOUT_SECONDS) | ||
402 | timeout = MAX_TIMEOUT_SECONDS; | ||
403 | return platform_driver_register(&wdt_gpi_driver); | ||
404 | } | ||
405 | |||
406 | static void __exit wdt_gpi_cleanup_module(void) | ||
407 | { | ||
408 | platform_driver_unregister(&wdt_gpi_driver); | ||
409 | } | ||
410 | |||
411 | module_init(wdt_gpi_init_module); | ||
412 | module_exit(wdt_gpi_cleanup_module); | ||
413 | |||
414 | MODULE_AUTHOR("Thomas Koeller <thomas.koeller@baslerweb.com>"); | ||
415 | MODULE_DESCRIPTION("Basler eXcite watchdog driver for gpi devices"); | ||
416 | MODULE_VERSION("0.1"); | ||
417 | MODULE_LICENSE("GPL"); | ||
418 | MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); | ||
419 | |||
diff --git a/fs/Kconfig b/fs/Kconfig index f8fccaaad628..64d44efad7a5 100644 --- a/fs/Kconfig +++ b/fs/Kconfig | |||
@@ -6,10 +6,6 @@ menu "File systems" | |||
6 | 6 | ||
7 | if BLOCK | 7 | if BLOCK |
8 | 8 | ||
9 | config FS_JOURNAL_INFO | ||
10 | bool | ||
11 | default n | ||
12 | |||
13 | source "fs/ext2/Kconfig" | 9 | source "fs/ext2/Kconfig" |
14 | source "fs/ext3/Kconfig" | 10 | source "fs/ext3/Kconfig" |
15 | source "fs/ext4/Kconfig" | 11 | source "fs/ext4/Kconfig" |
diff --git a/fs/anon_inodes.c b/fs/anon_inodes.c index 94f5110c4655..2c994591f4d7 100644 --- a/fs/anon_inodes.c +++ b/fs/anon_inodes.c | |||
@@ -35,14 +35,13 @@ static int anon_inodefs_get_sb(struct file_system_type *fs_type, int flags, | |||
35 | mnt); | 35 | mnt); |
36 | } | 36 | } |
37 | 37 | ||
38 | static int anon_inodefs_delete_dentry(struct dentry *dentry) | 38 | /* |
39 | * anon_inodefs_dname() is called from d_path(). | ||
40 | */ | ||
41 | static char *anon_inodefs_dname(struct dentry *dentry, char *buffer, int buflen) | ||
39 | { | 42 | { |
40 | /* | 43 | return dynamic_dname(dentry, buffer, buflen, "anon_inode:%s", |
41 | * We faked vfs to believe the dentry was hashed when we created it. | 44 | dentry->d_name.name); |
42 | * Now we restore the flag so that dput() will work correctly. | ||
43 | */ | ||
44 | dentry->d_flags |= DCACHE_UNHASHED; | ||
45 | return 1; | ||
46 | } | 45 | } |
47 | 46 | ||
48 | static struct file_system_type anon_inode_fs_type = { | 47 | static struct file_system_type anon_inode_fs_type = { |
@@ -51,7 +50,7 @@ static struct file_system_type anon_inode_fs_type = { | |||
51 | .kill_sb = kill_anon_super, | 50 | .kill_sb = kill_anon_super, |
52 | }; | 51 | }; |
53 | static const struct dentry_operations anon_inodefs_dentry_operations = { | 52 | static const struct dentry_operations anon_inodefs_dentry_operations = { |
54 | .d_delete = anon_inodefs_delete_dentry, | 53 | .d_dname = anon_inodefs_dname, |
55 | }; | 54 | }; |
56 | 55 | ||
57 | /* | 56 | /* |
@@ -119,8 +118,6 @@ struct file *anon_inode_getfile(const char *name, | |||
119 | atomic_inc(&anon_inode_inode->i_count); | 118 | atomic_inc(&anon_inode_inode->i_count); |
120 | 119 | ||
121 | path.dentry->d_op = &anon_inodefs_dentry_operations; | 120 | path.dentry->d_op = &anon_inodefs_dentry_operations; |
122 | /* Do not publish this dentry inside the global dentry hash table */ | ||
123 | path.dentry->d_flags &= ~DCACHE_UNHASHED; | ||
124 | d_instantiate(path.dentry, anon_inode_inode); | 121 | d_instantiate(path.dentry, anon_inode_inode); |
125 | 122 | ||
126 | error = -ENFILE; | 123 | error = -ENFILE; |
diff --git a/fs/binfmt_aout.c b/fs/binfmt_aout.c index b639dcf7c778..346b69405363 100644 --- a/fs/binfmt_aout.c +++ b/fs/binfmt_aout.c | |||
@@ -32,7 +32,7 @@ | |||
32 | 32 | ||
33 | static int load_aout_binary(struct linux_binprm *, struct pt_regs * regs); | 33 | static int load_aout_binary(struct linux_binprm *, struct pt_regs * regs); |
34 | static int load_aout_library(struct file*); | 34 | static int load_aout_library(struct file*); |
35 | static int aout_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit); | 35 | static int aout_core_dump(struct coredump_params *cprm); |
36 | 36 | ||
37 | static struct linux_binfmt aout_format = { | 37 | static struct linux_binfmt aout_format = { |
38 | .module = THIS_MODULE, | 38 | .module = THIS_MODULE, |
@@ -89,8 +89,9 @@ if (file->f_op->llseek) { \ | |||
89 | * dumping of the process results in another error.. | 89 | * dumping of the process results in another error.. |
90 | */ | 90 | */ |
91 | 91 | ||
92 | static int aout_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit) | 92 | static int aout_core_dump(struct coredump_params *cprm) |
93 | { | 93 | { |
94 | struct file *file = cprm->file; | ||
94 | mm_segment_t fs; | 95 | mm_segment_t fs; |
95 | int has_dumped = 0; | 96 | int has_dumped = 0; |
96 | unsigned long dump_start, dump_size; | 97 | unsigned long dump_start, dump_size; |
@@ -108,16 +109,16 @@ static int aout_core_dump(long signr, struct pt_regs *regs, struct file *file, u | |||
108 | current->flags |= PF_DUMPCORE; | 109 | current->flags |= PF_DUMPCORE; |
109 | strncpy(dump.u_comm, current->comm, sizeof(dump.u_comm)); | 110 | strncpy(dump.u_comm, current->comm, sizeof(dump.u_comm)); |
110 | dump.u_ar0 = offsetof(struct user, regs); | 111 | dump.u_ar0 = offsetof(struct user, regs); |
111 | dump.signal = signr; | 112 | dump.signal = cprm->signr; |
112 | aout_dump_thread(regs, &dump); | 113 | aout_dump_thread(cprm->regs, &dump); |
113 | 114 | ||
114 | /* If the size of the dump file exceeds the rlimit, then see what would happen | 115 | /* If the size of the dump file exceeds the rlimit, then see what would happen |
115 | if we wrote the stack, but not the data area. */ | 116 | if we wrote the stack, but not the data area. */ |
116 | if ((dump.u_dsize + dump.u_ssize+1) * PAGE_SIZE > limit) | 117 | if ((dump.u_dsize + dump.u_ssize+1) * PAGE_SIZE > cprm->limit) |
117 | dump.u_dsize = 0; | 118 | dump.u_dsize = 0; |
118 | 119 | ||
119 | /* Make sure we have enough room to write the stack and data areas. */ | 120 | /* Make sure we have enough room to write the stack and data areas. */ |
120 | if ((dump.u_ssize + 1) * PAGE_SIZE > limit) | 121 | if ((dump.u_ssize + 1) * PAGE_SIZE > cprm->limit) |
121 | dump.u_ssize = 0; | 122 | dump.u_ssize = 0; |
122 | 123 | ||
123 | /* make sure we actually have a data and stack area to dump */ | 124 | /* make sure we actually have a data and stack area to dump */ |
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c index 97b6e9efeb7f..edd90c49003c 100644 --- a/fs/binfmt_elf.c +++ b/fs/binfmt_elf.c | |||
@@ -45,7 +45,7 @@ static unsigned long elf_map(struct file *, unsigned long, struct elf_phdr *, | |||
45 | * don't even try. | 45 | * don't even try. |
46 | */ | 46 | */ |
47 | #ifdef CONFIG_ELF_CORE | 47 | #ifdef CONFIG_ELF_CORE |
48 | static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit); | 48 | static int elf_core_dump(struct coredump_params *cprm); |
49 | #else | 49 | #else |
50 | #define elf_core_dump NULL | 50 | #define elf_core_dump NULL |
51 | #endif | 51 | #endif |
@@ -1272,8 +1272,9 @@ static int writenote(struct memelfnote *men, struct file *file, | |||
1272 | } | 1272 | } |
1273 | #undef DUMP_WRITE | 1273 | #undef DUMP_WRITE |
1274 | 1274 | ||
1275 | #define DUMP_WRITE(addr, nr) \ | 1275 | #define DUMP_WRITE(addr, nr) \ |
1276 | if ((size += (nr)) > limit || !dump_write(file, (addr), (nr))) \ | 1276 | if ((size += (nr)) > cprm->limit || \ |
1277 | !dump_write(cprm->file, (addr), (nr))) \ | ||
1277 | goto end_coredump; | 1278 | goto end_coredump; |
1278 | 1279 | ||
1279 | static void fill_elf_header(struct elfhdr *elf, int segs, | 1280 | static void fill_elf_header(struct elfhdr *elf, int segs, |
@@ -1901,7 +1902,7 @@ static struct vm_area_struct *next_vma(struct vm_area_struct *this_vma, | |||
1901 | * and then they are actually written out. If we run out of core limit | 1902 | * and then they are actually written out. If we run out of core limit |
1902 | * we just truncate. | 1903 | * we just truncate. |
1903 | */ | 1904 | */ |
1904 | static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit) | 1905 | static int elf_core_dump(struct coredump_params *cprm) |
1905 | { | 1906 | { |
1906 | int has_dumped = 0; | 1907 | int has_dumped = 0; |
1907 | mm_segment_t fs; | 1908 | mm_segment_t fs; |
@@ -1947,7 +1948,7 @@ static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file, un | |||
1947 | * notes. This also sets up the file header. | 1948 | * notes. This also sets up the file header. |
1948 | */ | 1949 | */ |
1949 | if (!fill_note_info(elf, segs + 1, /* including notes section */ | 1950 | if (!fill_note_info(elf, segs + 1, /* including notes section */ |
1950 | &info, signr, regs)) | 1951 | &info, cprm->signr, cprm->regs)) |
1951 | goto cleanup; | 1952 | goto cleanup; |
1952 | 1953 | ||
1953 | has_dumped = 1; | 1954 | has_dumped = 1; |
@@ -2009,14 +2010,14 @@ static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file, un | |||
2009 | #endif | 2010 | #endif |
2010 | 2011 | ||
2011 | /* write out the notes section */ | 2012 | /* write out the notes section */ |
2012 | if (!write_note_info(&info, file, &foffset)) | 2013 | if (!write_note_info(&info, cprm->file, &foffset)) |
2013 | goto end_coredump; | 2014 | goto end_coredump; |
2014 | 2015 | ||
2015 | if (elf_coredump_extra_notes_write(file, &foffset)) | 2016 | if (elf_coredump_extra_notes_write(cprm->file, &foffset)) |
2016 | goto end_coredump; | 2017 | goto end_coredump; |
2017 | 2018 | ||
2018 | /* Align to page */ | 2019 | /* Align to page */ |
2019 | if (!dump_seek(file, dataoff - foffset)) | 2020 | if (!dump_seek(cprm->file, dataoff - foffset)) |
2020 | goto end_coredump; | 2021 | goto end_coredump; |
2021 | 2022 | ||
2022 | for (vma = first_vma(current, gate_vma); vma != NULL; | 2023 | for (vma = first_vma(current, gate_vma); vma != NULL; |
@@ -2033,12 +2034,13 @@ static int elf_core_dump(long signr, struct pt_regs *regs, struct file *file, un | |||
2033 | page = get_dump_page(addr); | 2034 | page = get_dump_page(addr); |
2034 | if (page) { | 2035 | if (page) { |
2035 | void *kaddr = kmap(page); | 2036 | void *kaddr = kmap(page); |
2036 | stop = ((size += PAGE_SIZE) > limit) || | 2037 | stop = ((size += PAGE_SIZE) > cprm->limit) || |
2037 | !dump_write(file, kaddr, PAGE_SIZE); | 2038 | !dump_write(cprm->file, kaddr, |
2039 | PAGE_SIZE); | ||
2038 | kunmap(page); | 2040 | kunmap(page); |
2039 | page_cache_release(page); | 2041 | page_cache_release(page); |
2040 | } else | 2042 | } else |
2041 | stop = !dump_seek(file, PAGE_SIZE); | 2043 | stop = !dump_seek(cprm->file, PAGE_SIZE); |
2042 | if (stop) | 2044 | if (stop) |
2043 | goto end_coredump; | 2045 | goto end_coredump; |
2044 | } | 2046 | } |
diff --git a/fs/binfmt_elf_fdpic.c b/fs/binfmt_elf_fdpic.c index 7b055385db8e..c25256a5c5b0 100644 --- a/fs/binfmt_elf_fdpic.c +++ b/fs/binfmt_elf_fdpic.c | |||
@@ -76,7 +76,7 @@ static int elf_fdpic_map_file_by_direct_mmap(struct elf_fdpic_params *, | |||
76 | struct file *, struct mm_struct *); | 76 | struct file *, struct mm_struct *); |
77 | 77 | ||
78 | #ifdef CONFIG_ELF_CORE | 78 | #ifdef CONFIG_ELF_CORE |
79 | static int elf_fdpic_core_dump(long, struct pt_regs *, struct file *, unsigned long limit); | 79 | static int elf_fdpic_core_dump(struct coredump_params *cprm); |
80 | #endif | 80 | #endif |
81 | 81 | ||
82 | static struct linux_binfmt elf_fdpic_format = { | 82 | static struct linux_binfmt elf_fdpic_format = { |
@@ -1326,8 +1326,9 @@ static int writenote(struct memelfnote *men, struct file *file) | |||
1326 | #undef DUMP_WRITE | 1326 | #undef DUMP_WRITE |
1327 | #undef DUMP_SEEK | 1327 | #undef DUMP_SEEK |
1328 | 1328 | ||
1329 | #define DUMP_WRITE(addr, nr) \ | 1329 | #define DUMP_WRITE(addr, nr) \ |
1330 | if ((size += (nr)) > limit || !dump_write(file, (addr), (nr))) \ | 1330 | if ((size += (nr)) > cprm->limit || \ |
1331 | !dump_write(cprm->file, (addr), (nr))) \ | ||
1331 | goto end_coredump; | 1332 | goto end_coredump; |
1332 | 1333 | ||
1333 | static inline void fill_elf_fdpic_header(struct elfhdr *elf, int segs) | 1334 | static inline void fill_elf_fdpic_header(struct elfhdr *elf, int segs) |
@@ -1582,8 +1583,7 @@ static int elf_fdpic_dump_segments(struct file *file, size_t *size, | |||
1582 | * and then they are actually written out. If we run out of core limit | 1583 | * and then they are actually written out. If we run out of core limit |
1583 | * we just truncate. | 1584 | * we just truncate. |
1584 | */ | 1585 | */ |
1585 | static int elf_fdpic_core_dump(long signr, struct pt_regs *regs, | 1586 | static int elf_fdpic_core_dump(struct coredump_params *cprm) |
1586 | struct file *file, unsigned long limit) | ||
1587 | { | 1587 | { |
1588 | #define NUM_NOTES 6 | 1588 | #define NUM_NOTES 6 |
1589 | int has_dumped = 0; | 1589 | int has_dumped = 0; |
@@ -1642,7 +1642,7 @@ static int elf_fdpic_core_dump(long signr, struct pt_regs *regs, | |||
1642 | goto cleanup; | 1642 | goto cleanup; |
1643 | #endif | 1643 | #endif |
1644 | 1644 | ||
1645 | if (signr) { | 1645 | if (cprm->signr) { |
1646 | struct core_thread *ct; | 1646 | struct core_thread *ct; |
1647 | struct elf_thread_status *tmp; | 1647 | struct elf_thread_status *tmp; |
1648 | 1648 | ||
@@ -1661,14 +1661,14 @@ static int elf_fdpic_core_dump(long signr, struct pt_regs *regs, | |||
1661 | int sz; | 1661 | int sz; |
1662 | 1662 | ||
1663 | tmp = list_entry(t, struct elf_thread_status, list); | 1663 | tmp = list_entry(t, struct elf_thread_status, list); |
1664 | sz = elf_dump_thread_status(signr, tmp); | 1664 | sz = elf_dump_thread_status(cprm->signr, tmp); |
1665 | thread_status_size += sz; | 1665 | thread_status_size += sz; |
1666 | } | 1666 | } |
1667 | } | 1667 | } |
1668 | 1668 | ||
1669 | /* now collect the dump for the current */ | 1669 | /* now collect the dump for the current */ |
1670 | fill_prstatus(prstatus, current, signr); | 1670 | fill_prstatus(prstatus, current, cprm->signr); |
1671 | elf_core_copy_regs(&prstatus->pr_reg, regs); | 1671 | elf_core_copy_regs(&prstatus->pr_reg, cprm->regs); |
1672 | 1672 | ||
1673 | segs = current->mm->map_count; | 1673 | segs = current->mm->map_count; |
1674 | #ifdef ELF_CORE_EXTRA_PHDRS | 1674 | #ifdef ELF_CORE_EXTRA_PHDRS |
@@ -1703,7 +1703,7 @@ static int elf_fdpic_core_dump(long signr, struct pt_regs *regs, | |||
1703 | 1703 | ||
1704 | /* Try to dump the FPU. */ | 1704 | /* Try to dump the FPU. */ |
1705 | if ((prstatus->pr_fpvalid = | 1705 | if ((prstatus->pr_fpvalid = |
1706 | elf_core_copy_task_fpregs(current, regs, fpu))) | 1706 | elf_core_copy_task_fpregs(current, cprm->regs, fpu))) |
1707 | fill_note(notes + numnote++, | 1707 | fill_note(notes + numnote++, |
1708 | "CORE", NT_PRFPREG, sizeof(*fpu), fpu); | 1708 | "CORE", NT_PRFPREG, sizeof(*fpu), fpu); |
1709 | #ifdef ELF_CORE_COPY_XFPREGS | 1709 | #ifdef ELF_CORE_COPY_XFPREGS |
@@ -1774,7 +1774,7 @@ static int elf_fdpic_core_dump(long signr, struct pt_regs *regs, | |||
1774 | 1774 | ||
1775 | /* write out the notes section */ | 1775 | /* write out the notes section */ |
1776 | for (i = 0; i < numnote; i++) | 1776 | for (i = 0; i < numnote; i++) |
1777 | if (!writenote(notes + i, file)) | 1777 | if (!writenote(notes + i, cprm->file)) |
1778 | goto end_coredump; | 1778 | goto end_coredump; |
1779 | 1779 | ||
1780 | /* write out the thread status notes section */ | 1780 | /* write out the thread status notes section */ |
@@ -1783,14 +1783,15 @@ static int elf_fdpic_core_dump(long signr, struct pt_regs *regs, | |||
1783 | list_entry(t, struct elf_thread_status, list); | 1783 | list_entry(t, struct elf_thread_status, list); |
1784 | 1784 | ||
1785 | for (i = 0; i < tmp->num_notes; i++) | 1785 | for (i = 0; i < tmp->num_notes; i++) |
1786 | if (!writenote(&tmp->notes[i], file)) | 1786 | if (!writenote(&tmp->notes[i], cprm->file)) |
1787 | goto end_coredump; | 1787 | goto end_coredump; |
1788 | } | 1788 | } |
1789 | 1789 | ||
1790 | if (!dump_seek(file, dataoff)) | 1790 | if (!dump_seek(cprm->file, dataoff)) |
1791 | goto end_coredump; | 1791 | goto end_coredump; |
1792 | 1792 | ||
1793 | if (elf_fdpic_dump_segments(file, &size, &limit, mm_flags) < 0) | 1793 | if (elf_fdpic_dump_segments(cprm->file, &size, &cprm->limit, |
1794 | mm_flags) < 0) | ||
1794 | goto end_coredump; | 1795 | goto end_coredump; |
1795 | 1796 | ||
1796 | #ifdef ELF_CORE_WRITE_EXTRA_DATA | 1797 | #ifdef ELF_CORE_WRITE_EXTRA_DATA |
diff --git a/fs/binfmt_flat.c b/fs/binfmt_flat.c index a2796651e756..d4a00ea1054c 100644 --- a/fs/binfmt_flat.c +++ b/fs/binfmt_flat.c | |||
@@ -87,7 +87,7 @@ static int load_flat_shared_library(int id, struct lib_info *p); | |||
87 | #endif | 87 | #endif |
88 | 88 | ||
89 | static int load_flat_binary(struct linux_binprm *, struct pt_regs * regs); | 89 | static int load_flat_binary(struct linux_binprm *, struct pt_regs * regs); |
90 | static int flat_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit); | 90 | static int flat_core_dump(struct coredump_params *cprm); |
91 | 91 | ||
92 | static struct linux_binfmt flat_format = { | 92 | static struct linux_binfmt flat_format = { |
93 | .module = THIS_MODULE, | 93 | .module = THIS_MODULE, |
@@ -102,10 +102,10 @@ static struct linux_binfmt flat_format = { | |||
102 | * Currently only a stub-function. | 102 | * Currently only a stub-function. |
103 | */ | 103 | */ |
104 | 104 | ||
105 | static int flat_core_dump(long signr, struct pt_regs *regs, struct file *file, unsigned long limit) | 105 | static int flat_core_dump(struct coredump_params *cprm) |
106 | { | 106 | { |
107 | printk("Process %s:%d received signr %d and should have core dumped\n", | 107 | printk("Process %s:%d received signr %d and should have core dumped\n", |
108 | current->comm, current->pid, (int) signr); | 108 | current->comm, current->pid, (int) cprm->signr); |
109 | return(1); | 109 | return(1); |
110 | } | 110 | } |
111 | 111 | ||
diff --git a/fs/binfmt_som.c b/fs/binfmt_som.c index eff74b9c9e77..2a9b5330cc5e 100644 --- a/fs/binfmt_som.c +++ b/fs/binfmt_som.c | |||
@@ -43,7 +43,7 @@ static int load_som_library(struct file *); | |||
43 | * don't even try. | 43 | * don't even try. |
44 | */ | 44 | */ |
45 | #if 0 | 45 | #if 0 |
46 | static int som_core_dump(long signr, struct pt_regs *regs, unsigned long limit); | 46 | static int som_core_dump(struct coredump_params *cprm); |
47 | #else | 47 | #else |
48 | #define som_core_dump NULL | 48 | #define som_core_dump NULL |
49 | #endif | 49 | #endif |
diff --git a/fs/btrfs/Kconfig b/fs/btrfs/Kconfig index 402afe0a0bfb..7bb3c020e570 100644 --- a/fs/btrfs/Kconfig +++ b/fs/btrfs/Kconfig | |||
@@ -4,7 +4,6 @@ config BTRFS_FS | |||
4 | select LIBCRC32C | 4 | select LIBCRC32C |
5 | select ZLIB_INFLATE | 5 | select ZLIB_INFLATE |
6 | select ZLIB_DEFLATE | 6 | select ZLIB_DEFLATE |
7 | select FS_JOURNAL_INFO | ||
8 | help | 7 | help |
9 | Btrfs is a new filesystem with extents, writable snapshotting, | 8 | Btrfs is a new filesystem with extents, writable snapshotting, |
10 | support for multiple devices and many more features. | 9 | support for multiple devices and many more features. |
diff --git a/fs/btrfs/acl.c b/fs/btrfs/acl.c index 52cbe47022bf..2e9e69987a82 100644 --- a/fs/btrfs/acl.c +++ b/fs/btrfs/acl.c | |||
@@ -94,7 +94,8 @@ static int btrfs_xattr_acl_get(struct dentry *dentry, const char *name, | |||
94 | /* | 94 | /* |
95 | * Needs to be called with fs_mutex held | 95 | * Needs to be called with fs_mutex held |
96 | */ | 96 | */ |
97 | static int btrfs_set_acl(struct inode *inode, struct posix_acl *acl, int type) | 97 | static int btrfs_set_acl(struct btrfs_trans_handle *trans, |
98 | struct inode *inode, struct posix_acl *acl, int type) | ||
98 | { | 99 | { |
99 | int ret, size = 0; | 100 | int ret, size = 0; |
100 | const char *name; | 101 | const char *name; |
@@ -140,8 +141,7 @@ static int btrfs_set_acl(struct inode *inode, struct posix_acl *acl, int type) | |||
140 | goto out; | 141 | goto out; |
141 | } | 142 | } |
142 | 143 | ||
143 | ret = __btrfs_setxattr(inode, name, value, size, 0); | 144 | ret = __btrfs_setxattr(trans, inode, name, value, size, 0); |
144 | |||
145 | out: | 145 | out: |
146 | kfree(value); | 146 | kfree(value); |
147 | 147 | ||
@@ -154,7 +154,7 @@ out: | |||
154 | static int btrfs_xattr_acl_set(struct dentry *dentry, const char *name, | 154 | static int btrfs_xattr_acl_set(struct dentry *dentry, const char *name, |
155 | const void *value, size_t size, int flags, int type) | 155 | const void *value, size_t size, int flags, int type) |
156 | { | 156 | { |
157 | int ret = 0; | 157 | int ret; |
158 | struct posix_acl *acl = NULL; | 158 | struct posix_acl *acl = NULL; |
159 | 159 | ||
160 | if (value) { | 160 | if (value) { |
@@ -167,7 +167,7 @@ static int btrfs_xattr_acl_set(struct dentry *dentry, const char *name, | |||
167 | } | 167 | } |
168 | } | 168 | } |
169 | 169 | ||
170 | ret = btrfs_set_acl(dentry->d_inode, acl, type); | 170 | ret = btrfs_set_acl(NULL, dentry->d_inode, acl, type); |
171 | 171 | ||
172 | posix_acl_release(acl); | 172 | posix_acl_release(acl); |
173 | 173 | ||
@@ -196,7 +196,8 @@ int btrfs_check_acl(struct inode *inode, int mask) | |||
196 | * stuff has been fixed to work with that. If the locking stuff changes, we | 196 | * stuff has been fixed to work with that. If the locking stuff changes, we |
197 | * need to re-evaluate the acl locking stuff. | 197 | * need to re-evaluate the acl locking stuff. |
198 | */ | 198 | */ |
199 | int btrfs_init_acl(struct inode *inode, struct inode *dir) | 199 | int btrfs_init_acl(struct btrfs_trans_handle *trans, |
200 | struct inode *inode, struct inode *dir) | ||
200 | { | 201 | { |
201 | struct posix_acl *acl = NULL; | 202 | struct posix_acl *acl = NULL; |
202 | int ret = 0; | 203 | int ret = 0; |
@@ -221,7 +222,8 @@ int btrfs_init_acl(struct inode *inode, struct inode *dir) | |||
221 | mode_t mode; | 222 | mode_t mode; |
222 | 223 | ||
223 | if (S_ISDIR(inode->i_mode)) { | 224 | if (S_ISDIR(inode->i_mode)) { |
224 | ret = btrfs_set_acl(inode, acl, ACL_TYPE_DEFAULT); | 225 | ret = btrfs_set_acl(trans, inode, acl, |
226 | ACL_TYPE_DEFAULT); | ||
225 | if (ret) | 227 | if (ret) |
226 | goto failed; | 228 | goto failed; |
227 | } | 229 | } |
@@ -236,7 +238,7 @@ int btrfs_init_acl(struct inode *inode, struct inode *dir) | |||
236 | inode->i_mode = mode; | 238 | inode->i_mode = mode; |
237 | if (ret > 0) { | 239 | if (ret > 0) { |
238 | /* we need an acl */ | 240 | /* we need an acl */ |
239 | ret = btrfs_set_acl(inode, clone, | 241 | ret = btrfs_set_acl(trans, inode, clone, |
240 | ACL_TYPE_ACCESS); | 242 | ACL_TYPE_ACCESS); |
241 | } | 243 | } |
242 | } | 244 | } |
@@ -269,7 +271,7 @@ int btrfs_acl_chmod(struct inode *inode) | |||
269 | 271 | ||
270 | ret = posix_acl_chmod_masq(clone, inode->i_mode); | 272 | ret = posix_acl_chmod_masq(clone, inode->i_mode); |
271 | if (!ret) | 273 | if (!ret) |
272 | ret = btrfs_set_acl(inode, clone, ACL_TYPE_ACCESS); | 274 | ret = btrfs_set_acl(NULL, inode, clone, ACL_TYPE_ACCESS); |
273 | 275 | ||
274 | posix_acl_release(clone); | 276 | posix_acl_release(clone); |
275 | 277 | ||
@@ -297,7 +299,8 @@ int btrfs_acl_chmod(struct inode *inode) | |||
297 | return 0; | 299 | return 0; |
298 | } | 300 | } |
299 | 301 | ||
300 | int btrfs_init_acl(struct inode *inode, struct inode *dir) | 302 | int btrfs_init_acl(struct btrfs_trans_handle *trans, |
303 | struct inode *inode, struct inode *dir) | ||
301 | { | 304 | { |
302 | return 0; | 305 | return 0; |
303 | } | 306 | } |
diff --git a/fs/btrfs/btrfs_inode.h b/fs/btrfs/btrfs_inode.h index f6783a42f010..3f1f50d9d916 100644 --- a/fs/btrfs/btrfs_inode.h +++ b/fs/btrfs/btrfs_inode.h | |||
@@ -44,9 +44,6 @@ struct btrfs_inode { | |||
44 | */ | 44 | */ |
45 | struct extent_io_tree io_failure_tree; | 45 | struct extent_io_tree io_failure_tree; |
46 | 46 | ||
47 | /* held while inesrting or deleting extents from files */ | ||
48 | struct mutex extent_mutex; | ||
49 | |||
50 | /* held while logging the inode in tree-log.c */ | 47 | /* held while logging the inode in tree-log.c */ |
51 | struct mutex log_mutex; | 48 | struct mutex log_mutex; |
52 | 49 | ||
@@ -166,7 +163,7 @@ static inline struct btrfs_inode *BTRFS_I(struct inode *inode) | |||
166 | 163 | ||
167 | static inline void btrfs_i_size_write(struct inode *inode, u64 size) | 164 | static inline void btrfs_i_size_write(struct inode *inode, u64 size) |
168 | { | 165 | { |
169 | inode->i_size = size; | 166 | i_size_write(inode, size); |
170 | BTRFS_I(inode)->disk_i_size = size; | 167 | BTRFS_I(inode)->disk_i_size = size; |
171 | } | 168 | } |
172 | 169 | ||
diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c index ec96f3a6d536..c4bc570a396e 100644 --- a/fs/btrfs/ctree.c +++ b/fs/btrfs/ctree.c | |||
@@ -37,6 +37,11 @@ static int balance_node_right(struct btrfs_trans_handle *trans, | |||
37 | struct extent_buffer *src_buf); | 37 | struct extent_buffer *src_buf); |
38 | static int del_ptr(struct btrfs_trans_handle *trans, struct btrfs_root *root, | 38 | static int del_ptr(struct btrfs_trans_handle *trans, struct btrfs_root *root, |
39 | struct btrfs_path *path, int level, int slot); | 39 | struct btrfs_path *path, int level, int slot); |
40 | static int setup_items_for_insert(struct btrfs_trans_handle *trans, | ||
41 | struct btrfs_root *root, struct btrfs_path *path, | ||
42 | struct btrfs_key *cpu_key, u32 *data_size, | ||
43 | u32 total_data, u32 total_size, int nr); | ||
44 | |||
40 | 45 | ||
41 | struct btrfs_path *btrfs_alloc_path(void) | 46 | struct btrfs_path *btrfs_alloc_path(void) |
42 | { | 47 | { |
@@ -451,9 +456,8 @@ static noinline int __btrfs_cow_block(struct btrfs_trans_handle *trans, | |||
451 | extent_buffer_get(cow); | 456 | extent_buffer_get(cow); |
452 | spin_unlock(&root->node_lock); | 457 | spin_unlock(&root->node_lock); |
453 | 458 | ||
454 | btrfs_free_extent(trans, root, buf->start, buf->len, | 459 | btrfs_free_tree_block(trans, root, buf->start, buf->len, |
455 | parent_start, root->root_key.objectid, | 460 | parent_start, root->root_key.objectid, level); |
456 | level, 0); | ||
457 | free_extent_buffer(buf); | 461 | free_extent_buffer(buf); |
458 | add_root_to_dirty_list(root); | 462 | add_root_to_dirty_list(root); |
459 | } else { | 463 | } else { |
@@ -468,9 +472,8 @@ static noinline int __btrfs_cow_block(struct btrfs_trans_handle *trans, | |||
468 | btrfs_set_node_ptr_generation(parent, parent_slot, | 472 | btrfs_set_node_ptr_generation(parent, parent_slot, |
469 | trans->transid); | 473 | trans->transid); |
470 | btrfs_mark_buffer_dirty(parent); | 474 | btrfs_mark_buffer_dirty(parent); |
471 | btrfs_free_extent(trans, root, buf->start, buf->len, | 475 | btrfs_free_tree_block(trans, root, buf->start, buf->len, |
472 | parent_start, root->root_key.objectid, | 476 | parent_start, root->root_key.objectid, level); |
473 | level, 0); | ||
474 | } | 477 | } |
475 | if (unlock_orig) | 478 | if (unlock_orig) |
476 | btrfs_tree_unlock(buf); | 479 | btrfs_tree_unlock(buf); |
@@ -1030,8 +1033,8 @@ static noinline int balance_level(struct btrfs_trans_handle *trans, | |||
1030 | btrfs_tree_unlock(mid); | 1033 | btrfs_tree_unlock(mid); |
1031 | /* once for the path */ | 1034 | /* once for the path */ |
1032 | free_extent_buffer(mid); | 1035 | free_extent_buffer(mid); |
1033 | ret = btrfs_free_extent(trans, root, mid->start, mid->len, | 1036 | ret = btrfs_free_tree_block(trans, root, mid->start, mid->len, |
1034 | 0, root->root_key.objectid, level, 1); | 1037 | 0, root->root_key.objectid, level); |
1035 | /* once for the root ptr */ | 1038 | /* once for the root ptr */ |
1036 | free_extent_buffer(mid); | 1039 | free_extent_buffer(mid); |
1037 | return ret; | 1040 | return ret; |
@@ -1095,10 +1098,10 @@ static noinline int balance_level(struct btrfs_trans_handle *trans, | |||
1095 | 1); | 1098 | 1); |
1096 | if (wret) | 1099 | if (wret) |
1097 | ret = wret; | 1100 | ret = wret; |
1098 | wret = btrfs_free_extent(trans, root, bytenr, | 1101 | wret = btrfs_free_tree_block(trans, root, |
1099 | blocksize, 0, | 1102 | bytenr, blocksize, 0, |
1100 | root->root_key.objectid, | 1103 | root->root_key.objectid, |
1101 | level, 0); | 1104 | level); |
1102 | if (wret) | 1105 | if (wret) |
1103 | ret = wret; | 1106 | ret = wret; |
1104 | } else { | 1107 | } else { |
@@ -1143,9 +1146,8 @@ static noinline int balance_level(struct btrfs_trans_handle *trans, | |||
1143 | wret = del_ptr(trans, root, path, level + 1, pslot); | 1146 | wret = del_ptr(trans, root, path, level + 1, pslot); |
1144 | if (wret) | 1147 | if (wret) |
1145 | ret = wret; | 1148 | ret = wret; |
1146 | wret = btrfs_free_extent(trans, root, bytenr, blocksize, | 1149 | wret = btrfs_free_tree_block(trans, root, bytenr, blocksize, |
1147 | 0, root->root_key.objectid, | 1150 | 0, root->root_key.objectid, level); |
1148 | level, 0); | ||
1149 | if (wret) | 1151 | if (wret) |
1150 | ret = wret; | 1152 | ret = wret; |
1151 | } else { | 1153 | } else { |
@@ -2997,75 +2999,85 @@ again: | |||
2997 | return ret; | 2999 | return ret; |
2998 | } | 3000 | } |
2999 | 3001 | ||
3000 | /* | 3002 | static noinline int setup_leaf_for_split(struct btrfs_trans_handle *trans, |
3001 | * This function splits a single item into two items, | 3003 | struct btrfs_root *root, |
3002 | * giving 'new_key' to the new item and splitting the | 3004 | struct btrfs_path *path, int ins_len) |
3003 | * old one at split_offset (from the start of the item). | ||
3004 | * | ||
3005 | * The path may be released by this operation. After | ||
3006 | * the split, the path is pointing to the old item. The | ||
3007 | * new item is going to be in the same node as the old one. | ||
3008 | * | ||
3009 | * Note, the item being split must be smaller enough to live alone on | ||
3010 | * a tree block with room for one extra struct btrfs_item | ||
3011 | * | ||
3012 | * This allows us to split the item in place, keeping a lock on the | ||
3013 | * leaf the entire time. | ||
3014 | */ | ||
3015 | int btrfs_split_item(struct btrfs_trans_handle *trans, | ||
3016 | struct btrfs_root *root, | ||
3017 | struct btrfs_path *path, | ||
3018 | struct btrfs_key *new_key, | ||
3019 | unsigned long split_offset) | ||
3020 | { | 3005 | { |
3021 | u32 item_size; | 3006 | struct btrfs_key key; |
3022 | struct extent_buffer *leaf; | 3007 | struct extent_buffer *leaf; |
3023 | struct btrfs_key orig_key; | 3008 | struct btrfs_file_extent_item *fi; |
3024 | struct btrfs_item *item; | 3009 | u64 extent_len = 0; |
3025 | struct btrfs_item *new_item; | 3010 | u32 item_size; |
3026 | int ret = 0; | 3011 | int ret; |
3027 | int slot; | ||
3028 | u32 nritems; | ||
3029 | u32 orig_offset; | ||
3030 | struct btrfs_disk_key disk_key; | ||
3031 | char *buf; | ||
3032 | 3012 | ||
3033 | leaf = path->nodes[0]; | 3013 | leaf = path->nodes[0]; |
3034 | btrfs_item_key_to_cpu(leaf, &orig_key, path->slots[0]); | 3014 | btrfs_item_key_to_cpu(leaf, &key, path->slots[0]); |
3035 | if (btrfs_leaf_free_space(root, leaf) >= sizeof(struct btrfs_item)) | 3015 | |
3036 | goto split; | 3016 | BUG_ON(key.type != BTRFS_EXTENT_DATA_KEY && |
3017 | key.type != BTRFS_EXTENT_CSUM_KEY); | ||
3018 | |||
3019 | if (btrfs_leaf_free_space(root, leaf) >= ins_len) | ||
3020 | return 0; | ||
3037 | 3021 | ||
3038 | item_size = btrfs_item_size_nr(leaf, path->slots[0]); | 3022 | item_size = btrfs_item_size_nr(leaf, path->slots[0]); |
3023 | if (key.type == BTRFS_EXTENT_DATA_KEY) { | ||
3024 | fi = btrfs_item_ptr(leaf, path->slots[0], | ||
3025 | struct btrfs_file_extent_item); | ||
3026 | extent_len = btrfs_file_extent_num_bytes(leaf, fi); | ||
3027 | } | ||
3039 | btrfs_release_path(root, path); | 3028 | btrfs_release_path(root, path); |
3040 | 3029 | ||
3041 | path->search_for_split = 1; | ||
3042 | path->keep_locks = 1; | 3030 | path->keep_locks = 1; |
3043 | 3031 | path->search_for_split = 1; | |
3044 | ret = btrfs_search_slot(trans, root, &orig_key, path, 0, 1); | 3032 | ret = btrfs_search_slot(trans, root, &key, path, 0, 1); |
3045 | path->search_for_split = 0; | 3033 | path->search_for_split = 0; |
3034 | if (ret < 0) | ||
3035 | goto err; | ||
3046 | 3036 | ||
3037 | ret = -EAGAIN; | ||
3038 | leaf = path->nodes[0]; | ||
3047 | /* if our item isn't there or got smaller, return now */ | 3039 | /* if our item isn't there or got smaller, return now */ |
3048 | if (ret != 0 || item_size != btrfs_item_size_nr(path->nodes[0], | 3040 | if (ret > 0 || item_size != btrfs_item_size_nr(leaf, path->slots[0])) |
3049 | path->slots[0])) { | 3041 | goto err; |
3050 | path->keep_locks = 0; | 3042 | |
3051 | return -EAGAIN; | 3043 | if (key.type == BTRFS_EXTENT_DATA_KEY) { |
3044 | fi = btrfs_item_ptr(leaf, path->slots[0], | ||
3045 | struct btrfs_file_extent_item); | ||
3046 | if (extent_len != btrfs_file_extent_num_bytes(leaf, fi)) | ||
3047 | goto err; | ||
3052 | } | 3048 | } |
3053 | 3049 | ||
3054 | btrfs_set_path_blocking(path); | 3050 | btrfs_set_path_blocking(path); |
3055 | ret = split_leaf(trans, root, &orig_key, path, | 3051 | ret = split_leaf(trans, root, &key, path, ins_len, 1); |
3056 | sizeof(struct btrfs_item), 1); | ||
3057 | path->keep_locks = 0; | ||
3058 | BUG_ON(ret); | 3052 | BUG_ON(ret); |
3059 | 3053 | ||
3054 | path->keep_locks = 0; | ||
3060 | btrfs_unlock_up_safe(path, 1); | 3055 | btrfs_unlock_up_safe(path, 1); |
3056 | return 0; | ||
3057 | err: | ||
3058 | path->keep_locks = 0; | ||
3059 | return ret; | ||
3060 | } | ||
3061 | |||
3062 | static noinline int split_item(struct btrfs_trans_handle *trans, | ||
3063 | struct btrfs_root *root, | ||
3064 | struct btrfs_path *path, | ||
3065 | struct btrfs_key *new_key, | ||
3066 | unsigned long split_offset) | ||
3067 | { | ||
3068 | struct extent_buffer *leaf; | ||
3069 | struct btrfs_item *item; | ||
3070 | struct btrfs_item *new_item; | ||
3071 | int slot; | ||
3072 | char *buf; | ||
3073 | u32 nritems; | ||
3074 | u32 item_size; | ||
3075 | u32 orig_offset; | ||
3076 | struct btrfs_disk_key disk_key; | ||
3077 | |||
3061 | leaf = path->nodes[0]; | 3078 | leaf = path->nodes[0]; |
3062 | BUG_ON(btrfs_leaf_free_space(root, leaf) < sizeof(struct btrfs_item)); | 3079 | BUG_ON(btrfs_leaf_free_space(root, leaf) < sizeof(struct btrfs_item)); |
3063 | 3080 | ||
3064 | split: | ||
3065 | /* | ||
3066 | * make sure any changes to the path from split_leaf leave it | ||
3067 | * in a blocking state | ||
3068 | */ | ||
3069 | btrfs_set_path_blocking(path); | 3081 | btrfs_set_path_blocking(path); |
3070 | 3082 | ||
3071 | item = btrfs_item_nr(leaf, path->slots[0]); | 3083 | item = btrfs_item_nr(leaf, path->slots[0]); |
@@ -3073,19 +3085,19 @@ split: | |||
3073 | item_size = btrfs_item_size(leaf, item); | 3085 | item_size = btrfs_item_size(leaf, item); |
3074 | 3086 | ||
3075 | buf = kmalloc(item_size, GFP_NOFS); | 3087 | buf = kmalloc(item_size, GFP_NOFS); |
3088 | if (!buf) | ||
3089 | return -ENOMEM; | ||
3090 | |||
3076 | read_extent_buffer(leaf, buf, btrfs_item_ptr_offset(leaf, | 3091 | read_extent_buffer(leaf, buf, btrfs_item_ptr_offset(leaf, |
3077 | path->slots[0]), item_size); | 3092 | path->slots[0]), item_size); |
3078 | slot = path->slots[0] + 1; | ||
3079 | leaf = path->nodes[0]; | ||
3080 | 3093 | ||
3094 | slot = path->slots[0] + 1; | ||
3081 | nritems = btrfs_header_nritems(leaf); | 3095 | nritems = btrfs_header_nritems(leaf); |
3082 | |||
3083 | if (slot != nritems) { | 3096 | if (slot != nritems) { |
3084 | /* shift the items */ | 3097 | /* shift the items */ |
3085 | memmove_extent_buffer(leaf, btrfs_item_nr_offset(slot + 1), | 3098 | memmove_extent_buffer(leaf, btrfs_item_nr_offset(slot + 1), |
3086 | btrfs_item_nr_offset(slot), | 3099 | btrfs_item_nr_offset(slot), |
3087 | (nritems - slot) * sizeof(struct btrfs_item)); | 3100 | (nritems - slot) * sizeof(struct btrfs_item)); |
3088 | |||
3089 | } | 3101 | } |
3090 | 3102 | ||
3091 | btrfs_cpu_key_to_disk(&disk_key, new_key); | 3103 | btrfs_cpu_key_to_disk(&disk_key, new_key); |
@@ -3113,16 +3125,81 @@ split: | |||
3113 | item_size - split_offset); | 3125 | item_size - split_offset); |
3114 | btrfs_mark_buffer_dirty(leaf); | 3126 | btrfs_mark_buffer_dirty(leaf); |
3115 | 3127 | ||
3116 | ret = 0; | 3128 | BUG_ON(btrfs_leaf_free_space(root, leaf) < 0); |
3117 | if (btrfs_leaf_free_space(root, leaf) < 0) { | ||
3118 | btrfs_print_leaf(root, leaf); | ||
3119 | BUG(); | ||
3120 | } | ||
3121 | kfree(buf); | 3129 | kfree(buf); |
3130 | return 0; | ||
3131 | } | ||
3132 | |||
3133 | /* | ||
3134 | * This function splits a single item into two items, | ||
3135 | * giving 'new_key' to the new item and splitting the | ||
3136 | * old one at split_offset (from the start of the item). | ||
3137 | * | ||
3138 | * The path may be released by this operation. After | ||
3139 | * the split, the path is pointing to the old item. The | ||
3140 | * new item is going to be in the same node as the old one. | ||
3141 | * | ||
3142 | * Note, the item being split must be smaller enough to live alone on | ||
3143 | * a tree block with room for one extra struct btrfs_item | ||
3144 | * | ||
3145 | * This allows us to split the item in place, keeping a lock on the | ||
3146 | * leaf the entire time. | ||
3147 | */ | ||
3148 | int btrfs_split_item(struct btrfs_trans_handle *trans, | ||
3149 | struct btrfs_root *root, | ||
3150 | struct btrfs_path *path, | ||
3151 | struct btrfs_key *new_key, | ||
3152 | unsigned long split_offset) | ||
3153 | { | ||
3154 | int ret; | ||
3155 | ret = setup_leaf_for_split(trans, root, path, | ||
3156 | sizeof(struct btrfs_item)); | ||
3157 | if (ret) | ||
3158 | return ret; | ||
3159 | |||
3160 | ret = split_item(trans, root, path, new_key, split_offset); | ||
3122 | return ret; | 3161 | return ret; |
3123 | } | 3162 | } |
3124 | 3163 | ||
3125 | /* | 3164 | /* |
3165 | * This function duplicate a item, giving 'new_key' to the new item. | ||
3166 | * It guarantees both items live in the same tree leaf and the new item | ||
3167 | * is contiguous with the original item. | ||
3168 | * | ||
3169 | * This allows us to split file extent in place, keeping a lock on the | ||
3170 | * leaf the entire time. | ||
3171 | */ | ||
3172 | int btrfs_duplicate_item(struct btrfs_trans_handle *trans, | ||
3173 | struct btrfs_root *root, | ||
3174 | struct btrfs_path *path, | ||
3175 | struct btrfs_key *new_key) | ||
3176 | { | ||
3177 | struct extent_buffer *leaf; | ||
3178 | int ret; | ||
3179 | u32 item_size; | ||
3180 | |||
3181 | leaf = path->nodes[0]; | ||
3182 | item_size = btrfs_item_size_nr(leaf, path->slots[0]); | ||
3183 | ret = setup_leaf_for_split(trans, root, path, | ||
3184 | item_size + sizeof(struct btrfs_item)); | ||
3185 | if (ret) | ||
3186 | return ret; | ||
3187 | |||
3188 | path->slots[0]++; | ||
3189 | ret = setup_items_for_insert(trans, root, path, new_key, &item_size, | ||
3190 | item_size, item_size + | ||
3191 | sizeof(struct btrfs_item), 1); | ||
3192 | BUG_ON(ret); | ||
3193 | |||
3194 | leaf = path->nodes[0]; | ||
3195 | memcpy_extent_buffer(leaf, | ||
3196 | btrfs_item_ptr_offset(leaf, path->slots[0]), | ||
3197 | btrfs_item_ptr_offset(leaf, path->slots[0] - 1), | ||
3198 | item_size); | ||
3199 | return 0; | ||
3200 | } | ||
3201 | |||
3202 | /* | ||
3126 | * make the item pointed to by the path smaller. new_size indicates | 3203 | * make the item pointed to by the path smaller. new_size indicates |
3127 | * how small to make it, and from_end tells us if we just chop bytes | 3204 | * how small to make it, and from_end tells us if we just chop bytes |
3128 | * off the end of the item or if we shift the item to chop bytes off | 3205 | * off the end of the item or if we shift the item to chop bytes off |
@@ -3714,8 +3791,8 @@ static noinline int btrfs_del_leaf(struct btrfs_trans_handle *trans, | |||
3714 | */ | 3791 | */ |
3715 | btrfs_unlock_up_safe(path, 0); | 3792 | btrfs_unlock_up_safe(path, 0); |
3716 | 3793 | ||
3717 | ret = btrfs_free_extent(trans, root, leaf->start, leaf->len, | 3794 | ret = btrfs_free_tree_block(trans, root, leaf->start, leaf->len, |
3718 | 0, root->root_key.objectid, 0, 0); | 3795 | 0, root->root_key.objectid, 0); |
3719 | return ret; | 3796 | return ret; |
3720 | } | 3797 | } |
3721 | /* | 3798 | /* |
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h index 444b3e9b92a4..9f806dd04c27 100644 --- a/fs/btrfs/ctree.h +++ b/fs/btrfs/ctree.h | |||
@@ -310,6 +310,9 @@ struct btrfs_header { | |||
310 | #define BTRFS_MAX_INLINE_DATA_SIZE(r) (BTRFS_LEAF_DATA_SIZE(r) - \ | 310 | #define BTRFS_MAX_INLINE_DATA_SIZE(r) (BTRFS_LEAF_DATA_SIZE(r) - \ |
311 | sizeof(struct btrfs_item) - \ | 311 | sizeof(struct btrfs_item) - \ |
312 | sizeof(struct btrfs_file_extent_item)) | 312 | sizeof(struct btrfs_file_extent_item)) |
313 | #define BTRFS_MAX_XATTR_SIZE(r) (BTRFS_LEAF_DATA_SIZE(r) - \ | ||
314 | sizeof(struct btrfs_item) -\ | ||
315 | sizeof(struct btrfs_dir_item)) | ||
313 | 316 | ||
314 | 317 | ||
315 | /* | 318 | /* |
@@ -859,8 +862,9 @@ struct btrfs_fs_info { | |||
859 | struct mutex ordered_operations_mutex; | 862 | struct mutex ordered_operations_mutex; |
860 | struct rw_semaphore extent_commit_sem; | 863 | struct rw_semaphore extent_commit_sem; |
861 | 864 | ||
862 | struct rw_semaphore subvol_sem; | 865 | struct rw_semaphore cleanup_work_sem; |
863 | 866 | ||
867 | struct rw_semaphore subvol_sem; | ||
864 | struct srcu_struct subvol_srcu; | 868 | struct srcu_struct subvol_srcu; |
865 | 869 | ||
866 | struct list_head trans_list; | 870 | struct list_head trans_list; |
@@ -868,6 +872,9 @@ struct btrfs_fs_info { | |||
868 | struct list_head dead_roots; | 872 | struct list_head dead_roots; |
869 | struct list_head caching_block_groups; | 873 | struct list_head caching_block_groups; |
870 | 874 | ||
875 | spinlock_t delayed_iput_lock; | ||
876 | struct list_head delayed_iputs; | ||
877 | |||
871 | atomic_t nr_async_submits; | 878 | atomic_t nr_async_submits; |
872 | atomic_t async_submit_draining; | 879 | atomic_t async_submit_draining; |
873 | atomic_t nr_async_bios; | 880 | atomic_t nr_async_bios; |
@@ -1034,12 +1041,12 @@ struct btrfs_root { | |||
1034 | int ref_cows; | 1041 | int ref_cows; |
1035 | int track_dirty; | 1042 | int track_dirty; |
1036 | int in_radix; | 1043 | int in_radix; |
1044 | int clean_orphans; | ||
1037 | 1045 | ||
1038 | u64 defrag_trans_start; | 1046 | u64 defrag_trans_start; |
1039 | struct btrfs_key defrag_progress; | 1047 | struct btrfs_key defrag_progress; |
1040 | struct btrfs_key defrag_max; | 1048 | struct btrfs_key defrag_max; |
1041 | int defrag_running; | 1049 | int defrag_running; |
1042 | int defrag_level; | ||
1043 | char *name; | 1050 | char *name; |
1044 | int in_sysfs; | 1051 | int in_sysfs; |
1045 | 1052 | ||
@@ -1975,6 +1982,10 @@ struct extent_buffer *btrfs_alloc_free_block(struct btrfs_trans_handle *trans, | |||
1975 | u64 parent, u64 root_objectid, | 1982 | u64 parent, u64 root_objectid, |
1976 | struct btrfs_disk_key *key, int level, | 1983 | struct btrfs_disk_key *key, int level, |
1977 | u64 hint, u64 empty_size); | 1984 | u64 hint, u64 empty_size); |
1985 | int btrfs_free_tree_block(struct btrfs_trans_handle *trans, | ||
1986 | struct btrfs_root *root, | ||
1987 | u64 bytenr, u32 blocksize, | ||
1988 | u64 parent, u64 root_objectid, int level); | ||
1978 | struct extent_buffer *btrfs_init_new_buffer(struct btrfs_trans_handle *trans, | 1989 | struct extent_buffer *btrfs_init_new_buffer(struct btrfs_trans_handle *trans, |
1979 | struct btrfs_root *root, | 1990 | struct btrfs_root *root, |
1980 | u64 bytenr, u32 blocksize, | 1991 | u64 bytenr, u32 blocksize, |
@@ -2089,6 +2100,10 @@ int btrfs_split_item(struct btrfs_trans_handle *trans, | |||
2089 | struct btrfs_path *path, | 2100 | struct btrfs_path *path, |
2090 | struct btrfs_key *new_key, | 2101 | struct btrfs_key *new_key, |
2091 | unsigned long split_offset); | 2102 | unsigned long split_offset); |
2103 | int btrfs_duplicate_item(struct btrfs_trans_handle *trans, | ||
2104 | struct btrfs_root *root, | ||
2105 | struct btrfs_path *path, | ||
2106 | struct btrfs_key *new_key); | ||
2092 | int btrfs_search_slot(struct btrfs_trans_handle *trans, struct btrfs_root | 2107 | int btrfs_search_slot(struct btrfs_trans_handle *trans, struct btrfs_root |
2093 | *root, struct btrfs_key *key, struct btrfs_path *p, int | 2108 | *root, struct btrfs_key *key, struct btrfs_path *p, int |
2094 | ins_len, int cow); | 2109 | ins_len, int cow); |
@@ -2196,9 +2211,10 @@ int btrfs_delete_one_dir_name(struct btrfs_trans_handle *trans, | |||
2196 | struct btrfs_path *path, | 2211 | struct btrfs_path *path, |
2197 | struct btrfs_dir_item *di); | 2212 | struct btrfs_dir_item *di); |
2198 | int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans, | 2213 | int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans, |
2199 | struct btrfs_root *root, const char *name, | 2214 | struct btrfs_root *root, |
2200 | u16 name_len, const void *data, u16 data_len, | 2215 | struct btrfs_path *path, u64 objectid, |
2201 | u64 dir); | 2216 | const char *name, u16 name_len, |
2217 | const void *data, u16 data_len); | ||
2202 | struct btrfs_dir_item *btrfs_lookup_xattr(struct btrfs_trans_handle *trans, | 2218 | struct btrfs_dir_item *btrfs_lookup_xattr(struct btrfs_trans_handle *trans, |
2203 | struct btrfs_root *root, | 2219 | struct btrfs_root *root, |
2204 | struct btrfs_path *path, u64 dir, | 2220 | struct btrfs_path *path, u64 dir, |
@@ -2292,7 +2308,7 @@ int btrfs_truncate_inode_items(struct btrfs_trans_handle *trans, | |||
2292 | struct inode *inode, u64 new_size, | 2308 | struct inode *inode, u64 new_size, |
2293 | u32 min_type); | 2309 | u32 min_type); |
2294 | 2310 | ||
2295 | int btrfs_start_delalloc_inodes(struct btrfs_root *root); | 2311 | int btrfs_start_delalloc_inodes(struct btrfs_root *root, int delay_iput); |
2296 | int btrfs_set_extent_delalloc(struct inode *inode, u64 start, u64 end); | 2312 | int btrfs_set_extent_delalloc(struct inode *inode, u64 start, u64 end); |
2297 | int btrfs_writepages(struct address_space *mapping, | 2313 | int btrfs_writepages(struct address_space *mapping, |
2298 | struct writeback_control *wbc); | 2314 | struct writeback_control *wbc); |
@@ -2332,6 +2348,8 @@ int btrfs_orphan_del(struct btrfs_trans_handle *trans, struct inode *inode); | |||
2332 | void btrfs_orphan_cleanup(struct btrfs_root *root); | 2348 | void btrfs_orphan_cleanup(struct btrfs_root *root); |
2333 | int btrfs_cont_expand(struct inode *inode, loff_t size); | 2349 | int btrfs_cont_expand(struct inode *inode, loff_t size); |
2334 | int btrfs_invalidate_inodes(struct btrfs_root *root); | 2350 | int btrfs_invalidate_inodes(struct btrfs_root *root); |
2351 | void btrfs_add_delayed_iput(struct inode *inode); | ||
2352 | void btrfs_run_delayed_iputs(struct btrfs_root *root); | ||
2335 | extern const struct dentry_operations btrfs_dentry_operations; | 2353 | extern const struct dentry_operations btrfs_dentry_operations; |
2336 | 2354 | ||
2337 | /* ioctl.c */ | 2355 | /* ioctl.c */ |
@@ -2345,12 +2363,9 @@ int btrfs_drop_extent_cache(struct inode *inode, u64 start, u64 end, | |||
2345 | int skip_pinned); | 2363 | int skip_pinned); |
2346 | int btrfs_check_file(struct btrfs_root *root, struct inode *inode); | 2364 | int btrfs_check_file(struct btrfs_root *root, struct inode *inode); |
2347 | extern const struct file_operations btrfs_file_operations; | 2365 | extern const struct file_operations btrfs_file_operations; |
2348 | int btrfs_drop_extents(struct btrfs_trans_handle *trans, | 2366 | int btrfs_drop_extents(struct btrfs_trans_handle *trans, struct inode *inode, |
2349 | struct btrfs_root *root, struct inode *inode, | 2367 | u64 start, u64 end, u64 *hint_byte, int drop_cache); |
2350 | u64 start, u64 end, u64 locked_end, | ||
2351 | u64 inline_limit, u64 *hint_block, int drop_cache); | ||
2352 | int btrfs_mark_extent_written(struct btrfs_trans_handle *trans, | 2368 | int btrfs_mark_extent_written(struct btrfs_trans_handle *trans, |
2353 | struct btrfs_root *root, | ||
2354 | struct inode *inode, u64 start, u64 end); | 2369 | struct inode *inode, u64 start, u64 end); |
2355 | int btrfs_release_file(struct inode *inode, struct file *file); | 2370 | int btrfs_release_file(struct inode *inode, struct file *file); |
2356 | 2371 | ||
@@ -2380,7 +2395,8 @@ int btrfs_check_acl(struct inode *inode, int mask); | |||
2380 | #else | 2395 | #else |
2381 | #define btrfs_check_acl NULL | 2396 | #define btrfs_check_acl NULL |
2382 | #endif | 2397 | #endif |
2383 | int btrfs_init_acl(struct inode *inode, struct inode *dir); | 2398 | int btrfs_init_acl(struct btrfs_trans_handle *trans, |
2399 | struct inode *inode, struct inode *dir); | ||
2384 | int btrfs_acl_chmod(struct inode *inode); | 2400 | int btrfs_acl_chmod(struct inode *inode); |
2385 | 2401 | ||
2386 | /* relocation.c */ | 2402 | /* relocation.c */ |
diff --git a/fs/btrfs/dir-item.c b/fs/btrfs/dir-item.c index f3a6075519cc..e9103b3baa49 100644 --- a/fs/btrfs/dir-item.c +++ b/fs/btrfs/dir-item.c | |||
@@ -68,12 +68,12 @@ static struct btrfs_dir_item *insert_with_overflow(struct btrfs_trans_handle | |||
68 | * into the tree | 68 | * into the tree |
69 | */ | 69 | */ |
70 | int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans, | 70 | int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans, |
71 | struct btrfs_root *root, const char *name, | 71 | struct btrfs_root *root, |
72 | u16 name_len, const void *data, u16 data_len, | 72 | struct btrfs_path *path, u64 objectid, |
73 | u64 dir) | 73 | const char *name, u16 name_len, |
74 | const void *data, u16 data_len) | ||
74 | { | 75 | { |
75 | int ret = 0; | 76 | int ret = 0; |
76 | struct btrfs_path *path; | ||
77 | struct btrfs_dir_item *dir_item; | 77 | struct btrfs_dir_item *dir_item; |
78 | unsigned long name_ptr, data_ptr; | 78 | unsigned long name_ptr, data_ptr; |
79 | struct btrfs_key key, location; | 79 | struct btrfs_key key, location; |
@@ -81,15 +81,11 @@ int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans, | |||
81 | struct extent_buffer *leaf; | 81 | struct extent_buffer *leaf; |
82 | u32 data_size; | 82 | u32 data_size; |
83 | 83 | ||
84 | key.objectid = dir; | 84 | BUG_ON(name_len + data_len > BTRFS_MAX_XATTR_SIZE(root)); |
85 | |||
86 | key.objectid = objectid; | ||
85 | btrfs_set_key_type(&key, BTRFS_XATTR_ITEM_KEY); | 87 | btrfs_set_key_type(&key, BTRFS_XATTR_ITEM_KEY); |
86 | key.offset = btrfs_name_hash(name, name_len); | 88 | key.offset = btrfs_name_hash(name, name_len); |
87 | path = btrfs_alloc_path(); | ||
88 | if (!path) | ||
89 | return -ENOMEM; | ||
90 | if (name_len + data_len + sizeof(struct btrfs_dir_item) > | ||
91 | BTRFS_LEAF_DATA_SIZE(root) - sizeof(struct btrfs_item)) | ||
92 | return -ENOSPC; | ||
93 | 89 | ||
94 | data_size = sizeof(*dir_item) + name_len + data_len; | 90 | data_size = sizeof(*dir_item) + name_len + data_len; |
95 | dir_item = insert_with_overflow(trans, root, path, &key, data_size, | 91 | dir_item = insert_with_overflow(trans, root, path, &key, data_size, |
@@ -117,7 +113,6 @@ int btrfs_insert_xattr_item(struct btrfs_trans_handle *trans, | |||
117 | write_extent_buffer(leaf, data, data_ptr, data_len); | 113 | write_extent_buffer(leaf, data, data_ptr, data_len); |
118 | btrfs_mark_buffer_dirty(path->nodes[0]); | 114 | btrfs_mark_buffer_dirty(path->nodes[0]); |
119 | 115 | ||
120 | btrfs_free_path(path); | ||
121 | return ret; | 116 | return ret; |
122 | } | 117 | } |
123 | 118 | ||
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c index 02b6afbd7450..009e3bd18f23 100644 --- a/fs/btrfs/disk-io.c +++ b/fs/btrfs/disk-io.c | |||
@@ -892,6 +892,8 @@ static int __setup_root(u32 nodesize, u32 leafsize, u32 sectorsize, | |||
892 | root->stripesize = stripesize; | 892 | root->stripesize = stripesize; |
893 | root->ref_cows = 0; | 893 | root->ref_cows = 0; |
894 | root->track_dirty = 0; | 894 | root->track_dirty = 0; |
895 | root->in_radix = 0; | ||
896 | root->clean_orphans = 0; | ||
895 | 897 | ||
896 | root->fs_info = fs_info; | 898 | root->fs_info = fs_info; |
897 | root->objectid = objectid; | 899 | root->objectid = objectid; |
@@ -928,7 +930,6 @@ static int __setup_root(u32 nodesize, u32 leafsize, u32 sectorsize, | |||
928 | root->defrag_trans_start = fs_info->generation; | 930 | root->defrag_trans_start = fs_info->generation; |
929 | init_completion(&root->kobj_unregister); | 931 | init_completion(&root->kobj_unregister); |
930 | root->defrag_running = 0; | 932 | root->defrag_running = 0; |
931 | root->defrag_level = 0; | ||
932 | root->root_key.objectid = objectid; | 933 | root->root_key.objectid = objectid; |
933 | root->anon_super.s_root = NULL; | 934 | root->anon_super.s_root = NULL; |
934 | root->anon_super.s_dev = 0; | 935 | root->anon_super.s_dev = 0; |
@@ -980,12 +981,12 @@ int btrfs_free_log_root_tree(struct btrfs_trans_handle *trans, | |||
980 | 981 | ||
981 | while (1) { | 982 | while (1) { |
982 | ret = find_first_extent_bit(&log_root_tree->dirty_log_pages, | 983 | ret = find_first_extent_bit(&log_root_tree->dirty_log_pages, |
983 | 0, &start, &end, EXTENT_DIRTY); | 984 | 0, &start, &end, EXTENT_DIRTY | EXTENT_NEW); |
984 | if (ret) | 985 | if (ret) |
985 | break; | 986 | break; |
986 | 987 | ||
987 | clear_extent_dirty(&log_root_tree->dirty_log_pages, | 988 | clear_extent_bits(&log_root_tree->dirty_log_pages, start, end, |
988 | start, end, GFP_NOFS); | 989 | EXTENT_DIRTY | EXTENT_NEW, GFP_NOFS); |
989 | } | 990 | } |
990 | eb = fs_info->log_root_tree->node; | 991 | eb = fs_info->log_root_tree->node; |
991 | 992 | ||
@@ -1210,8 +1211,10 @@ again: | |||
1210 | ret = radix_tree_insert(&fs_info->fs_roots_radix, | 1211 | ret = radix_tree_insert(&fs_info->fs_roots_radix, |
1211 | (unsigned long)root->root_key.objectid, | 1212 | (unsigned long)root->root_key.objectid, |
1212 | root); | 1213 | root); |
1213 | if (ret == 0) | 1214 | if (ret == 0) { |
1214 | root->in_radix = 1; | 1215 | root->in_radix = 1; |
1216 | root->clean_orphans = 1; | ||
1217 | } | ||
1215 | spin_unlock(&fs_info->fs_roots_radix_lock); | 1218 | spin_unlock(&fs_info->fs_roots_radix_lock); |
1216 | radix_tree_preload_end(); | 1219 | radix_tree_preload_end(); |
1217 | if (ret) { | 1220 | if (ret) { |
@@ -1225,10 +1228,6 @@ again: | |||
1225 | ret = btrfs_find_dead_roots(fs_info->tree_root, | 1228 | ret = btrfs_find_dead_roots(fs_info->tree_root, |
1226 | root->root_key.objectid); | 1229 | root->root_key.objectid); |
1227 | WARN_ON(ret); | 1230 | WARN_ON(ret); |
1228 | |||
1229 | if (!(fs_info->sb->s_flags & MS_RDONLY)) | ||
1230 | btrfs_orphan_cleanup(root); | ||
1231 | |||
1232 | return root; | 1231 | return root; |
1233 | fail: | 1232 | fail: |
1234 | free_fs_root(root); | 1233 | free_fs_root(root); |
@@ -1477,6 +1476,7 @@ static int cleaner_kthread(void *arg) | |||
1477 | 1476 | ||
1478 | if (!(root->fs_info->sb->s_flags & MS_RDONLY) && | 1477 | if (!(root->fs_info->sb->s_flags & MS_RDONLY) && |
1479 | mutex_trylock(&root->fs_info->cleaner_mutex)) { | 1478 | mutex_trylock(&root->fs_info->cleaner_mutex)) { |
1479 | btrfs_run_delayed_iputs(root); | ||
1480 | btrfs_clean_old_snapshots(root); | 1480 | btrfs_clean_old_snapshots(root); |
1481 | mutex_unlock(&root->fs_info->cleaner_mutex); | 1481 | mutex_unlock(&root->fs_info->cleaner_mutex); |
1482 | } | 1482 | } |
@@ -1606,6 +1606,7 @@ struct btrfs_root *open_ctree(struct super_block *sb, | |||
1606 | INIT_RADIX_TREE(&fs_info->fs_roots_radix, GFP_ATOMIC); | 1606 | INIT_RADIX_TREE(&fs_info->fs_roots_radix, GFP_ATOMIC); |
1607 | INIT_LIST_HEAD(&fs_info->trans_list); | 1607 | INIT_LIST_HEAD(&fs_info->trans_list); |
1608 | INIT_LIST_HEAD(&fs_info->dead_roots); | 1608 | INIT_LIST_HEAD(&fs_info->dead_roots); |
1609 | INIT_LIST_HEAD(&fs_info->delayed_iputs); | ||
1609 | INIT_LIST_HEAD(&fs_info->hashers); | 1610 | INIT_LIST_HEAD(&fs_info->hashers); |
1610 | INIT_LIST_HEAD(&fs_info->delalloc_inodes); | 1611 | INIT_LIST_HEAD(&fs_info->delalloc_inodes); |
1611 | INIT_LIST_HEAD(&fs_info->ordered_operations); | 1612 | INIT_LIST_HEAD(&fs_info->ordered_operations); |
@@ -1614,6 +1615,7 @@ struct btrfs_root *open_ctree(struct super_block *sb, | |||
1614 | spin_lock_init(&fs_info->new_trans_lock); | 1615 | spin_lock_init(&fs_info->new_trans_lock); |
1615 | spin_lock_init(&fs_info->ref_cache_lock); | 1616 | spin_lock_init(&fs_info->ref_cache_lock); |
1616 | spin_lock_init(&fs_info->fs_roots_radix_lock); | 1617 | spin_lock_init(&fs_info->fs_roots_radix_lock); |
1618 | spin_lock_init(&fs_info->delayed_iput_lock); | ||
1617 | 1619 | ||
1618 | init_completion(&fs_info->kobj_unregister); | 1620 | init_completion(&fs_info->kobj_unregister); |
1619 | fs_info->tree_root = tree_root; | 1621 | fs_info->tree_root = tree_root; |
@@ -1689,6 +1691,7 @@ struct btrfs_root *open_ctree(struct super_block *sb, | |||
1689 | mutex_init(&fs_info->cleaner_mutex); | 1691 | mutex_init(&fs_info->cleaner_mutex); |
1690 | mutex_init(&fs_info->volume_mutex); | 1692 | mutex_init(&fs_info->volume_mutex); |
1691 | init_rwsem(&fs_info->extent_commit_sem); | 1693 | init_rwsem(&fs_info->extent_commit_sem); |
1694 | init_rwsem(&fs_info->cleanup_work_sem); | ||
1692 | init_rwsem(&fs_info->subvol_sem); | 1695 | init_rwsem(&fs_info->subvol_sem); |
1693 | 1696 | ||
1694 | btrfs_init_free_cluster(&fs_info->meta_alloc_cluster); | 1697 | btrfs_init_free_cluster(&fs_info->meta_alloc_cluster); |
@@ -2386,8 +2389,14 @@ int btrfs_commit_super(struct btrfs_root *root) | |||
2386 | int ret; | 2389 | int ret; |
2387 | 2390 | ||
2388 | mutex_lock(&root->fs_info->cleaner_mutex); | 2391 | mutex_lock(&root->fs_info->cleaner_mutex); |
2392 | btrfs_run_delayed_iputs(root); | ||
2389 | btrfs_clean_old_snapshots(root); | 2393 | btrfs_clean_old_snapshots(root); |
2390 | mutex_unlock(&root->fs_info->cleaner_mutex); | 2394 | mutex_unlock(&root->fs_info->cleaner_mutex); |
2395 | |||
2396 | /* wait until ongoing cleanup work done */ | ||
2397 | down_write(&root->fs_info->cleanup_work_sem); | ||
2398 | up_write(&root->fs_info->cleanup_work_sem); | ||
2399 | |||
2391 | trans = btrfs_start_transaction(root, 1); | 2400 | trans = btrfs_start_transaction(root, 1); |
2392 | ret = btrfs_commit_transaction(trans, root); | 2401 | ret = btrfs_commit_transaction(trans, root); |
2393 | BUG_ON(ret); | 2402 | BUG_ON(ret); |
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c index 94627c4cc193..56e50137d0e6 100644 --- a/fs/btrfs/extent-tree.c +++ b/fs/btrfs/extent-tree.c | |||
@@ -195,6 +195,14 @@ static int exclude_super_stripes(struct btrfs_root *root, | |||
195 | int stripe_len; | 195 | int stripe_len; |
196 | int i, nr, ret; | 196 | int i, nr, ret; |
197 | 197 | ||
198 | if (cache->key.objectid < BTRFS_SUPER_INFO_OFFSET) { | ||
199 | stripe_len = BTRFS_SUPER_INFO_OFFSET - cache->key.objectid; | ||
200 | cache->bytes_super += stripe_len; | ||
201 | ret = add_excluded_extent(root, cache->key.objectid, | ||
202 | stripe_len); | ||
203 | BUG_ON(ret); | ||
204 | } | ||
205 | |||
198 | for (i = 0; i < BTRFS_SUPER_MIRROR_MAX; i++) { | 206 | for (i = 0; i < BTRFS_SUPER_MIRROR_MAX; i++) { |
199 | bytenr = btrfs_sb_offset(i); | 207 | bytenr = btrfs_sb_offset(i); |
200 | ret = btrfs_rmap_block(&root->fs_info->mapping_tree, | 208 | ret = btrfs_rmap_block(&root->fs_info->mapping_tree, |
@@ -255,7 +263,7 @@ static u64 add_new_free_space(struct btrfs_block_group_cache *block_group, | |||
255 | if (ret) | 263 | if (ret) |
256 | break; | 264 | break; |
257 | 265 | ||
258 | if (extent_start == start) { | 266 | if (extent_start <= start) { |
259 | start = extent_end + 1; | 267 | start = extent_end + 1; |
260 | } else if (extent_start > start && extent_start < end) { | 268 | } else if (extent_start > start && extent_start < end) { |
261 | size = extent_start - start; | 269 | size = extent_start - start; |
@@ -2880,9 +2888,9 @@ static noinline void flush_delalloc_async(struct btrfs_work *work) | |||
2880 | root = async->root; | 2888 | root = async->root; |
2881 | info = async->info; | 2889 | info = async->info; |
2882 | 2890 | ||
2883 | btrfs_start_delalloc_inodes(root); | 2891 | btrfs_start_delalloc_inodes(root, 0); |
2884 | wake_up(&info->flush_wait); | 2892 | wake_up(&info->flush_wait); |
2885 | btrfs_wait_ordered_extents(root, 0); | 2893 | btrfs_wait_ordered_extents(root, 0, 0); |
2886 | 2894 | ||
2887 | spin_lock(&info->lock); | 2895 | spin_lock(&info->lock); |
2888 | info->flushing = 0; | 2896 | info->flushing = 0; |
@@ -2956,8 +2964,8 @@ static void flush_delalloc(struct btrfs_root *root, | |||
2956 | return; | 2964 | return; |
2957 | 2965 | ||
2958 | flush: | 2966 | flush: |
2959 | btrfs_start_delalloc_inodes(root); | 2967 | btrfs_start_delalloc_inodes(root, 0); |
2960 | btrfs_wait_ordered_extents(root, 0); | 2968 | btrfs_wait_ordered_extents(root, 0, 0); |
2961 | 2969 | ||
2962 | spin_lock(&info->lock); | 2970 | spin_lock(&info->lock); |
2963 | info->flushing = 0; | 2971 | info->flushing = 0; |
@@ -3454,14 +3462,6 @@ static int update_block_group(struct btrfs_trans_handle *trans, | |||
3454 | else | 3462 | else |
3455 | old_val -= num_bytes; | 3463 | old_val -= num_bytes; |
3456 | btrfs_set_super_bytes_used(&info->super_copy, old_val); | 3464 | btrfs_set_super_bytes_used(&info->super_copy, old_val); |
3457 | |||
3458 | /* block accounting for root item */ | ||
3459 | old_val = btrfs_root_used(&root->root_item); | ||
3460 | if (alloc) | ||
3461 | old_val += num_bytes; | ||
3462 | else | ||
3463 | old_val -= num_bytes; | ||
3464 | btrfs_set_root_used(&root->root_item, old_val); | ||
3465 | spin_unlock(&info->delalloc_lock); | 3465 | spin_unlock(&info->delalloc_lock); |
3466 | 3466 | ||
3467 | while (total) { | 3467 | while (total) { |
@@ -4049,6 +4049,21 @@ int btrfs_free_extent(struct btrfs_trans_handle *trans, | |||
4049 | return ret; | 4049 | return ret; |
4050 | } | 4050 | } |
4051 | 4051 | ||
4052 | int btrfs_free_tree_block(struct btrfs_trans_handle *trans, | ||
4053 | struct btrfs_root *root, | ||
4054 | u64 bytenr, u32 blocksize, | ||
4055 | u64 parent, u64 root_objectid, int level) | ||
4056 | { | ||
4057 | u64 used; | ||
4058 | spin_lock(&root->node_lock); | ||
4059 | used = btrfs_root_used(&root->root_item) - blocksize; | ||
4060 | btrfs_set_root_used(&root->root_item, used); | ||
4061 | spin_unlock(&root->node_lock); | ||
4062 | |||
4063 | return btrfs_free_extent(trans, root, bytenr, blocksize, | ||
4064 | parent, root_objectid, level, 0); | ||
4065 | } | ||
4066 | |||
4052 | static u64 stripe_align(struct btrfs_root *root, u64 val) | 4067 | static u64 stripe_align(struct btrfs_root *root, u64 val) |
4053 | { | 4068 | { |
4054 | u64 mask = ((u64)root->stripesize - 1); | 4069 | u64 mask = ((u64)root->stripesize - 1); |
@@ -4578,7 +4593,6 @@ int btrfs_reserve_extent(struct btrfs_trans_handle *trans, | |||
4578 | { | 4593 | { |
4579 | int ret; | 4594 | int ret; |
4580 | u64 search_start = 0; | 4595 | u64 search_start = 0; |
4581 | struct btrfs_fs_info *info = root->fs_info; | ||
4582 | 4596 | ||
4583 | data = btrfs_get_alloc_profile(root, data); | 4597 | data = btrfs_get_alloc_profile(root, data); |
4584 | again: | 4598 | again: |
@@ -4586,17 +4600,9 @@ again: | |||
4586 | * the only place that sets empty_size is btrfs_realloc_node, which | 4600 | * the only place that sets empty_size is btrfs_realloc_node, which |
4587 | * is not called recursively on allocations | 4601 | * is not called recursively on allocations |
4588 | */ | 4602 | */ |
4589 | if (empty_size || root->ref_cows) { | 4603 | if (empty_size || root->ref_cows) |
4590 | if (!(data & BTRFS_BLOCK_GROUP_METADATA)) { | ||
4591 | ret = do_chunk_alloc(trans, root->fs_info->extent_root, | ||
4592 | 2 * 1024 * 1024, | ||
4593 | BTRFS_BLOCK_GROUP_METADATA | | ||
4594 | (info->metadata_alloc_profile & | ||
4595 | info->avail_metadata_alloc_bits), 0); | ||
4596 | } | ||
4597 | ret = do_chunk_alloc(trans, root->fs_info->extent_root, | 4604 | ret = do_chunk_alloc(trans, root->fs_info->extent_root, |
4598 | num_bytes + 2 * 1024 * 1024, data, 0); | 4605 | num_bytes + 2 * 1024 * 1024, data, 0); |
4599 | } | ||
4600 | 4606 | ||
4601 | WARN_ON(num_bytes < root->sectorsize); | 4607 | WARN_ON(num_bytes < root->sectorsize); |
4602 | ret = find_free_extent(trans, root, num_bytes, empty_size, | 4608 | ret = find_free_extent(trans, root, num_bytes, empty_size, |
@@ -4897,6 +4903,14 @@ static int alloc_tree_block(struct btrfs_trans_handle *trans, | |||
4897 | extent_op); | 4903 | extent_op); |
4898 | BUG_ON(ret); | 4904 | BUG_ON(ret); |
4899 | } | 4905 | } |
4906 | |||
4907 | if (root_objectid == root->root_key.objectid) { | ||
4908 | u64 used; | ||
4909 | spin_lock(&root->node_lock); | ||
4910 | used = btrfs_root_used(&root->root_item) + num_bytes; | ||
4911 | btrfs_set_root_used(&root->root_item, used); | ||
4912 | spin_unlock(&root->node_lock); | ||
4913 | } | ||
4900 | return ret; | 4914 | return ret; |
4901 | } | 4915 | } |
4902 | 4916 | ||
@@ -4919,8 +4933,16 @@ struct extent_buffer *btrfs_init_new_buffer(struct btrfs_trans_handle *trans, | |||
4919 | btrfs_set_buffer_uptodate(buf); | 4933 | btrfs_set_buffer_uptodate(buf); |
4920 | 4934 | ||
4921 | if (root->root_key.objectid == BTRFS_TREE_LOG_OBJECTID) { | 4935 | if (root->root_key.objectid == BTRFS_TREE_LOG_OBJECTID) { |
4922 | set_extent_dirty(&root->dirty_log_pages, buf->start, | 4936 | /* |
4923 | buf->start + buf->len - 1, GFP_NOFS); | 4937 | * we allow two log transactions at a time, use different |
4938 | * EXENT bit to differentiate dirty pages. | ||
4939 | */ | ||
4940 | if (root->log_transid % 2 == 0) | ||
4941 | set_extent_dirty(&root->dirty_log_pages, buf->start, | ||
4942 | buf->start + buf->len - 1, GFP_NOFS); | ||
4943 | else | ||
4944 | set_extent_new(&root->dirty_log_pages, buf->start, | ||
4945 | buf->start + buf->len - 1, GFP_NOFS); | ||
4924 | } else { | 4946 | } else { |
4925 | set_extent_dirty(&trans->transaction->dirty_pages, buf->start, | 4947 | set_extent_dirty(&trans->transaction->dirty_pages, buf->start, |
4926 | buf->start + buf->len - 1, GFP_NOFS); | 4948 | buf->start + buf->len - 1, GFP_NOFS); |
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c index 77f759302e12..feaa13b105d9 100644 --- a/fs/btrfs/file.c +++ b/fs/btrfs/file.c | |||
@@ -179,18 +179,14 @@ int btrfs_drop_extent_cache(struct inode *inode, u64 start, u64 end, | |||
179 | } | 179 | } |
180 | flags = em->flags; | 180 | flags = em->flags; |
181 | if (skip_pinned && test_bit(EXTENT_FLAG_PINNED, &em->flags)) { | 181 | if (skip_pinned && test_bit(EXTENT_FLAG_PINNED, &em->flags)) { |
182 | if (em->start <= start && | 182 | if (testend && em->start + em->len >= start + len) { |
183 | (!testend || em->start + em->len >= start + len)) { | ||
184 | free_extent_map(em); | 183 | free_extent_map(em); |
185 | write_unlock(&em_tree->lock); | 184 | write_unlock(&em_tree->lock); |
186 | break; | 185 | break; |
187 | } | 186 | } |
188 | if (start < em->start) { | 187 | start = em->start + em->len; |
189 | len = em->start - start; | 188 | if (testend) |
190 | } else { | ||
191 | len = start + len - (em->start + em->len); | 189 | len = start + len - (em->start + em->len); |
192 | start = em->start + em->len; | ||
193 | } | ||
194 | free_extent_map(em); | 190 | free_extent_map(em); |
195 | write_unlock(&em_tree->lock); | 191 | write_unlock(&em_tree->lock); |
196 | continue; | 192 | continue; |
@@ -265,319 +261,247 @@ int btrfs_drop_extent_cache(struct inode *inode, u64 start, u64 end, | |||
265 | * If an extent intersects the range but is not entirely inside the range | 261 | * If an extent intersects the range but is not entirely inside the range |
266 | * it is either truncated or split. Anything entirely inside the range | 262 | * it is either truncated or split. Anything entirely inside the range |
267 | * is deleted from the tree. | 263 | * is deleted from the tree. |
268 | * | ||
269 | * inline_limit is used to tell this code which offsets in the file to keep | ||
270 | * if they contain inline extents. | ||
271 | */ | 264 | */ |
272 | noinline int btrfs_drop_extents(struct btrfs_trans_handle *trans, | 265 | int btrfs_drop_extents(struct btrfs_trans_handle *trans, struct inode *inode, |
273 | struct btrfs_root *root, struct inode *inode, | 266 | u64 start, u64 end, u64 *hint_byte, int drop_cache) |
274 | u64 start, u64 end, u64 locked_end, | ||
275 | u64 inline_limit, u64 *hint_byte, int drop_cache) | ||
276 | { | 267 | { |
277 | u64 extent_end = 0; | 268 | struct btrfs_root *root = BTRFS_I(inode)->root; |
278 | u64 search_start = start; | ||
279 | u64 ram_bytes = 0; | ||
280 | u64 disk_bytenr = 0; | ||
281 | u64 orig_locked_end = locked_end; | ||
282 | u8 compression; | ||
283 | u8 encryption; | ||
284 | u16 other_encoding = 0; | ||
285 | struct extent_buffer *leaf; | 269 | struct extent_buffer *leaf; |
286 | struct btrfs_file_extent_item *extent; | 270 | struct btrfs_file_extent_item *fi; |
287 | struct btrfs_path *path; | 271 | struct btrfs_path *path; |
288 | struct btrfs_key key; | 272 | struct btrfs_key key; |
289 | struct btrfs_file_extent_item old; | 273 | struct btrfs_key new_key; |
290 | int keep; | 274 | u64 search_start = start; |
291 | int slot; | 275 | u64 disk_bytenr = 0; |
292 | int bookend; | 276 | u64 num_bytes = 0; |
293 | int found_type = 0; | 277 | u64 extent_offset = 0; |
294 | int found_extent; | 278 | u64 extent_end = 0; |
295 | int found_inline; | 279 | int del_nr = 0; |
280 | int del_slot = 0; | ||
281 | int extent_type; | ||
296 | int recow; | 282 | int recow; |
297 | int ret; | 283 | int ret; |
298 | 284 | ||
299 | inline_limit = 0; | ||
300 | if (drop_cache) | 285 | if (drop_cache) |
301 | btrfs_drop_extent_cache(inode, start, end - 1, 0); | 286 | btrfs_drop_extent_cache(inode, start, end - 1, 0); |
302 | 287 | ||
303 | path = btrfs_alloc_path(); | 288 | path = btrfs_alloc_path(); |
304 | if (!path) | 289 | if (!path) |
305 | return -ENOMEM; | 290 | return -ENOMEM; |
291 | |||
306 | while (1) { | 292 | while (1) { |
307 | recow = 0; | 293 | recow = 0; |
308 | btrfs_release_path(root, path); | ||
309 | ret = btrfs_lookup_file_extent(trans, root, path, inode->i_ino, | 294 | ret = btrfs_lookup_file_extent(trans, root, path, inode->i_ino, |
310 | search_start, -1); | 295 | search_start, -1); |
311 | if (ret < 0) | 296 | if (ret < 0) |
312 | goto out; | 297 | break; |
313 | if (ret > 0) { | 298 | if (ret > 0 && path->slots[0] > 0 && search_start == start) { |
314 | if (path->slots[0] == 0) { | 299 | leaf = path->nodes[0]; |
315 | ret = 0; | 300 | btrfs_item_key_to_cpu(leaf, &key, path->slots[0] - 1); |
316 | goto out; | 301 | if (key.objectid == inode->i_ino && |
317 | } | 302 | key.type == BTRFS_EXTENT_DATA_KEY) |
318 | path->slots[0]--; | 303 | path->slots[0]--; |
319 | } | 304 | } |
305 | ret = 0; | ||
320 | next_slot: | 306 | next_slot: |
321 | keep = 0; | ||
322 | bookend = 0; | ||
323 | found_extent = 0; | ||
324 | found_inline = 0; | ||
325 | compression = 0; | ||
326 | encryption = 0; | ||
327 | extent = NULL; | ||
328 | leaf = path->nodes[0]; | 307 | leaf = path->nodes[0]; |
329 | slot = path->slots[0]; | 308 | if (path->slots[0] >= btrfs_header_nritems(leaf)) { |
330 | ret = 0; | 309 | BUG_ON(del_nr > 0); |
331 | btrfs_item_key_to_cpu(leaf, &key, slot); | 310 | ret = btrfs_next_leaf(root, path); |
332 | if (btrfs_key_type(&key) == BTRFS_EXTENT_DATA_KEY && | 311 | if (ret < 0) |
333 | key.offset >= end) { | 312 | break; |
334 | goto out; | 313 | if (ret > 0) { |
335 | } | 314 | ret = 0; |
336 | if (btrfs_key_type(&key) > BTRFS_EXTENT_DATA_KEY || | 315 | break; |
337 | key.objectid != inode->i_ino) { | ||
338 | goto out; | ||
339 | } | ||
340 | if (recow) { | ||
341 | search_start = max(key.offset, start); | ||
342 | continue; | ||
343 | } | ||
344 | if (btrfs_key_type(&key) == BTRFS_EXTENT_DATA_KEY) { | ||
345 | extent = btrfs_item_ptr(leaf, slot, | ||
346 | struct btrfs_file_extent_item); | ||
347 | found_type = btrfs_file_extent_type(leaf, extent); | ||
348 | compression = btrfs_file_extent_compression(leaf, | ||
349 | extent); | ||
350 | encryption = btrfs_file_extent_encryption(leaf, | ||
351 | extent); | ||
352 | other_encoding = btrfs_file_extent_other_encoding(leaf, | ||
353 | extent); | ||
354 | if (found_type == BTRFS_FILE_EXTENT_REG || | ||
355 | found_type == BTRFS_FILE_EXTENT_PREALLOC) { | ||
356 | extent_end = | ||
357 | btrfs_file_extent_disk_bytenr(leaf, | ||
358 | extent); | ||
359 | if (extent_end) | ||
360 | *hint_byte = extent_end; | ||
361 | |||
362 | extent_end = key.offset + | ||
363 | btrfs_file_extent_num_bytes(leaf, extent); | ||
364 | ram_bytes = btrfs_file_extent_ram_bytes(leaf, | ||
365 | extent); | ||
366 | found_extent = 1; | ||
367 | } else if (found_type == BTRFS_FILE_EXTENT_INLINE) { | ||
368 | found_inline = 1; | ||
369 | extent_end = key.offset + | ||
370 | btrfs_file_extent_inline_len(leaf, extent); | ||
371 | } | 316 | } |
317 | leaf = path->nodes[0]; | ||
318 | recow = 1; | ||
319 | } | ||
320 | |||
321 | btrfs_item_key_to_cpu(leaf, &key, path->slots[0]); | ||
322 | if (key.objectid > inode->i_ino || | ||
323 | key.type > BTRFS_EXTENT_DATA_KEY || key.offset >= end) | ||
324 | break; | ||
325 | |||
326 | fi = btrfs_item_ptr(leaf, path->slots[0], | ||
327 | struct btrfs_file_extent_item); | ||
328 | extent_type = btrfs_file_extent_type(leaf, fi); | ||
329 | |||
330 | if (extent_type == BTRFS_FILE_EXTENT_REG || | ||
331 | extent_type == BTRFS_FILE_EXTENT_PREALLOC) { | ||
332 | disk_bytenr = btrfs_file_extent_disk_bytenr(leaf, fi); | ||
333 | num_bytes = btrfs_file_extent_disk_num_bytes(leaf, fi); | ||
334 | extent_offset = btrfs_file_extent_offset(leaf, fi); | ||
335 | extent_end = key.offset + | ||
336 | btrfs_file_extent_num_bytes(leaf, fi); | ||
337 | } else if (extent_type == BTRFS_FILE_EXTENT_INLINE) { | ||
338 | extent_end = key.offset + | ||
339 | btrfs_file_extent_inline_len(leaf, fi); | ||
372 | } else { | 340 | } else { |
341 | WARN_ON(1); | ||
373 | extent_end = search_start; | 342 | extent_end = search_start; |
374 | } | 343 | } |
375 | 344 | ||
376 | /* we found nothing we can drop */ | 345 | if (extent_end <= search_start) { |
377 | if ((!found_extent && !found_inline) || | 346 | path->slots[0]++; |
378 | search_start >= extent_end) { | ||
379 | int nextret; | ||
380 | u32 nritems; | ||
381 | nritems = btrfs_header_nritems(leaf); | ||
382 | if (slot >= nritems - 1) { | ||
383 | nextret = btrfs_next_leaf(root, path); | ||
384 | if (nextret) | ||
385 | goto out; | ||
386 | recow = 1; | ||
387 | } else { | ||
388 | path->slots[0]++; | ||
389 | } | ||
390 | goto next_slot; | 347 | goto next_slot; |
391 | } | 348 | } |
392 | 349 | ||
393 | if (end <= extent_end && start >= key.offset && found_inline) | 350 | search_start = max(key.offset, start); |
394 | *hint_byte = EXTENT_MAP_INLINE; | 351 | if (recow) { |
395 | 352 | btrfs_release_path(root, path); | |
396 | if (found_extent) { | 353 | continue; |
397 | read_extent_buffer(leaf, &old, (unsigned long)extent, | ||
398 | sizeof(old)); | ||
399 | } | ||
400 | |||
401 | if (end < extent_end && end >= key.offset) { | ||
402 | bookend = 1; | ||
403 | if (found_inline && start <= key.offset) | ||
404 | keep = 1; | ||
405 | } | 354 | } |
406 | 355 | ||
407 | if (bookend && found_extent) { | 356 | /* |
408 | if (locked_end < extent_end) { | 357 | * | - range to drop - | |
409 | ret = try_lock_extent(&BTRFS_I(inode)->io_tree, | 358 | * | -------- extent -------- | |
410 | locked_end, extent_end - 1, | 359 | */ |
411 | GFP_NOFS); | 360 | if (start > key.offset && end < extent_end) { |
412 | if (!ret) { | 361 | BUG_ON(del_nr > 0); |
413 | btrfs_release_path(root, path); | 362 | BUG_ON(extent_type == BTRFS_FILE_EXTENT_INLINE); |
414 | lock_extent(&BTRFS_I(inode)->io_tree, | 363 | |
415 | locked_end, extent_end - 1, | 364 | memcpy(&new_key, &key, sizeof(new_key)); |
416 | GFP_NOFS); | 365 | new_key.offset = start; |
417 | locked_end = extent_end; | 366 | ret = btrfs_duplicate_item(trans, root, path, |
418 | continue; | 367 | &new_key); |
419 | } | 368 | if (ret == -EAGAIN) { |
420 | locked_end = extent_end; | 369 | btrfs_release_path(root, path); |
370 | continue; | ||
421 | } | 371 | } |
422 | disk_bytenr = le64_to_cpu(old.disk_bytenr); | 372 | if (ret < 0) |
423 | if (disk_bytenr != 0) { | 373 | break; |
374 | |||
375 | leaf = path->nodes[0]; | ||
376 | fi = btrfs_item_ptr(leaf, path->slots[0] - 1, | ||
377 | struct btrfs_file_extent_item); | ||
378 | btrfs_set_file_extent_num_bytes(leaf, fi, | ||
379 | start - key.offset); | ||
380 | |||
381 | fi = btrfs_item_ptr(leaf, path->slots[0], | ||
382 | struct btrfs_file_extent_item); | ||
383 | |||
384 | extent_offset += start - key.offset; | ||
385 | btrfs_set_file_extent_offset(leaf, fi, extent_offset); | ||
386 | btrfs_set_file_extent_num_bytes(leaf, fi, | ||
387 | extent_end - start); | ||
388 | btrfs_mark_buffer_dirty(leaf); | ||
389 | |||
390 | if (disk_bytenr > 0) { | ||
424 | ret = btrfs_inc_extent_ref(trans, root, | 391 | ret = btrfs_inc_extent_ref(trans, root, |
425 | disk_bytenr, | 392 | disk_bytenr, num_bytes, 0, |
426 | le64_to_cpu(old.disk_num_bytes), 0, | 393 | root->root_key.objectid, |
427 | root->root_key.objectid, | 394 | new_key.objectid, |
428 | key.objectid, key.offset - | 395 | start - extent_offset); |
429 | le64_to_cpu(old.offset)); | ||
430 | BUG_ON(ret); | 396 | BUG_ON(ret); |
397 | *hint_byte = disk_bytenr; | ||
431 | } | 398 | } |
399 | key.offset = start; | ||
432 | } | 400 | } |
401 | /* | ||
402 | * | ---- range to drop ----- | | ||
403 | * | -------- extent -------- | | ||
404 | */ | ||
405 | if (start <= key.offset && end < extent_end) { | ||
406 | BUG_ON(extent_type == BTRFS_FILE_EXTENT_INLINE); | ||
433 | 407 | ||
434 | if (found_inline) { | 408 | memcpy(&new_key, &key, sizeof(new_key)); |
435 | u64 mask = root->sectorsize - 1; | 409 | new_key.offset = end; |
436 | search_start = (extent_end + mask) & ~mask; | 410 | btrfs_set_item_key_safe(trans, root, path, &new_key); |
437 | } else | 411 | |
438 | search_start = extent_end; | 412 | extent_offset += end - key.offset; |
439 | 413 | btrfs_set_file_extent_offset(leaf, fi, extent_offset); | |
440 | /* truncate existing extent */ | 414 | btrfs_set_file_extent_num_bytes(leaf, fi, |
441 | if (start > key.offset) { | 415 | extent_end - end); |
442 | u64 new_num; | 416 | btrfs_mark_buffer_dirty(leaf); |
443 | u64 old_num; | 417 | if (disk_bytenr > 0) { |
444 | keep = 1; | 418 | inode_sub_bytes(inode, end - key.offset); |
445 | WARN_ON(start & (root->sectorsize - 1)); | 419 | *hint_byte = disk_bytenr; |
446 | if (found_extent) { | ||
447 | new_num = start - key.offset; | ||
448 | old_num = btrfs_file_extent_num_bytes(leaf, | ||
449 | extent); | ||
450 | *hint_byte = | ||
451 | btrfs_file_extent_disk_bytenr(leaf, | ||
452 | extent); | ||
453 | if (btrfs_file_extent_disk_bytenr(leaf, | ||
454 | extent)) { | ||
455 | inode_sub_bytes(inode, old_num - | ||
456 | new_num); | ||
457 | } | ||
458 | btrfs_set_file_extent_num_bytes(leaf, | ||
459 | extent, new_num); | ||
460 | btrfs_mark_buffer_dirty(leaf); | ||
461 | } else if (key.offset < inline_limit && | ||
462 | (end > extent_end) && | ||
463 | (inline_limit < extent_end)) { | ||
464 | u32 new_size; | ||
465 | new_size = btrfs_file_extent_calc_inline_size( | ||
466 | inline_limit - key.offset); | ||
467 | inode_sub_bytes(inode, extent_end - | ||
468 | inline_limit); | ||
469 | btrfs_set_file_extent_ram_bytes(leaf, extent, | ||
470 | new_size); | ||
471 | if (!compression && !encryption) { | ||
472 | btrfs_truncate_item(trans, root, path, | ||
473 | new_size, 1); | ||
474 | } | ||
475 | } | 420 | } |
421 | break; | ||
476 | } | 422 | } |
477 | /* delete the entire extent */ | ||
478 | if (!keep) { | ||
479 | if (found_inline) | ||
480 | inode_sub_bytes(inode, extent_end - | ||
481 | key.offset); | ||
482 | ret = btrfs_del_item(trans, root, path); | ||
483 | /* TODO update progress marker and return */ | ||
484 | BUG_ON(ret); | ||
485 | extent = NULL; | ||
486 | btrfs_release_path(root, path); | ||
487 | /* the extent will be freed later */ | ||
488 | } | ||
489 | if (bookend && found_inline && start <= key.offset) { | ||
490 | u32 new_size; | ||
491 | new_size = btrfs_file_extent_calc_inline_size( | ||
492 | extent_end - end); | ||
493 | inode_sub_bytes(inode, end - key.offset); | ||
494 | btrfs_set_file_extent_ram_bytes(leaf, extent, | ||
495 | new_size); | ||
496 | if (!compression && !encryption) | ||
497 | ret = btrfs_truncate_item(trans, root, path, | ||
498 | new_size, 0); | ||
499 | BUG_ON(ret); | ||
500 | } | ||
501 | /* create bookend, splitting the extent in two */ | ||
502 | if (bookend && found_extent) { | ||
503 | struct btrfs_key ins; | ||
504 | ins.objectid = inode->i_ino; | ||
505 | ins.offset = end; | ||
506 | btrfs_set_key_type(&ins, BTRFS_EXTENT_DATA_KEY); | ||
507 | 423 | ||
508 | btrfs_release_path(root, path); | 424 | search_start = extent_end; |
509 | path->leave_spinning = 1; | 425 | /* |
510 | ret = btrfs_insert_empty_item(trans, root, path, &ins, | 426 | * | ---- range to drop ----- | |
511 | sizeof(*extent)); | 427 | * | -------- extent -------- | |
512 | BUG_ON(ret); | 428 | */ |
429 | if (start > key.offset && end >= extent_end) { | ||
430 | BUG_ON(del_nr > 0); | ||
431 | BUG_ON(extent_type == BTRFS_FILE_EXTENT_INLINE); | ||
513 | 432 | ||
514 | leaf = path->nodes[0]; | 433 | btrfs_set_file_extent_num_bytes(leaf, fi, |
515 | extent = btrfs_item_ptr(leaf, path->slots[0], | 434 | start - key.offset); |
516 | struct btrfs_file_extent_item); | 435 | btrfs_mark_buffer_dirty(leaf); |
517 | write_extent_buffer(leaf, &old, | 436 | if (disk_bytenr > 0) { |
518 | (unsigned long)extent, sizeof(old)); | 437 | inode_sub_bytes(inode, extent_end - start); |
519 | 438 | *hint_byte = disk_bytenr; | |
520 | btrfs_set_file_extent_compression(leaf, extent, | 439 | } |
521 | compression); | 440 | if (end == extent_end) |
522 | btrfs_set_file_extent_encryption(leaf, extent, | 441 | break; |
523 | encryption); | ||
524 | btrfs_set_file_extent_other_encoding(leaf, extent, | ||
525 | other_encoding); | ||
526 | btrfs_set_file_extent_offset(leaf, extent, | ||
527 | le64_to_cpu(old.offset) + end - key.offset); | ||
528 | WARN_ON(le64_to_cpu(old.num_bytes) < | ||
529 | (extent_end - end)); | ||
530 | btrfs_set_file_extent_num_bytes(leaf, extent, | ||
531 | extent_end - end); | ||
532 | 442 | ||
533 | /* | 443 | path->slots[0]++; |
534 | * set the ram bytes to the size of the full extent | 444 | goto next_slot; |
535 | * before splitting. This is a worst case flag, | ||
536 | * but its the best we can do because we don't know | ||
537 | * how splitting affects compression | ||
538 | */ | ||
539 | btrfs_set_file_extent_ram_bytes(leaf, extent, | ||
540 | ram_bytes); | ||
541 | btrfs_set_file_extent_type(leaf, extent, found_type); | ||
542 | |||
543 | btrfs_unlock_up_safe(path, 1); | ||
544 | btrfs_mark_buffer_dirty(path->nodes[0]); | ||
545 | btrfs_set_lock_blocking(path->nodes[0]); | ||
546 | |||
547 | path->leave_spinning = 0; | ||
548 | btrfs_release_path(root, path); | ||
549 | if (disk_bytenr != 0) | ||
550 | inode_add_bytes(inode, extent_end - end); | ||
551 | } | 445 | } |
552 | 446 | ||
553 | if (found_extent && !keep) { | 447 | /* |
554 | u64 old_disk_bytenr = le64_to_cpu(old.disk_bytenr); | 448 | * | ---- range to drop ----- | |
449 | * | ------ extent ------ | | ||
450 | */ | ||
451 | if (start <= key.offset && end >= extent_end) { | ||
452 | if (del_nr == 0) { | ||
453 | del_slot = path->slots[0]; | ||
454 | del_nr = 1; | ||
455 | } else { | ||
456 | BUG_ON(del_slot + del_nr != path->slots[0]); | ||
457 | del_nr++; | ||
458 | } | ||
555 | 459 | ||
556 | if (old_disk_bytenr != 0) { | 460 | if (extent_type == BTRFS_FILE_EXTENT_INLINE) { |
557 | inode_sub_bytes(inode, | 461 | inode_sub_bytes(inode, |
558 | le64_to_cpu(old.num_bytes)); | 462 | extent_end - key.offset); |
463 | extent_end = ALIGN(extent_end, | ||
464 | root->sectorsize); | ||
465 | } else if (disk_bytenr > 0) { | ||
559 | ret = btrfs_free_extent(trans, root, | 466 | ret = btrfs_free_extent(trans, root, |
560 | old_disk_bytenr, | 467 | disk_bytenr, num_bytes, 0, |
561 | le64_to_cpu(old.disk_num_bytes), | 468 | root->root_key.objectid, |
562 | 0, root->root_key.objectid, | ||
563 | key.objectid, key.offset - | 469 | key.objectid, key.offset - |
564 | le64_to_cpu(old.offset)); | 470 | extent_offset); |
565 | BUG_ON(ret); | 471 | BUG_ON(ret); |
566 | *hint_byte = old_disk_bytenr; | 472 | inode_sub_bytes(inode, |
473 | extent_end - key.offset); | ||
474 | *hint_byte = disk_bytenr; | ||
567 | } | 475 | } |
568 | } | ||
569 | 476 | ||
570 | if (search_start >= end) { | 477 | if (end == extent_end) |
571 | ret = 0; | 478 | break; |
572 | goto out; | 479 | |
480 | if (path->slots[0] + 1 < btrfs_header_nritems(leaf)) { | ||
481 | path->slots[0]++; | ||
482 | goto next_slot; | ||
483 | } | ||
484 | |||
485 | ret = btrfs_del_items(trans, root, path, del_slot, | ||
486 | del_nr); | ||
487 | BUG_ON(ret); | ||
488 | |||
489 | del_nr = 0; | ||
490 | del_slot = 0; | ||
491 | |||
492 | btrfs_release_path(root, path); | ||
493 | continue; | ||
573 | } | 494 | } |
495 | |||
496 | BUG_ON(1); | ||
574 | } | 497 | } |
575 | out: | 498 | |
576 | btrfs_free_path(path); | 499 | if (del_nr > 0) { |
577 | if (locked_end > orig_locked_end) { | 500 | ret = btrfs_del_items(trans, root, path, del_slot, del_nr); |
578 | unlock_extent(&BTRFS_I(inode)->io_tree, orig_locked_end, | 501 | BUG_ON(ret); |
579 | locked_end - 1, GFP_NOFS); | ||
580 | } | 502 | } |
503 | |||
504 | btrfs_free_path(path); | ||
581 | return ret; | 505 | return ret; |
582 | } | 506 | } |
583 | 507 | ||
@@ -620,23 +544,23 @@ static int extent_mergeable(struct extent_buffer *leaf, int slot, | |||
620 | * two or three. | 544 | * two or three. |
621 | */ | 545 | */ |
622 | int btrfs_mark_extent_written(struct btrfs_trans_handle *trans, | 546 | int btrfs_mark_extent_written(struct btrfs_trans_handle *trans, |
623 | struct btrfs_root *root, | ||
624 | struct inode *inode, u64 start, u64 end) | 547 | struct inode *inode, u64 start, u64 end) |
625 | { | 548 | { |
549 | struct btrfs_root *root = BTRFS_I(inode)->root; | ||
626 | struct extent_buffer *leaf; | 550 | struct extent_buffer *leaf; |
627 | struct btrfs_path *path; | 551 | struct btrfs_path *path; |
628 | struct btrfs_file_extent_item *fi; | 552 | struct btrfs_file_extent_item *fi; |
629 | struct btrfs_key key; | 553 | struct btrfs_key key; |
554 | struct btrfs_key new_key; | ||
630 | u64 bytenr; | 555 | u64 bytenr; |
631 | u64 num_bytes; | 556 | u64 num_bytes; |
632 | u64 extent_end; | 557 | u64 extent_end; |
633 | u64 orig_offset; | 558 | u64 orig_offset; |
634 | u64 other_start; | 559 | u64 other_start; |
635 | u64 other_end; | 560 | u64 other_end; |
636 | u64 split = start; | 561 | u64 split; |
637 | u64 locked_end = end; | 562 | int del_nr = 0; |
638 | int extent_type; | 563 | int del_slot = 0; |
639 | int split_end = 1; | ||
640 | int ret; | 564 | int ret; |
641 | 565 | ||
642 | btrfs_drop_extent_cache(inode, start, end - 1, 0); | 566 | btrfs_drop_extent_cache(inode, start, end - 1, 0); |
@@ -644,12 +568,10 @@ int btrfs_mark_extent_written(struct btrfs_trans_handle *trans, | |||
644 | path = btrfs_alloc_path(); | 568 | path = btrfs_alloc_path(); |
645 | BUG_ON(!path); | 569 | BUG_ON(!path); |
646 | again: | 570 | again: |
571 | split = start; | ||
647 | key.objectid = inode->i_ino; | 572 | key.objectid = inode->i_ino; |
648 | key.type = BTRFS_EXTENT_DATA_KEY; | 573 | key.type = BTRFS_EXTENT_DATA_KEY; |
649 | if (split == start) | 574 | key.offset = split; |
650 | key.offset = split; | ||
651 | else | ||
652 | key.offset = split - 1; | ||
653 | 575 | ||
654 | ret = btrfs_search_slot(trans, root, &key, path, -1, 1); | 576 | ret = btrfs_search_slot(trans, root, &key, path, -1, 1); |
655 | if (ret > 0 && path->slots[0] > 0) | 577 | if (ret > 0 && path->slots[0] > 0) |
@@ -661,8 +583,8 @@ again: | |||
661 | key.type != BTRFS_EXTENT_DATA_KEY); | 583 | key.type != BTRFS_EXTENT_DATA_KEY); |
662 | fi = btrfs_item_ptr(leaf, path->slots[0], | 584 | fi = btrfs_item_ptr(leaf, path->slots[0], |
663 | struct btrfs_file_extent_item); | 585 | struct btrfs_file_extent_item); |
664 | extent_type = btrfs_file_extent_type(leaf, fi); | 586 | BUG_ON(btrfs_file_extent_type(leaf, fi) != |
665 | BUG_ON(extent_type != BTRFS_FILE_EXTENT_PREALLOC); | 587 | BTRFS_FILE_EXTENT_PREALLOC); |
666 | extent_end = key.offset + btrfs_file_extent_num_bytes(leaf, fi); | 588 | extent_end = key.offset + btrfs_file_extent_num_bytes(leaf, fi); |
667 | BUG_ON(key.offset > start || extent_end < end); | 589 | BUG_ON(key.offset > start || extent_end < end); |
668 | 590 | ||
@@ -670,150 +592,91 @@ again: | |||
670 | num_bytes = btrfs_file_extent_disk_num_bytes(leaf, fi); | 592 | num_bytes = btrfs_file_extent_disk_num_bytes(leaf, fi); |
671 | orig_offset = key.offset - btrfs_file_extent_offset(leaf, fi); | 593 | orig_offset = key.offset - btrfs_file_extent_offset(leaf, fi); |
672 | 594 | ||
673 | if (key.offset == start) | 595 | while (start > key.offset || end < extent_end) { |
674 | split = end; | 596 | if (key.offset == start) |
675 | 597 | split = end; | |
676 | if (key.offset == start && extent_end == end) { | 598 | |
677 | int del_nr = 0; | 599 | memcpy(&new_key, &key, sizeof(new_key)); |
678 | int del_slot = 0; | 600 | new_key.offset = split; |
679 | other_start = end; | 601 | ret = btrfs_duplicate_item(trans, root, path, &new_key); |
680 | other_end = 0; | 602 | if (ret == -EAGAIN) { |
681 | if (extent_mergeable(leaf, path->slots[0] + 1, inode->i_ino, | 603 | btrfs_release_path(root, path); |
682 | bytenr, &other_start, &other_end)) { | 604 | goto again; |
683 | extent_end = other_end; | ||
684 | del_slot = path->slots[0] + 1; | ||
685 | del_nr++; | ||
686 | ret = btrfs_free_extent(trans, root, bytenr, num_bytes, | ||
687 | 0, root->root_key.objectid, | ||
688 | inode->i_ino, orig_offset); | ||
689 | BUG_ON(ret); | ||
690 | } | ||
691 | other_start = 0; | ||
692 | other_end = start; | ||
693 | if (extent_mergeable(leaf, path->slots[0] - 1, inode->i_ino, | ||
694 | bytenr, &other_start, &other_end)) { | ||
695 | key.offset = other_start; | ||
696 | del_slot = path->slots[0]; | ||
697 | del_nr++; | ||
698 | ret = btrfs_free_extent(trans, root, bytenr, num_bytes, | ||
699 | 0, root->root_key.objectid, | ||
700 | inode->i_ino, orig_offset); | ||
701 | BUG_ON(ret); | ||
702 | } | ||
703 | split_end = 0; | ||
704 | if (del_nr == 0) { | ||
705 | btrfs_set_file_extent_type(leaf, fi, | ||
706 | BTRFS_FILE_EXTENT_REG); | ||
707 | goto done; | ||
708 | } | 605 | } |
606 | BUG_ON(ret < 0); | ||
709 | 607 | ||
710 | fi = btrfs_item_ptr(leaf, del_slot - 1, | 608 | leaf = path->nodes[0]; |
609 | fi = btrfs_item_ptr(leaf, path->slots[0] - 1, | ||
711 | struct btrfs_file_extent_item); | 610 | struct btrfs_file_extent_item); |
712 | btrfs_set_file_extent_type(leaf, fi, BTRFS_FILE_EXTENT_REG); | ||
713 | btrfs_set_file_extent_num_bytes(leaf, fi, | 611 | btrfs_set_file_extent_num_bytes(leaf, fi, |
714 | extent_end - key.offset); | 612 | split - key.offset); |
613 | |||
614 | fi = btrfs_item_ptr(leaf, path->slots[0], | ||
615 | struct btrfs_file_extent_item); | ||
616 | |||
617 | btrfs_set_file_extent_offset(leaf, fi, split - orig_offset); | ||
618 | btrfs_set_file_extent_num_bytes(leaf, fi, | ||
619 | extent_end - split); | ||
715 | btrfs_mark_buffer_dirty(leaf); | 620 | btrfs_mark_buffer_dirty(leaf); |
716 | 621 | ||
717 | ret = btrfs_del_items(trans, root, path, del_slot, del_nr); | 622 | ret = btrfs_inc_extent_ref(trans, root, bytenr, num_bytes, 0, |
623 | root->root_key.objectid, | ||
624 | inode->i_ino, orig_offset); | ||
718 | BUG_ON(ret); | 625 | BUG_ON(ret); |
719 | goto release; | ||
720 | } else if (split == start) { | ||
721 | if (locked_end < extent_end) { | ||
722 | ret = try_lock_extent(&BTRFS_I(inode)->io_tree, | ||
723 | locked_end, extent_end - 1, GFP_NOFS); | ||
724 | if (!ret) { | ||
725 | btrfs_release_path(root, path); | ||
726 | lock_extent(&BTRFS_I(inode)->io_tree, | ||
727 | locked_end, extent_end - 1, GFP_NOFS); | ||
728 | locked_end = extent_end; | ||
729 | goto again; | ||
730 | } | ||
731 | locked_end = extent_end; | ||
732 | } | ||
733 | btrfs_set_file_extent_num_bytes(leaf, fi, split - key.offset); | ||
734 | } else { | ||
735 | BUG_ON(key.offset != start); | ||
736 | key.offset = split; | ||
737 | btrfs_set_file_extent_offset(leaf, fi, key.offset - | ||
738 | orig_offset); | ||
739 | btrfs_set_file_extent_num_bytes(leaf, fi, extent_end - split); | ||
740 | btrfs_set_item_key_safe(trans, root, path, &key); | ||
741 | extent_end = split; | ||
742 | } | ||
743 | 626 | ||
744 | if (extent_end == end) { | 627 | if (split == start) { |
745 | split_end = 0; | 628 | key.offset = start; |
746 | extent_type = BTRFS_FILE_EXTENT_REG; | 629 | } else { |
747 | } | 630 | BUG_ON(start != key.offset); |
748 | if (extent_end == end && split == start) { | ||
749 | other_start = end; | ||
750 | other_end = 0; | ||
751 | if (extent_mergeable(leaf, path->slots[0] + 1, inode->i_ino, | ||
752 | bytenr, &other_start, &other_end)) { | ||
753 | path->slots[0]++; | ||
754 | fi = btrfs_item_ptr(leaf, path->slots[0], | ||
755 | struct btrfs_file_extent_item); | ||
756 | key.offset = split; | ||
757 | btrfs_set_item_key_safe(trans, root, path, &key); | ||
758 | btrfs_set_file_extent_offset(leaf, fi, key.offset - | ||
759 | orig_offset); | ||
760 | btrfs_set_file_extent_num_bytes(leaf, fi, | ||
761 | other_end - split); | ||
762 | goto done; | ||
763 | } | ||
764 | } | ||
765 | if (extent_end == end && split == end) { | ||
766 | other_start = 0; | ||
767 | other_end = start; | ||
768 | if (extent_mergeable(leaf, path->slots[0] - 1 , inode->i_ino, | ||
769 | bytenr, &other_start, &other_end)) { | ||
770 | path->slots[0]--; | 631 | path->slots[0]--; |
771 | fi = btrfs_item_ptr(leaf, path->slots[0], | 632 | extent_end = end; |
772 | struct btrfs_file_extent_item); | ||
773 | btrfs_set_file_extent_num_bytes(leaf, fi, extent_end - | ||
774 | other_start); | ||
775 | goto done; | ||
776 | } | 633 | } |
777 | } | 634 | } |
778 | 635 | ||
779 | btrfs_mark_buffer_dirty(leaf); | ||
780 | |||
781 | ret = btrfs_inc_extent_ref(trans, root, bytenr, num_bytes, 0, | ||
782 | root->root_key.objectid, | ||
783 | inode->i_ino, orig_offset); | ||
784 | BUG_ON(ret); | ||
785 | btrfs_release_path(root, path); | ||
786 | |||
787 | key.offset = start; | ||
788 | ret = btrfs_insert_empty_item(trans, root, path, &key, sizeof(*fi)); | ||
789 | BUG_ON(ret); | ||
790 | |||
791 | leaf = path->nodes[0]; | ||
792 | fi = btrfs_item_ptr(leaf, path->slots[0], | 636 | fi = btrfs_item_ptr(leaf, path->slots[0], |
793 | struct btrfs_file_extent_item); | 637 | struct btrfs_file_extent_item); |
794 | btrfs_set_file_extent_generation(leaf, fi, trans->transid); | ||
795 | btrfs_set_file_extent_type(leaf, fi, extent_type); | ||
796 | btrfs_set_file_extent_disk_bytenr(leaf, fi, bytenr); | ||
797 | btrfs_set_file_extent_disk_num_bytes(leaf, fi, num_bytes); | ||
798 | btrfs_set_file_extent_offset(leaf, fi, key.offset - orig_offset); | ||
799 | btrfs_set_file_extent_num_bytes(leaf, fi, extent_end - key.offset); | ||
800 | btrfs_set_file_extent_ram_bytes(leaf, fi, num_bytes); | ||
801 | btrfs_set_file_extent_compression(leaf, fi, 0); | ||
802 | btrfs_set_file_extent_encryption(leaf, fi, 0); | ||
803 | btrfs_set_file_extent_other_encoding(leaf, fi, 0); | ||
804 | done: | ||
805 | btrfs_mark_buffer_dirty(leaf); | ||
806 | 638 | ||
807 | release: | 639 | other_start = end; |
808 | btrfs_release_path(root, path); | 640 | other_end = 0; |
809 | if (split_end && split == start) { | 641 | if (extent_mergeable(leaf, path->slots[0] + 1, inode->i_ino, |
810 | split = end; | 642 | bytenr, &other_start, &other_end)) { |
811 | goto again; | 643 | extent_end = other_end; |
644 | del_slot = path->slots[0] + 1; | ||
645 | del_nr++; | ||
646 | ret = btrfs_free_extent(trans, root, bytenr, num_bytes, | ||
647 | 0, root->root_key.objectid, | ||
648 | inode->i_ino, orig_offset); | ||
649 | BUG_ON(ret); | ||
812 | } | 650 | } |
813 | if (locked_end > end) { | 651 | other_start = 0; |
814 | unlock_extent(&BTRFS_I(inode)->io_tree, end, locked_end - 1, | 652 | other_end = start; |
815 | GFP_NOFS); | 653 | if (extent_mergeable(leaf, path->slots[0] - 1, inode->i_ino, |
654 | bytenr, &other_start, &other_end)) { | ||
655 | key.offset = other_start; | ||
656 | del_slot = path->slots[0]; | ||
657 | del_nr++; | ||
658 | ret = btrfs_free_extent(trans, root, bytenr, num_bytes, | ||
659 | 0, root->root_key.objectid, | ||
660 | inode->i_ino, orig_offset); | ||
661 | BUG_ON(ret); | ||
816 | } | 662 | } |
663 | if (del_nr == 0) { | ||
664 | btrfs_set_file_extent_type(leaf, fi, | ||
665 | BTRFS_FILE_EXTENT_REG); | ||
666 | btrfs_mark_buffer_dirty(leaf); | ||
667 | goto out; | ||
668 | } | ||
669 | |||
670 | fi = btrfs_item_ptr(leaf, del_slot - 1, | ||
671 | struct btrfs_file_extent_item); | ||
672 | btrfs_set_file_extent_type(leaf, fi, BTRFS_FILE_EXTENT_REG); | ||
673 | btrfs_set_file_extent_num_bytes(leaf, fi, | ||
674 | extent_end - key.offset); | ||
675 | btrfs_mark_buffer_dirty(leaf); | ||
676 | |||
677 | ret = btrfs_del_items(trans, root, path, del_slot, del_nr); | ||
678 | BUG_ON(ret); | ||
679 | out: | ||
817 | btrfs_free_path(path); | 680 | btrfs_free_path(path); |
818 | return 0; | 681 | return 0; |
819 | } | 682 | } |
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c index b3ad168a0bfc..5440bab23635 100644 --- a/fs/btrfs/inode.c +++ b/fs/btrfs/inode.c | |||
@@ -88,13 +88,14 @@ static noinline int cow_file_range(struct inode *inode, | |||
88 | u64 start, u64 end, int *page_started, | 88 | u64 start, u64 end, int *page_started, |
89 | unsigned long *nr_written, int unlock); | 89 | unsigned long *nr_written, int unlock); |
90 | 90 | ||
91 | static int btrfs_init_inode_security(struct inode *inode, struct inode *dir) | 91 | static int btrfs_init_inode_security(struct btrfs_trans_handle *trans, |
92 | struct inode *inode, struct inode *dir) | ||
92 | { | 93 | { |
93 | int err; | 94 | int err; |
94 | 95 | ||
95 | err = btrfs_init_acl(inode, dir); | 96 | err = btrfs_init_acl(trans, inode, dir); |
96 | if (!err) | 97 | if (!err) |
97 | err = btrfs_xattr_security_init(inode, dir); | 98 | err = btrfs_xattr_security_init(trans, inode, dir); |
98 | return err; | 99 | return err; |
99 | } | 100 | } |
100 | 101 | ||
@@ -188,8 +189,18 @@ static noinline int insert_inline_extent(struct btrfs_trans_handle *trans, | |||
188 | btrfs_mark_buffer_dirty(leaf); | 189 | btrfs_mark_buffer_dirty(leaf); |
189 | btrfs_free_path(path); | 190 | btrfs_free_path(path); |
190 | 191 | ||
192 | /* | ||
193 | * we're an inline extent, so nobody can | ||
194 | * extend the file past i_size without locking | ||
195 | * a page we already have locked. | ||
196 | * | ||
197 | * We must do any isize and inode updates | ||
198 | * before we unlock the pages. Otherwise we | ||
199 | * could end up racing with unlink. | ||
200 | */ | ||
191 | BTRFS_I(inode)->disk_i_size = inode->i_size; | 201 | BTRFS_I(inode)->disk_i_size = inode->i_size; |
192 | btrfs_update_inode(trans, root, inode); | 202 | btrfs_update_inode(trans, root, inode); |
203 | |||
193 | return 0; | 204 | return 0; |
194 | fail: | 205 | fail: |
195 | btrfs_free_path(path); | 206 | btrfs_free_path(path); |
@@ -230,8 +241,7 @@ static noinline int cow_file_range_inline(struct btrfs_trans_handle *trans, | |||
230 | return 1; | 241 | return 1; |
231 | } | 242 | } |
232 | 243 | ||
233 | ret = btrfs_drop_extents(trans, root, inode, start, | 244 | ret = btrfs_drop_extents(trans, inode, start, aligned_end, |
234 | aligned_end, aligned_end, start, | ||
235 | &hint_byte, 1); | 245 | &hint_byte, 1); |
236 | BUG_ON(ret); | 246 | BUG_ON(ret); |
237 | 247 | ||
@@ -416,7 +426,6 @@ again: | |||
416 | start, end, | 426 | start, end, |
417 | total_compressed, pages); | 427 | total_compressed, pages); |
418 | } | 428 | } |
419 | btrfs_end_transaction(trans, root); | ||
420 | if (ret == 0) { | 429 | if (ret == 0) { |
421 | /* | 430 | /* |
422 | * inline extent creation worked, we don't need | 431 | * inline extent creation worked, we don't need |
@@ -430,9 +439,11 @@ again: | |||
430 | EXTENT_CLEAR_DELALLOC | | 439 | EXTENT_CLEAR_DELALLOC | |
431 | EXTENT_CLEAR_ACCOUNTING | | 440 | EXTENT_CLEAR_ACCOUNTING | |
432 | EXTENT_SET_WRITEBACK | EXTENT_END_WRITEBACK); | 441 | EXTENT_SET_WRITEBACK | EXTENT_END_WRITEBACK); |
433 | ret = 0; | 442 | |
443 | btrfs_end_transaction(trans, root); | ||
434 | goto free_pages_out; | 444 | goto free_pages_out; |
435 | } | 445 | } |
446 | btrfs_end_transaction(trans, root); | ||
436 | } | 447 | } |
437 | 448 | ||
438 | if (will_compress) { | 449 | if (will_compress) { |
@@ -543,7 +554,6 @@ static noinline int submit_compressed_extents(struct inode *inode, | |||
543 | if (list_empty(&async_cow->extents)) | 554 | if (list_empty(&async_cow->extents)) |
544 | return 0; | 555 | return 0; |
545 | 556 | ||
546 | trans = btrfs_join_transaction(root, 1); | ||
547 | 557 | ||
548 | while (!list_empty(&async_cow->extents)) { | 558 | while (!list_empty(&async_cow->extents)) { |
549 | async_extent = list_entry(async_cow->extents.next, | 559 | async_extent = list_entry(async_cow->extents.next, |
@@ -590,19 +600,15 @@ retry: | |||
590 | lock_extent(io_tree, async_extent->start, | 600 | lock_extent(io_tree, async_extent->start, |
591 | async_extent->start + async_extent->ram_size - 1, | 601 | async_extent->start + async_extent->ram_size - 1, |
592 | GFP_NOFS); | 602 | GFP_NOFS); |
593 | /* | ||
594 | * here we're doing allocation and writeback of the | ||
595 | * compressed pages | ||
596 | */ | ||
597 | btrfs_drop_extent_cache(inode, async_extent->start, | ||
598 | async_extent->start + | ||
599 | async_extent->ram_size - 1, 0); | ||
600 | 603 | ||
604 | trans = btrfs_join_transaction(root, 1); | ||
601 | ret = btrfs_reserve_extent(trans, root, | 605 | ret = btrfs_reserve_extent(trans, root, |
602 | async_extent->compressed_size, | 606 | async_extent->compressed_size, |
603 | async_extent->compressed_size, | 607 | async_extent->compressed_size, |
604 | 0, alloc_hint, | 608 | 0, alloc_hint, |
605 | (u64)-1, &ins, 1); | 609 | (u64)-1, &ins, 1); |
610 | btrfs_end_transaction(trans, root); | ||
611 | |||
606 | if (ret) { | 612 | if (ret) { |
607 | int i; | 613 | int i; |
608 | for (i = 0; i < async_extent->nr_pages; i++) { | 614 | for (i = 0; i < async_extent->nr_pages; i++) { |
@@ -618,6 +624,14 @@ retry: | |||
618 | goto retry; | 624 | goto retry; |
619 | } | 625 | } |
620 | 626 | ||
627 | /* | ||
628 | * here we're doing allocation and writeback of the | ||
629 | * compressed pages | ||
630 | */ | ||
631 | btrfs_drop_extent_cache(inode, async_extent->start, | ||
632 | async_extent->start + | ||
633 | async_extent->ram_size - 1, 0); | ||
634 | |||
621 | em = alloc_extent_map(GFP_NOFS); | 635 | em = alloc_extent_map(GFP_NOFS); |
622 | em->start = async_extent->start; | 636 | em->start = async_extent->start; |
623 | em->len = async_extent->ram_size; | 637 | em->len = async_extent->ram_size; |
@@ -649,8 +663,6 @@ retry: | |||
649 | BTRFS_ORDERED_COMPRESSED); | 663 | BTRFS_ORDERED_COMPRESSED); |
650 | BUG_ON(ret); | 664 | BUG_ON(ret); |
651 | 665 | ||
652 | btrfs_end_transaction(trans, root); | ||
653 | |||
654 | /* | 666 | /* |
655 | * clear dirty, set writeback and unlock the pages. | 667 | * clear dirty, set writeback and unlock the pages. |
656 | */ | 668 | */ |
@@ -672,13 +684,11 @@ retry: | |||
672 | async_extent->nr_pages); | 684 | async_extent->nr_pages); |
673 | 685 | ||
674 | BUG_ON(ret); | 686 | BUG_ON(ret); |
675 | trans = btrfs_join_transaction(root, 1); | ||
676 | alloc_hint = ins.objectid + ins.offset; | 687 | alloc_hint = ins.objectid + ins.offset; |
677 | kfree(async_extent); | 688 | kfree(async_extent); |
678 | cond_resched(); | 689 | cond_resched(); |
679 | } | 690 | } |
680 | 691 | ||
681 | btrfs_end_transaction(trans, root); | ||
682 | return 0; | 692 | return 0; |
683 | } | 693 | } |
684 | 694 | ||
@@ -742,6 +752,7 @@ static noinline int cow_file_range(struct inode *inode, | |||
742 | EXTENT_CLEAR_DIRTY | | 752 | EXTENT_CLEAR_DIRTY | |
743 | EXTENT_SET_WRITEBACK | | 753 | EXTENT_SET_WRITEBACK | |
744 | EXTENT_END_WRITEBACK); | 754 | EXTENT_END_WRITEBACK); |
755 | |||
745 | *nr_written = *nr_written + | 756 | *nr_written = *nr_written + |
746 | (end - start + PAGE_CACHE_SIZE) / PAGE_CACHE_SIZE; | 757 | (end - start + PAGE_CACHE_SIZE) / PAGE_CACHE_SIZE; |
747 | *page_started = 1; | 758 | *page_started = 1; |
@@ -1596,7 +1607,6 @@ static int insert_reserved_file_extent(struct btrfs_trans_handle *trans, | |||
1596 | struct inode *inode, u64 file_pos, | 1607 | struct inode *inode, u64 file_pos, |
1597 | u64 disk_bytenr, u64 disk_num_bytes, | 1608 | u64 disk_bytenr, u64 disk_num_bytes, |
1598 | u64 num_bytes, u64 ram_bytes, | 1609 | u64 num_bytes, u64 ram_bytes, |
1599 | u64 locked_end, | ||
1600 | u8 compression, u8 encryption, | 1610 | u8 compression, u8 encryption, |
1601 | u16 other_encoding, int extent_type) | 1611 | u16 other_encoding, int extent_type) |
1602 | { | 1612 | { |
@@ -1622,9 +1632,8 @@ static int insert_reserved_file_extent(struct btrfs_trans_handle *trans, | |||
1622 | * the caller is expected to unpin it and allow it to be merged | 1632 | * the caller is expected to unpin it and allow it to be merged |
1623 | * with the others. | 1633 | * with the others. |
1624 | */ | 1634 | */ |
1625 | ret = btrfs_drop_extents(trans, root, inode, file_pos, | 1635 | ret = btrfs_drop_extents(trans, inode, file_pos, file_pos + num_bytes, |
1626 | file_pos + num_bytes, locked_end, | 1636 | &hint, 0); |
1627 | file_pos, &hint, 0); | ||
1628 | BUG_ON(ret); | 1637 | BUG_ON(ret); |
1629 | 1638 | ||
1630 | ins.objectid = inode->i_ino; | 1639 | ins.objectid = inode->i_ino; |
@@ -1730,23 +1739,32 @@ static int btrfs_finish_ordered_io(struct inode *inode, u64 start, u64 end) | |||
1730 | } | 1739 | } |
1731 | } | 1740 | } |
1732 | 1741 | ||
1733 | trans = btrfs_join_transaction(root, 1); | ||
1734 | |||
1735 | if (!ordered_extent) | 1742 | if (!ordered_extent) |
1736 | ordered_extent = btrfs_lookup_ordered_extent(inode, start); | 1743 | ordered_extent = btrfs_lookup_ordered_extent(inode, start); |
1737 | BUG_ON(!ordered_extent); | 1744 | BUG_ON(!ordered_extent); |
1738 | if (test_bit(BTRFS_ORDERED_NOCOW, &ordered_extent->flags)) | 1745 | if (test_bit(BTRFS_ORDERED_NOCOW, &ordered_extent->flags)) { |
1739 | goto nocow; | 1746 | BUG_ON(!list_empty(&ordered_extent->list)); |
1747 | ret = btrfs_ordered_update_i_size(inode, 0, ordered_extent); | ||
1748 | if (!ret) { | ||
1749 | trans = btrfs_join_transaction(root, 1); | ||
1750 | ret = btrfs_update_inode(trans, root, inode); | ||
1751 | BUG_ON(ret); | ||
1752 | btrfs_end_transaction(trans, root); | ||
1753 | } | ||
1754 | goto out; | ||
1755 | } | ||
1740 | 1756 | ||
1741 | lock_extent(io_tree, ordered_extent->file_offset, | 1757 | lock_extent(io_tree, ordered_extent->file_offset, |
1742 | ordered_extent->file_offset + ordered_extent->len - 1, | 1758 | ordered_extent->file_offset + ordered_extent->len - 1, |
1743 | GFP_NOFS); | 1759 | GFP_NOFS); |
1744 | 1760 | ||
1761 | trans = btrfs_join_transaction(root, 1); | ||
1762 | |||
1745 | if (test_bit(BTRFS_ORDERED_COMPRESSED, &ordered_extent->flags)) | 1763 | if (test_bit(BTRFS_ORDERED_COMPRESSED, &ordered_extent->flags)) |
1746 | compressed = 1; | 1764 | compressed = 1; |
1747 | if (test_bit(BTRFS_ORDERED_PREALLOC, &ordered_extent->flags)) { | 1765 | if (test_bit(BTRFS_ORDERED_PREALLOC, &ordered_extent->flags)) { |
1748 | BUG_ON(compressed); | 1766 | BUG_ON(compressed); |
1749 | ret = btrfs_mark_extent_written(trans, root, inode, | 1767 | ret = btrfs_mark_extent_written(trans, inode, |
1750 | ordered_extent->file_offset, | 1768 | ordered_extent->file_offset, |
1751 | ordered_extent->file_offset + | 1769 | ordered_extent->file_offset + |
1752 | ordered_extent->len); | 1770 | ordered_extent->len); |
@@ -1758,8 +1776,6 @@ static int btrfs_finish_ordered_io(struct inode *inode, u64 start, u64 end) | |||
1758 | ordered_extent->disk_len, | 1776 | ordered_extent->disk_len, |
1759 | ordered_extent->len, | 1777 | ordered_extent->len, |
1760 | ordered_extent->len, | 1778 | ordered_extent->len, |
1761 | ordered_extent->file_offset + | ||
1762 | ordered_extent->len, | ||
1763 | compressed, 0, 0, | 1779 | compressed, 0, 0, |
1764 | BTRFS_FILE_EXTENT_REG); | 1780 | BTRFS_FILE_EXTENT_REG); |
1765 | unpin_extent_cache(&BTRFS_I(inode)->extent_tree, | 1781 | unpin_extent_cache(&BTRFS_I(inode)->extent_tree, |
@@ -1770,22 +1786,20 @@ static int btrfs_finish_ordered_io(struct inode *inode, u64 start, u64 end) | |||
1770 | unlock_extent(io_tree, ordered_extent->file_offset, | 1786 | unlock_extent(io_tree, ordered_extent->file_offset, |
1771 | ordered_extent->file_offset + ordered_extent->len - 1, | 1787 | ordered_extent->file_offset + ordered_extent->len - 1, |
1772 | GFP_NOFS); | 1788 | GFP_NOFS); |
1773 | nocow: | ||
1774 | add_pending_csums(trans, inode, ordered_extent->file_offset, | 1789 | add_pending_csums(trans, inode, ordered_extent->file_offset, |
1775 | &ordered_extent->list); | 1790 | &ordered_extent->list); |
1776 | 1791 | ||
1777 | mutex_lock(&BTRFS_I(inode)->extent_mutex); | 1792 | /* this also removes the ordered extent from the tree */ |
1778 | btrfs_ordered_update_i_size(inode, ordered_extent); | 1793 | btrfs_ordered_update_i_size(inode, 0, ordered_extent); |
1779 | btrfs_update_inode(trans, root, inode); | 1794 | ret = btrfs_update_inode(trans, root, inode); |
1780 | btrfs_remove_ordered_extent(inode, ordered_extent); | 1795 | BUG_ON(ret); |
1781 | mutex_unlock(&BTRFS_I(inode)->extent_mutex); | 1796 | btrfs_end_transaction(trans, root); |
1782 | 1797 | out: | |
1783 | /* once for us */ | 1798 | /* once for us */ |
1784 | btrfs_put_ordered_extent(ordered_extent); | 1799 | btrfs_put_ordered_extent(ordered_extent); |
1785 | /* once for the tree */ | 1800 | /* once for the tree */ |
1786 | btrfs_put_ordered_extent(ordered_extent); | 1801 | btrfs_put_ordered_extent(ordered_extent); |
1787 | 1802 | ||
1788 | btrfs_end_transaction(trans, root); | ||
1789 | return 0; | 1803 | return 0; |
1790 | } | 1804 | } |
1791 | 1805 | ||
@@ -2008,6 +2022,54 @@ zeroit: | |||
2008 | return -EIO; | 2022 | return -EIO; |
2009 | } | 2023 | } |
2010 | 2024 | ||
2025 | struct delayed_iput { | ||
2026 | struct list_head list; | ||
2027 | struct inode *inode; | ||
2028 | }; | ||
2029 | |||
2030 | void btrfs_add_delayed_iput(struct inode *inode) | ||
2031 | { | ||
2032 | struct btrfs_fs_info *fs_info = BTRFS_I(inode)->root->fs_info; | ||
2033 | struct delayed_iput *delayed; | ||
2034 | |||
2035 | if (atomic_add_unless(&inode->i_count, -1, 1)) | ||
2036 | return; | ||
2037 | |||
2038 | delayed = kmalloc(sizeof(*delayed), GFP_NOFS | __GFP_NOFAIL); | ||
2039 | delayed->inode = inode; | ||
2040 | |||
2041 | spin_lock(&fs_info->delayed_iput_lock); | ||
2042 | list_add_tail(&delayed->list, &fs_info->delayed_iputs); | ||
2043 | spin_unlock(&fs_info->delayed_iput_lock); | ||
2044 | } | ||
2045 | |||
2046 | void btrfs_run_delayed_iputs(struct btrfs_root *root) | ||
2047 | { | ||
2048 | LIST_HEAD(list); | ||
2049 | struct btrfs_fs_info *fs_info = root->fs_info; | ||
2050 | struct delayed_iput *delayed; | ||
2051 | int empty; | ||
2052 | |||
2053 | spin_lock(&fs_info->delayed_iput_lock); | ||
2054 | empty = list_empty(&fs_info->delayed_iputs); | ||
2055 | spin_unlock(&fs_info->delayed_iput_lock); | ||
2056 | if (empty) | ||
2057 | return; | ||
2058 | |||
2059 | down_read(&root->fs_info->cleanup_work_sem); | ||
2060 | spin_lock(&fs_info->delayed_iput_lock); | ||
2061 | list_splice_init(&fs_info->delayed_iputs, &list); | ||
2062 | spin_unlock(&fs_info->delayed_iput_lock); | ||
2063 | |||
2064 | while (!list_empty(&list)) { | ||
2065 | delayed = list_entry(list.next, struct delayed_iput, list); | ||
2066 | list_del(&delayed->list); | ||
2067 | iput(delayed->inode); | ||
2068 | kfree(delayed); | ||
2069 | } | ||
2070 | up_read(&root->fs_info->cleanup_work_sem); | ||
2071 | } | ||
2072 | |||
2011 | /* | 2073 | /* |
2012 | * This creates an orphan entry for the given inode in case something goes | 2074 | * This creates an orphan entry for the given inode in case something goes |
2013 | * wrong in the middle of an unlink/truncate. | 2075 | * wrong in the middle of an unlink/truncate. |
@@ -2080,16 +2142,17 @@ void btrfs_orphan_cleanup(struct btrfs_root *root) | |||
2080 | struct inode *inode; | 2142 | struct inode *inode; |
2081 | int ret = 0, nr_unlink = 0, nr_truncate = 0; | 2143 | int ret = 0, nr_unlink = 0, nr_truncate = 0; |
2082 | 2144 | ||
2083 | path = btrfs_alloc_path(); | 2145 | if (!xchg(&root->clean_orphans, 0)) |
2084 | if (!path) | ||
2085 | return; | 2146 | return; |
2147 | |||
2148 | path = btrfs_alloc_path(); | ||
2149 | BUG_ON(!path); | ||
2086 | path->reada = -1; | 2150 | path->reada = -1; |
2087 | 2151 | ||
2088 | key.objectid = BTRFS_ORPHAN_OBJECTID; | 2152 | key.objectid = BTRFS_ORPHAN_OBJECTID; |
2089 | btrfs_set_key_type(&key, BTRFS_ORPHAN_ITEM_KEY); | 2153 | btrfs_set_key_type(&key, BTRFS_ORPHAN_ITEM_KEY); |
2090 | key.offset = (u64)-1; | 2154 | key.offset = (u64)-1; |
2091 | 2155 | ||
2092 | |||
2093 | while (1) { | 2156 | while (1) { |
2094 | ret = btrfs_search_slot(NULL, root, &key, path, 0, 0); | 2157 | ret = btrfs_search_slot(NULL, root, &key, path, 0, 0); |
2095 | if (ret < 0) { | 2158 | if (ret < 0) { |
@@ -2834,37 +2897,40 @@ out: | |||
2834 | * min_type is the minimum key type to truncate down to. If set to 0, this | 2897 | * min_type is the minimum key type to truncate down to. If set to 0, this |
2835 | * will kill all the items on this inode, including the INODE_ITEM_KEY. | 2898 | * will kill all the items on this inode, including the INODE_ITEM_KEY. |
2836 | */ | 2899 | */ |
2837 | noinline int btrfs_truncate_inode_items(struct btrfs_trans_handle *trans, | 2900 | int btrfs_truncate_inode_items(struct btrfs_trans_handle *trans, |
2838 | struct btrfs_root *root, | 2901 | struct btrfs_root *root, |
2839 | struct inode *inode, | 2902 | struct inode *inode, |
2840 | u64 new_size, u32 min_type) | 2903 | u64 new_size, u32 min_type) |
2841 | { | 2904 | { |
2842 | int ret; | ||
2843 | struct btrfs_path *path; | 2905 | struct btrfs_path *path; |
2844 | struct btrfs_key key; | ||
2845 | struct btrfs_key found_key; | ||
2846 | u32 found_type = (u8)-1; | ||
2847 | struct extent_buffer *leaf; | 2906 | struct extent_buffer *leaf; |
2848 | struct btrfs_file_extent_item *fi; | 2907 | struct btrfs_file_extent_item *fi; |
2908 | struct btrfs_key key; | ||
2909 | struct btrfs_key found_key; | ||
2849 | u64 extent_start = 0; | 2910 | u64 extent_start = 0; |
2850 | u64 extent_num_bytes = 0; | 2911 | u64 extent_num_bytes = 0; |
2851 | u64 extent_offset = 0; | 2912 | u64 extent_offset = 0; |
2852 | u64 item_end = 0; | 2913 | u64 item_end = 0; |
2914 | u64 mask = root->sectorsize - 1; | ||
2915 | u32 found_type = (u8)-1; | ||
2853 | int found_extent; | 2916 | int found_extent; |
2854 | int del_item; | 2917 | int del_item; |
2855 | int pending_del_nr = 0; | 2918 | int pending_del_nr = 0; |
2856 | int pending_del_slot = 0; | 2919 | int pending_del_slot = 0; |
2857 | int extent_type = -1; | 2920 | int extent_type = -1; |
2858 | int encoding; | 2921 | int encoding; |
2859 | u64 mask = root->sectorsize - 1; | 2922 | int ret; |
2923 | int err = 0; | ||
2924 | |||
2925 | BUG_ON(new_size > 0 && min_type != BTRFS_EXTENT_DATA_KEY); | ||
2860 | 2926 | ||
2861 | if (root->ref_cows) | 2927 | if (root->ref_cows) |
2862 | btrfs_drop_extent_cache(inode, new_size & (~mask), (u64)-1, 0); | 2928 | btrfs_drop_extent_cache(inode, new_size & (~mask), (u64)-1, 0); |
2929 | |||
2863 | path = btrfs_alloc_path(); | 2930 | path = btrfs_alloc_path(); |
2864 | BUG_ON(!path); | 2931 | BUG_ON(!path); |
2865 | path->reada = -1; | 2932 | path->reada = -1; |
2866 | 2933 | ||
2867 | /* FIXME, add redo link to tree so we don't leak on crash */ | ||
2868 | key.objectid = inode->i_ino; | 2934 | key.objectid = inode->i_ino; |
2869 | key.offset = (u64)-1; | 2935 | key.offset = (u64)-1; |
2870 | key.type = (u8)-1; | 2936 | key.type = (u8)-1; |
@@ -2872,17 +2938,17 @@ noinline int btrfs_truncate_inode_items(struct btrfs_trans_handle *trans, | |||
2872 | search_again: | 2938 | search_again: |
2873 | path->leave_spinning = 1; | 2939 | path->leave_spinning = 1; |
2874 | ret = btrfs_search_slot(trans, root, &key, path, -1, 1); | 2940 | ret = btrfs_search_slot(trans, root, &key, path, -1, 1); |
2875 | if (ret < 0) | 2941 | if (ret < 0) { |
2876 | goto error; | 2942 | err = ret; |
2943 | goto out; | ||
2944 | } | ||
2877 | 2945 | ||
2878 | if (ret > 0) { | 2946 | if (ret > 0) { |
2879 | /* there are no items in the tree for us to truncate, we're | 2947 | /* there are no items in the tree for us to truncate, we're |
2880 | * done | 2948 | * done |
2881 | */ | 2949 | */ |
2882 | if (path->slots[0] == 0) { | 2950 | if (path->slots[0] == 0) |
2883 | ret = 0; | 2951 | goto out; |
2884 | goto error; | ||
2885 | } | ||
2886 | path->slots[0]--; | 2952 | path->slots[0]--; |
2887 | } | 2953 | } |
2888 | 2954 | ||
@@ -2917,28 +2983,17 @@ search_again: | |||
2917 | } | 2983 | } |
2918 | item_end--; | 2984 | item_end--; |
2919 | } | 2985 | } |
2920 | if (item_end < new_size) { | 2986 | if (found_type > min_type) { |
2921 | if (found_type == BTRFS_DIR_ITEM_KEY) | 2987 | del_item = 1; |
2922 | found_type = BTRFS_INODE_ITEM_KEY; | 2988 | } else { |
2923 | else if (found_type == BTRFS_EXTENT_ITEM_KEY) | 2989 | if (item_end < new_size) |
2924 | found_type = BTRFS_EXTENT_DATA_KEY; | ||
2925 | else if (found_type == BTRFS_EXTENT_DATA_KEY) | ||
2926 | found_type = BTRFS_XATTR_ITEM_KEY; | ||
2927 | else if (found_type == BTRFS_XATTR_ITEM_KEY) | ||
2928 | found_type = BTRFS_INODE_REF_KEY; | ||
2929 | else if (found_type) | ||
2930 | found_type--; | ||
2931 | else | ||
2932 | break; | 2990 | break; |
2933 | btrfs_set_key_type(&key, found_type); | 2991 | if (found_key.offset >= new_size) |
2934 | goto next; | 2992 | del_item = 1; |
2993 | else | ||
2994 | del_item = 0; | ||
2935 | } | 2995 | } |
2936 | if (found_key.offset >= new_size) | ||
2937 | del_item = 1; | ||
2938 | else | ||
2939 | del_item = 0; | ||
2940 | found_extent = 0; | 2996 | found_extent = 0; |
2941 | |||
2942 | /* FIXME, shrink the extent if the ref count is only 1 */ | 2997 | /* FIXME, shrink the extent if the ref count is only 1 */ |
2943 | if (found_type != BTRFS_EXTENT_DATA_KEY) | 2998 | if (found_type != BTRFS_EXTENT_DATA_KEY) |
2944 | goto delete; | 2999 | goto delete; |
@@ -3025,42 +3080,36 @@ delete: | |||
3025 | inode->i_ino, extent_offset); | 3080 | inode->i_ino, extent_offset); |
3026 | BUG_ON(ret); | 3081 | BUG_ON(ret); |
3027 | } | 3082 | } |
3028 | next: | ||
3029 | if (path->slots[0] == 0) { | ||
3030 | if (pending_del_nr) | ||
3031 | goto del_pending; | ||
3032 | btrfs_release_path(root, path); | ||
3033 | if (found_type == BTRFS_INODE_ITEM_KEY) | ||
3034 | break; | ||
3035 | goto search_again; | ||
3036 | } | ||
3037 | 3083 | ||
3038 | path->slots[0]--; | 3084 | if (found_type == BTRFS_INODE_ITEM_KEY) |
3039 | if (pending_del_nr && | 3085 | break; |
3040 | path->slots[0] + 1 != pending_del_slot) { | 3086 | |
3041 | struct btrfs_key debug; | 3087 | if (path->slots[0] == 0 || |
3042 | del_pending: | 3088 | path->slots[0] != pending_del_slot) { |
3043 | btrfs_item_key_to_cpu(path->nodes[0], &debug, | 3089 | if (root->ref_cows) { |
3044 | pending_del_slot); | 3090 | err = -EAGAIN; |
3045 | ret = btrfs_del_items(trans, root, path, | 3091 | goto out; |
3046 | pending_del_slot, | 3092 | } |
3047 | pending_del_nr); | 3093 | if (pending_del_nr) { |
3048 | BUG_ON(ret); | 3094 | ret = btrfs_del_items(trans, root, path, |
3049 | pending_del_nr = 0; | 3095 | pending_del_slot, |
3096 | pending_del_nr); | ||
3097 | BUG_ON(ret); | ||
3098 | pending_del_nr = 0; | ||
3099 | } | ||
3050 | btrfs_release_path(root, path); | 3100 | btrfs_release_path(root, path); |
3051 | if (found_type == BTRFS_INODE_ITEM_KEY) | ||
3052 | break; | ||
3053 | goto search_again; | 3101 | goto search_again; |
3102 | } else { | ||
3103 | path->slots[0]--; | ||
3054 | } | 3104 | } |
3055 | } | 3105 | } |
3056 | ret = 0; | 3106 | out: |
3057 | error: | ||
3058 | if (pending_del_nr) { | 3107 | if (pending_del_nr) { |
3059 | ret = btrfs_del_items(trans, root, path, pending_del_slot, | 3108 | ret = btrfs_del_items(trans, root, path, pending_del_slot, |
3060 | pending_del_nr); | 3109 | pending_del_nr); |
3061 | } | 3110 | } |
3062 | btrfs_free_path(path); | 3111 | btrfs_free_path(path); |
3063 | return ret; | 3112 | return err; |
3064 | } | 3113 | } |
3065 | 3114 | ||
3066 | /* | 3115 | /* |
@@ -3180,10 +3229,6 @@ int btrfs_cont_expand(struct inode *inode, loff_t size) | |||
3180 | if (size <= hole_start) | 3229 | if (size <= hole_start) |
3181 | return 0; | 3230 | return 0; |
3182 | 3231 | ||
3183 | err = btrfs_truncate_page(inode->i_mapping, inode->i_size); | ||
3184 | if (err) | ||
3185 | return err; | ||
3186 | |||
3187 | while (1) { | 3232 | while (1) { |
3188 | struct btrfs_ordered_extent *ordered; | 3233 | struct btrfs_ordered_extent *ordered; |
3189 | btrfs_wait_ordered_range(inode, hole_start, | 3234 | btrfs_wait_ordered_range(inode, hole_start, |
@@ -3196,9 +3241,6 @@ int btrfs_cont_expand(struct inode *inode, loff_t size) | |||
3196 | btrfs_put_ordered_extent(ordered); | 3241 | btrfs_put_ordered_extent(ordered); |
3197 | } | 3242 | } |
3198 | 3243 | ||
3199 | trans = btrfs_start_transaction(root, 1); | ||
3200 | btrfs_set_trans_block_group(trans, inode); | ||
3201 | |||
3202 | cur_offset = hole_start; | 3244 | cur_offset = hole_start; |
3203 | while (1) { | 3245 | while (1) { |
3204 | em = btrfs_get_extent(inode, NULL, 0, cur_offset, | 3246 | em = btrfs_get_extent(inode, NULL, 0, cur_offset, |
@@ -3206,40 +3248,120 @@ int btrfs_cont_expand(struct inode *inode, loff_t size) | |||
3206 | BUG_ON(IS_ERR(em) || !em); | 3248 | BUG_ON(IS_ERR(em) || !em); |
3207 | last_byte = min(extent_map_end(em), block_end); | 3249 | last_byte = min(extent_map_end(em), block_end); |
3208 | last_byte = (last_byte + mask) & ~mask; | 3250 | last_byte = (last_byte + mask) & ~mask; |
3209 | if (test_bit(EXTENT_FLAG_VACANCY, &em->flags)) { | 3251 | if (!test_bit(EXTENT_FLAG_PREALLOC, &em->flags)) { |
3210 | u64 hint_byte = 0; | 3252 | u64 hint_byte = 0; |
3211 | hole_size = last_byte - cur_offset; | 3253 | hole_size = last_byte - cur_offset; |
3212 | err = btrfs_drop_extents(trans, root, inode, | ||
3213 | cur_offset, | ||
3214 | cur_offset + hole_size, | ||
3215 | block_end, | ||
3216 | cur_offset, &hint_byte, 1); | ||
3217 | if (err) | ||
3218 | break; | ||
3219 | 3254 | ||
3220 | err = btrfs_reserve_metadata_space(root, 1); | 3255 | err = btrfs_reserve_metadata_space(root, 2); |
3221 | if (err) | 3256 | if (err) |
3222 | break; | 3257 | break; |
3223 | 3258 | ||
3259 | trans = btrfs_start_transaction(root, 1); | ||
3260 | btrfs_set_trans_block_group(trans, inode); | ||
3261 | |||
3262 | err = btrfs_drop_extents(trans, inode, cur_offset, | ||
3263 | cur_offset + hole_size, | ||
3264 | &hint_byte, 1); | ||
3265 | BUG_ON(err); | ||
3266 | |||
3224 | err = btrfs_insert_file_extent(trans, root, | 3267 | err = btrfs_insert_file_extent(trans, root, |
3225 | inode->i_ino, cur_offset, 0, | 3268 | inode->i_ino, cur_offset, 0, |
3226 | 0, hole_size, 0, hole_size, | 3269 | 0, hole_size, 0, hole_size, |
3227 | 0, 0, 0); | 3270 | 0, 0, 0); |
3271 | BUG_ON(err); | ||
3272 | |||
3228 | btrfs_drop_extent_cache(inode, hole_start, | 3273 | btrfs_drop_extent_cache(inode, hole_start, |
3229 | last_byte - 1, 0); | 3274 | last_byte - 1, 0); |
3230 | btrfs_unreserve_metadata_space(root, 1); | 3275 | |
3276 | btrfs_end_transaction(trans, root); | ||
3277 | btrfs_unreserve_metadata_space(root, 2); | ||
3231 | } | 3278 | } |
3232 | free_extent_map(em); | 3279 | free_extent_map(em); |
3233 | cur_offset = last_byte; | 3280 | cur_offset = last_byte; |
3234 | if (err || cur_offset >= block_end) | 3281 | if (cur_offset >= block_end) |
3235 | break; | 3282 | break; |
3236 | } | 3283 | } |
3237 | 3284 | ||
3238 | btrfs_end_transaction(trans, root); | ||
3239 | unlock_extent(io_tree, hole_start, block_end - 1, GFP_NOFS); | 3285 | unlock_extent(io_tree, hole_start, block_end - 1, GFP_NOFS); |
3240 | return err; | 3286 | return err; |
3241 | } | 3287 | } |
3242 | 3288 | ||
3289 | static int btrfs_setattr_size(struct inode *inode, struct iattr *attr) | ||
3290 | { | ||
3291 | struct btrfs_root *root = BTRFS_I(inode)->root; | ||
3292 | struct btrfs_trans_handle *trans; | ||
3293 | unsigned long nr; | ||
3294 | int ret; | ||
3295 | |||
3296 | if (attr->ia_size == inode->i_size) | ||
3297 | return 0; | ||
3298 | |||
3299 | if (attr->ia_size > inode->i_size) { | ||
3300 | unsigned long limit; | ||
3301 | limit = current->signal->rlim[RLIMIT_FSIZE].rlim_cur; | ||
3302 | if (attr->ia_size > inode->i_sb->s_maxbytes) | ||
3303 | return -EFBIG; | ||
3304 | if (limit != RLIM_INFINITY && attr->ia_size > limit) { | ||
3305 | send_sig(SIGXFSZ, current, 0); | ||
3306 | return -EFBIG; | ||
3307 | } | ||
3308 | } | ||
3309 | |||
3310 | ret = btrfs_reserve_metadata_space(root, 1); | ||
3311 | if (ret) | ||
3312 | return ret; | ||
3313 | |||
3314 | trans = btrfs_start_transaction(root, 1); | ||
3315 | btrfs_set_trans_block_group(trans, inode); | ||
3316 | |||
3317 | ret = btrfs_orphan_add(trans, inode); | ||
3318 | BUG_ON(ret); | ||
3319 | |||
3320 | nr = trans->blocks_used; | ||
3321 | btrfs_end_transaction(trans, root); | ||
3322 | btrfs_unreserve_metadata_space(root, 1); | ||
3323 | btrfs_btree_balance_dirty(root, nr); | ||
3324 | |||
3325 | if (attr->ia_size > inode->i_size) { | ||
3326 | ret = btrfs_cont_expand(inode, attr->ia_size); | ||
3327 | if (ret) { | ||
3328 | btrfs_truncate(inode); | ||
3329 | return ret; | ||
3330 | } | ||
3331 | |||
3332 | i_size_write(inode, attr->ia_size); | ||
3333 | btrfs_ordered_update_i_size(inode, inode->i_size, NULL); | ||
3334 | |||
3335 | trans = btrfs_start_transaction(root, 1); | ||
3336 | btrfs_set_trans_block_group(trans, inode); | ||
3337 | |||
3338 | ret = btrfs_update_inode(trans, root, inode); | ||
3339 | BUG_ON(ret); | ||
3340 | if (inode->i_nlink > 0) { | ||
3341 | ret = btrfs_orphan_del(trans, inode); | ||
3342 | BUG_ON(ret); | ||
3343 | } | ||
3344 | nr = trans->blocks_used; | ||
3345 | btrfs_end_transaction(trans, root); | ||
3346 | btrfs_btree_balance_dirty(root, nr); | ||
3347 | return 0; | ||
3348 | } | ||
3349 | |||
3350 | /* | ||
3351 | * We're truncating a file that used to have good data down to | ||
3352 | * zero. Make sure it gets into the ordered flush list so that | ||
3353 | * any new writes get down to disk quickly. | ||
3354 | */ | ||
3355 | if (attr->ia_size == 0) | ||
3356 | BTRFS_I(inode)->ordered_data_close = 1; | ||
3357 | |||
3358 | /* we don't support swapfiles, so vmtruncate shouldn't fail */ | ||
3359 | ret = vmtruncate(inode, attr->ia_size); | ||
3360 | BUG_ON(ret); | ||
3361 | |||
3362 | return 0; | ||
3363 | } | ||
3364 | |||
3243 | static int btrfs_setattr(struct dentry *dentry, struct iattr *attr) | 3365 | static int btrfs_setattr(struct dentry *dentry, struct iattr *attr) |
3244 | { | 3366 | { |
3245 | struct inode *inode = dentry->d_inode; | 3367 | struct inode *inode = dentry->d_inode; |
@@ -3250,23 +3372,14 @@ static int btrfs_setattr(struct dentry *dentry, struct iattr *attr) | |||
3250 | return err; | 3372 | return err; |
3251 | 3373 | ||
3252 | if (S_ISREG(inode->i_mode) && (attr->ia_valid & ATTR_SIZE)) { | 3374 | if (S_ISREG(inode->i_mode) && (attr->ia_valid & ATTR_SIZE)) { |
3253 | if (attr->ia_size > inode->i_size) { | 3375 | err = btrfs_setattr_size(inode, attr); |
3254 | err = btrfs_cont_expand(inode, attr->ia_size); | 3376 | if (err) |
3255 | if (err) | 3377 | return err; |
3256 | return err; | ||
3257 | } else if (inode->i_size > 0 && | ||
3258 | attr->ia_size == 0) { | ||
3259 | |||
3260 | /* we're truncating a file that used to have good | ||
3261 | * data down to zero. Make sure it gets into | ||
3262 | * the ordered flush list so that any new writes | ||
3263 | * get down to disk quickly. | ||
3264 | */ | ||
3265 | BTRFS_I(inode)->ordered_data_close = 1; | ||
3266 | } | ||
3267 | } | 3378 | } |
3379 | attr->ia_valid &= ~ATTR_SIZE; | ||
3268 | 3380 | ||
3269 | err = inode_setattr(inode, attr); | 3381 | if (attr->ia_valid) |
3382 | err = inode_setattr(inode, attr); | ||
3270 | 3383 | ||
3271 | if (!err && ((attr->ia_valid & ATTR_MODE))) | 3384 | if (!err && ((attr->ia_valid & ATTR_MODE))) |
3272 | err = btrfs_acl_chmod(inode); | 3385 | err = btrfs_acl_chmod(inode); |
@@ -3287,36 +3400,43 @@ void btrfs_delete_inode(struct inode *inode) | |||
3287 | } | 3400 | } |
3288 | btrfs_wait_ordered_range(inode, 0, (u64)-1); | 3401 | btrfs_wait_ordered_range(inode, 0, (u64)-1); |
3289 | 3402 | ||
3403 | if (root->fs_info->log_root_recovering) { | ||
3404 | BUG_ON(!list_empty(&BTRFS_I(inode)->i_orphan)); | ||
3405 | goto no_delete; | ||
3406 | } | ||
3407 | |||
3290 | if (inode->i_nlink > 0) { | 3408 | if (inode->i_nlink > 0) { |
3291 | BUG_ON(btrfs_root_refs(&root->root_item) != 0); | 3409 | BUG_ON(btrfs_root_refs(&root->root_item) != 0); |
3292 | goto no_delete; | 3410 | goto no_delete; |
3293 | } | 3411 | } |
3294 | 3412 | ||
3295 | btrfs_i_size_write(inode, 0); | 3413 | btrfs_i_size_write(inode, 0); |
3296 | trans = btrfs_join_transaction(root, 1); | ||
3297 | 3414 | ||
3298 | btrfs_set_trans_block_group(trans, inode); | 3415 | while (1) { |
3299 | ret = btrfs_truncate_inode_items(trans, root, inode, inode->i_size, 0); | 3416 | trans = btrfs_start_transaction(root, 1); |
3300 | if (ret) { | 3417 | btrfs_set_trans_block_group(trans, inode); |
3301 | btrfs_orphan_del(NULL, inode); | 3418 | ret = btrfs_truncate_inode_items(trans, root, inode, 0, 0); |
3302 | goto no_delete_lock; | ||
3303 | } | ||
3304 | 3419 | ||
3305 | btrfs_orphan_del(trans, inode); | 3420 | if (ret != -EAGAIN) |
3421 | break; | ||
3306 | 3422 | ||
3307 | nr = trans->blocks_used; | 3423 | nr = trans->blocks_used; |
3308 | clear_inode(inode); | 3424 | btrfs_end_transaction(trans, root); |
3425 | trans = NULL; | ||
3426 | btrfs_btree_balance_dirty(root, nr); | ||
3427 | } | ||
3309 | 3428 | ||
3310 | btrfs_end_transaction(trans, root); | 3429 | if (ret == 0) { |
3311 | btrfs_btree_balance_dirty(root, nr); | 3430 | ret = btrfs_orphan_del(trans, inode); |
3312 | return; | 3431 | BUG_ON(ret); |
3432 | } | ||
3313 | 3433 | ||
3314 | no_delete_lock: | ||
3315 | nr = trans->blocks_used; | 3434 | nr = trans->blocks_used; |
3316 | btrfs_end_transaction(trans, root); | 3435 | btrfs_end_transaction(trans, root); |
3317 | btrfs_btree_balance_dirty(root, nr); | 3436 | btrfs_btree_balance_dirty(root, nr); |
3318 | no_delete: | 3437 | no_delete: |
3319 | clear_inode(inode); | 3438 | clear_inode(inode); |
3439 | return; | ||
3320 | } | 3440 | } |
3321 | 3441 | ||
3322 | /* | 3442 | /* |
@@ -3569,7 +3689,6 @@ static noinline void init_btrfs_i(struct inode *inode) | |||
3569 | INIT_LIST_HEAD(&BTRFS_I(inode)->ordered_operations); | 3689 | INIT_LIST_HEAD(&BTRFS_I(inode)->ordered_operations); |
3570 | RB_CLEAR_NODE(&BTRFS_I(inode)->rb_node); | 3690 | RB_CLEAR_NODE(&BTRFS_I(inode)->rb_node); |
3571 | btrfs_ordered_inode_tree_init(&BTRFS_I(inode)->ordered_tree); | 3691 | btrfs_ordered_inode_tree_init(&BTRFS_I(inode)->ordered_tree); |
3572 | mutex_init(&BTRFS_I(inode)->extent_mutex); | ||
3573 | mutex_init(&BTRFS_I(inode)->log_mutex); | 3692 | mutex_init(&BTRFS_I(inode)->log_mutex); |
3574 | } | 3693 | } |
3575 | 3694 | ||
@@ -3695,6 +3814,13 @@ struct inode *btrfs_lookup_dentry(struct inode *dir, struct dentry *dentry) | |||
3695 | } | 3814 | } |
3696 | srcu_read_unlock(&root->fs_info->subvol_srcu, index); | 3815 | srcu_read_unlock(&root->fs_info->subvol_srcu, index); |
3697 | 3816 | ||
3817 | if (root != sub_root) { | ||
3818 | down_read(&root->fs_info->cleanup_work_sem); | ||
3819 | if (!(inode->i_sb->s_flags & MS_RDONLY)) | ||
3820 | btrfs_orphan_cleanup(sub_root); | ||
3821 | up_read(&root->fs_info->cleanup_work_sem); | ||
3822 | } | ||
3823 | |||
3698 | return inode; | 3824 | return inode; |
3699 | } | 3825 | } |
3700 | 3826 | ||
@@ -4219,7 +4345,7 @@ static int btrfs_mknod(struct inode *dir, struct dentry *dentry, | |||
4219 | if (IS_ERR(inode)) | 4345 | if (IS_ERR(inode)) |
4220 | goto out_unlock; | 4346 | goto out_unlock; |
4221 | 4347 | ||
4222 | err = btrfs_init_inode_security(inode, dir); | 4348 | err = btrfs_init_inode_security(trans, inode, dir); |
4223 | if (err) { | 4349 | if (err) { |
4224 | drop_inode = 1; | 4350 | drop_inode = 1; |
4225 | goto out_unlock; | 4351 | goto out_unlock; |
@@ -4290,7 +4416,7 @@ static int btrfs_create(struct inode *dir, struct dentry *dentry, | |||
4290 | if (IS_ERR(inode)) | 4416 | if (IS_ERR(inode)) |
4291 | goto out_unlock; | 4417 | goto out_unlock; |
4292 | 4418 | ||
4293 | err = btrfs_init_inode_security(inode, dir); | 4419 | err = btrfs_init_inode_security(trans, inode, dir); |
4294 | if (err) { | 4420 | if (err) { |
4295 | drop_inode = 1; | 4421 | drop_inode = 1; |
4296 | goto out_unlock; | 4422 | goto out_unlock; |
@@ -4336,6 +4462,10 @@ static int btrfs_link(struct dentry *old_dentry, struct inode *dir, | |||
4336 | if (inode->i_nlink == 0) | 4462 | if (inode->i_nlink == 0) |
4337 | return -ENOENT; | 4463 | return -ENOENT; |
4338 | 4464 | ||
4465 | /* do not allow sys_link's with other subvols of the same device */ | ||
4466 | if (root->objectid != BTRFS_I(inode)->root->objectid) | ||
4467 | return -EPERM; | ||
4468 | |||
4339 | /* | 4469 | /* |
4340 | * 1 item for inode ref | 4470 | * 1 item for inode ref |
4341 | * 2 items for dir items | 4471 | * 2 items for dir items |
@@ -4423,7 +4553,7 @@ static int btrfs_mkdir(struct inode *dir, struct dentry *dentry, int mode) | |||
4423 | 4553 | ||
4424 | drop_on_err = 1; | 4554 | drop_on_err = 1; |
4425 | 4555 | ||
4426 | err = btrfs_init_inode_security(inode, dir); | 4556 | err = btrfs_init_inode_security(trans, inode, dir); |
4427 | if (err) | 4557 | if (err) |
4428 | goto out_fail; | 4558 | goto out_fail; |
4429 | 4559 | ||
@@ -5074,17 +5204,20 @@ static void btrfs_truncate(struct inode *inode) | |||
5074 | unsigned long nr; | 5204 | unsigned long nr; |
5075 | u64 mask = root->sectorsize - 1; | 5205 | u64 mask = root->sectorsize - 1; |
5076 | 5206 | ||
5077 | if (!S_ISREG(inode->i_mode)) | 5207 | if (!S_ISREG(inode->i_mode)) { |
5078 | return; | 5208 | WARN_ON(1); |
5079 | if (IS_APPEND(inode) || IS_IMMUTABLE(inode)) | ||
5080 | return; | 5209 | return; |
5210 | } | ||
5081 | 5211 | ||
5082 | ret = btrfs_truncate_page(inode->i_mapping, inode->i_size); | 5212 | ret = btrfs_truncate_page(inode->i_mapping, inode->i_size); |
5083 | if (ret) | 5213 | if (ret) |
5084 | return; | 5214 | return; |
5215 | |||
5085 | btrfs_wait_ordered_range(inode, inode->i_size & (~mask), (u64)-1); | 5216 | btrfs_wait_ordered_range(inode, inode->i_size & (~mask), (u64)-1); |
5217 | btrfs_ordered_update_i_size(inode, inode->i_size, NULL); | ||
5086 | 5218 | ||
5087 | trans = btrfs_start_transaction(root, 1); | 5219 | trans = btrfs_start_transaction(root, 1); |
5220 | btrfs_set_trans_block_group(trans, inode); | ||
5088 | 5221 | ||
5089 | /* | 5222 | /* |
5090 | * setattr is responsible for setting the ordered_data_close flag, | 5223 | * setattr is responsible for setting the ordered_data_close flag, |
@@ -5106,21 +5239,32 @@ static void btrfs_truncate(struct inode *inode) | |||
5106 | if (inode->i_size == 0 && BTRFS_I(inode)->ordered_data_close) | 5239 | if (inode->i_size == 0 && BTRFS_I(inode)->ordered_data_close) |
5107 | btrfs_add_ordered_operation(trans, root, inode); | 5240 | btrfs_add_ordered_operation(trans, root, inode); |
5108 | 5241 | ||
5109 | btrfs_set_trans_block_group(trans, inode); | 5242 | while (1) { |
5110 | btrfs_i_size_write(inode, inode->i_size); | 5243 | ret = btrfs_truncate_inode_items(trans, root, inode, |
5244 | inode->i_size, | ||
5245 | BTRFS_EXTENT_DATA_KEY); | ||
5246 | if (ret != -EAGAIN) | ||
5247 | break; | ||
5111 | 5248 | ||
5112 | ret = btrfs_orphan_add(trans, inode); | 5249 | ret = btrfs_update_inode(trans, root, inode); |
5113 | if (ret) | 5250 | BUG_ON(ret); |
5114 | goto out; | 5251 | |
5115 | /* FIXME, add redo link to tree so we don't leak on crash */ | 5252 | nr = trans->blocks_used; |
5116 | ret = btrfs_truncate_inode_items(trans, root, inode, inode->i_size, | 5253 | btrfs_end_transaction(trans, root); |
5117 | BTRFS_EXTENT_DATA_KEY); | 5254 | btrfs_btree_balance_dirty(root, nr); |
5118 | btrfs_update_inode(trans, root, inode); | 5255 | |
5256 | trans = btrfs_start_transaction(root, 1); | ||
5257 | btrfs_set_trans_block_group(trans, inode); | ||
5258 | } | ||
5119 | 5259 | ||
5120 | ret = btrfs_orphan_del(trans, inode); | 5260 | if (ret == 0 && inode->i_nlink > 0) { |
5261 | ret = btrfs_orphan_del(trans, inode); | ||
5262 | BUG_ON(ret); | ||
5263 | } | ||
5264 | |||
5265 | ret = btrfs_update_inode(trans, root, inode); | ||
5121 | BUG_ON(ret); | 5266 | BUG_ON(ret); |
5122 | 5267 | ||
5123 | out: | ||
5124 | nr = trans->blocks_used; | 5268 | nr = trans->blocks_used; |
5125 | ret = btrfs_end_transaction_throttle(trans, root); | 5269 | ret = btrfs_end_transaction_throttle(trans, root); |
5126 | BUG_ON(ret); | 5270 | BUG_ON(ret); |
@@ -5217,9 +5361,9 @@ void btrfs_destroy_inode(struct inode *inode) | |||
5217 | 5361 | ||
5218 | spin_lock(&root->list_lock); | 5362 | spin_lock(&root->list_lock); |
5219 | if (!list_empty(&BTRFS_I(inode)->i_orphan)) { | 5363 | if (!list_empty(&BTRFS_I(inode)->i_orphan)) { |
5220 | printk(KERN_ERR "BTRFS: inode %lu: inode still on the orphan" | 5364 | printk(KERN_INFO "BTRFS: inode %lu still on the orphan list\n", |
5221 | " list\n", inode->i_ino); | 5365 | inode->i_ino); |
5222 | dump_stack(); | 5366 | list_del_init(&BTRFS_I(inode)->i_orphan); |
5223 | } | 5367 | } |
5224 | spin_unlock(&root->list_lock); | 5368 | spin_unlock(&root->list_lock); |
5225 | 5369 | ||
@@ -5476,7 +5620,7 @@ out_fail: | |||
5476 | * some fairly slow code that needs optimization. This walks the list | 5620 | * some fairly slow code that needs optimization. This walks the list |
5477 | * of all the inodes with pending delalloc and forces them to disk. | 5621 | * of all the inodes with pending delalloc and forces them to disk. |
5478 | */ | 5622 | */ |
5479 | int btrfs_start_delalloc_inodes(struct btrfs_root *root) | 5623 | int btrfs_start_delalloc_inodes(struct btrfs_root *root, int delay_iput) |
5480 | { | 5624 | { |
5481 | struct list_head *head = &root->fs_info->delalloc_inodes; | 5625 | struct list_head *head = &root->fs_info->delalloc_inodes; |
5482 | struct btrfs_inode *binode; | 5626 | struct btrfs_inode *binode; |
@@ -5495,7 +5639,10 @@ int btrfs_start_delalloc_inodes(struct btrfs_root *root) | |||
5495 | spin_unlock(&root->fs_info->delalloc_lock); | 5639 | spin_unlock(&root->fs_info->delalloc_lock); |
5496 | if (inode) { | 5640 | if (inode) { |
5497 | filemap_flush(inode->i_mapping); | 5641 | filemap_flush(inode->i_mapping); |
5498 | iput(inode); | 5642 | if (delay_iput) |
5643 | btrfs_add_delayed_iput(inode); | ||
5644 | else | ||
5645 | iput(inode); | ||
5499 | } | 5646 | } |
5500 | cond_resched(); | 5647 | cond_resched(); |
5501 | spin_lock(&root->fs_info->delalloc_lock); | 5648 | spin_lock(&root->fs_info->delalloc_lock); |
@@ -5569,7 +5716,7 @@ static int btrfs_symlink(struct inode *dir, struct dentry *dentry, | |||
5569 | if (IS_ERR(inode)) | 5716 | if (IS_ERR(inode)) |
5570 | goto out_unlock; | 5717 | goto out_unlock; |
5571 | 5718 | ||
5572 | err = btrfs_init_inode_security(inode, dir); | 5719 | err = btrfs_init_inode_security(trans, inode, dir); |
5573 | if (err) { | 5720 | if (err) { |
5574 | drop_inode = 1; | 5721 | drop_inode = 1; |
5575 | goto out_unlock; | 5722 | goto out_unlock; |
@@ -5641,10 +5788,10 @@ out_fail: | |||
5641 | return err; | 5788 | return err; |
5642 | } | 5789 | } |
5643 | 5790 | ||
5644 | static int prealloc_file_range(struct btrfs_trans_handle *trans, | 5791 | static int prealloc_file_range(struct inode *inode, u64 start, u64 end, |
5645 | struct inode *inode, u64 start, u64 end, | 5792 | u64 alloc_hint, int mode) |
5646 | u64 locked_end, u64 alloc_hint, int mode) | ||
5647 | { | 5793 | { |
5794 | struct btrfs_trans_handle *trans; | ||
5648 | struct btrfs_root *root = BTRFS_I(inode)->root; | 5795 | struct btrfs_root *root = BTRFS_I(inode)->root; |
5649 | struct btrfs_key ins; | 5796 | struct btrfs_key ins; |
5650 | u64 alloc_size; | 5797 | u64 alloc_size; |
@@ -5655,43 +5802,56 @@ static int prealloc_file_range(struct btrfs_trans_handle *trans, | |||
5655 | while (num_bytes > 0) { | 5802 | while (num_bytes > 0) { |
5656 | alloc_size = min(num_bytes, root->fs_info->max_extent); | 5803 | alloc_size = min(num_bytes, root->fs_info->max_extent); |
5657 | 5804 | ||
5658 | ret = btrfs_reserve_metadata_space(root, 1); | 5805 | trans = btrfs_start_transaction(root, 1); |
5659 | if (ret) | ||
5660 | goto out; | ||
5661 | 5806 | ||
5662 | ret = btrfs_reserve_extent(trans, root, alloc_size, | 5807 | ret = btrfs_reserve_extent(trans, root, alloc_size, |
5663 | root->sectorsize, 0, alloc_hint, | 5808 | root->sectorsize, 0, alloc_hint, |
5664 | (u64)-1, &ins, 1); | 5809 | (u64)-1, &ins, 1); |
5665 | if (ret) { | 5810 | if (ret) { |
5666 | WARN_ON(1); | 5811 | WARN_ON(1); |
5667 | goto out; | 5812 | goto stop_trans; |
5813 | } | ||
5814 | |||
5815 | ret = btrfs_reserve_metadata_space(root, 3); | ||
5816 | if (ret) { | ||
5817 | btrfs_free_reserved_extent(root, ins.objectid, | ||
5818 | ins.offset); | ||
5819 | goto stop_trans; | ||
5668 | } | 5820 | } |
5821 | |||
5669 | ret = insert_reserved_file_extent(trans, inode, | 5822 | ret = insert_reserved_file_extent(trans, inode, |
5670 | cur_offset, ins.objectid, | 5823 | cur_offset, ins.objectid, |
5671 | ins.offset, ins.offset, | 5824 | ins.offset, ins.offset, |
5672 | ins.offset, locked_end, | 5825 | ins.offset, 0, 0, 0, |
5673 | 0, 0, 0, | ||
5674 | BTRFS_FILE_EXTENT_PREALLOC); | 5826 | BTRFS_FILE_EXTENT_PREALLOC); |
5675 | BUG_ON(ret); | 5827 | BUG_ON(ret); |
5676 | btrfs_drop_extent_cache(inode, cur_offset, | 5828 | btrfs_drop_extent_cache(inode, cur_offset, |
5677 | cur_offset + ins.offset -1, 0); | 5829 | cur_offset + ins.offset -1, 0); |
5830 | |||
5678 | num_bytes -= ins.offset; | 5831 | num_bytes -= ins.offset; |
5679 | cur_offset += ins.offset; | 5832 | cur_offset += ins.offset; |
5680 | alloc_hint = ins.objectid + ins.offset; | 5833 | alloc_hint = ins.objectid + ins.offset; |
5681 | btrfs_unreserve_metadata_space(root, 1); | 5834 | |
5682 | } | ||
5683 | out: | ||
5684 | if (cur_offset > start) { | ||
5685 | inode->i_ctime = CURRENT_TIME; | 5835 | inode->i_ctime = CURRENT_TIME; |
5686 | BTRFS_I(inode)->flags |= BTRFS_INODE_PREALLOC; | 5836 | BTRFS_I(inode)->flags |= BTRFS_INODE_PREALLOC; |
5687 | if (!(mode & FALLOC_FL_KEEP_SIZE) && | 5837 | if (!(mode & FALLOC_FL_KEEP_SIZE) && |
5688 | cur_offset > i_size_read(inode)) | 5838 | cur_offset > inode->i_size) { |
5689 | btrfs_i_size_write(inode, cur_offset); | 5839 | i_size_write(inode, cur_offset); |
5840 | btrfs_ordered_update_i_size(inode, cur_offset, NULL); | ||
5841 | } | ||
5842 | |||
5690 | ret = btrfs_update_inode(trans, root, inode); | 5843 | ret = btrfs_update_inode(trans, root, inode); |
5691 | BUG_ON(ret); | 5844 | BUG_ON(ret); |
5845 | |||
5846 | btrfs_end_transaction(trans, root); | ||
5847 | btrfs_unreserve_metadata_space(root, 3); | ||
5692 | } | 5848 | } |
5849 | return ret; | ||
5693 | 5850 | ||
5851 | stop_trans: | ||
5852 | btrfs_end_transaction(trans, root); | ||
5694 | return ret; | 5853 | return ret; |
5854 | |||
5695 | } | 5855 | } |
5696 | 5856 | ||
5697 | static long btrfs_fallocate(struct inode *inode, int mode, | 5857 | static long btrfs_fallocate(struct inode *inode, int mode, |
@@ -5705,8 +5865,6 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5705 | u64 locked_end; | 5865 | u64 locked_end; |
5706 | u64 mask = BTRFS_I(inode)->root->sectorsize - 1; | 5866 | u64 mask = BTRFS_I(inode)->root->sectorsize - 1; |
5707 | struct extent_map *em; | 5867 | struct extent_map *em; |
5708 | struct btrfs_trans_handle *trans; | ||
5709 | struct btrfs_root *root; | ||
5710 | int ret; | 5868 | int ret; |
5711 | 5869 | ||
5712 | alloc_start = offset & ~mask; | 5870 | alloc_start = offset & ~mask; |
@@ -5725,9 +5883,7 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5725 | goto out; | 5883 | goto out; |
5726 | } | 5884 | } |
5727 | 5885 | ||
5728 | root = BTRFS_I(inode)->root; | 5886 | ret = btrfs_check_data_free_space(BTRFS_I(inode)->root, inode, |
5729 | |||
5730 | ret = btrfs_check_data_free_space(root, inode, | ||
5731 | alloc_end - alloc_start); | 5887 | alloc_end - alloc_start); |
5732 | if (ret) | 5888 | if (ret) |
5733 | goto out; | 5889 | goto out; |
@@ -5736,12 +5892,6 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5736 | while (1) { | 5892 | while (1) { |
5737 | struct btrfs_ordered_extent *ordered; | 5893 | struct btrfs_ordered_extent *ordered; |
5738 | 5894 | ||
5739 | trans = btrfs_start_transaction(BTRFS_I(inode)->root, 1); | ||
5740 | if (!trans) { | ||
5741 | ret = -EIO; | ||
5742 | goto out_free; | ||
5743 | } | ||
5744 | |||
5745 | /* the extent lock is ordered inside the running | 5895 | /* the extent lock is ordered inside the running |
5746 | * transaction | 5896 | * transaction |
5747 | */ | 5897 | */ |
@@ -5755,8 +5905,6 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5755 | btrfs_put_ordered_extent(ordered); | 5905 | btrfs_put_ordered_extent(ordered); |
5756 | unlock_extent(&BTRFS_I(inode)->io_tree, | 5906 | unlock_extent(&BTRFS_I(inode)->io_tree, |
5757 | alloc_start, locked_end, GFP_NOFS); | 5907 | alloc_start, locked_end, GFP_NOFS); |
5758 | btrfs_end_transaction(trans, BTRFS_I(inode)->root); | ||
5759 | |||
5760 | /* | 5908 | /* |
5761 | * we can't wait on the range with the transaction | 5909 | * we can't wait on the range with the transaction |
5762 | * running or with the extent lock held | 5910 | * running or with the extent lock held |
@@ -5777,10 +5925,12 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5777 | BUG_ON(IS_ERR(em) || !em); | 5925 | BUG_ON(IS_ERR(em) || !em); |
5778 | last_byte = min(extent_map_end(em), alloc_end); | 5926 | last_byte = min(extent_map_end(em), alloc_end); |
5779 | last_byte = (last_byte + mask) & ~mask; | 5927 | last_byte = (last_byte + mask) & ~mask; |
5780 | if (em->block_start == EXTENT_MAP_HOLE) { | 5928 | if (em->block_start == EXTENT_MAP_HOLE || |
5781 | ret = prealloc_file_range(trans, inode, cur_offset, | 5929 | (cur_offset >= inode->i_size && |
5782 | last_byte, locked_end + 1, | 5930 | !test_bit(EXTENT_FLAG_PREALLOC, &em->flags))) { |
5783 | alloc_hint, mode); | 5931 | ret = prealloc_file_range(inode, |
5932 | cur_offset, last_byte, | ||
5933 | alloc_hint, mode); | ||
5784 | if (ret < 0) { | 5934 | if (ret < 0) { |
5785 | free_extent_map(em); | 5935 | free_extent_map(em); |
5786 | break; | 5936 | break; |
@@ -5799,9 +5949,8 @@ static long btrfs_fallocate(struct inode *inode, int mode, | |||
5799 | unlock_extent(&BTRFS_I(inode)->io_tree, alloc_start, locked_end, | 5949 | unlock_extent(&BTRFS_I(inode)->io_tree, alloc_start, locked_end, |
5800 | GFP_NOFS); | 5950 | GFP_NOFS); |
5801 | 5951 | ||
5802 | btrfs_end_transaction(trans, BTRFS_I(inode)->root); | 5952 | btrfs_free_reserved_data_space(BTRFS_I(inode)->root, inode, |
5803 | out_free: | 5953 | alloc_end - alloc_start); |
5804 | btrfs_free_reserved_data_space(root, inode, alloc_end - alloc_start); | ||
5805 | out: | 5954 | out: |
5806 | mutex_unlock(&inode->i_mutex); | 5955 | mutex_unlock(&inode->i_mutex); |
5807 | return ret; | 5956 | return ret; |
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c index cdbb054102b9..645a17927a8f 100644 --- a/fs/btrfs/ioctl.c +++ b/fs/btrfs/ioctl.c | |||
@@ -237,7 +237,6 @@ static noinline int create_subvol(struct btrfs_root *root, | |||
237 | u64 objectid; | 237 | u64 objectid; |
238 | u64 new_dirid = BTRFS_FIRST_FREE_OBJECTID; | 238 | u64 new_dirid = BTRFS_FIRST_FREE_OBJECTID; |
239 | u64 index = 0; | 239 | u64 index = 0; |
240 | unsigned long nr = 1; | ||
241 | 240 | ||
242 | /* | 241 | /* |
243 | * 1 - inode item | 242 | * 1 - inode item |
@@ -290,7 +289,7 @@ static noinline int create_subvol(struct btrfs_root *root, | |||
290 | btrfs_set_root_generation(&root_item, trans->transid); | 289 | btrfs_set_root_generation(&root_item, trans->transid); |
291 | btrfs_set_root_level(&root_item, 0); | 290 | btrfs_set_root_level(&root_item, 0); |
292 | btrfs_set_root_refs(&root_item, 1); | 291 | btrfs_set_root_refs(&root_item, 1); |
293 | btrfs_set_root_used(&root_item, 0); | 292 | btrfs_set_root_used(&root_item, leaf->len); |
294 | btrfs_set_root_last_snapshot(&root_item, 0); | 293 | btrfs_set_root_last_snapshot(&root_item, 0); |
295 | 294 | ||
296 | memset(&root_item.drop_progress, 0, sizeof(root_item.drop_progress)); | 295 | memset(&root_item.drop_progress, 0, sizeof(root_item.drop_progress)); |
@@ -342,24 +341,21 @@ static noinline int create_subvol(struct btrfs_root *root, | |||
342 | 341 | ||
343 | d_instantiate(dentry, btrfs_lookup_dentry(dir, dentry)); | 342 | d_instantiate(dentry, btrfs_lookup_dentry(dir, dentry)); |
344 | fail: | 343 | fail: |
345 | nr = trans->blocks_used; | ||
346 | err = btrfs_commit_transaction(trans, root); | 344 | err = btrfs_commit_transaction(trans, root); |
347 | if (err && !ret) | 345 | if (err && !ret) |
348 | ret = err; | 346 | ret = err; |
349 | 347 | ||
350 | btrfs_unreserve_metadata_space(root, 6); | 348 | btrfs_unreserve_metadata_space(root, 6); |
351 | btrfs_btree_balance_dirty(root, nr); | ||
352 | return ret; | 349 | return ret; |
353 | } | 350 | } |
354 | 351 | ||
355 | static int create_snapshot(struct btrfs_root *root, struct dentry *dentry, | 352 | static int create_snapshot(struct btrfs_root *root, struct dentry *dentry, |
356 | char *name, int namelen) | 353 | char *name, int namelen) |
357 | { | 354 | { |
355 | struct inode *inode; | ||
358 | struct btrfs_pending_snapshot *pending_snapshot; | 356 | struct btrfs_pending_snapshot *pending_snapshot; |
359 | struct btrfs_trans_handle *trans; | 357 | struct btrfs_trans_handle *trans; |
360 | int ret = 0; | 358 | int ret; |
361 | int err; | ||
362 | unsigned long nr = 0; | ||
363 | 359 | ||
364 | if (!root->ref_cows) | 360 | if (!root->ref_cows) |
365 | return -EINVAL; | 361 | return -EINVAL; |
@@ -372,20 +368,20 @@ static int create_snapshot(struct btrfs_root *root, struct dentry *dentry, | |||
372 | */ | 368 | */ |
373 | ret = btrfs_reserve_metadata_space(root, 6); | 369 | ret = btrfs_reserve_metadata_space(root, 6); |
374 | if (ret) | 370 | if (ret) |
375 | goto fail_unlock; | 371 | goto fail; |
376 | 372 | ||
377 | pending_snapshot = kzalloc(sizeof(*pending_snapshot), GFP_NOFS); | 373 | pending_snapshot = kzalloc(sizeof(*pending_snapshot), GFP_NOFS); |
378 | if (!pending_snapshot) { | 374 | if (!pending_snapshot) { |
379 | ret = -ENOMEM; | 375 | ret = -ENOMEM; |
380 | btrfs_unreserve_metadata_space(root, 6); | 376 | btrfs_unreserve_metadata_space(root, 6); |
381 | goto fail_unlock; | 377 | goto fail; |
382 | } | 378 | } |
383 | pending_snapshot->name = kmalloc(namelen + 1, GFP_NOFS); | 379 | pending_snapshot->name = kmalloc(namelen + 1, GFP_NOFS); |
384 | if (!pending_snapshot->name) { | 380 | if (!pending_snapshot->name) { |
385 | ret = -ENOMEM; | 381 | ret = -ENOMEM; |
386 | kfree(pending_snapshot); | 382 | kfree(pending_snapshot); |
387 | btrfs_unreserve_metadata_space(root, 6); | 383 | btrfs_unreserve_metadata_space(root, 6); |
388 | goto fail_unlock; | 384 | goto fail; |
389 | } | 385 | } |
390 | memcpy(pending_snapshot->name, name, namelen); | 386 | memcpy(pending_snapshot->name, name, namelen); |
391 | pending_snapshot->name[namelen] = '\0'; | 387 | pending_snapshot->name[namelen] = '\0'; |
@@ -395,10 +391,19 @@ static int create_snapshot(struct btrfs_root *root, struct dentry *dentry, | |||
395 | pending_snapshot->root = root; | 391 | pending_snapshot->root = root; |
396 | list_add(&pending_snapshot->list, | 392 | list_add(&pending_snapshot->list, |
397 | &trans->transaction->pending_snapshots); | 393 | &trans->transaction->pending_snapshots); |
398 | err = btrfs_commit_transaction(trans, root); | 394 | ret = btrfs_commit_transaction(trans, root); |
395 | BUG_ON(ret); | ||
396 | btrfs_unreserve_metadata_space(root, 6); | ||
399 | 397 | ||
400 | fail_unlock: | 398 | inode = btrfs_lookup_dentry(dentry->d_parent->d_inode, dentry); |
401 | btrfs_btree_balance_dirty(root, nr); | 399 | if (IS_ERR(inode)) { |
400 | ret = PTR_ERR(inode); | ||
401 | goto fail; | ||
402 | } | ||
403 | BUG_ON(!inode); | ||
404 | d_instantiate(dentry, inode); | ||
405 | ret = 0; | ||
406 | fail: | ||
402 | return ret; | 407 | return ret; |
403 | } | 408 | } |
404 | 409 | ||
@@ -1027,8 +1032,7 @@ static noinline long btrfs_ioctl_clone(struct file *file, unsigned long srcfd, | |||
1027 | BUG_ON(!trans); | 1032 | BUG_ON(!trans); |
1028 | 1033 | ||
1029 | /* punch hole in destination first */ | 1034 | /* punch hole in destination first */ |
1030 | btrfs_drop_extents(trans, root, inode, off, off + len, | 1035 | btrfs_drop_extents(trans, inode, off, off + len, &hint_byte, 1); |
1031 | off + len, 0, &hint_byte, 1); | ||
1032 | 1036 | ||
1033 | /* clone data */ | 1037 | /* clone data */ |
1034 | key.objectid = src->i_ino; | 1038 | key.objectid = src->i_ino; |
diff --git a/fs/btrfs/ordered-data.c b/fs/btrfs/ordered-data.c index 5799bc46a309..b10a49d4bc6a 100644 --- a/fs/btrfs/ordered-data.c +++ b/fs/btrfs/ordered-data.c | |||
@@ -291,16 +291,16 @@ int btrfs_put_ordered_extent(struct btrfs_ordered_extent *entry) | |||
291 | 291 | ||
292 | /* | 292 | /* |
293 | * remove an ordered extent from the tree. No references are dropped | 293 | * remove an ordered extent from the tree. No references are dropped |
294 | * but, anyone waiting on this extent is woken up. | 294 | * and you must wake_up entry->wait. You must hold the tree mutex |
295 | * while you call this function. | ||
295 | */ | 296 | */ |
296 | int btrfs_remove_ordered_extent(struct inode *inode, | 297 | static int __btrfs_remove_ordered_extent(struct inode *inode, |
297 | struct btrfs_ordered_extent *entry) | 298 | struct btrfs_ordered_extent *entry) |
298 | { | 299 | { |
299 | struct btrfs_ordered_inode_tree *tree; | 300 | struct btrfs_ordered_inode_tree *tree; |
300 | struct rb_node *node; | 301 | struct rb_node *node; |
301 | 302 | ||
302 | tree = &BTRFS_I(inode)->ordered_tree; | 303 | tree = &BTRFS_I(inode)->ordered_tree; |
303 | mutex_lock(&tree->mutex); | ||
304 | node = &entry->rb_node; | 304 | node = &entry->rb_node; |
305 | rb_erase(node, &tree->tree); | 305 | rb_erase(node, &tree->tree); |
306 | tree->last = NULL; | 306 | tree->last = NULL; |
@@ -326,16 +326,34 @@ int btrfs_remove_ordered_extent(struct inode *inode, | |||
326 | } | 326 | } |
327 | spin_unlock(&BTRFS_I(inode)->root->fs_info->ordered_extent_lock); | 327 | spin_unlock(&BTRFS_I(inode)->root->fs_info->ordered_extent_lock); |
328 | 328 | ||
329 | return 0; | ||
330 | } | ||
331 | |||
332 | /* | ||
333 | * remove an ordered extent from the tree. No references are dropped | ||
334 | * but any waiters are woken. | ||
335 | */ | ||
336 | int btrfs_remove_ordered_extent(struct inode *inode, | ||
337 | struct btrfs_ordered_extent *entry) | ||
338 | { | ||
339 | struct btrfs_ordered_inode_tree *tree; | ||
340 | int ret; | ||
341 | |||
342 | tree = &BTRFS_I(inode)->ordered_tree; | ||
343 | mutex_lock(&tree->mutex); | ||
344 | ret = __btrfs_remove_ordered_extent(inode, entry); | ||
329 | mutex_unlock(&tree->mutex); | 345 | mutex_unlock(&tree->mutex); |
330 | wake_up(&entry->wait); | 346 | wake_up(&entry->wait); |
331 | return 0; | 347 | |
348 | return ret; | ||
332 | } | 349 | } |
333 | 350 | ||
334 | /* | 351 | /* |
335 | * wait for all the ordered extents in a root. This is done when balancing | 352 | * wait for all the ordered extents in a root. This is done when balancing |
336 | * space between drives. | 353 | * space between drives. |
337 | */ | 354 | */ |
338 | int btrfs_wait_ordered_extents(struct btrfs_root *root, int nocow_only) | 355 | int btrfs_wait_ordered_extents(struct btrfs_root *root, |
356 | int nocow_only, int delay_iput) | ||
339 | { | 357 | { |
340 | struct list_head splice; | 358 | struct list_head splice; |
341 | struct list_head *cur; | 359 | struct list_head *cur; |
@@ -372,7 +390,10 @@ int btrfs_wait_ordered_extents(struct btrfs_root *root, int nocow_only) | |||
372 | if (inode) { | 390 | if (inode) { |
373 | btrfs_start_ordered_extent(inode, ordered, 1); | 391 | btrfs_start_ordered_extent(inode, ordered, 1); |
374 | btrfs_put_ordered_extent(ordered); | 392 | btrfs_put_ordered_extent(ordered); |
375 | iput(inode); | 393 | if (delay_iput) |
394 | btrfs_add_delayed_iput(inode); | ||
395 | else | ||
396 | iput(inode); | ||
376 | } else { | 397 | } else { |
377 | btrfs_put_ordered_extent(ordered); | 398 | btrfs_put_ordered_extent(ordered); |
378 | } | 399 | } |
@@ -430,7 +451,7 @@ again: | |||
430 | btrfs_wait_ordered_range(inode, 0, (u64)-1); | 451 | btrfs_wait_ordered_range(inode, 0, (u64)-1); |
431 | else | 452 | else |
432 | filemap_flush(inode->i_mapping); | 453 | filemap_flush(inode->i_mapping); |
433 | iput(inode); | 454 | btrfs_add_delayed_iput(inode); |
434 | } | 455 | } |
435 | 456 | ||
436 | cond_resched(); | 457 | cond_resched(); |
@@ -589,7 +610,7 @@ out: | |||
589 | * After an extent is done, call this to conditionally update the on disk | 610 | * After an extent is done, call this to conditionally update the on disk |
590 | * i_size. i_size is updated to cover any fully written part of the file. | 611 | * i_size. i_size is updated to cover any fully written part of the file. |
591 | */ | 612 | */ |
592 | int btrfs_ordered_update_i_size(struct inode *inode, | 613 | int btrfs_ordered_update_i_size(struct inode *inode, u64 offset, |
593 | struct btrfs_ordered_extent *ordered) | 614 | struct btrfs_ordered_extent *ordered) |
594 | { | 615 | { |
595 | struct btrfs_ordered_inode_tree *tree = &BTRFS_I(inode)->ordered_tree; | 616 | struct btrfs_ordered_inode_tree *tree = &BTRFS_I(inode)->ordered_tree; |
@@ -597,18 +618,30 @@ int btrfs_ordered_update_i_size(struct inode *inode, | |||
597 | u64 disk_i_size; | 618 | u64 disk_i_size; |
598 | u64 new_i_size; | 619 | u64 new_i_size; |
599 | u64 i_size_test; | 620 | u64 i_size_test; |
621 | u64 i_size = i_size_read(inode); | ||
600 | struct rb_node *node; | 622 | struct rb_node *node; |
623 | struct rb_node *prev = NULL; | ||
601 | struct btrfs_ordered_extent *test; | 624 | struct btrfs_ordered_extent *test; |
625 | int ret = 1; | ||
626 | |||
627 | if (ordered) | ||
628 | offset = entry_end(ordered); | ||
602 | 629 | ||
603 | mutex_lock(&tree->mutex); | 630 | mutex_lock(&tree->mutex); |
604 | disk_i_size = BTRFS_I(inode)->disk_i_size; | 631 | disk_i_size = BTRFS_I(inode)->disk_i_size; |
605 | 632 | ||
633 | /* truncate file */ | ||
634 | if (disk_i_size > i_size) { | ||
635 | BTRFS_I(inode)->disk_i_size = i_size; | ||
636 | ret = 0; | ||
637 | goto out; | ||
638 | } | ||
639 | |||
606 | /* | 640 | /* |
607 | * if the disk i_size is already at the inode->i_size, or | 641 | * if the disk i_size is already at the inode->i_size, or |
608 | * this ordered extent is inside the disk i_size, we're done | 642 | * this ordered extent is inside the disk i_size, we're done |
609 | */ | 643 | */ |
610 | if (disk_i_size >= inode->i_size || | 644 | if (disk_i_size == i_size || offset <= disk_i_size) { |
611 | ordered->file_offset + ordered->len <= disk_i_size) { | ||
612 | goto out; | 645 | goto out; |
613 | } | 646 | } |
614 | 647 | ||
@@ -616,8 +649,7 @@ int btrfs_ordered_update_i_size(struct inode *inode, | |||
616 | * we can't update the disk_isize if there are delalloc bytes | 649 | * we can't update the disk_isize if there are delalloc bytes |
617 | * between disk_i_size and this ordered extent | 650 | * between disk_i_size and this ordered extent |
618 | */ | 651 | */ |
619 | if (test_range_bit(io_tree, disk_i_size, | 652 | if (test_range_bit(io_tree, disk_i_size, offset - 1, |
620 | ordered->file_offset + ordered->len - 1, | ||
621 | EXTENT_DELALLOC, 0, NULL)) { | 653 | EXTENT_DELALLOC, 0, NULL)) { |
622 | goto out; | 654 | goto out; |
623 | } | 655 | } |
@@ -626,20 +658,32 @@ int btrfs_ordered_update_i_size(struct inode *inode, | |||
626 | * if we find an ordered extent then we can't update disk i_size | 658 | * if we find an ordered extent then we can't update disk i_size |
627 | * yet | 659 | * yet |
628 | */ | 660 | */ |
629 | node = &ordered->rb_node; | 661 | if (ordered) { |
630 | while (1) { | 662 | node = rb_prev(&ordered->rb_node); |
631 | node = rb_prev(node); | 663 | } else { |
632 | if (!node) | 664 | prev = tree_search(tree, offset); |
633 | break; | 665 | /* |
666 | * we insert file extents without involving ordered struct, | ||
667 | * so there should be no ordered struct cover this offset | ||
668 | */ | ||
669 | if (prev) { | ||
670 | test = rb_entry(prev, struct btrfs_ordered_extent, | ||
671 | rb_node); | ||
672 | BUG_ON(offset_in_entry(test, offset)); | ||
673 | } | ||
674 | node = prev; | ||
675 | } | ||
676 | while (node) { | ||
634 | test = rb_entry(node, struct btrfs_ordered_extent, rb_node); | 677 | test = rb_entry(node, struct btrfs_ordered_extent, rb_node); |
635 | if (test->file_offset + test->len <= disk_i_size) | 678 | if (test->file_offset + test->len <= disk_i_size) |
636 | break; | 679 | break; |
637 | if (test->file_offset >= inode->i_size) | 680 | if (test->file_offset >= i_size) |
638 | break; | 681 | break; |
639 | if (test->file_offset >= disk_i_size) | 682 | if (test->file_offset >= disk_i_size) |
640 | goto out; | 683 | goto out; |
684 | node = rb_prev(node); | ||
641 | } | 685 | } |
642 | new_i_size = min_t(u64, entry_end(ordered), i_size_read(inode)); | 686 | new_i_size = min_t(u64, offset, i_size); |
643 | 687 | ||
644 | /* | 688 | /* |
645 | * at this point, we know we can safely update i_size to at least | 689 | * at this point, we know we can safely update i_size to at least |
@@ -647,7 +691,14 @@ int btrfs_ordered_update_i_size(struct inode *inode, | |||
647 | * walk forward and see if ios from higher up in the file have | 691 | * walk forward and see if ios from higher up in the file have |
648 | * finished. | 692 | * finished. |
649 | */ | 693 | */ |
650 | node = rb_next(&ordered->rb_node); | 694 | if (ordered) { |
695 | node = rb_next(&ordered->rb_node); | ||
696 | } else { | ||
697 | if (prev) | ||
698 | node = rb_next(prev); | ||
699 | else | ||
700 | node = rb_first(&tree->tree); | ||
701 | } | ||
651 | i_size_test = 0; | 702 | i_size_test = 0; |
652 | if (node) { | 703 | if (node) { |
653 | /* | 704 | /* |
@@ -655,10 +706,10 @@ int btrfs_ordered_update_i_size(struct inode *inode, | |||
655 | * between our ordered extent and the next one. | 706 | * between our ordered extent and the next one. |
656 | */ | 707 | */ |
657 | test = rb_entry(node, struct btrfs_ordered_extent, rb_node); | 708 | test = rb_entry(node, struct btrfs_ordered_extent, rb_node); |
658 | if (test->file_offset > entry_end(ordered)) | 709 | if (test->file_offset > offset) |
659 | i_size_test = test->file_offset; | 710 | i_size_test = test->file_offset; |
660 | } else { | 711 | } else { |
661 | i_size_test = i_size_read(inode); | 712 | i_size_test = i_size; |
662 | } | 713 | } |
663 | 714 | ||
664 | /* | 715 | /* |
@@ -667,15 +718,25 @@ int btrfs_ordered_update_i_size(struct inode *inode, | |||
667 | * are no delalloc bytes in this area, it is safe to update | 718 | * are no delalloc bytes in this area, it is safe to update |
668 | * disk_i_size to the end of the region. | 719 | * disk_i_size to the end of the region. |
669 | */ | 720 | */ |
670 | if (i_size_test > entry_end(ordered) && | 721 | if (i_size_test > offset && |
671 | !test_range_bit(io_tree, entry_end(ordered), i_size_test - 1, | 722 | !test_range_bit(io_tree, offset, i_size_test - 1, |
672 | EXTENT_DELALLOC, 0, NULL)) { | 723 | EXTENT_DELALLOC, 0, NULL)) { |
673 | new_i_size = min_t(u64, i_size_test, i_size_read(inode)); | 724 | new_i_size = min_t(u64, i_size_test, i_size); |
674 | } | 725 | } |
675 | BTRFS_I(inode)->disk_i_size = new_i_size; | 726 | BTRFS_I(inode)->disk_i_size = new_i_size; |
727 | ret = 0; | ||
676 | out: | 728 | out: |
729 | /* | ||
730 | * we need to remove the ordered extent with the tree lock held | ||
731 | * so that other people calling this function don't find our fully | ||
732 | * processed ordered entry and skip updating the i_size | ||
733 | */ | ||
734 | if (ordered) | ||
735 | __btrfs_remove_ordered_extent(inode, ordered); | ||
677 | mutex_unlock(&tree->mutex); | 736 | mutex_unlock(&tree->mutex); |
678 | return 0; | 737 | if (ordered) |
738 | wake_up(&ordered->wait); | ||
739 | return ret; | ||
679 | } | 740 | } |
680 | 741 | ||
681 | /* | 742 | /* |
diff --git a/fs/btrfs/ordered-data.h b/fs/btrfs/ordered-data.h index f82e87488ca8..1fe1282ef47c 100644 --- a/fs/btrfs/ordered-data.h +++ b/fs/btrfs/ordered-data.h | |||
@@ -150,12 +150,13 @@ void btrfs_start_ordered_extent(struct inode *inode, | |||
150 | int btrfs_wait_ordered_range(struct inode *inode, u64 start, u64 len); | 150 | int btrfs_wait_ordered_range(struct inode *inode, u64 start, u64 len); |
151 | struct btrfs_ordered_extent * | 151 | struct btrfs_ordered_extent * |
152 | btrfs_lookup_first_ordered_extent(struct inode * inode, u64 file_offset); | 152 | btrfs_lookup_first_ordered_extent(struct inode * inode, u64 file_offset); |
153 | int btrfs_ordered_update_i_size(struct inode *inode, | 153 | int btrfs_ordered_update_i_size(struct inode *inode, u64 offset, |
154 | struct btrfs_ordered_extent *ordered); | 154 | struct btrfs_ordered_extent *ordered); |
155 | int btrfs_find_ordered_sum(struct inode *inode, u64 offset, u64 disk_bytenr, u32 *sum); | 155 | int btrfs_find_ordered_sum(struct inode *inode, u64 offset, u64 disk_bytenr, u32 *sum); |
156 | int btrfs_wait_ordered_extents(struct btrfs_root *root, int nocow_only); | ||
157 | int btrfs_run_ordered_operations(struct btrfs_root *root, int wait); | 156 | int btrfs_run_ordered_operations(struct btrfs_root *root, int wait); |
158 | int btrfs_add_ordered_operation(struct btrfs_trans_handle *trans, | 157 | int btrfs_add_ordered_operation(struct btrfs_trans_handle *trans, |
159 | struct btrfs_root *root, | 158 | struct btrfs_root *root, |
160 | struct inode *inode); | 159 | struct inode *inode); |
160 | int btrfs_wait_ordered_extents(struct btrfs_root *root, | ||
161 | int nocow_only, int delay_iput); | ||
161 | #endif | 162 | #endif |
diff --git a/fs/btrfs/relocation.c b/fs/btrfs/relocation.c index cfcc93c93a7b..a9728680eca8 100644 --- a/fs/btrfs/relocation.c +++ b/fs/btrfs/relocation.c | |||
@@ -1561,6 +1561,20 @@ static int invalidate_extent_cache(struct btrfs_root *root, | |||
1561 | return 0; | 1561 | return 0; |
1562 | } | 1562 | } |
1563 | 1563 | ||
1564 | static void put_inodes(struct list_head *list) | ||
1565 | { | ||
1566 | struct inodevec *ivec; | ||
1567 | while (!list_empty(list)) { | ||
1568 | ivec = list_entry(list->next, struct inodevec, list); | ||
1569 | list_del(&ivec->list); | ||
1570 | while (ivec->nr > 0) { | ||
1571 | ivec->nr--; | ||
1572 | iput(ivec->inode[ivec->nr]); | ||
1573 | } | ||
1574 | kfree(ivec); | ||
1575 | } | ||
1576 | } | ||
1577 | |||
1564 | static int find_next_key(struct btrfs_path *path, int level, | 1578 | static int find_next_key(struct btrfs_path *path, int level, |
1565 | struct btrfs_key *key) | 1579 | struct btrfs_key *key) |
1566 | 1580 | ||
@@ -1723,6 +1737,11 @@ static noinline_for_stack int merge_reloc_root(struct reloc_control *rc, | |||
1723 | 1737 | ||
1724 | btrfs_btree_balance_dirty(root, nr); | 1738 | btrfs_btree_balance_dirty(root, nr); |
1725 | 1739 | ||
1740 | /* | ||
1741 | * put inodes outside transaction, otherwise we may deadlock. | ||
1742 | */ | ||
1743 | put_inodes(&inode_list); | ||
1744 | |||
1726 | if (replaced && rc->stage == UPDATE_DATA_PTRS) | 1745 | if (replaced && rc->stage == UPDATE_DATA_PTRS) |
1727 | invalidate_extent_cache(root, &key, &next_key); | 1746 | invalidate_extent_cache(root, &key, &next_key); |
1728 | } | 1747 | } |
@@ -1752,19 +1771,7 @@ out: | |||
1752 | 1771 | ||
1753 | btrfs_btree_balance_dirty(root, nr); | 1772 | btrfs_btree_balance_dirty(root, nr); |
1754 | 1773 | ||
1755 | /* | 1774 | put_inodes(&inode_list); |
1756 | * put inodes while we aren't holding the tree locks | ||
1757 | */ | ||
1758 | while (!list_empty(&inode_list)) { | ||
1759 | struct inodevec *ivec; | ||
1760 | ivec = list_entry(inode_list.next, struct inodevec, list); | ||
1761 | list_del(&ivec->list); | ||
1762 | while (ivec->nr > 0) { | ||
1763 | ivec->nr--; | ||
1764 | iput(ivec->inode[ivec->nr]); | ||
1765 | } | ||
1766 | kfree(ivec); | ||
1767 | } | ||
1768 | 1775 | ||
1769 | if (replaced && rc->stage == UPDATE_DATA_PTRS) | 1776 | if (replaced && rc->stage == UPDATE_DATA_PTRS) |
1770 | invalidate_extent_cache(root, &key, &next_key); | 1777 | invalidate_extent_cache(root, &key, &next_key); |
@@ -3534,8 +3541,8 @@ int btrfs_relocate_block_group(struct btrfs_root *extent_root, u64 group_start) | |||
3534 | (unsigned long long)rc->block_group->key.objectid, | 3541 | (unsigned long long)rc->block_group->key.objectid, |
3535 | (unsigned long long)rc->block_group->flags); | 3542 | (unsigned long long)rc->block_group->flags); |
3536 | 3543 | ||
3537 | btrfs_start_delalloc_inodes(fs_info->tree_root); | 3544 | btrfs_start_delalloc_inodes(fs_info->tree_root, 0); |
3538 | btrfs_wait_ordered_extents(fs_info->tree_root, 0); | 3545 | btrfs_wait_ordered_extents(fs_info->tree_root, 0, 0); |
3539 | 3546 | ||
3540 | while (1) { | 3547 | while (1) { |
3541 | rc->extents_found = 0; | 3548 | rc->extents_found = 0; |
@@ -3755,6 +3762,7 @@ out: | |||
3755 | BTRFS_DATA_RELOC_TREE_OBJECTID); | 3762 | BTRFS_DATA_RELOC_TREE_OBJECTID); |
3756 | if (IS_ERR(fs_root)) | 3763 | if (IS_ERR(fs_root)) |
3757 | err = PTR_ERR(fs_root); | 3764 | err = PTR_ERR(fs_root); |
3765 | btrfs_orphan_cleanup(fs_root); | ||
3758 | } | 3766 | } |
3759 | return err; | 3767 | return err; |
3760 | } | 3768 | } |
diff --git a/fs/btrfs/super.c b/fs/btrfs/super.c index 752a5463bf53..3f9b45704fcd 100644 --- a/fs/btrfs/super.c +++ b/fs/btrfs/super.c | |||
@@ -128,6 +128,7 @@ int btrfs_parse_options(struct btrfs_root *root, char *options) | |||
128 | substring_t args[MAX_OPT_ARGS]; | 128 | substring_t args[MAX_OPT_ARGS]; |
129 | char *p, *num; | 129 | char *p, *num; |
130 | int intarg; | 130 | int intarg; |
131 | int ret = 0; | ||
131 | 132 | ||
132 | if (!options) | 133 | if (!options) |
133 | return 0; | 134 | return 0; |
@@ -262,12 +263,18 @@ int btrfs_parse_options(struct btrfs_root *root, char *options) | |||
262 | case Opt_discard: | 263 | case Opt_discard: |
263 | btrfs_set_opt(info->mount_opt, DISCARD); | 264 | btrfs_set_opt(info->mount_opt, DISCARD); |
264 | break; | 265 | break; |
266 | case Opt_err: | ||
267 | printk(KERN_INFO "btrfs: unrecognized mount option " | ||
268 | "'%s'\n", p); | ||
269 | ret = -EINVAL; | ||
270 | goto out; | ||
265 | default: | 271 | default: |
266 | break; | 272 | break; |
267 | } | 273 | } |
268 | } | 274 | } |
275 | out: | ||
269 | kfree(options); | 276 | kfree(options); |
270 | return 0; | 277 | return ret; |
271 | } | 278 | } |
272 | 279 | ||
273 | /* | 280 | /* |
@@ -405,8 +412,8 @@ int btrfs_sync_fs(struct super_block *sb, int wait) | |||
405 | return 0; | 412 | return 0; |
406 | } | 413 | } |
407 | 414 | ||
408 | btrfs_start_delalloc_inodes(root); | 415 | btrfs_start_delalloc_inodes(root, 0); |
409 | btrfs_wait_ordered_extents(root, 0); | 416 | btrfs_wait_ordered_extents(root, 0, 0); |
410 | 417 | ||
411 | trans = btrfs_start_transaction(root, 1); | 418 | trans = btrfs_start_transaction(root, 1); |
412 | ret = btrfs_commit_transaction(trans, root); | 419 | ret = btrfs_commit_transaction(trans, root); |
@@ -450,6 +457,8 @@ static int btrfs_show_options(struct seq_file *seq, struct vfsmount *vfs) | |||
450 | seq_puts(seq, ",notreelog"); | 457 | seq_puts(seq, ",notreelog"); |
451 | if (btrfs_test_opt(root, FLUSHONCOMMIT)) | 458 | if (btrfs_test_opt(root, FLUSHONCOMMIT)) |
452 | seq_puts(seq, ",flushoncommit"); | 459 | seq_puts(seq, ",flushoncommit"); |
460 | if (btrfs_test_opt(root, DISCARD)) | ||
461 | seq_puts(seq, ",discard"); | ||
453 | if (!(root->fs_info->sb->s_flags & MS_POSIXACL)) | 462 | if (!(root->fs_info->sb->s_flags & MS_POSIXACL)) |
454 | seq_puts(seq, ",noacl"); | 463 | seq_puts(seq, ",noacl"); |
455 | return 0; | 464 | return 0; |
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c index c207e8c32c9b..b2acc79f1b34 100644 --- a/fs/btrfs/transaction.c +++ b/fs/btrfs/transaction.c | |||
@@ -333,6 +333,9 @@ static int __btrfs_end_transaction(struct btrfs_trans_handle *trans, | |||
333 | memset(trans, 0, sizeof(*trans)); | 333 | memset(trans, 0, sizeof(*trans)); |
334 | kmem_cache_free(btrfs_trans_handle_cachep, trans); | 334 | kmem_cache_free(btrfs_trans_handle_cachep, trans); |
335 | 335 | ||
336 | if (throttle) | ||
337 | btrfs_run_delayed_iputs(root); | ||
338 | |||
336 | return 0; | 339 | return 0; |
337 | } | 340 | } |
338 | 341 | ||
@@ -354,7 +357,7 @@ int btrfs_end_transaction_throttle(struct btrfs_trans_handle *trans, | |||
354 | * those extents are sent to disk but does not wait on them | 357 | * those extents are sent to disk but does not wait on them |
355 | */ | 358 | */ |
356 | int btrfs_write_marked_extents(struct btrfs_root *root, | 359 | int btrfs_write_marked_extents(struct btrfs_root *root, |
357 | struct extent_io_tree *dirty_pages) | 360 | struct extent_io_tree *dirty_pages, int mark) |
358 | { | 361 | { |
359 | int ret; | 362 | int ret; |
360 | int err = 0; | 363 | int err = 0; |
@@ -367,7 +370,7 @@ int btrfs_write_marked_extents(struct btrfs_root *root, | |||
367 | 370 | ||
368 | while (1) { | 371 | while (1) { |
369 | ret = find_first_extent_bit(dirty_pages, start, &start, &end, | 372 | ret = find_first_extent_bit(dirty_pages, start, &start, &end, |
370 | EXTENT_DIRTY); | 373 | mark); |
371 | if (ret) | 374 | if (ret) |
372 | break; | 375 | break; |
373 | while (start <= end) { | 376 | while (start <= end) { |
@@ -413,7 +416,7 @@ int btrfs_write_marked_extents(struct btrfs_root *root, | |||
413 | * on all the pages and clear them from the dirty pages state tree | 416 | * on all the pages and clear them from the dirty pages state tree |
414 | */ | 417 | */ |
415 | int btrfs_wait_marked_extents(struct btrfs_root *root, | 418 | int btrfs_wait_marked_extents(struct btrfs_root *root, |
416 | struct extent_io_tree *dirty_pages) | 419 | struct extent_io_tree *dirty_pages, int mark) |
417 | { | 420 | { |
418 | int ret; | 421 | int ret; |
419 | int err = 0; | 422 | int err = 0; |
@@ -425,12 +428,12 @@ int btrfs_wait_marked_extents(struct btrfs_root *root, | |||
425 | unsigned long index; | 428 | unsigned long index; |
426 | 429 | ||
427 | while (1) { | 430 | while (1) { |
428 | ret = find_first_extent_bit(dirty_pages, 0, &start, &end, | 431 | ret = find_first_extent_bit(dirty_pages, start, &start, &end, |
429 | EXTENT_DIRTY); | 432 | mark); |
430 | if (ret) | 433 | if (ret) |
431 | break; | 434 | break; |
432 | 435 | ||
433 | clear_extent_dirty(dirty_pages, start, end, GFP_NOFS); | 436 | clear_extent_bits(dirty_pages, start, end, mark, GFP_NOFS); |
434 | while (start <= end) { | 437 | while (start <= end) { |
435 | index = start >> PAGE_CACHE_SHIFT; | 438 | index = start >> PAGE_CACHE_SHIFT; |
436 | start = (u64)(index + 1) << PAGE_CACHE_SHIFT; | 439 | start = (u64)(index + 1) << PAGE_CACHE_SHIFT; |
@@ -460,13 +463,13 @@ int btrfs_wait_marked_extents(struct btrfs_root *root, | |||
460 | * those extents are on disk for transaction or log commit | 463 | * those extents are on disk for transaction or log commit |
461 | */ | 464 | */ |
462 | int btrfs_write_and_wait_marked_extents(struct btrfs_root *root, | 465 | int btrfs_write_and_wait_marked_extents(struct btrfs_root *root, |
463 | struct extent_io_tree *dirty_pages) | 466 | struct extent_io_tree *dirty_pages, int mark) |
464 | { | 467 | { |
465 | int ret; | 468 | int ret; |
466 | int ret2; | 469 | int ret2; |
467 | 470 | ||
468 | ret = btrfs_write_marked_extents(root, dirty_pages); | 471 | ret = btrfs_write_marked_extents(root, dirty_pages, mark); |
469 | ret2 = btrfs_wait_marked_extents(root, dirty_pages); | 472 | ret2 = btrfs_wait_marked_extents(root, dirty_pages, mark); |
470 | return ret || ret2; | 473 | return ret || ret2; |
471 | } | 474 | } |
472 | 475 | ||
@@ -479,7 +482,8 @@ int btrfs_write_and_wait_transaction(struct btrfs_trans_handle *trans, | |||
479 | return filemap_write_and_wait(btree_inode->i_mapping); | 482 | return filemap_write_and_wait(btree_inode->i_mapping); |
480 | } | 483 | } |
481 | return btrfs_write_and_wait_marked_extents(root, | 484 | return btrfs_write_and_wait_marked_extents(root, |
482 | &trans->transaction->dirty_pages); | 485 | &trans->transaction->dirty_pages, |
486 | EXTENT_DIRTY); | ||
483 | } | 487 | } |
484 | 488 | ||
485 | /* | 489 | /* |
@@ -497,13 +501,16 @@ static int update_cowonly_root(struct btrfs_trans_handle *trans, | |||
497 | { | 501 | { |
498 | int ret; | 502 | int ret; |
499 | u64 old_root_bytenr; | 503 | u64 old_root_bytenr; |
504 | u64 old_root_used; | ||
500 | struct btrfs_root *tree_root = root->fs_info->tree_root; | 505 | struct btrfs_root *tree_root = root->fs_info->tree_root; |
501 | 506 | ||
507 | old_root_used = btrfs_root_used(&root->root_item); | ||
502 | btrfs_write_dirty_block_groups(trans, root); | 508 | btrfs_write_dirty_block_groups(trans, root); |
503 | 509 | ||
504 | while (1) { | 510 | while (1) { |
505 | old_root_bytenr = btrfs_root_bytenr(&root->root_item); | 511 | old_root_bytenr = btrfs_root_bytenr(&root->root_item); |
506 | if (old_root_bytenr == root->node->start) | 512 | if (old_root_bytenr == root->node->start && |
513 | old_root_used == btrfs_root_used(&root->root_item)) | ||
507 | break; | 514 | break; |
508 | 515 | ||
509 | btrfs_set_root_node(&root->root_item, root->node); | 516 | btrfs_set_root_node(&root->root_item, root->node); |
@@ -512,6 +519,7 @@ static int update_cowonly_root(struct btrfs_trans_handle *trans, | |||
512 | &root->root_item); | 519 | &root->root_item); |
513 | BUG_ON(ret); | 520 | BUG_ON(ret); |
514 | 521 | ||
522 | old_root_used = btrfs_root_used(&root->root_item); | ||
515 | ret = btrfs_write_dirty_block_groups(trans, root); | 523 | ret = btrfs_write_dirty_block_groups(trans, root); |
516 | BUG_ON(ret); | 524 | BUG_ON(ret); |
517 | } | 525 | } |
@@ -795,7 +803,6 @@ static noinline int create_pending_snapshot(struct btrfs_trans_handle *trans, | |||
795 | memcpy(&pending->root_key, &key, sizeof(key)); | 803 | memcpy(&pending->root_key, &key, sizeof(key)); |
796 | fail: | 804 | fail: |
797 | kfree(new_root_item); | 805 | kfree(new_root_item); |
798 | btrfs_unreserve_metadata_space(root, 6); | ||
799 | return ret; | 806 | return ret; |
800 | } | 807 | } |
801 | 808 | ||
@@ -807,7 +814,6 @@ static noinline int finish_pending_snapshot(struct btrfs_fs_info *fs_info, | |||
807 | u64 index = 0; | 814 | u64 index = 0; |
808 | struct btrfs_trans_handle *trans; | 815 | struct btrfs_trans_handle *trans; |
809 | struct inode *parent_inode; | 816 | struct inode *parent_inode; |
810 | struct inode *inode; | ||
811 | struct btrfs_root *parent_root; | 817 | struct btrfs_root *parent_root; |
812 | 818 | ||
813 | parent_inode = pending->dentry->d_parent->d_inode; | 819 | parent_inode = pending->dentry->d_parent->d_inode; |
@@ -839,8 +845,6 @@ static noinline int finish_pending_snapshot(struct btrfs_fs_info *fs_info, | |||
839 | 845 | ||
840 | BUG_ON(ret); | 846 | BUG_ON(ret); |
841 | 847 | ||
842 | inode = btrfs_lookup_dentry(parent_inode, pending->dentry); | ||
843 | d_instantiate(pending->dentry, inode); | ||
844 | fail: | 848 | fail: |
845 | btrfs_end_transaction(trans, fs_info->fs_root); | 849 | btrfs_end_transaction(trans, fs_info->fs_root); |
846 | return ret; | 850 | return ret; |
@@ -994,11 +998,11 @@ int btrfs_commit_transaction(struct btrfs_trans_handle *trans, | |||
994 | mutex_unlock(&root->fs_info->trans_mutex); | 998 | mutex_unlock(&root->fs_info->trans_mutex); |
995 | 999 | ||
996 | if (flush_on_commit) { | 1000 | if (flush_on_commit) { |
997 | btrfs_start_delalloc_inodes(root); | 1001 | btrfs_start_delalloc_inodes(root, 1); |
998 | ret = btrfs_wait_ordered_extents(root, 0); | 1002 | ret = btrfs_wait_ordered_extents(root, 0, 1); |
999 | BUG_ON(ret); | 1003 | BUG_ON(ret); |
1000 | } else if (snap_pending) { | 1004 | } else if (snap_pending) { |
1001 | ret = btrfs_wait_ordered_extents(root, 1); | 1005 | ret = btrfs_wait_ordered_extents(root, 0, 1); |
1002 | BUG_ON(ret); | 1006 | BUG_ON(ret); |
1003 | } | 1007 | } |
1004 | 1008 | ||
@@ -1116,6 +1120,10 @@ int btrfs_commit_transaction(struct btrfs_trans_handle *trans, | |||
1116 | current->journal_info = NULL; | 1120 | current->journal_info = NULL; |
1117 | 1121 | ||
1118 | kmem_cache_free(btrfs_trans_handle_cachep, trans); | 1122 | kmem_cache_free(btrfs_trans_handle_cachep, trans); |
1123 | |||
1124 | if (current != root->fs_info->transaction_kthread) | ||
1125 | btrfs_run_delayed_iputs(root); | ||
1126 | |||
1119 | return ret; | 1127 | return ret; |
1120 | } | 1128 | } |
1121 | 1129 | ||
diff --git a/fs/btrfs/transaction.h b/fs/btrfs/transaction.h index d4e3e7a6938c..93c7ccb33118 100644 --- a/fs/btrfs/transaction.h +++ b/fs/btrfs/transaction.h | |||
@@ -107,10 +107,10 @@ void btrfs_throttle(struct btrfs_root *root); | |||
107 | int btrfs_record_root_in_trans(struct btrfs_trans_handle *trans, | 107 | int btrfs_record_root_in_trans(struct btrfs_trans_handle *trans, |
108 | struct btrfs_root *root); | 108 | struct btrfs_root *root); |
109 | int btrfs_write_and_wait_marked_extents(struct btrfs_root *root, | 109 | int btrfs_write_and_wait_marked_extents(struct btrfs_root *root, |
110 | struct extent_io_tree *dirty_pages); | 110 | struct extent_io_tree *dirty_pages, int mark); |
111 | int btrfs_write_marked_extents(struct btrfs_root *root, | 111 | int btrfs_write_marked_extents(struct btrfs_root *root, |
112 | struct extent_io_tree *dirty_pages); | 112 | struct extent_io_tree *dirty_pages, int mark); |
113 | int btrfs_wait_marked_extents(struct btrfs_root *root, | 113 | int btrfs_wait_marked_extents(struct btrfs_root *root, |
114 | struct extent_io_tree *dirty_pages); | 114 | struct extent_io_tree *dirty_pages, int mark); |
115 | int btrfs_transaction_in_commit(struct btrfs_fs_info *info); | 115 | int btrfs_transaction_in_commit(struct btrfs_fs_info *info); |
116 | #endif | 116 | #endif |
diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c index 741666a7676a..4a9434b622ec 100644 --- a/fs/btrfs/tree-log.c +++ b/fs/btrfs/tree-log.c | |||
@@ -542,8 +542,8 @@ static noinline int replay_one_extent(struct btrfs_trans_handle *trans, | |||
542 | 542 | ||
543 | saved_nbytes = inode_get_bytes(inode); | 543 | saved_nbytes = inode_get_bytes(inode); |
544 | /* drop any overlapping extents */ | 544 | /* drop any overlapping extents */ |
545 | ret = btrfs_drop_extents(trans, root, inode, | 545 | ret = btrfs_drop_extents(trans, inode, start, extent_end, |
546 | start, extent_end, extent_end, start, &alloc_hint, 1); | 546 | &alloc_hint, 1); |
547 | BUG_ON(ret); | 547 | BUG_ON(ret); |
548 | 548 | ||
549 | if (found_type == BTRFS_FILE_EXTENT_REG || | 549 | if (found_type == BTRFS_FILE_EXTENT_REG || |
@@ -930,6 +930,17 @@ out_nowrite: | |||
930 | return 0; | 930 | return 0; |
931 | } | 931 | } |
932 | 932 | ||
933 | static int insert_orphan_item(struct btrfs_trans_handle *trans, | ||
934 | struct btrfs_root *root, u64 offset) | ||
935 | { | ||
936 | int ret; | ||
937 | ret = btrfs_find_orphan_item(root, offset); | ||
938 | if (ret > 0) | ||
939 | ret = btrfs_insert_orphan_item(trans, root, offset); | ||
940 | return ret; | ||
941 | } | ||
942 | |||
943 | |||
933 | /* | 944 | /* |
934 | * There are a few corners where the link count of the file can't | 945 | * There are a few corners where the link count of the file can't |
935 | * be properly maintained during replay. So, instead of adding | 946 | * be properly maintained during replay. So, instead of adding |
@@ -997,9 +1008,13 @@ static noinline int fixup_inode_link_count(struct btrfs_trans_handle *trans, | |||
997 | } | 1008 | } |
998 | BTRFS_I(inode)->index_cnt = (u64)-1; | 1009 | BTRFS_I(inode)->index_cnt = (u64)-1; |
999 | 1010 | ||
1000 | if (inode->i_nlink == 0 && S_ISDIR(inode->i_mode)) { | 1011 | if (inode->i_nlink == 0) { |
1001 | ret = replay_dir_deletes(trans, root, NULL, path, | 1012 | if (S_ISDIR(inode->i_mode)) { |
1002 | inode->i_ino, 1); | 1013 | ret = replay_dir_deletes(trans, root, NULL, path, |
1014 | inode->i_ino, 1); | ||
1015 | BUG_ON(ret); | ||
1016 | } | ||
1017 | ret = insert_orphan_item(trans, root, inode->i_ino); | ||
1003 | BUG_ON(ret); | 1018 | BUG_ON(ret); |
1004 | } | 1019 | } |
1005 | btrfs_free_path(path); | 1020 | btrfs_free_path(path); |
@@ -1587,7 +1602,6 @@ static int replay_one_buffer(struct btrfs_root *log, struct extent_buffer *eb, | |||
1587 | /* inode keys are done during the first stage */ | 1602 | /* inode keys are done during the first stage */ |
1588 | if (key.type == BTRFS_INODE_ITEM_KEY && | 1603 | if (key.type == BTRFS_INODE_ITEM_KEY && |
1589 | wc->stage == LOG_WALK_REPLAY_INODES) { | 1604 | wc->stage == LOG_WALK_REPLAY_INODES) { |
1590 | struct inode *inode; | ||
1591 | struct btrfs_inode_item *inode_item; | 1605 | struct btrfs_inode_item *inode_item; |
1592 | u32 mode; | 1606 | u32 mode; |
1593 | 1607 | ||
@@ -1603,31 +1617,16 @@ static int replay_one_buffer(struct btrfs_root *log, struct extent_buffer *eb, | |||
1603 | eb, i, &key); | 1617 | eb, i, &key); |
1604 | BUG_ON(ret); | 1618 | BUG_ON(ret); |
1605 | 1619 | ||
1606 | /* for regular files, truncate away | 1620 | /* for regular files, make sure corresponding |
1607 | * extents past the new EOF | 1621 | * orhpan item exist. extents past the new EOF |
1622 | * will be truncated later by orphan cleanup. | ||
1608 | */ | 1623 | */ |
1609 | if (S_ISREG(mode)) { | 1624 | if (S_ISREG(mode)) { |
1610 | inode = read_one_inode(root, | 1625 | ret = insert_orphan_item(wc->trans, root, |
1611 | key.objectid); | 1626 | key.objectid); |
1612 | BUG_ON(!inode); | ||
1613 | |||
1614 | ret = btrfs_truncate_inode_items(wc->trans, | ||
1615 | root, inode, inode->i_size, | ||
1616 | BTRFS_EXTENT_DATA_KEY); | ||
1617 | BUG_ON(ret); | 1627 | BUG_ON(ret); |
1618 | |||
1619 | /* if the nlink count is zero here, the iput | ||
1620 | * will free the inode. We bump it to make | ||
1621 | * sure it doesn't get freed until the link | ||
1622 | * count fixup is done | ||
1623 | */ | ||
1624 | if (inode->i_nlink == 0) { | ||
1625 | btrfs_inc_nlink(inode); | ||
1626 | btrfs_update_inode(wc->trans, | ||
1627 | root, inode); | ||
1628 | } | ||
1629 | iput(inode); | ||
1630 | } | 1628 | } |
1629 | |||
1631 | ret = link_to_fixup_dir(wc->trans, root, | 1630 | ret = link_to_fixup_dir(wc->trans, root, |
1632 | path, key.objectid); | 1631 | path, key.objectid); |
1633 | BUG_ON(ret); | 1632 | BUG_ON(ret); |
@@ -1977,10 +1976,11 @@ int btrfs_sync_log(struct btrfs_trans_handle *trans, | |||
1977 | { | 1976 | { |
1978 | int index1; | 1977 | int index1; |
1979 | int index2; | 1978 | int index2; |
1979 | int mark; | ||
1980 | int ret; | 1980 | int ret; |
1981 | struct btrfs_root *log = root->log_root; | 1981 | struct btrfs_root *log = root->log_root; |
1982 | struct btrfs_root *log_root_tree = root->fs_info->log_root_tree; | 1982 | struct btrfs_root *log_root_tree = root->fs_info->log_root_tree; |
1983 | u64 log_transid = 0; | 1983 | unsigned long log_transid = 0; |
1984 | 1984 | ||
1985 | mutex_lock(&root->log_mutex); | 1985 | mutex_lock(&root->log_mutex); |
1986 | index1 = root->log_transid % 2; | 1986 | index1 = root->log_transid % 2; |
@@ -2014,24 +2014,29 @@ int btrfs_sync_log(struct btrfs_trans_handle *trans, | |||
2014 | goto out; | 2014 | goto out; |
2015 | } | 2015 | } |
2016 | 2016 | ||
2017 | log_transid = root->log_transid; | ||
2018 | if (log_transid % 2 == 0) | ||
2019 | mark = EXTENT_DIRTY; | ||
2020 | else | ||
2021 | mark = EXTENT_NEW; | ||
2022 | |||
2017 | /* we start IO on all the marked extents here, but we don't actually | 2023 | /* we start IO on all the marked extents here, but we don't actually |
2018 | * wait for them until later. | 2024 | * wait for them until later. |
2019 | */ | 2025 | */ |
2020 | ret = btrfs_write_marked_extents(log, &log->dirty_log_pages); | 2026 | ret = btrfs_write_marked_extents(log, &log->dirty_log_pages, mark); |
2021 | BUG_ON(ret); | 2027 | BUG_ON(ret); |
2022 | 2028 | ||
2023 | btrfs_set_root_node(&log->root_item, log->node); | 2029 | btrfs_set_root_node(&log->root_item, log->node); |
2024 | 2030 | ||
2025 | root->log_batch = 0; | 2031 | root->log_batch = 0; |
2026 | log_transid = root->log_transid; | ||
2027 | root->log_transid++; | 2032 | root->log_transid++; |
2028 | log->log_transid = root->log_transid; | 2033 | log->log_transid = root->log_transid; |
2029 | root->log_start_pid = 0; | 2034 | root->log_start_pid = 0; |
2030 | smp_mb(); | 2035 | smp_mb(); |
2031 | /* | 2036 | /* |
2032 | * log tree has been flushed to disk, new modifications of | 2037 | * IO has been started, blocks of the log tree have WRITTEN flag set |
2033 | * the log will be written to new positions. so it's safe to | 2038 | * in their headers. new modifications of the log will be written to |
2034 | * allow log writers to go in. | 2039 | * new positions. so it's safe to allow log writers to go in. |
2035 | */ | 2040 | */ |
2036 | mutex_unlock(&root->log_mutex); | 2041 | mutex_unlock(&root->log_mutex); |
2037 | 2042 | ||
@@ -2052,7 +2057,7 @@ int btrfs_sync_log(struct btrfs_trans_handle *trans, | |||
2052 | 2057 | ||
2053 | index2 = log_root_tree->log_transid % 2; | 2058 | index2 = log_root_tree->log_transid % 2; |
2054 | if (atomic_read(&log_root_tree->log_commit[index2])) { | 2059 | if (atomic_read(&log_root_tree->log_commit[index2])) { |
2055 | btrfs_wait_marked_extents(log, &log->dirty_log_pages); | 2060 | btrfs_wait_marked_extents(log, &log->dirty_log_pages, mark); |
2056 | wait_log_commit(trans, log_root_tree, | 2061 | wait_log_commit(trans, log_root_tree, |
2057 | log_root_tree->log_transid); | 2062 | log_root_tree->log_transid); |
2058 | mutex_unlock(&log_root_tree->log_mutex); | 2063 | mutex_unlock(&log_root_tree->log_mutex); |
@@ -2072,16 +2077,17 @@ int btrfs_sync_log(struct btrfs_trans_handle *trans, | |||
2072 | * check the full commit flag again | 2077 | * check the full commit flag again |
2073 | */ | 2078 | */ |
2074 | if (root->fs_info->last_trans_log_full_commit == trans->transid) { | 2079 | if (root->fs_info->last_trans_log_full_commit == trans->transid) { |
2075 | btrfs_wait_marked_extents(log, &log->dirty_log_pages); | 2080 | btrfs_wait_marked_extents(log, &log->dirty_log_pages, mark); |
2076 | mutex_unlock(&log_root_tree->log_mutex); | 2081 | mutex_unlock(&log_root_tree->log_mutex); |
2077 | ret = -EAGAIN; | 2082 | ret = -EAGAIN; |
2078 | goto out_wake_log_root; | 2083 | goto out_wake_log_root; |
2079 | } | 2084 | } |
2080 | 2085 | ||
2081 | ret = btrfs_write_and_wait_marked_extents(log_root_tree, | 2086 | ret = btrfs_write_and_wait_marked_extents(log_root_tree, |
2082 | &log_root_tree->dirty_log_pages); | 2087 | &log_root_tree->dirty_log_pages, |
2088 | EXTENT_DIRTY | EXTENT_NEW); | ||
2083 | BUG_ON(ret); | 2089 | BUG_ON(ret); |
2084 | btrfs_wait_marked_extents(log, &log->dirty_log_pages); | 2090 | btrfs_wait_marked_extents(log, &log->dirty_log_pages, mark); |
2085 | 2091 | ||
2086 | btrfs_set_super_log_root(&root->fs_info->super_for_commit, | 2092 | btrfs_set_super_log_root(&root->fs_info->super_for_commit, |
2087 | log_root_tree->node->start); | 2093 | log_root_tree->node->start); |
@@ -2147,12 +2153,12 @@ int btrfs_free_log(struct btrfs_trans_handle *trans, struct btrfs_root *root) | |||
2147 | 2153 | ||
2148 | while (1) { | 2154 | while (1) { |
2149 | ret = find_first_extent_bit(&log->dirty_log_pages, | 2155 | ret = find_first_extent_bit(&log->dirty_log_pages, |
2150 | 0, &start, &end, EXTENT_DIRTY); | 2156 | 0, &start, &end, EXTENT_DIRTY | EXTENT_NEW); |
2151 | if (ret) | 2157 | if (ret) |
2152 | break; | 2158 | break; |
2153 | 2159 | ||
2154 | clear_extent_dirty(&log->dirty_log_pages, | 2160 | clear_extent_bits(&log->dirty_log_pages, start, end, |
2155 | start, end, GFP_NOFS); | 2161 | EXTENT_DIRTY | EXTENT_NEW, GFP_NOFS); |
2156 | } | 2162 | } |
2157 | 2163 | ||
2158 | if (log->log_transid > 0) { | 2164 | if (log->log_transid > 0) { |
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c index 7eda483d7b5a..198cff28766d 100644 --- a/fs/btrfs/volumes.c +++ b/fs/btrfs/volumes.c | |||
@@ -2209,7 +2209,7 @@ static int __btrfs_alloc_chunk(struct btrfs_trans_handle *trans, | |||
2209 | max_chunk_size = 10 * calc_size; | 2209 | max_chunk_size = 10 * calc_size; |
2210 | min_stripe_size = 64 * 1024 * 1024; | 2210 | min_stripe_size = 64 * 1024 * 1024; |
2211 | } else if (type & BTRFS_BLOCK_GROUP_METADATA) { | 2211 | } else if (type & BTRFS_BLOCK_GROUP_METADATA) { |
2212 | max_chunk_size = 4 * calc_size; | 2212 | max_chunk_size = 256 * 1024 * 1024; |
2213 | min_stripe_size = 32 * 1024 * 1024; | 2213 | min_stripe_size = 32 * 1024 * 1024; |
2214 | } else if (type & BTRFS_BLOCK_GROUP_SYSTEM) { | 2214 | } else if (type & BTRFS_BLOCK_GROUP_SYSTEM) { |
2215 | calc_size = 8 * 1024 * 1024; | 2215 | calc_size = 8 * 1024 * 1024; |
diff --git a/fs/btrfs/xattr.c b/fs/btrfs/xattr.c index b6dd5967c48a..193b58f7d3f3 100644 --- a/fs/btrfs/xattr.c +++ b/fs/btrfs/xattr.c | |||
@@ -85,22 +85,23 @@ out: | |||
85 | return ret; | 85 | return ret; |
86 | } | 86 | } |
87 | 87 | ||
88 | int __btrfs_setxattr(struct inode *inode, const char *name, | 88 | static int do_setxattr(struct btrfs_trans_handle *trans, |
89 | const void *value, size_t size, int flags) | 89 | struct inode *inode, const char *name, |
90 | const void *value, size_t size, int flags) | ||
90 | { | 91 | { |
91 | struct btrfs_dir_item *di; | 92 | struct btrfs_dir_item *di; |
92 | struct btrfs_root *root = BTRFS_I(inode)->root; | 93 | struct btrfs_root *root = BTRFS_I(inode)->root; |
93 | struct btrfs_trans_handle *trans; | ||
94 | struct btrfs_path *path; | 94 | struct btrfs_path *path; |
95 | int ret = 0, mod = 0; | 95 | size_t name_len = strlen(name); |
96 | int ret = 0; | ||
97 | |||
98 | if (name_len + size > BTRFS_MAX_XATTR_SIZE(root)) | ||
99 | return -ENOSPC; | ||
96 | 100 | ||
97 | path = btrfs_alloc_path(); | 101 | path = btrfs_alloc_path(); |
98 | if (!path) | 102 | if (!path) |
99 | return -ENOMEM; | 103 | return -ENOMEM; |
100 | 104 | ||
101 | trans = btrfs_join_transaction(root, 1); | ||
102 | btrfs_set_trans_block_group(trans, inode); | ||
103 | |||
104 | /* first lets see if we already have this xattr */ | 105 | /* first lets see if we already have this xattr */ |
105 | di = btrfs_lookup_xattr(trans, root, path, inode->i_ino, name, | 106 | di = btrfs_lookup_xattr(trans, root, path, inode->i_ino, name, |
106 | strlen(name), -1); | 107 | strlen(name), -1); |
@@ -118,15 +119,12 @@ int __btrfs_setxattr(struct inode *inode, const char *name, | |||
118 | } | 119 | } |
119 | 120 | ||
120 | ret = btrfs_delete_one_dir_name(trans, root, path, di); | 121 | ret = btrfs_delete_one_dir_name(trans, root, path, di); |
121 | if (ret) | 122 | BUG_ON(ret); |
122 | goto out; | ||
123 | btrfs_release_path(root, path); | 123 | btrfs_release_path(root, path); |
124 | 124 | ||
125 | /* if we don't have a value then we are removing the xattr */ | 125 | /* if we don't have a value then we are removing the xattr */ |
126 | if (!value) { | 126 | if (!value) |
127 | mod = 1; | ||
128 | goto out; | 127 | goto out; |
129 | } | ||
130 | } else { | 128 | } else { |
131 | btrfs_release_path(root, path); | 129 | btrfs_release_path(root, path); |
132 | 130 | ||
@@ -138,20 +136,45 @@ int __btrfs_setxattr(struct inode *inode, const char *name, | |||
138 | } | 136 | } |
139 | 137 | ||
140 | /* ok we have to create a completely new xattr */ | 138 | /* ok we have to create a completely new xattr */ |
141 | ret = btrfs_insert_xattr_item(trans, root, name, strlen(name), | 139 | ret = btrfs_insert_xattr_item(trans, root, path, inode->i_ino, |
142 | value, size, inode->i_ino); | 140 | name, name_len, value, size); |
141 | BUG_ON(ret); | ||
142 | out: | ||
143 | btrfs_free_path(path); | ||
144 | return ret; | ||
145 | } | ||
146 | |||
147 | int __btrfs_setxattr(struct btrfs_trans_handle *trans, | ||
148 | struct inode *inode, const char *name, | ||
149 | const void *value, size_t size, int flags) | ||
150 | { | ||
151 | struct btrfs_root *root = BTRFS_I(inode)->root; | ||
152 | int ret; | ||
153 | |||
154 | if (trans) | ||
155 | return do_setxattr(trans, inode, name, value, size, flags); | ||
156 | |||
157 | ret = btrfs_reserve_metadata_space(root, 2); | ||
143 | if (ret) | 158 | if (ret) |
144 | goto out; | 159 | return ret; |
145 | mod = 1; | ||
146 | 160 | ||
147 | out: | 161 | trans = btrfs_start_transaction(root, 1); |
148 | if (mod) { | 162 | if (!trans) { |
149 | inode->i_ctime = CURRENT_TIME; | 163 | ret = -ENOMEM; |
150 | ret = btrfs_update_inode(trans, root, inode); | 164 | goto out; |
151 | } | 165 | } |
166 | btrfs_set_trans_block_group(trans, inode); | ||
152 | 167 | ||
153 | btrfs_end_transaction(trans, root); | 168 | ret = do_setxattr(trans, inode, name, value, size, flags); |
154 | btrfs_free_path(path); | 169 | if (ret) |
170 | goto out; | ||
171 | |||
172 | inode->i_ctime = CURRENT_TIME; | ||
173 | ret = btrfs_update_inode(trans, root, inode); | ||
174 | BUG_ON(ret); | ||
175 | out: | ||
176 | btrfs_end_transaction_throttle(trans, root); | ||
177 | btrfs_unreserve_metadata_space(root, 2); | ||
155 | return ret; | 178 | return ret; |
156 | } | 179 | } |
157 | 180 | ||
@@ -314,7 +337,9 @@ int btrfs_setxattr(struct dentry *dentry, const char *name, const void *value, | |||
314 | 337 | ||
315 | if (size == 0) | 338 | if (size == 0) |
316 | value = ""; /* empty EA, do not remove */ | 339 | value = ""; /* empty EA, do not remove */ |
317 | return __btrfs_setxattr(dentry->d_inode, name, value, size, flags); | 340 | |
341 | return __btrfs_setxattr(NULL, dentry->d_inode, name, value, size, | ||
342 | flags); | ||
318 | } | 343 | } |
319 | 344 | ||
320 | int btrfs_removexattr(struct dentry *dentry, const char *name) | 345 | int btrfs_removexattr(struct dentry *dentry, const char *name) |
@@ -329,10 +354,13 @@ int btrfs_removexattr(struct dentry *dentry, const char *name) | |||
329 | 354 | ||
330 | if (!btrfs_is_valid_xattr(name)) | 355 | if (!btrfs_is_valid_xattr(name)) |
331 | return -EOPNOTSUPP; | 356 | return -EOPNOTSUPP; |
332 | return __btrfs_setxattr(dentry->d_inode, name, NULL, 0, XATTR_REPLACE); | 357 | |
358 | return __btrfs_setxattr(NULL, dentry->d_inode, name, NULL, 0, | ||
359 | XATTR_REPLACE); | ||
333 | } | 360 | } |
334 | 361 | ||
335 | int btrfs_xattr_security_init(struct inode *inode, struct inode *dir) | 362 | int btrfs_xattr_security_init(struct btrfs_trans_handle *trans, |
363 | struct inode *inode, struct inode *dir) | ||
336 | { | 364 | { |
337 | int err; | 365 | int err; |
338 | size_t len; | 366 | size_t len; |
@@ -354,7 +382,7 @@ int btrfs_xattr_security_init(struct inode *inode, struct inode *dir) | |||
354 | } else { | 382 | } else { |
355 | strcpy(name, XATTR_SECURITY_PREFIX); | 383 | strcpy(name, XATTR_SECURITY_PREFIX); |
356 | strcpy(name + XATTR_SECURITY_PREFIX_LEN, suffix); | 384 | strcpy(name + XATTR_SECURITY_PREFIX_LEN, suffix); |
357 | err = __btrfs_setxattr(inode, name, value, len, 0); | 385 | err = __btrfs_setxattr(trans, inode, name, value, len, 0); |
358 | kfree(name); | 386 | kfree(name); |
359 | } | 387 | } |
360 | 388 | ||
diff --git a/fs/btrfs/xattr.h b/fs/btrfs/xattr.h index c71e9c3cf3f7..721efa0346e0 100644 --- a/fs/btrfs/xattr.h +++ b/fs/btrfs/xattr.h | |||
@@ -27,15 +27,16 @@ extern struct xattr_handler *btrfs_xattr_handlers[]; | |||
27 | 27 | ||
28 | extern ssize_t __btrfs_getxattr(struct inode *inode, const char *name, | 28 | extern ssize_t __btrfs_getxattr(struct inode *inode, const char *name, |
29 | void *buffer, size_t size); | 29 | void *buffer, size_t size); |
30 | extern int __btrfs_setxattr(struct inode *inode, const char *name, | 30 | extern int __btrfs_setxattr(struct btrfs_trans_handle *trans, |
31 | const void *value, size_t size, int flags); | 31 | struct inode *inode, const char *name, |
32 | 32 | const void *value, size_t size, int flags); | |
33 | extern ssize_t btrfs_getxattr(struct dentry *dentry, const char *name, | 33 | extern ssize_t btrfs_getxattr(struct dentry *dentry, const char *name, |
34 | void *buffer, size_t size); | 34 | void *buffer, size_t size); |
35 | extern int btrfs_setxattr(struct dentry *dentry, const char *name, | 35 | extern int btrfs_setxattr(struct dentry *dentry, const char *name, |
36 | const void *value, size_t size, int flags); | 36 | const void *value, size_t size, int flags); |
37 | extern int btrfs_removexattr(struct dentry *dentry, const char *name); | 37 | extern int btrfs_removexattr(struct dentry *dentry, const char *name); |
38 | 38 | ||
39 | extern int btrfs_xattr_security_init(struct inode *inode, struct inode *dir); | 39 | extern int btrfs_xattr_security_init(struct btrfs_trans_handle *trans, |
40 | struct inode *inode, struct inode *dir); | ||
40 | 41 | ||
41 | #endif /* __XATTR__ */ | 42 | #endif /* __XATTR__ */ |
diff --git a/fs/direct-io.c b/fs/direct-io.c index 4012885d027f..e82adc2debb7 100644 --- a/fs/direct-io.c +++ b/fs/direct-io.c | |||
@@ -1206,7 +1206,7 @@ __blockdev_direct_IO(int rw, struct kiocb *iocb, struct inode *inode, | |||
1206 | * NOTE: filesystems with their own locking have to handle this | 1206 | * NOTE: filesystems with their own locking have to handle this |
1207 | * on their own. | 1207 | * on their own. |
1208 | */ | 1208 | */ |
1209 | if (dio->flags & DIO_LOCKING) { | 1209 | if (flags & DIO_LOCKING) { |
1210 | if (unlikely((rw & WRITE) && retval < 0)) { | 1210 | if (unlikely((rw & WRITE) && retval < 0)) { |
1211 | loff_t isize = i_size_read(inode); | 1211 | loff_t isize = i_size_read(inode); |
1212 | if (end > isize) | 1212 | if (end > isize) |
diff --git a/fs/ecryptfs/dentry.c b/fs/ecryptfs/dentry.c index 2dda5ade75bc..8f006a0d6076 100644 --- a/fs/ecryptfs/dentry.c +++ b/fs/ecryptfs/dentry.c | |||
@@ -62,7 +62,7 @@ static int ecryptfs_d_revalidate(struct dentry *dentry, struct nameidata *nd) | |||
62 | struct inode *lower_inode = | 62 | struct inode *lower_inode = |
63 | ecryptfs_inode_to_lower(dentry->d_inode); | 63 | ecryptfs_inode_to_lower(dentry->d_inode); |
64 | 64 | ||
65 | fsstack_copy_attr_all(dentry->d_inode, lower_inode, NULL); | 65 | fsstack_copy_attr_all(dentry->d_inode, lower_inode); |
66 | } | 66 | } |
67 | out: | 67 | out: |
68 | return rc; | 68 | return rc; |
diff --git a/fs/ecryptfs/inode.c b/fs/ecryptfs/inode.c index 056fed62d0de..429ca0b3ba08 100644 --- a/fs/ecryptfs/inode.c +++ b/fs/ecryptfs/inode.c | |||
@@ -626,9 +626,9 @@ ecryptfs_rename(struct inode *old_dir, struct dentry *old_dentry, | |||
626 | lower_new_dir_dentry->d_inode, lower_new_dentry); | 626 | lower_new_dir_dentry->d_inode, lower_new_dentry); |
627 | if (rc) | 627 | if (rc) |
628 | goto out_lock; | 628 | goto out_lock; |
629 | fsstack_copy_attr_all(new_dir, lower_new_dir_dentry->d_inode, NULL); | 629 | fsstack_copy_attr_all(new_dir, lower_new_dir_dentry->d_inode); |
630 | if (new_dir != old_dir) | 630 | if (new_dir != old_dir) |
631 | fsstack_copy_attr_all(old_dir, lower_old_dir_dentry->d_inode, NULL); | 631 | fsstack_copy_attr_all(old_dir, lower_old_dir_dentry->d_inode); |
632 | out_lock: | 632 | out_lock: |
633 | unlock_rename(lower_old_dir_dentry, lower_new_dir_dentry); | 633 | unlock_rename(lower_old_dir_dentry, lower_new_dir_dentry); |
634 | dput(lower_new_dentry->d_parent); | 634 | dput(lower_new_dentry->d_parent); |
@@ -967,7 +967,7 @@ static int ecryptfs_setattr(struct dentry *dentry, struct iattr *ia) | |||
967 | rc = notify_change(lower_dentry, ia); | 967 | rc = notify_change(lower_dentry, ia); |
968 | mutex_unlock(&lower_dentry->d_inode->i_mutex); | 968 | mutex_unlock(&lower_dentry->d_inode->i_mutex); |
969 | out: | 969 | out: |
970 | fsstack_copy_attr_all(inode, lower_inode, NULL); | 970 | fsstack_copy_attr_all(inode, lower_inode); |
971 | return rc; | 971 | return rc; |
972 | } | 972 | } |
973 | 973 | ||
diff --git a/fs/ecryptfs/main.c b/fs/ecryptfs/main.c index 101fe4c7b1ee..567bc4b9f70a 100644 --- a/fs/ecryptfs/main.c +++ b/fs/ecryptfs/main.c | |||
@@ -189,7 +189,7 @@ int ecryptfs_interpose(struct dentry *lower_dentry, struct dentry *dentry, | |||
189 | init_special_inode(inode, lower_inode->i_mode, | 189 | init_special_inode(inode, lower_inode->i_mode, |
190 | lower_inode->i_rdev); | 190 | lower_inode->i_rdev); |
191 | dentry->d_op = &ecryptfs_dops; | 191 | dentry->d_op = &ecryptfs_dops; |
192 | fsstack_copy_attr_all(inode, lower_inode, NULL); | 192 | fsstack_copy_attr_all(inode, lower_inode); |
193 | /* This size will be overwritten for real files w/ headers and | 193 | /* This size will be overwritten for real files w/ headers and |
194 | * other metadata */ | 194 | * other metadata */ |
195 | fsstack_copy_inode_size(inode, lower_inode); | 195 | fsstack_copy_inode_size(inode, lower_inode); |
@@ -826,7 +826,9 @@ static int de_thread(struct task_struct *tsk) | |||
826 | attach_pid(tsk, PIDTYPE_PID, task_pid(leader)); | 826 | attach_pid(tsk, PIDTYPE_PID, task_pid(leader)); |
827 | transfer_pid(leader, tsk, PIDTYPE_PGID); | 827 | transfer_pid(leader, tsk, PIDTYPE_PGID); |
828 | transfer_pid(leader, tsk, PIDTYPE_SID); | 828 | transfer_pid(leader, tsk, PIDTYPE_SID); |
829 | |||
829 | list_replace_rcu(&leader->tasks, &tsk->tasks); | 830 | list_replace_rcu(&leader->tasks, &tsk->tasks); |
831 | list_replace_init(&leader->sibling, &tsk->sibling); | ||
830 | 832 | ||
831 | tsk->group_leader = tsk; | 833 | tsk->group_leader = tsk; |
832 | leader->group_leader = tsk; | 834 | leader->group_leader = tsk; |
@@ -1761,17 +1763,20 @@ void do_coredump(long signr, int exit_code, struct pt_regs *regs) | |||
1761 | struct mm_struct *mm = current->mm; | 1763 | struct mm_struct *mm = current->mm; |
1762 | struct linux_binfmt * binfmt; | 1764 | struct linux_binfmt * binfmt; |
1763 | struct inode * inode; | 1765 | struct inode * inode; |
1764 | struct file * file; | ||
1765 | const struct cred *old_cred; | 1766 | const struct cred *old_cred; |
1766 | struct cred *cred; | 1767 | struct cred *cred; |
1767 | int retval = 0; | 1768 | int retval = 0; |
1768 | int flag = 0; | 1769 | int flag = 0; |
1769 | int ispipe = 0; | 1770 | int ispipe = 0; |
1770 | unsigned long core_limit = current->signal->rlim[RLIMIT_CORE].rlim_cur; | ||
1771 | char **helper_argv = NULL; | 1771 | char **helper_argv = NULL; |
1772 | int helper_argc = 0; | 1772 | int helper_argc = 0; |
1773 | int dump_count = 0; | 1773 | int dump_count = 0; |
1774 | static atomic_t core_dump_count = ATOMIC_INIT(0); | 1774 | static atomic_t core_dump_count = ATOMIC_INIT(0); |
1775 | struct coredump_params cprm = { | ||
1776 | .signr = signr, | ||
1777 | .regs = regs, | ||
1778 | .limit = current->signal->rlim[RLIMIT_CORE].rlim_cur, | ||
1779 | }; | ||
1775 | 1780 | ||
1776 | audit_core_dumps(signr); | 1781 | audit_core_dumps(signr); |
1777 | 1782 | ||
@@ -1827,15 +1832,15 @@ void do_coredump(long signr, int exit_code, struct pt_regs *regs) | |||
1827 | ispipe = format_corename(corename, signr); | 1832 | ispipe = format_corename(corename, signr); |
1828 | unlock_kernel(); | 1833 | unlock_kernel(); |
1829 | 1834 | ||
1830 | if ((!ispipe) && (core_limit < binfmt->min_coredump)) | 1835 | if ((!ispipe) && (cprm.limit < binfmt->min_coredump)) |
1831 | goto fail_unlock; | 1836 | goto fail_unlock; |
1832 | 1837 | ||
1833 | if (ispipe) { | 1838 | if (ispipe) { |
1834 | if (core_limit == 0) { | 1839 | if (cprm.limit == 0) { |
1835 | /* | 1840 | /* |
1836 | * Normally core limits are irrelevant to pipes, since | 1841 | * Normally core limits are irrelevant to pipes, since |
1837 | * we're not writing to the file system, but we use | 1842 | * we're not writing to the file system, but we use |
1838 | * core_limit of 0 here as a speacial value. Any | 1843 | * cprm.limit of 0 here as a speacial value. Any |
1839 | * non-zero limit gets set to RLIM_INFINITY below, but | 1844 | * non-zero limit gets set to RLIM_INFINITY below, but |
1840 | * a limit of 0 skips the dump. This is a consistent | 1845 | * a limit of 0 skips the dump. This is a consistent |
1841 | * way to catch recursive crashes. We can still crash | 1846 | * way to catch recursive crashes. We can still crash |
@@ -1868,25 +1873,25 @@ void do_coredump(long signr, int exit_code, struct pt_regs *regs) | |||
1868 | goto fail_dropcount; | 1873 | goto fail_dropcount; |
1869 | } | 1874 | } |
1870 | 1875 | ||
1871 | core_limit = RLIM_INFINITY; | 1876 | cprm.limit = RLIM_INFINITY; |
1872 | 1877 | ||
1873 | /* SIGPIPE can happen, but it's just never processed */ | 1878 | /* SIGPIPE can happen, but it's just never processed */ |
1874 | if (call_usermodehelper_pipe(helper_argv[0], helper_argv, NULL, | 1879 | if (call_usermodehelper_pipe(helper_argv[0], helper_argv, NULL, |
1875 | &file)) { | 1880 | &cprm.file)) { |
1876 | printk(KERN_INFO "Core dump to %s pipe failed\n", | 1881 | printk(KERN_INFO "Core dump to %s pipe failed\n", |
1877 | corename); | 1882 | corename); |
1878 | goto fail_dropcount; | 1883 | goto fail_dropcount; |
1879 | } | 1884 | } |
1880 | } else | 1885 | } else |
1881 | file = filp_open(corename, | 1886 | cprm.file = filp_open(corename, |
1882 | O_CREAT | 2 | O_NOFOLLOW | O_LARGEFILE | flag, | 1887 | O_CREAT | 2 | O_NOFOLLOW | O_LARGEFILE | flag, |
1883 | 0600); | 1888 | 0600); |
1884 | if (IS_ERR(file)) | 1889 | if (IS_ERR(cprm.file)) |
1885 | goto fail_dropcount; | 1890 | goto fail_dropcount; |
1886 | inode = file->f_path.dentry->d_inode; | 1891 | inode = cprm.file->f_path.dentry->d_inode; |
1887 | if (inode->i_nlink > 1) | 1892 | if (inode->i_nlink > 1) |
1888 | goto close_fail; /* multiple links - don't dump */ | 1893 | goto close_fail; /* multiple links - don't dump */ |
1889 | if (!ispipe && d_unhashed(file->f_path.dentry)) | 1894 | if (!ispipe && d_unhashed(cprm.file->f_path.dentry)) |
1890 | goto close_fail; | 1895 | goto close_fail; |
1891 | 1896 | ||
1892 | /* AK: actually i see no reason to not allow this for named pipes etc., | 1897 | /* AK: actually i see no reason to not allow this for named pipes etc., |
@@ -1899,21 +1904,22 @@ void do_coredump(long signr, int exit_code, struct pt_regs *regs) | |||
1899 | */ | 1904 | */ |
1900 | if (inode->i_uid != current_fsuid()) | 1905 | if (inode->i_uid != current_fsuid()) |
1901 | goto close_fail; | 1906 | goto close_fail; |
1902 | if (!file->f_op) | 1907 | if (!cprm.file->f_op) |
1903 | goto close_fail; | 1908 | goto close_fail; |
1904 | if (!file->f_op->write) | 1909 | if (!cprm.file->f_op->write) |
1905 | goto close_fail; | 1910 | goto close_fail; |
1906 | if (!ispipe && do_truncate(file->f_path.dentry, 0, 0, file) != 0) | 1911 | if (!ispipe && |
1912 | do_truncate(cprm.file->f_path.dentry, 0, 0, cprm.file) != 0) | ||
1907 | goto close_fail; | 1913 | goto close_fail; |
1908 | 1914 | ||
1909 | retval = binfmt->core_dump(signr, regs, file, core_limit); | 1915 | retval = binfmt->core_dump(&cprm); |
1910 | 1916 | ||
1911 | if (retval) | 1917 | if (retval) |
1912 | current->signal->group_exit_code |= 0x80; | 1918 | current->signal->group_exit_code |= 0x80; |
1913 | close_fail: | 1919 | close_fail: |
1914 | if (ispipe && core_pipe_limit) | 1920 | if (ispipe && core_pipe_limit) |
1915 | wait_for_dump_helpers(file); | 1921 | wait_for_dump_helpers(cprm.file); |
1916 | filp_close(file, NULL); | 1922 | filp_close(cprm.file, NULL); |
1917 | fail_dropcount: | 1923 | fail_dropcount: |
1918 | if (dump_count) | 1924 | if (dump_count) |
1919 | atomic_dec(&core_dump_count); | 1925 | atomic_dec(&core_dump_count); |
diff --git a/fs/ext4/Kconfig b/fs/ext4/Kconfig index e5f6774846e4..9acf7e808139 100644 --- a/fs/ext4/Kconfig +++ b/fs/ext4/Kconfig | |||
@@ -2,7 +2,6 @@ config EXT4_FS | |||
2 | tristate "The Extended 4 (ext4) filesystem" | 2 | tristate "The Extended 4 (ext4) filesystem" |
3 | select JBD2 | 3 | select JBD2 |
4 | select CRC16 | 4 | select CRC16 |
5 | select FS_JOURNAL_INFO | ||
6 | help | 5 | help |
7 | This is the next generation of the ext3 filesystem. | 6 | This is the next generation of the ext3 filesystem. |
8 | 7 | ||
diff --git a/fs/gfs2/Kconfig b/fs/gfs2/Kconfig index b192c661caa6..4dcddf83326f 100644 --- a/fs/gfs2/Kconfig +++ b/fs/gfs2/Kconfig | |||
@@ -10,7 +10,6 @@ config GFS2_FS | |||
10 | select SLOW_WORK | 10 | select SLOW_WORK |
11 | select QUOTA | 11 | select QUOTA |
12 | select QUOTACTL | 12 | select QUOTACTL |
13 | select FS_JOURNAL_INFO | ||
14 | help | 13 | help |
15 | A cluster filesystem. | 14 | A cluster filesystem. |
16 | 15 | ||
diff --git a/fs/gfs2/inode.c b/fs/gfs2/inode.c index 3ff32fa793da..6e220f4eee7d 100644 --- a/fs/gfs2/inode.c +++ b/fs/gfs2/inode.c | |||
@@ -125,7 +125,7 @@ static struct inode *gfs2_iget_skip(struct super_block *sb, | |||
125 | * directory entry when gfs2_inode_lookup() is invoked. Part of the code | 125 | * directory entry when gfs2_inode_lookup() is invoked. Part of the code |
126 | * segment inside gfs2_inode_lookup code needs to get moved around. | 126 | * segment inside gfs2_inode_lookup code needs to get moved around. |
127 | * | 127 | * |
128 | * Clean up I_LOCK and I_NEW as well. | 128 | * Clears I_NEW as well. |
129 | **/ | 129 | **/ |
130 | 130 | ||
131 | void gfs2_set_iop(struct inode *inode) | 131 | void gfs2_set_iop(struct inode *inode) |
diff --git a/fs/inode.c b/fs/inode.c index 06c1f02de611..03dfeb2e3928 100644 --- a/fs/inode.c +++ b/fs/inode.c | |||
@@ -113,7 +113,7 @@ static void wake_up_inode(struct inode *inode) | |||
113 | * Prevent speculative execution through spin_unlock(&inode_lock); | 113 | * Prevent speculative execution through spin_unlock(&inode_lock); |
114 | */ | 114 | */ |
115 | smp_mb(); | 115 | smp_mb(); |
116 | wake_up_bit(&inode->i_state, __I_LOCK); | 116 | wake_up_bit(&inode->i_state, __I_NEW); |
117 | } | 117 | } |
118 | 118 | ||
119 | /** | 119 | /** |
@@ -690,17 +690,17 @@ void unlock_new_inode(struct inode *inode) | |||
690 | } | 690 | } |
691 | #endif | 691 | #endif |
692 | /* | 692 | /* |
693 | * This is special! We do not need the spinlock when clearing I_LOCK, | 693 | * This is special! We do not need the spinlock when clearing I_NEW, |
694 | * because we're guaranteed that nobody else tries to do anything about | 694 | * because we're guaranteed that nobody else tries to do anything about |
695 | * the state of the inode when it is locked, as we just created it (so | 695 | * the state of the inode when it is locked, as we just created it (so |
696 | * there can be no old holders that haven't tested I_LOCK). | 696 | * there can be no old holders that haven't tested I_NEW). |
697 | * However we must emit the memory barrier so that other CPUs reliably | 697 | * However we must emit the memory barrier so that other CPUs reliably |
698 | * see the clearing of I_LOCK after the other inode initialisation has | 698 | * see the clearing of I_NEW after the other inode initialisation has |
699 | * completed. | 699 | * completed. |
700 | */ | 700 | */ |
701 | smp_mb(); | 701 | smp_mb(); |
702 | WARN_ON((inode->i_state & (I_LOCK|I_NEW)) != (I_LOCK|I_NEW)); | 702 | WARN_ON(!(inode->i_state & I_NEW)); |
703 | inode->i_state &= ~(I_LOCK|I_NEW); | 703 | inode->i_state &= ~I_NEW; |
704 | wake_up_inode(inode); | 704 | wake_up_inode(inode); |
705 | } | 705 | } |
706 | EXPORT_SYMBOL(unlock_new_inode); | 706 | EXPORT_SYMBOL(unlock_new_inode); |
@@ -731,7 +731,7 @@ static struct inode *get_new_inode(struct super_block *sb, | |||
731 | goto set_failed; | 731 | goto set_failed; |
732 | 732 | ||
733 | __inode_add_to_lists(sb, head, inode); | 733 | __inode_add_to_lists(sb, head, inode); |
734 | inode->i_state = I_LOCK|I_NEW; | 734 | inode->i_state = I_NEW; |
735 | spin_unlock(&inode_lock); | 735 | spin_unlock(&inode_lock); |
736 | 736 | ||
737 | /* Return the locked inode with I_NEW set, the | 737 | /* Return the locked inode with I_NEW set, the |
@@ -778,7 +778,7 @@ static struct inode *get_new_inode_fast(struct super_block *sb, | |||
778 | if (!old) { | 778 | if (!old) { |
779 | inode->i_ino = ino; | 779 | inode->i_ino = ino; |
780 | __inode_add_to_lists(sb, head, inode); | 780 | __inode_add_to_lists(sb, head, inode); |
781 | inode->i_state = I_LOCK|I_NEW; | 781 | inode->i_state = I_NEW; |
782 | spin_unlock(&inode_lock); | 782 | spin_unlock(&inode_lock); |
783 | 783 | ||
784 | /* Return the locked inode with I_NEW set, the | 784 | /* Return the locked inode with I_NEW set, the |
@@ -1083,7 +1083,7 @@ int insert_inode_locked(struct inode *inode) | |||
1083 | ino_t ino = inode->i_ino; | 1083 | ino_t ino = inode->i_ino; |
1084 | struct hlist_head *head = inode_hashtable + hash(sb, ino); | 1084 | struct hlist_head *head = inode_hashtable + hash(sb, ino); |
1085 | 1085 | ||
1086 | inode->i_state |= I_LOCK|I_NEW; | 1086 | inode->i_state |= I_NEW; |
1087 | while (1) { | 1087 | while (1) { |
1088 | struct hlist_node *node; | 1088 | struct hlist_node *node; |
1089 | struct inode *old = NULL; | 1089 | struct inode *old = NULL; |
@@ -1120,7 +1120,7 @@ int insert_inode_locked4(struct inode *inode, unsigned long hashval, | |||
1120 | struct super_block *sb = inode->i_sb; | 1120 | struct super_block *sb = inode->i_sb; |
1121 | struct hlist_head *head = inode_hashtable + hash(sb, hashval); | 1121 | struct hlist_head *head = inode_hashtable + hash(sb, hashval); |
1122 | 1122 | ||
1123 | inode->i_state |= I_LOCK|I_NEW; | 1123 | inode->i_state |= I_NEW; |
1124 | 1124 | ||
1125 | while (1) { | 1125 | while (1) { |
1126 | struct hlist_node *node; | 1126 | struct hlist_node *node; |
@@ -1510,7 +1510,7 @@ EXPORT_SYMBOL(inode_wait); | |||
1510 | * until the deletion _might_ have completed. Callers are responsible | 1510 | * until the deletion _might_ have completed. Callers are responsible |
1511 | * to recheck inode state. | 1511 | * to recheck inode state. |
1512 | * | 1512 | * |
1513 | * It doesn't matter if I_LOCK is not set initially, a call to | 1513 | * It doesn't matter if I_NEW is not set initially, a call to |
1514 | * wake_up_inode() after removing from the hash list will DTRT. | 1514 | * wake_up_inode() after removing from the hash list will DTRT. |
1515 | * | 1515 | * |
1516 | * This is called with inode_lock held. | 1516 | * This is called with inode_lock held. |
@@ -1518,8 +1518,8 @@ EXPORT_SYMBOL(inode_wait); | |||
1518 | static void __wait_on_freeing_inode(struct inode *inode) | 1518 | static void __wait_on_freeing_inode(struct inode *inode) |
1519 | { | 1519 | { |
1520 | wait_queue_head_t *wq; | 1520 | wait_queue_head_t *wq; |
1521 | DEFINE_WAIT_BIT(wait, &inode->i_state, __I_LOCK); | 1521 | DEFINE_WAIT_BIT(wait, &inode->i_state, __I_NEW); |
1522 | wq = bit_waitqueue(&inode->i_state, __I_LOCK); | 1522 | wq = bit_waitqueue(&inode->i_state, __I_NEW); |
1523 | prepare_to_wait(wq, &wait.wait, TASK_UNINTERRUPTIBLE); | 1523 | prepare_to_wait(wq, &wait.wait, TASK_UNINTERRUPTIBLE); |
1524 | spin_unlock(&inode_lock); | 1524 | spin_unlock(&inode_lock); |
1525 | schedule(); | 1525 | schedule(); |
diff --git a/fs/jbd/Kconfig b/fs/jbd/Kconfig index a8408983abd4..4e28beeed157 100644 --- a/fs/jbd/Kconfig +++ b/fs/jbd/Kconfig | |||
@@ -1,6 +1,5 @@ | |||
1 | config JBD | 1 | config JBD |
2 | tristate | 2 | tristate |
3 | select FS_JOURNAL_INFO | ||
4 | help | 3 | help |
5 | This is a generic journalling layer for block devices. It is | 4 | This is a generic journalling layer for block devices. It is |
6 | currently used by the ext3 file system, but it could also be | 5 | currently used by the ext3 file system, but it could also be |
diff --git a/fs/jbd2/Kconfig b/fs/jbd2/Kconfig index 0f7d1ceafdfd..f32f346f4b0a 100644 --- a/fs/jbd2/Kconfig +++ b/fs/jbd2/Kconfig | |||
@@ -1,7 +1,6 @@ | |||
1 | config JBD2 | 1 | config JBD2 |
2 | tristate | 2 | tristate |
3 | select CRC32 | 3 | select CRC32 |
4 | select FS_JOURNAL_INFO | ||
5 | help | 4 | help |
6 | This is a generic journaling layer for block devices that support | 5 | This is a generic journaling layer for block devices that support |
7 | both 32-bit and 64-bit block numbers. It is currently used by | 6 | both 32-bit and 64-bit block numbers. It is currently used by |
diff --git a/fs/jfs/jfs_txnmgr.c b/fs/jfs/jfs_txnmgr.c index f26e4d03ada5..d945ea76b445 100644 --- a/fs/jfs/jfs_txnmgr.c +++ b/fs/jfs/jfs_txnmgr.c | |||
@@ -1292,7 +1292,7 @@ int txCommit(tid_t tid, /* transaction identifier */ | |||
1292 | */ | 1292 | */ |
1293 | /* | 1293 | /* |
1294 | * I believe this code is no longer needed. Splitting I_LOCK | 1294 | * I believe this code is no longer needed. Splitting I_LOCK |
1295 | * into two bits, I_LOCK and I_SYNC should prevent this | 1295 | * into two bits, I_NEW and I_SYNC should prevent this |
1296 | * deadlock as well. But since I don't have a JFS testload | 1296 | * deadlock as well. But since I don't have a JFS testload |
1297 | * to verify this, only a trivial s/I_LOCK/I_SYNC/ was done. | 1297 | * to verify this, only a trivial s/I_LOCK/I_SYNC/ was done. |
1298 | * Joern | 1298 | * Joern |
diff --git a/fs/namei.c b/fs/namei.c index d2783c8a770b..dad4b80257db 100644 --- a/fs/namei.c +++ b/fs/namei.c | |||
@@ -1764,7 +1764,7 @@ do_last: | |||
1764 | 1764 | ||
1765 | path_to_nameidata(&path, &nd); | 1765 | path_to_nameidata(&path, &nd); |
1766 | error = -EISDIR; | 1766 | error = -EISDIR; |
1767 | if (path.dentry->d_inode && S_ISDIR(path.dentry->d_inode->i_mode)) | 1767 | if (S_ISDIR(path.dentry->d_inode->i_mode)) |
1768 | goto exit; | 1768 | goto exit; |
1769 | ok: | 1769 | ok: |
1770 | /* | 1770 | /* |
diff --git a/fs/namespace.c b/fs/namespace.c index faab1273281e..7d70d63ceb29 100644 --- a/fs/namespace.c +++ b/fs/namespace.c | |||
@@ -2068,7 +2068,7 @@ struct mnt_namespace *copy_mnt_ns(unsigned long flags, struct mnt_namespace *ns, | |||
2068 | * create_mnt_ns - creates a private namespace and adds a root filesystem | 2068 | * create_mnt_ns - creates a private namespace and adds a root filesystem |
2069 | * @mnt: pointer to the new root filesystem mountpoint | 2069 | * @mnt: pointer to the new root filesystem mountpoint |
2070 | */ | 2070 | */ |
2071 | static struct mnt_namespace *create_mnt_ns(struct vfsmount *mnt) | 2071 | struct mnt_namespace *create_mnt_ns(struct vfsmount *mnt) |
2072 | { | 2072 | { |
2073 | struct mnt_namespace *new_ns; | 2073 | struct mnt_namespace *new_ns; |
2074 | 2074 | ||
@@ -2080,6 +2080,7 @@ static struct mnt_namespace *create_mnt_ns(struct vfsmount *mnt) | |||
2080 | } | 2080 | } |
2081 | return new_ns; | 2081 | return new_ns; |
2082 | } | 2082 | } |
2083 | EXPORT_SYMBOL(create_mnt_ns); | ||
2083 | 2084 | ||
2084 | SYSCALL_DEFINE5(mount, char __user *, dev_name, char __user *, dir_name, | 2085 | SYSCALL_DEFINE5(mount, char __user *, dev_name, char __user *, dir_name, |
2085 | char __user *, type, unsigned long, flags, void __user *, data) | 2086 | char __user *, type, unsigned long, flags, void __user *, data) |
diff --git a/fs/nfs/super.c b/fs/nfs/super.c index d5b112bcf3de..ce907efc5508 100644 --- a/fs/nfs/super.c +++ b/fs/nfs/super.c | |||
@@ -2648,13 +2648,21 @@ out_freepage: | |||
2648 | static int nfs_follow_remote_path(struct vfsmount *root_mnt, | 2648 | static int nfs_follow_remote_path(struct vfsmount *root_mnt, |
2649 | const char *export_path, struct vfsmount *mnt_target) | 2649 | const char *export_path, struct vfsmount *mnt_target) |
2650 | { | 2650 | { |
2651 | struct mnt_namespace *ns_private; | ||
2651 | struct nameidata nd; | 2652 | struct nameidata nd; |
2652 | struct super_block *s; | 2653 | struct super_block *s; |
2653 | int ret; | 2654 | int ret; |
2654 | 2655 | ||
2656 | ns_private = create_mnt_ns(root_mnt); | ||
2657 | ret = PTR_ERR(ns_private); | ||
2658 | if (IS_ERR(ns_private)) | ||
2659 | goto out_mntput; | ||
2660 | |||
2655 | ret = vfs_path_lookup(root_mnt->mnt_root, root_mnt, | 2661 | ret = vfs_path_lookup(root_mnt->mnt_root, root_mnt, |
2656 | export_path, LOOKUP_FOLLOW, &nd); | 2662 | export_path, LOOKUP_FOLLOW, &nd); |
2657 | 2663 | ||
2664 | put_mnt_ns(ns_private); | ||
2665 | |||
2658 | if (ret != 0) | 2666 | if (ret != 0) |
2659 | goto out_err; | 2667 | goto out_err; |
2660 | 2668 | ||
diff --git a/fs/nilfs2/Kconfig b/fs/nilfs2/Kconfig index 1225af7b2166..251da07b2a1d 100644 --- a/fs/nilfs2/Kconfig +++ b/fs/nilfs2/Kconfig | |||
@@ -2,7 +2,6 @@ config NILFS2_FS | |||
2 | tristate "NILFS2 file system support (EXPERIMENTAL)" | 2 | tristate "NILFS2 file system support (EXPERIMENTAL)" |
3 | depends on EXPERIMENTAL | 3 | depends on EXPERIMENTAL |
4 | select CRC32 | 4 | select CRC32 |
5 | select FS_JOURNAL_INFO | ||
6 | help | 5 | help |
7 | NILFS2 is a log-structured file system (LFS) supporting continuous | 6 | NILFS2 is a log-structured file system (LFS) supporting continuous |
8 | snapshotting. In addition to versioning capability of the entire | 7 | snapshotting. In addition to versioning capability of the entire |
diff --git a/fs/ntfs/inode.c b/fs/ntfs/inode.c index 9938034762cc..dc2505abb6d7 100644 --- a/fs/ntfs/inode.c +++ b/fs/ntfs/inode.c | |||
@@ -530,7 +530,7 @@ err_corrupt_attr: | |||
530 | * the ntfs inode. | 530 | * the ntfs inode. |
531 | * | 531 | * |
532 | * Q: What locks are held when the function is called? | 532 | * Q: What locks are held when the function is called? |
533 | * A: i_state has I_LOCK set, hence the inode is locked, also | 533 | * A: i_state has I_NEW set, hence the inode is locked, also |
534 | * i_count is set to 1, so it is not going to go away | 534 | * i_count is set to 1, so it is not going to go away |
535 | * i_flags is set to 0 and we have no business touching it. Only an ioctl() | 535 | * i_flags is set to 0 and we have no business touching it. Only an ioctl() |
536 | * is allowed to write to them. We should of course be honouring them but | 536 | * is allowed to write to them. We should of course be honouring them but |
@@ -1207,7 +1207,7 @@ err_out: | |||
1207 | * necessary fields in @vi as well as initializing the ntfs inode. | 1207 | * necessary fields in @vi as well as initializing the ntfs inode. |
1208 | * | 1208 | * |
1209 | * Q: What locks are held when the function is called? | 1209 | * Q: What locks are held when the function is called? |
1210 | * A: i_state has I_LOCK set, hence the inode is locked, also | 1210 | * A: i_state has I_NEW set, hence the inode is locked, also |
1211 | * i_count is set to 1, so it is not going to go away | 1211 | * i_count is set to 1, so it is not going to go away |
1212 | * | 1212 | * |
1213 | * Return 0 on success and -errno on error. In the error case, the inode will | 1213 | * Return 0 on success and -errno on error. In the error case, the inode will |
@@ -1474,7 +1474,7 @@ err_out: | |||
1474 | * normal directory inodes. | 1474 | * normal directory inodes. |
1475 | * | 1475 | * |
1476 | * Q: What locks are held when the function is called? | 1476 | * Q: What locks are held when the function is called? |
1477 | * A: i_state has I_LOCK set, hence the inode is locked, also | 1477 | * A: i_state has I_NEW set, hence the inode is locked, also |
1478 | * i_count is set to 1, so it is not going to go away | 1478 | * i_count is set to 1, so it is not going to go away |
1479 | * | 1479 | * |
1480 | * Return 0 on success and -errno on error. In the error case, the inode will | 1480 | * Return 0 on success and -errno on error. In the error case, the inode will |
@@ -906,17 +906,6 @@ void free_pipe_info(struct inode *inode) | |||
906 | } | 906 | } |
907 | 907 | ||
908 | static struct vfsmount *pipe_mnt __read_mostly; | 908 | static struct vfsmount *pipe_mnt __read_mostly; |
909 | static int pipefs_delete_dentry(struct dentry *dentry) | ||
910 | { | ||
911 | /* | ||
912 | * At creation time, we pretended this dentry was hashed | ||
913 | * (by clearing DCACHE_UNHASHED bit in d_flags) | ||
914 | * At delete time, we restore the truth : not hashed. | ||
915 | * (so that dput() can proceed correctly) | ||
916 | */ | ||
917 | dentry->d_flags |= DCACHE_UNHASHED; | ||
918 | return 0; | ||
919 | } | ||
920 | 909 | ||
921 | /* | 910 | /* |
922 | * pipefs_dname() is called from d_path(). | 911 | * pipefs_dname() is called from d_path(). |
@@ -928,7 +917,6 @@ static char *pipefs_dname(struct dentry *dentry, char *buffer, int buflen) | |||
928 | } | 917 | } |
929 | 918 | ||
930 | static const struct dentry_operations pipefs_dentry_operations = { | 919 | static const struct dentry_operations pipefs_dentry_operations = { |
931 | .d_delete = pipefs_delete_dentry, | ||
932 | .d_dname = pipefs_dname, | 920 | .d_dname = pipefs_dname, |
933 | }; | 921 | }; |
934 | 922 | ||
@@ -989,12 +977,6 @@ struct file *create_write_pipe(int flags) | |||
989 | path.mnt = mntget(pipe_mnt); | 977 | path.mnt = mntget(pipe_mnt); |
990 | 978 | ||
991 | path.dentry->d_op = &pipefs_dentry_operations; | 979 | path.dentry->d_op = &pipefs_dentry_operations; |
992 | /* | ||
993 | * We dont want to publish this dentry into global dentry hash table. | ||
994 | * We pretend dentry is already hashed, by unsetting DCACHE_UNHASHED | ||
995 | * This permits a working /proc/$pid/fd/XXX on pipes | ||
996 | */ | ||
997 | path.dentry->d_flags &= ~DCACHE_UNHASHED; | ||
998 | d_instantiate(path.dentry, inode); | 980 | d_instantiate(path.dentry, inode); |
999 | 981 | ||
1000 | err = -ENFILE; | 982 | err = -ENFILE; |
diff --git a/fs/proc/array.c b/fs/proc/array.c index 4badde179b18..f560325c444f 100644 --- a/fs/proc/array.c +++ b/fs/proc/array.c | |||
@@ -134,13 +134,16 @@ static inline void task_name(struct seq_file *m, struct task_struct *p) | |||
134 | * simple bit tests. | 134 | * simple bit tests. |
135 | */ | 135 | */ |
136 | static const char *task_state_array[] = { | 136 | static const char *task_state_array[] = { |
137 | "R (running)", /* 0 */ | 137 | "R (running)", /* 0 */ |
138 | "S (sleeping)", /* 1 */ | 138 | "S (sleeping)", /* 1 */ |
139 | "D (disk sleep)", /* 2 */ | 139 | "D (disk sleep)", /* 2 */ |
140 | "T (stopped)", /* 4 */ | 140 | "T (stopped)", /* 4 */ |
141 | "T (tracing stop)", /* 8 */ | 141 | "t (tracing stop)", /* 8 */ |
142 | "Z (zombie)", /* 16 */ | 142 | "Z (zombie)", /* 16 */ |
143 | "X (dead)" /* 32 */ | 143 | "X (dead)", /* 32 */ |
144 | "x (dead)", /* 64 */ | ||
145 | "K (wakekill)", /* 128 */ | ||
146 | "W (waking)", /* 256 */ | ||
144 | }; | 147 | }; |
145 | 148 | ||
146 | static inline const char *get_task_state(struct task_struct *tsk) | 149 | static inline const char *get_task_state(struct task_struct *tsk) |
@@ -148,6 +151,8 @@ static inline const char *get_task_state(struct task_struct *tsk) | |||
148 | unsigned int state = (tsk->state & TASK_REPORT) | tsk->exit_state; | 151 | unsigned int state = (tsk->state & TASK_REPORT) | tsk->exit_state; |
149 | const char **p = &task_state_array[0]; | 152 | const char **p = &task_state_array[0]; |
150 | 153 | ||
154 | BUILD_BUG_ON(1 + ilog2(TASK_STATE_MAX) != ARRAY_SIZE(task_state_array)); | ||
155 | |||
151 | while (state) { | 156 | while (state) { |
152 | p++; | 157 | p++; |
153 | state >>= 1; | 158 | state >>= 1; |
diff --git a/fs/ramfs/file-nommu.c b/fs/ramfs/file-nommu.c index 32fae4040ebf..2efc57173fd7 100644 --- a/fs/ramfs/file-nommu.c +++ b/fs/ramfs/file-nommu.c | |||
@@ -60,7 +60,7 @@ const struct inode_operations ramfs_file_inode_operations = { | |||
60 | */ | 60 | */ |
61 | int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize) | 61 | int ramfs_nommu_expand_for_mapping(struct inode *inode, size_t newsize) |
62 | { | 62 | { |
63 | unsigned long npages, xpages, loop, limit; | 63 | unsigned long npages, xpages, loop; |
64 | struct page *pages; | 64 | struct page *pages; |
65 | unsigned order; | 65 | unsigned order; |
66 | void *data; | 66 | void *data; |
diff --git a/fs/reiserfs/Kconfig b/fs/reiserfs/Kconfig index ac7cd75c86f8..513f431038f9 100644 --- a/fs/reiserfs/Kconfig +++ b/fs/reiserfs/Kconfig | |||
@@ -1,7 +1,6 @@ | |||
1 | config REISERFS_FS | 1 | config REISERFS_FS |
2 | tristate "Reiserfs support" | 2 | tristate "Reiserfs support" |
3 | select CRC32 | 3 | select CRC32 |
4 | select FS_JOURNAL_INFO | ||
5 | help | 4 | help |
6 | Stores not just filenames but the files themselves in a balanced | 5 | Stores not just filenames but the files themselves in a balanced |
7 | tree. Uses journalling. | 6 | tree. Uses journalling. |
diff --git a/fs/reiserfs/inode.c b/fs/reiserfs/inode.c index 3a28e7751b3c..290ae38fca8a 100644 --- a/fs/reiserfs/inode.c +++ b/fs/reiserfs/inode.c | |||
@@ -2538,6 +2538,12 @@ static int reiserfs_writepage(struct page *page, struct writeback_control *wbc) | |||
2538 | return reiserfs_write_full_page(page, wbc); | 2538 | return reiserfs_write_full_page(page, wbc); |
2539 | } | 2539 | } |
2540 | 2540 | ||
2541 | static void reiserfs_truncate_failed_write(struct inode *inode) | ||
2542 | { | ||
2543 | truncate_inode_pages(inode->i_mapping, inode->i_size); | ||
2544 | reiserfs_truncate_file(inode, 0); | ||
2545 | } | ||
2546 | |||
2541 | static int reiserfs_write_begin(struct file *file, | 2547 | static int reiserfs_write_begin(struct file *file, |
2542 | struct address_space *mapping, | 2548 | struct address_space *mapping, |
2543 | loff_t pos, unsigned len, unsigned flags, | 2549 | loff_t pos, unsigned len, unsigned flags, |
@@ -2604,6 +2610,8 @@ static int reiserfs_write_begin(struct file *file, | |||
2604 | if (ret) { | 2610 | if (ret) { |
2605 | unlock_page(page); | 2611 | unlock_page(page); |
2606 | page_cache_release(page); | 2612 | page_cache_release(page); |
2613 | /* Truncate allocated blocks */ | ||
2614 | reiserfs_truncate_failed_write(inode); | ||
2607 | } | 2615 | } |
2608 | return ret; | 2616 | return ret; |
2609 | } | 2617 | } |
@@ -2701,9 +2709,7 @@ static int reiserfs_write_end(struct file *file, struct address_space *mapping, | |||
2701 | ** transaction tracking stuff when the size changes. So, we have | 2709 | ** transaction tracking stuff when the size changes. So, we have |
2702 | ** to do the i_size updates here. | 2710 | ** to do the i_size updates here. |
2703 | */ | 2711 | */ |
2704 | pos += copied; | 2712 | if (pos + copied > inode->i_size) { |
2705 | |||
2706 | if (pos > inode->i_size) { | ||
2707 | struct reiserfs_transaction_handle myth; | 2713 | struct reiserfs_transaction_handle myth; |
2708 | lock_depth = reiserfs_write_lock_once(inode->i_sb); | 2714 | lock_depth = reiserfs_write_lock_once(inode->i_sb); |
2709 | locked = true; | 2715 | locked = true; |
@@ -2721,7 +2727,7 @@ static int reiserfs_write_end(struct file *file, struct address_space *mapping, | |||
2721 | goto journal_error; | 2727 | goto journal_error; |
2722 | 2728 | ||
2723 | reiserfs_update_inode_transaction(inode); | 2729 | reiserfs_update_inode_transaction(inode); |
2724 | inode->i_size = pos; | 2730 | inode->i_size = pos + copied; |
2725 | /* | 2731 | /* |
2726 | * this will just nest into our transaction. It's important | 2732 | * this will just nest into our transaction. It's important |
2727 | * to use mark_inode_dirty so the inode gets pushed around on the | 2733 | * to use mark_inode_dirty so the inode gets pushed around on the |
@@ -2751,6 +2757,10 @@ static int reiserfs_write_end(struct file *file, struct address_space *mapping, | |||
2751 | reiserfs_write_unlock_once(inode->i_sb, lock_depth); | 2757 | reiserfs_write_unlock_once(inode->i_sb, lock_depth); |
2752 | unlock_page(page); | 2758 | unlock_page(page); |
2753 | page_cache_release(page); | 2759 | page_cache_release(page); |
2760 | |||
2761 | if (pos + len > inode->i_size) | ||
2762 | reiserfs_truncate_failed_write(inode); | ||
2763 | |||
2754 | return ret == 0 ? copied : ret; | 2764 | return ret == 0 ? copied : ret; |
2755 | 2765 | ||
2756 | journal_error: | 2766 | journal_error: |
diff --git a/fs/stack.c b/fs/stack.c index 67716f6a1a4a..4a6f7f440658 100644 --- a/fs/stack.c +++ b/fs/stack.c | |||
@@ -7,18 +7,63 @@ | |||
7 | * This function cannot be inlined since i_size_{read,write} is rather | 7 | * This function cannot be inlined since i_size_{read,write} is rather |
8 | * heavy-weight on 32-bit systems | 8 | * heavy-weight on 32-bit systems |
9 | */ | 9 | */ |
10 | void fsstack_copy_inode_size(struct inode *dst, const struct inode *src) | 10 | void fsstack_copy_inode_size(struct inode *dst, struct inode *src) |
11 | { | 11 | { |
12 | i_size_write(dst, i_size_read((struct inode *)src)); | 12 | loff_t i_size; |
13 | dst->i_blocks = src->i_blocks; | 13 | blkcnt_t i_blocks; |
14 | |||
15 | /* | ||
16 | * i_size_read() includes its own seqlocking and protection from | ||
17 | * preemption (see include/linux/fs.h): we need nothing extra for | ||
18 | * that here, and prefer to avoid nesting locks than attempt to keep | ||
19 | * i_size and i_blocks in sync together. | ||
20 | */ | ||
21 | i_size = i_size_read(src); | ||
22 | |||
23 | /* | ||
24 | * But if CONFIG_LBDAF (on 32-bit), we ought to make an effort to | ||
25 | * keep the two halves of i_blocks in sync despite SMP or PREEMPT - | ||
26 | * though stat's generic_fillattr() doesn't bother, and we won't be | ||
27 | * applying quotas (where i_blocks does become important) at the | ||
28 | * upper level. | ||
29 | * | ||
30 | * We don't actually know what locking is used at the lower level; | ||
31 | * but if it's a filesystem that supports quotas, it will be using | ||
32 | * i_lock as in inode_add_bytes(). tmpfs uses other locking, and | ||
33 | * its 32-bit is (just) able to exceed 2TB i_size with the aid of | ||
34 | * holes; but its i_blocks cannot carry into the upper long without | ||
35 | * almost 2TB swap - let's ignore that case. | ||
36 | */ | ||
37 | if (sizeof(i_blocks) > sizeof(long)) | ||
38 | spin_lock(&src->i_lock); | ||
39 | i_blocks = src->i_blocks; | ||
40 | if (sizeof(i_blocks) > sizeof(long)) | ||
41 | spin_unlock(&src->i_lock); | ||
42 | |||
43 | /* | ||
44 | * If CONFIG_SMP or CONFIG_PREEMPT on 32-bit, it's vital for | ||
45 | * fsstack_copy_inode_size() to hold some lock around | ||
46 | * i_size_write(), otherwise i_size_read() may spin forever (see | ||
47 | * include/linux/fs.h). We don't necessarily hold i_mutex when this | ||
48 | * is called, so take i_lock for that case. | ||
49 | * | ||
50 | * And if CONFIG_LBADF (on 32-bit), continue our effort to keep the | ||
51 | * two halves of i_blocks in sync despite SMP or PREEMPT: use i_lock | ||
52 | * for that case too, and do both at once by combining the tests. | ||
53 | * | ||
54 | * There is none of this locking overhead in the 64-bit case. | ||
55 | */ | ||
56 | if (sizeof(i_size) > sizeof(long) || sizeof(i_blocks) > sizeof(long)) | ||
57 | spin_lock(&dst->i_lock); | ||
58 | i_size_write(dst, i_size); | ||
59 | dst->i_blocks = i_blocks; | ||
60 | if (sizeof(i_size) > sizeof(long) || sizeof(i_blocks) > sizeof(long)) | ||
61 | spin_unlock(&dst->i_lock); | ||
14 | } | 62 | } |
15 | EXPORT_SYMBOL_GPL(fsstack_copy_inode_size); | 63 | EXPORT_SYMBOL_GPL(fsstack_copy_inode_size); |
16 | 64 | ||
17 | /* copy all attributes; get_nlinks is optional way to override the i_nlink | 65 | /* copy all attributes */ |
18 | * copying | 66 | void fsstack_copy_attr_all(struct inode *dest, const struct inode *src) |
19 | */ | ||
20 | void fsstack_copy_attr_all(struct inode *dest, const struct inode *src, | ||
21 | int (*get_nlinks)(struct inode *)) | ||
22 | { | 67 | { |
23 | dest->i_mode = src->i_mode; | 68 | dest->i_mode = src->i_mode; |
24 | dest->i_uid = src->i_uid; | 69 | dest->i_uid = src->i_uid; |
@@ -29,14 +74,6 @@ void fsstack_copy_attr_all(struct inode *dest, const struct inode *src, | |||
29 | dest->i_ctime = src->i_ctime; | 74 | dest->i_ctime = src->i_ctime; |
30 | dest->i_blkbits = src->i_blkbits; | 75 | dest->i_blkbits = src->i_blkbits; |
31 | dest->i_flags = src->i_flags; | 76 | dest->i_flags = src->i_flags; |
32 | 77 | dest->i_nlink = src->i_nlink; | |
33 | /* | ||
34 | * Update the nlinks AFTER updating the above fields, because the | ||
35 | * get_links callback may depend on them. | ||
36 | */ | ||
37 | if (!get_nlinks) | ||
38 | dest->i_nlink = src->i_nlink; | ||
39 | else | ||
40 | dest->i_nlink = (*get_nlinks)(dest); | ||
41 | } | 78 | } |
42 | EXPORT_SYMBOL_GPL(fsstack_copy_attr_all); | 79 | EXPORT_SYMBOL_GPL(fsstack_copy_attr_all); |
@@ -355,6 +355,7 @@ SYSCALL_DEFINE(sync_file_range)(int fd, loff_t offset, loff_t nbytes, | |||
355 | { | 355 | { |
356 | int ret; | 356 | int ret; |
357 | struct file *file; | 357 | struct file *file; |
358 | struct address_space *mapping; | ||
358 | loff_t endbyte; /* inclusive */ | 359 | loff_t endbyte; /* inclusive */ |
359 | int fput_needed; | 360 | int fput_needed; |
360 | umode_t i_mode; | 361 | umode_t i_mode; |
@@ -405,7 +406,28 @@ SYSCALL_DEFINE(sync_file_range)(int fd, loff_t offset, loff_t nbytes, | |||
405 | !S_ISLNK(i_mode)) | 406 | !S_ISLNK(i_mode)) |
406 | goto out_put; | 407 | goto out_put; |
407 | 408 | ||
408 | ret = do_sync_mapping_range(file->f_mapping, offset, endbyte, flags); | 409 | mapping = file->f_mapping; |
410 | if (!mapping) { | ||
411 | ret = -EINVAL; | ||
412 | goto out_put; | ||
413 | } | ||
414 | |||
415 | ret = 0; | ||
416 | if (flags & SYNC_FILE_RANGE_WAIT_BEFORE) { | ||
417 | ret = filemap_fdatawait_range(mapping, offset, endbyte); | ||
418 | if (ret < 0) | ||
419 | goto out_put; | ||
420 | } | ||
421 | |||
422 | if (flags & SYNC_FILE_RANGE_WRITE) { | ||
423 | ret = filemap_fdatawrite_range(mapping, offset, endbyte); | ||
424 | if (ret < 0) | ||
425 | goto out_put; | ||
426 | } | ||
427 | |||
428 | if (flags & SYNC_FILE_RANGE_WAIT_AFTER) | ||
429 | ret = filemap_fdatawait_range(mapping, offset, endbyte); | ||
430 | |||
409 | out_put: | 431 | out_put: |
410 | fput_light(file, fput_needed); | 432 | fput_light(file, fput_needed); |
411 | out: | 433 | out: |
@@ -437,38 +459,3 @@ asmlinkage long SyS_sync_file_range2(long fd, long flags, | |||
437 | } | 459 | } |
438 | SYSCALL_ALIAS(sys_sync_file_range2, SyS_sync_file_range2); | 460 | SYSCALL_ALIAS(sys_sync_file_range2, SyS_sync_file_range2); |
439 | #endif | 461 | #endif |
440 | |||
441 | /* | ||
442 | * `endbyte' is inclusive | ||
443 | */ | ||
444 | int do_sync_mapping_range(struct address_space *mapping, loff_t offset, | ||
445 | loff_t endbyte, unsigned int flags) | ||
446 | { | ||
447 | int ret; | ||
448 | |||
449 | if (!mapping) { | ||
450 | ret = -EINVAL; | ||
451 | goto out; | ||
452 | } | ||
453 | |||
454 | ret = 0; | ||
455 | if (flags & SYNC_FILE_RANGE_WAIT_BEFORE) { | ||
456 | ret = filemap_fdatawait_range(mapping, offset, endbyte); | ||
457 | if (ret < 0) | ||
458 | goto out; | ||
459 | } | ||
460 | |||
461 | if (flags & SYNC_FILE_RANGE_WRITE) { | ||
462 | ret = __filemap_fdatawrite_range(mapping, offset, endbyte, | ||
463 | WB_SYNC_ALL); | ||
464 | if (ret < 0) | ||
465 | goto out; | ||
466 | } | ||
467 | |||
468 | if (flags & SYNC_FILE_RANGE_WAIT_AFTER) { | ||
469 | ret = filemap_fdatawait_range(mapping, offset, endbyte); | ||
470 | } | ||
471 | out: | ||
472 | return ret; | ||
473 | } | ||
474 | EXPORT_SYMBOL_GPL(do_sync_mapping_range); | ||
diff --git a/fs/ubifs/file.c b/fs/ubifs/file.c index 39849f887e72..16a6444330ec 100644 --- a/fs/ubifs/file.c +++ b/fs/ubifs/file.c | |||
@@ -45,7 +45,7 @@ | |||
45 | * | 45 | * |
46 | * Similarly, @i_mutex is not always locked in 'ubifs_readpage()', e.g., the | 46 | * Similarly, @i_mutex is not always locked in 'ubifs_readpage()', e.g., the |
47 | * read-ahead path does not lock it ("sys_read -> generic_file_aio_read -> | 47 | * read-ahead path does not lock it ("sys_read -> generic_file_aio_read -> |
48 | * ondemand_readahead -> readpage"). In case of readahead, @I_LOCK flag is not | 48 | * ondemand_readahead -> readpage"). In case of readahead, @I_SYNC flag is not |
49 | * set as well. However, UBIFS disables readahead. | 49 | * set as well. However, UBIFS disables readahead. |
50 | */ | 50 | */ |
51 | 51 | ||
diff --git a/fs/xfs/linux-2.6/xfs_iops.c b/fs/xfs/linux-2.6/xfs_iops.c index 1d5b298ba8b2..225946012d0b 100644 --- a/fs/xfs/linux-2.6/xfs_iops.c +++ b/fs/xfs/linux-2.6/xfs_iops.c | |||
@@ -794,7 +794,7 @@ xfs_setup_inode( | |||
794 | struct inode *inode = &ip->i_vnode; | 794 | struct inode *inode = &ip->i_vnode; |
795 | 795 | ||
796 | inode->i_ino = ip->i_ino; | 796 | inode->i_ino = ip->i_ino; |
797 | inode->i_state = I_NEW|I_LOCK; | 797 | inode->i_state = I_NEW; |
798 | inode_add_to_lists(ip->i_mount->m_super, inode); | 798 | inode_add_to_lists(ip->i_mount->m_super, inode); |
799 | 799 | ||
800 | inode->i_mode = ip->i_d.di_mode; | 800 | inode->i_mode = ip->i_d.di_mode; |
diff --git a/fs/xfs/xfs_iget.c b/fs/xfs/xfs_iget.c index 0de36c2a46f1..fa402a6bbbcf 100644 --- a/fs/xfs/xfs_iget.c +++ b/fs/xfs/xfs_iget.c | |||
@@ -91,7 +91,7 @@ xfs_inode_alloc( | |||
91 | ip->i_new_size = 0; | 91 | ip->i_new_size = 0; |
92 | 92 | ||
93 | /* prevent anyone from using this yet */ | 93 | /* prevent anyone from using this yet */ |
94 | VFS_I(ip)->i_state = I_NEW|I_LOCK; | 94 | VFS_I(ip)->i_state = I_NEW; |
95 | 95 | ||
96 | return ip; | 96 | return ip; |
97 | } | 97 | } |
@@ -217,7 +217,7 @@ xfs_iget_cache_hit( | |||
217 | trace_xfs_iget_reclaim(ip); | 217 | trace_xfs_iget_reclaim(ip); |
218 | goto out_error; | 218 | goto out_error; |
219 | } | 219 | } |
220 | inode->i_state = I_LOCK|I_NEW; | 220 | inode->i_state = I_NEW; |
221 | } else { | 221 | } else { |
222 | /* If the VFS inode is being torn down, pause and try again. */ | 222 | /* If the VFS inode is being torn down, pause and try again. */ |
223 | if (!igrab(inode)) { | 223 | if (!igrab(inode)) { |
diff --git a/include/asm-generic/fcntl.h b/include/asm-generic/fcntl.h index 681ddf3e844c..fcd268ce0674 100644 --- a/include/asm-generic/fcntl.h +++ b/include/asm-generic/fcntl.h | |||
@@ -51,7 +51,7 @@ | |||
51 | #endif | 51 | #endif |
52 | 52 | ||
53 | /* | 53 | /* |
54 | * Before Linux 2.6.32 only O_DSYNC semantics were implemented, but using | 54 | * Before Linux 2.6.33 only O_DSYNC semantics were implemented, but using |
55 | * the O_SYNC flag. We continue to use the existing numerical value | 55 | * the O_SYNC flag. We continue to use the existing numerical value |
56 | * for O_DSYNC semantics now, but using the correct symbolic name for it. | 56 | * for O_DSYNC semantics now, but using the correct symbolic name for it. |
57 | * This new value is used to request true Posix O_SYNC semantics. It is | 57 | * This new value is used to request true Posix O_SYNC semantics. It is |
diff --git a/include/linux/Kbuild b/include/linux/Kbuild index f72914db2a11..756f831cbdd5 100644 --- a/include/linux/Kbuild +++ b/include/linux/Kbuild | |||
@@ -118,6 +118,7 @@ header-y += mtio.h | |||
118 | header-y += ncp_no.h | 118 | header-y += ncp_no.h |
119 | header-y += neighbour.h | 119 | header-y += neighbour.h |
120 | header-y += net_dropmon.h | 120 | header-y += net_dropmon.h |
121 | header-y += net_tstamp.h | ||
121 | header-y += netfilter_arp.h | 122 | header-y += netfilter_arp.h |
122 | header-y += netrom.h | 123 | header-y += netrom.h |
123 | header-y += nfs2.h | 124 | header-y += nfs2.h |
diff --git a/include/linux/backlight.h b/include/linux/backlight.h index 0f5f57858a23..8c4f884db6b4 100644 --- a/include/linux/backlight.h +++ b/include/linux/backlight.h | |||
@@ -36,18 +36,18 @@ struct backlight_device; | |||
36 | struct fb_info; | 36 | struct fb_info; |
37 | 37 | ||
38 | struct backlight_ops { | 38 | struct backlight_ops { |
39 | unsigned int options; | 39 | const unsigned int options; |
40 | 40 | ||
41 | #define BL_CORE_SUSPENDRESUME (1 << 0) | 41 | #define BL_CORE_SUSPENDRESUME (1 << 0) |
42 | 42 | ||
43 | /* Notify the backlight driver some property has changed */ | 43 | /* Notify the backlight driver some property has changed */ |
44 | int (*update_status)(struct backlight_device *); | 44 | int (* const update_status)(struct backlight_device *); |
45 | /* Return the current backlight brightness (accounting for power, | 45 | /* Return the current backlight brightness (accounting for power, |
46 | fb_blank etc.) */ | 46 | fb_blank etc.) */ |
47 | int (*get_brightness)(struct backlight_device *); | 47 | int (* const get_brightness)(struct backlight_device *); |
48 | /* Check if given framebuffer device is the one bound to this backlight; | 48 | /* Check if given framebuffer device is the one bound to this backlight; |
49 | return 0 if not, !=0 if it is. If NULL, backlight always matches the fb. */ | 49 | return 0 if not, !=0 if it is. If NULL, backlight always matches the fb. */ |
50 | int (*check_fb)(struct fb_info *); | 50 | int (* const check_fb)(struct fb_info *); |
51 | }; | 51 | }; |
52 | 52 | ||
53 | /* This structure defines all the properties of a backlight */ | 53 | /* This structure defines all the properties of a backlight */ |
@@ -86,7 +86,7 @@ struct backlight_device { | |||
86 | registered this device has been unloaded, and if class_get_devdata() | 86 | registered this device has been unloaded, and if class_get_devdata() |
87 | points to something in the body of that driver, it is also invalid. */ | 87 | points to something in the body of that driver, it is also invalid. */ |
88 | struct mutex ops_lock; | 88 | struct mutex ops_lock; |
89 | struct backlight_ops *ops; | 89 | const struct backlight_ops *ops; |
90 | 90 | ||
91 | /* The framebuffer notifier block */ | 91 | /* The framebuffer notifier block */ |
92 | struct notifier_block fb_notif; | 92 | struct notifier_block fb_notif; |
@@ -103,7 +103,7 @@ static inline void backlight_update_status(struct backlight_device *bd) | |||
103 | } | 103 | } |
104 | 104 | ||
105 | extern struct backlight_device *backlight_device_register(const char *name, | 105 | extern struct backlight_device *backlight_device_register(const char *name, |
106 | struct device *dev, void *devdata, struct backlight_ops *ops); | 106 | struct device *dev, void *devdata, const struct backlight_ops *ops); |
107 | extern void backlight_device_unregister(struct backlight_device *bd); | 107 | extern void backlight_device_unregister(struct backlight_device *bd); |
108 | extern void backlight_force_update(struct backlight_device *bd, | 108 | extern void backlight_force_update(struct backlight_device *bd, |
109 | enum backlight_update_reason reason); | 109 | enum backlight_update_reason reason); |
diff --git a/include/linux/binfmts.h b/include/linux/binfmts.h index aece486ac734..cd4349bdc34e 100644 --- a/include/linux/binfmts.h +++ b/include/linux/binfmts.h | |||
@@ -68,6 +68,14 @@ struct linux_binprm{ | |||
68 | 68 | ||
69 | #define BINPRM_MAX_RECURSION 4 | 69 | #define BINPRM_MAX_RECURSION 4 |
70 | 70 | ||
71 | /* Function parameter for binfmt->coredump */ | ||
72 | struct coredump_params { | ||
73 | long signr; | ||
74 | struct pt_regs *regs; | ||
75 | struct file *file; | ||
76 | unsigned long limit; | ||
77 | }; | ||
78 | |||
71 | /* | 79 | /* |
72 | * This structure defines the functions that are used to load the binary formats that | 80 | * This structure defines the functions that are used to load the binary formats that |
73 | * linux accepts. | 81 | * linux accepts. |
@@ -77,7 +85,7 @@ struct linux_binfmt { | |||
77 | struct module *module; | 85 | struct module *module; |
78 | int (*load_binary)(struct linux_binprm *, struct pt_regs * regs); | 86 | int (*load_binary)(struct linux_binprm *, struct pt_regs * regs); |
79 | int (*load_shlib)(struct file *); | 87 | int (*load_shlib)(struct file *); |
80 | int (*core_dump)(long signr, struct pt_regs *regs, struct file *file, unsigned long limit); | 88 | int (*core_dump)(struct coredump_params *cprm); |
81 | unsigned long min_coredump; /* minimal dump size */ | 89 | unsigned long min_coredump; /* minimal dump size */ |
82 | int hasvdso; | 90 | int hasvdso; |
83 | }; | 91 | }; |
diff --git a/include/linux/decompress/mm.h b/include/linux/decompress/mm.h index 12ff8c3f1d05..5032b9a31ae7 100644 --- a/include/linux/decompress/mm.h +++ b/include/linux/decompress/mm.h | |||
@@ -25,7 +25,7 @@ static void *malloc(int size) | |||
25 | void *p; | 25 | void *p; |
26 | 26 | ||
27 | if (size < 0) | 27 | if (size < 0) |
28 | error("Malloc error"); | 28 | return NULL; |
29 | if (!malloc_ptr) | 29 | if (!malloc_ptr) |
30 | malloc_ptr = free_mem_ptr; | 30 | malloc_ptr = free_mem_ptr; |
31 | 31 | ||
@@ -35,7 +35,7 @@ static void *malloc(int size) | |||
35 | malloc_ptr += size; | 35 | malloc_ptr += size; |
36 | 36 | ||
37 | if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr) | 37 | if (free_mem_end_ptr && malloc_ptr >= free_mem_end_ptr) |
38 | error("Out of memory"); | 38 | return NULL; |
39 | 39 | ||
40 | malloc_count++; | 40 | malloc_count++; |
41 | return p; | 41 | return p; |
diff --git a/include/linux/elf.h b/include/linux/elf.h index 90a4ed0ea0e5..0cc4d55151b7 100644 --- a/include/linux/elf.h +++ b/include/linux/elf.h | |||
@@ -361,7 +361,7 @@ typedef struct elf64_shdr { | |||
361 | #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */ | 361 | #define NT_PPC_VSX 0x102 /* PowerPC VSX registers */ |
362 | #define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */ | 362 | #define NT_386_TLS 0x200 /* i386 TLS slots (struct user_desc) */ |
363 | #define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */ | 363 | #define NT_386_IOPERM 0x201 /* x86 io permission bitmap (1=deny) */ |
364 | #define NT_PRXSTATUS 0x300 /* s390 upper register halves */ | 364 | #define NT_S390_HIGH_GPRS 0x300 /* s390 upper register halves */ |
365 | 365 | ||
366 | 366 | ||
367 | /* Note header in a PT_NOTE section */ | 367 | /* Note header in a PT_NOTE section */ |
diff --git a/include/linux/enclosure.h b/include/linux/enclosure.h index 90d1c2184112..9a33c5f7e126 100644 --- a/include/linux/enclosure.h +++ b/include/linux/enclosure.h | |||
@@ -42,6 +42,8 @@ enum enclosure_status { | |||
42 | ENCLOSURE_STATUS_NOT_INSTALLED, | 42 | ENCLOSURE_STATUS_NOT_INSTALLED, |
43 | ENCLOSURE_STATUS_UNKNOWN, | 43 | ENCLOSURE_STATUS_UNKNOWN, |
44 | ENCLOSURE_STATUS_UNAVAILABLE, | 44 | ENCLOSURE_STATUS_UNAVAILABLE, |
45 | /* last element for counting purposes */ | ||
46 | ENCLOSURE_STATUS_MAX | ||
45 | }; | 47 | }; |
46 | 48 | ||
47 | /* SFF-8485 activity light settings */ | 49 | /* SFF-8485 activity light settings */ |
diff --git a/include/linux/fs.h b/include/linux/fs.h index 66bc0a54b284..cca191933ff6 100644 --- a/include/linux/fs.h +++ b/include/linux/fs.h | |||
@@ -1095,10 +1095,6 @@ struct file_lock { | |||
1095 | 1095 | ||
1096 | extern void send_sigio(struct fown_struct *fown, int fd, int band); | 1096 | extern void send_sigio(struct fown_struct *fown, int fd, int band); |
1097 | 1097 | ||
1098 | /* fs/sync.c */ | ||
1099 | extern int do_sync_mapping_range(struct address_space *mapping, loff_t offset, | ||
1100 | loff_t endbyte, unsigned int flags); | ||
1101 | |||
1102 | #ifdef CONFIG_FILE_LOCKING | 1098 | #ifdef CONFIG_FILE_LOCKING |
1103 | extern int fcntl_getlk(struct file *, struct flock __user *); | 1099 | extern int fcntl_getlk(struct file *, struct flock __user *); |
1104 | extern int fcntl_setlk(unsigned int, struct file *, unsigned int, | 1100 | extern int fcntl_setlk(unsigned int, struct file *, unsigned int, |
@@ -1591,7 +1587,7 @@ struct super_operations { | |||
1591 | * until that flag is cleared. I_WILL_FREE, I_FREEING and I_CLEAR are set at | 1587 | * until that flag is cleared. I_WILL_FREE, I_FREEING and I_CLEAR are set at |
1592 | * various stages of removing an inode. | 1588 | * various stages of removing an inode. |
1593 | * | 1589 | * |
1594 | * Two bits are used for locking and completion notification, I_LOCK and I_SYNC. | 1590 | * Two bits are used for locking and completion notification, I_NEW and I_SYNC. |
1595 | * | 1591 | * |
1596 | * I_DIRTY_SYNC Inode is dirty, but doesn't have to be written on | 1592 | * I_DIRTY_SYNC Inode is dirty, but doesn't have to be written on |
1597 | * fdatasync(). i_atime is the usual cause. | 1593 | * fdatasync(). i_atime is the usual cause. |
@@ -1600,8 +1596,14 @@ struct super_operations { | |||
1600 | * don't have to write inode on fdatasync() when only | 1596 | * don't have to write inode on fdatasync() when only |
1601 | * mtime has changed in it. | 1597 | * mtime has changed in it. |
1602 | * I_DIRTY_PAGES Inode has dirty pages. Inode itself may be clean. | 1598 | * I_DIRTY_PAGES Inode has dirty pages. Inode itself may be clean. |
1603 | * I_NEW get_new_inode() sets i_state to I_LOCK|I_NEW. Both | 1599 | * I_NEW Serves as both a mutex and completion notification. |
1604 | * are cleared by unlock_new_inode(), called from iget(). | 1600 | * New inodes set I_NEW. If two processes both create |
1601 | * the same inode, one of them will release its inode and | ||
1602 | * wait for I_NEW to be released before returning. | ||
1603 | * Inodes in I_WILL_FREE, I_FREEING or I_CLEAR state can | ||
1604 | * also cause waiting on I_NEW, without I_NEW actually | ||
1605 | * being set. find_inode() uses this to prevent returning | ||
1606 | * nearly-dead inodes. | ||
1605 | * I_WILL_FREE Must be set when calling write_inode_now() if i_count | 1607 | * I_WILL_FREE Must be set when calling write_inode_now() if i_count |
1606 | * is zero. I_FREEING must be set when I_WILL_FREE is | 1608 | * is zero. I_FREEING must be set when I_WILL_FREE is |
1607 | * cleared. | 1609 | * cleared. |
@@ -1615,20 +1617,11 @@ struct super_operations { | |||
1615 | * prohibited for many purposes. iget() must wait for | 1617 | * prohibited for many purposes. iget() must wait for |
1616 | * the inode to be completely released, then create it | 1618 | * the inode to be completely released, then create it |
1617 | * anew. Other functions will just ignore such inodes, | 1619 | * anew. Other functions will just ignore such inodes, |
1618 | * if appropriate. I_LOCK is used for waiting. | 1620 | * if appropriate. I_NEW is used for waiting. |
1619 | * | 1621 | * |
1620 | * I_LOCK Serves as both a mutex and completion notification. | 1622 | * I_SYNC Synchonized write of dirty inode data. The bits is |
1621 | * New inodes set I_LOCK. If two processes both create | 1623 | * set during data writeback, and cleared with a wakeup |
1622 | * the same inode, one of them will release its inode and | 1624 | * on the bit address once it is done. |
1623 | * wait for I_LOCK to be released before returning. | ||
1624 | * Inodes in I_WILL_FREE, I_FREEING or I_CLEAR state can | ||
1625 | * also cause waiting on I_LOCK, without I_LOCK actually | ||
1626 | * being set. find_inode() uses this to prevent returning | ||
1627 | * nearly-dead inodes. | ||
1628 | * I_SYNC Similar to I_LOCK, but limited in scope to writeback | ||
1629 | * of inode dirty data. Having a separate lock for this | ||
1630 | * purpose reduces latency and prevents some filesystem- | ||
1631 | * specific deadlocks. | ||
1632 | * | 1625 | * |
1633 | * Q: What is the difference between I_WILL_FREE and I_FREEING? | 1626 | * Q: What is the difference between I_WILL_FREE and I_FREEING? |
1634 | * Q: igrab() only checks on (I_FREEING|I_WILL_FREE). Should it also check on | 1627 | * Q: igrab() only checks on (I_FREEING|I_WILL_FREE). Should it also check on |
@@ -1637,13 +1630,12 @@ struct super_operations { | |||
1637 | #define I_DIRTY_SYNC 1 | 1630 | #define I_DIRTY_SYNC 1 |
1638 | #define I_DIRTY_DATASYNC 2 | 1631 | #define I_DIRTY_DATASYNC 2 |
1639 | #define I_DIRTY_PAGES 4 | 1632 | #define I_DIRTY_PAGES 4 |
1640 | #define I_NEW 8 | 1633 | #define __I_NEW 3 |
1634 | #define I_NEW (1 << __I_NEW) | ||
1641 | #define I_WILL_FREE 16 | 1635 | #define I_WILL_FREE 16 |
1642 | #define I_FREEING 32 | 1636 | #define I_FREEING 32 |
1643 | #define I_CLEAR 64 | 1637 | #define I_CLEAR 64 |
1644 | #define __I_LOCK 7 | 1638 | #define __I_SYNC 7 |
1645 | #define I_LOCK (1 << __I_LOCK) | ||
1646 | #define __I_SYNC 8 | ||
1647 | #define I_SYNC (1 << __I_SYNC) | 1639 | #define I_SYNC (1 << __I_SYNC) |
1648 | 1640 | ||
1649 | #define I_DIRTY (I_DIRTY_SYNC | I_DIRTY_DATASYNC | I_DIRTY_PAGES) | 1641 | #define I_DIRTY (I_DIRTY_SYNC | I_DIRTY_DATASYNC | I_DIRTY_PAGES) |
diff --git a/include/linux/fs_stack.h b/include/linux/fs_stack.h index bb516ceeefc9..da317c7163ab 100644 --- a/include/linux/fs_stack.h +++ b/include/linux/fs_stack.h | |||
@@ -8,10 +8,8 @@ | |||
8 | #include <linux/fs.h> | 8 | #include <linux/fs.h> |
9 | 9 | ||
10 | /* externs for fs/stack.c */ | 10 | /* externs for fs/stack.c */ |
11 | extern void fsstack_copy_attr_all(struct inode *dest, const struct inode *src, | 11 | extern void fsstack_copy_attr_all(struct inode *dest, const struct inode *src); |
12 | int (*get_nlinks)(struct inode *)); | 12 | extern void fsstack_copy_inode_size(struct inode *dst, struct inode *src); |
13 | |||
14 | extern void fsstack_copy_inode_size(struct inode *dst, const struct inode *src); | ||
15 | 13 | ||
16 | /* inlines */ | 14 | /* inlines */ |
17 | static inline void fsstack_copy_attr_atime(struct inode *dest, | 15 | static inline void fsstack_copy_attr_atime(struct inode *dest, |
diff --git a/include/linux/init_task.h b/include/linux/init_task.h index 5ed8b9c50355..abec69b63d7e 100644 --- a/include/linux/init_task.h +++ b/include/linux/init_task.h | |||
@@ -111,12 +111,6 @@ extern struct cred init_cred; | |||
111 | # define INIT_PERF_EVENTS(tsk) | 111 | # define INIT_PERF_EVENTS(tsk) |
112 | #endif | 112 | #endif |
113 | 113 | ||
114 | #ifdef CONFIG_FS_JOURNAL_INFO | ||
115 | #define INIT_JOURNAL_INFO .journal_info = NULL, | ||
116 | #else | ||
117 | #define INIT_JOURNAL_INFO | ||
118 | #endif | ||
119 | |||
120 | /* | 114 | /* |
121 | * INIT_TASK is used to set up the first task table, touch at | 115 | * INIT_TASK is used to set up the first task table, touch at |
122 | * your own risk!. Base=0, limit=0x1fffff (=2MB) | 116 | * your own risk!. Base=0, limit=0x1fffff (=2MB) |
@@ -168,6 +162,7 @@ extern struct cred init_cred; | |||
168 | .signal = {{0}}}, \ | 162 | .signal = {{0}}}, \ |
169 | .blocked = {{0}}, \ | 163 | .blocked = {{0}}, \ |
170 | .alloc_lock = __SPIN_LOCK_UNLOCKED(tsk.alloc_lock), \ | 164 | .alloc_lock = __SPIN_LOCK_UNLOCKED(tsk.alloc_lock), \ |
165 | .journal_info = NULL, \ | ||
171 | .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \ | 166 | .cpu_timers = INIT_CPU_TIMERS(tsk.cpu_timers), \ |
172 | .fs_excl = ATOMIC_INIT(0), \ | 167 | .fs_excl = ATOMIC_INIT(0), \ |
173 | .pi_lock = __RAW_SPIN_LOCK_UNLOCKED(tsk.pi_lock), \ | 168 | .pi_lock = __RAW_SPIN_LOCK_UNLOCKED(tsk.pi_lock), \ |
@@ -178,7 +173,6 @@ extern struct cred init_cred; | |||
178 | [PIDTYPE_SID] = INIT_PID_LINK(PIDTYPE_SID), \ | 173 | [PIDTYPE_SID] = INIT_PID_LINK(PIDTYPE_SID), \ |
179 | }, \ | 174 | }, \ |
180 | .dirties = INIT_PROP_LOCAL_SINGLE(dirties), \ | 175 | .dirties = INIT_PROP_LOCAL_SINGLE(dirties), \ |
181 | INIT_JOURNAL_INFO \ | ||
182 | INIT_IDS \ | 176 | INIT_IDS \ |
183 | INIT_PERF_EVENTS(tsk) \ | 177 | INIT_PERF_EVENTS(tsk) \ |
184 | INIT_TRACE_IRQFLAGS \ | 178 | INIT_TRACE_IRQFLAGS \ |
diff --git a/include/linux/kmemleak.h b/include/linux/kmemleak.h index 3c7497d46ee9..99d9a6766f7e 100644 --- a/include/linux/kmemleak.h +++ b/include/linux/kmemleak.h | |||
@@ -32,8 +32,7 @@ extern void kmemleak_padding(const void *ptr, unsigned long offset, | |||
32 | size_t size) __ref; | 32 | size_t size) __ref; |
33 | extern void kmemleak_not_leak(const void *ptr) __ref; | 33 | extern void kmemleak_not_leak(const void *ptr) __ref; |
34 | extern void kmemleak_ignore(const void *ptr) __ref; | 34 | extern void kmemleak_ignore(const void *ptr) __ref; |
35 | extern void kmemleak_scan_area(const void *ptr, unsigned long offset, | 35 | extern void kmemleak_scan_area(const void *ptr, size_t size, gfp_t gfp) __ref; |
36 | size_t length, gfp_t gfp) __ref; | ||
37 | extern void kmemleak_no_scan(const void *ptr) __ref; | 36 | extern void kmemleak_no_scan(const void *ptr) __ref; |
38 | 37 | ||
39 | static inline void kmemleak_alloc_recursive(const void *ptr, size_t size, | 38 | static inline void kmemleak_alloc_recursive(const void *ptr, size_t size, |
@@ -84,8 +83,7 @@ static inline void kmemleak_not_leak(const void *ptr) | |||
84 | static inline void kmemleak_ignore(const void *ptr) | 83 | static inline void kmemleak_ignore(const void *ptr) |
85 | { | 84 | { |
86 | } | 85 | } |
87 | static inline void kmemleak_scan_area(const void *ptr, unsigned long offset, | 86 | static inline void kmemleak_scan_area(const void *ptr, size_t size, gfp_t gfp) |
88 | size_t length, gfp_t gfp) | ||
89 | { | 87 | { |
90 | } | 88 | } |
91 | static inline void kmemleak_erase(void **ptr) | 89 | static inline void kmemleak_erase(void **ptr) |
diff --git a/include/linux/leds-lp3944.h b/include/linux/leds-lp3944.h index afc9f9fd70f5..2618aa9063bc 100644 --- a/include/linux/leds-lp3944.h +++ b/include/linux/leds-lp3944.h | |||
@@ -12,9 +12,6 @@ | |||
12 | #ifndef __LINUX_LEDS_LP3944_H | 12 | #ifndef __LINUX_LEDS_LP3944_H |
13 | #define __LINUX_LEDS_LP3944_H | 13 | #define __LINUX_LEDS_LP3944_H |
14 | 14 | ||
15 | #include <linux/leds.h> | ||
16 | #include <linux/workqueue.h> | ||
17 | |||
18 | #define LP3944_LED0 0 | 15 | #define LP3944_LED0 0 |
19 | #define LP3944_LED1 1 | 16 | #define LP3944_LED1 1 |
20 | #define LP3944_LED2 2 | 17 | #define LP3944_LED2 2 |
diff --git a/include/linux/leds-pca9532.h b/include/linux/leds-pca9532.h index 96eea90f01a8..f158eb1149aa 100644 --- a/include/linux/leds-pca9532.h +++ b/include/linux/leds-pca9532.h | |||
@@ -32,7 +32,7 @@ struct pca9532_led { | |||
32 | struct i2c_client *client; | 32 | struct i2c_client *client; |
33 | char *name; | 33 | char *name; |
34 | struct led_classdev ldev; | 34 | struct led_classdev ldev; |
35 | struct work_struct work; | 35 | struct work_struct work; |
36 | enum pca9532_type type; | 36 | enum pca9532_type type; |
37 | enum pca9532_state state; | 37 | enum pca9532_state state; |
38 | }; | 38 | }; |
diff --git a/include/linux/leds-regulator.h b/include/linux/leds-regulator.h new file mode 100644 index 000000000000..5a8eb389aab8 --- /dev/null +++ b/include/linux/leds-regulator.h | |||
@@ -0,0 +1,46 @@ | |||
1 | /* | ||
2 | * leds-regulator.h - platform data structure for regulator driven LEDs. | ||
3 | * | ||
4 | * Copyright (C) 2009 Antonio Ospite <ospite@studenti.unina.it> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | * | ||
10 | */ | ||
11 | |||
12 | #ifndef __LINUX_LEDS_REGULATOR_H | ||
13 | #define __LINUX_LEDS_REGULATOR_H | ||
14 | |||
15 | /* | ||
16 | * Use "vled" as supply id when declaring the regulator consumer: | ||
17 | * | ||
18 | * static struct regulator_consumer_supply pcap_regulator_VVIB_consumers [] = { | ||
19 | * { .dev_name = "leds-regulator.0", supply = "vled" }, | ||
20 | * }; | ||
21 | * | ||
22 | * If you have several regulator driven LEDs, you can append a numerical id to | ||
23 | * .dev_name as done above, and use the same id when declaring the platform | ||
24 | * device: | ||
25 | * | ||
26 | * static struct led_regulator_platform_data a780_vibrator_data = { | ||
27 | * .name = "a780::vibrator", | ||
28 | * }; | ||
29 | * | ||
30 | * static struct platform_device a780_vibrator = { | ||
31 | * .name = "leds-regulator", | ||
32 | * .id = 0, | ||
33 | * .dev = { | ||
34 | * .platform_data = &a780_vibrator_data, | ||
35 | * }, | ||
36 | * }; | ||
37 | */ | ||
38 | |||
39 | #include <linux/leds.h> | ||
40 | |||
41 | struct led_regulator_platform_data { | ||
42 | char *name; /* LED name as expected by LED class */ | ||
43 | enum led_brightness brightness; /* initial brightness value */ | ||
44 | }; | ||
45 | |||
46 | #endif /* __LINUX_LEDS_REGULATOR_H */ | ||
diff --git a/include/linux/mfd/wm831x/pdata.h b/include/linux/mfd/wm831x/pdata.h index 415c228743d5..fd322aca33ba 100644 --- a/include/linux/mfd/wm831x/pdata.h +++ b/include/linux/mfd/wm831x/pdata.h | |||
@@ -41,6 +41,23 @@ struct wm831x_battery_pdata { | |||
41 | int timeout; /** Charge cycle timeout, in minutes */ | 41 | int timeout; /** Charge cycle timeout, in minutes */ |
42 | }; | 42 | }; |
43 | 43 | ||
44 | /** | ||
45 | * Configuration for the WM831x DC-DC BuckWise convertors. This | ||
46 | * should be passed as driver_data in the regulator_init_data. | ||
47 | * | ||
48 | * Currently all the configuration is for the fast DVS switching | ||
49 | * support of the devices. This allows MFPs on the device to be | ||
50 | * configured as an input to switch between two output voltages, | ||
51 | * allowing voltage transitions without the expense of an access over | ||
52 | * I2C or SPI buses. | ||
53 | */ | ||
54 | struct wm831x_buckv_pdata { | ||
55 | int dvs_gpio; /** CPU GPIO to use for DVS switching */ | ||
56 | int dvs_control_src; /** Hardware DVS source to use (1 or 2) */ | ||
57 | int dvs_init_state; /** DVS state to expect on startup */ | ||
58 | int dvs_state_gpio; /** CPU GPIO to use for monitoring status */ | ||
59 | }; | ||
60 | |||
44 | /* Sources for status LED configuration. Values are register values | 61 | /* Sources for status LED configuration. Values are register values |
45 | * plus 1 to allow for a zero default for preserve. | 62 | * plus 1 to allow for a zero default for preserve. |
46 | */ | 63 | */ |
diff --git a/include/linux/mm.h b/include/linux/mm.h index 849b4a61bd8f..2265f28eb47a 100644 --- a/include/linux/mm.h +++ b/include/linux/mm.h | |||
@@ -1037,6 +1037,9 @@ extern void add_active_range(unsigned int nid, unsigned long start_pfn, | |||
1037 | extern void remove_active_range(unsigned int nid, unsigned long start_pfn, | 1037 | extern void remove_active_range(unsigned int nid, unsigned long start_pfn, |
1038 | unsigned long end_pfn); | 1038 | unsigned long end_pfn); |
1039 | extern void remove_all_active_ranges(void); | 1039 | extern void remove_all_active_ranges(void); |
1040 | void sort_node_map(void); | ||
1041 | unsigned long __absent_pages_in_range(int nid, unsigned long start_pfn, | ||
1042 | unsigned long end_pfn); | ||
1040 | extern unsigned long absent_pages_in_range(unsigned long start_pfn, | 1043 | extern unsigned long absent_pages_in_range(unsigned long start_pfn, |
1041 | unsigned long end_pfn); | 1044 | unsigned long end_pfn); |
1042 | extern void get_pfn_range_for_nid(unsigned int nid, | 1045 | extern void get_pfn_range_for_nid(unsigned int nid, |
diff --git a/include/linux/mmdebug.h b/include/linux/mmdebug.h index 8a5509877192..ee24ef8ab616 100644 --- a/include/linux/mmdebug.h +++ b/include/linux/mmdebug.h | |||
@@ -1,8 +1,6 @@ | |||
1 | #ifndef LINUX_MM_DEBUG_H | 1 | #ifndef LINUX_MM_DEBUG_H |
2 | #define LINUX_MM_DEBUG_H 1 | 2 | #define LINUX_MM_DEBUG_H 1 |
3 | 3 | ||
4 | #include <linux/autoconf.h> | ||
5 | |||
6 | #ifdef CONFIG_DEBUG_VM | 4 | #ifdef CONFIG_DEBUG_VM |
7 | #define VM_BUG_ON(cond) BUG_ON(cond) | 5 | #define VM_BUG_ON(cond) BUG_ON(cond) |
8 | #else | 6 | #else |
diff --git a/include/linux/mmzone.h b/include/linux/mmzone.h index 6f7561730d88..30fe668c2542 100644 --- a/include/linux/mmzone.h +++ b/include/linux/mmzone.h | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <linux/seqlock.h> | 15 | #include <linux/seqlock.h> |
16 | #include <linux/nodemask.h> | 16 | #include <linux/nodemask.h> |
17 | #include <linux/pageblock-flags.h> | 17 | #include <linux/pageblock-flags.h> |
18 | #include <linux/bounds.h> | 18 | #include <generated/bounds.h> |
19 | #include <asm/atomic.h> | 19 | #include <asm/atomic.h> |
20 | #include <asm/page.h> | 20 | #include <asm/page.h> |
21 | 21 | ||
diff --git a/include/linux/mnt_namespace.h b/include/linux/mnt_namespace.h index d9ebf1037dfa..d74785c2393a 100644 --- a/include/linux/mnt_namespace.h +++ b/include/linux/mnt_namespace.h | |||
@@ -23,6 +23,7 @@ struct proc_mounts { | |||
23 | 23 | ||
24 | struct fs_struct; | 24 | struct fs_struct; |
25 | 25 | ||
26 | extern struct mnt_namespace *create_mnt_ns(struct vfsmount *mnt); | ||
26 | extern struct mnt_namespace *copy_mnt_ns(unsigned long, struct mnt_namespace *, | 27 | extern struct mnt_namespace *copy_mnt_ns(unsigned long, struct mnt_namespace *, |
27 | struct fs_struct *); | 28 | struct fs_struct *); |
28 | extern void put_mnt_ns(struct mnt_namespace *ns); | 29 | extern void put_mnt_ns(struct mnt_namespace *ns); |
diff --git a/include/linux/page-flags.h b/include/linux/page-flags.h index feee2ba8d06a..5b59f35dcb8f 100644 --- a/include/linux/page-flags.h +++ b/include/linux/page-flags.h | |||
@@ -8,7 +8,7 @@ | |||
8 | #include <linux/types.h> | 8 | #include <linux/types.h> |
9 | #ifndef __GENERATING_BOUNDS_H | 9 | #ifndef __GENERATING_BOUNDS_H |
10 | #include <linux/mm_types.h> | 10 | #include <linux/mm_types.h> |
11 | #include <linux/bounds.h> | 11 | #include <generated/bounds.h> |
12 | #endif /* !__GENERATING_BOUNDS_H */ | 12 | #endif /* !__GENERATING_BOUNDS_H */ |
13 | 13 | ||
14 | /* | 14 | /* |
diff --git a/include/linux/pwm_backlight.h b/include/linux/pwm_backlight.h index 7a9754c96775..01b3d759f1fc 100644 --- a/include/linux/pwm_backlight.h +++ b/include/linux/pwm_backlight.h | |||
@@ -10,7 +10,7 @@ struct platform_pwm_backlight_data { | |||
10 | unsigned int dft_brightness; | 10 | unsigned int dft_brightness; |
11 | unsigned int pwm_period_ns; | 11 | unsigned int pwm_period_ns; |
12 | int (*init)(struct device *dev); | 12 | int (*init)(struct device *dev); |
13 | int (*notify)(int brightness); | 13 | int (*notify)(struct device *dev, int brightness); |
14 | void (*exit)(struct device *dev); | 14 | void (*exit)(struct device *dev); |
15 | }; | 15 | }; |
16 | 16 | ||
diff --git a/include/linux/rcutiny.h b/include/linux/rcutiny.h index c4ba9a78721e..96cc307ed9f4 100644 --- a/include/linux/rcutiny.h +++ b/include/linux/rcutiny.h | |||
@@ -101,4 +101,9 @@ static inline void exit_rcu(void) | |||
101 | { | 101 | { |
102 | } | 102 | } |
103 | 103 | ||
104 | static inline int rcu_preempt_depth(void) | ||
105 | { | ||
106 | return 0; | ||
107 | } | ||
108 | |||
104 | #endif /* __LINUX_RCUTINY_H */ | 109 | #endif /* __LINUX_RCUTINY_H */ |
diff --git a/include/linux/rcutree.h b/include/linux/rcutree.h index c93eee5911b0..8044b1b94333 100644 --- a/include/linux/rcutree.h +++ b/include/linux/rcutree.h | |||
@@ -45,6 +45,12 @@ extern void __rcu_read_unlock(void); | |||
45 | extern void synchronize_rcu(void); | 45 | extern void synchronize_rcu(void); |
46 | extern void exit_rcu(void); | 46 | extern void exit_rcu(void); |
47 | 47 | ||
48 | /* | ||
49 | * Defined as macro as it is a very low level header | ||
50 | * included from areas that don't even know about current | ||
51 | */ | ||
52 | #define rcu_preempt_depth() (current->rcu_read_lock_nesting) | ||
53 | |||
48 | #else /* #ifdef CONFIG_TREE_PREEMPT_RCU */ | 54 | #else /* #ifdef CONFIG_TREE_PREEMPT_RCU */ |
49 | 55 | ||
50 | static inline void __rcu_read_lock(void) | 56 | static inline void __rcu_read_lock(void) |
@@ -63,6 +69,11 @@ static inline void exit_rcu(void) | |||
63 | { | 69 | { |
64 | } | 70 | } |
65 | 71 | ||
72 | static inline int rcu_preempt_depth(void) | ||
73 | { | ||
74 | return 0; | ||
75 | } | ||
76 | |||
66 | #endif /* #else #ifdef CONFIG_TREE_PREEMPT_RCU */ | 77 | #endif /* #else #ifdef CONFIG_TREE_PREEMPT_RCU */ |
67 | 78 | ||
68 | static inline void __rcu_read_lock_bh(void) | 79 | static inline void __rcu_read_lock_bh(void) |
diff --git a/include/linux/regulator/consumer.h b/include/linux/regulator/consumer.h index 490c5b37b6d7..030d92255c7a 100644 --- a/include/linux/regulator/consumer.h +++ b/include/linux/regulator/consumer.h | |||
@@ -35,6 +35,8 @@ | |||
35 | #ifndef __LINUX_REGULATOR_CONSUMER_H_ | 35 | #ifndef __LINUX_REGULATOR_CONSUMER_H_ |
36 | #define __LINUX_REGULATOR_CONSUMER_H_ | 36 | #define __LINUX_REGULATOR_CONSUMER_H_ |
37 | 37 | ||
38 | #include <linux/device.h> | ||
39 | |||
38 | /* | 40 | /* |
39 | * Regulator operating modes. | 41 | * Regulator operating modes. |
40 | * | 42 | * |
diff --git a/include/linux/regulator/machine.h b/include/linux/regulator/machine.h index 87f5f176d4ef..234a8476cba8 100644 --- a/include/linux/regulator/machine.h +++ b/include/linux/regulator/machine.h | |||
@@ -43,16 +43,20 @@ struct regulator; | |||
43 | /** | 43 | /** |
44 | * struct regulator_state - regulator state during low power system states | 44 | * struct regulator_state - regulator state during low power system states |
45 | * | 45 | * |
46 | * This describes a regulators state during a system wide low power state. | 46 | * This describes a regulators state during a system wide low power |
47 | * state. One of enabled or disabled must be set for the | ||
48 | * configuration to be applied. | ||
47 | * | 49 | * |
48 | * @uV: Operating voltage during suspend. | 50 | * @uV: Operating voltage during suspend. |
49 | * @mode: Operating mode during suspend. | 51 | * @mode: Operating mode during suspend. |
50 | * @enabled: Enabled during suspend. | 52 | * @enabled: Enabled during suspend. |
53 | * @disabled: Disabled during suspend. | ||
51 | */ | 54 | */ |
52 | struct regulator_state { | 55 | struct regulator_state { |
53 | int uV; /* suspend voltage */ | 56 | int uV; /* suspend voltage */ |
54 | unsigned int mode; /* suspend regulator operating mode */ | 57 | unsigned int mode; /* suspend regulator operating mode */ |
55 | int enabled; /* is regulator enabled in this suspend state */ | 58 | int enabled; /* is regulator enabled in this suspend state */ |
59 | int disabled; /* is the regulator disbled in this suspend state */ | ||
56 | }; | 60 | }; |
57 | 61 | ||
58 | /** | 62 | /** |
diff --git a/include/linux/regulator/max8660.h b/include/linux/regulator/max8660.h new file mode 100644 index 000000000000..9936763621c7 --- /dev/null +++ b/include/linux/regulator/max8660.h | |||
@@ -0,0 +1,57 @@ | |||
1 | /* | ||
2 | * max8660.h -- Voltage regulation for the Maxim 8660/8661 | ||
3 | * | ||
4 | * Copyright (C) 2009 Wolfram Sang, Pengutronix e.K. | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License as published by | ||
8 | * the Free Software Foundation; version 2 of the License. | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | * | ||
15 | * You should have received a copy of the GNU General Public License | ||
16 | * along with this program; if not, write to the Free Software | ||
17 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | ||
18 | */ | ||
19 | |||
20 | #ifndef __LINUX_REGULATOR_MAX8660_H | ||
21 | #define __LINUX_REGULATOR_MAX8660_H | ||
22 | |||
23 | #include <linux/regulator/machine.h> | ||
24 | |||
25 | enum { | ||
26 | MAX8660_V3, | ||
27 | MAX8660_V4, | ||
28 | MAX8660_V5, | ||
29 | MAX8660_V6, | ||
30 | MAX8660_V7, | ||
31 | MAX8660_V_END, | ||
32 | }; | ||
33 | |||
34 | /** | ||
35 | * max8660_subdev_data - regulator subdev data | ||
36 | * @id: regulator id | ||
37 | * @name: regulator name | ||
38 | * @platform_data: regulator init data | ||
39 | */ | ||
40 | struct max8660_subdev_data { | ||
41 | int id; | ||
42 | char *name; | ||
43 | struct regulator_init_data *platform_data; | ||
44 | }; | ||
45 | |||
46 | /** | ||
47 | * max8660_platform_data - platform data for max8660 | ||
48 | * @num_subdevs: number of regulators used | ||
49 | * @subdevs: pointer to regulators used | ||
50 | * @en34_is_high: if EN34 is driven high, regulators cannot be en-/disabled. | ||
51 | */ | ||
52 | struct max8660_platform_data { | ||
53 | int num_subdevs; | ||
54 | struct max8660_subdev_data *subdevs; | ||
55 | unsigned en34_is_high:1; | ||
56 | }; | ||
57 | #endif | ||
diff --git a/include/linux/sched.h b/include/linux/sched.h index 244c287a5ac1..f2f842db03ce 100644 --- a/include/linux/sched.h +++ b/include/linux/sched.h | |||
@@ -192,6 +192,12 @@ print_cfs_rq(struct seq_file *m, int cpu, struct cfs_rq *cfs_rq) | |||
192 | #define TASK_DEAD 64 | 192 | #define TASK_DEAD 64 |
193 | #define TASK_WAKEKILL 128 | 193 | #define TASK_WAKEKILL 128 |
194 | #define TASK_WAKING 256 | 194 | #define TASK_WAKING 256 |
195 | #define TASK_STATE_MAX 512 | ||
196 | |||
197 | #define TASK_STATE_TO_CHAR_STR "RSDTtZXxKW" | ||
198 | |||
199 | extern char ___assert_task_state[1 - 2*!!( | ||
200 | sizeof(TASK_STATE_TO_CHAR_STR)-1 != ilog2(TASK_STATE_MAX)+1)]; | ||
195 | 201 | ||
196 | /* Convenience macros for the sake of set_task_state */ | 202 | /* Convenience macros for the sake of set_task_state */ |
197 | #define TASK_KILLABLE (TASK_WAKEKILL | TASK_UNINTERRUPTIBLE) | 203 | #define TASK_KILLABLE (TASK_WAKEKILL | TASK_UNINTERRUPTIBLE) |
@@ -1091,7 +1097,8 @@ struct sched_class { | |||
1091 | enum cpu_idle_type idle); | 1097 | enum cpu_idle_type idle); |
1092 | void (*pre_schedule) (struct rq *this_rq, struct task_struct *task); | 1098 | void (*pre_schedule) (struct rq *this_rq, struct task_struct *task); |
1093 | void (*post_schedule) (struct rq *this_rq); | 1099 | void (*post_schedule) (struct rq *this_rq); |
1094 | void (*task_wake_up) (struct rq *this_rq, struct task_struct *task); | 1100 | void (*task_waking) (struct rq *this_rq, struct task_struct *task); |
1101 | void (*task_woken) (struct rq *this_rq, struct task_struct *task); | ||
1095 | 1102 | ||
1096 | void (*set_cpus_allowed)(struct task_struct *p, | 1103 | void (*set_cpus_allowed)(struct task_struct *p, |
1097 | const struct cpumask *newmask); | 1104 | const struct cpumask *newmask); |
@@ -1115,7 +1122,7 @@ struct sched_class { | |||
1115 | struct task_struct *task); | 1122 | struct task_struct *task); |
1116 | 1123 | ||
1117 | #ifdef CONFIG_FAIR_GROUP_SCHED | 1124 | #ifdef CONFIG_FAIR_GROUP_SCHED |
1118 | void (*moved_group) (struct task_struct *p); | 1125 | void (*moved_group) (struct task_struct *p, int on_rq); |
1119 | #endif | 1126 | #endif |
1120 | }; | 1127 | }; |
1121 | 1128 | ||
@@ -1446,10 +1453,8 @@ struct task_struct { | |||
1446 | gfp_t lockdep_reclaim_gfp; | 1453 | gfp_t lockdep_reclaim_gfp; |
1447 | #endif | 1454 | #endif |
1448 | 1455 | ||
1449 | #ifdef CONFIG_FS_JOURNAL_INFO | ||
1450 | /* journalling filesystem info */ | 1456 | /* journalling filesystem info */ |
1451 | void *journal_info; | 1457 | void *journal_info; |
1452 | #endif | ||
1453 | 1458 | ||
1454 | /* stacked block device info */ | 1459 | /* stacked block device info */ |
1455 | struct bio *bio_list, **bio_tail; | 1460 | struct bio *bio_list, **bio_tail; |
@@ -1555,7 +1560,7 @@ struct task_struct { | |||
1555 | }; | 1560 | }; |
1556 | 1561 | ||
1557 | /* Future-safe accessor for struct task_struct's cpus_allowed. */ | 1562 | /* Future-safe accessor for struct task_struct's cpus_allowed. */ |
1558 | #define tsk_cpumask(tsk) (&(tsk)->cpus_allowed) | 1563 | #define tsk_cpus_allowed(tsk) (&(tsk)->cpus_allowed) |
1559 | 1564 | ||
1560 | /* | 1565 | /* |
1561 | * Priority of a process goes from 0..MAX_PRIO-1, valid RT | 1566 | * Priority of a process goes from 0..MAX_PRIO-1, valid RT |
@@ -2596,8 +2601,6 @@ static inline void mm_init_owner(struct mm_struct *mm, struct task_struct *p) | |||
2596 | } | 2601 | } |
2597 | #endif /* CONFIG_MM_OWNER */ | 2602 | #endif /* CONFIG_MM_OWNER */ |
2598 | 2603 | ||
2599 | #define TASK_STATE_TO_CHAR_STR "RSDTtZX" | ||
2600 | |||
2601 | #endif /* __KERNEL__ */ | 2604 | #endif /* __KERNEL__ */ |
2602 | 2605 | ||
2603 | #endif | 2606 | #endif |
diff --git a/include/linux/security.h b/include/linux/security.h index 466cbadbd1ef..2c627d361c02 100644 --- a/include/linux/security.h +++ b/include/linux/security.h | |||
@@ -95,8 +95,13 @@ struct seq_file; | |||
95 | extern int cap_netlink_send(struct sock *sk, struct sk_buff *skb); | 95 | extern int cap_netlink_send(struct sock *sk, struct sk_buff *skb); |
96 | extern int cap_netlink_recv(struct sk_buff *skb, int cap); | 96 | extern int cap_netlink_recv(struct sk_buff *skb, int cap); |
97 | 97 | ||
98 | #ifdef CONFIG_MMU | ||
98 | extern unsigned long mmap_min_addr; | 99 | extern unsigned long mmap_min_addr; |
99 | extern unsigned long dac_mmap_min_addr; | 100 | extern unsigned long dac_mmap_min_addr; |
101 | #else | ||
102 | #define dac_mmap_min_addr 0UL | ||
103 | #endif | ||
104 | |||
100 | /* | 105 | /* |
101 | * Values used in the task_security_ops calls | 106 | * Values used in the task_security_ops calls |
102 | */ | 107 | */ |
@@ -121,6 +126,7 @@ struct request_sock; | |||
121 | #define LSM_UNSAFE_PTRACE 2 | 126 | #define LSM_UNSAFE_PTRACE 2 |
122 | #define LSM_UNSAFE_PTRACE_CAP 4 | 127 | #define LSM_UNSAFE_PTRACE_CAP 4 |
123 | 128 | ||
129 | #ifdef CONFIG_MMU | ||
124 | /* | 130 | /* |
125 | * If a hint addr is less than mmap_min_addr change hint to be as | 131 | * If a hint addr is less than mmap_min_addr change hint to be as |
126 | * low as possible but still greater than mmap_min_addr | 132 | * low as possible but still greater than mmap_min_addr |
@@ -135,6 +141,7 @@ static inline unsigned long round_hint_to_min(unsigned long hint) | |||
135 | } | 141 | } |
136 | extern int mmap_min_addr_handler(struct ctl_table *table, int write, | 142 | extern int mmap_min_addr_handler(struct ctl_table *table, int write, |
137 | void __user *buffer, size_t *lenp, loff_t *ppos); | 143 | void __user *buffer, size_t *lenp, loff_t *ppos); |
144 | #endif | ||
138 | 145 | ||
139 | #ifdef CONFIG_SECURITY | 146 | #ifdef CONFIG_SECURITY |
140 | 147 | ||
diff --git a/include/linux/spi/dw_spi.h b/include/linux/spi/dw_spi.h new file mode 100644 index 000000000000..51b3e771a9a3 --- /dev/null +++ b/include/linux/spi/dw_spi.h | |||
@@ -0,0 +1,212 @@ | |||
1 | #ifndef DW_SPI_HEADER_H | ||
2 | #define DW_SPI_HEADER_H | ||
3 | #include <linux/io.h> | ||
4 | |||
5 | /* Bit fields in CTRLR0 */ | ||
6 | #define SPI_DFS_OFFSET 0 | ||
7 | |||
8 | #define SPI_FRF_OFFSET 4 | ||
9 | #define SPI_FRF_SPI 0x0 | ||
10 | #define SPI_FRF_SSP 0x1 | ||
11 | #define SPI_FRF_MICROWIRE 0x2 | ||
12 | #define SPI_FRF_RESV 0x3 | ||
13 | |||
14 | #define SPI_MODE_OFFSET 6 | ||
15 | #define SPI_SCPH_OFFSET 6 | ||
16 | #define SPI_SCOL_OFFSET 7 | ||
17 | #define SPI_TMOD_OFFSET 8 | ||
18 | #define SPI_TMOD_TR 0x0 /* xmit & recv */ | ||
19 | #define SPI_TMOD_TO 0x1 /* xmit only */ | ||
20 | #define SPI_TMOD_RO 0x2 /* recv only */ | ||
21 | #define SPI_TMOD_EPROMREAD 0x3 /* eeprom read mode */ | ||
22 | |||
23 | #define SPI_SLVOE_OFFSET 10 | ||
24 | #define SPI_SRL_OFFSET 11 | ||
25 | #define SPI_CFS_OFFSET 12 | ||
26 | |||
27 | /* Bit fields in SR, 7 bits */ | ||
28 | #define SR_MASK 0x7f /* cover 7 bits */ | ||
29 | #define SR_BUSY (1 << 0) | ||
30 | #define SR_TF_NOT_FULL (1 << 1) | ||
31 | #define SR_TF_EMPT (1 << 2) | ||
32 | #define SR_RF_NOT_EMPT (1 << 3) | ||
33 | #define SR_RF_FULL (1 << 4) | ||
34 | #define SR_TX_ERR (1 << 5) | ||
35 | #define SR_DCOL (1 << 6) | ||
36 | |||
37 | /* Bit fields in ISR, IMR, RISR, 7 bits */ | ||
38 | #define SPI_INT_TXEI (1 << 0) | ||
39 | #define SPI_INT_TXOI (1 << 1) | ||
40 | #define SPI_INT_RXUI (1 << 2) | ||
41 | #define SPI_INT_RXOI (1 << 3) | ||
42 | #define SPI_INT_RXFI (1 << 4) | ||
43 | #define SPI_INT_MSTI (1 << 5) | ||
44 | |||
45 | /* TX RX interrupt level threshhold, max can be 256 */ | ||
46 | #define SPI_INT_THRESHOLD 32 | ||
47 | |||
48 | enum dw_ssi_type { | ||
49 | SSI_MOTO_SPI = 0, | ||
50 | SSI_TI_SSP, | ||
51 | SSI_NS_MICROWIRE, | ||
52 | }; | ||
53 | |||
54 | struct dw_spi_reg { | ||
55 | u32 ctrl0; | ||
56 | u32 ctrl1; | ||
57 | u32 ssienr; | ||
58 | u32 mwcr; | ||
59 | u32 ser; | ||
60 | u32 baudr; | ||
61 | u32 txfltr; | ||
62 | u32 rxfltr; | ||
63 | u32 txflr; | ||
64 | u32 rxflr; | ||
65 | u32 sr; | ||
66 | u32 imr; | ||
67 | u32 isr; | ||
68 | u32 risr; | ||
69 | u32 txoicr; | ||
70 | u32 rxoicr; | ||
71 | u32 rxuicr; | ||
72 | u32 msticr; | ||
73 | u32 icr; | ||
74 | u32 dmacr; | ||
75 | u32 dmatdlr; | ||
76 | u32 dmardlr; | ||
77 | u32 idr; | ||
78 | u32 version; | ||
79 | u32 dr; /* Currently oper as 32 bits, | ||
80 | though only low 16 bits matters */ | ||
81 | } __packed; | ||
82 | |||
83 | struct dw_spi { | ||
84 | struct spi_master *master; | ||
85 | struct spi_device *cur_dev; | ||
86 | struct device *parent_dev; | ||
87 | enum dw_ssi_type type; | ||
88 | |||
89 | void __iomem *regs; | ||
90 | unsigned long paddr; | ||
91 | u32 iolen; | ||
92 | int irq; | ||
93 | u32 max_freq; /* max bus freq supported */ | ||
94 | |||
95 | u16 bus_num; | ||
96 | u16 num_cs; /* supported slave numbers */ | ||
97 | |||
98 | /* Driver message queue */ | ||
99 | struct workqueue_struct *workqueue; | ||
100 | struct work_struct pump_messages; | ||
101 | spinlock_t lock; | ||
102 | struct list_head queue; | ||
103 | int busy; | ||
104 | int run; | ||
105 | |||
106 | /* Message Transfer pump */ | ||
107 | struct tasklet_struct pump_transfers; | ||
108 | |||
109 | /* Current message transfer state info */ | ||
110 | struct spi_message *cur_msg; | ||
111 | struct spi_transfer *cur_transfer; | ||
112 | struct chip_data *cur_chip; | ||
113 | struct chip_data *prev_chip; | ||
114 | size_t len; | ||
115 | void *tx; | ||
116 | void *tx_end; | ||
117 | void *rx; | ||
118 | void *rx_end; | ||
119 | int dma_mapped; | ||
120 | dma_addr_t rx_dma; | ||
121 | dma_addr_t tx_dma; | ||
122 | size_t rx_map_len; | ||
123 | size_t tx_map_len; | ||
124 | u8 n_bytes; /* current is a 1/2 bytes op */ | ||
125 | u8 max_bits_per_word; /* maxim is 16b */ | ||
126 | u32 dma_width; | ||
127 | int cs_change; | ||
128 | int (*write)(struct dw_spi *dws); | ||
129 | int (*read)(struct dw_spi *dws); | ||
130 | irqreturn_t (*transfer_handler)(struct dw_spi *dws); | ||
131 | void (*cs_control)(u32 command); | ||
132 | |||
133 | /* Dma info */ | ||
134 | int dma_inited; | ||
135 | struct dma_chan *txchan; | ||
136 | struct dma_chan *rxchan; | ||
137 | int txdma_done; | ||
138 | int rxdma_done; | ||
139 | u64 tx_param; | ||
140 | u64 rx_param; | ||
141 | struct device *dma_dev; | ||
142 | dma_addr_t dma_addr; | ||
143 | |||
144 | /* Bus interface info */ | ||
145 | void *priv; | ||
146 | #ifdef CONFIG_DEBUG_FS | ||
147 | struct dentry *debugfs; | ||
148 | #endif | ||
149 | }; | ||
150 | |||
151 | #define dw_readl(dw, name) \ | ||
152 | __raw_readl(&(((struct dw_spi_reg *)dw->regs)->name)) | ||
153 | #define dw_writel(dw, name, val) \ | ||
154 | __raw_writel((val), &(((struct dw_spi_reg *)dw->regs)->name)) | ||
155 | #define dw_readw(dw, name) \ | ||
156 | __raw_readw(&(((struct dw_spi_reg *)dw->regs)->name)) | ||
157 | #define dw_writew(dw, name, val) \ | ||
158 | __raw_writew((val), &(((struct dw_spi_reg *)dw->regs)->name)) | ||
159 | |||
160 | static inline void spi_enable_chip(struct dw_spi *dws, int enable) | ||
161 | { | ||
162 | dw_writel(dws, ssienr, (enable ? 1 : 0)); | ||
163 | } | ||
164 | |||
165 | static inline void spi_set_clk(struct dw_spi *dws, u16 div) | ||
166 | { | ||
167 | dw_writel(dws, baudr, div); | ||
168 | } | ||
169 | |||
170 | static inline void spi_chip_sel(struct dw_spi *dws, u16 cs) | ||
171 | { | ||
172 | if (cs > dws->num_cs) | ||
173 | return; | ||
174 | dw_writel(dws, ser, 1 << cs); | ||
175 | } | ||
176 | |||
177 | /* Disable IRQ bits */ | ||
178 | static inline void spi_mask_intr(struct dw_spi *dws, u32 mask) | ||
179 | { | ||
180 | u32 new_mask; | ||
181 | |||
182 | new_mask = dw_readl(dws, imr) & ~mask; | ||
183 | dw_writel(dws, imr, new_mask); | ||
184 | } | ||
185 | |||
186 | /* Enable IRQ bits */ | ||
187 | static inline void spi_umask_intr(struct dw_spi *dws, u32 mask) | ||
188 | { | ||
189 | u32 new_mask; | ||
190 | |||
191 | new_mask = dw_readl(dws, imr) | mask; | ||
192 | dw_writel(dws, imr, new_mask); | ||
193 | } | ||
194 | |||
195 | /* | ||
196 | * Each SPI slave device to work with dw_api controller should | ||
197 | * has such a structure claiming its working mode (PIO/DMA etc), | ||
198 | * which can be save in the "controller_data" member of the | ||
199 | * struct spi_device | ||
200 | */ | ||
201 | struct dw_spi_chip { | ||
202 | u8 poll_mode; /* 0 for contoller polling mode */ | ||
203 | u8 type; /* SPI/SSP/Micrwire */ | ||
204 | u8 enable_dma; | ||
205 | void (*cs_control)(u32 command); | ||
206 | }; | ||
207 | |||
208 | extern int dw_spi_add_host(struct dw_spi *dws); | ||
209 | extern void dw_spi_remove_host(struct dw_spi *dws); | ||
210 | extern int dw_spi_suspend_host(struct dw_spi *dws); | ||
211 | extern int dw_spi_resume_host(struct dw_spi *dws); | ||
212 | #endif /* DW_SPI_HEADER_H */ | ||
diff --git a/include/linux/vermagic.h b/include/linux/vermagic.h index 79b9837d9ca0..cf97b5b9d1fe 100644 --- a/include/linux/vermagic.h +++ b/include/linux/vermagic.h | |||
@@ -1,4 +1,4 @@ | |||
1 | #include <linux/utsrelease.h> | 1 | #include <generated/utsrelease.h> |
2 | #include <linux/module.h> | 2 | #include <linux/module.h> |
3 | 3 | ||
4 | /* Simply sanity version stamp for modules. */ | 4 | /* Simply sanity version stamp for modules. */ |
diff --git a/include/linux/vt.h b/include/linux/vt.h index 3fb9944e50a6..d5dd0bc408fd 100644 --- a/include/linux/vt.h +++ b/include/linux/vt.h | |||
@@ -84,6 +84,8 @@ struct vt_setactivate { | |||
84 | 84 | ||
85 | #define VT_SETACTIVATE 0x560F /* Activate and set the mode of a console */ | 85 | #define VT_SETACTIVATE 0x560F /* Activate and set the mode of a console */ |
86 | 86 | ||
87 | #ifdef __KERNEL__ | ||
88 | |||
87 | #ifdef CONFIG_VT_CONSOLE | 89 | #ifdef CONFIG_VT_CONSOLE |
88 | 90 | ||
89 | extern int vt_kmsg_redirect(int new); | 91 | extern int vt_kmsg_redirect(int new); |
@@ -97,6 +99,8 @@ static inline int vt_kmsg_redirect(int new) | |||
97 | 99 | ||
98 | #endif | 100 | #endif |
99 | 101 | ||
102 | #endif /* __KERNEL__ */ | ||
103 | |||
100 | #define vt_get_kmsg_redirect() vt_kmsg_redirect(-1) | 104 | #define vt_get_kmsg_redirect() vt_kmsg_redirect(-1) |
101 | 105 | ||
102 | #endif /* _LINUX_VT_H */ | 106 | #endif /* _LINUX_VT_H */ |
diff --git a/include/linux/writeback.h b/include/linux/writeback.h index 705f01fe413a..c18c008f4bbf 100644 --- a/include/linux/writeback.h +++ b/include/linux/writeback.h | |||
@@ -79,8 +79,7 @@ void wakeup_flusher_threads(long nr_pages); | |||
79 | static inline void wait_on_inode(struct inode *inode) | 79 | static inline void wait_on_inode(struct inode *inode) |
80 | { | 80 | { |
81 | might_sleep(); | 81 | might_sleep(); |
82 | wait_on_bit(&inode->i_state, __I_LOCK, inode_wait, | 82 | wait_on_bit(&inode->i_state, __I_NEW, inode_wait, TASK_UNINTERRUPTIBLE); |
83 | TASK_UNINTERRUPTIBLE); | ||
84 | } | 83 | } |
85 | static inline void inode_sync_wait(struct inode *inode) | 84 | static inline void inode_sync_wait(struct inode *inode) |
86 | { | 85 | { |
diff --git a/include/scsi/osd_initiator.h b/include/scsi/osd_initiator.h index 39d6d1097153..a8f370126632 100644 --- a/include/scsi/osd_initiator.h +++ b/include/scsi/osd_initiator.h | |||
@@ -142,6 +142,7 @@ struct osd_request { | |||
142 | struct _osd_io_info { | 142 | struct _osd_io_info { |
143 | struct bio *bio; | 143 | struct bio *bio; |
144 | u64 total_bytes; | 144 | u64 total_bytes; |
145 | u64 residual; | ||
145 | struct request *req; | 146 | struct request *req; |
146 | struct _osd_req_data_segment *last_seg; | 147 | struct _osd_req_data_segment *last_seg; |
147 | u8 *pad_buff; | 148 | u8 *pad_buff; |
@@ -150,12 +151,14 @@ struct osd_request { | |||
150 | gfp_t alloc_flags; | 151 | gfp_t alloc_flags; |
151 | unsigned timeout; | 152 | unsigned timeout; |
152 | unsigned retries; | 153 | unsigned retries; |
154 | unsigned sense_len; | ||
153 | u8 sense[OSD_MAX_SENSE_LEN]; | 155 | u8 sense[OSD_MAX_SENSE_LEN]; |
154 | enum osd_attributes_mode attributes_mode; | 156 | enum osd_attributes_mode attributes_mode; |
155 | 157 | ||
156 | osd_req_done_fn *async_done; | 158 | osd_req_done_fn *async_done; |
157 | void *async_private; | 159 | void *async_private; |
158 | int async_error; | 160 | int async_error; |
161 | int req_errors; | ||
159 | }; | 162 | }; |
160 | 163 | ||
161 | static inline bool osd_req_is_ver1(struct osd_request *or) | 164 | static inline bool osd_req_is_ver1(struct osd_request *or) |
@@ -297,8 +300,6 @@ enum osd_err_priority { | |||
297 | }; | 300 | }; |
298 | 301 | ||
299 | struct osd_sense_info { | 302 | struct osd_sense_info { |
300 | u64 out_resid; /* Zero on success otherwise out residual */ | ||
301 | u64 in_resid; /* Zero on success otherwise in residual */ | ||
302 | enum osd_err_priority osd_err_pri; | 303 | enum osd_err_priority osd_err_pri; |
303 | 304 | ||
304 | int key; /* one of enum scsi_sense_keys */ | 305 | int key; /* one of enum scsi_sense_keys */ |
diff --git a/init/Makefile b/init/Makefile index 4a243df426f7..0bf677aa0872 100644 --- a/init/Makefile +++ b/init/Makefile | |||
@@ -15,12 +15,8 @@ mounts-$(CONFIG_BLK_DEV_RAM) += do_mounts_rd.o | |||
15 | mounts-$(CONFIG_BLK_DEV_INITRD) += do_mounts_initrd.o | 15 | mounts-$(CONFIG_BLK_DEV_INITRD) += do_mounts_initrd.o |
16 | mounts-$(CONFIG_BLK_DEV_MD) += do_mounts_md.o | 16 | mounts-$(CONFIG_BLK_DEV_MD) += do_mounts_md.o |
17 | 17 | ||
18 | # files to be removed upon make clean | ||
19 | clean-files := ../include/linux/compile.h | ||
20 | |||
21 | # dependencies on generated files need to be listed explicitly | 18 | # dependencies on generated files need to be listed explicitly |
22 | 19 | $(obj)/version.o: include/generated/compile.h | |
23 | $(obj)/version.o: include/linux/compile.h | ||
24 | 20 | ||
25 | # compile.h changes depending on hostname, generation number, etc, | 21 | # compile.h changes depending on hostname, generation number, etc, |
26 | # so we regenerate it always. | 22 | # so we regenerate it always. |
@@ -30,7 +26,7 @@ $(obj)/version.o: include/linux/compile.h | |||
30 | chk_compile.h = : | 26 | chk_compile.h = : |
31 | quiet_chk_compile.h = echo ' CHK $@' | 27 | quiet_chk_compile.h = echo ' CHK $@' |
32 | silent_chk_compile.h = : | 28 | silent_chk_compile.h = : |
33 | include/linux/compile.h: FORCE | 29 | include/generated/compile.h: FORCE |
34 | @$($(quiet)chk_compile.h) | 30 | @$($(quiet)chk_compile.h) |
35 | $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkcompile_h $@ \ | 31 | $(Q)$(CONFIG_SHELL) $(srctree)/scripts/mkcompile_h $@ \ |
36 | "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CC) $(KBUILD_CFLAGS)" | 32 | "$(UTS_MACHINE)" "$(CONFIG_SMP)" "$(CONFIG_PREEMPT)" "$(CC) $(KBUILD_CFLAGS)" |
diff --git a/init/initramfs.c b/init/initramfs.c index 4c00edc59689..b37d34beb90b 100644 --- a/init/initramfs.c +++ b/init/initramfs.c | |||
@@ -413,7 +413,7 @@ static unsigned my_inptr; /* index of next byte to be processed in inbuf */ | |||
413 | 413 | ||
414 | static char * __init unpack_to_rootfs(char *buf, unsigned len) | 414 | static char * __init unpack_to_rootfs(char *buf, unsigned len) |
415 | { | 415 | { |
416 | int written; | 416 | int written, res; |
417 | decompress_fn decompress; | 417 | decompress_fn decompress; |
418 | const char *compress_name; | 418 | const char *compress_name; |
419 | static __initdata char msg_buf[64]; | 419 | static __initdata char msg_buf[64]; |
@@ -445,10 +445,12 @@ static char * __init unpack_to_rootfs(char *buf, unsigned len) | |||
445 | } | 445 | } |
446 | this_header = 0; | 446 | this_header = 0; |
447 | decompress = decompress_method(buf, len, &compress_name); | 447 | decompress = decompress_method(buf, len, &compress_name); |
448 | if (decompress) | 448 | if (decompress) { |
449 | decompress(buf, len, NULL, flush_buffer, NULL, | 449 | res = decompress(buf, len, NULL, flush_buffer, NULL, |
450 | &my_inptr, error); | 450 | &my_inptr, error); |
451 | else if (compress_name) { | 451 | if (res) |
452 | error("decompressor failed"); | ||
453 | } else if (compress_name) { | ||
452 | if (!message) { | 454 | if (!message) { |
453 | snprintf(msg_buf, sizeof msg_buf, | 455 | snprintf(msg_buf, sizeof msg_buf, |
454 | "compression method %s not configured", | 456 | "compression method %s not configured", |
diff --git a/init/main.c b/init/main.c index c3db4a98b369..dac44a9356a5 100644 --- a/init/main.c +++ b/init/main.c | |||
@@ -369,12 +369,6 @@ static void __init smp_init(void) | |||
369 | { | 369 | { |
370 | unsigned int cpu; | 370 | unsigned int cpu; |
371 | 371 | ||
372 | /* | ||
373 | * Set up the current CPU as possible to migrate to. | ||
374 | * The other ones will be done by cpu_up/cpu_down() | ||
375 | */ | ||
376 | set_cpu_active(smp_processor_id(), true); | ||
377 | |||
378 | /* FIXME: This should be done in userspace --RR */ | 372 | /* FIXME: This should be done in userspace --RR */ |
379 | for_each_present_cpu(cpu) { | 373 | for_each_present_cpu(cpu) { |
380 | if (num_online_cpus() >= setup_max_cpus) | 374 | if (num_online_cpus() >= setup_max_cpus) |
@@ -486,6 +480,7 @@ static void __init boot_cpu_init(void) | |||
486 | int cpu = smp_processor_id(); | 480 | int cpu = smp_processor_id(); |
487 | /* Mark the boot cpu "present", "online" etc for SMP and UP case */ | 481 | /* Mark the boot cpu "present", "online" etc for SMP and UP case */ |
488 | set_cpu_online(cpu, true); | 482 | set_cpu_online(cpu, true); |
483 | set_cpu_active(cpu, true); | ||
489 | set_cpu_present(cpu, true); | 484 | set_cpu_present(cpu, true); |
490 | set_cpu_possible(cpu, true); | 485 | set_cpu_possible(cpu, true); |
491 | } | 486 | } |
diff --git a/init/version.c b/init/version.c index 52a8b98642b8..adff586401a5 100644 --- a/init/version.c +++ b/init/version.c | |||
@@ -6,11 +6,11 @@ | |||
6 | * May be freely distributed as part of Linux. | 6 | * May be freely distributed as part of Linux. |
7 | */ | 7 | */ |
8 | 8 | ||
9 | #include <linux/compile.h> | 9 | #include <generated/compile.h> |
10 | #include <linux/module.h> | 10 | #include <linux/module.h> |
11 | #include <linux/uts.h> | 11 | #include <linux/uts.h> |
12 | #include <linux/utsname.h> | 12 | #include <linux/utsname.h> |
13 | #include <linux/utsrelease.h> | 13 | #include <generated/utsrelease.h> |
14 | #include <linux/version.h> | 14 | #include <linux/version.h> |
15 | 15 | ||
16 | #ifndef CONFIG_KALLSYMS | 16 | #ifndef CONFIG_KALLSYMS |
diff --git a/kernel/audit_tree.c b/kernel/audit_tree.c index 2451dc6f3282..4b05bd9479db 100644 --- a/kernel/audit_tree.c +++ b/kernel/audit_tree.c | |||
@@ -277,7 +277,7 @@ static void untag_chunk(struct node *p) | |||
277 | owner->root = NULL; | 277 | owner->root = NULL; |
278 | } | 278 | } |
279 | 279 | ||
280 | for (i = j = 0; i < size; i++, j++) { | 280 | for (i = j = 0; j <= size; i++, j++) { |
281 | struct audit_tree *s; | 281 | struct audit_tree *s; |
282 | if (&chunk->owners[j] == p) { | 282 | if (&chunk->owners[j] == p) { |
283 | list_del_init(&p->list); | 283 | list_del_init(&p->list); |
@@ -290,7 +290,7 @@ static void untag_chunk(struct node *p) | |||
290 | if (!s) /* result of earlier fallback */ | 290 | if (!s) /* result of earlier fallback */ |
291 | continue; | 291 | continue; |
292 | get_tree(s); | 292 | get_tree(s); |
293 | list_replace_init(&chunk->owners[i].list, &new->owners[j].list); | 293 | list_replace_init(&chunk->owners[j].list, &new->owners[i].list); |
294 | } | 294 | } |
295 | 295 | ||
296 | list_replace_rcu(&chunk->hash, &new->hash); | 296 | list_replace_rcu(&chunk->hash, &new->hash); |
@@ -373,15 +373,17 @@ static int tag_chunk(struct inode *inode, struct audit_tree *tree) | |||
373 | for (n = 0; n < old->count; n++) { | 373 | for (n = 0; n < old->count; n++) { |
374 | if (old->owners[n].owner == tree) { | 374 | if (old->owners[n].owner == tree) { |
375 | spin_unlock(&hash_lock); | 375 | spin_unlock(&hash_lock); |
376 | put_inotify_watch(watch); | 376 | put_inotify_watch(&old->watch); |
377 | return 0; | 377 | return 0; |
378 | } | 378 | } |
379 | } | 379 | } |
380 | spin_unlock(&hash_lock); | 380 | spin_unlock(&hash_lock); |
381 | 381 | ||
382 | chunk = alloc_chunk(old->count + 1); | 382 | chunk = alloc_chunk(old->count + 1); |
383 | if (!chunk) | 383 | if (!chunk) { |
384 | put_inotify_watch(&old->watch); | ||
384 | return -ENOMEM; | 385 | return -ENOMEM; |
386 | } | ||
385 | 387 | ||
386 | mutex_lock(&inode->inotify_mutex); | 388 | mutex_lock(&inode->inotify_mutex); |
387 | if (inotify_clone_watch(&old->watch, &chunk->watch) < 0) { | 389 | if (inotify_clone_watch(&old->watch, &chunk->watch) < 0) { |
@@ -425,7 +427,8 @@ static int tag_chunk(struct inode *inode, struct audit_tree *tree) | |||
425 | spin_unlock(&hash_lock); | 427 | spin_unlock(&hash_lock); |
426 | inotify_evict_watch(&old->watch); | 428 | inotify_evict_watch(&old->watch); |
427 | mutex_unlock(&inode->inotify_mutex); | 429 | mutex_unlock(&inode->inotify_mutex); |
428 | put_inotify_watch(&old->watch); | 430 | put_inotify_watch(&old->watch); /* pair to inotify_find_watch */ |
431 | put_inotify_watch(&old->watch); /* and kill it */ | ||
429 | return 0; | 432 | return 0; |
430 | } | 433 | } |
431 | 434 | ||
diff --git a/kernel/bounds.c b/kernel/bounds.c index 3c5301381837..98a51f26c136 100644 --- a/kernel/bounds.c +++ b/kernel/bounds.c | |||
@@ -12,7 +12,7 @@ | |||
12 | 12 | ||
13 | void foo(void) | 13 | void foo(void) |
14 | { | 14 | { |
15 | /* The enum constants to put into include/linux/bounds.h */ | 15 | /* The enum constants to put into include/generated/bounds.h */ |
16 | DEFINE(NR_PAGEFLAGS, __NR_PAGEFLAGS); | 16 | DEFINE(NR_PAGEFLAGS, __NR_PAGEFLAGS); |
17 | DEFINE(MAX_NR_ZONES, __MAX_NR_ZONES); | 17 | DEFINE(MAX_NR_ZONES, __MAX_NR_ZONES); |
18 | /* End of constants */ | 18 | /* End of constants */ |
diff --git a/kernel/cpu.c b/kernel/cpu.c index 291ac586f37f..1c8ddd6ee940 100644 --- a/kernel/cpu.c +++ b/kernel/cpu.c | |||
@@ -209,6 +209,7 @@ static int __ref _cpu_down(unsigned int cpu, int tasks_frozen) | |||
209 | return -ENOMEM; | 209 | return -ENOMEM; |
210 | 210 | ||
211 | cpu_hotplug_begin(); | 211 | cpu_hotplug_begin(); |
212 | set_cpu_active(cpu, false); | ||
212 | err = __raw_notifier_call_chain(&cpu_chain, CPU_DOWN_PREPARE | mod, | 213 | err = __raw_notifier_call_chain(&cpu_chain, CPU_DOWN_PREPARE | mod, |
213 | hcpu, -1, &nr_calls); | 214 | hcpu, -1, &nr_calls); |
214 | if (err == NOTIFY_BAD) { | 215 | if (err == NOTIFY_BAD) { |
@@ -280,18 +281,6 @@ int __ref cpu_down(unsigned int cpu) | |||
280 | goto out; | 281 | goto out; |
281 | } | 282 | } |
282 | 283 | ||
283 | set_cpu_active(cpu, false); | ||
284 | |||
285 | /* | ||
286 | * Make sure the all cpus did the reschedule and are not | ||
287 | * using stale version of the cpu_active_mask. | ||
288 | * This is not strictly necessary becuase stop_machine() | ||
289 | * that we run down the line already provides the required | ||
290 | * synchronization. But it's really a side effect and we do not | ||
291 | * want to depend on the innards of the stop_machine here. | ||
292 | */ | ||
293 | synchronize_sched(); | ||
294 | |||
295 | err = _cpu_down(cpu, 0); | 284 | err = _cpu_down(cpu, 0); |
296 | 285 | ||
297 | out: | 286 | out: |
@@ -382,19 +371,12 @@ int disable_nonboot_cpus(void) | |||
382 | return error; | 371 | return error; |
383 | cpu_maps_update_begin(); | 372 | cpu_maps_update_begin(); |
384 | first_cpu = cpumask_first(cpu_online_mask); | 373 | first_cpu = cpumask_first(cpu_online_mask); |
385 | /* We take down all of the non-boot CPUs in one shot to avoid races | 374 | /* |
375 | * We take down all of the non-boot CPUs in one shot to avoid races | ||
386 | * with the userspace trying to use the CPU hotplug at the same time | 376 | * with the userspace trying to use the CPU hotplug at the same time |
387 | */ | 377 | */ |
388 | cpumask_clear(frozen_cpus); | 378 | cpumask_clear(frozen_cpus); |
389 | 379 | ||
390 | for_each_online_cpu(cpu) { | ||
391 | if (cpu == first_cpu) | ||
392 | continue; | ||
393 | set_cpu_active(cpu, false); | ||
394 | } | ||
395 | |||
396 | synchronize_sched(); | ||
397 | |||
398 | printk("Disabling non-boot CPUs ...\n"); | 380 | printk("Disabling non-boot CPUs ...\n"); |
399 | for_each_online_cpu(cpu) { | 381 | for_each_online_cpu(cpu) { |
400 | if (cpu == first_cpu) | 382 | if (cpu == first_cpu) |
diff --git a/kernel/exit.c b/kernel/exit.c index 5962d7ccf243..546774a31a66 100644 --- a/kernel/exit.c +++ b/kernel/exit.c | |||
@@ -68,10 +68,10 @@ static void __unhash_process(struct task_struct *p) | |||
68 | detach_pid(p, PIDTYPE_SID); | 68 | detach_pid(p, PIDTYPE_SID); |
69 | 69 | ||
70 | list_del_rcu(&p->tasks); | 70 | list_del_rcu(&p->tasks); |
71 | list_del_init(&p->sibling); | ||
71 | __get_cpu_var(process_counts)--; | 72 | __get_cpu_var(process_counts)--; |
72 | } | 73 | } |
73 | list_del_rcu(&p->thread_group); | 74 | list_del_rcu(&p->thread_group); |
74 | list_del_init(&p->sibling); | ||
75 | } | 75 | } |
76 | 76 | ||
77 | /* | 77 | /* |
@@ -736,12 +736,9 @@ static struct task_struct *find_new_reaper(struct task_struct *father) | |||
736 | /* | 736 | /* |
737 | * Any that need to be release_task'd are put on the @dead list. | 737 | * Any that need to be release_task'd are put on the @dead list. |
738 | */ | 738 | */ |
739 | static void reparent_thread(struct task_struct *father, struct task_struct *p, | 739 | static void reparent_leader(struct task_struct *father, struct task_struct *p, |
740 | struct list_head *dead) | 740 | struct list_head *dead) |
741 | { | 741 | { |
742 | if (p->pdeath_signal) | ||
743 | group_send_sig_info(p->pdeath_signal, SEND_SIG_NOINFO, p); | ||
744 | |||
745 | list_move_tail(&p->sibling, &p->real_parent->children); | 742 | list_move_tail(&p->sibling, &p->real_parent->children); |
746 | 743 | ||
747 | if (task_detached(p)) | 744 | if (task_detached(p)) |
@@ -780,12 +777,18 @@ static void forget_original_parent(struct task_struct *father) | |||
780 | reaper = find_new_reaper(father); | 777 | reaper = find_new_reaper(father); |
781 | 778 | ||
782 | list_for_each_entry_safe(p, n, &father->children, sibling) { | 779 | list_for_each_entry_safe(p, n, &father->children, sibling) { |
783 | p->real_parent = reaper; | 780 | struct task_struct *t = p; |
784 | if (p->parent == father) { | 781 | do { |
785 | BUG_ON(task_ptrace(p)); | 782 | t->real_parent = reaper; |
786 | p->parent = p->real_parent; | 783 | if (t->parent == father) { |
787 | } | 784 | BUG_ON(task_ptrace(t)); |
788 | reparent_thread(father, p, &dead_children); | 785 | t->parent = t->real_parent; |
786 | } | ||
787 | if (t->pdeath_signal) | ||
788 | group_send_sig_info(t->pdeath_signal, | ||
789 | SEND_SIG_NOINFO, t); | ||
790 | } while_each_thread(p, t); | ||
791 | reparent_leader(father, p, &dead_children); | ||
789 | } | 792 | } |
790 | write_unlock_irq(&tasklist_lock); | 793 | write_unlock_irq(&tasklist_lock); |
791 | 794 | ||
@@ -1551,14 +1554,9 @@ static int do_wait_thread(struct wait_opts *wo, struct task_struct *tsk) | |||
1551 | struct task_struct *p; | 1554 | struct task_struct *p; |
1552 | 1555 | ||
1553 | list_for_each_entry(p, &tsk->children, sibling) { | 1556 | list_for_each_entry(p, &tsk->children, sibling) { |
1554 | /* | 1557 | int ret = wait_consider_task(wo, 0, p); |
1555 | * Do not consider detached threads. | 1558 | if (ret) |
1556 | */ | 1559 | return ret; |
1557 | if (!task_detached(p)) { | ||
1558 | int ret = wait_consider_task(wo, 0, p); | ||
1559 | if (ret) | ||
1560 | return ret; | ||
1561 | } | ||
1562 | } | 1560 | } |
1563 | 1561 | ||
1564 | return 0; | 1562 | return 0; |
diff --git a/kernel/fork.c b/kernel/fork.c index 202a0ba63d3c..5b2959b3ffc2 100644 --- a/kernel/fork.c +++ b/kernel/fork.c | |||
@@ -1291,7 +1291,6 @@ static struct task_struct *copy_process(unsigned long clone_flags, | |||
1291 | } | 1291 | } |
1292 | 1292 | ||
1293 | if (likely(p->pid)) { | 1293 | if (likely(p->pid)) { |
1294 | list_add_tail(&p->sibling, &p->real_parent->children); | ||
1295 | tracehook_finish_clone(p, clone_flags, trace); | 1294 | tracehook_finish_clone(p, clone_flags, trace); |
1296 | 1295 | ||
1297 | if (thread_group_leader(p)) { | 1296 | if (thread_group_leader(p)) { |
@@ -1303,6 +1302,7 @@ static struct task_struct *copy_process(unsigned long clone_flags, | |||
1303 | p->signal->tty = tty_kref_get(current->signal->tty); | 1302 | p->signal->tty = tty_kref_get(current->signal->tty); |
1304 | attach_pid(p, PIDTYPE_PGID, task_pgrp(current)); | 1303 | attach_pid(p, PIDTYPE_PGID, task_pgrp(current)); |
1305 | attach_pid(p, PIDTYPE_SID, task_session(current)); | 1304 | attach_pid(p, PIDTYPE_SID, task_session(current)); |
1305 | list_add_tail(&p->sibling, &p->real_parent->children); | ||
1306 | list_add_tail_rcu(&p->tasks, &init_task.tasks); | 1306 | list_add_tail_rcu(&p->tasks, &init_task.tasks); |
1307 | __get_cpu_var(process_counts)++; | 1307 | __get_cpu_var(process_counts)++; |
1308 | } | 1308 | } |
diff --git a/kernel/kexec.c b/kernel/kexec.c index 433e9fcc1fc5..a9a93d9ee7a7 100644 --- a/kernel/kexec.c +++ b/kernel/kexec.c | |||
@@ -21,7 +21,7 @@ | |||
21 | #include <linux/hardirq.h> | 21 | #include <linux/hardirq.h> |
22 | #include <linux/elf.h> | 22 | #include <linux/elf.h> |
23 | #include <linux/elfcore.h> | 23 | #include <linux/elfcore.h> |
24 | #include <linux/utsrelease.h> | 24 | #include <generated/utsrelease.h> |
25 | #include <linux/utsname.h> | 25 | #include <linux/utsname.h> |
26 | #include <linux/numa.h> | 26 | #include <linux/numa.h> |
27 | #include <linux/suspend.h> | 27 | #include <linux/suspend.h> |
diff --git a/kernel/kthread.c b/kernel/kthread.c index ab7ae57773e1..fbb6222fe7e0 100644 --- a/kernel/kthread.c +++ b/kernel/kthread.c | |||
@@ -150,6 +150,29 @@ struct task_struct *kthread_create(int (*threadfn)(void *data), | |||
150 | EXPORT_SYMBOL(kthread_create); | 150 | EXPORT_SYMBOL(kthread_create); |
151 | 151 | ||
152 | /** | 152 | /** |
153 | * kthread_bind - bind a just-created kthread to a cpu. | ||
154 | * @p: thread created by kthread_create(). | ||
155 | * @cpu: cpu (might not be online, must be possible) for @k to run on. | ||
156 | * | ||
157 | * Description: This function is equivalent to set_cpus_allowed(), | ||
158 | * except that @cpu doesn't need to be online, and the thread must be | ||
159 | * stopped (i.e., just returned from kthread_create()). | ||
160 | */ | ||
161 | void kthread_bind(struct task_struct *p, unsigned int cpu) | ||
162 | { | ||
163 | /* Must have done schedule() in kthread() before we set_task_cpu */ | ||
164 | if (!wait_task_inactive(p, TASK_UNINTERRUPTIBLE)) { | ||
165 | WARN_ON(1); | ||
166 | return; | ||
167 | } | ||
168 | |||
169 | p->cpus_allowed = cpumask_of_cpu(cpu); | ||
170 | p->rt.nr_cpus_allowed = 1; | ||
171 | p->flags |= PF_THREAD_BOUND; | ||
172 | } | ||
173 | EXPORT_SYMBOL(kthread_bind); | ||
174 | |||
175 | /** | ||
153 | * kthread_stop - stop a thread created by kthread_create(). | 176 | * kthread_stop - stop a thread created by kthread_create(). |
154 | * @k: thread created by kthread_create(). | 177 | * @k: thread created by kthread_create(). |
155 | * | 178 | * |
diff --git a/kernel/module.c b/kernel/module.c index a65dc787a27b..e96b8ed1cb6a 100644 --- a/kernel/module.c +++ b/kernel/module.c | |||
@@ -1910,9 +1910,7 @@ static void kmemleak_load_module(struct module *mod, Elf_Ehdr *hdr, | |||
1910 | unsigned int i; | 1910 | unsigned int i; |
1911 | 1911 | ||
1912 | /* only scan the sections containing data */ | 1912 | /* only scan the sections containing data */ |
1913 | kmemleak_scan_area(mod->module_core, (unsigned long)mod - | 1913 | kmemleak_scan_area(mod, sizeof(struct module), GFP_KERNEL); |
1914 | (unsigned long)mod->module_core, | ||
1915 | sizeof(struct module), GFP_KERNEL); | ||
1916 | 1914 | ||
1917 | for (i = 1; i < hdr->e_shnum; i++) { | 1915 | for (i = 1; i < hdr->e_shnum; i++) { |
1918 | if (!(sechdrs[i].sh_flags & SHF_ALLOC)) | 1916 | if (!(sechdrs[i].sh_flags & SHF_ALLOC)) |
@@ -1921,8 +1919,7 @@ static void kmemleak_load_module(struct module *mod, Elf_Ehdr *hdr, | |||
1921 | && strncmp(secstrings + sechdrs[i].sh_name, ".bss", 4) != 0) | 1919 | && strncmp(secstrings + sechdrs[i].sh_name, ".bss", 4) != 0) |
1922 | continue; | 1920 | continue; |
1923 | 1921 | ||
1924 | kmemleak_scan_area(mod->module_core, sechdrs[i].sh_addr - | 1922 | kmemleak_scan_area((void *)sechdrs[i].sh_addr, |
1925 | (unsigned long)mod->module_core, | ||
1926 | sechdrs[i].sh_size, GFP_KERNEL); | 1923 | sechdrs[i].sh_size, GFP_KERNEL); |
1927 | } | 1924 | } |
1928 | } | 1925 | } |
@@ -2250,6 +2247,12 @@ static noinline struct module *load_module(void __user *umod, | |||
2250 | "_ftrace_events", | 2247 | "_ftrace_events", |
2251 | sizeof(*mod->trace_events), | 2248 | sizeof(*mod->trace_events), |
2252 | &mod->num_trace_events); | 2249 | &mod->num_trace_events); |
2250 | /* | ||
2251 | * This section contains pointers to allocated objects in the trace | ||
2252 | * code and not scanning it leads to false positives. | ||
2253 | */ | ||
2254 | kmemleak_scan_area(mod->trace_events, sizeof(*mod->trace_events) * | ||
2255 | mod->num_trace_events, GFP_KERNEL); | ||
2253 | #endif | 2256 | #endif |
2254 | #ifdef CONFIG_FTRACE_MCOUNT_RECORD | 2257 | #ifdef CONFIG_FTRACE_MCOUNT_RECORD |
2255 | /* sechdrs[0].sh_size is always zero */ | 2258 | /* sechdrs[0].sh_size is always zero */ |
diff --git a/kernel/perf_event.c b/kernel/perf_event.c index 03cc061398d1..e0eb4a2fe183 100644 --- a/kernel/perf_event.c +++ b/kernel/perf_event.c | |||
@@ -1617,7 +1617,7 @@ static struct perf_event_context *find_get_context(pid_t pid, int cpu) | |||
1617 | * offline CPU and activate it when the CPU comes up, but | 1617 | * offline CPU and activate it when the CPU comes up, but |
1618 | * that's for later. | 1618 | * that's for later. |
1619 | */ | 1619 | */ |
1620 | if (!cpu_isset(cpu, cpu_online_map)) | 1620 | if (!cpu_online(cpu)) |
1621 | return ERR_PTR(-ENODEV); | 1621 | return ERR_PTR(-ENODEV); |
1622 | 1622 | ||
1623 | cpuctx = &per_cpu(perf_cpu_context, cpu); | 1623 | cpuctx = &per_cpu(perf_cpu_context, cpu); |
diff --git a/kernel/printk.c b/kernel/printk.c index 1ded8e7dd19b..17463ca2e229 100644 --- a/kernel/printk.c +++ b/kernel/printk.c | |||
@@ -1412,7 +1412,7 @@ static LIST_HEAD(dump_list); | |||
1412 | 1412 | ||
1413 | /** | 1413 | /** |
1414 | * kmsg_dump_register - register a kernel log dumper. | 1414 | * kmsg_dump_register - register a kernel log dumper. |
1415 | * @dump: pointer to the kmsg_dumper structure | 1415 | * @dumper: pointer to the kmsg_dumper structure |
1416 | * | 1416 | * |
1417 | * Adds a kernel log dumper to the system. The dump callback in the | 1417 | * Adds a kernel log dumper to the system. The dump callback in the |
1418 | * structure will be called when the kernel oopses or panics and must be | 1418 | * structure will be called when the kernel oopses or panics and must be |
@@ -1442,7 +1442,7 @@ EXPORT_SYMBOL_GPL(kmsg_dump_register); | |||
1442 | 1442 | ||
1443 | /** | 1443 | /** |
1444 | * kmsg_dump_unregister - unregister a kmsg dumper. | 1444 | * kmsg_dump_unregister - unregister a kmsg dumper. |
1445 | * @dump: pointer to the kmsg_dumper structure | 1445 | * @dumper: pointer to the kmsg_dumper structure |
1446 | * | 1446 | * |
1447 | * Removes a dump device from the system. Returns zero on success and | 1447 | * Removes a dump device from the system. Returns zero on success and |
1448 | * %-EINVAL otherwise. | 1448 | * %-EINVAL otherwise. |
diff --git a/kernel/sched.c b/kernel/sched.c index 18cceeecce35..720df108a2d6 100644 --- a/kernel/sched.c +++ b/kernel/sched.c | |||
@@ -26,6 +26,8 @@ | |||
26 | * Thomas Gleixner, Mike Kravetz | 26 | * Thomas Gleixner, Mike Kravetz |
27 | */ | 27 | */ |
28 | 28 | ||
29 | #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt | ||
30 | |||
29 | #include <linux/mm.h> | 31 | #include <linux/mm.h> |
30 | #include <linux/module.h> | 32 | #include <linux/module.h> |
31 | #include <linux/nmi.h> | 33 | #include <linux/nmi.h> |
@@ -2002,39 +2004,6 @@ static inline void check_class_changed(struct rq *rq, struct task_struct *p, | |||
2002 | p->sched_class->prio_changed(rq, p, oldprio, running); | 2004 | p->sched_class->prio_changed(rq, p, oldprio, running); |
2003 | } | 2005 | } |
2004 | 2006 | ||
2005 | /** | ||
2006 | * kthread_bind - bind a just-created kthread to a cpu. | ||
2007 | * @p: thread created by kthread_create(). | ||
2008 | * @cpu: cpu (might not be online, must be possible) for @k to run on. | ||
2009 | * | ||
2010 | * Description: This function is equivalent to set_cpus_allowed(), | ||
2011 | * except that @cpu doesn't need to be online, and the thread must be | ||
2012 | * stopped (i.e., just returned from kthread_create()). | ||
2013 | * | ||
2014 | * Function lives here instead of kthread.c because it messes with | ||
2015 | * scheduler internals which require locking. | ||
2016 | */ | ||
2017 | void kthread_bind(struct task_struct *p, unsigned int cpu) | ||
2018 | { | ||
2019 | struct rq *rq = cpu_rq(cpu); | ||
2020 | unsigned long flags; | ||
2021 | |||
2022 | /* Must have done schedule() in kthread() before we set_task_cpu */ | ||
2023 | if (!wait_task_inactive(p, TASK_UNINTERRUPTIBLE)) { | ||
2024 | WARN_ON(1); | ||
2025 | return; | ||
2026 | } | ||
2027 | |||
2028 | raw_spin_lock_irqsave(&rq->lock, flags); | ||
2029 | update_rq_clock(rq); | ||
2030 | set_task_cpu(p, cpu); | ||
2031 | p->cpus_allowed = cpumask_of_cpu(cpu); | ||
2032 | p->rt.nr_cpus_allowed = 1; | ||
2033 | p->flags |= PF_THREAD_BOUND; | ||
2034 | raw_spin_unlock_irqrestore(&rq->lock, flags); | ||
2035 | } | ||
2036 | EXPORT_SYMBOL(kthread_bind); | ||
2037 | |||
2038 | #ifdef CONFIG_SMP | 2007 | #ifdef CONFIG_SMP |
2039 | /* | 2008 | /* |
2040 | * Is this task likely cache-hot: | 2009 | * Is this task likely cache-hot: |
@@ -2044,6 +2013,9 @@ task_hot(struct task_struct *p, u64 now, struct sched_domain *sd) | |||
2044 | { | 2013 | { |
2045 | s64 delta; | 2014 | s64 delta; |
2046 | 2015 | ||
2016 | if (p->sched_class != &fair_sched_class) | ||
2017 | return 0; | ||
2018 | |||
2047 | /* | 2019 | /* |
2048 | * Buddy candidates are cache hot: | 2020 | * Buddy candidates are cache hot: |
2049 | */ | 2021 | */ |
@@ -2052,9 +2024,6 @@ task_hot(struct task_struct *p, u64 now, struct sched_domain *sd) | |||
2052 | &p->se == cfs_rq_of(&p->se)->last)) | 2024 | &p->se == cfs_rq_of(&p->se)->last)) |
2053 | return 1; | 2025 | return 1; |
2054 | 2026 | ||
2055 | if (p->sched_class != &fair_sched_class) | ||
2056 | return 0; | ||
2057 | |||
2058 | if (sysctl_sched_migration_cost == -1) | 2027 | if (sysctl_sched_migration_cost == -1) |
2059 | return 1; | 2028 | return 1; |
2060 | if (sysctl_sched_migration_cost == 0) | 2029 | if (sysctl_sched_migration_cost == 0) |
@@ -2065,22 +2034,24 @@ task_hot(struct task_struct *p, u64 now, struct sched_domain *sd) | |||
2065 | return delta < (s64)sysctl_sched_migration_cost; | 2034 | return delta < (s64)sysctl_sched_migration_cost; |
2066 | } | 2035 | } |
2067 | 2036 | ||
2068 | |||
2069 | void set_task_cpu(struct task_struct *p, unsigned int new_cpu) | 2037 | void set_task_cpu(struct task_struct *p, unsigned int new_cpu) |
2070 | { | 2038 | { |
2071 | int old_cpu = task_cpu(p); | 2039 | #ifdef CONFIG_SCHED_DEBUG |
2072 | struct cfs_rq *old_cfsrq = task_cfs_rq(p), | 2040 | /* |
2073 | *new_cfsrq = cpu_cfs_rq(old_cfsrq, new_cpu); | 2041 | * We should never call set_task_cpu() on a blocked task, |
2042 | * ttwu() will sort out the placement. | ||
2043 | */ | ||
2044 | WARN_ON_ONCE(p->state != TASK_RUNNING && p->state != TASK_WAKING && | ||
2045 | !(task_thread_info(p)->preempt_count & PREEMPT_ACTIVE)); | ||
2046 | #endif | ||
2074 | 2047 | ||
2075 | trace_sched_migrate_task(p, new_cpu); | 2048 | trace_sched_migrate_task(p, new_cpu); |
2076 | 2049 | ||
2077 | if (old_cpu != new_cpu) { | 2050 | if (task_cpu(p) == new_cpu) |
2078 | p->se.nr_migrations++; | 2051 | return; |
2079 | perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, | 2052 | |
2080 | 1, 1, NULL, 0); | 2053 | p->se.nr_migrations++; |
2081 | } | 2054 | perf_sw_event(PERF_COUNT_SW_CPU_MIGRATIONS, 1, 1, NULL, 0); |
2082 | p->se.vruntime -= old_cfsrq->min_vruntime - | ||
2083 | new_cfsrq->min_vruntime; | ||
2084 | 2055 | ||
2085 | __set_task_cpu(p, new_cpu); | 2056 | __set_task_cpu(p, new_cpu); |
2086 | } | 2057 | } |
@@ -2105,13 +2076,10 @@ migrate_task(struct task_struct *p, int dest_cpu, struct migration_req *req) | |||
2105 | 2076 | ||
2106 | /* | 2077 | /* |
2107 | * If the task is not on a runqueue (and not running), then | 2078 | * If the task is not on a runqueue (and not running), then |
2108 | * it is sufficient to simply update the task's cpu field. | 2079 | * the next wake-up will properly place the task. |
2109 | */ | 2080 | */ |
2110 | if (!p->se.on_rq && !task_running(rq, p)) { | 2081 | if (!p->se.on_rq && !task_running(rq, p)) |
2111 | update_rq_clock(rq); | ||
2112 | set_task_cpu(p, dest_cpu); | ||
2113 | return 0; | 2082 | return 0; |
2114 | } | ||
2115 | 2083 | ||
2116 | init_completion(&req->done); | 2084 | init_completion(&req->done); |
2117 | req->task = p; | 2085 | req->task = p; |
@@ -2317,10 +2285,73 @@ void task_oncpu_function_call(struct task_struct *p, | |||
2317 | } | 2285 | } |
2318 | 2286 | ||
2319 | #ifdef CONFIG_SMP | 2287 | #ifdef CONFIG_SMP |
2288 | static int select_fallback_rq(int cpu, struct task_struct *p) | ||
2289 | { | ||
2290 | int dest_cpu; | ||
2291 | const struct cpumask *nodemask = cpumask_of_node(cpu_to_node(cpu)); | ||
2292 | |||
2293 | /* Look for allowed, online CPU in same node. */ | ||
2294 | for_each_cpu_and(dest_cpu, nodemask, cpu_active_mask) | ||
2295 | if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed)) | ||
2296 | return dest_cpu; | ||
2297 | |||
2298 | /* Any allowed, online CPU? */ | ||
2299 | dest_cpu = cpumask_any_and(&p->cpus_allowed, cpu_active_mask); | ||
2300 | if (dest_cpu < nr_cpu_ids) | ||
2301 | return dest_cpu; | ||
2302 | |||
2303 | /* No more Mr. Nice Guy. */ | ||
2304 | if (dest_cpu >= nr_cpu_ids) { | ||
2305 | rcu_read_lock(); | ||
2306 | cpuset_cpus_allowed_locked(p, &p->cpus_allowed); | ||
2307 | rcu_read_unlock(); | ||
2308 | dest_cpu = cpumask_any_and(cpu_active_mask, &p->cpus_allowed); | ||
2309 | |||
2310 | /* | ||
2311 | * Don't tell them about moving exiting tasks or | ||
2312 | * kernel threads (both mm NULL), since they never | ||
2313 | * leave kernel. | ||
2314 | */ | ||
2315 | if (p->mm && printk_ratelimit()) { | ||
2316 | printk(KERN_INFO "process %d (%s) no " | ||
2317 | "longer affine to cpu%d\n", | ||
2318 | task_pid_nr(p), p->comm, cpu); | ||
2319 | } | ||
2320 | } | ||
2321 | |||
2322 | return dest_cpu; | ||
2323 | } | ||
2324 | |||
2325 | /* | ||
2326 | * Called from: | ||
2327 | * | ||
2328 | * - fork, @p is stable because it isn't on the tasklist yet | ||
2329 | * | ||
2330 | * - exec, @p is unstable, retry loop | ||
2331 | * | ||
2332 | * - wake-up, we serialize ->cpus_allowed against TASK_WAKING so | ||
2333 | * we should be good. | ||
2334 | */ | ||
2320 | static inline | 2335 | static inline |
2321 | int select_task_rq(struct task_struct *p, int sd_flags, int wake_flags) | 2336 | int select_task_rq(struct task_struct *p, int sd_flags, int wake_flags) |
2322 | { | 2337 | { |
2323 | return p->sched_class->select_task_rq(p, sd_flags, wake_flags); | 2338 | int cpu = p->sched_class->select_task_rq(p, sd_flags, wake_flags); |
2339 | |||
2340 | /* | ||
2341 | * In order not to call set_task_cpu() on a blocking task we need | ||
2342 | * to rely on ttwu() to place the task on a valid ->cpus_allowed | ||
2343 | * cpu. | ||
2344 | * | ||
2345 | * Since this is common to all placement strategies, this lives here. | ||
2346 | * | ||
2347 | * [ this allows ->select_task() to simply return task_cpu(p) and | ||
2348 | * not worry about this generic constraint ] | ||
2349 | */ | ||
2350 | if (unlikely(!cpumask_test_cpu(cpu, &p->cpus_allowed) || | ||
2351 | !cpu_active(cpu))) | ||
2352 | cpu = select_fallback_rq(task_cpu(p), p); | ||
2353 | |||
2354 | return cpu; | ||
2324 | } | 2355 | } |
2325 | #endif | 2356 | #endif |
2326 | 2357 | ||
@@ -2375,6 +2406,10 @@ static int try_to_wake_up(struct task_struct *p, unsigned int state, | |||
2375 | if (task_contributes_to_load(p)) | 2406 | if (task_contributes_to_load(p)) |
2376 | rq->nr_uninterruptible--; | 2407 | rq->nr_uninterruptible--; |
2377 | p->state = TASK_WAKING; | 2408 | p->state = TASK_WAKING; |
2409 | |||
2410 | if (p->sched_class->task_waking) | ||
2411 | p->sched_class->task_waking(rq, p); | ||
2412 | |||
2378 | __task_rq_unlock(rq); | 2413 | __task_rq_unlock(rq); |
2379 | 2414 | ||
2380 | cpu = select_task_rq(p, SD_BALANCE_WAKE, wake_flags); | 2415 | cpu = select_task_rq(p, SD_BALANCE_WAKE, wake_flags); |
@@ -2438,8 +2473,8 @@ out_running: | |||
2438 | 2473 | ||
2439 | p->state = TASK_RUNNING; | 2474 | p->state = TASK_RUNNING; |
2440 | #ifdef CONFIG_SMP | 2475 | #ifdef CONFIG_SMP |
2441 | if (p->sched_class->task_wake_up) | 2476 | if (p->sched_class->task_woken) |
2442 | p->sched_class->task_wake_up(rq, p); | 2477 | p->sched_class->task_woken(rq, p); |
2443 | 2478 | ||
2444 | if (unlikely(rq->idle_stamp)) { | 2479 | if (unlikely(rq->idle_stamp)) { |
2445 | u64 delta = rq->clock - rq->idle_stamp; | 2480 | u64 delta = rq->clock - rq->idle_stamp; |
@@ -2538,14 +2573,6 @@ static void __sched_fork(struct task_struct *p) | |||
2538 | #ifdef CONFIG_PREEMPT_NOTIFIERS | 2573 | #ifdef CONFIG_PREEMPT_NOTIFIERS |
2539 | INIT_HLIST_HEAD(&p->preempt_notifiers); | 2574 | INIT_HLIST_HEAD(&p->preempt_notifiers); |
2540 | #endif | 2575 | #endif |
2541 | |||
2542 | /* | ||
2543 | * We mark the process as running here, but have not actually | ||
2544 | * inserted it onto the runqueue yet. This guarantees that | ||
2545 | * nobody will actually run it, and a signal or other external | ||
2546 | * event cannot wake it up and insert it on the runqueue either. | ||
2547 | */ | ||
2548 | p->state = TASK_RUNNING; | ||
2549 | } | 2576 | } |
2550 | 2577 | ||
2551 | /* | 2578 | /* |
@@ -2556,6 +2583,12 @@ void sched_fork(struct task_struct *p, int clone_flags) | |||
2556 | int cpu = get_cpu(); | 2583 | int cpu = get_cpu(); |
2557 | 2584 | ||
2558 | __sched_fork(p); | 2585 | __sched_fork(p); |
2586 | /* | ||
2587 | * We mark the process as waking here. This guarantees that | ||
2588 | * nobody will actually run it, and a signal or other external | ||
2589 | * event cannot wake it up and insert it on the runqueue either. | ||
2590 | */ | ||
2591 | p->state = TASK_WAKING; | ||
2559 | 2592 | ||
2560 | /* | 2593 | /* |
2561 | * Revert to default priority/policy on fork if requested. | 2594 | * Revert to default priority/policy on fork if requested. |
@@ -2624,14 +2657,15 @@ void wake_up_new_task(struct task_struct *p, unsigned long clone_flags) | |||
2624 | struct rq *rq; | 2657 | struct rq *rq; |
2625 | 2658 | ||
2626 | rq = task_rq_lock(p, &flags); | 2659 | rq = task_rq_lock(p, &flags); |
2627 | BUG_ON(p->state != TASK_RUNNING); | 2660 | BUG_ON(p->state != TASK_WAKING); |
2661 | p->state = TASK_RUNNING; | ||
2628 | update_rq_clock(rq); | 2662 | update_rq_clock(rq); |
2629 | activate_task(rq, p, 0); | 2663 | activate_task(rq, p, 0); |
2630 | trace_sched_wakeup_new(rq, p, 1); | 2664 | trace_sched_wakeup_new(rq, p, 1); |
2631 | check_preempt_curr(rq, p, WF_FORK); | 2665 | check_preempt_curr(rq, p, WF_FORK); |
2632 | #ifdef CONFIG_SMP | 2666 | #ifdef CONFIG_SMP |
2633 | if (p->sched_class->task_wake_up) | 2667 | if (p->sched_class->task_woken) |
2634 | p->sched_class->task_wake_up(rq, p); | 2668 | p->sched_class->task_woken(rq, p); |
2635 | #endif | 2669 | #endif |
2636 | task_rq_unlock(rq, &flags); | 2670 | task_rq_unlock(rq, &flags); |
2637 | } | 2671 | } |
@@ -3101,21 +3135,36 @@ static void double_rq_unlock(struct rq *rq1, struct rq *rq2) | |||
3101 | } | 3135 | } |
3102 | 3136 | ||
3103 | /* | 3137 | /* |
3104 | * If dest_cpu is allowed for this process, migrate the task to it. | 3138 | * sched_exec - execve() is a valuable balancing opportunity, because at |
3105 | * This is accomplished by forcing the cpu_allowed mask to only | 3139 | * this point the task has the smallest effective memory and cache footprint. |
3106 | * allow dest_cpu, which will force the cpu onto dest_cpu. Then | ||
3107 | * the cpu_allowed mask is restored. | ||
3108 | */ | 3140 | */ |
3109 | static void sched_migrate_task(struct task_struct *p, int dest_cpu) | 3141 | void sched_exec(void) |
3110 | { | 3142 | { |
3143 | struct task_struct *p = current; | ||
3111 | struct migration_req req; | 3144 | struct migration_req req; |
3145 | int dest_cpu, this_cpu; | ||
3112 | unsigned long flags; | 3146 | unsigned long flags; |
3113 | struct rq *rq; | 3147 | struct rq *rq; |
3114 | 3148 | ||
3149 | again: | ||
3150 | this_cpu = get_cpu(); | ||
3151 | dest_cpu = select_task_rq(p, SD_BALANCE_EXEC, 0); | ||
3152 | if (dest_cpu == this_cpu) { | ||
3153 | put_cpu(); | ||
3154 | return; | ||
3155 | } | ||
3156 | |||
3115 | rq = task_rq_lock(p, &flags); | 3157 | rq = task_rq_lock(p, &flags); |
3158 | put_cpu(); | ||
3159 | |||
3160 | /* | ||
3161 | * select_task_rq() can race against ->cpus_allowed | ||
3162 | */ | ||
3116 | if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed) | 3163 | if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed) |
3117 | || unlikely(!cpu_active(dest_cpu))) | 3164 | || unlikely(!cpu_active(dest_cpu))) { |
3118 | goto out; | 3165 | task_rq_unlock(rq, &flags); |
3166 | goto again; | ||
3167 | } | ||
3119 | 3168 | ||
3120 | /* force the process onto the specified CPU */ | 3169 | /* force the process onto the specified CPU */ |
3121 | if (migrate_task(p, dest_cpu, &req)) { | 3170 | if (migrate_task(p, dest_cpu, &req)) { |
@@ -3130,24 +3179,10 @@ static void sched_migrate_task(struct task_struct *p, int dest_cpu) | |||
3130 | 3179 | ||
3131 | return; | 3180 | return; |
3132 | } | 3181 | } |
3133 | out: | ||
3134 | task_rq_unlock(rq, &flags); | 3182 | task_rq_unlock(rq, &flags); |
3135 | } | 3183 | } |
3136 | 3184 | ||
3137 | /* | 3185 | /* |
3138 | * sched_exec - execve() is a valuable balancing opportunity, because at | ||
3139 | * this point the task has the smallest effective memory and cache footprint. | ||
3140 | */ | ||
3141 | void sched_exec(void) | ||
3142 | { | ||
3143 | int new_cpu, this_cpu = get_cpu(); | ||
3144 | new_cpu = select_task_rq(current, SD_BALANCE_EXEC, 0); | ||
3145 | put_cpu(); | ||
3146 | if (new_cpu != this_cpu) | ||
3147 | sched_migrate_task(current, new_cpu); | ||
3148 | } | ||
3149 | |||
3150 | /* | ||
3151 | * pull_task - move a task from a remote runqueue to the local runqueue. | 3186 | * pull_task - move a task from a remote runqueue to the local runqueue. |
3152 | * Both runqueues must be locked. | 3187 | * Both runqueues must be locked. |
3153 | */ | 3188 | */ |
@@ -5340,8 +5375,8 @@ static noinline void __schedule_bug(struct task_struct *prev) | |||
5340 | { | 5375 | { |
5341 | struct pt_regs *regs = get_irq_regs(); | 5376 | struct pt_regs *regs = get_irq_regs(); |
5342 | 5377 | ||
5343 | printk(KERN_ERR "BUG: scheduling while atomic: %s/%d/0x%08x\n", | 5378 | pr_err("BUG: scheduling while atomic: %s/%d/0x%08x\n", |
5344 | prev->comm, prev->pid, preempt_count()); | 5379 | prev->comm, prev->pid, preempt_count()); |
5345 | 5380 | ||
5346 | debug_show_held_locks(prev); | 5381 | debug_show_held_locks(prev); |
5347 | print_modules(); | 5382 | print_modules(); |
@@ -5911,14 +5946,15 @@ EXPORT_SYMBOL(wait_for_completion_killable); | |||
5911 | */ | 5946 | */ |
5912 | bool try_wait_for_completion(struct completion *x) | 5947 | bool try_wait_for_completion(struct completion *x) |
5913 | { | 5948 | { |
5949 | unsigned long flags; | ||
5914 | int ret = 1; | 5950 | int ret = 1; |
5915 | 5951 | ||
5916 | spin_lock_irq(&x->wait.lock); | 5952 | spin_lock_irqsave(&x->wait.lock, flags); |
5917 | if (!x->done) | 5953 | if (!x->done) |
5918 | ret = 0; | 5954 | ret = 0; |
5919 | else | 5955 | else |
5920 | x->done--; | 5956 | x->done--; |
5921 | spin_unlock_irq(&x->wait.lock); | 5957 | spin_unlock_irqrestore(&x->wait.lock, flags); |
5922 | return ret; | 5958 | return ret; |
5923 | } | 5959 | } |
5924 | EXPORT_SYMBOL(try_wait_for_completion); | 5960 | EXPORT_SYMBOL(try_wait_for_completion); |
@@ -5933,12 +5969,13 @@ EXPORT_SYMBOL(try_wait_for_completion); | |||
5933 | */ | 5969 | */ |
5934 | bool completion_done(struct completion *x) | 5970 | bool completion_done(struct completion *x) |
5935 | { | 5971 | { |
5972 | unsigned long flags; | ||
5936 | int ret = 1; | 5973 | int ret = 1; |
5937 | 5974 | ||
5938 | spin_lock_irq(&x->wait.lock); | 5975 | spin_lock_irqsave(&x->wait.lock, flags); |
5939 | if (!x->done) | 5976 | if (!x->done) |
5940 | ret = 0; | 5977 | ret = 0; |
5941 | spin_unlock_irq(&x->wait.lock); | 5978 | spin_unlock_irqrestore(&x->wait.lock, flags); |
5942 | return ret; | 5979 | return ret; |
5943 | } | 5980 | } |
5944 | EXPORT_SYMBOL(completion_done); | 5981 | EXPORT_SYMBOL(completion_done); |
@@ -6457,7 +6494,7 @@ SYSCALL_DEFINE1(sched_getscheduler, pid_t, pid) | |||
6457 | return -EINVAL; | 6494 | return -EINVAL; |
6458 | 6495 | ||
6459 | retval = -ESRCH; | 6496 | retval = -ESRCH; |
6460 | read_lock(&tasklist_lock); | 6497 | rcu_read_lock(); |
6461 | p = find_process_by_pid(pid); | 6498 | p = find_process_by_pid(pid); |
6462 | if (p) { | 6499 | if (p) { |
6463 | retval = security_task_getscheduler(p); | 6500 | retval = security_task_getscheduler(p); |
@@ -6465,7 +6502,7 @@ SYSCALL_DEFINE1(sched_getscheduler, pid_t, pid) | |||
6465 | retval = p->policy | 6502 | retval = p->policy |
6466 | | (p->sched_reset_on_fork ? SCHED_RESET_ON_FORK : 0); | 6503 | | (p->sched_reset_on_fork ? SCHED_RESET_ON_FORK : 0); |
6467 | } | 6504 | } |
6468 | read_unlock(&tasklist_lock); | 6505 | rcu_read_unlock(); |
6469 | return retval; | 6506 | return retval; |
6470 | } | 6507 | } |
6471 | 6508 | ||
@@ -6483,7 +6520,7 @@ SYSCALL_DEFINE2(sched_getparam, pid_t, pid, struct sched_param __user *, param) | |||
6483 | if (!param || pid < 0) | 6520 | if (!param || pid < 0) |
6484 | return -EINVAL; | 6521 | return -EINVAL; |
6485 | 6522 | ||
6486 | read_lock(&tasklist_lock); | 6523 | rcu_read_lock(); |
6487 | p = find_process_by_pid(pid); | 6524 | p = find_process_by_pid(pid); |
6488 | retval = -ESRCH; | 6525 | retval = -ESRCH; |
6489 | if (!p) | 6526 | if (!p) |
@@ -6494,7 +6531,7 @@ SYSCALL_DEFINE2(sched_getparam, pid_t, pid, struct sched_param __user *, param) | |||
6494 | goto out_unlock; | 6531 | goto out_unlock; |
6495 | 6532 | ||
6496 | lp.sched_priority = p->rt_priority; | 6533 | lp.sched_priority = p->rt_priority; |
6497 | read_unlock(&tasklist_lock); | 6534 | rcu_read_unlock(); |
6498 | 6535 | ||
6499 | /* | 6536 | /* |
6500 | * This one might sleep, we cannot do it with a spinlock held ... | 6537 | * This one might sleep, we cannot do it with a spinlock held ... |
@@ -6504,7 +6541,7 @@ SYSCALL_DEFINE2(sched_getparam, pid_t, pid, struct sched_param __user *, param) | |||
6504 | return retval; | 6541 | return retval; |
6505 | 6542 | ||
6506 | out_unlock: | 6543 | out_unlock: |
6507 | read_unlock(&tasklist_lock); | 6544 | rcu_read_unlock(); |
6508 | return retval; | 6545 | return retval; |
6509 | } | 6546 | } |
6510 | 6547 | ||
@@ -6515,22 +6552,18 @@ long sched_setaffinity(pid_t pid, const struct cpumask *in_mask) | |||
6515 | int retval; | 6552 | int retval; |
6516 | 6553 | ||
6517 | get_online_cpus(); | 6554 | get_online_cpus(); |
6518 | read_lock(&tasklist_lock); | 6555 | rcu_read_lock(); |
6519 | 6556 | ||
6520 | p = find_process_by_pid(pid); | 6557 | p = find_process_by_pid(pid); |
6521 | if (!p) { | 6558 | if (!p) { |
6522 | read_unlock(&tasklist_lock); | 6559 | rcu_read_unlock(); |
6523 | put_online_cpus(); | 6560 | put_online_cpus(); |
6524 | return -ESRCH; | 6561 | return -ESRCH; |
6525 | } | 6562 | } |
6526 | 6563 | ||
6527 | /* | 6564 | /* Prevent p going away */ |
6528 | * It is not safe to call set_cpus_allowed with the | ||
6529 | * tasklist_lock held. We will bump the task_struct's | ||
6530 | * usage count and then drop tasklist_lock. | ||
6531 | */ | ||
6532 | get_task_struct(p); | 6565 | get_task_struct(p); |
6533 | read_unlock(&tasklist_lock); | 6566 | rcu_read_unlock(); |
6534 | 6567 | ||
6535 | if (!alloc_cpumask_var(&cpus_allowed, GFP_KERNEL)) { | 6568 | if (!alloc_cpumask_var(&cpus_allowed, GFP_KERNEL)) { |
6536 | retval = -ENOMEM; | 6569 | retval = -ENOMEM; |
@@ -6616,7 +6649,7 @@ long sched_getaffinity(pid_t pid, struct cpumask *mask) | |||
6616 | int retval; | 6649 | int retval; |
6617 | 6650 | ||
6618 | get_online_cpus(); | 6651 | get_online_cpus(); |
6619 | read_lock(&tasklist_lock); | 6652 | rcu_read_lock(); |
6620 | 6653 | ||
6621 | retval = -ESRCH; | 6654 | retval = -ESRCH; |
6622 | p = find_process_by_pid(pid); | 6655 | p = find_process_by_pid(pid); |
@@ -6632,7 +6665,7 @@ long sched_getaffinity(pid_t pid, struct cpumask *mask) | |||
6632 | task_rq_unlock(rq, &flags); | 6665 | task_rq_unlock(rq, &flags); |
6633 | 6666 | ||
6634 | out_unlock: | 6667 | out_unlock: |
6635 | read_unlock(&tasklist_lock); | 6668 | rcu_read_unlock(); |
6636 | put_online_cpus(); | 6669 | put_online_cpus(); |
6637 | 6670 | ||
6638 | return retval; | 6671 | return retval; |
@@ -6876,7 +6909,7 @@ SYSCALL_DEFINE2(sched_rr_get_interval, pid_t, pid, | |||
6876 | return -EINVAL; | 6909 | return -EINVAL; |
6877 | 6910 | ||
6878 | retval = -ESRCH; | 6911 | retval = -ESRCH; |
6879 | read_lock(&tasklist_lock); | 6912 | rcu_read_lock(); |
6880 | p = find_process_by_pid(pid); | 6913 | p = find_process_by_pid(pid); |
6881 | if (!p) | 6914 | if (!p) |
6882 | goto out_unlock; | 6915 | goto out_unlock; |
@@ -6889,13 +6922,13 @@ SYSCALL_DEFINE2(sched_rr_get_interval, pid_t, pid, | |||
6889 | time_slice = p->sched_class->get_rr_interval(rq, p); | 6922 | time_slice = p->sched_class->get_rr_interval(rq, p); |
6890 | task_rq_unlock(rq, &flags); | 6923 | task_rq_unlock(rq, &flags); |
6891 | 6924 | ||
6892 | read_unlock(&tasklist_lock); | 6925 | rcu_read_unlock(); |
6893 | jiffies_to_timespec(time_slice, &t); | 6926 | jiffies_to_timespec(time_slice, &t); |
6894 | retval = copy_to_user(interval, &t, sizeof(t)) ? -EFAULT : 0; | 6927 | retval = copy_to_user(interval, &t, sizeof(t)) ? -EFAULT : 0; |
6895 | return retval; | 6928 | return retval; |
6896 | 6929 | ||
6897 | out_unlock: | 6930 | out_unlock: |
6898 | read_unlock(&tasklist_lock); | 6931 | rcu_read_unlock(); |
6899 | return retval; | 6932 | return retval; |
6900 | } | 6933 | } |
6901 | 6934 | ||
@@ -6907,23 +6940,23 @@ void sched_show_task(struct task_struct *p) | |||
6907 | unsigned state; | 6940 | unsigned state; |
6908 | 6941 | ||
6909 | state = p->state ? __ffs(p->state) + 1 : 0; | 6942 | state = p->state ? __ffs(p->state) + 1 : 0; |
6910 | printk(KERN_INFO "%-13.13s %c", p->comm, | 6943 | pr_info("%-13.13s %c", p->comm, |
6911 | state < sizeof(stat_nam) - 1 ? stat_nam[state] : '?'); | 6944 | state < sizeof(stat_nam) - 1 ? stat_nam[state] : '?'); |
6912 | #if BITS_PER_LONG == 32 | 6945 | #if BITS_PER_LONG == 32 |
6913 | if (state == TASK_RUNNING) | 6946 | if (state == TASK_RUNNING) |
6914 | printk(KERN_CONT " running "); | 6947 | pr_cont(" running "); |
6915 | else | 6948 | else |
6916 | printk(KERN_CONT " %08lx ", thread_saved_pc(p)); | 6949 | pr_cont(" %08lx ", thread_saved_pc(p)); |
6917 | #else | 6950 | #else |
6918 | if (state == TASK_RUNNING) | 6951 | if (state == TASK_RUNNING) |
6919 | printk(KERN_CONT " running task "); | 6952 | pr_cont(" running task "); |
6920 | else | 6953 | else |
6921 | printk(KERN_CONT " %016lx ", thread_saved_pc(p)); | 6954 | pr_cont(" %016lx ", thread_saved_pc(p)); |
6922 | #endif | 6955 | #endif |
6923 | #ifdef CONFIG_DEBUG_STACK_USAGE | 6956 | #ifdef CONFIG_DEBUG_STACK_USAGE |
6924 | free = stack_not_used(p); | 6957 | free = stack_not_used(p); |
6925 | #endif | 6958 | #endif |
6926 | printk(KERN_CONT "%5lu %5d %6d 0x%08lx\n", free, | 6959 | pr_cont("%5lu %5d %6d 0x%08lx\n", free, |
6927 | task_pid_nr(p), task_pid_nr(p->real_parent), | 6960 | task_pid_nr(p), task_pid_nr(p->real_parent), |
6928 | (unsigned long)task_thread_info(p)->flags); | 6961 | (unsigned long)task_thread_info(p)->flags); |
6929 | 6962 | ||
@@ -6935,11 +6968,9 @@ void show_state_filter(unsigned long state_filter) | |||
6935 | struct task_struct *g, *p; | 6968 | struct task_struct *g, *p; |
6936 | 6969 | ||
6937 | #if BITS_PER_LONG == 32 | 6970 | #if BITS_PER_LONG == 32 |
6938 | printk(KERN_INFO | 6971 | pr_info(" task PC stack pid father\n"); |
6939 | " task PC stack pid father\n"); | ||
6940 | #else | 6972 | #else |
6941 | printk(KERN_INFO | 6973 | pr_info(" task PC stack pid father\n"); |
6942 | " task PC stack pid father\n"); | ||
6943 | #endif | 6974 | #endif |
6944 | read_lock(&tasklist_lock); | 6975 | read_lock(&tasklist_lock); |
6945 | do_each_thread(g, p) { | 6976 | do_each_thread(g, p) { |
@@ -6986,6 +7017,7 @@ void __cpuinit init_idle(struct task_struct *idle, int cpu) | |||
6986 | raw_spin_lock_irqsave(&rq->lock, flags); | 7017 | raw_spin_lock_irqsave(&rq->lock, flags); |
6987 | 7018 | ||
6988 | __sched_fork(idle); | 7019 | __sched_fork(idle); |
7020 | idle->state = TASK_RUNNING; | ||
6989 | idle->se.exec_start = sched_clock(); | 7021 | idle->se.exec_start = sched_clock(); |
6990 | 7022 | ||
6991 | cpumask_copy(&idle->cpus_allowed, cpumask_of(cpu)); | 7023 | cpumask_copy(&idle->cpus_allowed, cpumask_of(cpu)); |
@@ -7100,7 +7132,23 @@ int set_cpus_allowed_ptr(struct task_struct *p, const struct cpumask *new_mask) | |||
7100 | struct rq *rq; | 7132 | struct rq *rq; |
7101 | int ret = 0; | 7133 | int ret = 0; |
7102 | 7134 | ||
7135 | /* | ||
7136 | * Since we rely on wake-ups to migrate sleeping tasks, don't change | ||
7137 | * the ->cpus_allowed mask from under waking tasks, which would be | ||
7138 | * possible when we change rq->lock in ttwu(), so synchronize against | ||
7139 | * TASK_WAKING to avoid that. | ||
7140 | */ | ||
7141 | again: | ||
7142 | while (p->state == TASK_WAKING) | ||
7143 | cpu_relax(); | ||
7144 | |||
7103 | rq = task_rq_lock(p, &flags); | 7145 | rq = task_rq_lock(p, &flags); |
7146 | |||
7147 | if (p->state == TASK_WAKING) { | ||
7148 | task_rq_unlock(rq, &flags); | ||
7149 | goto again; | ||
7150 | } | ||
7151 | |||
7104 | if (!cpumask_intersects(new_mask, cpu_active_mask)) { | 7152 | if (!cpumask_intersects(new_mask, cpu_active_mask)) { |
7105 | ret = -EINVAL; | 7153 | ret = -EINVAL; |
7106 | goto out; | 7154 | goto out; |
@@ -7156,7 +7204,7 @@ EXPORT_SYMBOL_GPL(set_cpus_allowed_ptr); | |||
7156 | static int __migrate_task(struct task_struct *p, int src_cpu, int dest_cpu) | 7204 | static int __migrate_task(struct task_struct *p, int src_cpu, int dest_cpu) |
7157 | { | 7205 | { |
7158 | struct rq *rq_dest, *rq_src; | 7206 | struct rq *rq_dest, *rq_src; |
7159 | int ret = 0, on_rq; | 7207 | int ret = 0; |
7160 | 7208 | ||
7161 | if (unlikely(!cpu_active(dest_cpu))) | 7209 | if (unlikely(!cpu_active(dest_cpu))) |
7162 | return ret; | 7210 | return ret; |
@@ -7172,12 +7220,13 @@ static int __migrate_task(struct task_struct *p, int src_cpu, int dest_cpu) | |||
7172 | if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed)) | 7220 | if (!cpumask_test_cpu(dest_cpu, &p->cpus_allowed)) |
7173 | goto fail; | 7221 | goto fail; |
7174 | 7222 | ||
7175 | on_rq = p->se.on_rq; | 7223 | /* |
7176 | if (on_rq) | 7224 | * If we're not on a rq, the next wake-up will ensure we're |
7225 | * placed properly. | ||
7226 | */ | ||
7227 | if (p->se.on_rq) { | ||
7177 | deactivate_task(rq_src, p, 0); | 7228 | deactivate_task(rq_src, p, 0); |
7178 | 7229 | set_task_cpu(p, dest_cpu); | |
7179 | set_task_cpu(p, dest_cpu); | ||
7180 | if (on_rq) { | ||
7181 | activate_task(rq_dest, p, 0); | 7230 | activate_task(rq_dest, p, 0); |
7182 | check_preempt_curr(rq_dest, p, 0); | 7231 | check_preempt_curr(rq_dest, p, 0); |
7183 | } | 7232 | } |
@@ -7273,37 +7322,10 @@ static int __migrate_task_irq(struct task_struct *p, int src_cpu, int dest_cpu) | |||
7273 | static void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p) | 7322 | static void move_task_off_dead_cpu(int dead_cpu, struct task_struct *p) |
7274 | { | 7323 | { |
7275 | int dest_cpu; | 7324 | int dest_cpu; |
7276 | const struct cpumask *nodemask = cpumask_of_node(cpu_to_node(dead_cpu)); | ||
7277 | 7325 | ||
7278 | again: | 7326 | again: |
7279 | /* Look for allowed, online CPU in same node. */ | 7327 | dest_cpu = select_fallback_rq(dead_cpu, p); |
7280 | for_each_cpu_and(dest_cpu, nodemask, cpu_active_mask) | ||
7281 | if (cpumask_test_cpu(dest_cpu, &p->cpus_allowed)) | ||
7282 | goto move; | ||
7283 | |||
7284 | /* Any allowed, online CPU? */ | ||
7285 | dest_cpu = cpumask_any_and(&p->cpus_allowed, cpu_active_mask); | ||
7286 | if (dest_cpu < nr_cpu_ids) | ||
7287 | goto move; | ||
7288 | |||
7289 | /* No more Mr. Nice Guy. */ | ||
7290 | if (dest_cpu >= nr_cpu_ids) { | ||
7291 | cpuset_cpus_allowed_locked(p, &p->cpus_allowed); | ||
7292 | dest_cpu = cpumask_any_and(cpu_active_mask, &p->cpus_allowed); | ||
7293 | |||
7294 | /* | ||
7295 | * Don't tell them about moving exiting tasks or | ||
7296 | * kernel threads (both mm NULL), since they never | ||
7297 | * leave kernel. | ||
7298 | */ | ||
7299 | if (p->mm && printk_ratelimit()) { | ||
7300 | printk(KERN_INFO "process %d (%s) no " | ||
7301 | "longer affine to cpu%d\n", | ||
7302 | task_pid_nr(p), p->comm, dead_cpu); | ||
7303 | } | ||
7304 | } | ||
7305 | 7328 | ||
7306 | move: | ||
7307 | /* It can have affinity changed while we were choosing. */ | 7329 | /* It can have affinity changed while we were choosing. */ |
7308 | if (unlikely(!__migrate_task_irq(p, dead_cpu, dest_cpu))) | 7330 | if (unlikely(!__migrate_task_irq(p, dead_cpu, dest_cpu))) |
7309 | goto again; | 7331 | goto again; |
@@ -7806,48 +7828,44 @@ static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level, | |||
7806 | printk(KERN_DEBUG "%*s domain %d: ", level, "", level); | 7828 | printk(KERN_DEBUG "%*s domain %d: ", level, "", level); |
7807 | 7829 | ||
7808 | if (!(sd->flags & SD_LOAD_BALANCE)) { | 7830 | if (!(sd->flags & SD_LOAD_BALANCE)) { |
7809 | printk("does not load-balance\n"); | 7831 | pr_cont("does not load-balance\n"); |
7810 | if (sd->parent) | 7832 | if (sd->parent) |
7811 | printk(KERN_ERR "ERROR: !SD_LOAD_BALANCE domain" | 7833 | pr_err("ERROR: !SD_LOAD_BALANCE domain has parent\n"); |
7812 | " has parent"); | ||
7813 | return -1; | 7834 | return -1; |
7814 | } | 7835 | } |
7815 | 7836 | ||
7816 | printk(KERN_CONT "span %s level %s\n", str, sd->name); | 7837 | pr_cont("span %s level %s\n", str, sd->name); |
7817 | 7838 | ||
7818 | if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) { | 7839 | if (!cpumask_test_cpu(cpu, sched_domain_span(sd))) { |
7819 | printk(KERN_ERR "ERROR: domain->span does not contain " | 7840 | pr_err("ERROR: domain->span does not contain CPU%d\n", cpu); |
7820 | "CPU%d\n", cpu); | ||
7821 | } | 7841 | } |
7822 | if (!cpumask_test_cpu(cpu, sched_group_cpus(group))) { | 7842 | if (!cpumask_test_cpu(cpu, sched_group_cpus(group))) { |
7823 | printk(KERN_ERR "ERROR: domain->groups does not contain" | 7843 | pr_err("ERROR: domain->groups does not contain CPU%d\n", cpu); |
7824 | " CPU%d\n", cpu); | ||
7825 | } | 7844 | } |
7826 | 7845 | ||
7827 | printk(KERN_DEBUG "%*s groups:", level + 1, ""); | 7846 | printk(KERN_DEBUG "%*s groups:", level + 1, ""); |
7828 | do { | 7847 | do { |
7829 | if (!group) { | 7848 | if (!group) { |
7830 | printk("\n"); | 7849 | pr_cont("\n"); |
7831 | printk(KERN_ERR "ERROR: group is NULL\n"); | 7850 | pr_err("ERROR: group is NULL\n"); |
7832 | break; | 7851 | break; |
7833 | } | 7852 | } |
7834 | 7853 | ||
7835 | if (!group->cpu_power) { | 7854 | if (!group->cpu_power) { |
7836 | printk(KERN_CONT "\n"); | 7855 | pr_cont("\n"); |
7837 | printk(KERN_ERR "ERROR: domain->cpu_power not " | 7856 | pr_err("ERROR: domain->cpu_power not set\n"); |
7838 | "set\n"); | ||
7839 | break; | 7857 | break; |
7840 | } | 7858 | } |
7841 | 7859 | ||
7842 | if (!cpumask_weight(sched_group_cpus(group))) { | 7860 | if (!cpumask_weight(sched_group_cpus(group))) { |
7843 | printk(KERN_CONT "\n"); | 7861 | pr_cont("\n"); |
7844 | printk(KERN_ERR "ERROR: empty group\n"); | 7862 | pr_err("ERROR: empty group\n"); |
7845 | break; | 7863 | break; |
7846 | } | 7864 | } |
7847 | 7865 | ||
7848 | if (cpumask_intersects(groupmask, sched_group_cpus(group))) { | 7866 | if (cpumask_intersects(groupmask, sched_group_cpus(group))) { |
7849 | printk(KERN_CONT "\n"); | 7867 | pr_cont("\n"); |
7850 | printk(KERN_ERR "ERROR: repeated CPUs\n"); | 7868 | pr_err("ERROR: repeated CPUs\n"); |
7851 | break; | 7869 | break; |
7852 | } | 7870 | } |
7853 | 7871 | ||
@@ -7855,23 +7873,21 @@ static int sched_domain_debug_one(struct sched_domain *sd, int cpu, int level, | |||
7855 | 7873 | ||
7856 | cpulist_scnprintf(str, sizeof(str), sched_group_cpus(group)); | 7874 | cpulist_scnprintf(str, sizeof(str), sched_group_cpus(group)); |
7857 | 7875 | ||
7858 | printk(KERN_CONT " %s", str); | 7876 | pr_cont(" %s", str); |
7859 | if (group->cpu_power != SCHED_LOAD_SCALE) { | 7877 | if (group->cpu_power != SCHED_LOAD_SCALE) { |
7860 | printk(KERN_CONT " (cpu_power = %d)", | 7878 | pr_cont(" (cpu_power = %d)", group->cpu_power); |
7861 | group->cpu_power); | ||
7862 | } | 7879 | } |
7863 | 7880 | ||
7864 | group = group->next; | 7881 | group = group->next; |
7865 | } while (group != sd->groups); | 7882 | } while (group != sd->groups); |
7866 | printk(KERN_CONT "\n"); | 7883 | pr_cont("\n"); |
7867 | 7884 | ||
7868 | if (!cpumask_equal(sched_domain_span(sd), groupmask)) | 7885 | if (!cpumask_equal(sched_domain_span(sd), groupmask)) |
7869 | printk(KERN_ERR "ERROR: groups don't span domain->span\n"); | 7886 | pr_err("ERROR: groups don't span domain->span\n"); |
7870 | 7887 | ||
7871 | if (sd->parent && | 7888 | if (sd->parent && |
7872 | !cpumask_subset(groupmask, sched_domain_span(sd->parent))) | 7889 | !cpumask_subset(groupmask, sched_domain_span(sd->parent))) |
7873 | printk(KERN_ERR "ERROR: parent span is not a superset " | 7890 | pr_err("ERROR: parent span is not a superset of domain->span\n"); |
7874 | "of domain->span\n"); | ||
7875 | return 0; | 7891 | return 0; |
7876 | } | 7892 | } |
7877 | 7893 | ||
@@ -8427,8 +8443,7 @@ static int build_numa_sched_groups(struct s_data *d, | |||
8427 | sg = kmalloc_node(sizeof(struct sched_group) + cpumask_size(), | 8443 | sg = kmalloc_node(sizeof(struct sched_group) + cpumask_size(), |
8428 | GFP_KERNEL, num); | 8444 | GFP_KERNEL, num); |
8429 | if (!sg) { | 8445 | if (!sg) { |
8430 | printk(KERN_WARNING "Can not alloc domain group for node %d\n", | 8446 | pr_warning("Can not alloc domain group for node %d\n", num); |
8431 | num); | ||
8432 | return -ENOMEM; | 8447 | return -ENOMEM; |
8433 | } | 8448 | } |
8434 | d->sched_group_nodes[num] = sg; | 8449 | d->sched_group_nodes[num] = sg; |
@@ -8457,8 +8472,8 @@ static int build_numa_sched_groups(struct s_data *d, | |||
8457 | sg = kmalloc_node(sizeof(struct sched_group) + cpumask_size(), | 8472 | sg = kmalloc_node(sizeof(struct sched_group) + cpumask_size(), |
8458 | GFP_KERNEL, num); | 8473 | GFP_KERNEL, num); |
8459 | if (!sg) { | 8474 | if (!sg) { |
8460 | printk(KERN_WARNING | 8475 | pr_warning("Can not alloc domain group for node %d\n", |
8461 | "Can not alloc domain group for node %d\n", j); | 8476 | j); |
8462 | return -ENOMEM; | 8477 | return -ENOMEM; |
8463 | } | 8478 | } |
8464 | sg->cpu_power = 0; | 8479 | sg->cpu_power = 0; |
@@ -8686,7 +8701,7 @@ static enum s_alloc __visit_domain_allocation_hell(struct s_data *d, | |||
8686 | d->sched_group_nodes = kcalloc(nr_node_ids, | 8701 | d->sched_group_nodes = kcalloc(nr_node_ids, |
8687 | sizeof(struct sched_group *), GFP_KERNEL); | 8702 | sizeof(struct sched_group *), GFP_KERNEL); |
8688 | if (!d->sched_group_nodes) { | 8703 | if (!d->sched_group_nodes) { |
8689 | printk(KERN_WARNING "Can not alloc sched group node list\n"); | 8704 | pr_warning("Can not alloc sched group node list\n"); |
8690 | return sa_notcovered; | 8705 | return sa_notcovered; |
8691 | } | 8706 | } |
8692 | sched_group_nodes_bycpu[cpumask_first(cpu_map)] = d->sched_group_nodes; | 8707 | sched_group_nodes_bycpu[cpumask_first(cpu_map)] = d->sched_group_nodes; |
@@ -8703,7 +8718,7 @@ static enum s_alloc __visit_domain_allocation_hell(struct s_data *d, | |||
8703 | return sa_send_covered; | 8718 | return sa_send_covered; |
8704 | d->rd = alloc_rootdomain(); | 8719 | d->rd = alloc_rootdomain(); |
8705 | if (!d->rd) { | 8720 | if (!d->rd) { |
8706 | printk(KERN_WARNING "Cannot alloc root domain\n"); | 8721 | pr_warning("Cannot alloc root domain\n"); |
8707 | return sa_tmpmask; | 8722 | return sa_tmpmask; |
8708 | } | 8723 | } |
8709 | return sa_rootdomain; | 8724 | return sa_rootdomain; |
@@ -9668,7 +9683,7 @@ void __init sched_init(void) | |||
9668 | #ifdef CONFIG_DEBUG_SPINLOCK_SLEEP | 9683 | #ifdef CONFIG_DEBUG_SPINLOCK_SLEEP |
9669 | static inline int preempt_count_equals(int preempt_offset) | 9684 | static inline int preempt_count_equals(int preempt_offset) |
9670 | { | 9685 | { |
9671 | int nested = preempt_count() & ~PREEMPT_ACTIVE; | 9686 | int nested = (preempt_count() & ~PREEMPT_ACTIVE) + rcu_preempt_depth(); |
9672 | 9687 | ||
9673 | return (nested == PREEMPT_INATOMIC_BASE + preempt_offset); | 9688 | return (nested == PREEMPT_INATOMIC_BASE + preempt_offset); |
9674 | } | 9689 | } |
@@ -9685,13 +9700,11 @@ void __might_sleep(char *file, int line, int preempt_offset) | |||
9685 | return; | 9700 | return; |
9686 | prev_jiffy = jiffies; | 9701 | prev_jiffy = jiffies; |
9687 | 9702 | ||
9688 | printk(KERN_ERR | 9703 | pr_err("BUG: sleeping function called from invalid context at %s:%d\n", |
9689 | "BUG: sleeping function called from invalid context at %s:%d\n", | 9704 | file, line); |
9690 | file, line); | 9705 | pr_err("in_atomic(): %d, irqs_disabled(): %d, pid: %d, name: %s\n", |
9691 | printk(KERN_ERR | 9706 | in_atomic(), irqs_disabled(), |
9692 | "in_atomic(): %d, irqs_disabled(): %d, pid: %d, name: %s\n", | 9707 | current->pid, current->comm); |
9693 | in_atomic(), irqs_disabled(), | ||
9694 | current->pid, current->comm); | ||
9695 | 9708 | ||
9696 | debug_show_held_locks(current); | 9709 | debug_show_held_locks(current); |
9697 | if (irqs_disabled()) | 9710 | if (irqs_disabled()) |
@@ -10083,7 +10096,7 @@ void sched_move_task(struct task_struct *tsk) | |||
10083 | 10096 | ||
10084 | #ifdef CONFIG_FAIR_GROUP_SCHED | 10097 | #ifdef CONFIG_FAIR_GROUP_SCHED |
10085 | if (tsk->sched_class->moved_group) | 10098 | if (tsk->sched_class->moved_group) |
10086 | tsk->sched_class->moved_group(tsk); | 10099 | tsk->sched_class->moved_group(tsk, on_rq); |
10087 | #endif | 10100 | #endif |
10088 | 10101 | ||
10089 | if (unlikely(running)) | 10102 | if (unlikely(running)) |
diff --git a/kernel/sched_clock.c b/kernel/sched_clock.c index 479ce5682d7c..5b496132c28a 100644 --- a/kernel/sched_clock.c +++ b/kernel/sched_clock.c | |||
@@ -236,6 +236,18 @@ void sched_clock_idle_wakeup_event(u64 delta_ns) | |||
236 | } | 236 | } |
237 | EXPORT_SYMBOL_GPL(sched_clock_idle_wakeup_event); | 237 | EXPORT_SYMBOL_GPL(sched_clock_idle_wakeup_event); |
238 | 238 | ||
239 | unsigned long long cpu_clock(int cpu) | ||
240 | { | ||
241 | unsigned long long clock; | ||
242 | unsigned long flags; | ||
243 | |||
244 | local_irq_save(flags); | ||
245 | clock = sched_clock_cpu(cpu); | ||
246 | local_irq_restore(flags); | ||
247 | |||
248 | return clock; | ||
249 | } | ||
250 | |||
239 | #else /* CONFIG_HAVE_UNSTABLE_SCHED_CLOCK */ | 251 | #else /* CONFIG_HAVE_UNSTABLE_SCHED_CLOCK */ |
240 | 252 | ||
241 | void sched_clock_init(void) | 253 | void sched_clock_init(void) |
@@ -251,17 +263,12 @@ u64 sched_clock_cpu(int cpu) | |||
251 | return sched_clock(); | 263 | return sched_clock(); |
252 | } | 264 | } |
253 | 265 | ||
254 | #endif /* CONFIG_HAVE_UNSTABLE_SCHED_CLOCK */ | ||
255 | 266 | ||
256 | unsigned long long cpu_clock(int cpu) | 267 | unsigned long long cpu_clock(int cpu) |
257 | { | 268 | { |
258 | unsigned long long clock; | 269 | return sched_clock_cpu(cpu); |
259 | unsigned long flags; | 270 | } |
260 | 271 | ||
261 | local_irq_save(flags); | 272 | #endif /* CONFIG_HAVE_UNSTABLE_SCHED_CLOCK */ |
262 | clock = sched_clock_cpu(cpu); | ||
263 | local_irq_restore(flags); | ||
264 | 273 | ||
265 | return clock; | ||
266 | } | ||
267 | EXPORT_SYMBOL_GPL(cpu_clock); | 274 | EXPORT_SYMBOL_GPL(cpu_clock); |
diff --git a/kernel/sched_fair.c b/kernel/sched_fair.c index 5bedf6e3ebf3..42ac3c9f66f6 100644 --- a/kernel/sched_fair.c +++ b/kernel/sched_fair.c | |||
@@ -510,6 +510,7 @@ __update_curr(struct cfs_rq *cfs_rq, struct sched_entity *curr, | |||
510 | curr->sum_exec_runtime += delta_exec; | 510 | curr->sum_exec_runtime += delta_exec; |
511 | schedstat_add(cfs_rq, exec_clock, delta_exec); | 511 | schedstat_add(cfs_rq, exec_clock, delta_exec); |
512 | delta_exec_weighted = calc_delta_fair(delta_exec, curr); | 512 | delta_exec_weighted = calc_delta_fair(delta_exec, curr); |
513 | |||
513 | curr->vruntime += delta_exec_weighted; | 514 | curr->vruntime += delta_exec_weighted; |
514 | update_min_vruntime(cfs_rq); | 515 | update_min_vruntime(cfs_rq); |
515 | } | 516 | } |
@@ -765,16 +766,26 @@ place_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int initial) | |||
765 | se->vruntime = vruntime; | 766 | se->vruntime = vruntime; |
766 | } | 767 | } |
767 | 768 | ||
769 | #define ENQUEUE_WAKEUP 1 | ||
770 | #define ENQUEUE_MIGRATE 2 | ||
771 | |||
768 | static void | 772 | static void |
769 | enqueue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int wakeup) | 773 | enqueue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int flags) |
770 | { | 774 | { |
771 | /* | 775 | /* |
776 | * Update the normalized vruntime before updating min_vruntime | ||
777 | * through callig update_curr(). | ||
778 | */ | ||
779 | if (!(flags & ENQUEUE_WAKEUP) || (flags & ENQUEUE_MIGRATE)) | ||
780 | se->vruntime += cfs_rq->min_vruntime; | ||
781 | |||
782 | /* | ||
772 | * Update run-time statistics of the 'current'. | 783 | * Update run-time statistics of the 'current'. |
773 | */ | 784 | */ |
774 | update_curr(cfs_rq); | 785 | update_curr(cfs_rq); |
775 | account_entity_enqueue(cfs_rq, se); | 786 | account_entity_enqueue(cfs_rq, se); |
776 | 787 | ||
777 | if (wakeup) { | 788 | if (flags & ENQUEUE_WAKEUP) { |
778 | place_entity(cfs_rq, se, 0); | 789 | place_entity(cfs_rq, se, 0); |
779 | enqueue_sleeper(cfs_rq, se); | 790 | enqueue_sleeper(cfs_rq, se); |
780 | } | 791 | } |
@@ -828,6 +839,14 @@ dequeue_entity(struct cfs_rq *cfs_rq, struct sched_entity *se, int sleep) | |||
828 | __dequeue_entity(cfs_rq, se); | 839 | __dequeue_entity(cfs_rq, se); |
829 | account_entity_dequeue(cfs_rq, se); | 840 | account_entity_dequeue(cfs_rq, se); |
830 | update_min_vruntime(cfs_rq); | 841 | update_min_vruntime(cfs_rq); |
842 | |||
843 | /* | ||
844 | * Normalize the entity after updating the min_vruntime because the | ||
845 | * update can refer to the ->curr item and we need to reflect this | ||
846 | * movement in our normalized position. | ||
847 | */ | ||
848 | if (!sleep) | ||
849 | se->vruntime -= cfs_rq->min_vruntime; | ||
831 | } | 850 | } |
832 | 851 | ||
833 | /* | 852 | /* |
@@ -1038,13 +1057,19 @@ static void enqueue_task_fair(struct rq *rq, struct task_struct *p, int wakeup) | |||
1038 | { | 1057 | { |
1039 | struct cfs_rq *cfs_rq; | 1058 | struct cfs_rq *cfs_rq; |
1040 | struct sched_entity *se = &p->se; | 1059 | struct sched_entity *se = &p->se; |
1060 | int flags = 0; | ||
1061 | |||
1062 | if (wakeup) | ||
1063 | flags |= ENQUEUE_WAKEUP; | ||
1064 | if (p->state == TASK_WAKING) | ||
1065 | flags |= ENQUEUE_MIGRATE; | ||
1041 | 1066 | ||
1042 | for_each_sched_entity(se) { | 1067 | for_each_sched_entity(se) { |
1043 | if (se->on_rq) | 1068 | if (se->on_rq) |
1044 | break; | 1069 | break; |
1045 | cfs_rq = cfs_rq_of(se); | 1070 | cfs_rq = cfs_rq_of(se); |
1046 | enqueue_entity(cfs_rq, se, wakeup); | 1071 | enqueue_entity(cfs_rq, se, flags); |
1047 | wakeup = 1; | 1072 | flags = ENQUEUE_WAKEUP; |
1048 | } | 1073 | } |
1049 | 1074 | ||
1050 | hrtick_update(rq); | 1075 | hrtick_update(rq); |
@@ -1120,6 +1145,14 @@ static void yield_task_fair(struct rq *rq) | |||
1120 | 1145 | ||
1121 | #ifdef CONFIG_SMP | 1146 | #ifdef CONFIG_SMP |
1122 | 1147 | ||
1148 | static void task_waking_fair(struct rq *rq, struct task_struct *p) | ||
1149 | { | ||
1150 | struct sched_entity *se = &p->se; | ||
1151 | struct cfs_rq *cfs_rq = cfs_rq_of(se); | ||
1152 | |||
1153 | se->vruntime -= cfs_rq->min_vruntime; | ||
1154 | } | ||
1155 | |||
1123 | #ifdef CONFIG_FAIR_GROUP_SCHED | 1156 | #ifdef CONFIG_FAIR_GROUP_SCHED |
1124 | /* | 1157 | /* |
1125 | * effective_load() calculates the load change as seen from the root_task_group | 1158 | * effective_load() calculates the load change as seen from the root_task_group |
@@ -1429,6 +1462,9 @@ static int select_task_rq_fair(struct task_struct *p, int sd_flag, int wake_flag | |||
1429 | } | 1462 | } |
1430 | 1463 | ||
1431 | for_each_domain(cpu, tmp) { | 1464 | for_each_domain(cpu, tmp) { |
1465 | if (!(tmp->flags & SD_LOAD_BALANCE)) | ||
1466 | continue; | ||
1467 | |||
1432 | /* | 1468 | /* |
1433 | * If power savings logic is enabled for a domain, see if we | 1469 | * If power savings logic is enabled for a domain, see if we |
1434 | * are not overloaded, if so, don't balance wider. | 1470 | * are not overloaded, if so, don't balance wider. |
@@ -1975,6 +2011,8 @@ static void task_fork_fair(struct task_struct *p) | |||
1975 | resched_task(rq->curr); | 2011 | resched_task(rq->curr); |
1976 | } | 2012 | } |
1977 | 2013 | ||
2014 | se->vruntime -= cfs_rq->min_vruntime; | ||
2015 | |||
1978 | raw_spin_unlock_irqrestore(&rq->lock, flags); | 2016 | raw_spin_unlock_irqrestore(&rq->lock, flags); |
1979 | } | 2017 | } |
1980 | 2018 | ||
@@ -2028,12 +2066,13 @@ static void set_curr_task_fair(struct rq *rq) | |||
2028 | } | 2066 | } |
2029 | 2067 | ||
2030 | #ifdef CONFIG_FAIR_GROUP_SCHED | 2068 | #ifdef CONFIG_FAIR_GROUP_SCHED |
2031 | static void moved_group_fair(struct task_struct *p) | 2069 | static void moved_group_fair(struct task_struct *p, int on_rq) |
2032 | { | 2070 | { |
2033 | struct cfs_rq *cfs_rq = task_cfs_rq(p); | 2071 | struct cfs_rq *cfs_rq = task_cfs_rq(p); |
2034 | 2072 | ||
2035 | update_curr(cfs_rq); | 2073 | update_curr(cfs_rq); |
2036 | place_entity(cfs_rq, &p->se, 1); | 2074 | if (!on_rq) |
2075 | place_entity(cfs_rq, &p->se, 1); | ||
2037 | } | 2076 | } |
2038 | #endif | 2077 | #endif |
2039 | 2078 | ||
@@ -2073,6 +2112,8 @@ static const struct sched_class fair_sched_class = { | |||
2073 | .move_one_task = move_one_task_fair, | 2112 | .move_one_task = move_one_task_fair, |
2074 | .rq_online = rq_online_fair, | 2113 | .rq_online = rq_online_fair, |
2075 | .rq_offline = rq_offline_fair, | 2114 | .rq_offline = rq_offline_fair, |
2115 | |||
2116 | .task_waking = task_waking_fair, | ||
2076 | #endif | 2117 | #endif |
2077 | 2118 | ||
2078 | .set_curr_task = set_curr_task_fair, | 2119 | .set_curr_task = set_curr_task_fair, |
diff --git a/kernel/sched_idletask.c b/kernel/sched_idletask.c index 5f93b570d383..21b969a28725 100644 --- a/kernel/sched_idletask.c +++ b/kernel/sched_idletask.c | |||
@@ -35,7 +35,7 @@ static void | |||
35 | dequeue_task_idle(struct rq *rq, struct task_struct *p, int sleep) | 35 | dequeue_task_idle(struct rq *rq, struct task_struct *p, int sleep) |
36 | { | 36 | { |
37 | raw_spin_unlock_irq(&rq->lock); | 37 | raw_spin_unlock_irq(&rq->lock); |
38 | printk(KERN_ERR "bad: scheduling from the idle thread!\n"); | 38 | pr_err("bad: scheduling from the idle thread!\n"); |
39 | dump_stack(); | 39 | dump_stack(); |
40 | raw_spin_lock_irq(&rq->lock); | 40 | raw_spin_lock_irq(&rq->lock); |
41 | } | 41 | } |
diff --git a/kernel/sched_rt.c b/kernel/sched_rt.c index d2ea2828164e..f48328ac216f 100644 --- a/kernel/sched_rt.c +++ b/kernel/sched_rt.c | |||
@@ -1472,7 +1472,7 @@ static void post_schedule_rt(struct rq *rq) | |||
1472 | * If we are not running and we are not going to reschedule soon, we should | 1472 | * If we are not running and we are not going to reschedule soon, we should |
1473 | * try to push tasks away now | 1473 | * try to push tasks away now |
1474 | */ | 1474 | */ |
1475 | static void task_wake_up_rt(struct rq *rq, struct task_struct *p) | 1475 | static void task_woken_rt(struct rq *rq, struct task_struct *p) |
1476 | { | 1476 | { |
1477 | if (!task_running(rq, p) && | 1477 | if (!task_running(rq, p) && |
1478 | !test_tsk_need_resched(rq->curr) && | 1478 | !test_tsk_need_resched(rq->curr) && |
@@ -1753,7 +1753,7 @@ static const struct sched_class rt_sched_class = { | |||
1753 | .rq_offline = rq_offline_rt, | 1753 | .rq_offline = rq_offline_rt, |
1754 | .pre_schedule = pre_schedule_rt, | 1754 | .pre_schedule = pre_schedule_rt, |
1755 | .post_schedule = post_schedule_rt, | 1755 | .post_schedule = post_schedule_rt, |
1756 | .task_wake_up = task_wake_up_rt, | 1756 | .task_woken = task_woken_rt, |
1757 | .switched_from = switched_from_rt, | 1757 | .switched_from = switched_from_rt, |
1758 | #endif | 1758 | #endif |
1759 | 1759 | ||
diff --git a/kernel/signal.c b/kernel/signal.c index 1814e68e4de3..d09692b40376 100644 --- a/kernel/signal.c +++ b/kernel/signal.c | |||
@@ -218,13 +218,13 @@ __sigqueue_alloc(int sig, struct task_struct *t, gfp_t flags, int override_rlimi | |||
218 | struct user_struct *user; | 218 | struct user_struct *user; |
219 | 219 | ||
220 | /* | 220 | /* |
221 | * We won't get problems with the target's UID changing under us | 221 | * Protect access to @t credentials. This can go away when all |
222 | * because changing it requires RCU be used, and if t != current, the | 222 | * callers hold rcu read lock. |
223 | * caller must be holding the RCU readlock (by way of a spinlock) and | ||
224 | * we use RCU protection here | ||
225 | */ | 223 | */ |
224 | rcu_read_lock(); | ||
226 | user = get_uid(__task_cred(t)->user); | 225 | user = get_uid(__task_cred(t)->user); |
227 | atomic_inc(&user->sigpending); | 226 | atomic_inc(&user->sigpending); |
227 | rcu_read_unlock(); | ||
228 | 228 | ||
229 | if (override_rlimit || | 229 | if (override_rlimit || |
230 | atomic_read(&user->sigpending) <= | 230 | atomic_read(&user->sigpending) <= |
@@ -1179,11 +1179,12 @@ int kill_pid_info_as_uid(int sig, struct siginfo *info, struct pid *pid, | |||
1179 | int ret = -EINVAL; | 1179 | int ret = -EINVAL; |
1180 | struct task_struct *p; | 1180 | struct task_struct *p; |
1181 | const struct cred *pcred; | 1181 | const struct cred *pcred; |
1182 | unsigned long flags; | ||
1182 | 1183 | ||
1183 | if (!valid_signal(sig)) | 1184 | if (!valid_signal(sig)) |
1184 | return ret; | 1185 | return ret; |
1185 | 1186 | ||
1186 | read_lock(&tasklist_lock); | 1187 | rcu_read_lock(); |
1187 | p = pid_task(pid, PIDTYPE_PID); | 1188 | p = pid_task(pid, PIDTYPE_PID); |
1188 | if (!p) { | 1189 | if (!p) { |
1189 | ret = -ESRCH; | 1190 | ret = -ESRCH; |
@@ -1199,14 +1200,16 @@ int kill_pid_info_as_uid(int sig, struct siginfo *info, struct pid *pid, | |||
1199 | ret = security_task_kill(p, info, sig, secid); | 1200 | ret = security_task_kill(p, info, sig, secid); |
1200 | if (ret) | 1201 | if (ret) |
1201 | goto out_unlock; | 1202 | goto out_unlock; |
1202 | if (sig && p->sighand) { | 1203 | |
1203 | unsigned long flags; | 1204 | if (sig) { |
1204 | spin_lock_irqsave(&p->sighand->siglock, flags); | 1205 | if (lock_task_sighand(p, &flags)) { |
1205 | ret = __send_signal(sig, info, p, 1, 0); | 1206 | ret = __send_signal(sig, info, p, 1, 0); |
1206 | spin_unlock_irqrestore(&p->sighand->siglock, flags); | 1207 | unlock_task_sighand(p, &flags); |
1208 | } else | ||
1209 | ret = -ESRCH; | ||
1207 | } | 1210 | } |
1208 | out_unlock: | 1211 | out_unlock: |
1209 | read_unlock(&tasklist_lock); | 1212 | rcu_read_unlock(); |
1210 | return ret; | 1213 | return ret; |
1211 | } | 1214 | } |
1212 | EXPORT_SYMBOL_GPL(kill_pid_info_as_uid); | 1215 | EXPORT_SYMBOL_GPL(kill_pid_info_as_uid); |
diff --git a/kernel/sys.c b/kernel/sys.c index 20ccfb5da6af..26a6b73a6b85 100644 --- a/kernel/sys.c +++ b/kernel/sys.c | |||
@@ -162,6 +162,7 @@ SYSCALL_DEFINE3(setpriority, int, which, int, who, int, niceval) | |||
162 | if (niceval > 19) | 162 | if (niceval > 19) |
163 | niceval = 19; | 163 | niceval = 19; |
164 | 164 | ||
165 | rcu_read_lock(); | ||
165 | read_lock(&tasklist_lock); | 166 | read_lock(&tasklist_lock); |
166 | switch (which) { | 167 | switch (which) { |
167 | case PRIO_PROCESS: | 168 | case PRIO_PROCESS: |
@@ -199,6 +200,7 @@ SYSCALL_DEFINE3(setpriority, int, which, int, who, int, niceval) | |||
199 | } | 200 | } |
200 | out_unlock: | 201 | out_unlock: |
201 | read_unlock(&tasklist_lock); | 202 | read_unlock(&tasklist_lock); |
203 | rcu_read_unlock(); | ||
202 | out: | 204 | out: |
203 | return error; | 205 | return error; |
204 | } | 206 | } |
diff --git a/kernel/sysctl.c b/kernel/sysctl.c index 45e4bef0012a..8a68b2448468 100644 --- a/kernel/sysctl.c +++ b/kernel/sysctl.c | |||
@@ -1131,7 +1131,7 @@ static struct ctl_table vm_table[] = { | |||
1131 | .data = &sysctl_max_map_count, | 1131 | .data = &sysctl_max_map_count, |
1132 | .maxlen = sizeof(sysctl_max_map_count), | 1132 | .maxlen = sizeof(sysctl_max_map_count), |
1133 | .mode = 0644, | 1133 | .mode = 0644, |
1134 | .proc_handler = proc_dointvec, | 1134 | .proc_handler = proc_dointvec_minmax, |
1135 | .extra1 = &zero, | 1135 | .extra1 = &zero, |
1136 | }, | 1136 | }, |
1137 | #else | 1137 | #else |
@@ -1214,6 +1214,7 @@ static struct ctl_table vm_table[] = { | |||
1214 | .proc_handler = proc_dointvec_jiffies, | 1214 | .proc_handler = proc_dointvec_jiffies, |
1215 | }, | 1215 | }, |
1216 | #endif | 1216 | #endif |
1217 | #ifdef CONFIG_MMU | ||
1217 | { | 1218 | { |
1218 | .procname = "mmap_min_addr", | 1219 | .procname = "mmap_min_addr", |
1219 | .data = &dac_mmap_min_addr, | 1220 | .data = &dac_mmap_min_addr, |
@@ -1221,6 +1222,7 @@ static struct ctl_table vm_table[] = { | |||
1221 | .mode = 0644, | 1222 | .mode = 0644, |
1222 | .proc_handler = mmap_min_addr_handler, | 1223 | .proc_handler = mmap_min_addr_handler, |
1223 | }, | 1224 | }, |
1225 | #endif | ||
1224 | #ifdef CONFIG_NUMA | 1226 | #ifdef CONFIG_NUMA |
1225 | { | 1227 | { |
1226 | .procname = "numa_zonelist_order", | 1228 | .procname = "numa_zonelist_order", |
diff --git a/kernel/time/clockevents.c b/kernel/time/clockevents.c index 3d5fc0fd1cca..6f740d9f0948 100644 --- a/kernel/time/clockevents.c +++ b/kernel/time/clockevents.c | |||
@@ -238,8 +238,9 @@ void clockevents_exchange_device(struct clock_event_device *old, | |||
238 | */ | 238 | */ |
239 | void clockevents_notify(unsigned long reason, void *arg) | 239 | void clockevents_notify(unsigned long reason, void *arg) |
240 | { | 240 | { |
241 | struct list_head *node, *tmp; | 241 | struct clock_event_device *dev, *tmp; |
242 | unsigned long flags; | 242 | unsigned long flags; |
243 | int cpu; | ||
243 | 244 | ||
244 | raw_spin_lock_irqsave(&clockevents_lock, flags); | 245 | raw_spin_lock_irqsave(&clockevents_lock, flags); |
245 | clockevents_do_notify(reason, arg); | 246 | clockevents_do_notify(reason, arg); |
@@ -250,8 +251,19 @@ void clockevents_notify(unsigned long reason, void *arg) | |||
250 | * Unregister the clock event devices which were | 251 | * Unregister the clock event devices which were |
251 | * released from the users in the notify chain. | 252 | * released from the users in the notify chain. |
252 | */ | 253 | */ |
253 | list_for_each_safe(node, tmp, &clockevents_released) | 254 | list_for_each_entry_safe(dev, tmp, &clockevents_released, list) |
254 | list_del(node); | 255 | list_del(&dev->list); |
256 | /* | ||
257 | * Now check whether the CPU has left unused per cpu devices | ||
258 | */ | ||
259 | cpu = *((int *)arg); | ||
260 | list_for_each_entry_safe(dev, tmp, &clockevent_devices, list) { | ||
261 | if (cpumask_test_cpu(cpu, dev->cpumask) && | ||
262 | cpumask_weight(dev->cpumask) == 1) { | ||
263 | BUG_ON(dev->mode != CLOCK_EVT_MODE_UNUSED); | ||
264 | list_del(&dev->list); | ||
265 | } | ||
266 | } | ||
255 | break; | 267 | break; |
256 | default: | 268 | default: |
257 | break; | 269 | break; |
diff --git a/kernel/time/timer_list.c b/kernel/time/timer_list.c index 28265636b6c2..bdfb8dd1050c 100644 --- a/kernel/time/timer_list.c +++ b/kernel/time/timer_list.c | |||
@@ -237,10 +237,10 @@ static void timer_list_show_tickdevices(struct seq_file *m) | |||
237 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST | 237 | #ifdef CONFIG_GENERIC_CLOCKEVENTS_BROADCAST |
238 | print_tickdevice(m, tick_get_broadcast_device(), -1); | 238 | print_tickdevice(m, tick_get_broadcast_device(), -1); |
239 | SEQ_printf(m, "tick_broadcast_mask: %08lx\n", | 239 | SEQ_printf(m, "tick_broadcast_mask: %08lx\n", |
240 | tick_get_broadcast_mask()->bits[0]); | 240 | cpumask_bits(tick_get_broadcast_mask())[0]); |
241 | #ifdef CONFIG_TICK_ONESHOT | 241 | #ifdef CONFIG_TICK_ONESHOT |
242 | SEQ_printf(m, "tick_broadcast_oneshot_mask: %08lx\n", | 242 | SEQ_printf(m, "tick_broadcast_oneshot_mask: %08lx\n", |
243 | tick_get_broadcast_oneshot_mask()->bits[0]); | 243 | cpumask_bits(tick_get_broadcast_oneshot_mask())[0]); |
244 | #endif | 244 | #endif |
245 | SEQ_printf(m, "\n"); | 245 | SEQ_printf(m, "\n"); |
246 | #endif | 246 | #endif |
diff --git a/kernel/timer.c b/kernel/timer.c index 5db5a8d26811..15533b792397 100644 --- a/kernel/timer.c +++ b/kernel/timer.c | |||
@@ -656,8 +656,6 @@ __mod_timer(struct timer_list *timer, unsigned long expires, | |||
656 | 656 | ||
657 | debug_activate(timer, expires); | 657 | debug_activate(timer, expires); |
658 | 658 | ||
659 | new_base = __get_cpu_var(tvec_bases); | ||
660 | |||
661 | cpu = smp_processor_id(); | 659 | cpu = smp_processor_id(); |
662 | 660 | ||
663 | #if defined(CONFIG_NO_HZ) && defined(CONFIG_SMP) | 661 | #if defined(CONFIG_NO_HZ) && defined(CONFIG_SMP) |
diff --git a/kernel/trace/trace.c b/kernel/trace/trace.c index 06ba26747d7e..8b9f20ab8eed 100644 --- a/kernel/trace/trace.c +++ b/kernel/trace/trace.c | |||
@@ -12,7 +12,7 @@ | |||
12 | * Copyright (C) 2004 William Lee Irwin III | 12 | * Copyright (C) 2004 William Lee Irwin III |
13 | */ | 13 | */ |
14 | #include <linux/ring_buffer.h> | 14 | #include <linux/ring_buffer.h> |
15 | #include <linux/utsrelease.h> | 15 | #include <generated/utsrelease.h> |
16 | #include <linux/stacktrace.h> | 16 | #include <linux/stacktrace.h> |
17 | #include <linux/writeback.h> | 17 | #include <linux/writeback.h> |
18 | #include <linux/kallsyms.h> | 18 | #include <linux/kallsyms.h> |
diff --git a/lib/Kconfig.debug b/lib/Kconfig.debug index 8cf9938dd147..25c3ed594c54 100644 --- a/lib/Kconfig.debug +++ b/lib/Kconfig.debug | |||
@@ -360,6 +360,7 @@ config DEBUG_KMEMLEAK | |||
360 | select DEBUG_FS if SYSFS | 360 | select DEBUG_FS if SYSFS |
361 | select STACKTRACE if STACKTRACE_SUPPORT | 361 | select STACKTRACE if STACKTRACE_SUPPORT |
362 | select KALLSYMS | 362 | select KALLSYMS |
363 | select CRC32 | ||
363 | help | 364 | help |
364 | Say Y here if you want to enable the memory leak | 365 | Say Y here if you want to enable the memory leak |
365 | detector. The memory allocation/freeing is traced in a way | 366 | detector. The memory allocation/freeing is traced in a way |
diff --git a/lib/decompress_bunzip2.c b/lib/decompress_bunzip2.c index 76074209f9a2..a4e971dee102 100644 --- a/lib/decompress_bunzip2.c +++ b/lib/decompress_bunzip2.c | |||
@@ -637,6 +637,8 @@ static int INIT start_bunzip(struct bunzip_data **bdp, void *inbuf, int len, | |||
637 | 637 | ||
638 | /* Allocate bunzip_data. Most fields initialize to zero. */ | 638 | /* Allocate bunzip_data. Most fields initialize to zero. */ |
639 | bd = *bdp = malloc(i); | 639 | bd = *bdp = malloc(i); |
640 | if (!bd) | ||
641 | return RETVAL_OUT_OF_MEMORY; | ||
640 | memset(bd, 0, sizeof(struct bunzip_data)); | 642 | memset(bd, 0, sizeof(struct bunzip_data)); |
641 | /* Setup input buffer */ | 643 | /* Setup input buffer */ |
642 | bd->inbuf = inbuf; | 644 | bd->inbuf = inbuf; |
@@ -664,6 +666,8 @@ static int INIT start_bunzip(struct bunzip_data **bdp, void *inbuf, int len, | |||
664 | bd->dbufSize = 100000*(i-BZh0); | 666 | bd->dbufSize = 100000*(i-BZh0); |
665 | 667 | ||
666 | bd->dbuf = large_malloc(bd->dbufSize * sizeof(int)); | 668 | bd->dbuf = large_malloc(bd->dbufSize * sizeof(int)); |
669 | if (!bd->dbuf) | ||
670 | return RETVAL_OUT_OF_MEMORY; | ||
667 | return RETVAL_OK; | 671 | return RETVAL_OK; |
668 | } | 672 | } |
669 | 673 | ||
@@ -686,7 +690,7 @@ STATIC int INIT bunzip2(unsigned char *buf, int len, | |||
686 | 690 | ||
687 | if (!outbuf) { | 691 | if (!outbuf) { |
688 | error("Could not allocate output bufer"); | 692 | error("Could not allocate output bufer"); |
689 | return -1; | 693 | return RETVAL_OUT_OF_MEMORY; |
690 | } | 694 | } |
691 | if (buf) | 695 | if (buf) |
692 | inbuf = buf; | 696 | inbuf = buf; |
@@ -694,6 +698,7 @@ STATIC int INIT bunzip2(unsigned char *buf, int len, | |||
694 | inbuf = malloc(BZIP2_IOBUF_SIZE); | 698 | inbuf = malloc(BZIP2_IOBUF_SIZE); |
695 | if (!inbuf) { | 699 | if (!inbuf) { |
696 | error("Could not allocate input bufer"); | 700 | error("Could not allocate input bufer"); |
701 | i = RETVAL_OUT_OF_MEMORY; | ||
697 | goto exit_0; | 702 | goto exit_0; |
698 | } | 703 | } |
699 | i = start_bunzip(&bd, inbuf, len, fill); | 704 | i = start_bunzip(&bd, inbuf, len, fill); |
@@ -720,11 +725,14 @@ STATIC int INIT bunzip2(unsigned char *buf, int len, | |||
720 | } else if (i == RETVAL_UNEXPECTED_OUTPUT_EOF) { | 725 | } else if (i == RETVAL_UNEXPECTED_OUTPUT_EOF) { |
721 | error("Compressed file ends unexpectedly"); | 726 | error("Compressed file ends unexpectedly"); |
722 | } | 727 | } |
728 | if (!bd) | ||
729 | goto exit_1; | ||
723 | if (bd->dbuf) | 730 | if (bd->dbuf) |
724 | large_free(bd->dbuf); | 731 | large_free(bd->dbuf); |
725 | if (pos) | 732 | if (pos) |
726 | *pos = bd->inbufPos; | 733 | *pos = bd->inbufPos; |
727 | free(bd); | 734 | free(bd); |
735 | exit_1: | ||
728 | if (!buf) | 736 | if (!buf) |
729 | free(inbuf); | 737 | free(inbuf); |
730 | exit_0: | 738 | exit_0: |
diff --git a/lib/vsprintf.c b/lib/vsprintf.c index 735343fc857a..d4996cf46eb6 100644 --- a/lib/vsprintf.c +++ b/lib/vsprintf.c | |||
@@ -1179,7 +1179,18 @@ qualifier: | |||
1179 | * %ps output the name of a text symbol without offset | 1179 | * %ps output the name of a text symbol without offset |
1180 | * %pF output the name of a function pointer with its offset | 1180 | * %pF output the name of a function pointer with its offset |
1181 | * %pf output the name of a function pointer without its offset | 1181 | * %pf output the name of a function pointer without its offset |
1182 | * %pR output the address range in a struct resource | 1182 | * %pR output the address range in a struct resource with decoded flags |
1183 | * %pr output the address range in a struct resource with raw flags | ||
1184 | * %pM output a 6-byte MAC address with colons | ||
1185 | * %pm output a 6-byte MAC address without colons | ||
1186 | * %pI4 print an IPv4 address without leading zeros | ||
1187 | * %pi4 print an IPv4 address with leading zeros | ||
1188 | * %pI6 print an IPv6 address with colons | ||
1189 | * %pi6 print an IPv6 address without colons | ||
1190 | * %pI6c print an IPv6 address as specified by | ||
1191 | * http://www.ietf.org/id/draft-kawamura-ipv6-text-representation-03.txt | ||
1192 | * %pU[bBlL] print a UUID/GUID in big or little endian using lower or upper | ||
1193 | * case. | ||
1183 | * %n is ignored | 1194 | * %n is ignored |
1184 | * | 1195 | * |
1185 | * The return value is the number of characters which would | 1196 | * The return value is the number of characters which would |
diff --git a/mm/Kconfig b/mm/Kconfig index 43ea8c3a2bbf..ee9f3e0f2b69 100644 --- a/mm/Kconfig +++ b/mm/Kconfig | |||
@@ -221,6 +221,7 @@ config KSM | |||
221 | 221 | ||
222 | config DEFAULT_MMAP_MIN_ADDR | 222 | config DEFAULT_MMAP_MIN_ADDR |
223 | int "Low address space to protect from user allocation" | 223 | int "Low address space to protect from user allocation" |
224 | depends on MMU | ||
224 | default 4096 | 225 | default 4096 |
225 | help | 226 | help |
226 | This is the portion of low virtual memory which should be protected | 227 | This is the portion of low virtual memory which should be protected |
diff --git a/mm/kmemleak.c b/mm/kmemleak.c index 13f33b3081ec..5b069e4f5e48 100644 --- a/mm/kmemleak.c +++ b/mm/kmemleak.c | |||
@@ -93,6 +93,7 @@ | |||
93 | #include <linux/nodemask.h> | 93 | #include <linux/nodemask.h> |
94 | #include <linux/mm.h> | 94 | #include <linux/mm.h> |
95 | #include <linux/workqueue.h> | 95 | #include <linux/workqueue.h> |
96 | #include <linux/crc32.h> | ||
96 | 97 | ||
97 | #include <asm/sections.h> | 98 | #include <asm/sections.h> |
98 | #include <asm/processor.h> | 99 | #include <asm/processor.h> |
@@ -108,7 +109,6 @@ | |||
108 | #define MSECS_MIN_AGE 5000 /* minimum object age for reporting */ | 109 | #define MSECS_MIN_AGE 5000 /* minimum object age for reporting */ |
109 | #define SECS_FIRST_SCAN 60 /* delay before the first scan */ | 110 | #define SECS_FIRST_SCAN 60 /* delay before the first scan */ |
110 | #define SECS_SCAN_WAIT 600 /* subsequent auto scanning delay */ | 111 | #define SECS_SCAN_WAIT 600 /* subsequent auto scanning delay */ |
111 | #define GRAY_LIST_PASSES 25 /* maximum number of gray list scans */ | ||
112 | #define MAX_SCAN_SIZE 4096 /* maximum size of a scanned block */ | 112 | #define MAX_SCAN_SIZE 4096 /* maximum size of a scanned block */ |
113 | 113 | ||
114 | #define BYTES_PER_POINTER sizeof(void *) | 114 | #define BYTES_PER_POINTER sizeof(void *) |
@@ -119,8 +119,8 @@ | |||
119 | /* scanning area inside a memory block */ | 119 | /* scanning area inside a memory block */ |
120 | struct kmemleak_scan_area { | 120 | struct kmemleak_scan_area { |
121 | struct hlist_node node; | 121 | struct hlist_node node; |
122 | unsigned long offset; | 122 | unsigned long start; |
123 | size_t length; | 123 | size_t size; |
124 | }; | 124 | }; |
125 | 125 | ||
126 | #define KMEMLEAK_GREY 0 | 126 | #define KMEMLEAK_GREY 0 |
@@ -149,6 +149,8 @@ struct kmemleak_object { | |||
149 | int min_count; | 149 | int min_count; |
150 | /* the total number of pointers found pointing to this object */ | 150 | /* the total number of pointers found pointing to this object */ |
151 | int count; | 151 | int count; |
152 | /* checksum for detecting modified objects */ | ||
153 | u32 checksum; | ||
152 | /* memory ranges to be scanned inside an object (empty for all) */ | 154 | /* memory ranges to be scanned inside an object (empty for all) */ |
153 | struct hlist_head area_list; | 155 | struct hlist_head area_list; |
154 | unsigned long trace[MAX_TRACE]; | 156 | unsigned long trace[MAX_TRACE]; |
@@ -164,8 +166,6 @@ struct kmemleak_object { | |||
164 | #define OBJECT_REPORTED (1 << 1) | 166 | #define OBJECT_REPORTED (1 << 1) |
165 | /* flag set to not scan the object */ | 167 | /* flag set to not scan the object */ |
166 | #define OBJECT_NO_SCAN (1 << 2) | 168 | #define OBJECT_NO_SCAN (1 << 2) |
167 | /* flag set on newly allocated objects */ | ||
168 | #define OBJECT_NEW (1 << 3) | ||
169 | 169 | ||
170 | /* number of bytes to print per line; must be 16 or 32 */ | 170 | /* number of bytes to print per line; must be 16 or 32 */ |
171 | #define HEX_ROW_SIZE 16 | 171 | #define HEX_ROW_SIZE 16 |
@@ -241,8 +241,6 @@ struct early_log { | |||
241 | const void *ptr; /* allocated/freed memory block */ | 241 | const void *ptr; /* allocated/freed memory block */ |
242 | size_t size; /* memory block size */ | 242 | size_t size; /* memory block size */ |
243 | int min_count; /* minimum reference count */ | 243 | int min_count; /* minimum reference count */ |
244 | unsigned long offset; /* scan area offset */ | ||
245 | size_t length; /* scan area length */ | ||
246 | unsigned long trace[MAX_TRACE]; /* stack trace */ | 244 | unsigned long trace[MAX_TRACE]; /* stack trace */ |
247 | unsigned int trace_len; /* stack trace length */ | 245 | unsigned int trace_len; /* stack trace length */ |
248 | }; | 246 | }; |
@@ -323,11 +321,6 @@ static bool color_gray(const struct kmemleak_object *object) | |||
323 | object->count >= object->min_count; | 321 | object->count >= object->min_count; |
324 | } | 322 | } |
325 | 323 | ||
326 | static bool color_black(const struct kmemleak_object *object) | ||
327 | { | ||
328 | return object->min_count == KMEMLEAK_BLACK; | ||
329 | } | ||
330 | |||
331 | /* | 324 | /* |
332 | * Objects are considered unreferenced only if their color is white, they have | 325 | * Objects are considered unreferenced only if their color is white, they have |
333 | * not be deleted and have a minimum age to avoid false positives caused by | 326 | * not be deleted and have a minimum age to avoid false positives caused by |
@@ -335,7 +328,7 @@ static bool color_black(const struct kmemleak_object *object) | |||
335 | */ | 328 | */ |
336 | static bool unreferenced_object(struct kmemleak_object *object) | 329 | static bool unreferenced_object(struct kmemleak_object *object) |
337 | { | 330 | { |
338 | return (object->flags & OBJECT_ALLOCATED) && color_white(object) && | 331 | return (color_white(object) && object->flags & OBJECT_ALLOCATED) && |
339 | time_before_eq(object->jiffies + jiffies_min_age, | 332 | time_before_eq(object->jiffies + jiffies_min_age, |
340 | jiffies_last_scan); | 333 | jiffies_last_scan); |
341 | } | 334 | } |
@@ -348,11 +341,13 @@ static void print_unreferenced(struct seq_file *seq, | |||
348 | struct kmemleak_object *object) | 341 | struct kmemleak_object *object) |
349 | { | 342 | { |
350 | int i; | 343 | int i; |
344 | unsigned int msecs_age = jiffies_to_msecs(jiffies - object->jiffies); | ||
351 | 345 | ||
352 | seq_printf(seq, "unreferenced object 0x%08lx (size %zu):\n", | 346 | seq_printf(seq, "unreferenced object 0x%08lx (size %zu):\n", |
353 | object->pointer, object->size); | 347 | object->pointer, object->size); |
354 | seq_printf(seq, " comm \"%s\", pid %d, jiffies %lu\n", | 348 | seq_printf(seq, " comm \"%s\", pid %d, jiffies %lu (age %d.%03ds)\n", |
355 | object->comm, object->pid, object->jiffies); | 349 | object->comm, object->pid, object->jiffies, |
350 | msecs_age / 1000, msecs_age % 1000); | ||
356 | hex_dump_object(seq, object); | 351 | hex_dump_object(seq, object); |
357 | seq_printf(seq, " backtrace:\n"); | 352 | seq_printf(seq, " backtrace:\n"); |
358 | 353 | ||
@@ -381,6 +376,7 @@ static void dump_object_info(struct kmemleak_object *object) | |||
381 | pr_notice(" min_count = %d\n", object->min_count); | 376 | pr_notice(" min_count = %d\n", object->min_count); |
382 | pr_notice(" count = %d\n", object->count); | 377 | pr_notice(" count = %d\n", object->count); |
383 | pr_notice(" flags = 0x%lx\n", object->flags); | 378 | pr_notice(" flags = 0x%lx\n", object->flags); |
379 | pr_notice(" checksum = %d\n", object->checksum); | ||
384 | pr_notice(" backtrace:\n"); | 380 | pr_notice(" backtrace:\n"); |
385 | print_stack_trace(&trace, 4); | 381 | print_stack_trace(&trace, 4); |
386 | } | 382 | } |
@@ -522,12 +518,13 @@ static struct kmemleak_object *create_object(unsigned long ptr, size_t size, | |||
522 | INIT_HLIST_HEAD(&object->area_list); | 518 | INIT_HLIST_HEAD(&object->area_list); |
523 | spin_lock_init(&object->lock); | 519 | spin_lock_init(&object->lock); |
524 | atomic_set(&object->use_count, 1); | 520 | atomic_set(&object->use_count, 1); |
525 | object->flags = OBJECT_ALLOCATED | OBJECT_NEW; | 521 | object->flags = OBJECT_ALLOCATED; |
526 | object->pointer = ptr; | 522 | object->pointer = ptr; |
527 | object->size = size; | 523 | object->size = size; |
528 | object->min_count = min_count; | 524 | object->min_count = min_count; |
529 | object->count = -1; /* no color initially */ | 525 | object->count = 0; /* white color initially */ |
530 | object->jiffies = jiffies; | 526 | object->jiffies = jiffies; |
527 | object->checksum = 0; | ||
531 | 528 | ||
532 | /* task information */ | 529 | /* task information */ |
533 | if (in_irq()) { | 530 | if (in_irq()) { |
@@ -720,14 +717,13 @@ static void make_black_object(unsigned long ptr) | |||
720 | * Add a scanning area to the object. If at least one such area is added, | 717 | * Add a scanning area to the object. If at least one such area is added, |
721 | * kmemleak will only scan these ranges rather than the whole memory block. | 718 | * kmemleak will only scan these ranges rather than the whole memory block. |
722 | */ | 719 | */ |
723 | static void add_scan_area(unsigned long ptr, unsigned long offset, | 720 | static void add_scan_area(unsigned long ptr, size_t size, gfp_t gfp) |
724 | size_t length, gfp_t gfp) | ||
725 | { | 721 | { |
726 | unsigned long flags; | 722 | unsigned long flags; |
727 | struct kmemleak_object *object; | 723 | struct kmemleak_object *object; |
728 | struct kmemleak_scan_area *area; | 724 | struct kmemleak_scan_area *area; |
729 | 725 | ||
730 | object = find_and_get_object(ptr, 0); | 726 | object = find_and_get_object(ptr, 1); |
731 | if (!object) { | 727 | if (!object) { |
732 | kmemleak_warn("Adding scan area to unknown object at 0x%08lx\n", | 728 | kmemleak_warn("Adding scan area to unknown object at 0x%08lx\n", |
733 | ptr); | 729 | ptr); |
@@ -741,7 +737,7 @@ static void add_scan_area(unsigned long ptr, unsigned long offset, | |||
741 | } | 737 | } |
742 | 738 | ||
743 | spin_lock_irqsave(&object->lock, flags); | 739 | spin_lock_irqsave(&object->lock, flags); |
744 | if (offset + length > object->size) { | 740 | if (ptr + size > object->pointer + object->size) { |
745 | kmemleak_warn("Scan area larger than object 0x%08lx\n", ptr); | 741 | kmemleak_warn("Scan area larger than object 0x%08lx\n", ptr); |
746 | dump_object_info(object); | 742 | dump_object_info(object); |
747 | kmem_cache_free(scan_area_cache, area); | 743 | kmem_cache_free(scan_area_cache, area); |
@@ -749,8 +745,8 @@ static void add_scan_area(unsigned long ptr, unsigned long offset, | |||
749 | } | 745 | } |
750 | 746 | ||
751 | INIT_HLIST_NODE(&area->node); | 747 | INIT_HLIST_NODE(&area->node); |
752 | area->offset = offset; | 748 | area->start = ptr; |
753 | area->length = length; | 749 | area->size = size; |
754 | 750 | ||
755 | hlist_add_head(&area->node, &object->area_list); | 751 | hlist_add_head(&area->node, &object->area_list); |
756 | out_unlock: | 752 | out_unlock: |
@@ -786,7 +782,7 @@ static void object_no_scan(unsigned long ptr) | |||
786 | * processed later once kmemleak is fully initialized. | 782 | * processed later once kmemleak is fully initialized. |
787 | */ | 783 | */ |
788 | static void __init log_early(int op_type, const void *ptr, size_t size, | 784 | static void __init log_early(int op_type, const void *ptr, size_t size, |
789 | int min_count, unsigned long offset, size_t length) | 785 | int min_count) |
790 | { | 786 | { |
791 | unsigned long flags; | 787 | unsigned long flags; |
792 | struct early_log *log; | 788 | struct early_log *log; |
@@ -808,8 +804,6 @@ static void __init log_early(int op_type, const void *ptr, size_t size, | |||
808 | log->ptr = ptr; | 804 | log->ptr = ptr; |
809 | log->size = size; | 805 | log->size = size; |
810 | log->min_count = min_count; | 806 | log->min_count = min_count; |
811 | log->offset = offset; | ||
812 | log->length = length; | ||
813 | if (op_type == KMEMLEAK_ALLOC) | 807 | if (op_type == KMEMLEAK_ALLOC) |
814 | log->trace_len = __save_stack_trace(log->trace); | 808 | log->trace_len = __save_stack_trace(log->trace); |
815 | crt_early_log++; | 809 | crt_early_log++; |
@@ -858,7 +852,7 @@ void __ref kmemleak_alloc(const void *ptr, size_t size, int min_count, | |||
858 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) | 852 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) |
859 | create_object((unsigned long)ptr, size, min_count, gfp); | 853 | create_object((unsigned long)ptr, size, min_count, gfp); |
860 | else if (atomic_read(&kmemleak_early_log)) | 854 | else if (atomic_read(&kmemleak_early_log)) |
861 | log_early(KMEMLEAK_ALLOC, ptr, size, min_count, 0, 0); | 855 | log_early(KMEMLEAK_ALLOC, ptr, size, min_count); |
862 | } | 856 | } |
863 | EXPORT_SYMBOL_GPL(kmemleak_alloc); | 857 | EXPORT_SYMBOL_GPL(kmemleak_alloc); |
864 | 858 | ||
@@ -873,7 +867,7 @@ void __ref kmemleak_free(const void *ptr) | |||
873 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) | 867 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) |
874 | delete_object_full((unsigned long)ptr); | 868 | delete_object_full((unsigned long)ptr); |
875 | else if (atomic_read(&kmemleak_early_log)) | 869 | else if (atomic_read(&kmemleak_early_log)) |
876 | log_early(KMEMLEAK_FREE, ptr, 0, 0, 0, 0); | 870 | log_early(KMEMLEAK_FREE, ptr, 0, 0); |
877 | } | 871 | } |
878 | EXPORT_SYMBOL_GPL(kmemleak_free); | 872 | EXPORT_SYMBOL_GPL(kmemleak_free); |
879 | 873 | ||
@@ -888,7 +882,7 @@ void __ref kmemleak_free_part(const void *ptr, size_t size) | |||
888 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) | 882 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) |
889 | delete_object_part((unsigned long)ptr, size); | 883 | delete_object_part((unsigned long)ptr, size); |
890 | else if (atomic_read(&kmemleak_early_log)) | 884 | else if (atomic_read(&kmemleak_early_log)) |
891 | log_early(KMEMLEAK_FREE_PART, ptr, size, 0, 0, 0); | 885 | log_early(KMEMLEAK_FREE_PART, ptr, size, 0); |
892 | } | 886 | } |
893 | EXPORT_SYMBOL_GPL(kmemleak_free_part); | 887 | EXPORT_SYMBOL_GPL(kmemleak_free_part); |
894 | 888 | ||
@@ -903,7 +897,7 @@ void __ref kmemleak_not_leak(const void *ptr) | |||
903 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) | 897 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) |
904 | make_gray_object((unsigned long)ptr); | 898 | make_gray_object((unsigned long)ptr); |
905 | else if (atomic_read(&kmemleak_early_log)) | 899 | else if (atomic_read(&kmemleak_early_log)) |
906 | log_early(KMEMLEAK_NOT_LEAK, ptr, 0, 0, 0, 0); | 900 | log_early(KMEMLEAK_NOT_LEAK, ptr, 0, 0); |
907 | } | 901 | } |
908 | EXPORT_SYMBOL(kmemleak_not_leak); | 902 | EXPORT_SYMBOL(kmemleak_not_leak); |
909 | 903 | ||
@@ -919,22 +913,21 @@ void __ref kmemleak_ignore(const void *ptr) | |||
919 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) | 913 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) |
920 | make_black_object((unsigned long)ptr); | 914 | make_black_object((unsigned long)ptr); |
921 | else if (atomic_read(&kmemleak_early_log)) | 915 | else if (atomic_read(&kmemleak_early_log)) |
922 | log_early(KMEMLEAK_IGNORE, ptr, 0, 0, 0, 0); | 916 | log_early(KMEMLEAK_IGNORE, ptr, 0, 0); |
923 | } | 917 | } |
924 | EXPORT_SYMBOL(kmemleak_ignore); | 918 | EXPORT_SYMBOL(kmemleak_ignore); |
925 | 919 | ||
926 | /* | 920 | /* |
927 | * Limit the range to be scanned in an allocated memory block. | 921 | * Limit the range to be scanned in an allocated memory block. |
928 | */ | 922 | */ |
929 | void __ref kmemleak_scan_area(const void *ptr, unsigned long offset, | 923 | void __ref kmemleak_scan_area(const void *ptr, size_t size, gfp_t gfp) |
930 | size_t length, gfp_t gfp) | ||
931 | { | 924 | { |
932 | pr_debug("%s(0x%p)\n", __func__, ptr); | 925 | pr_debug("%s(0x%p)\n", __func__, ptr); |
933 | 926 | ||
934 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) | 927 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) |
935 | add_scan_area((unsigned long)ptr, offset, length, gfp); | 928 | add_scan_area((unsigned long)ptr, size, gfp); |
936 | else if (atomic_read(&kmemleak_early_log)) | 929 | else if (atomic_read(&kmemleak_early_log)) |
937 | log_early(KMEMLEAK_SCAN_AREA, ptr, 0, 0, offset, length); | 930 | log_early(KMEMLEAK_SCAN_AREA, ptr, size, 0); |
938 | } | 931 | } |
939 | EXPORT_SYMBOL(kmemleak_scan_area); | 932 | EXPORT_SYMBOL(kmemleak_scan_area); |
940 | 933 | ||
@@ -948,11 +941,25 @@ void __ref kmemleak_no_scan(const void *ptr) | |||
948 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) | 941 | if (atomic_read(&kmemleak_enabled) && ptr && !IS_ERR(ptr)) |
949 | object_no_scan((unsigned long)ptr); | 942 | object_no_scan((unsigned long)ptr); |
950 | else if (atomic_read(&kmemleak_early_log)) | 943 | else if (atomic_read(&kmemleak_early_log)) |
951 | log_early(KMEMLEAK_NO_SCAN, ptr, 0, 0, 0, 0); | 944 | log_early(KMEMLEAK_NO_SCAN, ptr, 0, 0); |
952 | } | 945 | } |
953 | EXPORT_SYMBOL(kmemleak_no_scan); | 946 | EXPORT_SYMBOL(kmemleak_no_scan); |
954 | 947 | ||
955 | /* | 948 | /* |
949 | * Update an object's checksum and return true if it was modified. | ||
950 | */ | ||
951 | static bool update_checksum(struct kmemleak_object *object) | ||
952 | { | ||
953 | u32 old_csum = object->checksum; | ||
954 | |||
955 | if (!kmemcheck_is_obj_initialized(object->pointer, object->size)) | ||
956 | return false; | ||
957 | |||
958 | object->checksum = crc32(0, (void *)object->pointer, object->size); | ||
959 | return object->checksum != old_csum; | ||
960 | } | ||
961 | |||
962 | /* | ||
956 | * Memory scanning is a long process and it needs to be interruptable. This | 963 | * Memory scanning is a long process and it needs to be interruptable. This |
957 | * function checks whether such interrupt condition occured. | 964 | * function checks whether such interrupt condition occured. |
958 | */ | 965 | */ |
@@ -1031,11 +1038,14 @@ static void scan_block(void *_start, void *_end, | |||
1031 | * added to the gray_list. | 1038 | * added to the gray_list. |
1032 | */ | 1039 | */ |
1033 | object->count++; | 1040 | object->count++; |
1034 | if (color_gray(object)) | 1041 | if (color_gray(object)) { |
1035 | list_add_tail(&object->gray_list, &gray_list); | 1042 | list_add_tail(&object->gray_list, &gray_list); |
1036 | else | 1043 | spin_unlock_irqrestore(&object->lock, flags); |
1037 | put_object(object); | 1044 | continue; |
1045 | } | ||
1046 | |||
1038 | spin_unlock_irqrestore(&object->lock, flags); | 1047 | spin_unlock_irqrestore(&object->lock, flags); |
1048 | put_object(object); | ||
1039 | } | 1049 | } |
1040 | } | 1050 | } |
1041 | 1051 | ||
@@ -1075,14 +1085,47 @@ static void scan_object(struct kmemleak_object *object) | |||
1075 | } | 1085 | } |
1076 | } else | 1086 | } else |
1077 | hlist_for_each_entry(area, elem, &object->area_list, node) | 1087 | hlist_for_each_entry(area, elem, &object->area_list, node) |
1078 | scan_block((void *)(object->pointer + area->offset), | 1088 | scan_block((void *)area->start, |
1079 | (void *)(object->pointer + area->offset | 1089 | (void *)(area->start + area->size), |
1080 | + area->length), object, 0); | 1090 | object, 0); |
1081 | out: | 1091 | out: |
1082 | spin_unlock_irqrestore(&object->lock, flags); | 1092 | spin_unlock_irqrestore(&object->lock, flags); |
1083 | } | 1093 | } |
1084 | 1094 | ||
1085 | /* | 1095 | /* |
1096 | * Scan the objects already referenced (gray objects). More objects will be | ||
1097 | * referenced and, if there are no memory leaks, all the objects are scanned. | ||
1098 | */ | ||
1099 | static void scan_gray_list(void) | ||
1100 | { | ||
1101 | struct kmemleak_object *object, *tmp; | ||
1102 | |||
1103 | /* | ||
1104 | * The list traversal is safe for both tail additions and removals | ||
1105 | * from inside the loop. The kmemleak objects cannot be freed from | ||
1106 | * outside the loop because their use_count was incremented. | ||
1107 | */ | ||
1108 | object = list_entry(gray_list.next, typeof(*object), gray_list); | ||
1109 | while (&object->gray_list != &gray_list) { | ||
1110 | cond_resched(); | ||
1111 | |||
1112 | /* may add new objects to the list */ | ||
1113 | if (!scan_should_stop()) | ||
1114 | scan_object(object); | ||
1115 | |||
1116 | tmp = list_entry(object->gray_list.next, typeof(*object), | ||
1117 | gray_list); | ||
1118 | |||
1119 | /* remove the object from the list and release it */ | ||
1120 | list_del(&object->gray_list); | ||
1121 | put_object(object); | ||
1122 | |||
1123 | object = tmp; | ||
1124 | } | ||
1125 | WARN_ON(!list_empty(&gray_list)); | ||
1126 | } | ||
1127 | |||
1128 | /* | ||
1086 | * Scan data sections and all the referenced memory blocks allocated via the | 1129 | * Scan data sections and all the referenced memory blocks allocated via the |
1087 | * kernel's standard allocators. This function must be called with the | 1130 | * kernel's standard allocators. This function must be called with the |
1088 | * scan_mutex held. | 1131 | * scan_mutex held. |
@@ -1090,10 +1133,9 @@ out: | |||
1090 | static void kmemleak_scan(void) | 1133 | static void kmemleak_scan(void) |
1091 | { | 1134 | { |
1092 | unsigned long flags; | 1135 | unsigned long flags; |
1093 | struct kmemleak_object *object, *tmp; | 1136 | struct kmemleak_object *object; |
1094 | int i; | 1137 | int i; |
1095 | int new_leaks = 0; | 1138 | int new_leaks = 0; |
1096 | int gray_list_pass = 0; | ||
1097 | 1139 | ||
1098 | jiffies_last_scan = jiffies; | 1140 | jiffies_last_scan = jiffies; |
1099 | 1141 | ||
@@ -1114,7 +1156,6 @@ static void kmemleak_scan(void) | |||
1114 | #endif | 1156 | #endif |
1115 | /* reset the reference count (whiten the object) */ | 1157 | /* reset the reference count (whiten the object) */ |
1116 | object->count = 0; | 1158 | object->count = 0; |
1117 | object->flags &= ~OBJECT_NEW; | ||
1118 | if (color_gray(object) && get_object(object)) | 1159 | if (color_gray(object) && get_object(object)) |
1119 | list_add_tail(&object->gray_list, &gray_list); | 1160 | list_add_tail(&object->gray_list, &gray_list); |
1120 | 1161 | ||
@@ -1172,62 +1213,36 @@ static void kmemleak_scan(void) | |||
1172 | 1213 | ||
1173 | /* | 1214 | /* |
1174 | * Scan the objects already referenced from the sections scanned | 1215 | * Scan the objects already referenced from the sections scanned |
1175 | * above. More objects will be referenced and, if there are no memory | 1216 | * above. |
1176 | * leaks, all the objects will be scanned. The list traversal is safe | ||
1177 | * for both tail additions and removals from inside the loop. The | ||
1178 | * kmemleak objects cannot be freed from outside the loop because their | ||
1179 | * use_count was increased. | ||
1180 | */ | 1217 | */ |
1181 | repeat: | 1218 | scan_gray_list(); |
1182 | object = list_entry(gray_list.next, typeof(*object), gray_list); | ||
1183 | while (&object->gray_list != &gray_list) { | ||
1184 | cond_resched(); | ||
1185 | |||
1186 | /* may add new objects to the list */ | ||
1187 | if (!scan_should_stop()) | ||
1188 | scan_object(object); | ||
1189 | |||
1190 | tmp = list_entry(object->gray_list.next, typeof(*object), | ||
1191 | gray_list); | ||
1192 | |||
1193 | /* remove the object from the list and release it */ | ||
1194 | list_del(&object->gray_list); | ||
1195 | put_object(object); | ||
1196 | |||
1197 | object = tmp; | ||
1198 | } | ||
1199 | |||
1200 | if (scan_should_stop() || ++gray_list_pass >= GRAY_LIST_PASSES) | ||
1201 | goto scan_end; | ||
1202 | 1219 | ||
1203 | /* | 1220 | /* |
1204 | * Check for new objects allocated during this scanning and add them | 1221 | * Check for new or unreferenced objects modified since the previous |
1205 | * to the gray list. | 1222 | * scan and color them gray until the next scan. |
1206 | */ | 1223 | */ |
1207 | rcu_read_lock(); | 1224 | rcu_read_lock(); |
1208 | list_for_each_entry_rcu(object, &object_list, object_list) { | 1225 | list_for_each_entry_rcu(object, &object_list, object_list) { |
1209 | spin_lock_irqsave(&object->lock, flags); | 1226 | spin_lock_irqsave(&object->lock, flags); |
1210 | if ((object->flags & OBJECT_NEW) && !color_black(object) && | 1227 | if (color_white(object) && (object->flags & OBJECT_ALLOCATED) |
1211 | get_object(object)) { | 1228 | && update_checksum(object) && get_object(object)) { |
1212 | object->flags &= ~OBJECT_NEW; | 1229 | /* color it gray temporarily */ |
1230 | object->count = object->min_count; | ||
1213 | list_add_tail(&object->gray_list, &gray_list); | 1231 | list_add_tail(&object->gray_list, &gray_list); |
1214 | } | 1232 | } |
1215 | spin_unlock_irqrestore(&object->lock, flags); | 1233 | spin_unlock_irqrestore(&object->lock, flags); |
1216 | } | 1234 | } |
1217 | rcu_read_unlock(); | 1235 | rcu_read_unlock(); |
1218 | 1236 | ||
1219 | if (!list_empty(&gray_list)) | 1237 | /* |
1220 | goto repeat; | 1238 | * Re-scan the gray list for modified unreferenced objects. |
1221 | 1239 | */ | |
1222 | scan_end: | 1240 | scan_gray_list(); |
1223 | WARN_ON(!list_empty(&gray_list)); | ||
1224 | 1241 | ||
1225 | /* | 1242 | /* |
1226 | * If scanning was stopped or new objects were being allocated at a | 1243 | * If scanning was stopped do not report any new unreferenced objects. |
1227 | * higher rate than gray list scanning, do not report any new | ||
1228 | * unreferenced objects. | ||
1229 | */ | 1244 | */ |
1230 | if (scan_should_stop() || gray_list_pass >= GRAY_LIST_PASSES) | 1245 | if (scan_should_stop()) |
1231 | return; | 1246 | return; |
1232 | 1247 | ||
1233 | /* | 1248 | /* |
@@ -1642,8 +1657,7 @@ void __init kmemleak_init(void) | |||
1642 | kmemleak_ignore(log->ptr); | 1657 | kmemleak_ignore(log->ptr); |
1643 | break; | 1658 | break; |
1644 | case KMEMLEAK_SCAN_AREA: | 1659 | case KMEMLEAK_SCAN_AREA: |
1645 | kmemleak_scan_area(log->ptr, log->offset, log->length, | 1660 | kmemleak_scan_area(log->ptr, log->size, GFP_KERNEL); |
1646 | GFP_KERNEL); | ||
1647 | break; | 1661 | break; |
1648 | case KMEMLEAK_NO_SCAN: | 1662 | case KMEMLEAK_NO_SCAN: |
1649 | kmemleak_no_scan(log->ptr); | 1663 | kmemleak_no_scan(log->ptr); |
diff --git a/mm/page_alloc.c b/mm/page_alloc.c index 74af449b1f1d..4e869657cb51 100644 --- a/mm/page_alloc.c +++ b/mm/page_alloc.c | |||
@@ -3579,7 +3579,7 @@ static unsigned long __meminit zone_spanned_pages_in_node(int nid, | |||
3579 | * Return the number of holes in a range on a node. If nid is MAX_NUMNODES, | 3579 | * Return the number of holes in a range on a node. If nid is MAX_NUMNODES, |
3580 | * then all holes in the requested range will be accounted for. | 3580 | * then all holes in the requested range will be accounted for. |
3581 | */ | 3581 | */ |
3582 | static unsigned long __meminit __absent_pages_in_range(int nid, | 3582 | unsigned long __meminit __absent_pages_in_range(int nid, |
3583 | unsigned long range_start_pfn, | 3583 | unsigned long range_start_pfn, |
3584 | unsigned long range_end_pfn) | 3584 | unsigned long range_end_pfn) |
3585 | { | 3585 | { |
@@ -4108,7 +4108,7 @@ static int __init cmp_node_active_region(const void *a, const void *b) | |||
4108 | } | 4108 | } |
4109 | 4109 | ||
4110 | /* sort the node_map by start_pfn */ | 4110 | /* sort the node_map by start_pfn */ |
4111 | static void __init sort_node_map(void) | 4111 | void __init sort_node_map(void) |
4112 | { | 4112 | { |
4113 | sort(early_node_map, (size_t)nr_nodemap_entries, | 4113 | sort(early_node_map, (size_t)nr_nodemap_entries, |
4114 | sizeof(struct node_active_region), | 4114 | sizeof(struct node_active_region), |
diff --git a/mm/readahead.c b/mm/readahead.c index aa1aa2345235..033bc135a41f 100644 --- a/mm/readahead.c +++ b/mm/readahead.c | |||
@@ -547,5 +547,17 @@ page_cache_async_readahead(struct address_space *mapping, | |||
547 | 547 | ||
548 | /* do read-ahead */ | 548 | /* do read-ahead */ |
549 | ondemand_readahead(mapping, ra, filp, true, offset, req_size); | 549 | ondemand_readahead(mapping, ra, filp, true, offset, req_size); |
550 | |||
551 | #ifdef CONFIG_BLOCK | ||
552 | /* | ||
553 | * Normally the current page is !uptodate and lock_page() will be | ||
554 | * immediately called to implicitly unplug the device. However this | ||
555 | * is not always true for RAID conifgurations, where data arrives | ||
556 | * not strictly in their submission order. In this case we need to | ||
557 | * explicitly kick off the IO. | ||
558 | */ | ||
559 | if (PageUptodate(page)) | ||
560 | blk_run_backing_dev(mapping->backing_dev_info, NULL); | ||
561 | #endif | ||
550 | } | 562 | } |
551 | EXPORT_SYMBOL_GPL(page_cache_async_readahead); | 563 | EXPORT_SYMBOL_GPL(page_cache_async_readahead); |
@@ -1132,7 +1132,7 @@ static void __cpuinit cpuup_canceled(long cpu) | |||
1132 | if (nc) | 1132 | if (nc) |
1133 | free_block(cachep, nc->entry, nc->avail, node); | 1133 | free_block(cachep, nc->entry, nc->avail, node); |
1134 | 1134 | ||
1135 | if (!cpus_empty(*mask)) { | 1135 | if (!cpumask_empty(mask)) { |
1136 | spin_unlock_irq(&l3->list_lock); | 1136 | spin_unlock_irq(&l3->list_lock); |
1137 | goto free_array_cache; | 1137 | goto free_array_cache; |
1138 | } | 1138 | } |
@@ -2275,9 +2275,11 @@ kmem_cache_create (const char *name, size_t size, size_t align, | |||
2275 | /* | 2275 | /* |
2276 | * Determine if the slab management is 'on' or 'off' slab. | 2276 | * Determine if the slab management is 'on' or 'off' slab. |
2277 | * (bootstrapping cannot cope with offslab caches so don't do | 2277 | * (bootstrapping cannot cope with offslab caches so don't do |
2278 | * it too early on.) | 2278 | * it too early on. Always use on-slab management when |
2279 | * SLAB_NOLEAKTRACE to avoid recursive calls into kmemleak) | ||
2279 | */ | 2280 | */ |
2280 | if ((size >= (PAGE_SIZE >> 3)) && !slab_early_init) | 2281 | if ((size >= (PAGE_SIZE >> 3)) && !slab_early_init && |
2282 | !(flags & SLAB_NOLEAKTRACE)) | ||
2281 | /* | 2283 | /* |
2282 | * Size is large, assume best to place the slab management obj | 2284 | * Size is large, assume best to place the slab management obj |
2283 | * off-slab (should allow better packing of objs). | 2285 | * off-slab (should allow better packing of objs). |
@@ -2596,8 +2598,8 @@ static struct slab *alloc_slabmgmt(struct kmem_cache *cachep, void *objp, | |||
2596 | * kmemleak does not treat the ->s_mem pointer as a reference | 2598 | * kmemleak does not treat the ->s_mem pointer as a reference |
2597 | * to the object. Otherwise we will not report the leak. | 2599 | * to the object. Otherwise we will not report the leak. |
2598 | */ | 2600 | */ |
2599 | kmemleak_scan_area(slabp, offsetof(struct slab, list), | 2601 | kmemleak_scan_area(&slabp->list, sizeof(struct list_head), |
2600 | sizeof(struct list_head), local_flags); | 2602 | local_flags); |
2601 | if (!slabp) | 2603 | if (!slabp) |
2602 | return NULL; | 2604 | return NULL; |
2603 | } else { | 2605 | } else { |
diff --git a/net/socket.c b/net/socket.c index dbfdfa96d29b..769c386bd428 100644 --- a/net/socket.c +++ b/net/socket.c | |||
@@ -312,18 +312,6 @@ static struct file_system_type sock_fs_type = { | |||
312 | .kill_sb = kill_anon_super, | 312 | .kill_sb = kill_anon_super, |
313 | }; | 313 | }; |
314 | 314 | ||
315 | static int sockfs_delete_dentry(struct dentry *dentry) | ||
316 | { | ||
317 | /* | ||
318 | * At creation time, we pretended this dentry was hashed | ||
319 | * (by clearing DCACHE_UNHASHED bit in d_flags) | ||
320 | * At delete time, we restore the truth : not hashed. | ||
321 | * (so that dput() can proceed correctly) | ||
322 | */ | ||
323 | dentry->d_flags |= DCACHE_UNHASHED; | ||
324 | return 0; | ||
325 | } | ||
326 | |||
327 | /* | 315 | /* |
328 | * sockfs_dname() is called from d_path(). | 316 | * sockfs_dname() is called from d_path(). |
329 | */ | 317 | */ |
@@ -334,7 +322,6 @@ static char *sockfs_dname(struct dentry *dentry, char *buffer, int buflen) | |||
334 | } | 322 | } |
335 | 323 | ||
336 | static const struct dentry_operations sockfs_dentry_operations = { | 324 | static const struct dentry_operations sockfs_dentry_operations = { |
337 | .d_delete = sockfs_delete_dentry, | ||
338 | .d_dname = sockfs_dname, | 325 | .d_dname = sockfs_dname, |
339 | }; | 326 | }; |
340 | 327 | ||
@@ -374,12 +361,6 @@ static int sock_alloc_file(struct socket *sock, struct file **f, int flags) | |||
374 | path.mnt = mntget(sock_mnt); | 361 | path.mnt = mntget(sock_mnt); |
375 | 362 | ||
376 | path.dentry->d_op = &sockfs_dentry_operations; | 363 | path.dentry->d_op = &sockfs_dentry_operations; |
377 | /* | ||
378 | * We dont want to push this dentry into global dentry hash table. | ||
379 | * We pretend dentry is already hashed, by unsetting DCACHE_UNHASHED | ||
380 | * This permits a working /proc/$pid/fd/XXX on sockets | ||
381 | */ | ||
382 | path.dentry->d_flags &= ~DCACHE_UNHASHED; | ||
383 | d_instantiate(path.dentry, SOCK_INODE(sock)); | 364 | d_instantiate(path.dentry, SOCK_INODE(sock)); |
384 | SOCK_INODE(sock)->i_fop = &socket_file_ops; | 365 | SOCK_INODE(sock)->i_fop = &socket_file_ops; |
385 | 366 | ||
diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include index c67e73ecd5be..ed2773edfe71 100644 --- a/scripts/Kbuild.include +++ b/scripts/Kbuild.include | |||
@@ -149,6 +149,12 @@ ld-option = $(call try-run,\ | |||
149 | # $(Q)$(MAKE) $(build)=dir | 149 | # $(Q)$(MAKE) $(build)=dir |
150 | build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj | 150 | build := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.build obj |
151 | 151 | ||
152 | ### | ||
153 | # Shorthand for $(Q)$(MAKE) -f scripts/Makefile.modbuiltin obj= | ||
154 | # Usage: | ||
155 | # $(Q)$(MAKE) $(modbuiltin)=dir | ||
156 | modbuiltin := -f $(if $(KBUILD_SRC),$(srctree)/)scripts/Makefile.modbuiltin obj | ||
157 | |||
152 | # Prefix -I with $(srctree) if it is not an absolute path. | 158 | # Prefix -I with $(srctree) if it is not an absolute path. |
153 | # skip if -I has no parameter | 159 | # skip if -I has no parameter |
154 | addtree = $(if $(patsubst -I%,%,$(1)), \ | 160 | addtree = $(if $(patsubst -I%,%,$(1)), \ |
diff --git a/scripts/Makefile.build b/scripts/Makefile.build index 341b58902ffc..0b94d2fa3a88 100644 --- a/scripts/Makefile.build +++ b/scripts/Makefile.build | |||
@@ -207,6 +207,7 @@ endif | |||
207 | 207 | ||
208 | ifdef CONFIG_FTRACE_MCOUNT_RECORD | 208 | ifdef CONFIG_FTRACE_MCOUNT_RECORD |
209 | cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \ | 209 | cmd_record_mcount = set -e ; perl $(srctree)/scripts/recordmcount.pl "$(ARCH)" \ |
210 | "$(if $(CONFIG_CPU_BIG_ENDIAN),big,little)" \ | ||
210 | "$(if $(CONFIG_64BIT),64,32)" \ | 211 | "$(if $(CONFIG_64BIT),64,32)" \ |
211 | "$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" "$(NM)" "$(RM)" "$(MV)" \ | 212 | "$(OBJDUMP)" "$(OBJCOPY)" "$(CC)" "$(LD)" "$(NM)" "$(RM)" "$(MV)" \ |
212 | "$(if $(part-of-module),1,0)" "$(@)"; | 213 | "$(if $(part-of-module),1,0)" "$(@)"; |
diff --git a/scripts/Makefile.lib b/scripts/Makefile.lib index 224d85e72ef1..cd815ac2a50b 100644 --- a/scripts/Makefile.lib +++ b/scripts/Makefile.lib | |||
@@ -213,7 +213,7 @@ cmd_gzip = (cat $(filter-out FORCE,$^) | gzip -f -9 > $@) || \ | |||
213 | 213 | ||
214 | # Bzip2 and LZMA do not include size in file... so we have to fake that; | 214 | # Bzip2 and LZMA do not include size in file... so we have to fake that; |
215 | # append the size as a 32-bit littleendian number as gzip does. | 215 | # append the size as a 32-bit littleendian number as gzip does. |
216 | size_append = /bin/echo -ne $(shell \ | 216 | size_append = printf $(shell \ |
217 | dec_size=0; \ | 217 | dec_size=0; \ |
218 | for F in $1; do \ | 218 | for F in $1; do \ |
219 | fsize=$$(stat -c "%s" $$F); \ | 219 | fsize=$$(stat -c "%s" $$F); \ |
diff --git a/scripts/Makefile.modbuiltin b/scripts/Makefile.modbuiltin new file mode 100644 index 000000000000..102a276f6eea --- /dev/null +++ b/scripts/Makefile.modbuiltin | |||
@@ -0,0 +1,55 @@ | |||
1 | # ========================================================================== | ||
2 | # Generating modules.builtin | ||
3 | # ========================================================================== | ||
4 | |||
5 | src := $(obj) | ||
6 | |||
7 | PHONY := __modbuiltin | ||
8 | __modbuiltin: | ||
9 | |||
10 | -include include/config/auto.conf | ||
11 | # tristate.conf sets tristate variables to uppercase 'Y' or 'M' | ||
12 | # That way, we get the list of built-in modules in obj-Y | ||
13 | -include include/config/tristate.conf | ||
14 | |||
15 | include scripts/Kbuild.include | ||
16 | |||
17 | # The filename Kbuild has precedence over Makefile | ||
18 | kbuild-dir := $(if $(filter /%,$(src)),$(src),$(srctree)/$(src)) | ||
19 | kbuild-file := $(if $(wildcard $(kbuild-dir)/Kbuild),$(kbuild-dir)/Kbuild,$(kbuild-dir)/Makefile) | ||
20 | include $(kbuild-file) | ||
21 | |||
22 | include scripts/Makefile.lib | ||
23 | __subdir-Y := $(patsubst %/,%,$(filter %/, $(obj-Y))) | ||
24 | subdir-Y += $(__subdir-Y) | ||
25 | subdir-ym := $(sort $(subdir-y) $(subdir-Y) $(subdir-m)) | ||
26 | subdir-ym := $(addprefix $(obj)/,$(subdir-ym)) | ||
27 | obj-Y := $(addprefix $(obj)/,$(obj-Y)) | ||
28 | |||
29 | modbuiltin-subdirs := $(patsubst %,%/modules.builtin, $(subdir-ym)) | ||
30 | modbuiltin-mods := $(filter %.ko, $(obj-Y:.o=.ko)) | ||
31 | modbuiltin-target := $(obj)/modules.builtin | ||
32 | |||
33 | __modbuiltin: $(modbuiltin-target) $(subdir-ym) | ||
34 | @: | ||
35 | |||
36 | $(modbuiltin-target): $(subdir-ym) FORCE | ||
37 | $(Q)(for m in $(modbuiltin-mods); do echo kernel/$$m; done; \ | ||
38 | cat /dev/null $(modbuiltin-subdirs)) > $@ | ||
39 | |||
40 | PHONY += FORCE | ||
41 | |||
42 | FORCE: | ||
43 | |||
44 | # Descending | ||
45 | # --------------------------------------------------------------------------- | ||
46 | |||
47 | PHONY += $(subdir-ym) | ||
48 | $(subdir-ym): | ||
49 | $(Q)$(MAKE) $(modbuiltin)=$@ | ||
50 | |||
51 | |||
52 | # Declare the contents of the .PHONY variable as phony. We keep that | ||
53 | # information in a variable se we can use it in if_changed and friends. | ||
54 | |||
55 | .PHONY: $(PHONY) | ||
diff --git a/scripts/basic/fixdep.c b/scripts/basic/fixdep.c index 6bf21f83837d..ea26b23de082 100644 --- a/scripts/basic/fixdep.c +++ b/scripts/basic/fixdep.c | |||
@@ -16,15 +16,15 @@ | |||
16 | * tells make when to remake a file. | 16 | * tells make when to remake a file. |
17 | * | 17 | * |
18 | * To use this list as-is however has the drawback that virtually | 18 | * To use this list as-is however has the drawback that virtually |
19 | * every file in the kernel includes <linux/autoconf.h>. | 19 | * every file in the kernel includes autoconf.h. |
20 | * | 20 | * |
21 | * If the user re-runs make *config, linux/autoconf.h will be | 21 | * If the user re-runs make *config, autoconf.h will be |
22 | * regenerated. make notices that and will rebuild every file which | 22 | * regenerated. make notices that and will rebuild every file which |
23 | * includes autoconf.h, i.e. basically all files. This is extremely | 23 | * includes autoconf.h, i.e. basically all files. This is extremely |
24 | * annoying if the user just changed CONFIG_HIS_DRIVER from n to m. | 24 | * annoying if the user just changed CONFIG_HIS_DRIVER from n to m. |
25 | * | 25 | * |
26 | * So we play the same trick that "mkdep" played before. We replace | 26 | * So we play the same trick that "mkdep" played before. We replace |
27 | * the dependency on linux/autoconf.h by a dependency on every config | 27 | * the dependency on autoconf.h by a dependency on every config |
28 | * option which is mentioned in any of the listed prequisites. | 28 | * option which is mentioned in any of the listed prequisites. |
29 | * | 29 | * |
30 | * kconfig populates a tree in include/config/ with an empty file | 30 | * kconfig populates a tree in include/config/ with an empty file |
@@ -73,7 +73,7 @@ | |||
73 | * cmd_<target> = <cmdline> | 73 | * cmd_<target> = <cmdline> |
74 | * | 74 | * |
75 | * and then basically copies the .<target>.d file to stdout, in the | 75 | * and then basically copies the .<target>.d file to stdout, in the |
76 | * process filtering out the dependency on linux/autoconf.h and adding | 76 | * process filtering out the dependency on autoconf.h and adding |
77 | * dependencies on include/config/my/option.h for every | 77 | * dependencies on include/config/my/option.h for every |
78 | * CONFIG_MY_OPTION encountered in any of the prequisites. | 78 | * CONFIG_MY_OPTION encountered in any of the prequisites. |
79 | * | 79 | * |
@@ -324,7 +324,7 @@ static void parse_dep_file(void *map, size_t len) | |||
324 | p++; | 324 | p++; |
325 | } | 325 | } |
326 | memcpy(s, m, p-m); s[p-m] = 0; | 326 | memcpy(s, m, p-m); s[p-m] = 0; |
327 | if (strrcmp(s, "include/linux/autoconf.h") && | 327 | if (strrcmp(s, "include/generated/autoconf.h") && |
328 | strrcmp(s, "arch/um/include/uml-config.h") && | 328 | strrcmp(s, "arch/um/include/uml-config.h") && |
329 | strrcmp(s, ".ver")) { | 329 | strrcmp(s, ".ver")) { |
330 | printf(" %s \\\n", s); | 330 | printf(" %s \\\n", s); |
diff --git a/scripts/genksyms/keywords.c_shipped b/scripts/genksyms/keywords.c_shipped index 287467a2e8c7..8060e06798b3 100644 --- a/scripts/genksyms/keywords.c_shipped +++ b/scripts/genksyms/keywords.c_shipped | |||
@@ -1,4 +1,4 @@ | |||
1 | /* ANSI-C code produced by gperf version 3.0.3 */ | 1 | /* ANSI-C code produced by gperf version 3.0.4 */ |
2 | /* Command-line: gperf -L ANSI-C -a -C -E -g -H is_reserved_hash -k '1,3,$' -N is_reserved_word -p -t scripts/genksyms/keywords.gperf */ | 2 | /* Command-line: gperf -L ANSI-C -a -C -E -g -H is_reserved_hash -k '1,3,$' -N is_reserved_word -p -t scripts/genksyms/keywords.gperf */ |
3 | 3 | ||
4 | #if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \ | 4 | #if !((' ' == 32) && ('!' == 33) && ('"' == 34) && ('#' == 35) \ |
@@ -34,7 +34,7 @@ struct resword; | |||
34 | static const struct resword *is_reserved_word(register const char *str, register unsigned int len); | 34 | static const struct resword *is_reserved_word(register const char *str, register unsigned int len); |
35 | #line 5 "scripts/genksyms/keywords.gperf" | 35 | #line 5 "scripts/genksyms/keywords.gperf" |
36 | struct resword { const char *name; int token; }; | 36 | struct resword { const char *name; int token; }; |
37 | /* maximum key range = 62, duplicates = 0 */ | 37 | /* maximum key range = 64, duplicates = 0 */ |
38 | 38 | ||
39 | #ifdef __GNUC__ | 39 | #ifdef __GNUC__ |
40 | __inline | 40 | __inline |
@@ -48,39 +48,39 @@ is_reserved_hash (register const char *str, register unsigned int len) | |||
48 | { | 48 | { |
49 | static const unsigned char asso_values[] = | 49 | static const unsigned char asso_values[] = |
50 | { | 50 | { |
51 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 51 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
52 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 52 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
53 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 53 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
54 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 54 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
55 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 55 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
56 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 56 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
57 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 5, | 57 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 0, |
58 | 65, 65, 65, 65, 65, 65, 35, 65, 65, 65, | 58 | 67, 67, 67, 67, 67, 67, 15, 67, 67, 67, |
59 | 0, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 59 | 0, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
60 | 65, 65, 65, 65, 65, 0, 65, 0, 65, 5, | 60 | 67, 67, 67, 67, 67, 0, 67, 0, 67, 5, |
61 | 20, 15, 10, 30, 65, 15, 65, 65, 20, 0, | 61 | 25, 20, 15, 30, 67, 15, 67, 67, 10, 0, |
62 | 10, 35, 20, 65, 10, 5, 0, 10, 5, 65, | 62 | 10, 40, 20, 67, 10, 5, 0, 10, 15, 67, |
63 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 63 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
64 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 64 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
65 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 65 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
66 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 66 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
67 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 67 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
68 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 68 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
69 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 69 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
70 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 70 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
71 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 71 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
72 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 72 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
73 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 73 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
74 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 74 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
75 | 65, 65, 65, 65, 65, 65, 65, 65, 65, 65, | 75 | 67, 67, 67, 67, 67, 67, 67, 67, 67, 67, |
76 | 65, 65, 65, 65, 65, 65 | 76 | 67, 67, 67, 67, 67, 67 |
77 | }; | 77 | }; |
78 | return len + asso_values[(unsigned char)str[2]] + asso_values[(unsigned char)str[0]] + asso_values[(unsigned char)str[len - 1]]; | 78 | return len + asso_values[(unsigned char)str[2]] + asso_values[(unsigned char)str[0]] + asso_values[(unsigned char)str[len - 1]]; |
79 | } | 79 | } |
80 | 80 | ||
81 | #ifdef __GNUC__ | 81 | #ifdef __GNUC__ |
82 | __inline | 82 | __inline |
83 | #ifdef __GNUC_STDC_INLINE__ | 83 | #if defined __GNUC_STDC_INLINE__ || defined __GNUC_GNU_INLINE__ |
84 | __attribute__ ((__gnu_inline__)) | 84 | __attribute__ ((__gnu_inline__)) |
85 | #endif | 85 | #endif |
86 | #endif | 86 | #endif |
@@ -89,116 +89,119 @@ is_reserved_word (register const char *str, register unsigned int len) | |||
89 | { | 89 | { |
90 | enum | 90 | enum |
91 | { | 91 | { |
92 | TOTAL_KEYWORDS = 43, | 92 | TOTAL_KEYWORDS = 45, |
93 | MIN_WORD_LENGTH = 3, | 93 | MIN_WORD_LENGTH = 3, |
94 | MAX_WORD_LENGTH = 24, | 94 | MAX_WORD_LENGTH = 24, |
95 | MIN_HASH_VALUE = 3, | 95 | MIN_HASH_VALUE = 3, |
96 | MAX_HASH_VALUE = 64 | 96 | MAX_HASH_VALUE = 66 |
97 | }; | 97 | }; |
98 | 98 | ||
99 | static const struct resword wordlist[] = | 99 | static const struct resword wordlist[] = |
100 | { | 100 | { |
101 | {""}, {""}, {""}, | 101 | {""}, {""}, {""}, |
102 | #line 28 "scripts/genksyms/keywords.gperf" | 102 | #line 30 "scripts/genksyms/keywords.gperf" |
103 | {"asm", ASM_KEYW}, | 103 | {"asm", ASM_KEYW}, |
104 | {""}, | 104 | {""}, |
105 | #line 10 "scripts/genksyms/keywords.gperf" | 105 | #line 12 "scripts/genksyms/keywords.gperf" |
106 | {"__asm", ASM_KEYW}, | 106 | {"__asm", ASM_KEYW}, |
107 | {""}, | 107 | {""}, |
108 | #line 11 "scripts/genksyms/keywords.gperf" | 108 | #line 13 "scripts/genksyms/keywords.gperf" |
109 | {"__asm__", ASM_KEYW}, | 109 | {"__asm__", ASM_KEYW}, |
110 | {""}, {""}, | 110 | {""}, {""}, |
111 | #line 54 "scripts/genksyms/keywords.gperf" | 111 | #line 56 "scripts/genksyms/keywords.gperf" |
112 | {"__typeof__", TYPEOF_KEYW}, | 112 | {"__typeof__", TYPEOF_KEYW}, |
113 | {""}, | 113 | {""}, |
114 | #line 14 "scripts/genksyms/keywords.gperf" | 114 | #line 16 "scripts/genksyms/keywords.gperf" |
115 | {"__const", CONST_KEYW}, | 115 | {"__const", CONST_KEYW}, |
116 | #line 13 "scripts/genksyms/keywords.gperf" | ||
117 | {"__attribute__", ATTRIBUTE_KEYW}, | ||
118 | #line 15 "scripts/genksyms/keywords.gperf" | 116 | #line 15 "scripts/genksyms/keywords.gperf" |
117 | {"__attribute__", ATTRIBUTE_KEYW}, | ||
118 | #line 17 "scripts/genksyms/keywords.gperf" | ||
119 | {"__const__", CONST_KEYW}, | 119 | {"__const__", CONST_KEYW}, |
120 | #line 20 "scripts/genksyms/keywords.gperf" | 120 | #line 22 "scripts/genksyms/keywords.gperf" |
121 | {"__signed__", SIGNED_KEYW}, | 121 | {"__signed__", SIGNED_KEYW}, |
122 | #line 46 "scripts/genksyms/keywords.gperf" | 122 | #line 48 "scripts/genksyms/keywords.gperf" |
123 | {"static", STATIC_KEYW}, | 123 | {"static", STATIC_KEYW}, |
124 | #line 22 "scripts/genksyms/keywords.gperf" | 124 | {""}, |
125 | {"__volatile__", VOLATILE_KEYW}, | 125 | #line 43 "scripts/genksyms/keywords.gperf" |
126 | #line 41 "scripts/genksyms/keywords.gperf" | ||
127 | {"int", INT_KEYW}, | 126 | {"int", INT_KEYW}, |
128 | #line 34 "scripts/genksyms/keywords.gperf" | 127 | #line 36 "scripts/genksyms/keywords.gperf" |
129 | {"char", CHAR_KEYW}, | 128 | {"char", CHAR_KEYW}, |
130 | #line 35 "scripts/genksyms/keywords.gperf" | 129 | #line 37 "scripts/genksyms/keywords.gperf" |
131 | {"const", CONST_KEYW}, | 130 | {"const", CONST_KEYW}, |
132 | #line 47 "scripts/genksyms/keywords.gperf" | 131 | #line 49 "scripts/genksyms/keywords.gperf" |
133 | {"struct", STRUCT_KEYW}, | 132 | {"struct", STRUCT_KEYW}, |
134 | #line 26 "scripts/genksyms/keywords.gperf" | 133 | #line 28 "scripts/genksyms/keywords.gperf" |
135 | {"__restrict__", RESTRICT_KEYW}, | 134 | {"__restrict__", RESTRICT_KEYW}, |
136 | #line 27 "scripts/genksyms/keywords.gperf" | 135 | #line 29 "scripts/genksyms/keywords.gperf" |
137 | {"restrict", RESTRICT_KEYW}, | 136 | {"restrict", RESTRICT_KEYW}, |
138 | #line 25 "scripts/genksyms/keywords.gperf" | 137 | #line 9 "scripts/genksyms/keywords.gperf" |
139 | {"_restrict", RESTRICT_KEYW}, | 138 | {"EXPORT_SYMBOL_GPL_FUTURE", EXPORT_SYMBOL_KEYW}, |
140 | #line 18 "scripts/genksyms/keywords.gperf" | 139 | #line 20 "scripts/genksyms/keywords.gperf" |
141 | {"__inline__", INLINE_KEYW}, | 140 | {"__inline__", INLINE_KEYW}, |
142 | #line 12 "scripts/genksyms/keywords.gperf" | ||
143 | {"__attribute", ATTRIBUTE_KEYW}, | ||
144 | {""}, | 141 | {""}, |
145 | #line 16 "scripts/genksyms/keywords.gperf" | 142 | #line 24 "scripts/genksyms/keywords.gperf" |
143 | {"__volatile__", VOLATILE_KEYW}, | ||
144 | #line 7 "scripts/genksyms/keywords.gperf" | ||
145 | {"EXPORT_SYMBOL", EXPORT_SYMBOL_KEYW}, | ||
146 | #line 27 "scripts/genksyms/keywords.gperf" | ||
147 | {"_restrict", RESTRICT_KEYW}, | ||
148 | {""}, | ||
149 | #line 14 "scripts/genksyms/keywords.gperf" | ||
150 | {"__attribute", ATTRIBUTE_KEYW}, | ||
151 | #line 8 "scripts/genksyms/keywords.gperf" | ||
152 | {"EXPORT_SYMBOL_GPL", EXPORT_SYMBOL_KEYW}, | ||
153 | #line 18 "scripts/genksyms/keywords.gperf" | ||
146 | {"__extension__", EXTENSION_KEYW}, | 154 | {"__extension__", EXTENSION_KEYW}, |
147 | #line 37 "scripts/genksyms/keywords.gperf" | 155 | #line 39 "scripts/genksyms/keywords.gperf" |
148 | {"enum", ENUM_KEYW}, | 156 | {"enum", ENUM_KEYW}, |
149 | #line 21 "scripts/genksyms/keywords.gperf" | 157 | #line 10 "scripts/genksyms/keywords.gperf" |
150 | {"__volatile", VOLATILE_KEYW}, | 158 | {"EXPORT_UNUSED_SYMBOL", EXPORT_SYMBOL_KEYW}, |
151 | #line 38 "scripts/genksyms/keywords.gperf" | 159 | #line 40 "scripts/genksyms/keywords.gperf" |
152 | {"extern", EXTERN_KEYW}, | 160 | {"extern", EXTERN_KEYW}, |
153 | {""}, | 161 | {""}, |
154 | #line 19 "scripts/genksyms/keywords.gperf" | 162 | #line 21 "scripts/genksyms/keywords.gperf" |
155 | {"__signed", SIGNED_KEYW}, | 163 | {"__signed", SIGNED_KEYW}, |
156 | #line 9 "scripts/genksyms/keywords.gperf" | 164 | #line 11 "scripts/genksyms/keywords.gperf" |
157 | {"EXPORT_SYMBOL_GPL_FUTURE", EXPORT_SYMBOL_KEYW}, | 165 | {"EXPORT_UNUSED_SYMBOL_GPL", EXPORT_SYMBOL_KEYW}, |
158 | {""}, | 166 | #line 51 "scripts/genksyms/keywords.gperf" |
159 | #line 53 "scripts/genksyms/keywords.gperf" | 167 | {"union", UNION_KEYW}, |
168 | #line 55 "scripts/genksyms/keywords.gperf" | ||
160 | {"typeof", TYPEOF_KEYW}, | 169 | {"typeof", TYPEOF_KEYW}, |
161 | #line 48 "scripts/genksyms/keywords.gperf" | 170 | #line 50 "scripts/genksyms/keywords.gperf" |
162 | {"typedef", TYPEDEF_KEYW}, | 171 | {"typedef", TYPEDEF_KEYW}, |
163 | #line 17 "scripts/genksyms/keywords.gperf" | 172 | #line 19 "scripts/genksyms/keywords.gperf" |
164 | {"__inline", INLINE_KEYW}, | 173 | {"__inline", INLINE_KEYW}, |
165 | #line 33 "scripts/genksyms/keywords.gperf" | 174 | #line 35 "scripts/genksyms/keywords.gperf" |
166 | {"auto", AUTO_KEYW}, | 175 | {"auto", AUTO_KEYW}, |
167 | #line 49 "scripts/genksyms/keywords.gperf" | 176 | #line 23 "scripts/genksyms/keywords.gperf" |
168 | {"union", UNION_KEYW}, | 177 | {"__volatile", VOLATILE_KEYW}, |
169 | {""}, {""}, | ||
170 | #line 50 "scripts/genksyms/keywords.gperf" | ||
171 | {"unsigned", UNSIGNED_KEYW}, | ||
172 | #line 51 "scripts/genksyms/keywords.gperf" | ||
173 | {"void", VOID_KEYW}, | ||
174 | #line 44 "scripts/genksyms/keywords.gperf" | ||
175 | {"short", SHORT_KEYW}, | ||
176 | {""}, {""}, | 178 | {""}, {""}, |
177 | #line 52 "scripts/genksyms/keywords.gperf" | 179 | #line 52 "scripts/genksyms/keywords.gperf" |
178 | {"volatile", VOLATILE_KEYW}, | 180 | {"unsigned", UNSIGNED_KEYW}, |
179 | {""}, | ||
180 | #line 39 "scripts/genksyms/keywords.gperf" | ||
181 | {"float", FLOAT_KEYW}, | ||
182 | #line 36 "scripts/genksyms/keywords.gperf" | ||
183 | {"double", DOUBLE_KEYW}, | ||
184 | {""}, | 181 | {""}, |
185 | #line 7 "scripts/genksyms/keywords.gperf" | 182 | #line 46 "scripts/genksyms/keywords.gperf" |
186 | {"EXPORT_SYMBOL", EXPORT_SYMBOL_KEYW}, | 183 | {"short", SHORT_KEYW}, |
187 | {""}, {""}, | 184 | #line 42 "scripts/genksyms/keywords.gperf" |
188 | #line 40 "scripts/genksyms/keywords.gperf" | ||
189 | {"inline", INLINE_KEYW}, | 185 | {"inline", INLINE_KEYW}, |
190 | #line 8 "scripts/genksyms/keywords.gperf" | ||
191 | {"EXPORT_SYMBOL_GPL", EXPORT_SYMBOL_KEYW}, | ||
192 | #line 43 "scripts/genksyms/keywords.gperf" | ||
193 | {"register", REGISTER_KEYW}, | ||
194 | {""}, | 186 | {""}, |
195 | #line 24 "scripts/genksyms/keywords.gperf" | 187 | #line 54 "scripts/genksyms/keywords.gperf" |
188 | {"volatile", VOLATILE_KEYW}, | ||
189 | #line 44 "scripts/genksyms/keywords.gperf" | ||
190 | {"long", LONG_KEYW}, | ||
191 | #line 26 "scripts/genksyms/keywords.gperf" | ||
196 | {"_Bool", BOOL_KEYW}, | 192 | {"_Bool", BOOL_KEYW}, |
197 | #line 45 "scripts/genksyms/keywords.gperf" | ||
198 | {"signed", SIGNED_KEYW}, | ||
199 | {""}, {""}, | 193 | {""}, {""}, |
200 | #line 42 "scripts/genksyms/keywords.gperf" | 194 | #line 45 "scripts/genksyms/keywords.gperf" |
201 | {"long", LONG_KEYW} | 195 | {"register", REGISTER_KEYW}, |
196 | #line 53 "scripts/genksyms/keywords.gperf" | ||
197 | {"void", VOID_KEYW}, | ||
198 | #line 41 "scripts/genksyms/keywords.gperf" | ||
199 | {"float", FLOAT_KEYW}, | ||
200 | #line 38 "scripts/genksyms/keywords.gperf" | ||
201 | {"double", DOUBLE_KEYW}, | ||
202 | {""}, {""}, {""}, {""}, | ||
203 | #line 47 "scripts/genksyms/keywords.gperf" | ||
204 | {"signed", SIGNED_KEYW} | ||
202 | }; | 205 | }; |
203 | 206 | ||
204 | if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH) | 207 | if (len <= MAX_WORD_LENGTH && len >= MIN_WORD_LENGTH) |
diff --git a/scripts/genksyms/keywords.gperf b/scripts/genksyms/keywords.gperf index 8fe977a4d57b..e6349acb6f2f 100644 --- a/scripts/genksyms/keywords.gperf +++ b/scripts/genksyms/keywords.gperf | |||
@@ -7,6 +7,8 @@ struct resword { const char *name; int token; } | |||
7 | EXPORT_SYMBOL, EXPORT_SYMBOL_KEYW | 7 | EXPORT_SYMBOL, EXPORT_SYMBOL_KEYW |
8 | EXPORT_SYMBOL_GPL, EXPORT_SYMBOL_KEYW | 8 | EXPORT_SYMBOL_GPL, EXPORT_SYMBOL_KEYW |
9 | EXPORT_SYMBOL_GPL_FUTURE, EXPORT_SYMBOL_KEYW | 9 | EXPORT_SYMBOL_GPL_FUTURE, EXPORT_SYMBOL_KEYW |
10 | EXPORT_UNUSED_SYMBOL, EXPORT_SYMBOL_KEYW | ||
11 | EXPORT_UNUSED_SYMBOL_GPL, EXPORT_SYMBOL_KEYW | ||
10 | __asm, ASM_KEYW | 12 | __asm, ASM_KEYW |
11 | __asm__, ASM_KEYW | 13 | __asm__, ASM_KEYW |
12 | __attribute, ATTRIBUTE_KEYW | 14 | __attribute, ATTRIBUTE_KEYW |
diff --git a/scripts/headers.sh b/scripts/headers.sh index 0308ecc10d5b..1ddcdd38d97f 100755 --- a/scripts/headers.sh +++ b/scripts/headers.sh | |||
@@ -8,8 +8,6 @@ do_command() | |||
8 | { | 8 | { |
9 | if [ -f ${srctree}/arch/$2/include/asm/Kbuild ]; then | 9 | if [ -f ${srctree}/arch/$2/include/asm/Kbuild ]; then |
10 | make ARCH=$2 KBUILD_HEADERS=$1 headers_$1 | 10 | make ARCH=$2 KBUILD_HEADERS=$1 headers_$1 |
11 | elif [ -f ${srctree}/include/asm-$2/Kbuild ]; then | ||
12 | make ARCH=$2 KBUILD_HEADERS=$1 headers_$1 | ||
13 | else | 11 | else |
14 | printf "Ignoring arch: %s\n" ${arch} | 12 | printf "Ignoring arch: %s\n" ${arch} |
15 | fi | 13 | fi |
diff --git a/scripts/kconfig/Makefile b/scripts/kconfig/Makefile index 80599e3a7994..999e8a7d5bf7 100644 --- a/scripts/kconfig/Makefile +++ b/scripts/kconfig/Makefile | |||
@@ -27,6 +27,7 @@ oldconfig: $(obj)/conf | |||
27 | $< -o $(Kconfig) | 27 | $< -o $(Kconfig) |
28 | 28 | ||
29 | silentoldconfig: $(obj)/conf | 29 | silentoldconfig: $(obj)/conf |
30 | $(Q)mkdir -p include/generated | ||
30 | $< -s $(Kconfig) | 31 | $< -s $(Kconfig) |
31 | 32 | ||
32 | localmodconfig: $(obj)/streamline_config.pl $(obj)/conf | 33 | localmodconfig: $(obj)/streamline_config.pl $(obj)/conf |
diff --git a/scripts/kconfig/confdata.c b/scripts/kconfig/confdata.c index b55e72ff2fc6..c4dec80cfd8e 100644 --- a/scripts/kconfig/confdata.c +++ b/scripts/kconfig/confdata.c | |||
@@ -677,7 +677,7 @@ int conf_write_autoconf(void) | |||
677 | struct symbol *sym; | 677 | struct symbol *sym; |
678 | const char *str; | 678 | const char *str; |
679 | const char *name; | 679 | const char *name; |
680 | FILE *out, *out_h; | 680 | FILE *out, *tristate, *out_h; |
681 | time_t now; | 681 | time_t now; |
682 | int i, l; | 682 | int i, l; |
683 | 683 | ||
@@ -692,9 +692,16 @@ int conf_write_autoconf(void) | |||
692 | if (!out) | 692 | if (!out) |
693 | return 1; | 693 | return 1; |
694 | 694 | ||
695 | tristate = fopen(".tmpconfig_tristate", "w"); | ||
696 | if (!tristate) { | ||
697 | fclose(out); | ||
698 | return 1; | ||
699 | } | ||
700 | |||
695 | out_h = fopen(".tmpconfig.h", "w"); | 701 | out_h = fopen(".tmpconfig.h", "w"); |
696 | if (!out_h) { | 702 | if (!out_h) { |
697 | fclose(out); | 703 | fclose(out); |
704 | fclose(tristate); | ||
698 | return 1; | 705 | return 1; |
699 | } | 706 | } |
700 | 707 | ||
@@ -707,6 +714,9 @@ int conf_write_autoconf(void) | |||
707 | "# %s" | 714 | "# %s" |
708 | "#\n", | 715 | "#\n", |
709 | sym_get_string_value(sym), ctime(&now)); | 716 | sym_get_string_value(sym), ctime(&now)); |
717 | fprintf(tristate, "#\n" | ||
718 | "# Automatically generated - do not edit\n" | ||
719 | "\n"); | ||
710 | fprintf(out_h, "/*\n" | 720 | fprintf(out_h, "/*\n" |
711 | " * Automatically generated C config: don't edit\n" | 721 | " * Automatically generated C config: don't edit\n" |
712 | " * Linux kernel version: %s\n" | 722 | " * Linux kernel version: %s\n" |
@@ -727,10 +737,14 @@ int conf_write_autoconf(void) | |||
727 | break; | 737 | break; |
728 | case mod: | 738 | case mod: |
729 | fprintf(out, "CONFIG_%s=m\n", sym->name); | 739 | fprintf(out, "CONFIG_%s=m\n", sym->name); |
740 | fprintf(tristate, "CONFIG_%s=M\n", sym->name); | ||
730 | fprintf(out_h, "#define CONFIG_%s_MODULE 1\n", sym->name); | 741 | fprintf(out_h, "#define CONFIG_%s_MODULE 1\n", sym->name); |
731 | break; | 742 | break; |
732 | case yes: | 743 | case yes: |
733 | fprintf(out, "CONFIG_%s=y\n", sym->name); | 744 | fprintf(out, "CONFIG_%s=y\n", sym->name); |
745 | if (sym->type == S_TRISTATE) | ||
746 | fprintf(tristate, "CONFIG_%s=Y\n", | ||
747 | sym->name); | ||
734 | fprintf(out_h, "#define CONFIG_%s 1\n", sym->name); | 748 | fprintf(out_h, "#define CONFIG_%s 1\n", sym->name); |
735 | break; | 749 | break; |
736 | } | 750 | } |
@@ -772,13 +786,19 @@ int conf_write_autoconf(void) | |||
772 | } | 786 | } |
773 | } | 787 | } |
774 | fclose(out); | 788 | fclose(out); |
789 | fclose(tristate); | ||
775 | fclose(out_h); | 790 | fclose(out_h); |
776 | 791 | ||
777 | name = getenv("KCONFIG_AUTOHEADER"); | 792 | name = getenv("KCONFIG_AUTOHEADER"); |
778 | if (!name) | 793 | if (!name) |
779 | name = "include/linux/autoconf.h"; | 794 | name = "include/generated/autoconf.h"; |
780 | if (rename(".tmpconfig.h", name)) | 795 | if (rename(".tmpconfig.h", name)) |
781 | return 1; | 796 | return 1; |
797 | name = getenv("KCONFIG_TRISTATE"); | ||
798 | if (!name) | ||
799 | name = "include/config/tristate.conf"; | ||
800 | if (rename(".tmpconfig_tristate", name)) | ||
801 | return 1; | ||
782 | name = conf_get_autoconfig_name(); | 802 | name = conf_get_autoconfig_name(); |
783 | /* | 803 | /* |
784 | * This must be the last step, kbuild has a dependency on auto.conf | 804 | * This must be the last step, kbuild has a dependency on auto.conf |
diff --git a/scripts/mkcompile_h b/scripts/mkcompile_h index bce3d0fe6fbd..23dbad80cce9 100755 --- a/scripts/mkcompile_h +++ b/scripts/mkcompile_h | |||
@@ -14,7 +14,7 @@ vecho() { [ "${quiet}" = "silent_" ] || echo "$@" ; } | |||
14 | # So "sudo make install" won't change the "compiled by <user>" | 14 | # So "sudo make install" won't change the "compiled by <user>" |
15 | # do "compiled by root" | 15 | # do "compiled by root" |
16 | 16 | ||
17 | if [ -r $TARGET -a ! -O include/linux/autoconf.h ]; then | 17 | if [ -r $TARGET -a ! -O include/generated/autoconf.h ]; then |
18 | vecho " SKIPPED $TARGET" | 18 | vecho " SKIPPED $TARGET" |
19 | exit 0 | 19 | exit 0 |
20 | fi | 20 | fi |
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c index 6c4ffc767b91..20923613467c 100644 --- a/scripts/mod/modpost.c +++ b/scripts/mod/modpost.c | |||
@@ -15,7 +15,7 @@ | |||
15 | #include <stdio.h> | 15 | #include <stdio.h> |
16 | #include <ctype.h> | 16 | #include <ctype.h> |
17 | #include "modpost.h" | 17 | #include "modpost.h" |
18 | #include "../../include/linux/autoconf.h" | 18 | #include "../../include/generated/autoconf.h" |
19 | #include "../../include/linux/license.h" | 19 | #include "../../include/linux/license.h" |
20 | 20 | ||
21 | /* Some toolchains use a `_' prefix for all user symbols. */ | 21 | /* Some toolchains use a `_' prefix for all user symbols. */ |
diff --git a/scripts/package/Makefile b/scripts/package/Makefile index f67cc885c807..62fcc3a7f4d3 100644 --- a/scripts/package/Makefile +++ b/scripts/package/Makefile | |||
@@ -77,9 +77,27 @@ clean-files += $(objtree)/binkernel.spec | |||
77 | 77 | ||
78 | # Deb target | 78 | # Deb target |
79 | # --------------------------------------------------------------------------- | 79 | # --------------------------------------------------------------------------- |
80 | quiet_cmd_builddeb = BUILDDEB | ||
81 | cmd_builddeb = set -e; \ | ||
82 | test `id -u` = 0 || \ | ||
83 | test -n "$(KBUILD_PKG_ROOTCMD)" || { \ | ||
84 | which fakeroot >/dev/null 2>&1 && \ | ||
85 | KBUILD_PKG_ROOTCMD="fakeroot -u"; \ | ||
86 | } || { \ | ||
87 | echo; \ | ||
88 | echo "builddeb must be run as root (or using fakeroot)."; \ | ||
89 | echo "KBUILD_PKG_ROOTCMD is unset and fakeroot not found."; \ | ||
90 | echo "Try setting KBUILD_PKG_ROOTCMD to a command to acquire"; \ | ||
91 | echo "root privileges (e.g., 'fakeroot -u' or 'sudo')."; \ | ||
92 | false; \ | ||
93 | } && \ | ||
94 | \ | ||
95 | $$KBUILD_PKG_ROOTCMD $(CONFIG_SHELL) \ | ||
96 | $(srctree)/scripts/package/builddeb | ||
97 | |||
80 | deb-pkg: FORCE | 98 | deb-pkg: FORCE |
81 | $(MAKE) KBUILD_SRC= | 99 | $(MAKE) KBUILD_SRC= |
82 | $(CONFIG_SHELL) $(srctree)/scripts/package/builddeb | 100 | $(call cmd,builddeb) |
83 | 101 | ||
84 | clean-dirs += $(objtree)/debian/ | 102 | clean-dirs += $(objtree)/debian/ |
85 | 103 | ||
diff --git a/scripts/package/buildtar b/scripts/package/buildtar index b1fd48db1640..51b2aa0acb82 100644 --- a/scripts/package/buildtar +++ b/scripts/package/buildtar | |||
@@ -101,7 +101,11 @@ esac | |||
101 | # | 101 | # |
102 | ( | 102 | ( |
103 | cd "${tmpdir}" | 103 | cd "${tmpdir}" |
104 | tar cf - . | ${compress} > "${tarball}${file_ext}" | 104 | opts= |
105 | if tar --owner=root --group=root --help >/dev/null 2>&1; then | ||
106 | opts="--owner=root --group=root" | ||
107 | fi | ||
108 | tar cf - . $opts | ${compress} > "${tarball}${file_ext}" | ||
105 | ) | 109 | ) |
106 | 110 | ||
107 | echo "Tarball successfully created in ${tarball}${file_ext}" | 111 | echo "Tarball successfully created in ${tarball}${file_ext}" |
diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl index 9cf0a6fad6ba..92f09fe9639e 100755 --- a/scripts/recordmcount.pl +++ b/scripts/recordmcount.pl | |||
@@ -113,13 +113,13 @@ $P =~ s@.*/@@g; | |||
113 | 113 | ||
114 | my $V = '0.1'; | 114 | my $V = '0.1'; |
115 | 115 | ||
116 | if ($#ARGV != 10) { | 116 | if ($#ARGV != 11) { |
117 | print "usage: $P arch bits objdump objcopy cc ld nm rm mv is_module inputfile\n"; | 117 | print "usage: $P arch endian bits objdump objcopy cc ld nm rm mv is_module inputfile\n"; |
118 | print "version: $V\n"; | 118 | print "version: $V\n"; |
119 | exit(1); | 119 | exit(1); |
120 | } | 120 | } |
121 | 121 | ||
122 | my ($arch, $bits, $objdump, $objcopy, $cc, | 122 | my ($arch, $endian, $bits, $objdump, $objcopy, $cc, |
123 | $ld, $nm, $rm, $mv, $is_module, $inputfile) = @ARGV; | 123 | $ld, $nm, $rm, $mv, $is_module, $inputfile) = @ARGV; |
124 | 124 | ||
125 | # This file refers to mcount and shouldn't be ftraced, so lets' ignore it | 125 | # This file refers to mcount and shouldn't be ftraced, so lets' ignore it |
@@ -295,6 +295,58 @@ if ($arch eq "x86_64") { | |||
295 | $ld .= " -m elf64_sparc"; | 295 | $ld .= " -m elf64_sparc"; |
296 | $cc .= " -m64"; | 296 | $cc .= " -m64"; |
297 | $objcopy .= " -O elf64-sparc"; | 297 | $objcopy .= " -O elf64-sparc"; |
298 | } elsif ($arch eq "mips") { | ||
299 | # To enable module support, we need to enable the -mlong-calls option | ||
300 | # of gcc for module, after using this option, we can not get the real | ||
301 | # offset of the calling to _mcount, but the offset of the lui | ||
302 | # instruction or the addiu one. herein, we record the address of the | ||
303 | # first one, and then we can replace this instruction by a branch | ||
304 | # instruction to jump over the profiling function to filter the | ||
305 | # indicated functions, or swith back to the lui instruction to trace | ||
306 | # them, which means dynamic tracing. | ||
307 | # | ||
308 | # c: 3c030000 lui v1,0x0 | ||
309 | # c: R_MIPS_HI16 _mcount | ||
310 | # c: R_MIPS_NONE *ABS* | ||
311 | # c: R_MIPS_NONE *ABS* | ||
312 | # 10: 64630000 daddiu v1,v1,0 | ||
313 | # 10: R_MIPS_LO16 _mcount | ||
314 | # 10: R_MIPS_NONE *ABS* | ||
315 | # 10: R_MIPS_NONE *ABS* | ||
316 | # 14: 03e0082d move at,ra | ||
317 | # 18: 0060f809 jalr v1 | ||
318 | # | ||
319 | # for the kernel: | ||
320 | # | ||
321 | # 10: 03e0082d move at,ra | ||
322 | # 14: 0c000000 jal 0 <loongson_halt> | ||
323 | # 14: R_MIPS_26 _mcount | ||
324 | # 14: R_MIPS_NONE *ABS* | ||
325 | # 14: R_MIPS_NONE *ABS* | ||
326 | # 18: 00020021 nop | ||
327 | if ($is_module eq "0") { | ||
328 | $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s_mcount\$"; | ||
329 | } else { | ||
330 | $mcount_regex = "^\\s*([0-9a-fA-F]+): R_MIPS_HI16\\s+_mcount\$"; | ||
331 | } | ||
332 | $objdump .= " -Melf-trad".$endian."mips "; | ||
333 | |||
334 | if ($endian eq "big") { | ||
335 | $endian = " -EB "; | ||
336 | $ld .= " -melf".$bits."btsmip"; | ||
337 | } else { | ||
338 | $endian = " -EL "; | ||
339 | $ld .= " -melf".$bits."ltsmip"; | ||
340 | } | ||
341 | |||
342 | $cc .= " -mno-abicalls -fno-pic -mabi=" . $bits . $endian; | ||
343 | $ld .= $endian; | ||
344 | |||
345 | if ($bits == 64) { | ||
346 | $function_regex = | ||
347 | "^([0-9a-fA-F]+)\\s+<(.|[^\$]L.*?|\$[^L].*?|[^\$][^L].*?)>:"; | ||
348 | $type = ".dword"; | ||
349 | } | ||
298 | } elsif ($arch eq "microblaze") { | 350 | } elsif ($arch eq "microblaze") { |
299 | # Microblaze calls '_mcount' instead of plain 'mcount'. | 351 | # Microblaze calls '_mcount' instead of plain 'mcount'. |
300 | $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s_mcount\$"; | 352 | $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s_mcount\$"; |
diff --git a/scripts/tags.sh b/scripts/tags.sh index d52f7a01557c..1a0c44d7c4a7 100755 --- a/scripts/tags.sh +++ b/scripts/tags.sh | |||
@@ -89,7 +89,13 @@ all_defconfigs() | |||
89 | 89 | ||
90 | docscope() | 90 | docscope() |
91 | { | 91 | { |
92 | (echo \-k; echo \-q; all_sources) > cscope.files | 92 | # always use absolute paths for cscope, as recommended by cscope |
93 | # upstream | ||
94 | case "$tree" in | ||
95 | /*) ;; | ||
96 | *) tree=$PWD/$tree ;; | ||
97 | esac | ||
98 | (cd /; echo \-k; echo \-q; all_sources) > cscope.files | ||
93 | cscope -b -f cscope.out | 99 | cscope -b -f cscope.out |
94 | } | 100 | } |
95 | 101 | ||
diff --git a/scripts/unifdef.c b/scripts/unifdef.c index 30d459fb0709..44d39785e50d 100644 --- a/scripts/unifdef.c +++ b/scripts/unifdef.c | |||
@@ -1,13 +1,5 @@ | |||
1 | /* | 1 | /* |
2 | * Copyright (c) 2002 - 2005 Tony Finch <dot@dotat.at>. All rights reserved. | 2 | * Copyright (c) 2002 - 2009 Tony Finch <dot@dotat.at> |
3 | * | ||
4 | * This code is derived from software contributed to Berkeley by Dave Yost. | ||
5 | * It was rewritten to support ANSI C by Tony Finch. The original version of | ||
6 | * unifdef carried the following copyright notice. None of its code remains | ||
7 | * in this version (though some of the names remain). | ||
8 | * | ||
9 | * Copyright (c) 1985, 1993 | ||
10 | * The Regents of the University of California. All rights reserved. | ||
11 | * | 3 | * |
12 | * Redistribution and use in source and binary forms, with or without | 4 | * Redistribution and use in source and binary forms, with or without |
13 | * modification, are permitted provided that the following conditions | 5 | * modification, are permitted provided that the following conditions |
@@ -31,23 +23,20 @@ | |||
31 | * SUCH DAMAGE. | 23 | * SUCH DAMAGE. |
32 | */ | 24 | */ |
33 | 25 | ||
34 | #include <sys/cdefs.h> | 26 | /* |
27 | * This code was derived from software contributed to Berkeley by Dave Yost. | ||
28 | * It was rewritten to support ANSI C by Tony Finch. The original version | ||
29 | * of unifdef carried the 4-clause BSD copyright licence. None of its code | ||
30 | * remains in this version (though some of the names remain) so it now | ||
31 | * carries a more liberal licence. | ||
32 | * | ||
33 | * The latest version is available from http://dotat.at/prog/unifdef | ||
34 | */ | ||
35 | 35 | ||
36 | #ifndef lint | 36 | static const char * const copyright[] = { |
37 | #if 0 | 37 | "@(#) Copyright (c) 2002 - 2009 Tony Finch <dot@dotat.at>\n", |
38 | static const char copyright[] = | 38 | "$dotat: unifdef/unifdef.c,v 1.190 2009/11/27 17:21:26 fanf2 Exp $", |
39 | "@(#) Copyright (c) 1985, 1993\n\ | 39 | }; |
40 | The Regents of the University of California. All rights reserved.\n"; | ||
41 | #endif | ||
42 | #ifdef __IDSTRING | ||
43 | __IDSTRING(Berkeley, "@(#)unifdef.c 8.1 (Berkeley) 6/6/93"); | ||
44 | __IDSTRING(NetBSD, "$NetBSD: unifdef.c,v 1.8 2000/07/03 02:51:36 matt Exp $"); | ||
45 | __IDSTRING(dotat, "$dotat: things/unifdef.c,v 1.171 2005/03/08 12:38:48 fanf2 Exp $"); | ||
46 | #endif | ||
47 | #endif /* not lint */ | ||
48 | #ifdef __FBSDID | ||
49 | __FBSDID("$FreeBSD: /repoman/r/ncvs/src/usr.bin/unifdef/unifdef.c,v 1.20 2005/05/21 09:55:09 ru Exp $"); | ||
50 | #endif | ||
51 | 40 | ||
52 | /* | 41 | /* |
53 | * unifdef - remove ifdef'ed lines | 42 | * unifdef - remove ifdef'ed lines |
@@ -72,8 +61,6 @@ __FBSDID("$FreeBSD: /repoman/r/ncvs/src/usr.bin/unifdef/unifdef.c,v 1.20 2005/05 | |||
72 | #include <string.h> | 61 | #include <string.h> |
73 | #include <unistd.h> | 62 | #include <unistd.h> |
74 | 63 | ||
75 | size_t strlcpy(char *dst, const char *src, size_t siz); | ||
76 | |||
77 | /* types of input lines: */ | 64 | /* types of input lines: */ |
78 | typedef enum { | 65 | typedef enum { |
79 | LT_TRUEI, /* a true #if with ignore flag */ | 66 | LT_TRUEI, /* a true #if with ignore flag */ |
@@ -90,6 +77,7 @@ typedef enum { | |||
90 | LT_DODGY_LAST = LT_DODGY + LT_ENDIF, | 77 | LT_DODGY_LAST = LT_DODGY + LT_ENDIF, |
91 | LT_PLAIN, /* ordinary line */ | 78 | LT_PLAIN, /* ordinary line */ |
92 | LT_EOF, /* end of file */ | 79 | LT_EOF, /* end of file */ |
80 | LT_ERROR, /* unevaluable #if */ | ||
93 | LT_COUNT | 81 | LT_COUNT |
94 | } Linetype; | 82 | } Linetype; |
95 | 83 | ||
@@ -100,7 +88,7 @@ static char const * const linetype_name[] = { | |||
100 | "DODGY IF", "DODGY TRUE", "DODGY FALSE", | 88 | "DODGY IF", "DODGY TRUE", "DODGY FALSE", |
101 | "DODGY ELIF", "DODGY ELTRUE", "DODGY ELFALSE", | 89 | "DODGY ELIF", "DODGY ELTRUE", "DODGY ELFALSE", |
102 | "DODGY ELSE", "DODGY ENDIF", | 90 | "DODGY ELSE", "DODGY ENDIF", |
103 | "PLAIN", "EOF" | 91 | "PLAIN", "EOF", "ERROR" |
104 | }; | 92 | }; |
105 | 93 | ||
106 | /* state of #if processing */ | 94 | /* state of #if processing */ |
@@ -168,11 +156,13 @@ static char const * const linestate_name[] = { | |||
168 | * Globals. | 156 | * Globals. |
169 | */ | 157 | */ |
170 | 158 | ||
159 | static bool compblank; /* -B: compress blank lines */ | ||
160 | static bool lnblank; /* -b: blank deleted lines */ | ||
171 | static bool complement; /* -c: do the complement */ | 161 | static bool complement; /* -c: do the complement */ |
172 | static bool debugging; /* -d: debugging reports */ | 162 | static bool debugging; /* -d: debugging reports */ |
173 | static bool iocccok; /* -e: fewer IOCCC errors */ | 163 | static bool iocccok; /* -e: fewer IOCCC errors */ |
164 | static bool strictlogic; /* -K: keep ambiguous #ifs */ | ||
174 | static bool killconsts; /* -k: eval constant #ifs */ | 165 | static bool killconsts; /* -k: eval constant #ifs */ |
175 | static bool lnblank; /* -l: blank deleted lines */ | ||
176 | static bool lnnum; /* -n: add #line directives */ | 166 | static bool lnnum; /* -n: add #line directives */ |
177 | static bool symlist; /* -s: output symbol list */ | 167 | static bool symlist; /* -s: output symbol list */ |
178 | static bool text; /* -t: this is a text file */ | 168 | static bool text; /* -t: this is a text file */ |
@@ -196,7 +186,9 @@ static bool ignoring[MAXDEPTH]; /* ignore comments state */ | |||
196 | static int stifline[MAXDEPTH]; /* start of current #if */ | 186 | static int stifline[MAXDEPTH]; /* start of current #if */ |
197 | static int depth; /* current #if nesting */ | 187 | static int depth; /* current #if nesting */ |
198 | static int delcount; /* count of deleted lines */ | 188 | static int delcount; /* count of deleted lines */ |
199 | static bool keepthis; /* don't delete constant #if */ | 189 | static unsigned blankcount; /* count of blank lines */ |
190 | static unsigned blankmax; /* maximum recent blankcount */ | ||
191 | static bool constexpr; /* constant #if expression */ | ||
200 | 192 | ||
201 | static int exitstat; /* program exit status */ | 193 | static int exitstat; /* program exit status */ |
202 | 194 | ||
@@ -206,13 +198,14 @@ static void done(void); | |||
206 | static void error(const char *); | 198 | static void error(const char *); |
207 | static int findsym(const char *); | 199 | static int findsym(const char *); |
208 | static void flushline(bool); | 200 | static void flushline(bool); |
209 | static Linetype get_line(void); | 201 | static Linetype parseline(void); |
210 | static Linetype ifeval(const char **); | 202 | static Linetype ifeval(const char **); |
211 | static void ignoreoff(void); | 203 | static void ignoreoff(void); |
212 | static void ignoreon(void); | 204 | static void ignoreon(void); |
213 | static void keywordedit(const char *); | 205 | static void keywordedit(const char *); |
214 | static void nest(void); | 206 | static void nest(void); |
215 | static void process(void); | 207 | static void process(void); |
208 | static const char *skipargs(const char *); | ||
216 | static const char *skipcomment(const char *); | 209 | static const char *skipcomment(const char *); |
217 | static const char *skipsym(const char *); | 210 | static const char *skipsym(const char *); |
218 | static void state(Ifstate); | 211 | static void state(Ifstate); |
@@ -220,7 +213,7 @@ static int strlcmp(const char *, const char *, size_t); | |||
220 | static void unnest(void); | 213 | static void unnest(void); |
221 | static void usage(void); | 214 | static void usage(void); |
222 | 215 | ||
223 | #define endsym(c) (!isalpha((unsigned char)c) && !isdigit((unsigned char)c) && c != '_') | 216 | #define endsym(c) (!isalnum((unsigned char)c) && c != '_') |
224 | 217 | ||
225 | /* | 218 | /* |
226 | * The main program. | 219 | * The main program. |
@@ -230,7 +223,7 @@ main(int argc, char *argv[]) | |||
230 | { | 223 | { |
231 | int opt; | 224 | int opt; |
232 | 225 | ||
233 | while ((opt = getopt(argc, argv, "i:D:U:I:cdeklnst")) != -1) | 226 | while ((opt = getopt(argc, argv, "i:D:U:I:BbcdeKklnst")) != -1) |
234 | switch (opt) { | 227 | switch (opt) { |
235 | case 'i': /* treat stuff controlled by these symbols as text */ | 228 | case 'i': /* treat stuff controlled by these symbols as text */ |
236 | /* | 229 | /* |
@@ -255,6 +248,13 @@ main(int argc, char *argv[]) | |||
255 | case 'I': | 248 | case 'I': |
256 | /* no-op for compatibility with cpp */ | 249 | /* no-op for compatibility with cpp */ |
257 | break; | 250 | break; |
251 | case 'B': /* compress blank lines around removed section */ | ||
252 | compblank = true; | ||
253 | break; | ||
254 | case 'b': /* blank deleted lines instead of omitting them */ | ||
255 | case 'l': /* backwards compatibility */ | ||
256 | lnblank = true; | ||
257 | break; | ||
258 | case 'c': /* treat -D as -U and vice versa */ | 258 | case 'c': /* treat -D as -U and vice versa */ |
259 | complement = true; | 259 | complement = true; |
260 | break; | 260 | break; |
@@ -264,12 +264,12 @@ main(int argc, char *argv[]) | |||
264 | case 'e': /* fewer errors from dodgy lines */ | 264 | case 'e': /* fewer errors from dodgy lines */ |
265 | iocccok = true; | 265 | iocccok = true; |
266 | break; | 266 | break; |
267 | case 'K': /* keep ambiguous #ifs */ | ||
268 | strictlogic = true; | ||
269 | break; | ||
267 | case 'k': /* process constant #ifs */ | 270 | case 'k': /* process constant #ifs */ |
268 | killconsts = true; | 271 | killconsts = true; |
269 | break; | 272 | break; |
270 | case 'l': /* blank deleted lines instead of omitting them */ | ||
271 | lnblank = true; | ||
272 | break; | ||
273 | case 'n': /* add #line directive after deleted lines */ | 273 | case 'n': /* add #line directive after deleted lines */ |
274 | lnnum = true; | 274 | lnnum = true; |
275 | break; | 275 | break; |
@@ -284,6 +284,8 @@ main(int argc, char *argv[]) | |||
284 | } | 284 | } |
285 | argc -= optind; | 285 | argc -= optind; |
286 | argv += optind; | 286 | argv += optind; |
287 | if (compblank && lnblank) | ||
288 | errx(2, "-B and -b are mutually exclusive"); | ||
287 | if (argc > 1) { | 289 | if (argc > 1) { |
288 | errx(2, "can only do one file"); | 290 | errx(2, "can only do one file"); |
289 | } else if (argc == 1 && strcmp(*argv, "-") != 0) { | 291 | } else if (argc == 1 && strcmp(*argv, "-") != 0) { |
@@ -302,7 +304,7 @@ main(int argc, char *argv[]) | |||
302 | static void | 304 | static void |
303 | usage(void) | 305 | usage(void) |
304 | { | 306 | { |
305 | fprintf(stderr, "usage: unifdef [-cdeklnst] [-Ipath]" | 307 | fprintf(stderr, "usage: unifdef [-BbcdeKknst] [-Ipath]" |
306 | " [-Dsym[=val]] [-Usym] [-iDsym[=val]] [-iUsym] ... [file]\n"); | 308 | " [-Dsym[=val]] [-Usym] [-iDsym[=val]] [-iUsym] ... [file]\n"); |
307 | exit(2); | 309 | exit(2); |
308 | } | 310 | } |
@@ -383,46 +385,46 @@ static state_fn * const trans_table[IS_COUNT][LT_COUNT] = { | |||
383 | /* IS_OUTSIDE */ | 385 | /* IS_OUTSIDE */ |
384 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Eelif, Eelif, Eelif, Eelse, Eendif, | 386 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Eelif, Eelif, Eelif, Eelse, Eendif, |
385 | Oiffy, Oiffy, Fpass, Oif, Oif, Eelif, Eelif, Eelif, Eelse, Eendif, | 387 | Oiffy, Oiffy, Fpass, Oif, Oif, Eelif, Eelif, Eelif, Eelse, Eendif, |
386 | print, done }, | 388 | print, done, abort }, |
387 | /* IS_FALSE_PREFIX */ | 389 | /* IS_FALSE_PREFIX */ |
388 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Mpass, Strue, Sfalse,Selse, Dendif, | 390 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Mpass, Strue, Sfalse,Selse, Dendif, |
389 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Mpass, Eioccc,Eioccc,Eioccc,Eioccc, | 391 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Mpass, Eioccc,Eioccc,Eioccc,Eioccc, |
390 | drop, Eeof }, | 392 | drop, Eeof, abort }, |
391 | /* IS_TRUE_PREFIX */ | 393 | /* IS_TRUE_PREFIX */ |
392 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Dfalse,Dfalse,Dfalse,Delse, Dendif, | 394 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Dfalse,Dfalse,Dfalse,Delse, Dendif, |
393 | Oiffy, Oiffy, Fpass, Oif, Oif, Eioccc,Eioccc,Eioccc,Eioccc,Eioccc, | 395 | Oiffy, Oiffy, Fpass, Oif, Oif, Eioccc,Eioccc,Eioccc,Eioccc,Eioccc, |
394 | print, Eeof }, | 396 | print, Eeof, abort }, |
395 | /* IS_PASS_MIDDLE */ | 397 | /* IS_PASS_MIDDLE */ |
396 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Pelif, Mtrue, Delif, Pelse, Pendif, | 398 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Pelif, Mtrue, Delif, Pelse, Pendif, |
397 | Oiffy, Oiffy, Fpass, Oif, Oif, Pelif, Oelif, Oelif, Pelse, Pendif, | 399 | Oiffy, Oiffy, Fpass, Oif, Oif, Pelif, Oelif, Oelif, Pelse, Pendif, |
398 | print, Eeof }, | 400 | print, Eeof, abort }, |
399 | /* IS_FALSE_MIDDLE */ | 401 | /* IS_FALSE_MIDDLE */ |
400 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Pelif, Mtrue, Delif, Pelse, Pendif, | 402 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Pelif, Mtrue, Delif, Pelse, Pendif, |
401 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Eioccc,Eioccc,Eioccc,Eioccc,Eioccc, | 403 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Eioccc,Eioccc,Eioccc,Eioccc,Eioccc, |
402 | drop, Eeof }, | 404 | drop, Eeof, abort }, |
403 | /* IS_TRUE_MIDDLE */ | 405 | /* IS_TRUE_MIDDLE */ |
404 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Melif, Melif, Melif, Melse, Pendif, | 406 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Melif, Melif, Melif, Melse, Pendif, |
405 | Oiffy, Oiffy, Fpass, Oif, Oif, Eioccc,Eioccc,Eioccc,Eioccc,Pendif, | 407 | Oiffy, Oiffy, Fpass, Oif, Oif, Eioccc,Eioccc,Eioccc,Eioccc,Pendif, |
406 | print, Eeof }, | 408 | print, Eeof, abort }, |
407 | /* IS_PASS_ELSE */ | 409 | /* IS_PASS_ELSE */ |
408 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Eelif, Eelif, Eelif, Eelse, Pendif, | 410 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Eelif, Eelif, Eelif, Eelse, Pendif, |
409 | Oiffy, Oiffy, Fpass, Oif, Oif, Eelif, Eelif, Eelif, Eelse, Pendif, | 411 | Oiffy, Oiffy, Fpass, Oif, Oif, Eelif, Eelif, Eelif, Eelse, Pendif, |
410 | print, Eeof }, | 412 | print, Eeof, abort }, |
411 | /* IS_FALSE_ELSE */ | 413 | /* IS_FALSE_ELSE */ |
412 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Eelif, Eelif, Eelif, Eelse, Dendif, | 414 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Eelif, Eelif, Eelif, Eelse, Dendif, |
413 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Eelif, Eelif, Eelif, Eelse, Eioccc, | 415 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Eelif, Eelif, Eelif, Eelse, Eioccc, |
414 | drop, Eeof }, | 416 | drop, Eeof, abort }, |
415 | /* IS_TRUE_ELSE */ | 417 | /* IS_TRUE_ELSE */ |
416 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Eelif, Eelif, Eelif, Eelse, Dendif, | 418 | { Itrue, Ifalse,Fpass, Ftrue, Ffalse,Eelif, Eelif, Eelif, Eelse, Dendif, |
417 | Oiffy, Oiffy, Fpass, Oif, Oif, Eelif, Eelif, Eelif, Eelse, Eioccc, | 419 | Oiffy, Oiffy, Fpass, Oif, Oif, Eelif, Eelif, Eelif, Eelse, Eioccc, |
418 | print, Eeof }, | 420 | print, Eeof, abort }, |
419 | /* IS_FALSE_TRAILER */ | 421 | /* IS_FALSE_TRAILER */ |
420 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Dfalse,Dfalse,Dfalse,Delse, Dendif, | 422 | { Idrop, Idrop, Fdrop, Fdrop, Fdrop, Dfalse,Dfalse,Dfalse,Delse, Dendif, |
421 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Dfalse,Dfalse,Dfalse,Delse, Eioccc, | 423 | Idrop, Idrop, Fdrop, Fdrop, Fdrop, Dfalse,Dfalse,Dfalse,Delse, Eioccc, |
422 | drop, Eeof } | 424 | drop, Eeof, abort } |
423 | /*TRUEI FALSEI IF TRUE FALSE ELIF ELTRUE ELFALSE ELSE ENDIF | 425 | /*TRUEI FALSEI IF TRUE FALSE ELIF ELTRUE ELFALSE ELSE ENDIF |
424 | TRUEI FALSEI IF TRUE FALSE ELIF ELTRUE ELFALSE ELSE ENDIF (DODGY) | 426 | TRUEI FALSEI IF TRUE FALSE ELIF ELTRUE ELFALSE ELSE ENDIF (DODGY) |
425 | PLAIN EOF */ | 427 | PLAIN EOF ERROR */ |
426 | }; | 428 | }; |
427 | 429 | ||
428 | /* | 430 | /* |
@@ -463,9 +465,11 @@ keywordedit(const char *replacement) | |||
463 | static void | 465 | static void |
464 | nest(void) | 466 | nest(void) |
465 | { | 467 | { |
466 | depth += 1; | 468 | if (depth > MAXDEPTH-1) |
467 | if (depth >= MAXDEPTH) | 469 | abort(); /* bug */ |
470 | if (depth == MAXDEPTH-1) | ||
468 | error("Too many levels of nesting"); | 471 | error("Too many levels of nesting"); |
472 | depth += 1; | ||
469 | stifline[depth] = linenum; | 473 | stifline[depth] = linenum; |
470 | } | 474 | } |
471 | static void | 475 | static void |
@@ -490,15 +494,23 @@ flushline(bool keep) | |||
490 | if (symlist) | 494 | if (symlist) |
491 | return; | 495 | return; |
492 | if (keep ^ complement) { | 496 | if (keep ^ complement) { |
493 | if (lnnum && delcount > 0) | 497 | bool blankline = tline[strspn(tline, " \t\n")] == '\0'; |
494 | printf("#line %d\n", linenum); | 498 | if (blankline && compblank && blankcount != blankmax) { |
495 | fputs(tline, stdout); | 499 | delcount += 1; |
496 | delcount = 0; | 500 | blankcount += 1; |
501 | } else { | ||
502 | if (lnnum && delcount > 0) | ||
503 | printf("#line %d\n", linenum); | ||
504 | fputs(tline, stdout); | ||
505 | delcount = 0; | ||
506 | blankmax = blankcount = blankline ? blankcount + 1 : 0; | ||
507 | } | ||
497 | } else { | 508 | } else { |
498 | if (lnblank) | 509 | if (lnblank) |
499 | putc('\n', stdout); | 510 | putc('\n', stdout); |
500 | exitstat = 1; | 511 | exitstat = 1; |
501 | delcount += 1; | 512 | delcount += 1; |
513 | blankcount = 0; | ||
502 | } | 514 | } |
503 | } | 515 | } |
504 | 516 | ||
@@ -510,9 +522,12 @@ process(void) | |||
510 | { | 522 | { |
511 | Linetype lineval; | 523 | Linetype lineval; |
512 | 524 | ||
525 | /* When compressing blank lines, act as if the file | ||
526 | is preceded by a large number of blank lines. */ | ||
527 | blankmax = blankcount = 1000; | ||
513 | for (;;) { | 528 | for (;;) { |
514 | linenum++; | 529 | linenum++; |
515 | lineval = get_line(); | 530 | lineval = parseline(); |
516 | trans_table[ifstate[depth]][lineval](); | 531 | trans_table[ifstate[depth]][lineval](); |
517 | debug("process %s -> %s depth %d", | 532 | debug("process %s -> %s depth %d", |
518 | linetype_name[lineval], | 533 | linetype_name[lineval], |
@@ -526,7 +541,7 @@ process(void) | |||
526 | * help from skipcomment(). | 541 | * help from skipcomment(). |
527 | */ | 542 | */ |
528 | static Linetype | 543 | static Linetype |
529 | get_line(void) | 544 | parseline(void) |
530 | { | 545 | { |
531 | const char *cp; | 546 | const char *cp; |
532 | int cursym; | 547 | int cursym; |
@@ -595,9 +610,21 @@ get_line(void) | |||
595 | if (incomment) | 610 | if (incomment) |
596 | linestate = LS_DIRTY; | 611 | linestate = LS_DIRTY; |
597 | } | 612 | } |
598 | /* skipcomment should have changed the state */ | 613 | /* skipcomment normally changes the state, except |
599 | if (linestate == LS_HASH) | 614 | if the last line of the file lacks a newline, or |
600 | abort(); /* bug */ | 615 | if there is too much whitespace in a directive */ |
616 | if (linestate == LS_HASH) { | ||
617 | size_t len = cp - tline; | ||
618 | if (fgets(tline + len, MAXLINE - len, input) == NULL) { | ||
619 | /* append the missing newline */ | ||
620 | tline[len+0] = '\n'; | ||
621 | tline[len+1] = '\0'; | ||
622 | cp++; | ||
623 | linestate = LS_START; | ||
624 | } else { | ||
625 | linestate = LS_DIRTY; | ||
626 | } | ||
627 | } | ||
601 | } | 628 | } |
602 | if (linestate == LS_DIRTY) { | 629 | if (linestate == LS_DIRTY) { |
603 | while (*cp != '\0') | 630 | while (*cp != '\0') |
@@ -610,17 +637,40 @@ get_line(void) | |||
610 | 637 | ||
611 | /* | 638 | /* |
612 | * These are the binary operators that are supported by the expression | 639 | * These are the binary operators that are supported by the expression |
613 | * evaluator. Note that if support for division is added then we also | 640 | * evaluator. |
614 | * need short-circuiting booleans because of divide-by-zero. | ||
615 | */ | 641 | */ |
616 | static int op_lt(int a, int b) { return (a < b); } | 642 | static Linetype op_strict(int *p, int v, Linetype at, Linetype bt) { |
617 | static int op_gt(int a, int b) { return (a > b); } | 643 | if(at == LT_IF || bt == LT_IF) return (LT_IF); |
618 | static int op_le(int a, int b) { return (a <= b); } | 644 | return (*p = v, v ? LT_TRUE : LT_FALSE); |
619 | static int op_ge(int a, int b) { return (a >= b); } | 645 | } |
620 | static int op_eq(int a, int b) { return (a == b); } | 646 | static Linetype op_lt(int *p, Linetype at, int a, Linetype bt, int b) { |
621 | static int op_ne(int a, int b) { return (a != b); } | 647 | return op_strict(p, a < b, at, bt); |
622 | static int op_or(int a, int b) { return (a || b); } | 648 | } |
623 | static int op_and(int a, int b) { return (a && b); } | 649 | static Linetype op_gt(int *p, Linetype at, int a, Linetype bt, int b) { |
650 | return op_strict(p, a > b, at, bt); | ||
651 | } | ||
652 | static Linetype op_le(int *p, Linetype at, int a, Linetype bt, int b) { | ||
653 | return op_strict(p, a <= b, at, bt); | ||
654 | } | ||
655 | static Linetype op_ge(int *p, Linetype at, int a, Linetype bt, int b) { | ||
656 | return op_strict(p, a >= b, at, bt); | ||
657 | } | ||
658 | static Linetype op_eq(int *p, Linetype at, int a, Linetype bt, int b) { | ||
659 | return op_strict(p, a == b, at, bt); | ||
660 | } | ||
661 | static Linetype op_ne(int *p, Linetype at, int a, Linetype bt, int b) { | ||
662 | return op_strict(p, a != b, at, bt); | ||
663 | } | ||
664 | static Linetype op_or(int *p, Linetype at, int a, Linetype bt, int b) { | ||
665 | if (!strictlogic && (at == LT_TRUE || bt == LT_TRUE)) | ||
666 | return (*p = 1, LT_TRUE); | ||
667 | return op_strict(p, a || b, at, bt); | ||
668 | } | ||
669 | static Linetype op_and(int *p, Linetype at, int a, Linetype bt, int b) { | ||
670 | if (!strictlogic && (at == LT_FALSE || bt == LT_FALSE)) | ||
671 | return (*p = 0, LT_FALSE); | ||
672 | return op_strict(p, a && b, at, bt); | ||
673 | } | ||
624 | 674 | ||
625 | /* | 675 | /* |
626 | * An evaluation function takes three arguments, as follows: (1) a pointer to | 676 | * An evaluation function takes three arguments, as follows: (1) a pointer to |
@@ -629,8 +679,8 @@ static int op_and(int a, int b) { return (a && b); } | |||
629 | * value of the expression; and (3) a pointer to a char* that points to the | 679 | * value of the expression; and (3) a pointer to a char* that points to the |
630 | * expression to be evaluated and that is updated to the end of the expression | 680 | * expression to be evaluated and that is updated to the end of the expression |
631 | * when evaluation is complete. The function returns LT_FALSE if the value of | 681 | * when evaluation is complete. The function returns LT_FALSE if the value of |
632 | * the expression is zero, LT_TRUE if it is non-zero, or LT_IF if the | 682 | * the expression is zero, LT_TRUE if it is non-zero, LT_IF if the expression |
633 | * expression could not be evaluated. | 683 | * depends on an unknown symbol, or LT_ERROR if there is a parse failure. |
634 | */ | 684 | */ |
635 | struct ops; | 685 | struct ops; |
636 | 686 | ||
@@ -649,7 +699,7 @@ static const struct ops { | |||
649 | eval_fn *inner; | 699 | eval_fn *inner; |
650 | struct op { | 700 | struct op { |
651 | const char *str; | 701 | const char *str; |
652 | int (*fn)(int, int); | 702 | Linetype (*fn)(int *, Linetype, int, Linetype, int); |
653 | } op[5]; | 703 | } op[5]; |
654 | } eval_ops[] = { | 704 | } eval_ops[] = { |
655 | { eval_table, { { "||", op_or } } }, | 705 | { eval_table, { { "||", op_or } } }, |
@@ -664,8 +714,8 @@ static const struct ops { | |||
664 | 714 | ||
665 | /* | 715 | /* |
666 | * Function for evaluating the innermost parts of expressions, | 716 | * Function for evaluating the innermost parts of expressions, |
667 | * viz. !expr (expr) defined(symbol) symbol number | 717 | * viz. !expr (expr) number defined(symbol) symbol |
668 | * We reset the keepthis flag when we find a non-constant subexpression. | 718 | * We reset the constexpr flag in the last two cases. |
669 | */ | 719 | */ |
670 | static Linetype | 720 | static Linetype |
671 | eval_unary(const struct ops *ops, int *valp, const char **cpp) | 721 | eval_unary(const struct ops *ops, int *valp, const char **cpp) |
@@ -673,68 +723,83 @@ eval_unary(const struct ops *ops, int *valp, const char **cpp) | |||
673 | const char *cp; | 723 | const char *cp; |
674 | char *ep; | 724 | char *ep; |
675 | int sym; | 725 | int sym; |
726 | bool defparen; | ||
727 | Linetype lt; | ||
676 | 728 | ||
677 | cp = skipcomment(*cpp); | 729 | cp = skipcomment(*cpp); |
678 | if (*cp == '!') { | 730 | if (*cp == '!') { |
679 | debug("eval%d !", ops - eval_ops); | 731 | debug("eval%d !", ops - eval_ops); |
680 | cp++; | 732 | cp++; |
681 | if (eval_unary(ops, valp, &cp) == LT_IF) { | 733 | lt = eval_unary(ops, valp, &cp); |
682 | *cpp = cp; | 734 | if (lt == LT_ERROR) |
683 | return (LT_IF); | 735 | return (LT_ERROR); |
736 | if (lt != LT_IF) { | ||
737 | *valp = !*valp; | ||
738 | lt = *valp ? LT_TRUE : LT_FALSE; | ||
684 | } | 739 | } |
685 | *valp = !*valp; | ||
686 | } else if (*cp == '(') { | 740 | } else if (*cp == '(') { |
687 | cp++; | 741 | cp++; |
688 | debug("eval%d (", ops - eval_ops); | 742 | debug("eval%d (", ops - eval_ops); |
689 | if (eval_table(eval_ops, valp, &cp) == LT_IF) | 743 | lt = eval_table(eval_ops, valp, &cp); |
690 | return (LT_IF); | 744 | if (lt == LT_ERROR) |
745 | return (LT_ERROR); | ||
691 | cp = skipcomment(cp); | 746 | cp = skipcomment(cp); |
692 | if (*cp++ != ')') | 747 | if (*cp++ != ')') |
693 | return (LT_IF); | 748 | return (LT_ERROR); |
694 | } else if (isdigit((unsigned char)*cp)) { | 749 | } else if (isdigit((unsigned char)*cp)) { |
695 | debug("eval%d number", ops - eval_ops); | 750 | debug("eval%d number", ops - eval_ops); |
696 | *valp = strtol(cp, &ep, 0); | 751 | *valp = strtol(cp, &ep, 0); |
752 | if (ep == cp) | ||
753 | return (LT_ERROR); | ||
754 | lt = *valp ? LT_TRUE : LT_FALSE; | ||
697 | cp = skipsym(cp); | 755 | cp = skipsym(cp); |
698 | } else if (strncmp(cp, "defined", 7) == 0 && endsym(cp[7])) { | 756 | } else if (strncmp(cp, "defined", 7) == 0 && endsym(cp[7])) { |
699 | cp = skipcomment(cp+7); | 757 | cp = skipcomment(cp+7); |
700 | debug("eval%d defined", ops - eval_ops); | 758 | debug("eval%d defined", ops - eval_ops); |
701 | if (*cp++ != '(') | 759 | if (*cp == '(') { |
702 | return (LT_IF); | 760 | cp = skipcomment(cp+1); |
703 | cp = skipcomment(cp); | 761 | defparen = true; |
762 | } else { | ||
763 | defparen = false; | ||
764 | } | ||
704 | sym = findsym(cp); | 765 | sym = findsym(cp); |
705 | cp = skipsym(cp); | 766 | if (sym < 0) { |
706 | cp = skipcomment(cp); | 767 | lt = LT_IF; |
707 | if (*cp++ != ')') | 768 | } else { |
708 | return (LT_IF); | ||
709 | if (sym >= 0) | ||
710 | *valp = (value[sym] != NULL); | 769 | *valp = (value[sym] != NULL); |
711 | else { | 770 | lt = *valp ? LT_TRUE : LT_FALSE; |
712 | *cpp = cp; | ||
713 | return (LT_IF); | ||
714 | } | 771 | } |
715 | keepthis = false; | 772 | cp = skipsym(cp); |
773 | cp = skipcomment(cp); | ||
774 | if (defparen && *cp++ != ')') | ||
775 | return (LT_ERROR); | ||
776 | constexpr = false; | ||
716 | } else if (!endsym(*cp)) { | 777 | } else if (!endsym(*cp)) { |
717 | debug("eval%d symbol", ops - eval_ops); | 778 | debug("eval%d symbol", ops - eval_ops); |
718 | sym = findsym(cp); | 779 | sym = findsym(cp); |
719 | if (sym < 0) | 780 | cp = skipsym(cp); |
720 | return (LT_IF); | 781 | if (sym < 0) { |
721 | if (value[sym] == NULL) | 782 | lt = LT_IF; |
783 | cp = skipargs(cp); | ||
784 | } else if (value[sym] == NULL) { | ||
722 | *valp = 0; | 785 | *valp = 0; |
723 | else { | 786 | lt = LT_FALSE; |
787 | } else { | ||
724 | *valp = strtol(value[sym], &ep, 0); | 788 | *valp = strtol(value[sym], &ep, 0); |
725 | if (*ep != '\0' || ep == value[sym]) | 789 | if (*ep != '\0' || ep == value[sym]) |
726 | return (LT_IF); | 790 | return (LT_ERROR); |
791 | lt = *valp ? LT_TRUE : LT_FALSE; | ||
792 | cp = skipargs(cp); | ||
727 | } | 793 | } |
728 | cp = skipsym(cp); | 794 | constexpr = false; |
729 | keepthis = false; | ||
730 | } else { | 795 | } else { |
731 | debug("eval%d bad expr", ops - eval_ops); | 796 | debug("eval%d bad expr", ops - eval_ops); |
732 | return (LT_IF); | 797 | return (LT_ERROR); |
733 | } | 798 | } |
734 | 799 | ||
735 | *cpp = cp; | 800 | *cpp = cp; |
736 | debug("eval%d = %d", ops - eval_ops, *valp); | 801 | debug("eval%d = %d", ops - eval_ops, *valp); |
737 | return (*valp ? LT_TRUE : LT_FALSE); | 802 | return (lt); |
738 | } | 803 | } |
739 | 804 | ||
740 | /* | 805 | /* |
@@ -746,11 +811,13 @@ eval_table(const struct ops *ops, int *valp, const char **cpp) | |||
746 | const struct op *op; | 811 | const struct op *op; |
747 | const char *cp; | 812 | const char *cp; |
748 | int val; | 813 | int val; |
749 | Linetype lhs, rhs; | 814 | Linetype lt, rt; |
750 | 815 | ||
751 | debug("eval%d", ops - eval_ops); | 816 | debug("eval%d", ops - eval_ops); |
752 | cp = *cpp; | 817 | cp = *cpp; |
753 | lhs = ops->inner(ops+1, valp, &cp); | 818 | lt = ops->inner(ops+1, valp, &cp); |
819 | if (lt == LT_ERROR) | ||
820 | return (LT_ERROR); | ||
754 | for (;;) { | 821 | for (;;) { |
755 | cp = skipcomment(cp); | 822 | cp = skipcomment(cp); |
756 | for (op = ops->op; op->str != NULL; op++) | 823 | for (op = ops->op; op->str != NULL; op++) |
@@ -760,32 +827,16 @@ eval_table(const struct ops *ops, int *valp, const char **cpp) | |||
760 | break; | 827 | break; |
761 | cp += strlen(op->str); | 828 | cp += strlen(op->str); |
762 | debug("eval%d %s", ops - eval_ops, op->str); | 829 | debug("eval%d %s", ops - eval_ops, op->str); |
763 | rhs = ops->inner(ops+1, &val, &cp); | 830 | rt = ops->inner(ops+1, &val, &cp); |
764 | if (op->fn == op_and && (lhs == LT_FALSE || rhs == LT_FALSE)) { | 831 | if (rt == LT_ERROR) |
765 | debug("eval%d: and always false", ops - eval_ops); | 832 | return (LT_ERROR); |
766 | if (lhs == LT_IF) | 833 | lt = op->fn(valp, lt, *valp, rt, val); |
767 | *valp = val; | ||
768 | lhs = LT_FALSE; | ||
769 | continue; | ||
770 | } | ||
771 | if (op->fn == op_or && (lhs == LT_TRUE || rhs == LT_TRUE)) { | ||
772 | debug("eval%d: or always true", ops - eval_ops); | ||
773 | if (lhs == LT_IF) | ||
774 | *valp = val; | ||
775 | lhs = LT_TRUE; | ||
776 | continue; | ||
777 | } | ||
778 | if (rhs == LT_IF) | ||
779 | lhs = LT_IF; | ||
780 | if (lhs != LT_IF) | ||
781 | *valp = op->fn(*valp, val); | ||
782 | } | 834 | } |
783 | 835 | ||
784 | *cpp = cp; | 836 | *cpp = cp; |
785 | debug("eval%d = %d", ops - eval_ops, *valp); | 837 | debug("eval%d = %d", ops - eval_ops, *valp); |
786 | if (lhs != LT_IF) | 838 | debug("eval%d lt = %s", ops - eval_ops, linetype_name[lt]); |
787 | lhs = (*valp ? LT_TRUE : LT_FALSE); | 839 | return (lt); |
788 | return lhs; | ||
789 | } | 840 | } |
790 | 841 | ||
791 | /* | 842 | /* |
@@ -796,17 +847,14 @@ eval_table(const struct ops *ops, int *valp, const char **cpp) | |||
796 | static Linetype | 847 | static Linetype |
797 | ifeval(const char **cpp) | 848 | ifeval(const char **cpp) |
798 | { | 849 | { |
799 | const char *cp = *cpp; | ||
800 | int ret; | 850 | int ret; |
801 | int val; | 851 | int val = 0; |
802 | 852 | ||
803 | debug("eval %s", *cpp); | 853 | debug("eval %s", *cpp); |
804 | keepthis = killconsts ? false : true; | 854 | constexpr = killconsts ? false : true; |
805 | ret = eval_table(eval_ops, &val, &cp); | 855 | ret = eval_table(eval_ops, &val, cpp); |
806 | if (ret != LT_IF) | ||
807 | *cpp = cp; | ||
808 | debug("eval = %d", val); | 856 | debug("eval = %d", val); |
809 | return (keepthis ? LT_IF : ret); | 857 | return (constexpr ? LT_IF : ret == LT_ERROR ? LT_IF : ret); |
810 | } | 858 | } |
811 | 859 | ||
812 | /* | 860 | /* |
@@ -918,6 +966,31 @@ skipcomment(const char *cp) | |||
918 | } | 966 | } |
919 | 967 | ||
920 | /* | 968 | /* |
969 | * Skip macro arguments. | ||
970 | */ | ||
971 | static const char * | ||
972 | skipargs(const char *cp) | ||
973 | { | ||
974 | const char *ocp = cp; | ||
975 | int level = 0; | ||
976 | cp = skipcomment(cp); | ||
977 | if (*cp != '(') | ||
978 | return (cp); | ||
979 | do { | ||
980 | if (*cp == '(') | ||
981 | level++; | ||
982 | if (*cp == ')') | ||
983 | level--; | ||
984 | cp = skipcomment(cp+1); | ||
985 | } while (level != 0 && *cp != '\0'); | ||
986 | if (level == 0) | ||
987 | return (cp); | ||
988 | else | ||
989 | /* Rewind and re-detect the syntax error later. */ | ||
990 | return (ocp); | ||
991 | } | ||
992 | |||
993 | /* | ||
921 | * Skip over an identifier. | 994 | * Skip over an identifier. |
922 | */ | 995 | */ |
923 | static const char * | 996 | static const char * |
@@ -929,7 +1002,7 @@ skipsym(const char *cp) | |||
929 | } | 1002 | } |
930 | 1003 | ||
931 | /* | 1004 | /* |
932 | * Look for the symbol in the symbol table. If is is found, we return | 1005 | * Look for the symbol in the symbol table. If it is found, we return |
933 | * the symbol table index, else we return -1. | 1006 | * the symbol table index, else we return -1. |
934 | */ | 1007 | */ |
935 | static int | 1008 | static int |
diff --git a/security/Makefile b/security/Makefile index bb44e350c618..da20a193c8dd 100644 --- a/security/Makefile +++ b/security/Makefile | |||
@@ -8,7 +8,8 @@ subdir-$(CONFIG_SECURITY_SMACK) += smack | |||
8 | subdir-$(CONFIG_SECURITY_TOMOYO) += tomoyo | 8 | subdir-$(CONFIG_SECURITY_TOMOYO) += tomoyo |
9 | 9 | ||
10 | # always enable default capabilities | 10 | # always enable default capabilities |
11 | obj-y += commoncap.o min_addr.o | 11 | obj-y += commoncap.o |
12 | obj-$(CONFIG_MMU) += min_addr.o | ||
12 | 13 | ||
13 | # Object file lists | 14 | # Object file lists |
14 | obj-$(CONFIG_SECURITY) += security.o capability.o | 15 | obj-$(CONFIG_SECURITY) += security.o capability.o |
diff --git a/security/keys/keyctl.c b/security/keys/keyctl.c index 06ec722897be..e9c2e7c584d9 100644 --- a/security/keys/keyctl.c +++ b/security/keys/keyctl.c | |||
@@ -1194,7 +1194,7 @@ long keyctl_get_security(key_serial_t keyid, | |||
1194 | * have the authorisation token handy */ | 1194 | * have the authorisation token handy */ |
1195 | instkey = key_get_instantiation_authkey(keyid); | 1195 | instkey = key_get_instantiation_authkey(keyid); |
1196 | if (IS_ERR(instkey)) | 1196 | if (IS_ERR(instkey)) |
1197 | return PTR_ERR(key_ref); | 1197 | return PTR_ERR(instkey); |
1198 | key_put(instkey); | 1198 | key_put(instkey); |
1199 | 1199 | ||
1200 | key_ref = lookup_user_key(keyid, KEY_LOOKUP_PARTIAL, 0); | 1200 | key_ref = lookup_user_key(keyid, KEY_LOOKUP_PARTIAL, 0); |
@@ -1236,6 +1236,7 @@ long keyctl_get_security(key_serial_t keyid, | |||
1236 | */ | 1236 | */ |
1237 | long keyctl_session_to_parent(void) | 1237 | long keyctl_session_to_parent(void) |
1238 | { | 1238 | { |
1239 | #ifdef TIF_NOTIFY_RESUME | ||
1239 | struct task_struct *me, *parent; | 1240 | struct task_struct *me, *parent; |
1240 | const struct cred *mycred, *pcred; | 1241 | const struct cred *mycred, *pcred; |
1241 | struct cred *cred, *oldcred; | 1242 | struct cred *cred, *oldcred; |
@@ -1326,6 +1327,15 @@ not_permitted: | |||
1326 | error_keyring: | 1327 | error_keyring: |
1327 | key_ref_put(keyring_r); | 1328 | key_ref_put(keyring_r); |
1328 | return ret; | 1329 | return ret; |
1330 | |||
1331 | #else /* !TIF_NOTIFY_RESUME */ | ||
1332 | /* | ||
1333 | * To be removed when TIF_NOTIFY_RESUME has been implemented on | ||
1334 | * m68k/xtensa | ||
1335 | */ | ||
1336 | #warning TIF_NOTIFY_RESUME not implemented | ||
1337 | return -EOPNOTSUPP; | ||
1338 | #endif /* !TIF_NOTIFY_RESUME */ | ||
1329 | } | 1339 | } |
1330 | 1340 | ||
1331 | /*****************************************************************************/ | 1341 | /*****************************************************************************/ |
diff --git a/security/min_addr.c b/security/min_addr.c index fc43c9d37084..e86f297522bf 100644 --- a/security/min_addr.c +++ b/security/min_addr.c | |||
@@ -43,7 +43,7 @@ int mmap_min_addr_handler(struct ctl_table *table, int write, | |||
43 | return ret; | 43 | return ret; |
44 | } | 44 | } |
45 | 45 | ||
46 | int __init init_mmap_min_addr(void) | 46 | static int __init init_mmap_min_addr(void) |
47 | { | 47 | { |
48 | update_mmap_min_addr(); | 48 | update_mmap_min_addr(); |
49 | 49 | ||
diff --git a/sound/soc/omap/sdp3430.c b/sound/soc/omap/sdp3430.c index c071f9603a38..3c85c0f92823 100644 --- a/sound/soc/omap/sdp3430.c +++ b/sound/soc/omap/sdp3430.c | |||
@@ -24,7 +24,7 @@ | |||
24 | 24 | ||
25 | #include <linux/clk.h> | 25 | #include <linux/clk.h> |
26 | #include <linux/platform_device.h> | 26 | #include <linux/platform_device.h> |
27 | #include <linux/i2c/twl4030.h> | 27 | #include <linux/i2c/twl.h> |
28 | #include <sound/core.h> | 28 | #include <sound/core.h> |
29 | #include <sound/pcm.h> | 29 | #include <sound/pcm.h> |
30 | #include <sound/soc.h> | 30 | #include <sound/soc.h> |
@@ -321,11 +321,11 @@ static int __init sdp3430_soc_init(void) | |||
321 | *(unsigned int *)sdp3430_dai[1].cpu_dai->private_data = 2; /* McBSP3 */ | 321 | *(unsigned int *)sdp3430_dai[1].cpu_dai->private_data = 2; /* McBSP3 */ |
322 | 322 | ||
323 | /* Set TWL4030 GPIO6 as EXTMUTE signal */ | 323 | /* Set TWL4030 GPIO6 as EXTMUTE signal */ |
324 | twl4030_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux, | 324 | twl_i2c_read_u8(TWL4030_MODULE_INTBR, &pin_mux, |
325 | TWL4030_INTBR_PMBR1); | 325 | TWL4030_INTBR_PMBR1); |
326 | pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03); | 326 | pin_mux &= ~TWL4030_GPIO6_PWM0_MUTE(0x03); |
327 | pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02); | 327 | pin_mux |= TWL4030_GPIO6_PWM0_MUTE(0x02); |
328 | twl4030_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux, | 328 | twl_i2c_write_u8(TWL4030_MODULE_INTBR, pin_mux, |
329 | TWL4030_INTBR_PMBR1); | 329 | TWL4030_INTBR_PMBR1); |
330 | 330 | ||
331 | ret = platform_device_add(sdp3430_snd_device); | 331 | ret = platform_device_add(sdp3430_snd_device); |
diff --git a/usr/gen_init_cpio.c b/usr/gen_init_cpio.c index 83b3dde1a83b..b2b3c2d1cf8b 100644 --- a/usr/gen_init_cpio.c +++ b/usr/gen_init_cpio.c | |||
@@ -354,7 +354,10 @@ static int cpio_mkfile(const char *name, const char *location, | |||
354 | push_pad(); | 354 | push_pad(); |
355 | 355 | ||
356 | if (size) { | 356 | if (size) { |
357 | fwrite(filebuf, size, 1, stdout); | 357 | if (fwrite(filebuf, size, 1, stdout) != 1) { |
358 | fprintf(stderr, "writing filebuf failed\n"); | ||
359 | goto error; | ||
360 | } | ||
358 | offset += size; | 361 | offset += size; |
359 | push_pad(); | 362 | push_pad(); |
360 | } | 363 | } |