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-rw-r--r--arch/sparc/kernel/ptrace.c2
-rw-r--r--arch/sparc64/kernel/pci_schizo.c2
-rw-r--r--include/asm-sparc64/dma-mapping.h12
3 files changed, 5 insertions, 11 deletions
diff --git a/arch/sparc/kernel/ptrace.c b/arch/sparc/kernel/ptrace.c
index fe562db475e9..7452269bba2a 100644
--- a/arch/sparc/kernel/ptrace.c
+++ b/arch/sparc/kernel/ptrace.c
@@ -5,7 +5,7 @@
5 * Based upon code written by Ross Biro, Linus Torvalds, Bob Manson, 5 * Based upon code written by Ross Biro, Linus Torvalds, Bob Manson,
6 * and David Mosberger. 6 * and David Mosberger.
7 * 7 *
8 * Added Linux support -miguel (weird, eh?, the orignal code was meant 8 * Added Linux support -miguel (weird, eh?, the original code was meant
9 * to emulate SunOS). 9 * to emulate SunOS).
10 */ 10 */
11 11
diff --git a/arch/sparc64/kernel/pci_schizo.c b/arch/sparc64/kernel/pci_schizo.c
index 9546ba9f5dee..e752e75cce83 100644
--- a/arch/sparc64/kernel/pci_schizo.c
+++ b/arch/sparc64/kernel/pci_schizo.c
@@ -850,7 +850,7 @@ static int pbm_routes_this_ino(struct pci_pbm_info *pbm, u32 ino)
850/* How the Tomatillo IRQs are routed around is pure guesswork here. 850/* How the Tomatillo IRQs are routed around is pure guesswork here.
851 * 851 *
852 * All the Tomatillo devices I see in prtconf dumps seem to have only 852 * All the Tomatillo devices I see in prtconf dumps seem to have only
853 * a single PCI bus unit attached to it. It would seem they are seperate 853 * a single PCI bus unit attached to it. It would seem they are separate
854 * devices because their PortID (ie. JBUS ID) values are all different 854 * devices because their PortID (ie. JBUS ID) values are all different
855 * and thus the registers are mapped to totally different locations. 855 * and thus the registers are mapped to totally different locations.
856 * 856 *
diff --git a/include/asm-sparc64/dma-mapping.h b/include/asm-sparc64/dma-mapping.h
index 1fc655452b81..38cbec76a33f 100644
--- a/include/asm-sparc64/dma-mapping.h
+++ b/include/asm-sparc64/dma-mapping.h
@@ -25,15 +25,9 @@ struct dma_ops {
25 void (*sync_single_for_cpu)(struct device *dev, 25 void (*sync_single_for_cpu)(struct device *dev,
26 dma_addr_t dma_handle, size_t size, 26 dma_addr_t dma_handle, size_t size,
27 enum dma_data_direction direction); 27 enum dma_data_direction direction);
28 void (*sync_single_for_device)(struct device *dev,
29 dma_addr_t dma_handle, size_t size,
30 enum dma_data_direction direction);
31 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg, 28 void (*sync_sg_for_cpu)(struct device *dev, struct scatterlist *sg,
32 int nelems, 29 int nelems,
33 enum dma_data_direction direction); 30 enum dma_data_direction direction);
34 void (*sync_sg_for_device)(struct device *dev, struct scatterlist *sg,
35 int nelems,
36 enum dma_data_direction direction);
37}; 31};
38extern const struct dma_ops *dma_ops; 32extern const struct dma_ops *dma_ops;
39 33
@@ -105,7 +99,7 @@ static inline void dma_sync_single_for_device(struct device *dev,
105 size_t size, 99 size_t size,
106 enum dma_data_direction direction) 100 enum dma_data_direction direction)
107{ 101{
108 dma_ops->sync_single_for_device(dev, dma_handle, size, direction); 102 /* No flushing needed to sync cpu writes to the device. */
109} 103}
110 104
111static inline void dma_sync_single_range_for_cpu(struct device *dev, 105static inline void dma_sync_single_range_for_cpu(struct device *dev,
@@ -123,7 +117,7 @@ static inline void dma_sync_single_range_for_device(struct device *dev,
123 size_t size, 117 size_t size,
124 enum dma_data_direction direction) 118 enum dma_data_direction direction)
125{ 119{
126 dma_sync_single_for_device(dev, dma_handle+offset, size, direction); 120 /* No flushing needed to sync cpu writes to the device. */
127} 121}
128 122
129 123
@@ -138,7 +132,7 @@ static inline void dma_sync_sg_for_device(struct device *dev,
138 struct scatterlist *sg, int nelems, 132 struct scatterlist *sg, int nelems,
139 enum dma_data_direction direction) 133 enum dma_data_direction direction)
140{ 134{
141 dma_ops->sync_sg_for_device(dev, sg, nelems, direction); 135 /* No flushing needed to sync cpu writes to the device. */
142} 136}
143 137
144static inline int dma_mapping_error(dma_addr_t dma_addr) 138static inline int dma_mapping_error(dma_addr_t dma_addr)