diff options
-rw-r--r-- | drivers/net/ixgbe/ixgbe_82598.c | 177 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_common.c | 138 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_common.h | 3 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_dcb_82598.c | 2 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_ethtool.c | 23 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_main.c | 77 | ||||
-rw-r--r-- | drivers/net/ixgbe/ixgbe_type.h | 29 |
7 files changed, 327 insertions, 122 deletions
diff --git a/drivers/net/ixgbe/ixgbe_82598.c b/drivers/net/ixgbe/ixgbe_82598.c index f726a14d1a73..525bd87fea56 100644 --- a/drivers/net/ixgbe/ixgbe_82598.c +++ b/drivers/net/ixgbe/ixgbe_82598.c | |||
@@ -255,104 +255,75 @@ static enum ixgbe_media_type ixgbe_get_media_type_82598(struct ixgbe_hw *hw) | |||
255 | } | 255 | } |
256 | 256 | ||
257 | /** | 257 | /** |
258 | * ixgbe_setup_fc_82598 - Configure flow control settings | 258 | * ixgbe_fc_enable_82598 - Enable flow control |
259 | * @hw: pointer to hardware structure | 259 | * @hw: pointer to hardware structure |
260 | * @packetbuf_num: packet buffer number (0-7) | 260 | * @packetbuf_num: packet buffer number (0-7) |
261 | * | 261 | * |
262 | * Configures the flow control settings based on SW configuration. This | 262 | * Enable flow control according to the current settings. |
263 | * function is used for 802.3x flow control configuration only. | ||
264 | **/ | 263 | **/ |
265 | static s32 ixgbe_setup_fc_82598(struct ixgbe_hw *hw, s32 packetbuf_num) | 264 | static s32 ixgbe_fc_enable_82598(struct ixgbe_hw *hw, s32 packetbuf_num) |
266 | { | 265 | { |
267 | u32 frctl_reg; | 266 | s32 ret_val = 0; |
267 | u32 fctrl_reg; | ||
268 | u32 rmcs_reg; | 268 | u32 rmcs_reg; |
269 | u32 reg; | ||
269 | 270 | ||
270 | if (packetbuf_num < 0 || packetbuf_num > 7) { | 271 | fctrl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); |
271 | hw_dbg(hw, "Invalid packet buffer number [%d], expected range is" | 272 | fctrl_reg &= ~(IXGBE_FCTRL_RFCE | IXGBE_FCTRL_RPFCE); |
272 | " 0-7\n", packetbuf_num); | ||
273 | } | ||
274 | |||
275 | frctl_reg = IXGBE_READ_REG(hw, IXGBE_FCTRL); | ||
276 | frctl_reg &= ~(IXGBE_FCTRL_RFCE | IXGBE_FCTRL_RPFCE); | ||
277 | 273 | ||
278 | rmcs_reg = IXGBE_READ_REG(hw, IXGBE_RMCS); | 274 | rmcs_reg = IXGBE_READ_REG(hw, IXGBE_RMCS); |
279 | rmcs_reg &= ~(IXGBE_RMCS_TFCE_PRIORITY | IXGBE_RMCS_TFCE_802_3X); | 275 | rmcs_reg &= ~(IXGBE_RMCS_TFCE_PRIORITY | IXGBE_RMCS_TFCE_802_3X); |
280 | 276 | ||
281 | /* | 277 | /* |
282 | * 10 gig parts do not have a word in the EEPROM to determine the | 278 | * The possible values of fc.current_mode are: |
283 | * default flow control setting, so we explicitly set it to full. | ||
284 | */ | ||
285 | if (hw->fc.type == ixgbe_fc_default) | ||
286 | hw->fc.type = ixgbe_fc_full; | ||
287 | |||
288 | /* | ||
289 | * We want to save off the original Flow Control configuration just in | ||
290 | * case we get disconnected and then reconnected into a different hub | ||
291 | * or switch with different Flow Control capabilities. | ||
292 | */ | ||
293 | hw->fc.original_type = hw->fc.type; | ||
294 | |||
295 | /* | ||
296 | * The possible values of the "flow_control" parameter are: | ||
297 | * 0: Flow control is completely disabled | 279 | * 0: Flow control is completely disabled |
298 | * 1: Rx flow control is enabled (we can receive pause frames but not | 280 | * 1: Rx flow control is enabled (we can receive pause frames, |
299 | * send pause frames). | 281 | * but not send pause frames). |
300 | * 2: Tx flow control is enabled (we can send pause frames but we do not | 282 | * 2: Tx flow control is enabled (we can send pause frames but |
301 | * support receiving pause frames) | 283 | * we do not support receiving pause frames). |
302 | * 3: Both Rx and Tx flow control (symmetric) are enabled. | 284 | * 3: Both Rx and Tx flow control (symmetric) are enabled. |
303 | * other: Invalid. | 285 | * other: Invalid. |
304 | */ | 286 | */ |
305 | switch (hw->fc.type) { | 287 | switch (hw->fc.current_mode) { |
306 | case ixgbe_fc_none: | 288 | case ixgbe_fc_none: |
289 | /* Flow control completely disabled by software override. */ | ||
307 | break; | 290 | break; |
308 | case ixgbe_fc_rx_pause: | 291 | case ixgbe_fc_rx_pause: |
309 | /* | 292 | /* |
310 | * Rx Flow control is enabled, | 293 | * Rx Flow control is enabled and Tx Flow control is |
311 | * and Tx Flow control is disabled. | 294 | * disabled by software override. Since there really |
295 | * isn't a way to advertise that we are capable of RX | ||
296 | * Pause ONLY, we will advertise that we support both | ||
297 | * symmetric and asymmetric Rx PAUSE. Later, we will | ||
298 | * disable the adapter's ability to send PAUSE frames. | ||
312 | */ | 299 | */ |
313 | frctl_reg |= IXGBE_FCTRL_RFCE; | 300 | fctrl_reg |= IXGBE_FCTRL_RFCE; |
314 | break; | 301 | break; |
315 | case ixgbe_fc_tx_pause: | 302 | case ixgbe_fc_tx_pause: |
316 | /* | 303 | /* |
317 | * Tx Flow control is enabled, and Rx Flow control is disabled, | 304 | * Tx Flow control is enabled, and Rx Flow control is |
318 | * by a software over-ride. | 305 | * disabled by software override. |
319 | */ | 306 | */ |
320 | rmcs_reg |= IXGBE_RMCS_TFCE_802_3X; | 307 | rmcs_reg |= IXGBE_RMCS_TFCE_802_3X; |
321 | break; | 308 | break; |
322 | case ixgbe_fc_full: | 309 | case ixgbe_fc_full: |
323 | /* | 310 | /* Flow control (both Rx and Tx) is enabled by SW override. */ |
324 | * Flow control (both Rx and Tx) is enabled by a software | 311 | fctrl_reg |= IXGBE_FCTRL_RFCE; |
325 | * over-ride. | ||
326 | */ | ||
327 | frctl_reg |= IXGBE_FCTRL_RFCE; | ||
328 | rmcs_reg |= IXGBE_RMCS_TFCE_802_3X; | 312 | rmcs_reg |= IXGBE_RMCS_TFCE_802_3X; |
329 | break; | 313 | break; |
330 | default: | 314 | default: |
331 | /* We should never get here. The value should be 0-3. */ | ||
332 | hw_dbg(hw, "Flow control param set incorrectly\n"); | 315 | hw_dbg(hw, "Flow control param set incorrectly\n"); |
316 | ret_val = -IXGBE_ERR_CONFIG; | ||
317 | goto out; | ||
333 | break; | 318 | break; |
334 | } | 319 | } |
335 | 320 | ||
336 | /* Enable 802.3x based flow control settings. */ | 321 | /* Enable 802.3x based flow control settings. */ |
337 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, frctl_reg); | 322 | IXGBE_WRITE_REG(hw, IXGBE_FCTRL, fctrl_reg); |
338 | IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); | 323 | IXGBE_WRITE_REG(hw, IXGBE_RMCS, rmcs_reg); |
339 | 324 | ||
340 | /* | 325 | /* Set up and enable Rx high/low water mark thresholds, enable XON. */ |
341 | * Check for invalid software configuration, zeros are completely | 326 | if (hw->fc.current_mode & ixgbe_fc_tx_pause) { |
342 | * invalid for all parameters used past this point, and if we enable | ||
343 | * flow control with zero water marks, we blast flow control packets. | ||
344 | */ | ||
345 | if (!hw->fc.low_water || !hw->fc.high_water || !hw->fc.pause_time) { | ||
346 | hw_dbg(hw, "Flow control structure initialized incorrectly\n"); | ||
347 | return IXGBE_ERR_INVALID_LINK_SETTINGS; | ||
348 | } | ||
349 | |||
350 | /* | ||
351 | * We need to set up the Receive Threshold high and low water | ||
352 | * marks as well as (optionally) enabling the transmission of | ||
353 | * XON frames. | ||
354 | */ | ||
355 | if (hw->fc.type & ixgbe_fc_tx_pause) { | ||
356 | if (hw->fc.send_xon) { | 327 | if (hw->fc.send_xon) { |
357 | IXGBE_WRITE_REG(hw, IXGBE_FCRTL(packetbuf_num), | 328 | IXGBE_WRITE_REG(hw, IXGBE_FCRTL(packetbuf_num), |
358 | (hw->fc.low_water | IXGBE_FCRTL_XONE)); | 329 | (hw->fc.low_water | IXGBE_FCRTL_XONE)); |
@@ -360,14 +331,93 @@ static s32 ixgbe_setup_fc_82598(struct ixgbe_hw *hw, s32 packetbuf_num) | |||
360 | IXGBE_WRITE_REG(hw, IXGBE_FCRTL(packetbuf_num), | 331 | IXGBE_WRITE_REG(hw, IXGBE_FCRTL(packetbuf_num), |
361 | hw->fc.low_water); | 332 | hw->fc.low_water); |
362 | } | 333 | } |
334 | |||
363 | IXGBE_WRITE_REG(hw, IXGBE_FCRTH(packetbuf_num), | 335 | IXGBE_WRITE_REG(hw, IXGBE_FCRTH(packetbuf_num), |
364 | (hw->fc.high_water)|IXGBE_FCRTH_FCEN); | 336 | (hw->fc.high_water | IXGBE_FCRTH_FCEN)); |
365 | } | 337 | } |
366 | 338 | ||
367 | IXGBE_WRITE_REG(hw, IXGBE_FCTTV(0), hw->fc.pause_time); | 339 | /* Configure pause time (2 TCs per register) */ |
340 | reg = IXGBE_READ_REG(hw, IXGBE_FCTTV(packetbuf_num)); | ||
341 | if ((packetbuf_num & 1) == 0) | ||
342 | reg = (reg & 0xFFFF0000) | hw->fc.pause_time; | ||
343 | else | ||
344 | reg = (reg & 0x0000FFFF) | (hw->fc.pause_time << 16); | ||
345 | IXGBE_WRITE_REG(hw, IXGBE_FCTTV(packetbuf_num / 2), reg); | ||
346 | |||
368 | IXGBE_WRITE_REG(hw, IXGBE_FCRTV, (hw->fc.pause_time >> 1)); | 347 | IXGBE_WRITE_REG(hw, IXGBE_FCRTV, (hw->fc.pause_time >> 1)); |
369 | 348 | ||
370 | return 0; | 349 | out: |
350 | return ret_val; | ||
351 | } | ||
352 | |||
353 | /** | ||
354 | * ixgbe_setup_fc_82598 - Configure flow control settings | ||
355 | * @hw: pointer to hardware structure | ||
356 | * @packetbuf_num: packet buffer number (0-7) | ||
357 | * | ||
358 | * Configures the flow control settings based on SW configuration. This | ||
359 | * function is used for 802.3x flow control configuration only. | ||
360 | **/ | ||
361 | static s32 ixgbe_setup_fc_82598(struct ixgbe_hw *hw, s32 packetbuf_num) | ||
362 | { | ||
363 | s32 ret_val = 0; | ||
364 | ixgbe_link_speed speed; | ||
365 | bool link_up; | ||
366 | |||
367 | /* Validate the packetbuf configuration */ | ||
368 | if (packetbuf_num < 0 || packetbuf_num > 7) { | ||
369 | hw_dbg(hw, "Invalid packet buffer number [%d], expected range is" | ||
370 | " 0-7\n", packetbuf_num); | ||
371 | ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; | ||
372 | goto out; | ||
373 | } | ||
374 | |||
375 | /* | ||
376 | * Validate the water mark configuration. Zero water marks are invalid | ||
377 | * because it causes the controller to just blast out fc packets. | ||
378 | */ | ||
379 | if (!hw->fc.low_water || !hw->fc.high_water || !hw->fc.pause_time) { | ||
380 | hw_dbg(hw, "Invalid water mark configuration\n"); | ||
381 | ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; | ||
382 | goto out; | ||
383 | } | ||
384 | |||
385 | /* | ||
386 | * Validate the requested mode. Strict IEEE mode does not allow | ||
387 | * ixgbe_fc_rx_pause because it will cause testing anomalies. | ||
388 | */ | ||
389 | if (hw->fc.strict_ieee && hw->fc.requested_mode == ixgbe_fc_rx_pause) { | ||
390 | hw_dbg(hw, "ixgbe_fc_rx_pause not valid in strict IEEE mode\n"); | ||
391 | ret_val = IXGBE_ERR_INVALID_LINK_SETTINGS; | ||
392 | goto out; | ||
393 | } | ||
394 | |||
395 | /* | ||
396 | * 10gig parts do not have a word in the EEPROM to determine the | ||
397 | * default flow control setting, so we explicitly set it to full. | ||
398 | */ | ||
399 | if (hw->fc.requested_mode == ixgbe_fc_default) | ||
400 | hw->fc.requested_mode = ixgbe_fc_full; | ||
401 | |||
402 | /* | ||
403 | * Save off the requested flow control mode for use later. Depending | ||
404 | * on the link partner's capabilities, we may or may not use this mode. | ||
405 | */ | ||
406 | |||
407 | hw->fc.current_mode = hw->fc.requested_mode; | ||
408 | |||
409 | /* Decide whether to use autoneg or not. */ | ||
410 | hw->mac.ops.check_link(hw, &speed, &link_up, false); | ||
411 | if (hw->phy.multispeed_fiber && (speed == IXGBE_LINK_SPEED_1GB_FULL)) | ||
412 | ret_val = ixgbe_fc_autoneg(hw); | ||
413 | |||
414 | if (ret_val) | ||
415 | goto out; | ||
416 | |||
417 | ret_val = ixgbe_fc_enable_82598(hw, packetbuf_num); | ||
418 | |||
419 | out: | ||
420 | return ret_val; | ||
371 | } | 421 | } |
372 | 422 | ||
373 | /** | 423 | /** |
@@ -414,7 +464,6 @@ static s32 ixgbe_setup_mac_link_82598(struct ixgbe_hw *hw) | |||
414 | * case we get disconnected and then reconnected into a different hub | 464 | * case we get disconnected and then reconnected into a different hub |
415 | * or switch with different Flow Control capabilities. | 465 | * or switch with different Flow Control capabilities. |
416 | */ | 466 | */ |
417 | hw->fc.original_type = hw->fc.type; | ||
418 | ixgbe_setup_fc_82598(hw, 0); | 467 | ixgbe_setup_fc_82598(hw, 0); |
419 | 468 | ||
420 | /* Add delay to filter out noises during initial link setup */ | 469 | /* Add delay to filter out noises during initial link setup */ |
diff --git a/drivers/net/ixgbe/ixgbe_common.c b/drivers/net/ixgbe/ixgbe_common.c index 13ad5ba66b63..5ae93989784f 100644 --- a/drivers/net/ixgbe/ixgbe_common.c +++ b/drivers/net/ixgbe/ixgbe_common.c | |||
@@ -1487,6 +1487,144 @@ s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw) | |||
1487 | } | 1487 | } |
1488 | 1488 | ||
1489 | /** | 1489 | /** |
1490 | * ixgbe_fc_autoneg - Configure flow control | ||
1491 | * @hw: pointer to hardware structure | ||
1492 | * | ||
1493 | * Negotiates flow control capabilities with link partner using autoneg and | ||
1494 | * applies the results. | ||
1495 | **/ | ||
1496 | s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw) | ||
1497 | { | ||
1498 | s32 ret_val = 0; | ||
1499 | u32 i, reg, pcs_anadv_reg, pcs_lpab_reg; | ||
1500 | |||
1501 | reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); | ||
1502 | |||
1503 | /* | ||
1504 | * The possible values of fc.current_mode are: | ||
1505 | * 0: Flow control is completely disabled | ||
1506 | * 1: Rx flow control is enabled (we can receive pause frames, | ||
1507 | * but not send pause frames). | ||
1508 | * 2: Tx flow control is enabled (we can send pause frames but | ||
1509 | * we do not support receiving pause frames). | ||
1510 | * 3: Both Rx and Tx flow control (symmetric) are enabled. | ||
1511 | * other: Invalid. | ||
1512 | */ | ||
1513 | switch (hw->fc.current_mode) { | ||
1514 | case ixgbe_fc_none: | ||
1515 | /* Flow control completely disabled by software override. */ | ||
1516 | reg &= ~(IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE); | ||
1517 | break; | ||
1518 | case ixgbe_fc_rx_pause: | ||
1519 | /* | ||
1520 | * Rx Flow control is enabled and Tx Flow control is | ||
1521 | * disabled by software override. Since there really | ||
1522 | * isn't a way to advertise that we are capable of RX | ||
1523 | * Pause ONLY, we will advertise that we support both | ||
1524 | * symmetric and asymmetric Rx PAUSE. Later, we will | ||
1525 | * disable the adapter's ability to send PAUSE frames. | ||
1526 | */ | ||
1527 | reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE); | ||
1528 | break; | ||
1529 | case ixgbe_fc_tx_pause: | ||
1530 | /* | ||
1531 | * Tx Flow control is enabled, and Rx Flow control is | ||
1532 | * disabled by software override. | ||
1533 | */ | ||
1534 | reg |= (IXGBE_PCS1GANA_ASM_PAUSE); | ||
1535 | reg &= ~(IXGBE_PCS1GANA_SYM_PAUSE); | ||
1536 | break; | ||
1537 | case ixgbe_fc_full: | ||
1538 | /* Flow control (both Rx and Tx) is enabled by SW override. */ | ||
1539 | reg |= (IXGBE_PCS1GANA_SYM_PAUSE | IXGBE_PCS1GANA_ASM_PAUSE); | ||
1540 | break; | ||
1541 | default: | ||
1542 | hw_dbg(hw, "Flow control param set incorrectly\n"); | ||
1543 | ret_val = -IXGBE_ERR_CONFIG; | ||
1544 | goto out; | ||
1545 | break; | ||
1546 | } | ||
1547 | |||
1548 | IXGBE_WRITE_REG(hw, IXGBE_PCS1GANA, reg); | ||
1549 | reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLCTL); | ||
1550 | |||
1551 | /* Set PCS register for autoneg */ | ||
1552 | /* Enable and restart autoneg */ | ||
1553 | reg |= IXGBE_PCS1GLCTL_AN_ENABLE | IXGBE_PCS1GLCTL_AN_RESTART; | ||
1554 | |||
1555 | /* Disable AN timeout */ | ||
1556 | if (hw->fc.strict_ieee) | ||
1557 | reg &= ~IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN; | ||
1558 | |||
1559 | hw_dbg(hw, "Configuring Autoneg; PCS_LCTL = 0x%08X\n", reg); | ||
1560 | IXGBE_WRITE_REG(hw, IXGBE_PCS1GLCTL, reg); | ||
1561 | |||
1562 | /* See if autonegotiation has succeeded */ | ||
1563 | hw->mac.autoneg_succeeded = 0; | ||
1564 | for (i = 0; i < FIBER_LINK_UP_LIMIT; i++) { | ||
1565 | msleep(10); | ||
1566 | reg = IXGBE_READ_REG(hw, IXGBE_PCS1GLSTA); | ||
1567 | if ((reg & (IXGBE_PCS1GLSTA_LINK_OK | | ||
1568 | IXGBE_PCS1GLSTA_AN_COMPLETE)) == | ||
1569 | (IXGBE_PCS1GLSTA_LINK_OK | | ||
1570 | IXGBE_PCS1GLSTA_AN_COMPLETE)) { | ||
1571 | if (!(reg & IXGBE_PCS1GLSTA_AN_TIMED_OUT)) | ||
1572 | hw->mac.autoneg_succeeded = 1; | ||
1573 | break; | ||
1574 | } | ||
1575 | } | ||
1576 | |||
1577 | if (!hw->mac.autoneg_succeeded) { | ||
1578 | /* Autoneg failed to achieve a link, so we turn fc off */ | ||
1579 | hw->fc.current_mode = ixgbe_fc_none; | ||
1580 | hw_dbg(hw, "Flow Control = NONE.\n"); | ||
1581 | goto out; | ||
1582 | } | ||
1583 | |||
1584 | /* | ||
1585 | * Read the AN advertisement and LP ability registers and resolve | ||
1586 | * local flow control settings accordingly | ||
1587 | */ | ||
1588 | pcs_anadv_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANA); | ||
1589 | pcs_lpab_reg = IXGBE_READ_REG(hw, IXGBE_PCS1GANLP); | ||
1590 | if ((pcs_anadv_reg & IXGBE_PCS1GANA_SYM_PAUSE) && | ||
1591 | (pcs_lpab_reg & IXGBE_PCS1GANA_SYM_PAUSE)) { | ||
1592 | /* | ||
1593 | * Now we need to check if the user selected Rx ONLY | ||
1594 | * of pause frames. In this case, we had to advertise | ||
1595 | * FULL flow control because we could not advertise RX | ||
1596 | * ONLY. Hence, we must now check to see if we need to | ||
1597 | * turn OFF the TRANSMISSION of PAUSE frames. | ||
1598 | */ | ||
1599 | if (hw->fc.requested_mode == ixgbe_fc_full) { | ||
1600 | hw->fc.current_mode = ixgbe_fc_full; | ||
1601 | hw_dbg(hw, "Flow Control = FULL.\n"); | ||
1602 | } else { | ||
1603 | hw->fc.current_mode = ixgbe_fc_rx_pause; | ||
1604 | hw_dbg(hw, "Flow Control = RX PAUSE frames only.\n"); | ||
1605 | } | ||
1606 | } else if (!(pcs_anadv_reg & IXGBE_PCS1GANA_SYM_PAUSE) && | ||
1607 | (pcs_anadv_reg & IXGBE_PCS1GANA_ASM_PAUSE) && | ||
1608 | (pcs_lpab_reg & IXGBE_PCS1GANA_SYM_PAUSE) && | ||
1609 | (pcs_lpab_reg & IXGBE_PCS1GANA_ASM_PAUSE)) { | ||
1610 | hw->fc.current_mode = ixgbe_fc_tx_pause; | ||
1611 | hw_dbg(hw, "Flow Control = TX PAUSE frames only.\n"); | ||
1612 | } else if ((pcs_anadv_reg & IXGBE_PCS1GANA_SYM_PAUSE) && | ||
1613 | (pcs_anadv_reg & IXGBE_PCS1GANA_ASM_PAUSE) && | ||
1614 | !(pcs_lpab_reg & IXGBE_PCS1GANA_SYM_PAUSE) && | ||
1615 | (pcs_lpab_reg & IXGBE_PCS1GANA_ASM_PAUSE)) { | ||
1616 | hw->fc.current_mode = ixgbe_fc_rx_pause; | ||
1617 | hw_dbg(hw, "Flow Control = RX PAUSE frames only.\n"); | ||
1618 | } else { | ||
1619 | hw->fc.current_mode = ixgbe_fc_none; | ||
1620 | hw_dbg(hw, "Flow Control = NONE.\n"); | ||
1621 | } | ||
1622 | |||
1623 | out: | ||
1624 | return ret_val; | ||
1625 | } | ||
1626 | |||
1627 | /** | ||
1490 | * ixgbe_disable_pcie_master - Disable PCI-express master access | 1628 | * ixgbe_disable_pcie_master - Disable PCI-express master access |
1491 | * @hw: pointer to hardware structure | 1629 | * @hw: pointer to hardware structure |
1492 | * | 1630 | * |
diff --git a/drivers/net/ixgbe/ixgbe_common.h b/drivers/net/ixgbe/ixgbe_common.h index 0b5ba5755805..c63021261e56 100644 --- a/drivers/net/ixgbe/ixgbe_common.h +++ b/drivers/net/ixgbe/ixgbe_common.h | |||
@@ -61,6 +61,9 @@ s32 ixgbe_update_uc_addr_list_generic(struct ixgbe_hw *hw, u8 *addr_list, | |||
61 | u32 addr_count, ixgbe_mc_addr_itr func); | 61 | u32 addr_count, ixgbe_mc_addr_itr func); |
62 | s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); | 62 | s32 ixgbe_enable_mc_generic(struct ixgbe_hw *hw); |
63 | s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); | 63 | s32 ixgbe_disable_mc_generic(struct ixgbe_hw *hw); |
64 | s32 ixgbe_setup_fc_generic(struct ixgbe_hw *hw, s32 packetbuf_num); | ||
65 | s32 ixgbe_fc_enable(struct ixgbe_hw *hw, s32 packtetbuf_num); | ||
66 | s32 ixgbe_fc_autoneg(struct ixgbe_hw *hw); | ||
64 | 67 | ||
65 | s32 ixgbe_validate_mac_addr(u8 *mac_addr); | 68 | s32 ixgbe_validate_mac_addr(u8 *mac_addr); |
66 | s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask); | 69 | s32 ixgbe_acquire_swfw_sync(struct ixgbe_hw *hw, u16 mask); |
diff --git a/drivers/net/ixgbe/ixgbe_dcb_82598.c b/drivers/net/ixgbe/ixgbe_dcb_82598.c index 560321148935..df359554d492 100644 --- a/drivers/net/ixgbe/ixgbe_dcb_82598.c +++ b/drivers/net/ixgbe/ixgbe_dcb_82598.c | |||
@@ -298,7 +298,7 @@ s32 ixgbe_dcb_config_pfc_82598(struct ixgbe_hw *hw, | |||
298 | reg = IXGBE_READ_REG(hw, IXGBE_RMCS); | 298 | reg = IXGBE_READ_REG(hw, IXGBE_RMCS); |
299 | reg &= ~IXGBE_RMCS_TFCE_802_3X; | 299 | reg &= ~IXGBE_RMCS_TFCE_802_3X; |
300 | /* correct the reporting of our flow control status */ | 300 | /* correct the reporting of our flow control status */ |
301 | hw->fc.type = ixgbe_fc_none; | 301 | hw->fc.current_mode = ixgbe_fc_none; |
302 | reg |= IXGBE_RMCS_TFCE_PRIORITY; | 302 | reg |= IXGBE_RMCS_TFCE_PRIORITY; |
303 | IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); | 303 | IXGBE_WRITE_REG(hw, IXGBE_RMCS, reg); |
304 | 304 | ||
diff --git a/drivers/net/ixgbe/ixgbe_ethtool.c b/drivers/net/ixgbe/ixgbe_ethtool.c index 54d96cb05b48..cec2f4e8c61e 100644 --- a/drivers/net/ixgbe/ixgbe_ethtool.c +++ b/drivers/net/ixgbe/ixgbe_ethtool.c | |||
@@ -224,13 +224,13 @@ static void ixgbe_get_pauseparam(struct net_device *netdev, | |||
224 | struct ixgbe_adapter *adapter = netdev_priv(netdev); | 224 | struct ixgbe_adapter *adapter = netdev_priv(netdev); |
225 | struct ixgbe_hw *hw = &adapter->hw; | 225 | struct ixgbe_hw *hw = &adapter->hw; |
226 | 226 | ||
227 | pause->autoneg = (hw->fc.type == ixgbe_fc_full ? 1 : 0); | 227 | pause->autoneg = (hw->fc.current_mode == ixgbe_fc_full ? 1 : 0); |
228 | 228 | ||
229 | if (hw->fc.type == ixgbe_fc_rx_pause) { | 229 | if (hw->fc.current_mode == ixgbe_fc_rx_pause) { |
230 | pause->rx_pause = 1; | 230 | pause->rx_pause = 1; |
231 | } else if (hw->fc.type == ixgbe_fc_tx_pause) { | 231 | } else if (hw->fc.current_mode == ixgbe_fc_tx_pause) { |
232 | pause->tx_pause = 1; | 232 | pause->tx_pause = 1; |
233 | } else if (hw->fc.type == ixgbe_fc_full) { | 233 | } else if (hw->fc.current_mode == ixgbe_fc_full) { |
234 | pause->rx_pause = 1; | 234 | pause->rx_pause = 1; |
235 | pause->tx_pause = 1; | 235 | pause->tx_pause = 1; |
236 | } | 236 | } |
@@ -244,22 +244,17 @@ static int ixgbe_set_pauseparam(struct net_device *netdev, | |||
244 | 244 | ||
245 | if ((pause->autoneg == AUTONEG_ENABLE) || | 245 | if ((pause->autoneg == AUTONEG_ENABLE) || |
246 | (pause->rx_pause && pause->tx_pause)) | 246 | (pause->rx_pause && pause->tx_pause)) |
247 | hw->fc.type = ixgbe_fc_full; | 247 | hw->fc.requested_mode = ixgbe_fc_full; |
248 | else if (pause->rx_pause && !pause->tx_pause) | 248 | else if (pause->rx_pause && !pause->tx_pause) |
249 | hw->fc.type = ixgbe_fc_rx_pause; | 249 | hw->fc.requested_mode = ixgbe_fc_rx_pause; |
250 | else if (!pause->rx_pause && pause->tx_pause) | 250 | else if (!pause->rx_pause && pause->tx_pause) |
251 | hw->fc.type = ixgbe_fc_tx_pause; | 251 | hw->fc.requested_mode = ixgbe_fc_tx_pause; |
252 | else if (!pause->rx_pause && !pause->tx_pause) | 252 | else if (!pause->rx_pause && !pause->tx_pause) |
253 | hw->fc.type = ixgbe_fc_none; | 253 | hw->fc.requested_mode = ixgbe_fc_none; |
254 | else | 254 | else |
255 | return -EINVAL; | 255 | return -EINVAL; |
256 | 256 | ||
257 | hw->fc.original_type = hw->fc.type; | 257 | hw->mac.ops.setup_fc(hw, 0); |
258 | |||
259 | if (netif_running(netdev)) | ||
260 | ixgbe_reinit_locked(adapter); | ||
261 | else | ||
262 | ixgbe_reset(adapter); | ||
263 | 258 | ||
264 | return 0; | 259 | return 0; |
265 | } | 260 | } |
diff --git a/drivers/net/ixgbe/ixgbe_main.c b/drivers/net/ixgbe/ixgbe_main.c index dceae37fd57f..850361a4c38d 100644 --- a/drivers/net/ixgbe/ixgbe_main.c +++ b/drivers/net/ixgbe/ixgbe_main.c | |||
@@ -1954,11 +1954,43 @@ static void ixgbe_configure(struct ixgbe_adapter *adapter) | |||
1954 | (adapter->rx_ring[i].count - 1)); | 1954 | (adapter->rx_ring[i].count - 1)); |
1955 | } | 1955 | } |
1956 | 1956 | ||
1957 | /** | ||
1958 | * ixgbe_link_config - set up initial link with default speed and duplex | ||
1959 | * @hw: pointer to private hardware struct | ||
1960 | * | ||
1961 | * Returns 0 on success, negative on failure | ||
1962 | **/ | ||
1963 | static int ixgbe_link_config(struct ixgbe_hw *hw) | ||
1964 | { | ||
1965 | u32 autoneg; | ||
1966 | bool link_up = false; | ||
1967 | u32 ret = IXGBE_ERR_LINK_SETUP; | ||
1968 | |||
1969 | if (hw->mac.ops.check_link) | ||
1970 | ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false); | ||
1971 | |||
1972 | if (ret) | ||
1973 | goto link_cfg_out; | ||
1974 | |||
1975 | if (hw->mac.ops.get_link_capabilities) | ||
1976 | ret = hw->mac.ops.get_link_capabilities(hw, &autoneg, | ||
1977 | &hw->mac.autoneg); | ||
1978 | if (ret) | ||
1979 | goto link_cfg_out; | ||
1980 | |||
1981 | if (hw->mac.ops.setup_link_speed) | ||
1982 | ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, link_up); | ||
1983 | |||
1984 | link_cfg_out: | ||
1985 | return ret; | ||
1986 | } | ||
1987 | |||
1957 | static int ixgbe_up_complete(struct ixgbe_adapter *adapter) | 1988 | static int ixgbe_up_complete(struct ixgbe_adapter *adapter) |
1958 | { | 1989 | { |
1959 | struct net_device *netdev = adapter->netdev; | 1990 | struct net_device *netdev = adapter->netdev; |
1960 | struct ixgbe_hw *hw = &adapter->hw; | 1991 | struct ixgbe_hw *hw = &adapter->hw; |
1961 | int i, j = 0; | 1992 | int i, j = 0; |
1993 | int err; | ||
1962 | int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; | 1994 | int max_frame = netdev->mtu + ETH_HLEN + ETH_FCS_LEN; |
1963 | u32 txdctl, rxdctl, mhadd; | 1995 | u32 txdctl, rxdctl, mhadd; |
1964 | u32 gpie; | 1996 | u32 gpie; |
@@ -2039,6 +2071,10 @@ static int ixgbe_up_complete(struct ixgbe_adapter *adapter) | |||
2039 | 2071 | ||
2040 | ixgbe_irq_enable(adapter); | 2072 | ixgbe_irq_enable(adapter); |
2041 | 2073 | ||
2074 | err = ixgbe_link_config(hw); | ||
2075 | if (err) | ||
2076 | dev_err(&adapter->pdev->dev, "link_config FAILED %d\n", err); | ||
2077 | |||
2042 | /* enable transmits */ | 2078 | /* enable transmits */ |
2043 | netif_tx_start_all_queues(netdev); | 2079 | netif_tx_start_all_queues(netdev); |
2044 | 2080 | ||
@@ -2792,8 +2828,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter) | |||
2792 | adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE; | 2828 | adapter->flags |= IXGBE_FLAG_FAN_FAIL_CAPABLE; |
2793 | 2829 | ||
2794 | /* default flow control settings */ | 2830 | /* default flow control settings */ |
2795 | hw->fc.original_type = ixgbe_fc_none; | 2831 | hw->fc.requested_mode = ixgbe_fc_none; |
2796 | hw->fc.type = ixgbe_fc_none; | ||
2797 | hw->fc.high_water = IXGBE_DEFAULT_FCRTH; | 2832 | hw->fc.high_water = IXGBE_DEFAULT_FCRTH; |
2798 | hw->fc.low_water = IXGBE_DEFAULT_FCRTL; | 2833 | hw->fc.low_water = IXGBE_DEFAULT_FCRTL; |
2799 | hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE; | 2834 | hw->fc.pause_time = IXGBE_DEFAULT_FCPAUSE; |
@@ -3916,37 +3951,6 @@ static void ixgbe_netpoll(struct net_device *netdev) | |||
3916 | } | 3951 | } |
3917 | #endif | 3952 | #endif |
3918 | 3953 | ||
3919 | /** | ||
3920 | * ixgbe_link_config - set up initial link with default speed and duplex | ||
3921 | * @hw: pointer to private hardware struct | ||
3922 | * | ||
3923 | * Returns 0 on success, negative on failure | ||
3924 | **/ | ||
3925 | static int ixgbe_link_config(struct ixgbe_hw *hw) | ||
3926 | { | ||
3927 | u32 autoneg; | ||
3928 | bool link_up = false; | ||
3929 | u32 ret = IXGBE_ERR_LINK_SETUP; | ||
3930 | |||
3931 | if (hw->mac.ops.check_link) | ||
3932 | ret = hw->mac.ops.check_link(hw, &autoneg, &link_up, false); | ||
3933 | |||
3934 | if (ret || !link_up) | ||
3935 | goto link_cfg_out; | ||
3936 | |||
3937 | if (hw->mac.ops.get_link_capabilities) | ||
3938 | ret = hw->mac.ops.get_link_capabilities(hw, &autoneg, | ||
3939 | &hw->mac.autoneg); | ||
3940 | if (ret) | ||
3941 | goto link_cfg_out; | ||
3942 | |||
3943 | if (hw->mac.ops.setup_link_speed) | ||
3944 | ret = hw->mac.ops.setup_link_speed(hw, autoneg, true, true); | ||
3945 | |||
3946 | link_cfg_out: | ||
3947 | return ret; | ||
3948 | } | ||
3949 | |||
3950 | static const struct net_device_ops ixgbe_netdev_ops = { | 3954 | static const struct net_device_ops ixgbe_netdev_ops = { |
3951 | .ndo_open = ixgbe_open, | 3955 | .ndo_open = ixgbe_open, |
3952 | .ndo_stop = ixgbe_close, | 3956 | .ndo_stop = ixgbe_close, |
@@ -4197,13 +4201,6 @@ static int __devinit ixgbe_probe(struct pci_dev *pdev, | |||
4197 | /* reset the hardware with the new settings */ | 4201 | /* reset the hardware with the new settings */ |
4198 | hw->mac.ops.start_hw(hw); | 4202 | hw->mac.ops.start_hw(hw); |
4199 | 4203 | ||
4200 | /* link_config depends on start_hw being called at least once */ | ||
4201 | err = ixgbe_link_config(hw); | ||
4202 | if (err) { | ||
4203 | dev_err(&pdev->dev, "setup_link_speed FAILED %d\n", err); | ||
4204 | goto err_register; | ||
4205 | } | ||
4206 | |||
4207 | netif_carrier_off(netdev); | 4204 | netif_carrier_off(netdev); |
4208 | 4205 | ||
4209 | strcpy(netdev->name, "eth%d"); | 4206 | strcpy(netdev->name, "eth%d"); |
diff --git a/drivers/net/ixgbe/ixgbe_type.h b/drivers/net/ixgbe/ixgbe_type.h index 984b4ed372f1..237c688f8b6e 100644 --- a/drivers/net/ixgbe/ixgbe_type.h +++ b/drivers/net/ixgbe/ixgbe_type.h | |||
@@ -771,6 +771,28 @@ | |||
771 | #define IXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */ | 771 | #define IXGBE_LINK_UP_TIME 90 /* 9.0 Seconds */ |
772 | #define IXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */ | 772 | #define IXGBE_AUTO_NEG_TIME 45 /* 4.5 Seconds */ |
773 | 773 | ||
774 | #define FIBER_LINK_UP_LIMIT 50 | ||
775 | |||
776 | /* PCS1GLSTA Bit Masks */ | ||
777 | #define IXGBE_PCS1GLSTA_LINK_OK 1 | ||
778 | #define IXGBE_PCS1GLSTA_SYNK_OK 0x10 | ||
779 | #define IXGBE_PCS1GLSTA_AN_COMPLETE 0x10000 | ||
780 | #define IXGBE_PCS1GLSTA_AN_PAGE_RX 0x20000 | ||
781 | #define IXGBE_PCS1GLSTA_AN_TIMED_OUT 0x40000 | ||
782 | #define IXGBE_PCS1GLSTA_AN_REMOTE_FAULT 0x80000 | ||
783 | #define IXGBE_PCS1GLSTA_AN_ERROR_RWS 0x100000 | ||
784 | |||
785 | #define IXGBE_PCS1GANA_SYM_PAUSE 0x80 | ||
786 | #define IXGBE_PCS1GANA_ASM_PAUSE 0x100 | ||
787 | |||
788 | /* PCS1GLCTL Bit Masks */ | ||
789 | #define IXGBE_PCS1GLCTL_AN_1G_TIMEOUT_EN 0x00040000 /* PCS 1G autoneg to en */ | ||
790 | #define IXGBE_PCS1GLCTL_FLV_LINK_UP 1 | ||
791 | #define IXGBE_PCS1GLCTL_FORCE_LINK 0x20 | ||
792 | #define IXGBE_PCS1GLCTL_LOW_LINK_LATCH 0x40 | ||
793 | #define IXGBE_PCS1GLCTL_AN_ENABLE 0x10000 | ||
794 | #define IXGBE_PCS1GLCTL_AN_RESTART 0x20000 | ||
795 | |||
774 | /* SW Semaphore Register bitmasks */ | 796 | /* SW Semaphore Register bitmasks */ |
775 | #define IXGBE_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */ | 797 | #define IXGBE_SWSM_SMBI 0x00000001 /* Driver Semaphore bit */ |
776 | #define IXGBE_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */ | 798 | #define IXGBE_SWSM_SWESMBI 0x00000002 /* FW Semaphore bit */ |
@@ -1270,7 +1292,7 @@ enum ixgbe_media_type { | |||
1270 | }; | 1292 | }; |
1271 | 1293 | ||
1272 | /* Flow Control Settings */ | 1294 | /* Flow Control Settings */ |
1273 | enum ixgbe_fc_type { | 1295 | enum ixgbe_fc_mode { |
1274 | ixgbe_fc_none = 0, | 1296 | ixgbe_fc_none = 0, |
1275 | ixgbe_fc_rx_pause, | 1297 | ixgbe_fc_rx_pause, |
1276 | ixgbe_fc_tx_pause, | 1298 | ixgbe_fc_tx_pause, |
@@ -1294,8 +1316,8 @@ struct ixgbe_fc_info { | |||
1294 | u16 pause_time; /* Flow Control Pause timer */ | 1316 | u16 pause_time; /* Flow Control Pause timer */ |
1295 | bool send_xon; /* Flow control send XON */ | 1317 | bool send_xon; /* Flow control send XON */ |
1296 | bool strict_ieee; /* Strict IEEE mode */ | 1318 | bool strict_ieee; /* Strict IEEE mode */ |
1297 | enum ixgbe_fc_type type; /* Type of flow control */ | 1319 | enum ixgbe_fc_mode current_mode; /* FC mode in effect */ |
1298 | enum ixgbe_fc_type original_type; | 1320 | enum ixgbe_fc_mode requested_mode; /* FC mode requested by caller */ |
1299 | }; | 1321 | }; |
1300 | 1322 | ||
1301 | /* Statistics counters collected by the MAC */ | 1323 | /* Statistics counters collected by the MAC */ |
@@ -1475,6 +1497,7 @@ struct ixgbe_phy_info { | |||
1475 | bool reset_disable; | 1497 | bool reset_disable; |
1476 | ixgbe_autoneg_advertised autoneg_advertised; | 1498 | ixgbe_autoneg_advertised autoneg_advertised; |
1477 | bool autoneg_wait_to_complete; | 1499 | bool autoneg_wait_to_complete; |
1500 | bool multispeed_fiber; | ||
1478 | }; | 1501 | }; |
1479 | 1502 | ||
1480 | struct ixgbe_hw { | 1503 | struct ixgbe_hw { |