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-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c29
-rw-r--r--arch/arm/mach-davinci/devices-tnetv107x.c24
-rw-r--r--arch/arm/mach-davinci/dm355.c22
-rw-r--r--arch/arm/mach-davinci/dm365.c24
-rw-r--r--arch/arm/mach-davinci/dm644x.c22
-rw-r--r--arch/arm/mach-davinci/dm646x.c22
-rw-r--r--arch/arm/mach-davinci/dma.c21
-rw-r--r--arch/arm/mach-davinci/include/mach/edma.h2
8 files changed, 92 insertions, 74 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index 8cda729be273..1d956bfa9cf0 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -111,19 +111,21 @@ static const s8 da850_queue_priority_mapping[][2] = {
111 {-1, -1} 111 {-1, -1}
112}; 112};
113 113
114static struct edma_soc_info da830_edma_info[] = { 114static struct edma_soc_info da830_edma_cc0_info = {
115 { 115 .n_channel = 32,
116 .n_channel = 32, 116 .n_region = 4,
117 .n_region = 4, 117 .n_slot = 128,
118 .n_slot = 128, 118 .n_tc = 2,
119 .n_tc = 2, 119 .n_cc = 1,
120 .n_cc = 1, 120 .queue_tc_mapping = da8xx_queue_tc_mapping,
121 .queue_tc_mapping = da8xx_queue_tc_mapping, 121 .queue_priority_mapping = da8xx_queue_priority_mapping,
122 .queue_priority_mapping = da8xx_queue_priority_mapping, 122};
123 }, 123
124static struct edma_soc_info *da830_edma_info[EDMA_MAX_CC] = {
125 &da830_edma_cc0_info,
124}; 126};
125 127
126static struct edma_soc_info da850_edma_info[] = { 128static struct edma_soc_info da850_edma_cc_info[] = {
127 { 129 {
128 .n_channel = 32, 130 .n_channel = 32,
129 .n_region = 4, 131 .n_region = 4,
@@ -144,6 +146,11 @@ static struct edma_soc_info da850_edma_info[] = {
144 }, 146 },
145}; 147};
146 148
149static struct edma_soc_info *da850_edma_info[EDMA_MAX_CC] = {
150 &da850_edma_cc_info[0],
151 &da850_edma_cc_info[1],
152};
153
147static struct resource da830_edma_resources[] = { 154static struct resource da830_edma_resources[] = {
148 { 155 {
149 .name = "edma_cc0", 156 .name = "edma_cc0",
diff --git a/arch/arm/mach-davinci/devices-tnetv107x.c b/arch/arm/mach-davinci/devices-tnetv107x.c
index 4eef6ccdc73e..2718a3a90dff 100644
--- a/arch/arm/mach-davinci/devices-tnetv107x.c
+++ b/arch/arm/mach-davinci/devices-tnetv107x.c
@@ -69,16 +69,18 @@ static const s8 edma_priority_mapping[][2] = {
69 { -1, -1 } 69 { -1, -1 }
70}; 70};
71 71
72static struct edma_soc_info edma_info[] = { 72static struct edma_soc_info edma_cc0_info = {
73 { 73 .n_channel = EDMA_TNETV107X_NUM_DMACH,
74 .n_channel = EDMA_TNETV107X_NUM_DMACH, 74 .n_region = EDMA_TNETV107X_NUM_REGIONS,
75 .n_region = EDMA_TNETV107X_NUM_REGIONS, 75 .n_slot = EDMA_TNETV107X_NUM_PARAMENTRY,
76 .n_slot = EDMA_TNETV107X_NUM_PARAMENTRY, 76 .n_tc = EDMA_TNETV107X_NUM_TC,
77 .n_tc = EDMA_TNETV107X_NUM_TC, 77 .n_cc = 1,
78 .n_cc = 1, 78 .queue_tc_mapping = edma_tc_mapping,
79 .queue_tc_mapping = edma_tc_mapping, 79 .queue_priority_mapping = edma_priority_mapping,
80 .queue_priority_mapping = edma_priority_mapping, 80};
81 }, 81
82static struct edma_soc_info *tnetv107x_edma_info[EDMA_MAX_CC] = {
83 &edma_cc0_info,
82}; 84};
83 85
84static struct resource edma_resources[] = { 86static struct resource edma_resources[] = {
@@ -117,7 +119,7 @@ static struct platform_device edma_device = {
117 .id = -1, 119 .id = -1,
118 .num_resources = ARRAY_SIZE(edma_resources), 120 .num_resources = ARRAY_SIZE(edma_resources),
119 .resource = edma_resources, 121 .resource = edma_resources,
120 .dev.platform_data = edma_info, 122 .dev.platform_data = tnetv107x_edma_info,
121}; 123};
122 124
123static struct plat_serial8250_port serial_data[] = { 125static struct plat_serial8250_port serial_data[] = {
diff --git a/arch/arm/mach-davinci/dm355.c b/arch/arm/mach-davinci/dm355.c
index 383478116ef5..3d996b659ff4 100644
--- a/arch/arm/mach-davinci/dm355.c
+++ b/arch/arm/mach-davinci/dm355.c
@@ -591,16 +591,18 @@ queue_priority_mapping[][2] = {
591 {-1, -1}, 591 {-1, -1},
592}; 592};
593 593
594static struct edma_soc_info dm355_edma_info[] = { 594static struct edma_soc_info edma_cc0_info = {
595 { 595 .n_channel = 64,
596 .n_channel = 64, 596 .n_region = 4,
597 .n_region = 4, 597 .n_slot = 128,
598 .n_slot = 128, 598 .n_tc = 2,
599 .n_tc = 2, 599 .n_cc = 1,
600 .n_cc = 1, 600 .queue_tc_mapping = queue_tc_mapping,
601 .queue_tc_mapping = queue_tc_mapping, 601 .queue_priority_mapping = queue_priority_mapping,
602 .queue_priority_mapping = queue_priority_mapping, 602};
603 }, 603
604static struct edma_soc_info *dm355_edma_info[EDMA_MAX_CC] = {
605 &edma_cc0_info,
604}; 606};
605 607
606static struct resource edma_resources[] = { 608static struct resource edma_resources[] = {
diff --git a/arch/arm/mach-davinci/dm365.c b/arch/arm/mach-davinci/dm365.c
index 652f4b6ee1cd..6b6f4c643709 100644
--- a/arch/arm/mach-davinci/dm365.c
+++ b/arch/arm/mach-davinci/dm365.c
@@ -822,17 +822,19 @@ dm365_queue_priority_mapping[][2] = {
822 {-1, -1}, 822 {-1, -1},
823}; 823};
824 824
825static struct edma_soc_info dm365_edma_info[] = { 825static struct edma_soc_info edma_cc0_info = {
826 { 826 .n_channel = 64,
827 .n_channel = 64, 827 .n_region = 4,
828 .n_region = 4, 828 .n_slot = 256,
829 .n_slot = 256, 829 .n_tc = 4,
830 .n_tc = 4, 830 .n_cc = 1,
831 .n_cc = 1, 831 .queue_tc_mapping = dm365_queue_tc_mapping,
832 .queue_tc_mapping = dm365_queue_tc_mapping, 832 .queue_priority_mapping = dm365_queue_priority_mapping,
833 .queue_priority_mapping = dm365_queue_priority_mapping, 833 .default_queue = EVENTQ_3,
834 .default_queue = EVENTQ_3, 834};
835 }, 835
836static struct edma_soc_info *dm365_edma_info[EDMA_MAX_CC] = {
837 &edma_cc0_info,
836}; 838};
837 839
838static struct resource edma_resources[] = { 840static struct resource edma_resources[] = {
diff --git a/arch/arm/mach-davinci/dm644x.c b/arch/arm/mach-davinci/dm644x.c
index 7ad15208b841..40fec315c99a 100644
--- a/arch/arm/mach-davinci/dm644x.c
+++ b/arch/arm/mach-davinci/dm644x.c
@@ -492,16 +492,18 @@ queue_priority_mapping[][2] = {
492 {-1, -1}, 492 {-1, -1},
493}; 493};
494 494
495static struct edma_soc_info dm644x_edma_info[] = { 495static struct edma_soc_info edma_cc0_info = {
496 { 496 .n_channel = 64,
497 .n_channel = 64, 497 .n_region = 4,
498 .n_region = 4, 498 .n_slot = 128,
499 .n_slot = 128, 499 .n_tc = 2,
500 .n_tc = 2, 500 .n_cc = 1,
501 .n_cc = 1, 501 .queue_tc_mapping = queue_tc_mapping,
502 .queue_tc_mapping = queue_tc_mapping, 502 .queue_priority_mapping = queue_priority_mapping,
503 .queue_priority_mapping = queue_priority_mapping, 503};
504 }, 504
505static struct edma_soc_info *dm644x_edma_info[EDMA_MAX_CC] = {
506 &edma_cc0_info,
505}; 507};
506 508
507static struct resource edma_resources[] = { 509static struct resource edma_resources[] = {
diff --git a/arch/arm/mach-davinci/dm646x.c b/arch/arm/mach-davinci/dm646x.c
index 94045656cff6..bfc887e9f118 100644
--- a/arch/arm/mach-davinci/dm646x.c
+++ b/arch/arm/mach-davinci/dm646x.c
@@ -529,16 +529,18 @@ dm646x_queue_priority_mapping[][2] = {
529 {-1, -1}, 529 {-1, -1},
530}; 530};
531 531
532static struct edma_soc_info dm646x_edma_info[] = { 532static struct edma_soc_info edma_cc0_info = {
533 { 533 .n_channel = 64,
534 .n_channel = 64, 534 .n_region = 6, /* 0-1, 4-7 */
535 .n_region = 6, /* 0-1, 4-7 */ 535 .n_slot = 512,
536 .n_slot = 512, 536 .n_tc = 4,
537 .n_tc = 4, 537 .n_cc = 1,
538 .n_cc = 1, 538 .queue_tc_mapping = dm646x_queue_tc_mapping,
539 .queue_tc_mapping = dm646x_queue_tc_mapping, 539 .queue_priority_mapping = dm646x_queue_priority_mapping,
540 .queue_priority_mapping = dm646x_queue_priority_mapping, 540};
541 }, 541
542static struct edma_soc_info *dm646x_edma_info[EDMA_MAX_CC] = {
543 &edma_cc0_info,
542}; 544};
543 545
544static struct resource edma_resources[] = { 546static struct resource edma_resources[] = {
diff --git a/arch/arm/mach-davinci/dma.c b/arch/arm/mach-davinci/dma.c
index d33827aadda7..0b6c01fbedd5 100644
--- a/arch/arm/mach-davinci/dma.c
+++ b/arch/arm/mach-davinci/dma.c
@@ -99,8 +99,6 @@
99 99
100#define EDMA_MAX_DMACH 64 100#define EDMA_MAX_DMACH 64
101#define EDMA_MAX_PARAMENTRY 512 101#define EDMA_MAX_PARAMENTRY 512
102#define EDMA_MAX_CC 2
103
104 102
105/*****************************************************************************/ 103/*****************************************************************************/
106 104
@@ -1376,7 +1374,7 @@ EXPORT_SYMBOL(edma_clear_event);
1376 1374
1377static int __init edma_probe(struct platform_device *pdev) 1375static int __init edma_probe(struct platform_device *pdev)
1378{ 1376{
1379 struct edma_soc_info *info = pdev->dev.platform_data; 1377 struct edma_soc_info **info = pdev->dev.platform_data;
1380 const s8 (*queue_priority_mapping)[2]; 1378 const s8 (*queue_priority_mapping)[2];
1381 const s8 (*queue_tc_mapping)[2]; 1379 const s8 (*queue_tc_mapping)[2];
1382 int i, j, found = 0; 1380 int i, j, found = 0;
@@ -1395,7 +1393,7 @@ static int __init edma_probe(struct platform_device *pdev)
1395 sprintf(res_name, "edma_cc%d", j); 1393 sprintf(res_name, "edma_cc%d", j);
1396 r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM, 1394 r[j] = platform_get_resource_byname(pdev, IORESOURCE_MEM,
1397 res_name); 1395 res_name);
1398 if (!r[j]) { 1396 if (!r[j] || !info[j]) {
1399 if (found) 1397 if (found)
1400 break; 1398 break;
1401 else 1399 else
@@ -1426,13 +1424,14 @@ static int __init edma_probe(struct platform_device *pdev)
1426 } 1424 }
1427 memset(edma_cc[j], 0, sizeof(struct edma)); 1425 memset(edma_cc[j], 0, sizeof(struct edma));
1428 1426
1429 edma_cc[j]->num_channels = min_t(unsigned, info[j].n_channel, 1427 edma_cc[j]->num_channels = min_t(unsigned, info[j]->n_channel,
1430 EDMA_MAX_DMACH); 1428 EDMA_MAX_DMACH);
1431 edma_cc[j]->num_slots = min_t(unsigned, info[j].n_slot, 1429 edma_cc[j]->num_slots = min_t(unsigned, info[j]->n_slot,
1432 EDMA_MAX_PARAMENTRY); 1430 EDMA_MAX_PARAMENTRY);
1433 edma_cc[j]->num_cc = min_t(unsigned, info[j].n_cc, EDMA_MAX_CC); 1431 edma_cc[j]->num_cc = min_t(unsigned, info[j]->n_cc,
1432 EDMA_MAX_CC);
1434 1433
1435 edma_cc[j]->default_queue = info[j].default_queue; 1434 edma_cc[j]->default_queue = info[j]->default_queue;
1436 if (!edma_cc[j]->default_queue) 1435 if (!edma_cc[j]->default_queue)
1437 edma_cc[j]->default_queue = EVENTQ_1; 1436 edma_cc[j]->default_queue = EVENTQ_1;
1438 1437
@@ -1476,8 +1475,8 @@ static int __init edma_probe(struct platform_device *pdev)
1476 for (i = 0; i < edma_cc[j]->num_channels; i++) 1475 for (i = 0; i < edma_cc[j]->num_channels; i++)
1477 map_dmach_queue(j, i, EVENTQ_1); 1476 map_dmach_queue(j, i, EVENTQ_1);
1478 1477
1479 queue_tc_mapping = info[j].queue_tc_mapping; 1478 queue_tc_mapping = info[j]->queue_tc_mapping;
1480 queue_priority_mapping = info[j].queue_priority_mapping; 1479 queue_priority_mapping = info[j]->queue_priority_mapping;
1481 1480
1482 /* Event queue to TC mapping */ 1481 /* Event queue to TC mapping */
1483 for (i = 0; queue_tc_mapping[i][0] != -1; i++) 1482 for (i = 0; queue_tc_mapping[i][0] != -1; i++)
@@ -1496,7 +1495,7 @@ static int __init edma_probe(struct platform_device *pdev)
1496 if (edma_read(j, EDMA_CCCFG) & CHMAP_EXIST) 1495 if (edma_read(j, EDMA_CCCFG) & CHMAP_EXIST)
1497 map_dmach_param(j); 1496 map_dmach_param(j);
1498 1497
1499 for (i = 0; i < info[j].n_region; i++) { 1498 for (i = 0; i < info[j]->n_region; i++) {
1500 edma_write_array2(j, EDMA_DRAE, i, 0, 0x0); 1499 edma_write_array2(j, EDMA_DRAE, i, 0, 0x0);
1501 edma_write_array2(j, EDMA_DRAE, i, 1, 0x0); 1500 edma_write_array2(j, EDMA_DRAE, i, 1, 0x0);
1502 edma_write_array(j, EDMA_QRAE, i, 0x0); 1501 edma_write_array(j, EDMA_QRAE, i, 0x0);
diff --git a/arch/arm/mach-davinci/include/mach/edma.h b/arch/arm/mach-davinci/include/mach/edma.h
index ced3092af5ba..9a3bcc6f2602 100644
--- a/arch/arm/mach-davinci/include/mach/edma.h
+++ b/arch/arm/mach-davinci/include/mach/edma.h
@@ -230,6 +230,8 @@ enum sync_dimension {
230#define EDMA_CONT_PARAMS_FIXED_EXACT 1002 230#define EDMA_CONT_PARAMS_FIXED_EXACT 1002
231#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003 231#define EDMA_CONT_PARAMS_FIXED_NOT_EXACT 1003
232 232
233#define EDMA_MAX_CC 2
234
233/* alloc/free DMA channels and their dedicated parameter RAM slots */ 235/* alloc/free DMA channels and their dedicated parameter RAM slots */
234int edma_alloc_channel(int channel, 236int edma_alloc_channel(int channel,
235 void (*callback)(unsigned channel, u16 ch_status, void *data), 237 void (*callback)(unsigned channel, u16 ch_status, void *data),