diff options
-rw-r--r-- | arch/arm/mach-mx3/mach-mx31_3ds.c | 42 | ||||
-rw-r--r-- | arch/arm/plat-mxc/include/mach/board-mx31_3ds.h | 59 |
2 files changed, 35 insertions, 66 deletions
diff --git a/arch/arm/mach-mx3/mach-mx31_3ds.c b/arch/arm/mach-mx3/mach-mx31_3ds.c index 58e57291b79d..53740b44b466 100644 --- a/arch/arm/mach-mx3/mach-mx31_3ds.c +++ b/arch/arm/mach-mx3/mach-mx31_3ds.c | |||
@@ -37,19 +37,47 @@ | |||
37 | #include <asm/memory.h> | 37 | #include <asm/memory.h> |
38 | #include <asm/mach/map.h> | 38 | #include <asm/mach/map.h> |
39 | #include <mach/common.h> | 39 | #include <mach/common.h> |
40 | #include <mach/board-mx31_3ds.h> | ||
41 | #include <mach/imx-uart.h> | 40 | #include <mach/imx-uart.h> |
42 | #include <mach/iomux-mx3.h> | 41 | #include <mach/iomux-mx3.h> |
43 | #include <mach/mxc_nand.h> | 42 | #include <mach/mxc_nand.h> |
44 | #include <mach/spi.h> | 43 | #include <mach/spi.h> |
45 | #include "devices.h" | 44 | #include "devices.h" |
46 | 45 | ||
47 | /*! | 46 | /* Definitions for components on the Debug board */ |
48 | * @file mx31_3ds.c | 47 | |
49 | * | 48 | /* Base address of CPLD controller on the Debug board */ |
50 | * @brief This file contains the board-specific initialization routines. | 49 | #define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(MX3x_CS5_BASE_ADDR) |
51 | * | 50 | |
52 | * @ingroup System | 51 | /* LAN9217 ethernet base address */ |
52 | #define LAN9217_BASE_ADDR MX3x_CS5_BASE_ADDR | ||
53 | |||
54 | /* CPLD config and interrupt base address */ | ||
55 | #define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000) | ||
56 | |||
57 | /* status, interrupt */ | ||
58 | #define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10) | ||
59 | #define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38) | ||
60 | #define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20) | ||
61 | /* magic word for debug CPLD */ | ||
62 | #define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40) | ||
63 | #define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48) | ||
64 | /* CPLD code version */ | ||
65 | #define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50) | ||
66 | /* magic word for debug CPLD */ | ||
67 | #define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58) | ||
68 | |||
69 | /* CPLD IRQ line for external uart, external ethernet etc */ | ||
70 | #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1) | ||
71 | |||
72 | #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) | ||
73 | #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) | ||
74 | |||
75 | #define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0) | ||
76 | |||
77 | #define MXC_MAX_EXP_IO_LINES 16 | ||
78 | |||
79 | /* | ||
80 | * This file contains the board-specific initialization routines. | ||
53 | */ | 81 | */ |
54 | 82 | ||
55 | static int mx31_3ds_pins[] = { | 83 | static int mx31_3ds_pins[] = { |
diff --git a/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h b/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h deleted file mode 100644 index da92933a233b..000000000000 --- a/arch/arm/plat-mxc/include/mach/board-mx31_3ds.h +++ /dev/null | |||
@@ -1,59 +0,0 @@ | |||
1 | /* | ||
2 | * Copyright 2008 Freescale Semiconductor, Inc. All Rights Reserved. | ||
3 | */ | ||
4 | |||
5 | /* | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the GNU General Public License version 2 as | ||
8 | * published by the Free Software Foundation. | ||
9 | */ | ||
10 | |||
11 | #ifndef __ASM_ARCH_MXC_BOARD_MX31_3DS_H__ | ||
12 | #define __ASM_ARCH_MXC_BOARD_MX31_3DS_H__ | ||
13 | |||
14 | /* Definitions for components on the Debug board */ | ||
15 | |||
16 | /* Base address of CPLD controller on the Debug board */ | ||
17 | #define DEBUG_BASE_ADDRESS CS5_IO_ADDRESS(CS5_BASE_ADDR) | ||
18 | |||
19 | /* LAN9217 ethernet base address */ | ||
20 | #define LAN9217_BASE_ADDR CS5_BASE_ADDR | ||
21 | |||
22 | /* CPLD config and interrupt base address */ | ||
23 | #define CPLD_ADDR (DEBUG_BASE_ADDRESS + 0x20000) | ||
24 | |||
25 | /* LED switchs */ | ||
26 | #define CPLD_LED_REG (CPLD_ADDR + 0x00) | ||
27 | /* buttons */ | ||
28 | #define CPLD_SWITCH_BUTTONS_REG (EXPIO_ADDR + 0x08) | ||
29 | /* status, interrupt */ | ||
30 | #define CPLD_INT_STATUS_REG (CPLD_ADDR + 0x10) | ||
31 | #define CPLD_INT_MASK_REG (CPLD_ADDR + 0x38) | ||
32 | #define CPLD_INT_RESET_REG (CPLD_ADDR + 0x20) | ||
33 | /* magic word for debug CPLD */ | ||
34 | #define CPLD_MAGIC_NUMBER1_REG (CPLD_ADDR + 0x40) | ||
35 | #define CPLD_MAGIC_NUMBER2_REG (CPLD_ADDR + 0x48) | ||
36 | /* CPLD code version */ | ||
37 | #define CPLD_CODE_VER_REG (CPLD_ADDR + 0x50) | ||
38 | /* magic word for debug CPLD */ | ||
39 | #define CPLD_MAGIC_NUMBER3_REG (CPLD_ADDR + 0x58) | ||
40 | /* module reset register */ | ||
41 | #define CPLD_MODULE_RESET_REG (CPLD_ADDR + 0x60) | ||
42 | /* CPU ID and Personality ID */ | ||
43 | #define CPLD_MCU_BOARD_ID_REG (CPLD_ADDR + 0x68) | ||
44 | |||
45 | /* CPLD IRQ line for external uart, external ethernet etc */ | ||
46 | #define EXPIO_PARENT_INT IOMUX_TO_IRQ(MX31_PIN_GPIO1_1) | ||
47 | |||
48 | #define MXC_EXP_IO_BASE (MXC_BOARD_IRQ_START) | ||
49 | #define MXC_IRQ_TO_EXPIO(irq) ((irq) - MXC_EXP_IO_BASE) | ||
50 | |||
51 | #define EXPIO_INT_ENET (MXC_EXP_IO_BASE + 0) | ||
52 | #define EXPIO_INT_XUART_A (MXC_EXP_IO_BASE + 1) | ||
53 | #define EXPIO_INT_XUART_B (MXC_EXP_IO_BASE + 2) | ||
54 | #define EXPIO_INT_BUTTON_A (MXC_EXP_IO_BASE + 3) | ||
55 | #define EXPIO_INT_BUTTON_B (MXC_EXP_IO_BASE + 4) | ||
56 | |||
57 | #define MXC_MAX_EXP_IO_LINES 16 | ||
58 | |||
59 | #endif /* __ASM_ARCH_MXC_BOARD_MX31_3DS_H__ */ | ||