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-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt19
-rw-r--r--Documentation/devicetree/bindings/tty/serial/msm_serial.txt27
-rw-r--r--arch/arm/boot/dts/imx51-babbage.dts135
-rw-r--r--arch/arm/boot/dts/imx51.dtsi246
-rw-r--r--arch/arm/boot/dts/imx53-ard.dts113
-rw-r--r--arch/arm/boot/dts/imx53-evk.dts120
-rw-r--r--arch/arm/boot/dts/imx53-qsb.dts125
-rw-r--r--arch/arm/boot/dts/imx53-smd.dts169
-rw-r--r--arch/arm/boot/dts/imx53.dtsi301
-rw-r--r--arch/arm/boot/dts/msm8660-surf.dts24
-rw-r--r--arch/arm/mach-msm/board-msm8x60.c58
-rw-r--r--arch/arm/mach-mx5/Kconfig21
-rw-r--r--arch/arm/mach-mx5/Makefile3
-rw-r--r--arch/arm/mach-mx5/board-mx51_babbage.c9
-rw-r--r--arch/arm/mach-mx5/board-mx53_ard.c12
-rw-r--r--arch/arm/mach-mx5/board-mx53_evk.c9
-rw-r--r--arch/arm/mach-mx5/board-mx53_loco.c9
-rw-r--r--arch/arm/mach-mx5/board-mx53_smd.c9
-rw-r--r--arch/arm/mach-mx5/clock-mx51-mx53.c39
-rw-r--r--arch/arm/mach-mx5/imx51-dt.c116
-rw-r--r--arch/arm/mach-mx5/imx53-dt.c126
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h8
-rw-r--r--drivers/tty/serial/msm_serial.c30
23 files changed, 1699 insertions, 29 deletions
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
new file mode 100644
index 000000000000..e2401cd632ab
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -0,0 +1,19 @@
1i.MX51 Babbage Board
2Required root node properties:
3 - compatible = "fsl,imx51-babbage", "fsl,imx51";
4
5i.MX53 Automotive Reference Design Board
6Required root node properties:
7 - compatible = "fsl,imx53-ard", "fsl,imx53";
8
9i.MX53 Evaluation Kit
10Required root node properties:
11 - compatible = "fsl,imx53-evk", "fsl,imx53";
12
13i.MX53 Quick Start Board
14Required root node properties:
15 - compatible = "fsl,imx53-qsb", "fsl,imx53";
16
17i.MX53 Smart Mobile Reference Design Board
18Required root node properties:
19 - compatible = "fsl,imx53-smd", "fsl,imx53";
diff --git a/Documentation/devicetree/bindings/tty/serial/msm_serial.txt b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
new file mode 100644
index 000000000000..aef383eb8876
--- /dev/null
+++ b/Documentation/devicetree/bindings/tty/serial/msm_serial.txt
@@ -0,0 +1,27 @@
1* Qualcomm MSM UART
2
3Required properties:
4- compatible :
5 - "qcom,msm-uart", and one of "qcom,msm-hsuart" or
6 "qcom,msm-lsuart".
7- reg : offset and length of the register set for the device
8 for the hsuart operating in compatible mode, there should be a
9 second pair describing the gsbi registers.
10- interrupts : should contain the uart interrupt.
11
12There are two different UART blocks used in MSM devices,
13"qcom,msm-hsuart" and "qcom,msm-lsuart". The msm-serial driver is
14able to handle both of these, and matches against the "qcom,msm-uart"
15as the compatibility.
16
17The registers for the "qcom,msm-hsuart" device need to specify both
18register blocks, even for the common driver.
19
20Example:
21
22 uart@19c400000 {
23 compatible = "qcom,msm-hsuart", "qcom,msm-uart";
24 reg = <0x19c40000 0x1000>,
25 <0x19c00000 0x1000>;
26 interrupts = <195>;
27 };
diff --git a/arch/arm/boot/dts/imx51-babbage.dts b/arch/arm/boot/dts/imx51-babbage.dts
new file mode 100644
index 000000000000..f8766af11215
--- /dev/null
+++ b/arch/arm/boot/dts/imx51-babbage.dts
@@ -0,0 +1,135 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx51.dtsi"
15
16/ {
17 model = "Freescale i.MX51 Babbage Board";
18 compatible = "fsl,imx51-babbage", "fsl,imx51";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x90000000 0x20000000>;
26 };
27
28 soc {
29 aips@70000000 { /* aips-1 */
30 spba@70000000 {
31 esdhc@70004000 { /* ESDHC1 */
32 fsl,cd-internal;
33 fsl,wp-internal;
34 status = "okay";
35 };
36
37 esdhc@70008000 { /* ESDHC2 */
38 cd-gpios = <&gpio0 6 0>; /* GPIO1_6 */
39 wp-gpios = <&gpio0 5 0>; /* GPIO1_5 */
40 status = "okay";
41 };
42
43 uart2: uart@7000c000 { /* UART3 */
44 fsl,uart-has-rtscts;
45 status = "okay";
46 };
47
48 ecspi@70010000 { /* ECSPI1 */
49 fsl,spi-num-chipselects = <2>;
50 cs-gpios = <&gpio3 24 0>, /* GPIO4_24 */
51 <&gpio3 25 0>; /* GPIO4_25 */
52 status = "okay";
53
54 pmic: mc13892@0 {
55 #address-cells = <1>;
56 #size-cells = <0>;
57 compatible = "fsl,mc13892";
58 spi-max-frequency = <6000000>;
59 reg = <0>;
60 mc13xxx-irq-gpios = <&gpio0 8 0>; /* GPIO1_8 */
61 fsl,mc13xxx-uses-regulator;
62 };
63
64 flash: at45db321d@1 {
65 #address-cells = <1>;
66 #size-cells = <1>;
67 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
68 spi-max-frequency = <25000000>;
69 reg = <1>;
70
71 partition@0 {
72 label = "U-Boot";
73 reg = <0x0 0x40000>;
74 read-only;
75 };
76
77 partition@40000 {
78 label = "Kernel";
79 reg = <0x40000 0x3c0000>;
80 };
81 };
82 };
83 };
84
85 wdog@73f98000 { /* WDOG1 */
86 status = "okay";
87 };
88
89 iomuxc@73fa8000 {
90 compatible = "fsl,imx51-iomuxc-babbage";
91 reg = <0x73fa8000 0x4000>;
92 };
93
94 uart0: uart@73fbc000 {
95 fsl,uart-has-rtscts;
96 status = "okay";
97 };
98
99 uart1: uart@73fc0000 {
100 status = "okay";
101 };
102 };
103
104 aips@80000000 { /* aips-2 */
105 sdma@83fb0000 {
106 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx51.bin";
107 };
108
109 i2c@83fc4000 { /* I2C2 */
110 status = "okay";
111
112 codec: sgtl5000@0a {
113 compatible = "fsl,sgtl5000";
114 reg = <0x0a>;
115 };
116 };
117
118 fec@83fec000 {
119 phy-mode = "mii";
120 status = "okay";
121 };
122 };
123 };
124
125 gpio-keys {
126 compatible = "gpio-keys";
127
128 power {
129 label = "Power Button";
130 gpios = <&gpio1 21 0>;
131 linux,code = <116>; /* KEY_POWER */
132 gpio-key,wakeup;
133 };
134 };
135};
diff --git a/arch/arm/boot/dts/imx51.dtsi b/arch/arm/boot/dts/imx51.dtsi
new file mode 100644
index 000000000000..327ab8e3a4c8
--- /dev/null
+++ b/arch/arm/boot/dts/imx51.dtsi
@@ -0,0 +1,246 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/include/ "skeleton.dtsi"
14
15/ {
16 aliases {
17 serial0 = &uart0;
18 serial1 = &uart1;
19 serial2 = &uart2;
20 };
21
22 tzic: tz-interrupt-controller@e0000000 {
23 compatible = "fsl,imx51-tzic", "fsl,tzic";
24 interrupt-controller;
25 #interrupt-cells = <1>;
26 reg = <0xe0000000 0x4000>;
27 };
28
29 clocks {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 ckil {
34 compatible = "fsl,imx-ckil", "fixed-clock";
35 clock-frequency = <32768>;
36 };
37
38 ckih1 {
39 compatible = "fsl,imx-ckih1", "fixed-clock";
40 clock-frequency = <22579200>;
41 };
42
43 ckih2 {
44 compatible = "fsl,imx-ckih2", "fixed-clock";
45 clock-frequency = <0>;
46 };
47
48 osc {
49 compatible = "fsl,imx-osc", "fixed-clock";
50 clock-frequency = <24000000>;
51 };
52 };
53
54 soc {
55 #address-cells = <1>;
56 #size-cells = <1>;
57 compatible = "simple-bus";
58 interrupt-parent = <&tzic>;
59 ranges;
60
61 aips@70000000 { /* AIPS1 */
62 compatible = "fsl,aips-bus", "simple-bus";
63 #address-cells = <1>;
64 #size-cells = <1>;
65 reg = <0x70000000 0x10000000>;
66 ranges;
67
68 spba@70000000 {
69 compatible = "fsl,spba-bus", "simple-bus";
70 #address-cells = <1>;
71 #size-cells = <1>;
72 reg = <0x70000000 0x40000>;
73 ranges;
74
75 esdhc@70004000 { /* ESDHC1 */
76 compatible = "fsl,imx51-esdhc";
77 reg = <0x70004000 0x4000>;
78 interrupts = <1>;
79 status = "disabled";
80 };
81
82 esdhc@70008000 { /* ESDHC2 */
83 compatible = "fsl,imx51-esdhc";
84 reg = <0x70008000 0x4000>;
85 interrupts = <2>;
86 status = "disabled";
87 };
88
89 uart2: uart@7000c000 { /* UART3 */
90 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
91 reg = <0x7000c000 0x4000>;
92 interrupts = <33>;
93 status = "disabled";
94 };
95
96 ecspi@70010000 { /* ECSPI1 */
97 #address-cells = <1>;
98 #size-cells = <0>;
99 compatible = "fsl,imx51-ecspi";
100 reg = <0x70010000 0x4000>;
101 interrupts = <36>;
102 status = "disabled";
103 };
104
105 esdhc@70020000 { /* ESDHC3 */
106 compatible = "fsl,imx51-esdhc";
107 reg = <0x70020000 0x4000>;
108 interrupts = <3>;
109 status = "disabled";
110 };
111
112 esdhc@70024000 { /* ESDHC4 */
113 compatible = "fsl,imx51-esdhc";
114 reg = <0x70024000 0x4000>;
115 interrupts = <4>;
116 status = "disabled";
117 };
118 };
119
120 gpio0: gpio@73f84000 { /* GPIO1 */
121 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
122 reg = <0x73f84000 0x4000>;
123 interrupts = <50 51>;
124 gpio-controller;
125 #gpio-cells = <2>;
126 interrupt-controller;
127 #interrupt-cells = <1>;
128 };
129
130 gpio1: gpio@73f88000 { /* GPIO2 */
131 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
132 reg = <0x73f88000 0x4000>;
133 interrupts = <52 53>;
134 gpio-controller;
135 #gpio-cells = <2>;
136 interrupt-controller;
137 #interrupt-cells = <1>;
138 };
139
140 gpio2: gpio@73f8c000 { /* GPIO3 */
141 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
142 reg = <0x73f8c000 0x4000>;
143 interrupts = <54 55>;
144 gpio-controller;
145 #gpio-cells = <2>;
146 interrupt-controller;
147 #interrupt-cells = <1>;
148 };
149
150 gpio3: gpio@73f90000 { /* GPIO4 */
151 compatible = "fsl,imx51-gpio", "fsl,imx31-gpio";
152 reg = <0x73f90000 0x4000>;
153 interrupts = <56 57>;
154 gpio-controller;
155 #gpio-cells = <2>;
156 interrupt-controller;
157 #interrupt-cells = <1>;
158 };
159
160 wdog@73f98000 { /* WDOG1 */
161 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
162 reg = <0x73f98000 0x4000>;
163 interrupts = <58>;
164 status = "disabled";
165 };
166
167 wdog@73f9c000 { /* WDOG2 */
168 compatible = "fsl,imx51-wdt", "fsl,imx21-wdt";
169 reg = <0x73f9c000 0x4000>;
170 interrupts = <59>;
171 status = "disabled";
172 };
173
174 uart0: uart@73fbc000 {
175 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
176 reg = <0x73fbc000 0x4000>;
177 interrupts = <31>;
178 status = "disabled";
179 };
180
181 uart1: uart@73fc0000 {
182 compatible = "fsl,imx51-uart", "fsl,imx21-uart";
183 reg = <0x73fc0000 0x4000>;
184 interrupts = <32>;
185 status = "disabled";
186 };
187 };
188
189 aips@80000000 { /* AIPS2 */
190 compatible = "fsl,aips-bus", "simple-bus";
191 #address-cells = <1>;
192 #size-cells = <1>;
193 reg = <0x80000000 0x10000000>;
194 ranges;
195
196 ecspi@83fac000 { /* ECSPI2 */
197 #address-cells = <1>;
198 #size-cells = <0>;
199 compatible = "fsl,imx51-ecspi";
200 reg = <0x83fac000 0x4000>;
201 interrupts = <37>;
202 status = "disabled";
203 };
204
205 sdma@83fb0000 {
206 compatible = "fsl,imx51-sdma", "fsl,imx35-sdma";
207 reg = <0x83fb0000 0x4000>;
208 interrupts = <6>;
209 };
210
211 cspi@83fc0000 {
212 #address-cells = <1>;
213 #size-cells = <0>;
214 compatible = "fsl,imx51-cspi", "fsl,imx35-cspi";
215 reg = <0x83fc0000 0x4000>;
216 interrupts = <38>;
217 status = "disabled";
218 };
219
220 i2c@83fc4000 { /* I2C2 */
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
224 reg = <0x83fc4000 0x4000>;
225 interrupts = <63>;
226 status = "disabled";
227 };
228
229 i2c@83fc8000 { /* I2C1 */
230 #address-cells = <1>;
231 #size-cells = <0>;
232 compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
233 reg = <0x83fc8000 0x4000>;
234 interrupts = <62>;
235 status = "disabled";
236 };
237
238 fec@83fec000 {
239 compatible = "fsl,imx51-fec", "fsl,imx27-fec";
240 reg = <0x83fec000 0x4000>;
241 interrupts = <87>;
242 status = "disabled";
243 };
244 };
245 };
246};
diff --git a/arch/arm/boot/dts/imx53-ard.dts b/arch/arm/boot/dts/imx53-ard.dts
new file mode 100644
index 000000000000..2ab7f80a0a35
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-ard.dts
@@ -0,0 +1,113 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Automotive Reference Design Board";
18 compatible = "fsl,imx53-ard", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x40000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio0 1 0>; /* GPIO1_1 */
33 wp-gpios = <&gpio0 9 0>; /* GPIO1_9 */
34 status = "okay";
35 };
36 };
37
38 wdog@53f98000 { /* WDOG1 */
39 status = "okay";
40 };
41
42 iomuxc@53fa8000 {
43 compatible = "fsl,imx53-iomuxc-ard";
44 reg = <0x53fa8000 0x4000>;
45 };
46
47 uart0: uart@53fbc000 { /* UART1 */
48 status = "okay";
49 };
50 };
51
52 aips@60000000 { /* AIPS2 */
53 sdma@63fb0000 {
54 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
55 };
56 };
57 };
58
59 eim-cs1@f4000000 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 compatible = "fsl,eim-bus", "simple-bus";
63 reg = <0xf4000000 0x3ff0000>;
64 ranges;
65
66 lan9220@f4000000 {
67 compatible = "smsc,lan9220", "smsc,lan9115";
68 reg = <0xf4000000 0x2000000>;
69 phy-mode = "mii";
70 interrupt-parent = <&gpio1>;
71 interrupts = <31>;
72 reg-io-width = <4>;
73 smsc,irq-push-pull;
74 };
75 };
76
77 gpio-keys {
78 compatible = "gpio-keys";
79
80 home {
81 label = "Home";
82 gpios = <&gpio4 10 0>; /* GPIO5_10 */
83 linux,code = <102>; /* KEY_HOME */
84 gpio-key,wakeup;
85 };
86
87 back {
88 label = "Back";
89 gpios = <&gpio4 11 0>; /* GPIO5_11 */
90 linux,code = <158>; /* KEY_BACK */
91 gpio-key,wakeup;
92 };
93
94 program {
95 label = "Program";
96 gpios = <&gpio4 12 0>; /* GPIO5_12 */
97 linux,code = <362>; /* KEY_PROGRAM */
98 gpio-key,wakeup;
99 };
100
101 volume-up {
102 label = "Volume Up";
103 gpios = <&gpio4 13 0>; /* GPIO5_13 */
104 linux,code = <115>; /* KEY_VOLUMEUP */
105 };
106
107 volume-down {
108 label = "Volume Down";
109 gpios = <&gpio3 0 0>; /* GPIO4_0 */
110 linux,code = <114>; /* KEY_VOLUMEDOWN */
111 };
112 };
113};
diff --git a/arch/arm/boot/dts/imx53-evk.dts b/arch/arm/boot/dts/imx53-evk.dts
new file mode 100644
index 000000000000..3f3a88185ff8
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-evk.dts
@@ -0,0 +1,120 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Evaluation Kit";
18 compatible = "fsl,imx53-evk", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x80000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
33 wp-gpios = <&gpio2 14 0>; /* GPIO3_14 */
34 status = "okay";
35 };
36
37 ecspi@50010000 { /* ECSPI1 */
38 fsl,spi-num-chipselects = <2>;
39 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
40 <&gpio2 19 0>; /* GPIO3_19 */
41 status = "okay";
42
43 flash: at45db321d@1 {
44 #address-cells = <1>;
45 #size-cells = <1>;
46 compatible = "atmel,at45db321d", "atmel,at45", "atmel,dataflash";
47 spi-max-frequency = <25000000>;
48 reg = <1>;
49
50 partition@0 {
51 label = "U-Boot";
52 reg = <0x0 0x40000>;
53 read-only;
54 };
55
56 partition@40000 {
57 label = "Kernel";
58 reg = <0x40000 0x3c0000>;
59 };
60 };
61 };
62
63 esdhc@50020000 { /* ESDHC3 */
64 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
65 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
66 status = "okay";
67 };
68 };
69
70 wdog@53f98000 { /* WDOG1 */
71 status = "okay";
72 };
73
74 iomuxc@53fa8000 {
75 compatible = "fsl,imx53-iomuxc-evk";
76 reg = <0x53fa8000 0x4000>;
77 };
78
79 uart0: uart@53fbc000 { /* UART1 */
80 status = "okay";
81 };
82 };
83
84 aips@60000000 { /* AIPS2 */
85 sdma@63fb0000 {
86 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
87 };
88
89 i2c@63fc4000 { /* I2C2 */
90 status = "okay";
91
92 pmic: mc13892@08 {
93 compatible = "fsl,mc13892", "fsl,mc13xxx";
94 reg = <0x08>;
95 };
96
97 codec: sgtl5000@0a {
98 compatible = "fsl,sgtl5000";
99 reg = <0x0a>;
100 };
101 };
102
103 fec@63fec000 {
104 phy-mode = "rmii";
105 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
106 status = "okay";
107 };
108 };
109 };
110
111 leds {
112 compatible = "gpio-leds";
113
114 green {
115 label = "Heartbeat";
116 gpios = <&gpio6 7 0>; /* GPIO7_7 */
117 linux,default-trigger = "heartbeat";
118 };
119 };
120};
diff --git a/arch/arm/boot/dts/imx53-qsb.dts b/arch/arm/boot/dts/imx53-qsb.dts
new file mode 100644
index 000000000000..ae6de6d0c3f1
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-qsb.dts
@@ -0,0 +1,125 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Quick Start Board";
18 compatible = "fsl,imx53-qsb", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x40000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
33 status = "okay";
34 };
35
36 esdhc@50020000 { /* ESDHC3 */
37 cd-gpios = <&gpio2 11 0>; /* GPIO3_11 */
38 wp-gpios = <&gpio2 12 0>; /* GPIO3_12 */
39 status = "okay";
40 };
41 };
42
43 wdog@53f98000 { /* WDOG1 */
44 status = "okay";
45 };
46
47 iomuxc@53fa8000 {
48 compatible = "fsl,imx53-iomuxc-qsb";
49 reg = <0x53fa8000 0x4000>;
50 };
51
52 uart0: uart@53fbc000 { /* UART1 */
53 status = "okay";
54 };
55 };
56
57 aips@60000000 { /* AIPS2 */
58 sdma@63fb0000 {
59 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
60 };
61
62 i2c@63fc4000 { /* I2C2 */
63 status = "okay";
64
65 codec: sgtl5000@0a {
66 compatible = "fsl,sgtl5000";
67 reg = <0x0a>;
68 };
69 };
70
71 i2c@63fc8000 { /* I2C1 */
72 status = "okay";
73
74 accelerometer: mma8450@1c {
75 compatible = "fsl,mma8450";
76 reg = <0x1c>;
77 };
78
79 pmic: dialog@48 {
80 compatible = "dialog,da9053", "dialog,da9052";
81 reg = <0x48>;
82 };
83 };
84
85 fec@63fec000 {
86 phy-mode = "rmii";
87 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
88 status = "okay";
89 };
90 };
91 };
92
93 gpio-keys {
94 compatible = "gpio-keys";
95
96 power {
97 label = "Power Button";
98 gpios = <&gpio0 8 0>; /* GPIO1_8 */
99 linux,code = <116>; /* KEY_POWER */
100 gpio-key,wakeup;
101 };
102
103 volume-up {
104 label = "Volume Up";
105 gpios = <&gpio1 14 0>; /* GPIO2_14 */
106 linux,code = <115>; /* KEY_VOLUMEUP */
107 };
108
109 volume-down {
110 label = "Volume Down";
111 gpios = <&gpio1 15 0>; /* GPIO2_15 */
112 linux,code = <114>; /* KEY_VOLUMEDOWN */
113 };
114 };
115
116 leds {
117 compatible = "gpio-leds";
118
119 user {
120 label = "Heartbeat";
121 gpios = <&gpio6 7 0>; /* GPIO7_7 */
122 linux,default-trigger = "heartbeat";
123 };
124 };
125};
diff --git a/arch/arm/boot/dts/imx53-smd.dts b/arch/arm/boot/dts/imx53-smd.dts
new file mode 100644
index 000000000000..b1c062eea715
--- /dev/null
+++ b/arch/arm/boot/dts/imx53-smd.dts
@@ -0,0 +1,169 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/dts-v1/;
14/include/ "imx53.dtsi"
15
16/ {
17 model = "Freescale i.MX53 Smart Mobile Reference Design Board";
18 compatible = "fsl,imx53-smd", "fsl,imx53";
19
20 chosen {
21 bootargs = "console=ttymxc0,115200 root=/dev/mmcblk0p3 rootwait";
22 };
23
24 memory {
25 reg = <0x70000000 0x40000000>;
26 };
27
28 soc {
29 aips@50000000 { /* AIPS1 */
30 spba@50000000 {
31 esdhc@50004000 { /* ESDHC1 */
32 cd-gpios = <&gpio2 13 0>; /* GPIO3_13 */
33 wp-gpios = <&gpio3 11 0>; /* GPIO4_11 */
34 status = "okay";
35 };
36
37 esdhc@50008000 { /* ESDHC2 */
38 fsl,card-wired;
39 status = "okay";
40 };
41
42 uart2: uart@5000c000 { /* UART3 */
43 fsl,uart-has-rtscts;
44 status = "okay";
45 };
46
47 ecspi@50010000 { /* ECSPI1 */
48 fsl,spi-num-chipselects = <2>;
49 cs-gpios = <&gpio1 30 0>, /* GPIO2_30 */
50 <&gpio2 19 0>; /* GPIO3_19 */
51 status = "okay";
52
53 zigbee: mc1323@0 {
54 compatible = "fsl,mc1323";
55 spi-max-frequency = <8000000>;
56 reg = <0>;
57 };
58
59 flash: m25p32@1 {
60 #address-cells = <1>;
61 #size-cells = <1>;
62 compatible = "st,m25p32", "st,m25p";
63 spi-max-frequency = <20000000>;
64 reg = <1>;
65
66 partition@0 {
67 label = "U-Boot";
68 reg = <0x0 0x40000>;
69 read-only;
70 };
71
72 partition@40000 {
73 label = "Kernel";
74 reg = <0x40000 0x3c0000>;
75 };
76 };
77 };
78
79 esdhc@50020000 { /* ESDHC3 */
80 fsl,card-wired;
81 status = "okay";
82 };
83 };
84
85 wdog@53f98000 { /* WDOG1 */
86 status = "okay";
87 };
88
89 iomuxc@53fa8000 {
90 compatible = "fsl,imx53-iomuxc-smd";
91 reg = <0x53fa8000 0x4000>;
92 };
93
94 uart0: uart@53fbc000 { /* UART1 */
95 status = "okay";
96 };
97
98 uart1: uart@53fc0000 { /* UART2 */
99 status = "okay";
100 };
101 };
102
103 aips@60000000 { /* AIPS2 */
104 sdma@63fb0000 {
105 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx53.bin";
106 };
107
108 i2c@63fc4000 { /* I2C2 */
109 status = "okay";
110
111 codec: sgtl5000@0a {
112 compatible = "fsl,sgtl5000";
113 reg = <0x0a>;
114 };
115
116 magnetometer: mag3110@0e {
117 compatible = "fsl,mag3110";
118 reg = <0x0e>;
119 };
120
121 touchkey: mpr121@5a {
122 compatible = "fsl,mpr121";
123 reg = <0x5a>;
124 };
125 };
126
127 i2c@63fc8000 { /* I2C1 */
128 status = "okay";
129
130 accelerometer: mma8450@1c {
131 compatible = "fsl,mma8450";
132 reg = <0x1c>;
133 };
134
135 camera: ov5642@3c {
136 compatible = "ovti,ov5642";
137 reg = <0x3c>;
138 };
139
140 pmic: dialog@48 {
141 compatible = "dialog,da9053", "dialog,da9052";
142 reg = <0x48>;
143 };
144 };
145
146 fec@63fec000 {
147 phy-mode = "rmii";
148 phy-reset-gpios = <&gpio6 6 0>; /* GPIO7_6 */
149 status = "okay";
150 };
151 };
152 };
153
154 gpio-keys {
155 compatible = "gpio-keys";
156
157 volume-up {
158 label = "Volume Up";
159 gpios = <&gpio1 14 0>; /* GPIO2_14 */
160 linux,code = <115>; /* KEY_VOLUMEUP */
161 };
162
163 volume-down {
164 label = "Volume Down";
165 gpios = <&gpio1 15 0>; /* GPIO2_15 */
166 linux,code = <114>; /* KEY_VOLUMEDOWN */
167 };
168 };
169};
diff --git a/arch/arm/boot/dts/imx53.dtsi b/arch/arm/boot/dts/imx53.dtsi
new file mode 100644
index 000000000000..099cd84ee372
--- /dev/null
+++ b/arch/arm/boot/dts/imx53.dtsi
@@ -0,0 +1,301 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13/include/ "skeleton.dtsi"
14
15/ {
16 aliases {
17 serial0 = &uart0;
18 serial1 = &uart1;
19 serial2 = &uart2;
20 serial3 = &uart3;
21 serial4 = &uart4;
22 };
23
24 tzic: tz-interrupt-controller@0fffc000 {
25 compatible = "fsl,imx53-tzic", "fsl,tzic";
26 interrupt-controller;
27 #interrupt-cells = <1>;
28 reg = <0x0fffc000 0x4000>;
29 };
30
31 clocks {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 ckil {
36 compatible = "fsl,imx-ckil", "fixed-clock";
37 clock-frequency = <32768>;
38 };
39
40 ckih1 {
41 compatible = "fsl,imx-ckih1", "fixed-clock";
42 clock-frequency = <22579200>;
43 };
44
45 ckih2 {
46 compatible = "fsl,imx-ckih2", "fixed-clock";
47 clock-frequency = <0>;
48 };
49
50 osc {
51 compatible = "fsl,imx-osc", "fixed-clock";
52 clock-frequency = <24000000>;
53 };
54 };
55
56 soc {
57 #address-cells = <1>;
58 #size-cells = <1>;
59 compatible = "simple-bus";
60 interrupt-parent = <&tzic>;
61 ranges;
62
63 aips@50000000 { /* AIPS1 */
64 compatible = "fsl,aips-bus", "simple-bus";
65 #address-cells = <1>;
66 #size-cells = <1>;
67 reg = <0x50000000 0x10000000>;
68 ranges;
69
70 spba@50000000 {
71 compatible = "fsl,spba-bus", "simple-bus";
72 #address-cells = <1>;
73 #size-cells = <1>;
74 reg = <0x50000000 0x40000>;
75 ranges;
76
77 esdhc@50004000 { /* ESDHC1 */
78 compatible = "fsl,imx53-esdhc";
79 reg = <0x50004000 0x4000>;
80 interrupts = <1>;
81 status = "disabled";
82 };
83
84 esdhc@50008000 { /* ESDHC2 */
85 compatible = "fsl,imx53-esdhc";
86 reg = <0x50008000 0x4000>;
87 interrupts = <2>;
88 status = "disabled";
89 };
90
91 uart2: uart@5000c000 { /* UART3 */
92 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
93 reg = <0x5000c000 0x4000>;
94 interrupts = <33>;
95 status = "disabled";
96 };
97
98 ecspi@50010000 { /* ECSPI1 */
99 #address-cells = <1>;
100 #size-cells = <0>;
101 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
102 reg = <0x50010000 0x4000>;
103 interrupts = <36>;
104 status = "disabled";
105 };
106
107 esdhc@50020000 { /* ESDHC3 */
108 compatible = "fsl,imx53-esdhc";
109 reg = <0x50020000 0x4000>;
110 interrupts = <3>;
111 status = "disabled";
112 };
113
114 esdhc@50024000 { /* ESDHC4 */
115 compatible = "fsl,imx53-esdhc";
116 reg = <0x50024000 0x4000>;
117 interrupts = <4>;
118 status = "disabled";
119 };
120 };
121
122 gpio0: gpio@53f84000 { /* GPIO1 */
123 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
124 reg = <0x53f84000 0x4000>;
125 interrupts = <50 51>;
126 gpio-controller;
127 #gpio-cells = <2>;
128 interrupt-controller;
129 #interrupt-cells = <1>;
130 };
131
132 gpio1: gpio@53f88000 { /* GPIO2 */
133 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
134 reg = <0x53f88000 0x4000>;
135 interrupts = <52 53>;
136 gpio-controller;
137 #gpio-cells = <2>;
138 interrupt-controller;
139 #interrupt-cells = <1>;
140 };
141
142 gpio2: gpio@53f8c000 { /* GPIO3 */
143 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
144 reg = <0x53f8c000 0x4000>;
145 interrupts = <54 55>;
146 gpio-controller;
147 #gpio-cells = <2>;
148 interrupt-controller;
149 #interrupt-cells = <1>;
150 };
151
152 gpio3: gpio@53f90000 { /* GPIO4 */
153 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
154 reg = <0x53f90000 0x4000>;
155 interrupts = <56 57>;
156 gpio-controller;
157 #gpio-cells = <2>;
158 interrupt-controller;
159 #interrupt-cells = <1>;
160 };
161
162 wdog@53f98000 { /* WDOG1 */
163 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
164 reg = <0x53f98000 0x4000>;
165 interrupts = <58>;
166 status = "disabled";
167 };
168
169 wdog@53f9c000 { /* WDOG2 */
170 compatible = "fsl,imx53-wdt", "fsl,imx21-wdt";
171 reg = <0x53f9c000 0x4000>;
172 interrupts = <59>;
173 status = "disabled";
174 };
175
176 uart0: uart@53fbc000 { /* UART1 */
177 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
178 reg = <0x53fbc000 0x4000>;
179 interrupts = <31>;
180 status = "disabled";
181 };
182
183 uart1: uart@53fc0000 { /* UART2 */
184 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
185 reg = <0x53fc0000 0x4000>;
186 interrupts = <32>;
187 status = "disabled";
188 };
189
190 gpio4: gpio@53fdc000 { /* GPIO5 */
191 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
192 reg = <0x53fdc000 0x4000>;
193 interrupts = <103 104>;
194 gpio-controller;
195 #gpio-cells = <2>;
196 interrupt-controller;
197 #interrupt-cells = <1>;
198 };
199
200 gpio5: gpio@53fe0000 { /* GPIO6 */
201 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
202 reg = <0x53fe0000 0x4000>;
203 interrupts = <105 106>;
204 gpio-controller;
205 #gpio-cells = <2>;
206 interrupt-controller;
207 #interrupt-cells = <1>;
208 };
209
210 gpio6: gpio@53fe4000 { /* GPIO7 */
211 compatible = "fsl,imx53-gpio", "fsl,imx31-gpio";
212 reg = <0x53fe4000 0x4000>;
213 interrupts = <107 108>;
214 gpio-controller;
215 #gpio-cells = <2>;
216 interrupt-controller;
217 #interrupt-cells = <1>;
218 };
219
220 i2c@53fec000 { /* I2C3 */
221 #address-cells = <1>;
222 #size-cells = <0>;
223 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
224 reg = <0x53fec000 0x4000>;
225 interrupts = <64>;
226 status = "disabled";
227 };
228
229 uart3: uart@53ff0000 { /* UART4 */
230 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
231 reg = <0x53ff0000 0x4000>;
232 interrupts = <13>;
233 status = "disabled";
234 };
235 };
236
237 aips@60000000 { /* AIPS2 */
238 compatible = "fsl,aips-bus", "simple-bus";
239 #address-cells = <1>;
240 #size-cells = <1>;
241 reg = <0x60000000 0x10000000>;
242 ranges;
243
244 uart4: uart@63f90000 { /* UART5 */
245 compatible = "fsl,imx53-uart", "fsl,imx21-uart";
246 reg = <0x63f90000 0x4000>;
247 interrupts = <86>;
248 status = "disabled";
249 };
250
251 ecspi@63fac000 { /* ECSPI2 */
252 #address-cells = <1>;
253 #size-cells = <0>;
254 compatible = "fsl,imx53-ecspi", "fsl,imx51-ecspi";
255 reg = <0x63fac000 0x4000>;
256 interrupts = <37>;
257 status = "disabled";
258 };
259
260 sdma@63fb0000 {
261 compatible = "fsl,imx53-sdma", "fsl,imx35-sdma";
262 reg = <0x63fb0000 0x4000>;
263 interrupts = <6>;
264 };
265
266 cspi@63fc0000 {
267 #address-cells = <1>;
268 #size-cells = <0>;
269 compatible = "fsl,imx53-cspi", "fsl,imx35-cspi";
270 reg = <0x63fc0000 0x4000>;
271 interrupts = <38>;
272 status = "disabled";
273 };
274
275 i2c@63fc4000 { /* I2C2 */
276 #address-cells = <1>;
277 #size-cells = <0>;
278 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
279 reg = <0x63fc4000 0x4000>;
280 interrupts = <63>;
281 status = "disabled";
282 };
283
284 i2c@63fc8000 { /* I2C1 */
285 #address-cells = <1>;
286 #size-cells = <0>;
287 compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
288 reg = <0x63fc8000 0x4000>;
289 interrupts = <62>;
290 status = "disabled";
291 };
292
293 fec@63fec000 {
294 compatible = "fsl,imx53-fec", "fsl,imx25-fec";
295 reg = <0x63fec000 0x4000>;
296 interrupts = <87>;
297 status = "disabled";
298 };
299 };
300 };
301};
diff --git a/arch/arm/boot/dts/msm8660-surf.dts b/arch/arm/boot/dts/msm8660-surf.dts
new file mode 100644
index 000000000000..15ded0deaa79
--- /dev/null
+++ b/arch/arm/boot/dts/msm8660-surf.dts
@@ -0,0 +1,24 @@
1/dts-v1/;
2
3/include/ "skeleton.dtsi"
4
5/ {
6 model = "Qualcomm MSM8660 SURF";
7 compatible = "qcom,msm8660-surf", "qcom,msm8660";
8 interrupt-parent = <&intc>;
9
10 intc: interrupt-controller@02080000 {
11 compatible = "qcom,msm-8660-qgic";
12 interrupt-controller;
13 #interrupt-cells = <1>;
14 reg = < 0x02080000 0x1000 >,
15 < 0x02081000 0x1000 >;
16 };
17
18 serial@19c400000 {
19 compatible = "qcom,msm-hsuart", "qcom,msm-uart";
20 reg = <0x19c40000 0x1000>,
21 <0x19c00000 0x1000>;
22 interrupts = <195>;
23 };
24};
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 1163b6fd05d2..10fa8f6e32c9 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -1,4 +1,4 @@
1/* Copyright (c) 2010, Code Aurora Forum. All rights reserved. 1/* Copyright (c) 2010, 2011, Code Aurora Forum. All rights reserved.
2 * 2 *
3 * This program is free software; you can redistribute it and/or modify 3 * This program is free software; you can redistribute it and/or modify
4 * it under the terms of the GNU General Public License version 2 and 4 * it under the terms of the GNU General Public License version 2 and
@@ -8,18 +8,16 @@
8 * but WITHOUT ANY WARRANTY; without even the implied warranty of 8 * but WITHOUT ANY WARRANTY; without even the implied warranty of
9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 9 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
10 * GNU General Public License for more details. 10 * GNU General Public License for more details.
11 *
12 * You should have received a copy of the GNU General Public License
13 * along with this program; if not, write to the Free Software
14 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
15 * 02110-1301, USA.
16 *
17 */ 11 */
18 12
19#include <linux/kernel.h> 13#include <linux/kernel.h>
20#include <linux/platform_device.h> 14#include <linux/platform_device.h>
21#include <linux/io.h> 15#include <linux/io.h>
22#include <linux/irq.h> 16#include <linux/irq.h>
17#include <linux/irqdomain.h>
18#include <linux/of.h>
19#include <linux/of_address.h>
20#include <linux/of_platform.h>
23 21
24#include <asm/mach-types.h> 22#include <asm/mach-types.h>
25#include <asm/mach/arch.h> 23#include <asm/mach/arch.h>
@@ -64,6 +62,41 @@ static void __init msm8x60_init(void)
64{ 62{
65} 63}
66 64
65#ifdef CONFIG_OF
66static struct of_dev_auxdata msm_auxdata_lookup[] __initdata = {
67 {}
68};
69
70static struct of_device_id msm_dt_gic_match[] __initdata = {
71 { .compatible = "qcom,msm-8660-qgic", },
72 {}
73};
74
75static void __init msm8x60_dt_init(void)
76{
77 struct device_node *node;
78
79 node = of_find_matching_node_by_address(NULL, msm_dt_gic_match,
80 MSM8X60_QGIC_DIST_PHYS);
81 if (node)
82 irq_domain_add_simple(node, GIC_SPI_START);
83
84 if (of_machine_is_compatible("qcom,msm8660-surf")) {
85 printk(KERN_INFO "Init surf UART registers\n");
86 msm8x60_init_uart12dm();
87 }
88
89 of_platform_populate(NULL, of_default_bus_match_table,
90 msm_auxdata_lookup, NULL);
91}
92
93static const char *msm8x60_fluid_match[] __initdata = {
94 "qcom,msm8660-fluid",
95 "qcom,msm8660-surf",
96 NULL
97};
98#endif /* CONFIG_OF */
99
67MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3") 100MACHINE_START(MSM8X60_RUMI3, "QCT MSM8X60 RUMI3")
68 .map_io = msm8x60_map_io, 101 .map_io = msm8x60_map_io,
69 .init_irq = msm8x60_init_irq, 102 .init_irq = msm8x60_init_irq,
@@ -91,3 +124,14 @@ MACHINE_START(MSM8X60_FFA, "QCT MSM8X60 FFA")
91 .init_machine = msm8x60_init, 124 .init_machine = msm8x60_init,
92 .timer = &msm_timer, 125 .timer = &msm_timer,
93MACHINE_END 126MACHINE_END
127
128#ifdef CONFIG_OF
129/* TODO: General device tree support for all MSM. */
130DT_MACHINE_START(MSM_DT, "Qualcomm MSM (Flattened Device Tree)")
131 .map_io = msm8x60_map_io,
132 .init_irq = msm8x60_init_irq,
133 .init_machine = msm8x60_dt_init,
134 .timer = &msm_timer,
135 .dt_compat = msm8x60_fluid_match,
136MACHINE_END
137#endif /* CONFIG_OF */
diff --git a/arch/arm/mach-mx5/Kconfig b/arch/arm/mach-mx5/Kconfig
index b4e7c58bbb38..bda12e84429a 100644
--- a/arch/arm/mach-mx5/Kconfig
+++ b/arch/arm/mach-mx5/Kconfig
@@ -62,6 +62,15 @@ endif # ARCH_MX50_SUPPORTED
62if ARCH_MX51 62if ARCH_MX51
63comment "i.MX51 machines:" 63comment "i.MX51 machines:"
64 64
65config MACH_IMX51_DT
66 bool "Support i.MX51 platforms from device tree"
67 select SOC_IMX51
68 select USE_OF
69 select MACH_MX51_BABBAGE
70 help
71 Include support for Freescale i.MX51 based platforms
72 using the device tree for discovery
73
65config MACH_MX51_BABBAGE 74config MACH_MX51_BABBAGE
66 bool "Support MX51 BABBAGE platforms" 75 bool "Support MX51 BABBAGE platforms"
67 select SOC_IMX51 76 select SOC_IMX51
@@ -172,6 +181,18 @@ endif # ARCH_MX51
172if ARCH_MX53_SUPPORTED 181if ARCH_MX53_SUPPORTED
173comment "i.MX53 machines:" 182comment "i.MX53 machines:"
174 183
184config MACH_IMX53_DT
185 bool "Support i.MX53 platforms from device tree"
186 select SOC_IMX53
187 select USE_OF
188 select MACH_MX53_ARD
189 select MACH_MX53_EVK
190 select MACH_MX53_LOCO
191 select MACH_MX53_SMD
192 help
193 Include support for Freescale i.MX53 based platforms
194 using the device tree for discovery
195
175config MACH_MX53_EVK 196config MACH_MX53_EVK
176 bool "Support MX53 EVK platforms" 197 bool "Support MX53 EVK platforms"
177 select SOC_IMX53 198 select SOC_IMX53
diff --git a/arch/arm/mach-mx5/Makefile b/arch/arm/mach-mx5/Makefile
index 383e7cd3fbcb..a3c75f368f4b 100644
--- a/arch/arm/mach-mx5/Makefile
+++ b/arch/arm/mach-mx5/Makefile
@@ -22,3 +22,6 @@ obj-$(CONFIG_MX51_EFIKA_COMMON) += mx51_efika.o
22obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o 22obj-$(CONFIG_MACH_MX51_EFIKAMX) += board-mx51_efikamx.o
23obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o 23obj-$(CONFIG_MACH_MX51_EFIKASB) += board-mx51_efikasb.o
24obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o 24obj-$(CONFIG_MACH_MX50_RDP) += board-mx50_rdp.o
25
26obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
27obj-$(CONFIG_MACH_IMX53_DT) += imx53-dt.o
diff --git a/arch/arm/mach-mx5/board-mx51_babbage.c b/arch/arm/mach-mx5/board-mx51_babbage.c
index 11b0ff67f89d..5cc28e0ce3e5 100644
--- a/arch/arm/mach-mx5/board-mx51_babbage.c
+++ b/arch/arm/mach-mx5/board-mx51_babbage.c
@@ -351,6 +351,12 @@ static const struct esdhc_platform_data mx51_babbage_sd2_data __initconst = {
351 .wp_type = ESDHC_WP_GPIO, 351 .wp_type = ESDHC_WP_GPIO,
352}; 352};
353 353
354void __init imx51_babbage_common_init(void)
355{
356 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads,
357 ARRAY_SIZE(mx51babbage_pads));
358}
359
354/* 360/*
355 * Board specific initialization. 361 * Board specific initialization.
356 */ 362 */
@@ -365,8 +371,7 @@ static void __init mx51_babbage_init(void)
365#if defined(CONFIG_CPU_FREQ_IMX) 371#if defined(CONFIG_CPU_FREQ_IMX)
366 get_cpu_op = mx51_get_cpu_op; 372 get_cpu_op = mx51_get_cpu_op;
367#endif 373#endif
368 mxc_iomux_v3_setup_multiple_pads(mx51babbage_pads, 374 imx51_babbage_common_init();
369 ARRAY_SIZE(mx51babbage_pads));
370 375
371 imx51_add_imx_uart(0, &uart_pdata); 376 imx51_add_imx_uart(0, &uart_pdata);
372 imx51_add_imx_uart(1, NULL); 377 imx51_add_imx_uart(1, NULL);
diff --git a/arch/arm/mach-mx5/board-mx53_ard.c b/arch/arm/mach-mx5/board-mx53_ard.c
index 76a67c4a2a0b..9b4395d7a07c 100644
--- a/arch/arm/mach-mx5/board-mx53_ard.c
+++ b/arch/arm/mach-mx5/board-mx53_ard.c
@@ -171,9 +171,6 @@ static struct imxi2c_platform_data mx53_ard_i2c3_data = {
171 171
172static void __init mx53_ard_io_init(void) 172static void __init mx53_ard_io_init(void)
173{ 173{
174 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
175 ARRAY_SIZE(mx53_ard_pads));
176
177 gpio_request(ARD_ETHERNET_INT_B, "eth-int-b"); 174 gpio_request(ARD_ETHERNET_INT_B, "eth-int-b");
178 gpio_direction_input(ARD_ETHERNET_INT_B); 175 gpio_direction_input(ARD_ETHERNET_INT_B);
179 176
@@ -216,6 +213,13 @@ static int weim_cs_config(void)
216 return 0; 213 return 0;
217} 214}
218 215
216void __init imx53_ard_common_init(void)
217{
218 mxc_iomux_v3_setup_multiple_pads(mx53_ard_pads,
219 ARRAY_SIZE(mx53_ard_pads));
220 weim_cs_config();
221}
222
219static struct platform_device *devices[] __initdata = { 223static struct platform_device *devices[] __initdata = {
220 &ard_smsc_lan9220_device, 224 &ard_smsc_lan9220_device,
221}; 225};
@@ -225,8 +229,8 @@ static void __init mx53_ard_board_init(void)
225 imx53_soc_init(); 229 imx53_soc_init();
226 imx53_add_imx_uart(0, NULL); 230 imx53_add_imx_uart(0, NULL);
227 231
232 imx53_ard_common_init();
228 mx53_ard_io_init(); 233 mx53_ard_io_init();
229 weim_cs_config();
230 platform_add_devices(devices, ARRAY_SIZE(devices)); 234 platform_add_devices(devices, ARRAY_SIZE(devices));
231 235
232 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data); 236 imx53_add_sdhci_esdhc_imx(0, &mx53_ard_sd1_data);
diff --git a/arch/arm/mach-mx5/board-mx53_evk.c b/arch/arm/mach-mx5/board-mx53_evk.c
index 1b417b06b736..7663905d5c6d 100644
--- a/arch/arm/mach-mx5/board-mx53_evk.c
+++ b/arch/arm/mach-mx5/board-mx53_evk.c
@@ -131,12 +131,17 @@ static const struct spi_imx_master mx53_evk_spi_data __initconst = {
131 .num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs), 131 .num_chipselect = ARRAY_SIZE(mx53_evk_spi_cs),
132}; 132};
133 133
134void __init imx53_evk_common_init(void)
135{
136 mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
137 ARRAY_SIZE(mx53_evk_pads));
138}
139
134static void __init mx53_evk_board_init(void) 140static void __init mx53_evk_board_init(void)
135{ 141{
136 imx53_soc_init(); 142 imx53_soc_init();
143 imx53_evk_common_init();
137 144
138 mxc_iomux_v3_setup_multiple_pads(mx53_evk_pads,
139 ARRAY_SIZE(mx53_evk_pads));
140 mx53_evk_init_uart(); 145 mx53_evk_init_uart();
141 mx53_evk_fec_reset(); 146 mx53_evk_fec_reset();
142 imx53_add_fec(&mx53_evk_fec_pdata); 147 imx53_add_fec(&mx53_evk_fec_pdata);
diff --git a/arch/arm/mach-mx5/board-mx53_loco.c b/arch/arm/mach-mx5/board-mx53_loco.c
index 4e1d51d252dc..3922cd5ea854 100644
--- a/arch/arm/mach-mx5/board-mx53_loco.c
+++ b/arch/arm/mach-mx5/board-mx53_loco.c
@@ -257,12 +257,17 @@ static const struct gpio_led_platform_data mx53loco_leds_data __initconst = {
257 .num_leds = ARRAY_SIZE(mx53loco_leds), 257 .num_leds = ARRAY_SIZE(mx53loco_leds),
258}; 258};
259 259
260void __init imx53_qsb_common_init(void)
261{
262 mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
263 ARRAY_SIZE(mx53_loco_pads));
264}
265
260static void __init mx53_loco_board_init(void) 266static void __init mx53_loco_board_init(void)
261{ 267{
262 imx53_soc_init(); 268 imx53_soc_init();
269 imx53_qsb_common_init();
263 270
264 mxc_iomux_v3_setup_multiple_pads(mx53_loco_pads,
265 ARRAY_SIZE(mx53_loco_pads));
266 imx53_add_imx_uart(0, NULL); 271 imx53_add_imx_uart(0, NULL);
267 mx53_loco_fec_reset(); 272 mx53_loco_fec_reset();
268 imx53_add_fec(&mx53_loco_fec_data); 273 imx53_add_fec(&mx53_loco_fec_data);
diff --git a/arch/arm/mach-mx5/board-mx53_smd.c b/arch/arm/mach-mx5/board-mx53_smd.c
index bc02894eafef..b10c89982fbc 100644
--- a/arch/arm/mach-mx5/board-mx53_smd.c
+++ b/arch/arm/mach-mx5/board-mx53_smd.c
@@ -111,12 +111,17 @@ static const struct imxi2c_platform_data mx53_smd_i2c_data __initconst = {
111 .bitrate = 100000, 111 .bitrate = 100000,
112}; 112};
113 113
114void __init imx53_smd_common_init(void)
115{
116 mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads,
117 ARRAY_SIZE(mx53_smd_pads));
118}
119
114static void __init mx53_smd_board_init(void) 120static void __init mx53_smd_board_init(void)
115{ 121{
116 imx53_soc_init(); 122 imx53_soc_init();
123 imx53_smd_common_init();
117 124
118 mxc_iomux_v3_setup_multiple_pads(mx53_smd_pads,
119 ARRAY_SIZE(mx53_smd_pads));
120 mx53_smd_init_uart(); 125 mx53_smd_init_uart();
121 mx53_smd_fec_reset(); 126 mx53_smd_fec_reset();
122 imx53_add_fec(&mx53_smd_fec_data); 127 imx53_add_fec(&mx53_smd_fec_data);
diff --git a/arch/arm/mach-mx5/clock-mx51-mx53.c b/arch/arm/mach-mx5/clock-mx51-mx53.c
index f7bf996f463b..cc3547c88261 100644
--- a/arch/arm/mach-mx5/clock-mx51-mx53.c
+++ b/arch/arm/mach-mx5/clock-mx51-mx53.c
@@ -15,6 +15,7 @@
15#include <linux/clk.h> 15#include <linux/clk.h>
16#include <linux/io.h> 16#include <linux/io.h>
17#include <linux/clkdev.h> 17#include <linux/clkdev.h>
18#include <linux/of.h>
18 19
19#include <asm/div64.h> 20#include <asm/div64.h>
20 21
@@ -1609,3 +1610,41 @@ int __init mx53_clocks_init(unsigned long ckil, unsigned long osc,
1609 MX53_INT_GPT); 1610 MX53_INT_GPT);
1610 return 0; 1611 return 0;
1611} 1612}
1613
1614static void __init clk_get_freq_dt(unsigned long *ckil, unsigned long *osc,
1615 unsigned long *ckih1, unsigned long *ckih2)
1616{
1617 struct device_node *np;
1618
1619 /* retrieve the freqency of fixed clocks from device tree */
1620 for_each_compatible_node(np, NULL, "fixed-clock") {
1621 u32 rate;
1622 if (of_property_read_u32(np, "clock-frequency", &rate))
1623 continue;
1624
1625 if (of_device_is_compatible(np, "fsl,imx-ckil"))
1626 *ckil = rate;
1627 else if (of_device_is_compatible(np, "fsl,imx-osc"))
1628 *osc = rate;
1629 else if (of_device_is_compatible(np, "fsl,imx-ckih1"))
1630 *ckih1 = rate;
1631 else if (of_device_is_compatible(np, "fsl,imx-ckih2"))
1632 *ckih2 = rate;
1633 }
1634}
1635
1636int __init mx51_clocks_init_dt(void)
1637{
1638 unsigned long ckil, osc, ckih1, ckih2;
1639
1640 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1641 return mx51_clocks_init(ckil, osc, ckih1, ckih2);
1642}
1643
1644int __init mx53_clocks_init_dt(void)
1645{
1646 unsigned long ckil, osc, ckih1, ckih2;
1647
1648 clk_get_freq_dt(&ckil, &osc, &ckih1, &ckih2);
1649 return mx53_clocks_init(ckil, osc, ckih1, ckih2);
1650}
diff --git a/arch/arm/mach-mx5/imx51-dt.c b/arch/arm/mach-mx5/imx51-dt.c
new file mode 100644
index 000000000000..ccc61585659b
--- /dev/null
+++ b/arch/arm/mach-mx5/imx51-dt.c
@@ -0,0 +1,116 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/irq.h>
14#include <linux/irqdomain.h>
15#include <linux/of_irq.h>
16#include <linux/of_platform.h>
17#include <asm/mach/arch.h>
18#include <asm/mach/time.h>
19#include <mach/common.h>
20#include <mach/mx51.h>
21
22/*
23 * Lookup table for attaching a specific name and platform_data pointer to
24 * devices as they get created by of_platform_populate(). Ideally this table
25 * would not exist, but the current clock implementation depends on some devices
26 * having a specific name.
27 */
28static const struct of_dev_auxdata imx51_auxdata_lookup[] __initconst = {
29 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART1_BASE_ADDR, "imx21-uart.0", NULL),
30 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART2_BASE_ADDR, "imx21-uart.1", NULL),
31 OF_DEV_AUXDATA("fsl,imx51-uart", MX51_UART3_BASE_ADDR, "imx21-uart.2", NULL),
32 OF_DEV_AUXDATA("fsl,imx51-fec", MX51_FEC_BASE_ADDR, "imx27-fec.0", NULL),
33 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx51.0", NULL),
34 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx51.1", NULL),
35 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx51.2", NULL),
36 OF_DEV_AUXDATA("fsl,imx51-esdhc", MX51_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx51.3", NULL),
37 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
38 OF_DEV_AUXDATA("fsl,imx51-ecspi", MX51_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
39 OF_DEV_AUXDATA("fsl,imx51-cspi", MX51_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
40 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx51-i2c", MX51_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
42 OF_DEV_AUXDATA("fsl,imx51-sdma", MX51_SDMA_BASE_ADDR, "imx35-sdma", NULL),
43 OF_DEV_AUXDATA("fsl,imx51-wdt", MX51_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
44 { /* sentinel */ }
45};
46
47static void __init imx51_tzic_add_irq_domain(struct device_node *np,
48 struct device_node *interrupt_parent)
49{
50 irq_domain_add_simple(np, 0);
51}
52
53static void __init imx51_gpio_add_irq_domain(struct device_node *np,
54 struct device_node *interrupt_parent)
55{
56 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
57 32 * 4; /* imx51 gets 4 gpio ports */
58
59 irq_domain_add_simple(np, gpio_irq_base);
60 gpio_irq_base += 32;
61}
62
63static const struct of_device_id imx51_irq_match[] __initconst = {
64 { .compatible = "fsl,imx51-tzic", .data = imx51_tzic_add_irq_domain, },
65 { .compatible = "fsl,imx51-gpio", .data = imx51_gpio_add_irq_domain, },
66 { /* sentinel */ }
67};
68
69static const struct of_device_id imx51_iomuxc_of_match[] __initconst = {
70 { .compatible = "fsl,imx51-iomuxc-babbage", .data = imx51_babbage_common_init, },
71 { /* sentinel */ }
72};
73
74static void __init imx51_dt_init(void)
75{
76 struct device_node *node;
77 const struct of_device_id *of_id;
78 void (*func)(void);
79
80 of_irq_init(imx51_irq_match);
81
82 node = of_find_matching_node(NULL, imx51_iomuxc_of_match);
83 if (node) {
84 of_id = of_match_node(imx51_iomuxc_of_match, node);
85 func = of_id->data;
86 func();
87 of_node_put(node);
88 }
89
90 of_platform_populate(NULL, of_default_bus_match_table,
91 imx51_auxdata_lookup, NULL);
92}
93
94static void __init imx51_timer_init(void)
95{
96 mx51_clocks_init_dt();
97}
98
99static struct sys_timer imx51_timer = {
100 .init = imx51_timer_init,
101};
102
103static const char *imx51_dt_board_compat[] __initdata = {
104 "fsl,imx51-babbage",
105 NULL
106};
107
108DT_MACHINE_START(IMX51_DT, "Freescale i.MX51 (Device Tree Support)")
109 .map_io = mx51_map_io,
110 .init_early = imx51_init_early,
111 .init_irq = mx51_init_irq,
112 .handle_irq = imx51_handle_irq,
113 .timer = &imx51_timer,
114 .init_machine = imx51_dt_init,
115 .dt_compat = imx51_dt_board_compat,
116MACHINE_END
diff --git a/arch/arm/mach-mx5/imx53-dt.c b/arch/arm/mach-mx5/imx53-dt.c
new file mode 100644
index 000000000000..ccaa0b81b768
--- /dev/null
+++ b/arch/arm/mach-mx5/imx53-dt.c
@@ -0,0 +1,126 @@
1/*
2 * Copyright 2011 Freescale Semiconductor, Inc. All Rights Reserved.
3 * Copyright 2011 Linaro Ltd.
4 *
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
8 *
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
11 */
12
13#include <linux/io.h>
14#include <linux/irq.h>
15#include <linux/irqdomain.h>
16#include <linux/of_irq.h>
17#include <linux/of_platform.h>
18#include <asm/mach/arch.h>
19#include <asm/mach/time.h>
20#include <mach/common.h>
21#include <mach/mx53.h>
22
23/*
24 * Lookup table for attaching a specific name and platform_data pointer to
25 * devices as they get created by of_platform_populate(). Ideally this table
26 * would not exist, but the current clock implementation depends on some devices
27 * having a specific name.
28 */
29static const struct of_dev_auxdata imx53_auxdata_lookup[] __initconst = {
30 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART1_BASE_ADDR, "imx21-uart.0", NULL),
31 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART2_BASE_ADDR, "imx21-uart.1", NULL),
32 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART3_BASE_ADDR, "imx21-uart.2", NULL),
33 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART4_BASE_ADDR, "imx21-uart.3", NULL),
34 OF_DEV_AUXDATA("fsl,imx53-uart", MX53_UART5_BASE_ADDR, "imx21-uart.4", NULL),
35 OF_DEV_AUXDATA("fsl,imx53-fec", MX53_FEC_BASE_ADDR, "imx25-fec.0", NULL),
36 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC1_BASE_ADDR, "sdhci-esdhc-imx53.0", NULL),
37 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC2_BASE_ADDR, "sdhci-esdhc-imx53.1", NULL),
38 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC3_BASE_ADDR, "sdhci-esdhc-imx53.2", NULL),
39 OF_DEV_AUXDATA("fsl,imx53-esdhc", MX53_ESDHC4_BASE_ADDR, "sdhci-esdhc-imx53.3", NULL),
40 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI1_BASE_ADDR, "imx51-ecspi.0", NULL),
41 OF_DEV_AUXDATA("fsl,imx53-ecspi", MX53_ECSPI2_BASE_ADDR, "imx51-ecspi.1", NULL),
42 OF_DEV_AUXDATA("fsl,imx53-cspi", MX53_CSPI_BASE_ADDR, "imx35-cspi.0", NULL),
43 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
44 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
45 OF_DEV_AUXDATA("fsl,imx53-i2c", MX53_I2C3_BASE_ADDR, "imx-i2c.2", NULL),
46 OF_DEV_AUXDATA("fsl,imx53-sdma", MX53_SDMA_BASE_ADDR, "imx35-sdma", NULL),
47 OF_DEV_AUXDATA("fsl,imx53-wdt", MX53_WDOG1_BASE_ADDR, "imx2-wdt.0", NULL),
48 { /* sentinel */ }
49};
50
51static void __init imx53_tzic_add_irq_domain(struct device_node *np,
52 struct device_node *interrupt_parent)
53{
54 irq_domain_add_simple(np, 0);
55}
56
57static void __init imx53_gpio_add_irq_domain(struct device_node *np,
58 struct device_node *interrupt_parent)
59{
60 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS -
61 32 * 7; /* imx53 gets 7 gpio ports */
62
63 irq_domain_add_simple(np, gpio_irq_base);
64 gpio_irq_base += 32;
65}
66
67static const struct of_device_id imx53_irq_match[] __initconst = {
68 { .compatible = "fsl,imx53-tzic", .data = imx53_tzic_add_irq_domain, },
69 { .compatible = "fsl,imx53-gpio", .data = imx53_gpio_add_irq_domain, },
70 { /* sentinel */ }
71};
72
73static const struct of_device_id imx53_iomuxc_of_match[] __initconst = {
74 { .compatible = "fsl,imx53-iomuxc-ard", .data = imx53_ard_common_init, },
75 { .compatible = "fsl,imx53-iomuxc-evk", .data = imx53_evk_common_init, },
76 { .compatible = "fsl,imx53-iomuxc-qsb", .data = imx53_qsb_common_init, },
77 { .compatible = "fsl,imx53-iomuxc-smd", .data = imx53_smd_common_init, },
78 { /* sentinel */ }
79};
80
81static void __init imx53_dt_init(void)
82{
83 struct device_node *node;
84 const struct of_device_id *of_id;
85 void (*func)(void);
86
87 of_irq_init(imx53_irq_match);
88
89 node = of_find_matching_node(NULL, imx53_iomuxc_of_match);
90 if (node) {
91 of_id = of_match_node(imx53_iomuxc_of_match, node);
92 func = of_id->data;
93 func();
94 of_node_put(node);
95 }
96
97 of_platform_populate(NULL, of_default_bus_match_table,
98 imx53_auxdata_lookup, NULL);
99}
100
101static void __init imx53_timer_init(void)
102{
103 mx53_clocks_init_dt();
104}
105
106static struct sys_timer imx53_timer = {
107 .init = imx53_timer_init,
108};
109
110static const char *imx53_dt_board_compat[] __initdata = {
111 "fsl,imx53-ard",
112 "fsl,imx53-evk",
113 "fsl,imx53-qsb",
114 "fsl,imx53-smd",
115 NULL
116};
117
118DT_MACHINE_START(IMX53_DT, "Freescale i.MX53 (Device Tree Support)")
119 .map_io = mx53_map_io,
120 .init_early = imx53_init_early,
121 .init_irq = mx53_init_irq,
122 .handle_irq = imx53_handle_irq,
123 .timer = &imx53_timer,
124 .init_machine = imx53_dt_init,
125 .dt_compat = imx53_dt_board_compat,
126MACHINE_END
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 4e3d97890d69..d19703930ef6 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -64,6 +64,8 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
64 unsigned long ckih1, unsigned long ckih2); 64 unsigned long ckih1, unsigned long ckih2);
65extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, 65extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
66 unsigned long ckih1, unsigned long ckih2); 66 unsigned long ckih1, unsigned long ckih2);
67extern int mx51_clocks_init_dt(void);
68extern int mx53_clocks_init_dt(void);
67extern struct platform_device *mxc_register_gpio(char *name, int id, 69extern struct platform_device *mxc_register_gpio(char *name, int id,
68 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 70 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
69extern int mxc_register_device(struct platform_device *pdev, void *data); 71extern int mxc_register_device(struct platform_device *pdev, void *data);
@@ -72,4 +74,10 @@ extern void mxc_arch_reset_init(void __iomem *);
72extern void mx51_efikamx_reset(void); 74extern void mx51_efikamx_reset(void);
73extern int mx53_revision(void); 75extern int mx53_revision(void);
74extern int mx53_display_revision(void); 76extern int mx53_display_revision(void);
77
78extern void imx51_babbage_common_init(void);
79extern void imx53_ard_common_init(void);
80extern void imx53_evk_common_init(void);
81extern void imx53_qsb_common_init(void);
82extern void imx53_smd_common_init(void);
75#endif 83#endif
diff --git a/drivers/tty/serial/msm_serial.c b/drivers/tty/serial/msm_serial.c
index e6ba83876508..776790272454 100644
--- a/drivers/tty/serial/msm_serial.c
+++ b/drivers/tty/serial/msm_serial.c
@@ -19,6 +19,7 @@
19# define SUPPORT_SYSRQ 19# define SUPPORT_SYSRQ
20#endif 20#endif
21 21
22#include <linux/atomic.h>
22#include <linux/hrtimer.h> 23#include <linux/hrtimer.h>
23#include <linux/module.h> 24#include <linux/module.h>
24#include <linux/io.h> 25#include <linux/io.h>
@@ -33,6 +34,8 @@
33#include <linux/clk.h> 34#include <linux/clk.h>
34#include <linux/platform_device.h> 35#include <linux/platform_device.h>
35#include <linux/delay.h> 36#include <linux/delay.h>
37#include <linux/of.h>
38#include <linux/of_device.h>
36 39
37#include "msm_serial.h" 40#include "msm_serial.h"
38 41
@@ -589,9 +592,8 @@ static void msm_release_port(struct uart_port *port)
589 iowrite32(GSBI_PROTOCOL_IDLE, msm_port->gsbi_base + 592 iowrite32(GSBI_PROTOCOL_IDLE, msm_port->gsbi_base +
590 GSBI_CONTROL); 593 GSBI_CONTROL);
591 594
592 gsbi_resource = platform_get_resource_byname(pdev, 595 gsbi_resource = platform_get_resource(pdev,
593 IORESOURCE_MEM, 596 IORESOURCE_MEM, 1);
594 "gsbi_resource");
595 597
596 if (unlikely(!gsbi_resource)) 598 if (unlikely(!gsbi_resource))
597 return; 599 return;
@@ -612,8 +614,7 @@ static int msm_request_port(struct uart_port *port)
612 resource_size_t size; 614 resource_size_t size;
613 int ret; 615 int ret;
614 616
615 uart_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM, 617 uart_resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
616 "uart_resource");
617 if (unlikely(!uart_resource)) 618 if (unlikely(!uart_resource))
618 return -ENXIO; 619 return -ENXIO;
619 620
@@ -628,8 +629,7 @@ static int msm_request_port(struct uart_port *port)
628 goto fail_release_port; 629 goto fail_release_port;
629 } 630 }
630 631
631 gsbi_resource = platform_get_resource_byname(pdev, IORESOURCE_MEM, 632 gsbi_resource = platform_get_resource(pdev, IORESOURCE_MEM, 1);
632 "gsbi_resource");
633 /* Is this a GSBI-based port? */ 633 /* Is this a GSBI-based port? */
634 if (gsbi_resource) { 634 if (gsbi_resource) {
635 size = resource_size(gsbi_resource); 635 size = resource_size(gsbi_resource);
@@ -859,6 +859,8 @@ static struct uart_driver msm_uart_driver = {
859 .cons = MSM_CONSOLE, 859 .cons = MSM_CONSOLE,
860}; 860};
861 861
862static atomic_t msm_uart_next_id = ATOMIC_INIT(0);
863
862static int __init msm_serial_probe(struct platform_device *pdev) 864static int __init msm_serial_probe(struct platform_device *pdev)
863{ 865{
864 struct msm_port *msm_port; 866 struct msm_port *msm_port;
@@ -866,6 +868,9 @@ static int __init msm_serial_probe(struct platform_device *pdev)
866 struct uart_port *port; 868 struct uart_port *port;
867 int irq; 869 int irq;
868 870
871 if (pdev->id == -1)
872 pdev->id = atomic_inc_return(&msm_uart_next_id) - 1;
873
869 if (unlikely(pdev->id < 0 || pdev->id >= UART_NR)) 874 if (unlikely(pdev->id < 0 || pdev->id >= UART_NR))
870 return -ENXIO; 875 return -ENXIO;
871 876
@@ -875,7 +880,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
875 port->dev = &pdev->dev; 880 port->dev = &pdev->dev;
876 msm_port = UART_TO_MSM(port); 881 msm_port = UART_TO_MSM(port);
877 882
878 if (platform_get_resource_byname(pdev, IORESOURCE_MEM, "gsbi_resource")) 883 if (platform_get_resource(pdev, IORESOURCE_MEM, 1))
879 msm_port->is_uartdm = 1; 884 msm_port->is_uartdm = 1;
880 else 885 else
881 msm_port->is_uartdm = 0; 886 msm_port->is_uartdm = 0;
@@ -899,8 +904,7 @@ static int __init msm_serial_probe(struct platform_device *pdev)
899 printk(KERN_INFO "uartclk = %d\n", port->uartclk); 904 printk(KERN_INFO "uartclk = %d\n", port->uartclk);
900 905
901 906
902 resource = platform_get_resource_byname(pdev, IORESOURCE_MEM, 907 resource = platform_get_resource(pdev, IORESOURCE_MEM, 0);
903 "uart_resource");
904 if (unlikely(!resource)) 908 if (unlikely(!resource))
905 return -ENXIO; 909 return -ENXIO;
906 port->mapbase = resource->start; 910 port->mapbase = resource->start;
@@ -924,11 +928,17 @@ static int __devexit msm_serial_remove(struct platform_device *pdev)
924 return 0; 928 return 0;
925} 929}
926 930
931static struct of_device_id msm_match_table[] = {
932 { .compatible = "qcom,msm-uart" },
933 {}
934};
935
927static struct platform_driver msm_platform_driver = { 936static struct platform_driver msm_platform_driver = {
928 .remove = msm_serial_remove, 937 .remove = msm_serial_remove,
929 .driver = { 938 .driver = {
930 .name = "msm_serial", 939 .name = "msm_serial",
931 .owner = THIS_MODULE, 940 .owner = THIS_MODULE,
941 .of_match_table = msm_match_table,
932 }, 942 },
933}; 943};
934 944
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-01 00:31:35 -0500