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-rw-r--r--drivers/net/tg3.c9
-rw-r--r--drivers/net/tg3.h6
2 files changed, 10 insertions, 5 deletions
diff --git a/drivers/net/tg3.c b/drivers/net/tg3.c
index f0b5dc7766bb..a4d0d61d6af0 100644
--- a/drivers/net/tg3.c
+++ b/drivers/net/tg3.c
@@ -7952,6 +7952,12 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
7952 tp->pci_chip_rev_id = (misc_ctrl_reg >> 7952 tp->pci_chip_rev_id = (misc_ctrl_reg >>
7953 MISC_HOST_CTRL_CHIPREV_SHIFT); 7953 MISC_HOST_CTRL_CHIPREV_SHIFT);
7954 7954
7955 /* Wrong chip ID in 5752 A0. This code can be removed later
7956 * as A0 is not in production.
7957 */
7958 if (tp->pci_chip_rev_id == CHIPREV_ID_5752_A0_HW)
7959 tp->pci_chip_rev_id = CHIPREV_ID_5752_A0;
7960
7955 /* Initialize misc host control in PCI block. */ 7961 /* Initialize misc host control in PCI block. */
7956 tp->misc_host_ctrl |= (misc_ctrl_reg & 7962 tp->misc_host_ctrl |= (misc_ctrl_reg &
7957 MISC_HOST_CTRL_CHIPREV); 7963 MISC_HOST_CTRL_CHIPREV);
@@ -7967,8 +7973,7 @@ static int __devinit tg3_get_invariants(struct tg3 *tp)
7967 tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff; 7973 tp->pci_bist = (cacheline_sz_reg >> 24) & 0xff;
7968 7974
7969 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 || 7975 if (GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5750 ||
7970 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A0 || 7976 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752)
7971 GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5752_A1)
7972 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS; 7977 tp->tg3_flags2 |= TG3_FLG2_5750_PLUS;
7973 7978
7974 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) || 7979 if ((GET_ASIC_REV(tp->pci_chip_rev_id) == ASIC_REV_5705) ||
diff --git a/drivers/net/tg3.h b/drivers/net/tg3.h
index 4732a804974b..3f7cd6fb8891 100644
--- a/drivers/net/tg3.h
+++ b/drivers/net/tg3.h
@@ -125,7 +125,8 @@
125#define CHIPREV_ID_5750_A0 0x4000 125#define CHIPREV_ID_5750_A0 0x4000
126#define CHIPREV_ID_5750_A1 0x4001 126#define CHIPREV_ID_5750_A1 0x4001
127#define CHIPREV_ID_5750_A3 0x4003 127#define CHIPREV_ID_5750_A3 0x4003
128#define CHIPREV_ID_5752_A0 0x5000 128#define CHIPREV_ID_5752_A0_HW 0x5000
129#define CHIPREV_ID_5752_A0 0x6000
129#define CHIPREV_ID_5752_A1 0x6001 130#define CHIPREV_ID_5752_A1 0x6001
130#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12) 131#define GET_ASIC_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 12)
131#define ASIC_REV_5700 0x07 132#define ASIC_REV_5700 0x07
@@ -134,8 +135,7 @@
134#define ASIC_REV_5704 0x02 135#define ASIC_REV_5704 0x02
135#define ASIC_REV_5705 0x03 136#define ASIC_REV_5705 0x03
136#define ASIC_REV_5750 0x04 137#define ASIC_REV_5750 0x04
137#define ASIC_REV_5752_A0 0x05 138#define ASIC_REV_5752 0x06
138#define ASIC_REV_5752_A1 0x06
139#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8) 139#define GET_CHIP_REV(CHIP_REV_ID) ((CHIP_REV_ID) >> 8)
140#define CHIPREV_5700_AX 0x70 140#define CHIPREV_5700_AX 0x70
141#define CHIPREV_5700_BX 0x71 141#define CHIPREV_5700_BX 0x71