diff options
-rw-r--r-- | drivers/pci/msi.c | 15 |
1 files changed, 12 insertions, 3 deletions
diff --git a/drivers/pci/msi.c b/drivers/pci/msi.c index 15af618d36e2..18354817173c 100644 --- a/drivers/pci/msi.c +++ b/drivers/pci/msi.c | |||
@@ -126,7 +126,16 @@ static void msix_flush_writes(unsigned int irq) | |||
126 | } | 126 | } |
127 | } | 127 | } |
128 | 128 | ||
129 | static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag) | 129 | /* |
130 | * PCI 2.3 does not specify mask bits for each MSI interrupt. Attempting to | ||
131 | * mask all MSI interrupts by clearing the MSI enable bit does not work | ||
132 | * reliably as devices without an INTx disable bit will then generate a | ||
133 | * level IRQ which will never be cleared. | ||
134 | * | ||
135 | * Returns 1 if it succeeded in masking the interrupt and 0 if the device | ||
136 | * doesn't support MSI masking. | ||
137 | */ | ||
138 | static int msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag) | ||
130 | { | 139 | { |
131 | struct msi_desc *entry; | 140 | struct msi_desc *entry; |
132 | 141 | ||
@@ -144,8 +153,7 @@ static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag) | |||
144 | mask_bits |= flag & mask; | 153 | mask_bits |= flag & mask; |
145 | pci_write_config_dword(entry->dev, pos, mask_bits); | 154 | pci_write_config_dword(entry->dev, pos, mask_bits); |
146 | } else { | 155 | } else { |
147 | __msi_set_enable(entry->dev, entry->msi_attrib.pos, | 156 | return 0; |
148 | !flag); | ||
149 | } | 157 | } |
150 | break; | 158 | break; |
151 | case PCI_CAP_ID_MSIX: | 159 | case PCI_CAP_ID_MSIX: |
@@ -161,6 +169,7 @@ static void msi_set_mask_bits(unsigned int irq, u32 mask, u32 flag) | |||
161 | break; | 169 | break; |
162 | } | 170 | } |
163 | entry->msi_attrib.masked = !!flag; | 171 | entry->msi_attrib.masked = !!flag; |
172 | return 1; | ||
164 | } | 173 | } |
165 | 174 | ||
166 | void read_msi_msg(unsigned int irq, struct msi_msg *msg) | 175 | void read_msi_msg(unsigned int irq, struct msi_msg *msg) |