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-rw-r--r--drivers/video/via/hw.c1
-rw-r--r--drivers/video/via/ioctl.h2
-rw-r--r--drivers/video/via/lcd.c9
-rw-r--r--drivers/video/via/lcd.h2
-rw-r--r--drivers/video/via/share.h7
-rw-r--r--drivers/video/via/viamode.c14
6 files changed, 34 insertions, 1 deletions
diff --git a/drivers/video/via/hw.c b/drivers/video/via/hw.c
index ae664fbd7e80..2322612fbb95 100644
--- a/drivers/video/via/hw.c
+++ b/drivers/video/via/hw.c
@@ -62,6 +62,7 @@ static struct pll_map pll_value[] = {
62 CX700_52_977M, VX855_52_977M}, 62 CX700_52_977M, VX855_52_977M},
63 {CLK_56_250M, CLE266_PLL_56_250M, K800_PLL_56_250M, 63 {CLK_56_250M, CLE266_PLL_56_250M, K800_PLL_56_250M,
64 CX700_56_250M, VX855_56_250M}, 64 CX700_56_250M, VX855_56_250M},
65 {CLK_57_275M, 0, 0, 0, VX855_57_275M},
65 {CLK_60_466M, CLE266_PLL_60_466M, K800_PLL_60_466M, 66 {CLK_60_466M, CLE266_PLL_60_466M, K800_PLL_60_466M,
66 CX700_60_466M, VX855_60_466M}, 67 CX700_60_466M, VX855_60_466M},
67 {CLK_61_500M, CLE266_PLL_61_500M, K800_PLL_61_500M, 68 {CLK_61_500M, CLE266_PLL_61_500M, K800_PLL_61_500M,
diff --git a/drivers/video/via/ioctl.h b/drivers/video/via/ioctl.h
index de899807eade..c430fa23008a 100644
--- a/drivers/video/via/ioctl.h
+++ b/drivers/video/via/ioctl.h
@@ -75,7 +75,7 @@
75/*SAMM operation flag*/ 75/*SAMM operation flag*/
76#define OP_SAMM 0x80 76#define OP_SAMM 0x80
77 77
78#define LCD_PANEL_ID_MAXIMUM 22 78#define LCD_PANEL_ID_MAXIMUM 23
79 79
80#define STATE_ON 0x1 80#define STATE_ON 0x1
81#define STATE_OFF 0x0 81#define STATE_OFF 0x0
diff --git a/drivers/video/via/lcd.c b/drivers/video/via/lcd.c
index 1b1ccdc2d83d..09020f0b2d2a 100644
--- a/drivers/video/via/lcd.c
+++ b/drivers/video/via/lcd.c
@@ -398,6 +398,15 @@ static void fp_id_to_vindex(int panel_id)
398 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0; 398 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
399 viaparinfo->lvds_setting_info->LCDDithering = 1; 399 viaparinfo->lvds_setting_info->LCDDithering = 1;
400 break; 400 break;
401 case 0x17:
402 /* OLPC XO-1.5 panel */
403 viaparinfo->lvds_setting_info->lcd_panel_hres = 1200;
404 viaparinfo->lvds_setting_info->lcd_panel_vres = 900;
405 viaparinfo->lvds_setting_info->lcd_panel_id =
406 LCD_PANEL_IDD_1200X900;
407 viaparinfo->lvds_setting_info->device_lcd_dualedge = 0;
408 viaparinfo->lvds_setting_info->LCDDithering = 0;
409 break;
401 default: 410 default:
402 viaparinfo->lvds_setting_info->lcd_panel_hres = 800; 411 viaparinfo->lvds_setting_info->lcd_panel_hres = 800;
403 viaparinfo->lvds_setting_info->lcd_panel_vres = 600; 412 viaparinfo->lvds_setting_info->lcd_panel_vres = 600;
diff --git a/drivers/video/via/lcd.h b/drivers/video/via/lcd.h
index 071f47cf5be1..9762ec62b495 100644
--- a/drivers/video/via/lcd.h
+++ b/drivers/video/via/lcd.h
@@ -60,6 +60,8 @@
60#define LCD_PANEL_IDB_1360X768 0x0B 60#define LCD_PANEL_IDB_1360X768 0x0B
61/* Resolution: 480x640, Channel: single, Dithering: Enable */ 61/* Resolution: 480x640, Channel: single, Dithering: Enable */
62#define LCD_PANEL_IDC_480X640 0x0C 62#define LCD_PANEL_IDC_480X640 0x0C
63/* Resolution: 1200x900, Channel: single, Dithering: Disable */
64#define LCD_PANEL_IDD_1200X900 0x0D
63 65
64 66
65extern int viafb_LCD2_ON; 67extern int viafb_LCD2_ON;
diff --git a/drivers/video/via/share.h b/drivers/video/via/share.h
index d55aaa7b912c..f974c7333522 100644
--- a/drivers/video/via/share.h
+++ b/drivers/video/via/share.h
@@ -570,6 +570,10 @@
570#define M1200X720_R60_HSP NEGATIVE 570#define M1200X720_R60_HSP NEGATIVE
571#define M1200X720_R60_VSP POSITIVE 571#define M1200X720_R60_VSP POSITIVE
572 572
573/* 1200x900@60 Sync Polarity (DCON) */
574#define M1200X900_R60_HSP NEGATIVE
575#define M1200X900_R60_VSP NEGATIVE
576
573/* 1280x600@60 Sync Polarity (GTF Mode) */ 577/* 1280x600@60 Sync Polarity (GTF Mode) */
574#define M1280x600_R60_HSP NEGATIVE 578#define M1280x600_R60_HSP NEGATIVE
575#define M1280x600_R60_VSP POSITIVE 579#define M1280x600_R60_VSP POSITIVE
@@ -651,6 +655,7 @@
651#define CLK_52_406M 52406000 655#define CLK_52_406M 52406000
652#define CLK_52_977M 52977000 656#define CLK_52_977M 52977000
653#define CLK_56_250M 56250000 657#define CLK_56_250M 56250000
658#define CLK_57_275M 57275000
654#define CLK_60_466M 60466000 659#define CLK_60_466M 60466000
655#define CLK_61_500M 61500000 660#define CLK_61_500M 61500000
656#define CLK_65_000M 65000000 661#define CLK_65_000M 65000000
@@ -939,6 +944,7 @@
939#define VX855_52_406M 0x00580C03 944#define VX855_52_406M 0x00580C03
940#define VX855_52_977M 0x00940C05 945#define VX855_52_977M 0x00940C05
941#define VX855_56_250M 0x009D0C05 946#define VX855_56_250M 0x009D0C05
947#define VX855_57_275M 0x009D8C85 /* Used by XO panel */
942#define VX855_60_466M 0x00A90C05 948#define VX855_60_466M 0x00A90C05
943#define VX855_61_500M 0x00AC0C05 949#define VX855_61_500M 0x00AC0C05
944#define VX855_65_000M 0x006D0C03 950#define VX855_65_000M 0x006D0C03
@@ -1065,6 +1071,7 @@
1065#define RES_1600X1200_60HZ_PIXCLOCK 6172 1071#define RES_1600X1200_60HZ_PIXCLOCK 6172
1066#define RES_1600X1200_75HZ_PIXCLOCK 4938 1072#define RES_1600X1200_75HZ_PIXCLOCK 4938
1067#define RES_1280X720_60HZ_PIXCLOCK 13426 1073#define RES_1280X720_60HZ_PIXCLOCK 13426
1074#define RES_1200X900_60HZ_PIXCLOCK 17459
1068#define RES_1920X1080_60HZ_PIXCLOCK 5787 1075#define RES_1920X1080_60HZ_PIXCLOCK 5787
1069#define RES_1400X1050_60HZ_PIXCLOCK 8214 1076#define RES_1400X1050_60HZ_PIXCLOCK 8214
1070#define RES_1400X1050_75HZ_PIXCLOCK 6410 1077#define RES_1400X1050_75HZ_PIXCLOCK 6410
diff --git a/drivers/video/via/viamode.c b/drivers/video/via/viamode.c
index af50e244016c..6f3bcda8cb47 100644
--- a/drivers/video/via/viamode.c
+++ b/drivers/video/via/viamode.c
@@ -66,6 +66,7 @@ struct res_map_refresh res_map_refresh_tbl[] = {
66 {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60}, 66 {1088, 612, RES_1088X612_60HZ_PIXCLOCK, 60},
67 {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60}, 67 {1152, 720, RES_1152X720_60HZ_PIXCLOCK, 60},
68 {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60}, 68 {1200, 720, RES_1200X720_60HZ_PIXCLOCK, 60},
69 {1200, 900, RES_1200X900_60HZ_PIXCLOCK, 60},
69 {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60}, 70 {1280, 600, RES_1280X600_60HZ_PIXCLOCK, 60},
70 {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50}, 71 {1280, 720, RES_1280X720_50HZ_PIXCLOCK, 50},
71 {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50}, 72 {1280, 768, RES_1280X768_50HZ_PIXCLOCK, 50},
@@ -759,6 +760,16 @@ struct crt_mode_table CRTM1200x720[] = {
759 {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} } 760 {1568, 1200, 1200, 368, 1256, 128, 746, 720, 720, 26, 721, 3} }
760}; 761};
761 762
763/* 1200x900 (DCON) */
764struct crt_mode_table DCON1200x900[] = {
765 /* r_rate, vclk, hsp, vsp */
766 {REFRESH_60, CLK_57_275M, M1200X900_R60_HSP, M1200X900_R60_VSP,
767 /* The correct htotal is 1240, but this doesn't raster on VX855. */
768 /* Via suggested changing to a multiple of 16, hence 1264. */
769 /* HT, HA, HBS, HBE, HSS, HSE, VT, VA, VBS, VBE, VSS, VSE */
770 {1264, 1200, 1200, 64, 1211, 32, 912, 900, 900, 12, 901, 10} }
771};
772
762/* 1280x600 (GTF) */ 773/* 1280x600 (GTF) */
763struct crt_mode_table CRTM1280x600[] = { 774struct crt_mode_table CRTM1280x600[] = {
764 /* r_rate, vclk, hsp, vsp */ 775 /* r_rate, vclk, hsp, vsp */
@@ -937,6 +948,9 @@ struct VideoModeTable viafb_modes[] = {
937 /* Display : 1200x720 (GTF) */ 948 /* Display : 1200x720 (GTF) */
938 {CRTM1200x720, ARRAY_SIZE(CRTM1200x720)}, 949 {CRTM1200x720, ARRAY_SIZE(CRTM1200x720)},
939 950
951 /* Display : 1200x900 (DCON) */
952 {DCON1200x900, ARRAY_SIZE(DCON1200x900)},
953
940 /* Display : 1280x600 (GTF) */ 954 /* Display : 1280x600 (GTF) */
941 {CRTM1280x600, ARRAY_SIZE(CRTM1280x600)}, 955 {CRTM1280x600, ARRAY_SIZE(CRTM1280x600)},
942 956