diff options
-rw-r--r-- | arch/mips/au1000/common/pci.c | 8 | ||||
-rw-r--r-- | arch/mips/pci/ops-au1000.c | 53 |
2 files changed, 32 insertions, 29 deletions
diff --git a/arch/mips/au1000/common/pci.c b/arch/mips/au1000/common/pci.c index 6fa70a36a250..ce771487567d 100644 --- a/arch/mips/au1000/common/pci.c +++ b/arch/mips/au1000/common/pci.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * BRIEF MODULE DESCRIPTION | 2 | * BRIEF MODULE DESCRIPTION |
3 | * Alchemy/AMD Au1x00 pci support. | 3 | * Alchemy/AMD Au1x00 PCI support. |
4 | * | 4 | * |
5 | * Copyright 2001,2002,2003 MontaVista Software Inc. | 5 | * Copyright 2001-2003, 2007 MontaVista Software Inc. |
6 | * Author: MontaVista Software, Inc. | 6 | * Author: MontaVista Software, Inc. |
7 | * ppopov@mvista.com or source@mvista.com | 7 | * ppopov@mvista.com or source@mvista.com |
8 | * | 8 | * |
@@ -66,6 +66,8 @@ static unsigned long virt_io_addr; | |||
66 | 66 | ||
67 | static int __init au1x_pci_setup(void) | 67 | static int __init au1x_pci_setup(void) |
68 | { | 68 | { |
69 | extern void au1x_pci_cfg_init(void); | ||
70 | |||
69 | #if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) | 71 | #if defined(CONFIG_SOC_AU1500) || defined(CONFIG_SOC_AU1550) |
70 | virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START, | 72 | virt_io_addr = (unsigned long)ioremap(Au1500_PCI_IO_START, |
71 | Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1); | 73 | Au1500_PCI_IO_END - Au1500_PCI_IO_START + 1); |
@@ -94,6 +96,8 @@ static int __init au1x_pci_setup(void) | |||
94 | set_io_port_base(virt_io_addr); | 96 | set_io_port_base(virt_io_addr); |
95 | #endif | 97 | #endif |
96 | 98 | ||
99 | au1x_pci_cfg_init(); | ||
100 | |||
97 | register_pci_controller(&au1x_controller); | 101 | register_pci_controller(&au1x_controller); |
98 | return 0; | 102 | return 0; |
99 | } | 103 | } |
diff --git a/arch/mips/pci/ops-au1000.c b/arch/mips/pci/ops-au1000.c index 6b29904acf45..1314bd58f036 100644 --- a/arch/mips/pci/ops-au1000.c +++ b/arch/mips/pci/ops-au1000.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /* | 1 | /* |
2 | * BRIEF MODULE DESCRIPTION | 2 | * BRIEF MODULE DESCRIPTION |
3 | * Alchemy/AMD Au1x00 pci support. | 3 | * Alchemy/AMD Au1x00 PCI support. |
4 | * | 4 | * |
5 | * Copyright 2001,2002,2003 MontaVista Software Inc. | 5 | * Copyright 2001-2003, 2007 MontaVista Software Inc. |
6 | * Author: MontaVista Software, Inc. | 6 | * Author: MontaVista Software, Inc. |
7 | * ppopov@mvista.com or source@mvista.com | 7 | * ppopov@mvista.com or source@mvista.com |
8 | * | 8 | * |
@@ -69,10 +69,27 @@ void mod_wired_entry(int entry, unsigned long entrylo0, | |||
69 | write_c0_pagemask(old_pagemask); | 69 | write_c0_pagemask(old_pagemask); |
70 | } | 70 | } |
71 | 71 | ||
72 | struct vm_struct *pci_cfg_vm; | 72 | static struct vm_struct *pci_cfg_vm; |
73 | static int pci_cfg_wired_entry; | 73 | static int pci_cfg_wired_entry; |
74 | static int first_cfg = 1; | 74 | static unsigned long last_entryLo0, last_entryLo1; |
75 | unsigned long last_entryLo0, last_entryLo1; | 75 | |
76 | /* | ||
77 | * We can't ioremap the entire pci config space because it's too large. | ||
78 | * Nor can we call ioremap dynamically because some device drivers use | ||
79 | * the PCI config routines from within interrupt handlers and that | ||
80 | * becomes a problem in get_vm_area(). We use one wired TLB to handle | ||
81 | * all config accesses for all busses. | ||
82 | */ | ||
83 | void __init au1x_pci_cfg_init(void) | ||
84 | { | ||
85 | /* Reserve a wired entry for PCI config accesses */ | ||
86 | pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); | ||
87 | if (!pci_cfg_vm) | ||
88 | panic(KERN_ERR "PCI unable to get vm area\n"); | ||
89 | pci_cfg_wired_entry = read_c0_wired(); | ||
90 | add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); | ||
91 | last_entryLo0 = last_entryLo1 = 0xffffffff; | ||
92 | } | ||
76 | 93 | ||
77 | static int config_access(unsigned char access_type, struct pci_bus *bus, | 94 | static int config_access(unsigned char access_type, struct pci_bus *bus, |
78 | unsigned int dev_fn, unsigned char where, | 95 | unsigned int dev_fn, unsigned char where, |
@@ -97,27 +114,6 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, | |||
97 | Au1500_PCI_STATCMD); | 114 | Au1500_PCI_STATCMD); |
98 | au_sync_udelay(1); | 115 | au_sync_udelay(1); |
99 | 116 | ||
100 | /* | ||
101 | * We can't ioremap the entire pci config space because it's | ||
102 | * too large. Nor can we call ioremap dynamically because some | ||
103 | * device drivers use the pci config routines from within | ||
104 | * interrupt handlers and that becomes a problem in get_vm_area(). | ||
105 | * We use one wired tlb to handle all config accesses for all | ||
106 | * busses. To improve performance, if the current device | ||
107 | * is the same as the last device accessed, we don't touch the | ||
108 | * tlb. | ||
109 | */ | ||
110 | if (first_cfg) { | ||
111 | /* reserve a wired entry for pci config accesses */ | ||
112 | first_cfg = 0; | ||
113 | pci_cfg_vm = get_vm_area(0x2000, VM_IOREMAP); | ||
114 | if (!pci_cfg_vm) | ||
115 | panic(KERN_ERR "PCI unable to get vm area\n"); | ||
116 | pci_cfg_wired_entry = read_c0_wired(); | ||
117 | add_wired_entry(0, 0, (unsigned long)pci_cfg_vm->addr, PM_4K); | ||
118 | last_entryLo0 = last_entryLo1 = 0xffffffff; | ||
119 | } | ||
120 | |||
121 | /* Allow board vendors to implement their own off-chip idsel. | 117 | /* Allow board vendors to implement their own off-chip idsel. |
122 | * If it doesn't succeed, may as well bail out at this point. | 118 | * If it doesn't succeed, may as well bail out at this point. |
123 | */ | 119 | */ |
@@ -144,9 +140,12 @@ static int config_access(unsigned char access_type, struct pci_bus *bus, | |||
144 | /* page boundary */ | 140 | /* page boundary */ |
145 | cfg_base = cfg_base & PAGE_MASK; | 141 | cfg_base = cfg_base & PAGE_MASK; |
146 | 142 | ||
143 | /* | ||
144 | * To improve performance, if the current device is the same as | ||
145 | * the last device accessed, we don't touch the TLB. | ||
146 | */ | ||
147 | entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; | 147 | entryLo0 = (6 << 26) | (cfg_base >> 6) | (2 << 3) | 7; |
148 | entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; | 148 | entryLo1 = (6 << 26) | (cfg_base >> 6) | (0x1000 >> 6) | (2 << 3) | 7; |
149 | |||
150 | if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) { | 149 | if ((entryLo0 != last_entryLo0) || (entryLo1 != last_entryLo1)) { |
151 | mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1, | 150 | mod_wired_entry(pci_cfg_wired_entry, entryLo0, entryLo1, |
152 | (unsigned long)pci_cfg_vm->addr, PM_4K); | 151 | (unsigned long)pci_cfg_vm->addr, PM_4K); |