diff options
-rw-r--r-- | drivers/scsi/advansys.c | 379 |
1 files changed, 101 insertions, 278 deletions
diff --git a/drivers/scsi/advansys.c b/drivers/scsi/advansys.c index 9c5d37d9c79a..e5b26a1ea0ec 100644 --- a/drivers/scsi/advansys.c +++ b/drivers/scsi/advansys.c | |||
@@ -76,10 +76,6 @@ | |||
76 | /* Enable driver tracing. */ | 76 | /* Enable driver tracing. */ |
77 | /* #define ADVANSYS_DEBUG */ | 77 | /* #define ADVANSYS_DEBUG */ |
78 | 78 | ||
79 | /* | ||
80 | * --- Asc Library Constants and Macros | ||
81 | */ | ||
82 | |||
83 | #define ASC_LIB_VERSION_MAJOR 1 | 79 | #define ASC_LIB_VERSION_MAJOR 1 |
84 | #define ASC_LIB_VERSION_MINOR 24 | 80 | #define ASC_LIB_VERSION_MINOR 24 |
85 | #define ASC_LIB_SERIAL_NUMBER 123 | 81 | #define ASC_LIB_SERIAL_NUMBER 123 |
@@ -118,15 +114,10 @@ typedef unsigned char uchar; | |||
118 | #define FALSE (0) | 114 | #define FALSE (0) |
119 | #endif | 115 | #endif |
120 | 116 | ||
121 | #define EOF (-1) | ||
122 | #define ERR (-1) | 117 | #define ERR (-1) |
123 | #define UW_ERR (uint)(0xFFFF) | 118 | #define UW_ERR (uint)(0xFFFF) |
124 | #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0) | 119 | #define isodd_word(val) ((((uint)val) & (uint)0x0001) != 0) |
125 | 120 | ||
126 | #define ASC_DVCLIB_CALL_DONE (1) | ||
127 | #define ASC_DVCLIB_CALL_FAILED (0) | ||
128 | #define ASC_DVCLIB_CALL_ERROR (-1) | ||
129 | |||
130 | #define PCI_VENDOR_ID_ASP 0x10cd | 121 | #define PCI_VENDOR_ID_ASP 0x10cd |
131 | #define PCI_DEVICE_ID_ASP_1200A 0x1100 | 122 | #define PCI_DEVICE_ID_ASP_1200A 0x1100 |
132 | #define PCI_DEVICE_ID_ASP_ABP940 0x1200 | 123 | #define PCI_DEVICE_ID_ASP_ABP940 0x1200 |
@@ -164,11 +155,10 @@ typedef unsigned char uchar; | |||
164 | #define ASC_IS_PCMCIA (0x0008) | 155 | #define ASC_IS_PCMCIA (0x0008) |
165 | #define ASC_IS_MCA (0x0020) | 156 | #define ASC_IS_MCA (0x0020) |
166 | #define ASC_IS_VL (0x0040) | 157 | #define ASC_IS_VL (0x0040) |
167 | #define ASC_ISA_PNP_PORT_ADDR (0x279) | ||
168 | #define ASC_ISA_PNP_PORT_WRITE (ASC_ISA_PNP_PORT_ADDR+0x800) | ||
169 | #define ASC_IS_WIDESCSI_16 (0x0100) | 158 | #define ASC_IS_WIDESCSI_16 (0x0100) |
170 | #define ASC_IS_WIDESCSI_32 (0x0200) | 159 | #define ASC_IS_WIDESCSI_32 (0x0200) |
171 | #define ASC_IS_BIG_ENDIAN (0x8000) | 160 | #define ASC_IS_BIG_ENDIAN (0x8000) |
161 | |||
172 | #define ASC_CHIP_MIN_VER_VL (0x01) | 162 | #define ASC_CHIP_MIN_VER_VL (0x01) |
173 | #define ASC_CHIP_MAX_VER_VL (0x07) | 163 | #define ASC_CHIP_MAX_VER_VL (0x07) |
174 | #define ASC_CHIP_MIN_VER_PCI (0x09) | 164 | #define ASC_CHIP_MIN_VER_PCI (0x09) |
@@ -187,16 +177,9 @@ typedef unsigned char uchar; | |||
187 | #define ASC_CHIP_MAX_VER_EISA (0x47) | 177 | #define ASC_CHIP_MAX_VER_EISA (0x47) |
188 | #define ASC_CHIP_VER_EISA_BIT (0x40) | 178 | #define ASC_CHIP_VER_EISA_BIT (0x40) |
189 | #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3) | 179 | #define ASC_CHIP_LATEST_VER_EISA ((ASC_CHIP_MIN_VER_EISA - 1) + 3) |
190 | #define ASC_MAX_LIB_SUPPORTED_ISA_CHIP_VER 0x21 | ||
191 | #define ASC_MAX_LIB_SUPPORTED_PCI_CHIP_VER 0x0A | ||
192 | #define ASC_MAX_VL_DMA_ADDR (0x07FFFFFFL) | ||
193 | #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL) | 180 | #define ASC_MAX_VL_DMA_COUNT (0x07FFFFFFL) |
194 | #define ASC_MAX_PCI_DMA_ADDR (0xFFFFFFFFL) | ||
195 | #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL) | 181 | #define ASC_MAX_PCI_DMA_COUNT (0xFFFFFFFFL) |
196 | #define ASC_MAX_ISA_DMA_ADDR (0x00FFFFFFL) | ||
197 | #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL) | 182 | #define ASC_MAX_ISA_DMA_COUNT (0x00FFFFFFL) |
198 | #define ASC_MAX_EISA_DMA_ADDR (0x07FFFFFFL) | ||
199 | #define ASC_MAX_EISA_DMA_COUNT (0x07FFFFFFL) | ||
200 | 183 | ||
201 | #define ASC_SCSI_ID_BITS 3 | 184 | #define ASC_SCSI_ID_BITS 3 |
202 | #define ASC_SCSI_TIX_TYPE uchar | 185 | #define ASC_SCSI_TIX_TYPE uchar |
@@ -216,24 +199,6 @@ typedef unsigned char uchar; | |||
216 | #define ASC_MAX_CDB_LEN 12 | 199 | #define ASC_MAX_CDB_LEN 12 |
217 | #define ADV_MAX_CDB_LEN 16 | 200 | #define ADV_MAX_CDB_LEN 16 |
218 | 201 | ||
219 | /* | ||
220 | * Inquiry SPC-2 SPI Byte 1 EVPD (Enable Vital Product Data) | ||
221 | * and CmdDt (Command Support Data) field bit definitions. | ||
222 | */ | ||
223 | #define ADV_INQ_RTN_VPD_AND_CMDDT 0x3 | ||
224 | #define ADV_INQ_RTN_CMDDT_FOR_OP_CODE 0x2 | ||
225 | #define ADV_INQ_RTN_VPD_FOR_PG_CODE 0x1 | ||
226 | #define ADV_INQ_RTN_STD_INQUIRY_DATA 0x0 | ||
227 | |||
228 | #define ASC_SCSIDIR_NOCHK 0x00 | ||
229 | #define ASC_SCSIDIR_T2H 0x08 | ||
230 | #define ASC_SCSIDIR_H2T 0x10 | ||
231 | #define ASC_SCSIDIR_NODATA 0x18 | ||
232 | #define SCSI_ASC_NOMEDIA 0x3A | ||
233 | #define ASC_SRB_HOST(x) ((uchar)((uchar)(x) >> 4)) | ||
234 | #define ASC_SRB_TID(x) ((uchar)((uchar)(x) & (uchar)0x0F)) | ||
235 | #define ASC_SRB_LUN(x) ((uchar)((uint)(x) >> 13)) | ||
236 | #define PUT_CDB1(x) ((uchar)((uint)(x) >> 8)) | ||
237 | #define MS_SDTR_LEN 0x03 | 202 | #define MS_SDTR_LEN 0x03 |
238 | #define MS_WDTR_LEN 0x02 | 203 | #define MS_WDTR_LEN 0x02 |
239 | 204 | ||
@@ -417,19 +382,6 @@ typedef struct asc_sg_head { | |||
417 | ASC_SG_LIST sg_list[ASC_MAX_SG_LIST]; | 382 | ASC_SG_LIST sg_list[ASC_MAX_SG_LIST]; |
418 | } ASC_SG_HEAD; | 383 | } ASC_SG_HEAD; |
419 | 384 | ||
420 | #define ASC_MIN_SG_LIST 2 | ||
421 | |||
422 | typedef struct asc_min_sg_head { | ||
423 | ushort entry_cnt; | ||
424 | ushort queue_cnt; | ||
425 | ushort entry_to_copy; | ||
426 | ushort res; | ||
427 | ASC_SG_LIST sg_list[ASC_MIN_SG_LIST]; | ||
428 | } ASC_MIN_SG_HEAD; | ||
429 | |||
430 | #define QCX_SORT (0x0001) | ||
431 | #define QCX_COALEASE (0x0002) | ||
432 | |||
433 | typedef struct asc_scsi_q { | 385 | typedef struct asc_scsi_q { |
434 | ASC_SCSIQ_1 q1; | 386 | ASC_SCSIQ_1 q1; |
435 | ASC_SCSIQ_2 q2; | 387 | ASC_SCSIQ_2 q2; |
@@ -486,34 +438,9 @@ typedef struct asc_risc_sg_list_q { | |||
486 | ASC_SG_LIST sg_list[7]; | 438 | ASC_SG_LIST sg_list[7]; |
487 | } ASC_RISC_SG_LIST_Q; | 439 | } ASC_RISC_SG_LIST_Q; |
488 | 440 | ||
489 | #define ASC_EXE_SCSI_IO_MAX_IDLE_LOOP 0x1000000UL | ||
490 | #define ASC_EXE_SCSI_IO_MAX_WAIT_LOOP 1024 | ||
491 | #define ASCQ_ERR_NO_ERROR 0 | ||
492 | #define ASCQ_ERR_IO_NOT_FOUND 1 | ||
493 | #define ASCQ_ERR_LOCAL_MEM 2 | ||
494 | #define ASCQ_ERR_CHKSUM 3 | ||
495 | #define ASCQ_ERR_START_CHIP 4 | ||
496 | #define ASCQ_ERR_INT_TARGET_ID 5 | ||
497 | #define ASCQ_ERR_INT_LOCAL_MEM 6 | ||
498 | #define ASCQ_ERR_HALT_RISC 7 | ||
499 | #define ASCQ_ERR_GET_ASPI_ENTRY 8 | ||
500 | #define ASCQ_ERR_CLOSE_ASPI 9 | ||
501 | #define ASCQ_ERR_HOST_INQUIRY 0x0A | ||
502 | #define ASCQ_ERR_SAVED_SRB_BAD 0x0B | ||
503 | #define ASCQ_ERR_QCNTL_SG_LIST 0x0C | ||
504 | #define ASCQ_ERR_Q_STATUS 0x0D | 441 | #define ASCQ_ERR_Q_STATUS 0x0D |
505 | #define ASCQ_ERR_WR_SCSIQ 0x0E | ||
506 | #define ASCQ_ERR_PC_ADDR 0x0F | ||
507 | #define ASCQ_ERR_SYN_OFFSET 0x10 | ||
508 | #define ASCQ_ERR_SYN_XFER_TIME 0x11 | ||
509 | #define ASCQ_ERR_LOCK_DMA 0x12 | ||
510 | #define ASCQ_ERR_UNLOCK_DMA 0x13 | ||
511 | #define ASCQ_ERR_VDS_CHK_INSTALL 0x14 | ||
512 | #define ASCQ_ERR_MICRO_CODE_HALT 0x15 | ||
513 | #define ASCQ_ERR_SET_LRAM_ADDR 0x16 | ||
514 | #define ASCQ_ERR_CUR_QNG 0x17 | 442 | #define ASCQ_ERR_CUR_QNG 0x17 |
515 | #define ASCQ_ERR_SG_Q_LINKS 0x18 | 443 | #define ASCQ_ERR_SG_Q_LINKS 0x18 |
516 | #define ASCQ_ERR_SCSIQ_PTR 0x19 | ||
517 | #define ASCQ_ERR_ISR_RE_ENTRY 0x1A | 444 | #define ASCQ_ERR_ISR_RE_ENTRY 0x1A |
518 | #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B | 445 | #define ASCQ_ERR_CRITICAL_RE_ENTRY 0x1B |
519 | #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C | 446 | #define ASCQ_ERR_ISR_ON_CRITICAL 0x1C |
@@ -529,7 +456,6 @@ typedef struct asc_risc_sg_list_q { | |||
529 | #define ASC_WARN_CMD_QNG_CONFLICT 0x0010 | 456 | #define ASC_WARN_CMD_QNG_CONFLICT 0x0010 |
530 | #define ASC_WARN_EEPROM_RECOVER 0x0020 | 457 | #define ASC_WARN_EEPROM_RECOVER 0x0020 |
531 | #define ASC_WARN_CFG_MSW_RECOVER 0x0040 | 458 | #define ASC_WARN_CFG_MSW_RECOVER 0x0040 |
532 | #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 | ||
533 | 459 | ||
534 | /* | 460 | /* |
535 | * Error code values are set in ASC_DVC_VAR 'err_code'. | 461 | * Error code values are set in ASC_DVC_VAR 'err_code'. |
@@ -549,27 +475,21 @@ typedef struct asc_risc_sg_list_q { | |||
549 | #define ASC_IERR_SET_SDTR 0x1000 | 475 | #define ASC_IERR_SET_SDTR 0x1000 |
550 | #define ASC_IERR_RW_LRAM 0x8000 | 476 | #define ASC_IERR_RW_LRAM 0x8000 |
551 | 477 | ||
552 | #define ASC_DEF_IRQ_NO 10 | ||
553 | #define ASC_MAX_IRQ_NO 15 | 478 | #define ASC_MAX_IRQ_NO 15 |
554 | #define ASC_MIN_IRQ_NO 10 | 479 | #define ASC_MIN_IRQ_NO 10 |
555 | #define ASC_MIN_REMAIN_Q (0x02) | ||
556 | #define ASC_DEF_MAX_TOTAL_QNG (0xF0) | 480 | #define ASC_DEF_MAX_TOTAL_QNG (0xF0) |
557 | #define ASC_MIN_TAG_Q_PER_DVC (0x04) | 481 | #define ASC_MIN_TAG_Q_PER_DVC (0x04) |
558 | #define ASC_DEF_TAG_Q_PER_DVC (0x04) | 482 | #define ASC_MIN_FREE_Q (0x02) |
559 | #define ASC_MIN_FREE_Q ASC_MIN_REMAIN_Q | ||
560 | #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q)) | 483 | #define ASC_MIN_TOTAL_QNG ((ASC_MAX_SG_QUEUE)+(ASC_MIN_FREE_Q)) |
561 | #define ASC_MAX_TOTAL_QNG 240 | 484 | #define ASC_MAX_TOTAL_QNG 240 |
562 | #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16 | 485 | #define ASC_MAX_PCI_ULTRA_INRAM_TOTAL_QNG 16 |
563 | #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8 | 486 | #define ASC_MAX_PCI_ULTRA_INRAM_TAG_QNG 8 |
564 | #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20 | 487 | #define ASC_MAX_PCI_INRAM_TOTAL_QNG 20 |
565 | #define ASC_MAX_INRAM_TAG_QNG 16 | 488 | #define ASC_MAX_INRAM_TAG_QNG 16 |
566 | #define ASC_IOADR_TABLE_MAX_IX 11 | ||
567 | #define ASC_IOADR_GAP 0x10 | 489 | #define ASC_IOADR_GAP 0x10 |
568 | #define ASC_LIB_SCSIQ_WK_SP 256 | ||
569 | #define ASC_MAX_SYN_XFER_NO 16 | 490 | #define ASC_MAX_SYN_XFER_NO 16 |
570 | #define ASC_SYN_MAX_OFFSET 0x0F | 491 | #define ASC_SYN_MAX_OFFSET 0x0F |
571 | #define ASC_DEF_SDTR_OFFSET 0x0F | 492 | #define ASC_DEF_SDTR_OFFSET 0x0F |
572 | #define ASC_DEF_SDTR_INDEX 0x00 | ||
573 | #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02 | 493 | #define ASC_SDTR_ULTRA_PCI_10MB_INDEX 0x02 |
574 | #define SYN_XFER_NS_0 25 | 494 | #define SYN_XFER_NS_0 25 |
575 | #define SYN_XFER_NS_1 30 | 495 | #define SYN_XFER_NS_1 30 |
@@ -648,7 +568,6 @@ typedef struct asc_dvc_cfg { | |||
648 | #define ASC_DEF_DVC_CNTL 0xFFFF | 568 | #define ASC_DEF_DVC_CNTL 0xFFFF |
649 | #define ASC_DEF_CHIP_SCSI_ID 7 | 569 | #define ASC_DEF_CHIP_SCSI_ID 7 |
650 | #define ASC_DEF_ISA_DMA_SPEED 4 | 570 | #define ASC_DEF_ISA_DMA_SPEED 4 |
651 | #define ASC_INIT_STATE_NULL 0x0000 | ||
652 | #define ASC_INIT_STATE_BEG_GET_CFG 0x0001 | 571 | #define ASC_INIT_STATE_BEG_GET_CFG 0x0001 |
653 | #define ASC_INIT_STATE_END_GET_CFG 0x0002 | 572 | #define ASC_INIT_STATE_END_GET_CFG 0x0002 |
654 | #define ASC_INIT_STATE_BEG_SET_CFG 0x0004 | 573 | #define ASC_INIT_STATE_BEG_SET_CFG 0x0004 |
@@ -740,12 +659,7 @@ typedef struct asc_cap_info_array { | |||
740 | #define ASC_EEP_MAX_DVC_ADDR_VL 15 | 659 | #define ASC_EEP_MAX_DVC_ADDR_VL 15 |
741 | #define ASC_EEP_DVC_CFG_BEG 32 | 660 | #define ASC_EEP_DVC_CFG_BEG 32 |
742 | #define ASC_EEP_MAX_DVC_ADDR 45 | 661 | #define ASC_EEP_MAX_DVC_ADDR 45 |
743 | #define ASC_EEP_DEFINED_WORDS 10 | ||
744 | #define ASC_EEP_MAX_ADDR 63 | ||
745 | #define ASC_EEP_RES_WORDS 0 | ||
746 | #define ASC_EEP_MAX_RETRY 20 | 662 | #define ASC_EEP_MAX_RETRY 20 |
747 | #define ASC_MAX_INIT_BUSY_RETRY 8 | ||
748 | #define ASC_EEP_ISA_PNP_WSIZE 16 | ||
749 | 663 | ||
750 | /* | 664 | /* |
751 | * These macros keep the chip SCSI id and ISA DMA speed | 665 | * These macros keep the chip SCSI id and ISA DMA speed |
@@ -781,17 +695,11 @@ typedef struct asceep_config { | |||
781 | ushort chksum; | 695 | ushort chksum; |
782 | } ASCEEP_CONFIG; | 696 | } ASCEEP_CONFIG; |
783 | 697 | ||
784 | #define ASC_PCI_CFG_LSW_SCSI_PARITY 0x0800 | ||
785 | #define ASC_PCI_CFG_LSW_BURST_MODE 0x0080 | ||
786 | #define ASC_PCI_CFG_LSW_INTR_ABLE 0x0020 | ||
787 | |||
788 | #define ASC_EEP_CMD_READ 0x80 | 698 | #define ASC_EEP_CMD_READ 0x80 |
789 | #define ASC_EEP_CMD_WRITE 0x40 | 699 | #define ASC_EEP_CMD_WRITE 0x40 |
790 | #define ASC_EEP_CMD_WRITE_ABLE 0x30 | 700 | #define ASC_EEP_CMD_WRITE_ABLE 0x30 |
791 | #define ASC_EEP_CMD_WRITE_DISABLE 0x00 | 701 | #define ASC_EEP_CMD_WRITE_DISABLE 0x00 |
792 | #define ASC_OVERRUN_BSIZE 0x00000048UL | 702 | #define ASC_OVERRUN_BSIZE 0x00000048UL |
793 | #define ASC_CTRL_BREAK_ONCE 0x0001 | ||
794 | #define ASC_CTRL_BREAK_STAY_IDLE 0x0002 | ||
795 | #define ASCV_MSGOUT_BEG 0x0000 | 703 | #define ASCV_MSGOUT_BEG 0x0000 |
796 | #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3) | 704 | #define ASCV_MSGOUT_SDTR_PERIOD (ASCV_MSGOUT_BEG+3) |
797 | #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4) | 705 | #define ASCV_MSGOUT_SDTR_OFFSET (ASCV_MSGOUT_BEG+4) |
@@ -1105,7 +1013,6 @@ static int AscPutReadySgListQueue(ASC_DVC_VAR *, ASC_SCSI_Q *, uchar); | |||
1105 | static int AscSetChipSynRegAtID(PortAddr, uchar, uchar); | 1013 | static int AscSetChipSynRegAtID(PortAddr, uchar, uchar); |
1106 | static int AscSetRunChipSynRegAtID(PortAddr, uchar, uchar); | 1014 | static int AscSetRunChipSynRegAtID(PortAddr, uchar, uchar); |
1107 | static ushort AscInitLram(ASC_DVC_VAR *); | 1015 | static ushort AscInitLram(ASC_DVC_VAR *); |
1108 | static ushort AscInitQLinkVar(ASC_DVC_VAR *); | ||
1109 | static int AscSetLibErrorCode(ASC_DVC_VAR *, ushort); | 1016 | static int AscSetLibErrorCode(ASC_DVC_VAR *, ushort); |
1110 | static int AscIsrChipHalted(ASC_DVC_VAR *); | 1017 | static int AscIsrChipHalted(ASC_DVC_VAR *); |
1111 | static uchar _AscCopyLramScsiDoneQ(PortAddr, ushort, | 1018 | static uchar _AscCopyLramScsiDoneQ(PortAddr, ushort, |
@@ -1131,10 +1038,6 @@ static void AscEnableIsaDma(uchar); | |||
1131 | #endif /* CONFIG_ISA */ | 1038 | #endif /* CONFIG_ISA */ |
1132 | static const char *advansys_info(struct Scsi_Host *shost); | 1039 | static const char *advansys_info(struct Scsi_Host *shost); |
1133 | 1040 | ||
1134 | /* | ||
1135 | * --- Adv Library Constants and Macros | ||
1136 | */ | ||
1137 | |||
1138 | #define ADV_LIB_VERSION_MAJOR 5 | 1041 | #define ADV_LIB_VERSION_MAJOR 5 |
1139 | #define ADV_LIB_VERSION_MINOR 14 | 1042 | #define ADV_LIB_VERSION_MINOR 14 |
1140 | 1043 | ||
@@ -1515,10 +1418,6 @@ typedef struct adveep_38C1600_config { | |||
1515 | * EEPROM Commands | 1418 | * EEPROM Commands |
1516 | */ | 1419 | */ |
1517 | #define ASC_EEP_CMD_DONE 0x0200 | 1420 | #define ASC_EEP_CMD_DONE 0x0200 |
1518 | #define ASC_EEP_CMD_DONE_ERR 0x0001 | ||
1519 | |||
1520 | /* cfg_word */ | ||
1521 | #define EEP_CFG_WORD_BIG_ENDIAN 0x8000 | ||
1522 | 1421 | ||
1523 | /* bios_ctrl */ | 1422 | /* bios_ctrl */ |
1524 | #define BIOS_CTRL_BIOS 0x0001 | 1423 | #define BIOS_CTRL_BIOS 0x0001 |
@@ -1675,8 +1574,6 @@ typedef struct adveep_38C1600_config { | |||
1675 | #define ADV_CHIP_ID_BYTE 0x25 | 1574 | #define ADV_CHIP_ID_BYTE 0x25 |
1676 | #define ADV_CHIP_ID_WORD 0x04C1 | 1575 | #define ADV_CHIP_ID_WORD 0x04C1 |
1677 | 1576 | ||
1678 | #define ADV_SC_SCSI_BUS_RESET 0x2000 | ||
1679 | |||
1680 | #define ADV_INTR_ENABLE_HOST_INTR 0x01 | 1577 | #define ADV_INTR_ENABLE_HOST_INTR 0x01 |
1681 | #define ADV_INTR_ENABLE_SEL_INTR 0x02 | 1578 | #define ADV_INTR_ENABLE_SEL_INTR 0x02 |
1682 | #define ADV_INTR_ENABLE_DPR_INTR 0x04 | 1579 | #define ADV_INTR_ENABLE_DPR_INTR 0x04 |
@@ -1716,8 +1613,6 @@ typedef struct adveep_38C1600_config { | |||
1716 | #define ADV_TICKLE_B 0x02 | 1613 | #define ADV_TICKLE_B 0x02 |
1717 | #define ADV_TICKLE_C 0x03 | 1614 | #define ADV_TICKLE_C 0x03 |
1718 | 1615 | ||
1719 | #define ADV_SCSI_CTRL_RSTOUT 0x2000 | ||
1720 | |||
1721 | #define AdvIsIntPending(port) \ | 1616 | #define AdvIsIntPending(port) \ |
1722 | (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR) | 1617 | (AdvReadWordRegister(port, IOPW_CTRL_REG) & ADV_CTRL_REG_HOST_INTR) |
1723 | 1618 | ||
@@ -1870,14 +1765,11 @@ typedef struct adveep_38C1600_config { | |||
1870 | */ | 1765 | */ |
1871 | #define INTAB 0x01 | 1766 | #define INTAB 0x01 |
1872 | 1767 | ||
1873 | /* a_advlib.h */ | ||
1874 | |||
1875 | /* | 1768 | /* |
1876 | * Adv Library Status Definitions | 1769 | * Adv Library Status Definitions |
1877 | */ | 1770 | */ |
1878 | #define ADV_TRUE 1 | 1771 | #define ADV_TRUE 1 |
1879 | #define ADV_FALSE 0 | 1772 | #define ADV_FALSE 0 |
1880 | #define ADV_NOERROR 1 | ||
1881 | #define ADV_SUCCESS 1 | 1773 | #define ADV_SUCCESS 1 |
1882 | #define ADV_BUSY 0 | 1774 | #define ADV_BUSY 0 |
1883 | #define ADV_ERROR (-1) | 1775 | #define ADV_ERROR (-1) |
@@ -1888,7 +1780,6 @@ typedef struct adveep_38C1600_config { | |||
1888 | #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */ | 1780 | #define ASC_WARN_BUSRESET_ERROR 0x0001 /* SCSI Bus Reset error */ |
1889 | #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */ | 1781 | #define ASC_WARN_EEPROM_CHKSUM 0x0002 /* EEP check sum error */ |
1890 | #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */ | 1782 | #define ASC_WARN_EEPROM_TERMINATION 0x0004 /* EEP termination bad field */ |
1891 | #define ASC_WARN_SET_PCI_CONFIG_SPACE 0x0080 /* PCI config space set error */ | ||
1892 | #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */ | 1783 | #define ASC_WARN_ERROR 0xFFFF /* ADV_ERROR return */ |
1893 | 1784 | ||
1894 | #define ADV_MAX_TID 15 /* max. target identifier */ | 1785 | #define ADV_MAX_TID 15 /* max. target identifier */ |
@@ -2206,10 +2097,8 @@ typedef struct adv_scsi_req_q { | |||
2206 | /* | 2097 | /* |
2207 | * Wait loop time out values. | 2098 | * Wait loop time out values. |
2208 | */ | 2099 | */ |
2209 | #define SCSI_WAIT_10_SEC 10UL /* 10 seconds */ | ||
2210 | #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */ | 2100 | #define SCSI_WAIT_100_MSEC 100UL /* 100 milliseconds */ |
2211 | #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */ | 2101 | #define SCSI_US_PER_MSEC 1000 /* microseconds per millisecond */ |
2212 | #define SCSI_MS_PER_SEC 1000UL /* milliseconds per second */ | ||
2213 | #define SCSI_MAX_RETRY 10 /* retry count */ | 2102 | #define SCSI_MAX_RETRY 10 /* retry count */ |
2214 | 2103 | ||
2215 | #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */ | 2104 | #define ADV_ASYNC_RDMA_FAILURE 0x01 /* Fatal RDMA failure. */ |
@@ -2443,10 +2332,6 @@ do { \ | |||
2443 | (sizeof(ADV_SG_BLOCK) * \ | 2332 | (sizeof(ADV_SG_BLOCK) * \ |
2444 | ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)) | 2333 | ((ADV_MAX_SG_LIST + (NO_OF_SG_PER_BLOCK - 1))/NO_OF_SG_PER_BLOCK)) |
2445 | 2334 | ||
2446 | /* | ||
2447 | * --- Driver Constants and Macros | ||
2448 | */ | ||
2449 | |||
2450 | /* Reference Scsi_Host hostdata */ | 2335 | /* Reference Scsi_Host hostdata */ |
2451 | #define ASC_BOARDP(host) ((asc_board_t *) &((host)->hostdata)) | 2336 | #define ASC_BOARDP(host) ((asc_board_t *) &((host)->hostdata)) |
2452 | 2337 | ||
@@ -2792,10 +2677,6 @@ static ASC_SG_HEAD asc_sg_head = { 0 }; | |||
2792 | static int asc_dbglvl = 3; | 2677 | static int asc_dbglvl = 3; |
2793 | #endif /* ADVANSYS_DEBUG */ | 2678 | #endif /* ADVANSYS_DEBUG */ |
2794 | 2679 | ||
2795 | /* | ||
2796 | * --- Driver Function Prototypes | ||
2797 | */ | ||
2798 | |||
2799 | static int advansys_slave_configure(struct scsi_device *); | 2680 | static int advansys_slave_configure(struct scsi_device *); |
2800 | static int asc_execute_scsi_cmnd(struct scsi_cmnd *); | 2681 | static int asc_execute_scsi_cmnd(struct scsi_cmnd *); |
2801 | static int asc_build_req(asc_board_t *, struct scsi_cmnd *); | 2682 | static int asc_build_req(asc_board_t *, struct scsi_cmnd *); |
@@ -3359,17 +3240,9 @@ static struct scsi_host_template advansys_template = { | |||
3359 | }; | 3240 | }; |
3360 | 3241 | ||
3361 | /* | 3242 | /* |
3362 | * --- Miscellaneous Driver Functions | ||
3363 | */ | ||
3364 | |||
3365 | /* | ||
3366 | * First-level interrupt handler. | 3243 | * First-level interrupt handler. |
3367 | * | 3244 | * |
3368 | * 'dev_id' is a pointer to the interrupting adapter's asc_board_t. Because | 3245 | * 'dev_id' is a pointer to the interrupting adapter's Scsi_Host. |
3369 | * all boards are currently checked for interrupts on each interrupt, 'dev_id' | ||
3370 | * is not referenced. 'dev_id' could be used to identify an interrupt passed | ||
3371 | * to the AdvanSys driver which is for a device sharing an interrupt with | ||
3372 | * an AdvanSys adapter. | ||
3373 | */ | 3246 | */ |
3374 | static irqreturn_t advansys_interrupt(int irq, void *dev_id) | 3247 | static irqreturn_t advansys_interrupt(int irq, void *dev_id) |
3375 | { | 3248 | { |
@@ -3381,9 +3254,6 @@ static irqreturn_t advansys_interrupt(int irq, void *dev_id) | |||
3381 | ASC_DBG1(2, "advansys_interrupt: boardp 0x%p\n", boardp); | 3254 | ASC_DBG1(2, "advansys_interrupt: boardp 0x%p\n", boardp); |
3382 | spin_lock_irqsave(&boardp->lock, flags); | 3255 | spin_lock_irqsave(&boardp->lock, flags); |
3383 | if (ASC_NARROW_BOARD(boardp)) { | 3256 | if (ASC_NARROW_BOARD(boardp)) { |
3384 | /* | ||
3385 | * Narrow Board | ||
3386 | */ | ||
3387 | if (AscIsIntPending(shost->io_port)) { | 3257 | if (AscIsIntPending(shost->io_port)) { |
3388 | result = IRQ_HANDLED; | 3258 | result = IRQ_HANDLED; |
3389 | ASC_STATS(shost, interrupt); | 3259 | ASC_STATS(shost, interrupt); |
@@ -3391,23 +3261,14 @@ static irqreturn_t advansys_interrupt(int irq, void *dev_id) | |||
3391 | AscISR(&boardp->dvc_var.asc_dvc_var); | 3261 | AscISR(&boardp->dvc_var.asc_dvc_var); |
3392 | } | 3262 | } |
3393 | } else { | 3263 | } else { |
3394 | /* | ||
3395 | * Wide Board | ||
3396 | */ | ||
3397 | ASC_DBG(1, "advansys_interrupt: before AdvISR()\n"); | 3264 | ASC_DBG(1, "advansys_interrupt: before AdvISR()\n"); |
3398 | if (AdvISR(&boardp->dvc_var.adv_dvc_var)) { | 3265 | if (AdvISR(&boardp->dvc_var.adv_dvc_var)) { |
3399 | result = IRQ_HANDLED; | 3266 | result = IRQ_HANDLED; |
3400 | ASC_STATS(shost, interrupt); | 3267 | ASC_STATS(shost, interrupt); |
3401 | } | 3268 | } |
3402 | } | 3269 | } |
3403 | |||
3404 | spin_unlock_irqrestore(&boardp->lock, flags); | 3270 | spin_unlock_irqrestore(&boardp->lock, flags); |
3405 | 3271 | ||
3406 | /* | ||
3407 | * If interrupts were enabled on entry, then they | ||
3408 | * are now enabled here. | ||
3409 | */ | ||
3410 | |||
3411 | ASC_DBG(1, "advansys_interrupt: end\n"); | 3272 | ASC_DBG(1, "advansys_interrupt: end\n"); |
3412 | return result; | 3273 | return result; |
3413 | } | 3274 | } |
@@ -4110,7 +3971,7 @@ adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, | |||
4110 | prev_sg_block = NULL; | 3971 | prev_sg_block = NULL; |
4111 | reqp->sgblkp = NULL; | 3972 | reqp->sgblkp = NULL; |
4112 | 3973 | ||
4113 | do { | 3974 | for (;;) { |
4114 | /* | 3975 | /* |
4115 | * Allocate a 'adv_sgblk_t' structure from the board free | 3976 | * Allocate a 'adv_sgblk_t' structure from the board free |
4116 | * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK | 3977 | * list. One 'adv_sgblk_t' structure holds NO_OF_SG_PER_BLOCK |
@@ -4121,8 +3982,8 @@ adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, | |||
4121 | ASC_STATS(scp->device->host, adv_build_nosg); | 3982 | ASC_STATS(scp->device->host, adv_build_nosg); |
4122 | 3983 | ||
4123 | /* | 3984 | /* |
4124 | * Allocation failed. Free 'adv_sgblk_t' structures already | 3985 | * Allocation failed. Free 'adv_sgblk_t' structures |
4125 | * allocated for the request. | 3986 | * already allocated for the request. |
4126 | */ | 3987 | */ |
4127 | while ((sgblkp = reqp->sgblkp) != NULL) { | 3988 | while ((sgblkp = reqp->sgblkp) != NULL) { |
4128 | /* Remove 'sgblkp' from the request list. */ | 3989 | /* Remove 'sgblkp' from the request list. */ |
@@ -4133,52 +3994,50 @@ adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, | |||
4133 | boardp->adv_sgblkp = sgblkp; | 3994 | boardp->adv_sgblkp = sgblkp; |
4134 | } | 3995 | } |
4135 | return ASC_BUSY; | 3996 | return ASC_BUSY; |
4136 | } else { | 3997 | } |
4137 | /* Complete 'adv_sgblk_t' board allocation. */ | 3998 | |
4138 | boardp->adv_sgblkp = sgblkp->next_sgblkp; | 3999 | /* Complete 'adv_sgblk_t' board allocation. */ |
4139 | sgblkp->next_sgblkp = NULL; | 4000 | boardp->adv_sgblkp = sgblkp->next_sgblkp; |
4001 | sgblkp->next_sgblkp = NULL; | ||
4002 | |||
4003 | /* | ||
4004 | * Get 8 byte aligned virtual and physical addresses | ||
4005 | * for the allocated ADV_SG_BLOCK structure. | ||
4006 | */ | ||
4007 | sg_block = (ADV_SG_BLOCK *)ADV_8BALIGN(&sgblkp->sg_block); | ||
4008 | sg_block_paddr = virt_to_bus(sg_block); | ||
4009 | |||
4010 | /* | ||
4011 | * Check if this is the first 'adv_sgblk_t' for the | ||
4012 | * request. | ||
4013 | */ | ||
4014 | if (reqp->sgblkp == NULL) { | ||
4015 | /* Request's first scatter-gather block. */ | ||
4016 | reqp->sgblkp = sgblkp; | ||
4140 | 4017 | ||
4141 | /* | 4018 | /* |
4142 | * Get 8 byte aligned virtual and physical addresses for | 4019 | * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical |
4143 | * the allocated ADV_SG_BLOCK structure. | 4020 | * address pointers. |
4144 | */ | 4021 | */ |
4145 | sg_block = | 4022 | scsiqp->sg_list_ptr = sg_block; |
4146 | (ADV_SG_BLOCK *)ADV_8BALIGN(&sgblkp->sg_block); | 4023 | scsiqp->sg_real_addr = cpu_to_le32(sg_block_paddr); |
4147 | sg_block_paddr = virt_to_bus(sg_block); | 4024 | } else { |
4025 | /* Request's second or later scatter-gather block. */ | ||
4026 | sgblkp->next_sgblkp = reqp->sgblkp; | ||
4027 | reqp->sgblkp = sgblkp; | ||
4148 | 4028 | ||
4149 | /* | 4029 | /* |
4150 | * Check if this is the first 'adv_sgblk_t' for the request. | 4030 | * Point the previous ADV_SG_BLOCK structure to |
4031 | * the newly allocated ADV_SG_BLOCK structure. | ||
4151 | */ | 4032 | */ |
4152 | if (reqp->sgblkp == NULL) { | 4033 | prev_sg_block->sg_ptr = cpu_to_le32(sg_block_paddr); |
4153 | /* Request's first scatter-gather block. */ | ||
4154 | reqp->sgblkp = sgblkp; | ||
4155 | |||
4156 | /* | ||
4157 | * Set ADV_SCSI_REQ_T ADV_SG_BLOCK virtual and physical | ||
4158 | * address pointers. | ||
4159 | */ | ||
4160 | scsiqp->sg_list_ptr = sg_block; | ||
4161 | scsiqp->sg_real_addr = | ||
4162 | cpu_to_le32(sg_block_paddr); | ||
4163 | } else { | ||
4164 | /* Request's second or later scatter-gather block. */ | ||
4165 | sgblkp->next_sgblkp = reqp->sgblkp; | ||
4166 | reqp->sgblkp = sgblkp; | ||
4167 | |||
4168 | /* | ||
4169 | * Point the previous ADV_SG_BLOCK structure to | ||
4170 | * the newly allocated ADV_SG_BLOCK structure. | ||
4171 | */ | ||
4172 | prev_sg_block->sg_ptr = | ||
4173 | cpu_to_le32(sg_block_paddr); | ||
4174 | } | ||
4175 | } | 4034 | } |
4176 | 4035 | ||
4177 | for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) { | 4036 | for (i = 0; i < NO_OF_SG_PER_BLOCK; i++) { |
4178 | sg_block->sg_list[i].sg_addr = | 4037 | sg_block->sg_list[i].sg_addr = |
4179 | cpu_to_le32(sg_dma_address(slp)); | 4038 | cpu_to_le32(sg_dma_address(slp)); |
4180 | sg_block->sg_list[i].sg_count = | 4039 | sg_block->sg_list[i].sg_count = |
4181 | cpu_to_le32(sg_dma_len(slp)); | 4040 | cpu_to_le32(sg_dma_len(slp)); |
4182 | ASC_STATS_ADD(scp->device->host, sg_xfer, | 4041 | ASC_STATS_ADD(scp->device->host, sg_xfer, |
4183 | ASC_CEILING(sg_dma_len(slp), 512)); | 4042 | ASC_CEILING(sg_dma_len(slp), 512)); |
4184 | 4043 | ||
@@ -4192,8 +4051,6 @@ adv_get_sglist(asc_board_t *boardp, adv_req_t *reqp, struct scsi_cmnd *scp, | |||
4192 | sg_block->sg_cnt = NO_OF_SG_PER_BLOCK; | 4051 | sg_block->sg_cnt = NO_OF_SG_PER_BLOCK; |
4193 | prev_sg_block = sg_block; | 4052 | prev_sg_block = sg_block; |
4194 | } | 4053 | } |
4195 | while (1); | ||
4196 | /* NOTREACHED */ | ||
4197 | } | 4054 | } |
4198 | 4055 | ||
4199 | /* | 4056 | /* |
@@ -4264,14 +4121,16 @@ static void asc_isr_callback(ASC_DVC_VAR *asc_dvc_varp, ASC_QDONE_INFO *qdonep) | |||
4264 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | 4121 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, |
4265 | sizeof(scp->sense_buffer)); | 4122 | sizeof(scp->sense_buffer)); |
4266 | /* | 4123 | /* |
4267 | * Note: The 'status_byte()' macro used by target drivers | 4124 | * Note: The 'status_byte()' macro used by |
4268 | * defined in scsi.h shifts the status byte returned by | 4125 | * target drivers defined in scsi.h shifts the |
4269 | * host drivers right by 1 bit. This is why target drivers | 4126 | * status byte returned by host drivers right |
4270 | * also use right shifted status byte definitions. For | 4127 | * by 1 bit. This is why target drivers also |
4271 | * instance target drivers use CHECK_CONDITION, defined to | 4128 | * use right shifted status byte definitions. |
4272 | * 0x1, instead of the SCSI defined check condition value | 4129 | * For instance target drivers use |
4273 | * of 0x2. Host drivers are supposed to return the status | 4130 | * CHECK_CONDITION, defined to 0x1, instead of |
4274 | * byte as it is defined by SCSI. | 4131 | * the SCSI defined check condition value of |
4132 | * 0x2. Host drivers are supposed to return | ||
4133 | * the status byte as it is defined by SCSI. | ||
4275 | */ | 4134 | */ |
4276 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | 4135 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | |
4277 | STATUS_BYTE(qdonep->d3.scsi_stat); | 4136 | STATUS_BYTE(qdonep->d3.scsi_stat); |
@@ -4411,14 +4270,16 @@ static void adv_isr_callback(ADV_DVC_VAR *adv_dvc_varp, ADV_SCSI_REQ_Q *scsiqp) | |||
4411 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, | 4270 | ASC_DBG_PRT_SENSE(2, scp->sense_buffer, |
4412 | sizeof(scp->sense_buffer)); | 4271 | sizeof(scp->sense_buffer)); |
4413 | /* | 4272 | /* |
4414 | * Note: The 'status_byte()' macro used by target drivers | 4273 | * Note: The 'status_byte()' macro used by |
4415 | * defined in scsi.h shifts the status byte returned by | 4274 | * target drivers defined in scsi.h shifts the |
4416 | * host drivers right by 1 bit. This is why target drivers | 4275 | * status byte returned by host drivers right |
4417 | * also use right shifted status byte definitions. For | 4276 | * by 1 bit. This is why target drivers also |
4418 | * instance target drivers use CHECK_CONDITION, defined to | 4277 | * use right shifted status byte definitions. |
4419 | * 0x1, instead of the SCSI defined check condition value | 4278 | * For instance target drivers use |
4420 | * of 0x2. Host drivers are supposed to return the status | 4279 | * CHECK_CONDITION, defined to 0x1, instead of |
4421 | * byte as it is defined by SCSI. | 4280 | * the SCSI defined check condition value of |
4281 | * 0x2. Host drivers are supposed to return | ||
4282 | * the status byte as it is defined by SCSI. | ||
4422 | */ | 4283 | */ |
4423 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | | 4284 | scp->result = DRIVER_BYTE(DRIVER_SENSE) | |
4424 | STATUS_BYTE(scsiqp->scsi_status); | 4285 | STATUS_BYTE(scsiqp->scsi_status); |
@@ -5719,10 +5580,6 @@ static int asc_prt_line(char *buf, int buflen, char *fmt, ...) | |||
5719 | #endif /* CONFIG_PROC_FS */ | 5580 | #endif /* CONFIG_PROC_FS */ |
5720 | 5581 | ||
5721 | /* | 5582 | /* |
5722 | * --- Functions Required by the Asc Library | ||
5723 | */ | ||
5724 | |||
5725 | /* | ||
5726 | * void | 5583 | * void |
5727 | * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) | 5584 | * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words) |
5728 | * | 5585 | * |
@@ -5815,10 +5672,6 @@ AscGetChipBiosAddress(PortAddr iop_base, unsigned short bus_type) | |||
5815 | } | 5672 | } |
5816 | 5673 | ||
5817 | /* | 5674 | /* |
5818 | * --- Functions Required by the Adv Library | ||
5819 | */ | ||
5820 | |||
5821 | /* | ||
5822 | * DvcGetPhyAddr() | 5675 | * DvcGetPhyAddr() |
5823 | * | 5676 | * |
5824 | * Return the physical address of 'vaddr' and set '*lenp' to the | 5677 | * Return the physical address of 'vaddr' and set '*lenp' to the |
@@ -5845,10 +5698,6 @@ DvcGetPhyAddr(ADV_DVC_VAR *asc_dvc, ADV_SCSI_REQ_Q *scsiq, | |||
5845 | return paddr; | 5698 | return paddr; |
5846 | } | 5699 | } |
5847 | 5700 | ||
5848 | /* | ||
5849 | * --- Tracing and Debugging Functions | ||
5850 | */ | ||
5851 | |||
5852 | #ifdef ADVANSYS_STATS | 5701 | #ifdef ADVANSYS_STATS |
5853 | #ifdef CONFIG_PROC_FS | 5702 | #ifdef CONFIG_PROC_FS |
5854 | /* | 5703 | /* |
@@ -6322,10 +6171,6 @@ static void asc_prt_hex(char *f, uchar *s, int l) | |||
6322 | } | 6171 | } |
6323 | #endif /* ADVANSYS_DEBUG */ | 6172 | #endif /* ADVANSYS_DEBUG */ |
6324 | 6173 | ||
6325 | /* | ||
6326 | * --- Asc Library Functions | ||
6327 | */ | ||
6328 | |||
6329 | static ushort __devinit AscGetEisaChipCfg(PortAddr iop_base) | 6174 | static ushort __devinit AscGetEisaChipCfg(PortAddr iop_base) |
6330 | { | 6175 | { |
6331 | PortAddr eisa_cfg_iop; | 6176 | PortAddr eisa_cfg_iop; |
@@ -6537,8 +6382,7 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
6537 | target_ix = AscReadLramByte(iop_base, | 6382 | target_ix = AscReadLramByte(iop_base, |
6538 | (ushort)(halt_q_addr + | 6383 | (ushort)(halt_q_addr + |
6539 | (ushort)ASC_SCSIQ_B_TARGET_IX)); | 6384 | (ushort)ASC_SCSIQ_B_TARGET_IX)); |
6540 | q_cntl = | 6385 | q_cntl = AscReadLramByte(iop_base, |
6541 | AscReadLramByte(iop_base, | ||
6542 | (ushort)(halt_q_addr + (ushort)ASC_SCSIQ_B_CNTL)); | 6386 | (ushort)(halt_q_addr + (ushort)ASC_SCSIQ_B_CNTL)); |
6543 | tid_no = ASC_TIX_TO_TID(target_ix); | 6387 | tid_no = ASC_TIX_TO_TID(target_ix); |
6544 | target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no); | 6388 | target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no); |
@@ -6562,7 +6406,6 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
6562 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); | 6406 | AscWriteLramWord(iop_base, ASCV_HALTCODE_W, 0); |
6563 | return (0); | 6407 | return (0); |
6564 | } else if (int_halt_code == ASC_HALT_EXTMSG_IN) { | 6408 | } else if (int_halt_code == ASC_HALT_EXTMSG_IN) { |
6565 | |||
6566 | AscMemWordCopyPtrFromLram(iop_base, | 6409 | AscMemWordCopyPtrFromLram(iop_base, |
6567 | ASCV_MSGIN_BEG, | 6410 | ASCV_MSGIN_BEG, |
6568 | (uchar *)&ext_msg, | 6411 | (uchar *)&ext_msg, |
@@ -6793,9 +6636,9 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
6793 | cur_dvc_qng); | 6636 | cur_dvc_qng); |
6794 | 6637 | ||
6795 | /* | 6638 | /* |
6796 | * Set the device queue depth to the number of | 6639 | * Set the device queue depth to the |
6797 | * active requests when the QUEUE FULL condition | 6640 | * number of active requests when the |
6798 | * was encountered. | 6641 | * QUEUE FULL condition was encountered. |
6799 | */ | 6642 | */ |
6800 | boardp->queue_full |= target_id; | 6643 | boardp->queue_full |= target_id; |
6801 | boardp->queue_full_cnt[tid_no] = | 6644 | boardp->queue_full_cnt[tid_no] = |
@@ -6821,9 +6664,8 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
6821 | int i; | 6664 | int i; |
6822 | 6665 | ||
6823 | q_no = AscReadLramByte(iop_base, (ushort)ASCV_REQ_SG_LIST_QP); | 6666 | q_no = AscReadLramByte(iop_base, (ushort)ASCV_REQ_SG_LIST_QP); |
6824 | if (q_no == ASC_QLINK_END) { | 6667 | if (q_no == ASC_QLINK_END) |
6825 | return (0); | 6668 | return 0; |
6826 | } | ||
6827 | 6669 | ||
6828 | q_addr = ASC_QNO_TO_QADDR(q_no); | 6670 | q_addr = ASC_QNO_TO_QADDR(q_no); |
6829 | 6671 | ||
@@ -6875,8 +6717,8 @@ static int AscIsrChipHalted(ASC_DVC_VAR *asc_dvc) | |||
6875 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; | 6717 | sg_entry_cnt = ASC_MAX_SG_LIST - 1; |
6876 | 6718 | ||
6877 | /* | 6719 | /* |
6878 | * Keep track of remaining number of SG elements that will | 6720 | * Keep track of remaining number of SG elements that |
6879 | * need to be handled on the next interrupt. | 6721 | * will need to be handled on the next interrupt. |
6880 | */ | 6722 | */ |
6881 | scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1); | 6723 | scsiq->remain_sg_entry_cnt -= (ASC_MAX_SG_LIST - 1); |
6882 | } else { | 6724 | } else { |
@@ -7723,36 +7565,28 @@ AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required) | |||
7723 | sta = 0; | 7565 | sta = 0; |
7724 | free_q_head = (uchar)AscGetVarFreeQHead(iop_base); | 7566 | free_q_head = (uchar)AscGetVarFreeQHead(iop_base); |
7725 | if (n_q_required > 1) { | 7567 | if (n_q_required > 1) { |
7726 | if ((next_qp = AscAllocMultipleFreeQueue(iop_base, | 7568 | next_qp = AscAllocMultipleFreeQueue(iop_base, free_q_head, |
7727 | free_q_head, (uchar) | 7569 | (uchar)n_q_required); |
7728 | (n_q_required))) | 7570 | if (next_qp != ASC_QLINK_END) { |
7729 | != (uchar)ASC_QLINK_END) { | ||
7730 | asc_dvc->last_q_shortage = 0; | 7571 | asc_dvc->last_q_shortage = 0; |
7731 | scsiq->sg_head->queue_cnt = n_q_required - 1; | 7572 | scsiq->sg_head->queue_cnt = n_q_required - 1; |
7732 | scsiq->q1.q_no = free_q_head; | 7573 | scsiq->q1.q_no = free_q_head; |
7733 | if ((sta = AscPutReadySgListQueue(asc_dvc, scsiq, | 7574 | sta = AscPutReadySgListQueue(asc_dvc, scsiq, |
7734 | free_q_head)) == 1) { | 7575 | free_q_head); |
7735 | AscPutVarFreeQHead(iop_base, next_qp); | ||
7736 | asc_dvc->cur_total_qng += (uchar)(n_q_required); | ||
7737 | asc_dvc->cur_dvc_qng[tid_no]++; | ||
7738 | } | ||
7739 | return (sta); | ||
7740 | } | 7576 | } |
7741 | } else if (n_q_required == 1) { | 7577 | } else if (n_q_required == 1) { |
7742 | if ((next_qp = AscAllocFreeQueue(iop_base, | 7578 | next_qp = AscAllocFreeQueue(iop_base, free_q_head); |
7743 | free_q_head)) != | 7579 | if (next_qp != ASC_QLINK_END) { |
7744 | ASC_QLINK_END) { | ||
7745 | scsiq->q1.q_no = free_q_head; | 7580 | scsiq->q1.q_no = free_q_head; |
7746 | if ((sta = AscPutReadyQueue(asc_dvc, scsiq, | 7581 | sta = AscPutReadyQueue(asc_dvc, scsiq, free_q_head); |
7747 | free_q_head)) == 1) { | ||
7748 | AscPutVarFreeQHead(iop_base, next_qp); | ||
7749 | asc_dvc->cur_total_qng++; | ||
7750 | asc_dvc->cur_dvc_qng[tid_no]++; | ||
7751 | } | ||
7752 | return (sta); | ||
7753 | } | 7582 | } |
7754 | } | 7583 | } |
7755 | return (sta); | 7584 | if (sta == 1) { |
7585 | AscPutVarFreeQHead(iop_base, next_qp); | ||
7586 | asc_dvc->cur_total_qng += (uchar)(n_q_required); | ||
7587 | asc_dvc->cur_dvc_qng[tid_no]++; | ||
7588 | } | ||
7589 | return sta; | ||
7756 | } | 7590 | } |
7757 | 7591 | ||
7758 | static int AscSgListToQueue(int sg_list) | 7592 | static int AscSgListToQueue(int sg_list) |
@@ -8072,7 +7906,7 @@ static ushort AscInitLram(ASC_DVC_VAR *asc_dvc) | |||
8072 | return (warn_code); | 7906 | return (warn_code); |
8073 | } | 7907 | } |
8074 | 7908 | ||
8075 | static ushort AscInitQLinkVar(ASC_DVC_VAR *asc_dvc) | 7909 | static void AscInitQLinkVar(ASC_DVC_VAR *asc_dvc) |
8076 | { | 7910 | { |
8077 | PortAddr iop_base; | 7911 | PortAddr iop_base; |
8078 | int i; | 7912 | int i; |
@@ -8099,7 +7933,6 @@ static ushort AscInitQLinkVar(ASC_DVC_VAR *asc_dvc) | |||
8099 | for (i = 0; i < 32; i++, lram_addr += 2) { | 7933 | for (i = 0; i < 32; i++, lram_addr += 2) { |
8100 | AscWriteLramWord(iop_base, lram_addr, 0); | 7934 | AscWriteLramWord(iop_base, lram_addr, 0); |
8101 | } | 7935 | } |
8102 | return (0); | ||
8103 | } | 7936 | } |
8104 | 7937 | ||
8105 | static int AscSetLibErrorCode(ASC_DVC_VAR *asc_dvc, ushort err_code) | 7938 | static int AscSetLibErrorCode(ASC_DVC_VAR *asc_dvc, ushort err_code) |
@@ -8396,10 +8229,10 @@ static int AscResetChipAndScsiBus(ASC_DVC_VAR *asc_dvc) | |||
8396 | static ASC_DCNT __devinit AscGetMaxDmaCount(ushort bus_type) | 8229 | static ASC_DCNT __devinit AscGetMaxDmaCount(ushort bus_type) |
8397 | { | 8230 | { |
8398 | if (bus_type & ASC_IS_ISA) | 8231 | if (bus_type & ASC_IS_ISA) |
8399 | return (ASC_MAX_ISA_DMA_COUNT); | 8232 | return ASC_MAX_ISA_DMA_COUNT; |
8400 | else if (bus_type & (ASC_IS_EISA | ASC_IS_VL)) | 8233 | else if (bus_type & (ASC_IS_EISA | ASC_IS_VL)) |
8401 | return (ASC_MAX_VL_DMA_COUNT); | 8234 | return ASC_MAX_VL_DMA_COUNT; |
8402 | return (ASC_MAX_PCI_DMA_COUNT); | 8235 | return ASC_MAX_PCI_DMA_COUNT; |
8403 | } | 8236 | } |
8404 | 8237 | ||
8405 | #ifdef CONFIG_ISA | 8238 | #ifdef CONFIG_ISA |
@@ -9262,26 +9095,22 @@ static void AscAsyncFix(ASC_DVC_VAR *asc_dvc, struct scsi_device *sdev) | |||
9262 | char type = sdev->type; | 9095 | char type = sdev->type; |
9263 | ASC_SCSI_BIT_ID_TYPE tid_bits = 1 << sdev->id; | 9096 | ASC_SCSI_BIT_ID_TYPE tid_bits = 1 << sdev->id; |
9264 | 9097 | ||
9265 | if (asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN) { | 9098 | if (!(asc_dvc->bug_fix_cntl & ASC_BUG_FIX_ASYN_USE_SYN)) |
9266 | if (!(asc_dvc->init_sdtr & tid_bits)) { | 9099 | return; |
9267 | if ((type == TYPE_ROM) && | 9100 | if (asc_dvc->init_sdtr & tid_bits) |
9268 | (strncmp(sdev->vendor, "HP ", 3) == 0)) { | 9101 | return; |
9269 | asc_dvc->pci_fix_asyn_xfer_always |= tid_bits; | 9102 | |
9270 | } | 9103 | if ((type == TYPE_ROM) && (strncmp(sdev->vendor, "HP ", 3) == 0)) |
9271 | asc_dvc->pci_fix_asyn_xfer |= tid_bits; | 9104 | asc_dvc->pci_fix_asyn_xfer_always |= tid_bits; |
9272 | if ((type == TYPE_PROCESSOR) || | 9105 | |
9273 | (type == TYPE_SCANNER) || (type == TYPE_ROM) || | 9106 | asc_dvc->pci_fix_asyn_xfer |= tid_bits; |
9274 | (type == TYPE_TAPE)) { | 9107 | if ((type == TYPE_PROCESSOR) || (type == TYPE_SCANNER) || |
9275 | asc_dvc->pci_fix_asyn_xfer &= ~tid_bits; | 9108 | (type == TYPE_ROM) || (type == TYPE_TAPE)) |
9276 | } | 9109 | asc_dvc->pci_fix_asyn_xfer &= ~tid_bits; |
9277 | 9110 | ||
9278 | if (asc_dvc->pci_fix_asyn_xfer & tid_bits) { | 9111 | if (asc_dvc->pci_fix_asyn_xfer & tid_bits) |
9279 | AscSetRunChipSynRegAtID(asc_dvc->iop_base, | 9112 | AscSetRunChipSynRegAtID(asc_dvc->iop_base, sdev->id, |
9280 | sdev->id, | ||
9281 | ASYN_SDTR_DATA_FIX_PCI_REV_AB); | 9113 | ASYN_SDTR_DATA_FIX_PCI_REV_AB); |
9282 | } | ||
9283 | } | ||
9284 | } | ||
9285 | } | 9114 | } |
9286 | 9115 | ||
9287 | static uchar AscReadLramByte(PortAddr iop_base, ushort addr) | 9116 | static uchar AscReadLramByte(PortAddr iop_base, ushort addr) |
@@ -9443,12 +9272,6 @@ AscMemWordSetLram(PortAddr iop_base, ushort s_addr, ushort set_wval, int words) | |||
9443 | return; | 9272 | return; |
9444 | } | 9273 | } |
9445 | 9274 | ||
9446 | /* | ||
9447 | * --- Adv Library Functions | ||
9448 | */ | ||
9449 | |||
9450 | /* a_mcode.h */ | ||
9451 | |||
9452 | /* Microcode buffer is kept after initialization for error recovery. */ | 9275 | /* Microcode buffer is kept after initialization for error recovery. */ |
9453 | static unsigned char _adv_asc3550_buf[] = { | 9276 | static unsigned char _adv_asc3550_buf[] = { |
9454 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc, | 9277 | 0x00, 0x00, 0x00, 0xf2, 0x00, 0xf0, 0x00, 0x16, 0x18, 0xe4, 0x00, 0xfc, |
@@ -13773,7 +13596,6 @@ AdvSet38C1600EEPConfig(AdvPortAddr iop_base, ADVEEP_38C1600_CONFIG *cfg_buf) | |||
13773 | return; | 13596 | return; |
13774 | } | 13597 | } |
13775 | 13598 | ||
13776 | /* a_advlib.c */ | ||
13777 | /* | 13599 | /* |
13778 | * AdvExeScsiQueue() - Send a request to the RISC microcode program. | 13600 | * AdvExeScsiQueue() - Send a request to the RISC microcode program. |
13779 | * | 13601 | * |
@@ -14198,7 +14020,6 @@ AdvSendIdleCmd(ADV_DVC_VAR *asc_dvc, | |||
14198 | * Clear the idle command status which is set by the microcode | 14020 | * Clear the idle command status which is set by the microcode |
14199 | * to a non-zero value to indicate when the command is completed. | 14021 | * to a non-zero value to indicate when the command is completed. |
14200 | * The non-zero result is one of the IDLE_CMD_STATUS_* values | 14022 | * The non-zero result is one of the IDLE_CMD_STATUS_* values |
14201 | * defined in a_advlib.h. | ||
14202 | */ | 14023 | */ |
14203 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort)0); | 14024 | AdvWriteWordLram(iop_base, ASC_MC_IDLE_CMD_STATUS, (ushort)0); |
14204 | 14025 | ||
@@ -14921,6 +14742,8 @@ static int advansys_release(struct Scsi_Host *shost) | |||
14921 | return 0; | 14742 | return 0; |
14922 | } | 14743 | } |
14923 | 14744 | ||
14745 | #define ASC_IOADR_TABLE_MAX_IX 11 | ||
14746 | |||
14924 | static PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __devinitdata = { | 14747 | static PortAddr _asc_def_iop_base[ASC_IOADR_TABLE_MAX_IX] __devinitdata = { |
14925 | 0x100, 0x0110, 0x120, 0x0130, 0x140, 0x0150, 0x0190, | 14748 | 0x100, 0x0110, 0x120, 0x0130, 0x140, 0x0150, 0x0190, |
14926 | 0x0210, 0x0230, 0x0250, 0x0330 | 14749 | 0x0210, 0x0230, 0x0250, 0x0330 |