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-rw-r--r--arch/i386/kernel/pci-dma.c4
-rw-r--r--arch/i386/pci/common.c2
-rw-r--r--arch/i386/pci/fixup.c46
-rw-r--r--arch/i386/pci/i386.c64
-rw-r--r--arch/i386/pci/irq.c6
-rw-r--r--arch/ia64/pci/pci.c75
-rw-r--r--arch/ia64/sn/kernel/Makefile5
-rw-r--r--arch/ia64/sn/kernel/io_acpi_init.c231
-rw-r--r--arch/ia64/sn/kernel/io_common.c613
-rw-r--r--arch/ia64/sn/kernel/io_init.c633
-rw-r--r--arch/ia64/sn/kernel/iomv.c11
-rw-r--r--arch/ia64/sn/kernel/setup.c18
-rw-r--r--arch/ia64/sn/kernel/tiocx.c2
-rw-r--r--arch/ia64/sn/pci/pcibr/pcibr_provider.c17
-rw-r--r--arch/ia64/sn/pci/tioce_provider.c18
-rw-r--r--arch/powerpc/platforms/powermac/pci.c1
-rw-r--r--arch/sparc64/kernel/pci.c9
-rw-r--r--drivers/i2c/busses/Kconfig1
-rw-r--r--drivers/i2c/busses/i2c-i801.c2
-rw-r--r--drivers/message/i2o/pci.c15
-rw-r--r--drivers/pci/Kconfig2
-rw-r--r--drivers/pci/access.c75
-rw-r--r--drivers/pci/hotplug/acpiphp.h4
-rw-r--r--drivers/pci/hotplug/acpiphp_core.c39
-rw-r--r--drivers/pci/hotplug/acpiphp_glue.c8
-rw-r--r--drivers/pci/hotplug/ibmphp_pci.c4
-rw-r--r--drivers/pci/hotplug/pciehp_core.c7
-rw-r--r--drivers/pci/hotplug/pciehp_hpc.c2
-rw-r--r--drivers/pci/hotplug/rpadlpar_core.c2
-rw-r--r--drivers/pci/hotplug/rpaphp_core.c2
-rw-r--r--drivers/pci/hotplug/sgi_hotplug.c35
-rw-r--r--drivers/pci/msi.h8
-rw-r--r--drivers/pci/pci-acpi.c10
-rw-r--r--drivers/pci/pci-driver.c11
-rw-r--r--drivers/pci/pci-sysfs.c33
-rw-r--r--drivers/pci/pci.c123
-rw-r--r--drivers/pci/pci.h1
-rw-r--r--drivers/pci/probe.c27
-rw-r--r--drivers/pci/quirks.c59
-rw-r--r--drivers/pci/rom.c9
-rw-r--r--include/asm-ia64/io.h2
-rw-r--r--include/asm-ia64/machvec.h12
-rw-r--r--include/asm-ia64/machvec_sn2.h2
-rw-r--r--include/asm-ia64/pci.h21
-rw-r--r--include/asm-ia64/sn/acpi.h16
-rw-r--r--include/asm-ia64/sn/pcidev.h22
-rw-r--r--include/asm-ia64/sn/sn_feature_sets.h6
-rw-r--r--include/asm-ia64/sn/sn_sal.h1
-rw-r--r--include/asm-powerpc/pci.h20
-rw-r--r--include/asm-sparc64/pci.h6
-rw-r--r--include/linux/ioport.h1
-rw-r--r--include/linux/pci.h3
-rw-r--r--include/linux/pci_ids.h7
-rw-r--r--include/linux/pci_regs.h6
54 files changed, 1400 insertions, 959 deletions
diff --git a/arch/i386/kernel/pci-dma.c b/arch/i386/kernel/pci-dma.c
index 25fe66853934..5c8c6ef1fc5e 100644
--- a/arch/i386/kernel/pci-dma.c
+++ b/arch/i386/kernel/pci-dma.c
@@ -75,7 +75,7 @@ EXPORT_SYMBOL(dma_free_coherent);
75int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr, 75int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
76 dma_addr_t device_addr, size_t size, int flags) 76 dma_addr_t device_addr, size_t size, int flags)
77{ 77{
78 void __iomem *mem_base; 78 void __iomem *mem_base = NULL;
79 int pages = size >> PAGE_SHIFT; 79 int pages = size >> PAGE_SHIFT;
80 int bitmap_size = (pages + 31)/32; 80 int bitmap_size = (pages + 31)/32;
81 81
@@ -114,6 +114,8 @@ int dma_declare_coherent_memory(struct device *dev, dma_addr_t bus_addr,
114 free1_out: 114 free1_out:
115 kfree(dev->dma_mem->bitmap); 115 kfree(dev->dma_mem->bitmap);
116 out: 116 out:
117 if (mem_base)
118 iounmap(mem_base);
117 return 0; 119 return 0;
118} 120}
119EXPORT_SYMBOL(dma_declare_coherent_memory); 121EXPORT_SYMBOL(dma_declare_coherent_memory);
diff --git a/arch/i386/pci/common.c b/arch/i386/pci/common.c
index cdfcf971098b..53ca6e897984 100644
--- a/arch/i386/pci/common.c
+++ b/arch/i386/pci/common.c
@@ -20,7 +20,7 @@
20unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 | 20unsigned int pci_probe = PCI_PROBE_BIOS | PCI_PROBE_CONF1 | PCI_PROBE_CONF2 |
21 PCI_PROBE_MMCONF; 21 PCI_PROBE_MMCONF;
22 22
23int pci_bf_sort; 23static int pci_bf_sort;
24int pci_routeirq; 24int pci_routeirq;
25int pcibios_last_bus = -1; 25int pcibios_last_bus = -1;
26unsigned long pirq_table_addr; 26unsigned long pirq_table_addr;
diff --git a/arch/i386/pci/fixup.c b/arch/i386/pci/fixup.c
index c1949ff38d61..cde1170b01a1 100644
--- a/arch/i386/pci/fixup.c
+++ b/arch/i386/pci/fixup.c
@@ -74,52 +74,6 @@ static void __devinit pci_fixup_ncr53c810(struct pci_dev *d)
74} 74}
75DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810); 75DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_NCR, PCI_DEVICE_ID_NCR_53C810, pci_fixup_ncr53c810);
76 76
77static void __devinit pci_fixup_ide_bases(struct pci_dev *d)
78{
79 int i;
80
81 /*
82 * PCI IDE controllers use non-standard I/O port decoding, respect it.
83 */
84 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
85 return;
86 DBG("PCI: IDE base address fixup for %s\n", pci_name(d));
87 for(i=0; i<4; i++) {
88 struct resource *r = &d->resource[i];
89 if ((r->start & ~0x80) == 0x374) {
90 r->start |= 2;
91 r->end = r->start;
92 }
93 }
94}
95DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
96
97static void __devinit pci_fixup_ide_trash(struct pci_dev *d)
98{
99 int i;
100
101 /*
102 * Runs the fixup only for the first IDE controller
103 * (Shai Fultheim - shai@ftcon.com)
104 */
105 static int called = 0;
106 if (called)
107 return;
108 called = 1;
109
110 /*
111 * There exist PCI IDE controllers which have utter garbage
112 * in first four base registers. Ignore that.
113 */
114 DBG("PCI: IDE base address trash cleared for %s\n", pci_name(d));
115 for(i=0; i<4; i++)
116 d->resource[i].start = d->resource[i].end = d->resource[i].flags = 0;
117}
118DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SI, PCI_DEVICE_ID_SI_5513, pci_fixup_ide_trash);
119DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, pci_fixup_ide_trash);
120DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_11, pci_fixup_ide_trash);
121DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801DB_9, pci_fixup_ide_trash);
122
123static void __devinit pci_fixup_latency(struct pci_dev *d) 77static void __devinit pci_fixup_latency(struct pci_dev *d)
124{ 78{
125 /* 79 /*
diff --git a/arch/i386/pci/i386.c b/arch/i386/pci/i386.c
index 98580292f0d4..43005f044424 100644
--- a/arch/i386/pci/i386.c
+++ b/arch/i386/pci/i386.c
@@ -104,16 +104,24 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list)
104 /* Depth-First Search on bus tree */ 104 /* Depth-First Search on bus tree */
105 list_for_each_entry(bus, bus_list, node) { 105 list_for_each_entry(bus, bus_list, node) {
106 if ((dev = bus->self)) { 106 if ((dev = bus->self)) {
107 for (idx = PCI_BRIDGE_RESOURCES; idx < PCI_NUM_RESOURCES; idx++) { 107 for (idx = PCI_BRIDGE_RESOURCES;
108 idx < PCI_NUM_RESOURCES; idx++) {
108 r = &dev->resource[idx]; 109 r = &dev->resource[idx];
109 if (!r->flags) 110 if (!r->flags)
110 continue; 111 continue;
111 pr = pci_find_parent_resource(dev, r); 112 pr = pci_find_parent_resource(dev, r);
112 if (!r->start || !pr || request_resource(pr, r) < 0) { 113 if (!r->start || !pr ||
113 printk(KERN_ERR "PCI: Cannot allocate resource region %d of bridge %s\n", idx, pci_name(dev)); 114 request_resource(pr, r) < 0) {
114 /* Something is wrong with the region. 115 printk(KERN_ERR "PCI: Cannot allocate "
115 Invalidate the resource to prevent child 116 "resource region %d "
116 resource allocations in this range. */ 117 "of bridge %s\n",
118 idx, pci_name(dev));
119 /*
120 * Something is wrong with the region.
121 * Invalidate the resource to prevent
122 * child resource allocations in this
123 * range.
124 */
117 r->flags = 0; 125 r->flags = 0;
118 } 126 }
119 } 127 }
@@ -131,7 +139,7 @@ static void __init pcibios_allocate_resources(int pass)
131 139
132 for_each_pci_dev(dev) { 140 for_each_pci_dev(dev) {
133 pci_read_config_word(dev, PCI_COMMAND, &command); 141 pci_read_config_word(dev, PCI_COMMAND, &command);
134 for(idx = 0; idx < 6; idx++) { 142 for (idx = 0; idx < PCI_ROM_RESOURCE; idx++) {
135 r = &dev->resource[idx]; 143 r = &dev->resource[idx];
136 if (r->parent) /* Already allocated */ 144 if (r->parent) /* Already allocated */
137 continue; 145 continue;
@@ -142,11 +150,15 @@ static void __init pcibios_allocate_resources(int pass)
142 else 150 else
143 disabled = !(command & PCI_COMMAND_MEMORY); 151 disabled = !(command & PCI_COMMAND_MEMORY);
144 if (pass == disabled) { 152 if (pass == disabled) {
145 DBG("PCI: Resource %08lx-%08lx (f=%lx, d=%d, p=%d)\n", 153 DBG("PCI: Resource %08lx-%08lx "
154 "(f=%lx, d=%d, p=%d)\n",
146 r->start, r->end, r->flags, disabled, pass); 155 r->start, r->end, r->flags, disabled, pass);
147 pr = pci_find_parent_resource(dev, r); 156 pr = pci_find_parent_resource(dev, r);
148 if (!pr || request_resource(pr, r) < 0) { 157 if (!pr || request_resource(pr, r) < 0) {
149 printk(KERN_ERR "PCI: Cannot allocate resource region %d of device %s\n", idx, pci_name(dev)); 158 printk(KERN_ERR "PCI: Cannot allocate "
159 "resource region %d "
160 "of device %s\n",
161 idx, pci_name(dev));
150 /* We'll assign a new address later */ 162 /* We'll assign a new address later */
151 r->end -= r->start; 163 r->end -= r->start;
152 r->start = 0; 164 r->start = 0;
@@ -156,12 +168,16 @@ static void __init pcibios_allocate_resources(int pass)
156 if (!pass) { 168 if (!pass) {
157 r = &dev->resource[PCI_ROM_RESOURCE]; 169 r = &dev->resource[PCI_ROM_RESOURCE];
158 if (r->flags & IORESOURCE_ROM_ENABLE) { 170 if (r->flags & IORESOURCE_ROM_ENABLE) {
159 /* Turn the ROM off, leave the resource region, but keep it unregistered. */ 171 /* Turn the ROM off, leave the resource region,
172 * but keep it unregistered. */
160 u32 reg; 173 u32 reg;
161 DBG("PCI: Switching off ROM of %s\n", pci_name(dev)); 174 DBG("PCI: Switching off ROM of %s\n",
175 pci_name(dev));
162 r->flags &= ~IORESOURCE_ROM_ENABLE; 176 r->flags &= ~IORESOURCE_ROM_ENABLE;
163 pci_read_config_dword(dev, dev->rom_base_reg, &reg); 177 pci_read_config_dword(dev,
164 pci_write_config_dword(dev, dev->rom_base_reg, reg & ~PCI_ROM_ADDRESS_ENABLE); 178 dev->rom_base_reg, &reg);
179 pci_write_config_dword(dev, dev->rom_base_reg,
180 reg & ~PCI_ROM_ADDRESS_ENABLE);
165 } 181 }
166 } 182 }
167 } 183 }
@@ -173,9 +189,11 @@ static int __init pcibios_assign_resources(void)
173 struct resource *r, *pr; 189 struct resource *r, *pr;
174 190
175 if (!(pci_probe & PCI_ASSIGN_ROMS)) { 191 if (!(pci_probe & PCI_ASSIGN_ROMS)) {
176 /* Try to use BIOS settings for ROMs, otherwise let 192 /*
177 pci_assign_unassigned_resources() allocate the new 193 * Try to use BIOS settings for ROMs, otherwise let
178 addresses. */ 194 * pci_assign_unassigned_resources() allocate the new
195 * addresses.
196 */
179 for_each_pci_dev(dev) { 197 for_each_pci_dev(dev) {
180 r = &dev->resource[PCI_ROM_RESOURCE]; 198 r = &dev->resource[PCI_ROM_RESOURCE];
181 if (!r->flags || !r->start) 199 if (!r->flags || !r->start)
@@ -215,9 +233,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
215 233
216 pci_read_config_word(dev, PCI_COMMAND, &cmd); 234 pci_read_config_word(dev, PCI_COMMAND, &cmd);
217 old_cmd = cmd; 235 old_cmd = cmd;
218 for(idx = 0; idx < PCI_NUM_RESOURCES; idx++) { 236 for (idx = 0; idx < PCI_NUM_RESOURCES; idx++) {
219 /* Only set up the requested stuff */ 237 /* Only set up the requested stuff */
220 if (!(mask & (1<<idx))) 238 if (!(mask & (1 << idx)))
221 continue; 239 continue;
222 240
223 r = &dev->resource[idx]; 241 r = &dev->resource[idx];
@@ -227,7 +245,9 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
227 (!(r->flags & IORESOURCE_ROM_ENABLE))) 245 (!(r->flags & IORESOURCE_ROM_ENABLE)))
228 continue; 246 continue;
229 if (!r->start && r->end) { 247 if (!r->start && r->end) {
230 printk(KERN_ERR "PCI: Device %s not available because of resource collisions\n", pci_name(dev)); 248 printk(KERN_ERR "PCI: Device %s not available "
249 "because of resource collisions\n",
250 pci_name(dev));
231 return -EINVAL; 251 return -EINVAL;
232 } 252 }
233 if (r->flags & IORESOURCE_IO) 253 if (r->flags & IORESOURCE_IO)
@@ -236,7 +256,8 @@ int pcibios_enable_resources(struct pci_dev *dev, int mask)
236 cmd |= PCI_COMMAND_MEMORY; 256 cmd |= PCI_COMMAND_MEMORY;
237 } 257 }
238 if (cmd != old_cmd) { 258 if (cmd != old_cmd) {
239 printk("PCI: Enabling device %s (%04x -> %04x)\n", pci_name(dev), old_cmd, cmd); 259 printk("PCI: Enabling device %s (%04x -> %04x)\n",
260 pci_name(dev), old_cmd, cmd);
240 pci_write_config_word(dev, PCI_COMMAND, cmd); 261 pci_write_config_word(dev, PCI_COMMAND, cmd);
241 } 262 }
242 return 0; 263 return 0;
@@ -258,7 +279,8 @@ void pcibios_set_master(struct pci_dev *dev)
258 lat = pcibios_max_latency; 279 lat = pcibios_max_latency;
259 else 280 else
260 return; 281 return;
261 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat); 282 printk(KERN_DEBUG "PCI: Setting latency timer of device %s to %d\n",
283 pci_name(dev), lat);
262 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat); 284 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
263} 285}
264 286
diff --git a/arch/i386/pci/irq.c b/arch/i386/pci/irq.c
index 69163998adeb..e65551cd8216 100644
--- a/arch/i386/pci/irq.c
+++ b/arch/i386/pci/irq.c
@@ -543,6 +543,12 @@ static __init int intel_router_probe(struct irq_router *r, struct pci_dev *route
543 case PCI_DEVICE_ID_INTEL_ICH8_2: 543 case PCI_DEVICE_ID_INTEL_ICH8_2:
544 case PCI_DEVICE_ID_INTEL_ICH8_3: 544 case PCI_DEVICE_ID_INTEL_ICH8_3:
545 case PCI_DEVICE_ID_INTEL_ICH8_4: 545 case PCI_DEVICE_ID_INTEL_ICH8_4:
546 case PCI_DEVICE_ID_INTEL_ICH9_0:
547 case PCI_DEVICE_ID_INTEL_ICH9_1:
548 case PCI_DEVICE_ID_INTEL_ICH9_2:
549 case PCI_DEVICE_ID_INTEL_ICH9_3:
550 case PCI_DEVICE_ID_INTEL_ICH9_4:
551 case PCI_DEVICE_ID_INTEL_ICH9_5:
546 r->name = "PIIX/ICH"; 552 r->name = "PIIX/ICH";
547 r->get = pirq_piix_get; 553 r->get = pirq_piix_get;
548 r->set = pirq_piix_set; 554 r->set = pirq_piix_set;
diff --git a/arch/ia64/pci/pci.c b/arch/ia64/pci/pci.c
index b30be7c48ba8..f4edfbf27134 100644
--- a/arch/ia64/pci/pci.c
+++ b/arch/ia64/pci/pci.c
@@ -469,10 +469,11 @@ pcibios_fixup_resources(struct pci_dev *dev, int start, int limit)
469 } 469 }
470} 470}
471 471
472static void __devinit pcibios_fixup_device_resources(struct pci_dev *dev) 472void __devinit pcibios_fixup_device_resources(struct pci_dev *dev)
473{ 473{
474 pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES); 474 pcibios_fixup_resources(dev, 0, PCI_BRIDGE_RESOURCES);
475} 475}
476EXPORT_SYMBOL_GPL(pcibios_fixup_device_resources);
476 477
477static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev) 478static void __devinit pcibios_fixup_bridge_resources(struct pci_dev *dev)
478{ 479{
@@ -493,6 +494,7 @@ pcibios_fixup_bus (struct pci_bus *b)
493 } 494 }
494 list_for_each_entry(dev, &b->devices, bus_list) 495 list_for_each_entry(dev, &b->devices, bus_list)
495 pcibios_fixup_device_resources(dev); 496 pcibios_fixup_device_resources(dev);
497 platform_pci_fixup_bus(b);
496 498
497 return; 499 return;
498} 500}
@@ -738,75 +740,44 @@ int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size)
738 return ret; 740 return ret;
739} 741}
740 742
743/* It's defined in drivers/pci/pci.c */
744extern u8 pci_cache_line_size;
745
741/** 746/**
742 * pci_cacheline_size - determine cacheline size for PCI devices 747 * set_pci_cacheline_size - determine cacheline size for PCI devices
743 * @dev: void
744 * 748 *
745 * We want to use the line-size of the outer-most cache. We assume 749 * We want to use the line-size of the outer-most cache. We assume
746 * that this line-size is the same for all CPUs. 750 * that this line-size is the same for all CPUs.
747 * 751 *
748 * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info(). 752 * Code mostly taken from arch/ia64/kernel/palinfo.c:cache_info().
749 *
750 * RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
751 */ 753 */
752static unsigned long 754static void __init set_pci_cacheline_size(void)
753pci_cacheline_size (void)
754{ 755{
755 u64 levels, unique_caches; 756 u64 levels, unique_caches;
756 s64 status; 757 s64 status;
757 pal_cache_config_info_t cci; 758 pal_cache_config_info_t cci;
758 static u8 cacheline_size;
759
760 if (cacheline_size)
761 return cacheline_size;
762 759
763 status = ia64_pal_cache_summary(&levels, &unique_caches); 760 status = ia64_pal_cache_summary(&levels, &unique_caches);
764 if (status != 0) { 761 if (status != 0) {
765 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed (status=%ld)\n", 762 printk(KERN_ERR "%s: ia64_pal_cache_summary() failed "
766 __FUNCTION__, status); 763 "(status=%ld)\n", __FUNCTION__, status);
767 return SMP_CACHE_BYTES; 764 return;
768 } 765 }
769 766
770 status = ia64_pal_cache_config_info(levels - 1, /* cache_type (data_or_unified)= */ 2, 767 status = ia64_pal_cache_config_info(levels - 1,
771 &cci); 768 /* cache_type (data_or_unified)= */ 2, &cci);
772 if (status != 0) { 769 if (status != 0) {
773 printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed (status=%ld)\n", 770 printk(KERN_ERR "%s: ia64_pal_cache_config_info() failed "
774 __FUNCTION__, status); 771 "(status=%ld)\n", __FUNCTION__, status);
775 return SMP_CACHE_BYTES; 772 return;
776 } 773 }
777 cacheline_size = 1 << cci.pcci_line_size; 774 pci_cache_line_size = (1 << cci.pcci_line_size) / 4;
778 return cacheline_size;
779} 775}
780 776
781/** 777static int __init pcibios_init(void)
782 * pcibios_prep_mwi - helper function for drivers/pci/pci.c:pci_set_mwi() 778{
783 * @dev: the PCI device for which MWI is enabled 779 set_pci_cacheline_size();
784 * 780 return 0;
785 * For ia64, we can get the cacheline sizes from PAL.
786 *
787 * RETURNS: An appropriate -ERRNO error value on eror, or zero for success.
788 */
789int
790pcibios_prep_mwi (struct pci_dev *dev)
791{
792 unsigned long desired_linesize, current_linesize;
793 int rc = 0;
794 u8 pci_linesize;
795
796 desired_linesize = pci_cacheline_size();
797
798 pci_read_config_byte(dev, PCI_CACHE_LINE_SIZE, &pci_linesize);
799 current_linesize = 4 * pci_linesize;
800 if (desired_linesize != current_linesize) {
801 printk(KERN_WARNING "PCI: slot %s has incorrect PCI cache line size of %lu bytes,",
802 pci_name(dev), current_linesize);
803 if (current_linesize > desired_linesize) {
804 printk(" expected %lu bytes instead\n", desired_linesize);
805 rc = -EINVAL;
806 } else {
807 printk(" correcting to %lu\n", desired_linesize);
808 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, desired_linesize / 4);
809 }
810 }
811 return rc;
812} 781}
782
783subsys_initcall(pcibios_init);
diff --git a/arch/ia64/sn/kernel/Makefile b/arch/ia64/sn/kernel/Makefile
index 2d78f34dd763..0a59371d3475 100644
--- a/arch/ia64/sn/kernel/Makefile
+++ b/arch/ia64/sn/kernel/Makefile
@@ -4,13 +4,14 @@
4# License. See the file "COPYING" in the main directory of this archive 4# License. See the file "COPYING" in the main directory of this archive
5# for more details. 5# for more details.
6# 6#
7# Copyright (C) 1999,2001-2005 Silicon Graphics, Inc. All Rights Reserved. 7# Copyright (C) 1999,2001-2006 Silicon Graphics, Inc. All Rights Reserved.
8# 8#
9 9
10CPPFLAGS += -I$(srctree)/arch/ia64/sn/include 10CPPFLAGS += -I$(srctree)/arch/ia64/sn/include
11 11
12obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \ 12obj-y += setup.o bte.o bte_error.o irq.o mca.o idle.o \
13 huberror.o io_init.o iomv.o klconflib.o pio_phys.o \ 13 huberror.o io_acpi_init.o io_common.o \
14 io_init.o iomv.o klconflib.o pio_phys.o \
14 sn2/ 15 sn2/
15obj-$(CONFIG_IA64_GENERIC) += machvec.o 16obj-$(CONFIG_IA64_GENERIC) += machvec.o
16obj-$(CONFIG_SGI_TIOCX) += tiocx.o 17obj-$(CONFIG_SGI_TIOCX) += tiocx.o
diff --git a/arch/ia64/sn/kernel/io_acpi_init.c b/arch/ia64/sn/kernel/io_acpi_init.c
new file mode 100644
index 000000000000..99d7f278612a
--- /dev/null
+++ b/arch/ia64/sn/kernel/io_acpi_init.c
@@ -0,0 +1,231 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved.
7 */
8
9#include <asm/sn/types.h>
10#include <asm/sn/addrs.h>
11#include <asm/sn/pcidev.h>
12#include <asm/sn/pcibus_provider_defs.h>
13#include <asm/sn/sn_sal.h>
14#include "xtalk/hubdev.h"
15#include <linux/acpi.h>
16
17
18/*
19 * The code in this file will only be executed when running with
20 * a PROM that has ACPI IO support. (i.e., SN_ACPI_BASE_SUPPORT() == 1)
21 */
22
23
24/*
25 * This value must match the UUID the PROM uses
26 * (io/acpi/defblk.c) when building a vendor descriptor.
27 */
28struct acpi_vendor_uuid sn_uuid = {
29 .subtype = 0,
30 .data = { 0x2c, 0xc6, 0xa6, 0xfe, 0x9c, 0x44, 0xda, 0x11,
31 0xa2, 0x7c, 0x08, 0x00, 0x69, 0x13, 0xea, 0x51 },
32};
33
34/*
35 * Perform the early IO init in PROM.
36 */
37static s64
38sal_ioif_init(u64 *result)
39{
40 struct ia64_sal_retval isrv = {0,0,0,0};
41
42 SAL_CALL_NOLOCK(isrv,
43 SN_SAL_IOIF_INIT, 0, 0, 0, 0, 0, 0, 0);
44 *result = isrv.v0;
45 return isrv.status;
46}
47
48/*
49 * sn_hubdev_add - The 'add' function of the acpi_sn_hubdev_driver.
50 * Called for every "SGIHUB" or "SGITIO" device defined
51 * in the ACPI namespace.
52 */
53static int __init
54sn_hubdev_add(struct acpi_device *device)
55{
56 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
57 u64 addr;
58 struct hubdev_info *hubdev;
59 struct hubdev_info *hubdev_ptr;
60 int i;
61 u64 nasid;
62 struct acpi_resource *resource;
63 int ret = 0;
64 acpi_status status;
65 struct acpi_resource_vendor_typed *vendor;
66 extern void sn_common_hubdev_init(struct hubdev_info *);
67
68 status = acpi_get_vendor_resource(device->handle, METHOD_NAME__CRS,
69 &sn_uuid, &buffer);
70 if (ACPI_FAILURE(status)) {
71 printk(KERN_ERR
72 "sn_hubdev_add: acpi_get_vendor_resource() failed: %d\n",
73 status);
74 return 1;
75 }
76
77 resource = buffer.pointer;
78 vendor = &resource->data.vendor_typed;
79 if ((vendor->byte_length - sizeof(struct acpi_vendor_uuid)) !=
80 sizeof(struct hubdev_info *)) {
81 printk(KERN_ERR
82 "sn_hubdev_add: Invalid vendor data length: %d\n",
83 vendor->byte_length);
84 ret = 1;
85 goto exit;
86 }
87
88 memcpy(&addr, vendor->byte_data, sizeof(struct hubdev_info *));
89 hubdev_ptr = __va((struct hubdev_info *) addr);
90
91 nasid = hubdev_ptr->hdi_nasid;
92 i = nasid_to_cnodeid(nasid);
93 hubdev = (struct hubdev_info *)(NODEPDA(i)->pdinfo);
94 *hubdev = *hubdev_ptr;
95 sn_common_hubdev_init(hubdev);
96
97exit:
98 kfree(buffer.pointer);
99 return ret;
100}
101
102/*
103 * sn_get_bussoft_ptr() - The pcibus_bussoft pointer is found in
104 * the ACPI Vendor resource for this bus.
105 */
106static struct pcibus_bussoft *
107sn_get_bussoft_ptr(struct pci_bus *bus)
108{
109 u64 addr;
110 struct acpi_buffer buffer = { ACPI_ALLOCATE_BUFFER, NULL };
111 acpi_handle handle;
112 struct pcibus_bussoft *prom_bussoft_ptr;
113 struct acpi_resource *resource;
114 acpi_status status;
115 struct acpi_resource_vendor_typed *vendor;
116
117
118 handle = PCI_CONTROLLER(bus)->acpi_handle;
119 status = acpi_get_vendor_resource(handle, METHOD_NAME__CRS,
120 &sn_uuid, &buffer);
121 if (ACPI_FAILURE(status)) {
122 printk(KERN_ERR "get_acpi_pcibus_ptr: "
123 "get_acpi_bussoft_info() failed: %d\n",
124 status);
125 return NULL;
126 }
127 resource = buffer.pointer;
128 vendor = &resource->data.vendor_typed;
129
130 if ((vendor->byte_length - sizeof(struct acpi_vendor_uuid)) !=
131 sizeof(struct pcibus_bussoft *)) {
132 printk(KERN_ERR
133 "get_acpi_bussoft_ptr: Invalid vendor data "
134 "length %d\n", vendor->byte_length);
135 kfree(buffer.pointer);
136 return NULL;
137 }
138 memcpy(&addr, vendor->byte_data, sizeof(struct pcibus_bussoft *));
139 prom_bussoft_ptr = __va((struct pcibus_bussoft *) addr);
140 kfree(buffer.pointer);
141
142 return prom_bussoft_ptr;
143}
144
145/*
146 * sn_acpi_bus_fixup
147 */
148void
149sn_acpi_bus_fixup(struct pci_bus *bus)
150{
151 struct pci_dev *pci_dev = NULL;
152 struct pcibus_bussoft *prom_bussoft_ptr;
153 extern void sn_common_bus_fixup(struct pci_bus *,
154 struct pcibus_bussoft *);
155
156 if (!bus->parent) { /* If root bus */
157 prom_bussoft_ptr = sn_get_bussoft_ptr(bus);
158 if (prom_bussoft_ptr == NULL) {
159 printk(KERN_ERR
160 "sn_pci_fixup_bus: 0x%04x:0x%02x Unable to "
161 "obtain prom_bussoft_ptr\n",
162 pci_domain_nr(bus), bus->number);
163 return;
164 }
165 sn_common_bus_fixup(bus, prom_bussoft_ptr);
166 }
167 list_for_each_entry(pci_dev, &bus->devices, bus_list) {
168 sn_pci_fixup_slot(pci_dev);
169 }
170}
171
172/*
173 * sn_acpi_slot_fixup - Perform any SN specific slot fixup.
174 * At present there does not appear to be
175 * any generic way to handle a ROM image
176 * that has been shadowed by the PROM, so
177 * we pass a pointer to it within the
178 * pcidev_info structure.
179 */
180
181void
182sn_acpi_slot_fixup(struct pci_dev *dev, struct pcidev_info *pcidev_info)
183{
184 void __iomem *addr;
185 size_t size;
186
187 if (pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE]) {
188 /*
189 * A valid ROM image exists and has been shadowed by the
190 * PROM. Setup the pci_dev ROM resource to point to
191 * the shadowed copy.
192 */
193 size = dev->resource[PCI_ROM_RESOURCE].end -
194 dev->resource[PCI_ROM_RESOURCE].start;
195 addr =
196 ioremap(pcidev_info->pdi_pio_mapped_addr[PCI_ROM_RESOURCE],
197 size);
198 dev->resource[PCI_ROM_RESOURCE].start = (unsigned long) addr;
199 dev->resource[PCI_ROM_RESOURCE].end =
200 (unsigned long) addr + size;
201 dev->resource[PCI_ROM_RESOURCE].flags |= IORESOURCE_ROM_BIOS_COPY;
202 }
203}
204
205static struct acpi_driver acpi_sn_hubdev_driver = {
206 .name = "SGI HUBDEV Driver",
207 .ids = "SGIHUB,SGITIO",
208 .ops = {
209 .add = sn_hubdev_add,
210 },
211};
212
213
214/*
215 * sn_io_acpi_init - PROM has ACPI support for IO, defining at a minimum the
216 * nodes and root buses in the DSDT. As a result, bus scanning
217 * will be initiated by the Linux ACPI code.
218 */
219
220void __init
221sn_io_acpi_init(void)
222{
223 u64 result;
224 s64 status;
225
226 acpi_bus_register_driver(&acpi_sn_hubdev_driver);
227 status = sal_ioif_init(&result);
228 if (status || result)
229 panic("sal_ioif_init failed: [%lx] %s\n",
230 status, ia64_sal_strerror(status));
231}
diff --git a/arch/ia64/sn/kernel/io_common.c b/arch/ia64/sn/kernel/io_common.c
new file mode 100644
index 000000000000..d4dd8f4b6b8d
--- /dev/null
+++ b/arch/ia64/sn/kernel/io_common.c
@@ -0,0 +1,613 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved.
7 */
8
9#include <linux/bootmem.h>
10#include <asm/sn/types.h>
11#include <asm/sn/addrs.h>
12#include <asm/sn/sn_feature_sets.h>
13#include <asm/sn/geo.h>
14#include <asm/sn/io.h>
15#include <asm/sn/l1.h>
16#include <asm/sn/module.h>
17#include <asm/sn/pcibr_provider.h>
18#include <asm/sn/pcibus_provider_defs.h>
19#include <asm/sn/pcidev.h>
20#include <asm/sn/simulator.h>
21#include <asm/sn/sn_sal.h>
22#include <asm/sn/tioca_provider.h>
23#include <asm/sn/tioce_provider.h>
24#include "xtalk/hubdev.h"
25#include "xtalk/xwidgetdev.h"
26#include <linux/acpi.h>
27#include <asm/sn/sn2/sn_hwperf.h>
28#include <asm/sn/acpi.h>
29
30extern void sn_init_cpei_timer(void);
31extern void register_sn_procfs(void);
32extern void sn_acpi_bus_fixup(struct pci_bus *);
33extern void sn_bus_fixup(struct pci_bus *);
34extern void sn_acpi_slot_fixup(struct pci_dev *, struct pcidev_info *);
35extern void sn_more_slot_fixup(struct pci_dev *, struct pcidev_info *);
36extern void sn_legacy_pci_window_fixup(struct pci_controller *, u64, u64);
37extern void sn_io_acpi_init(void);
38extern void sn_io_init(void);
39
40
41static struct list_head sn_sysdata_list;
42
43/* sysdata list struct */
44struct sysdata_el {
45 struct list_head entry;
46 void *sysdata;
47};
48
49int sn_ioif_inited; /* SN I/O infrastructure initialized? */
50
51struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */
52
53/*
54 * Hooks and struct for unsupported pci providers
55 */
56
57static dma_addr_t
58sn_default_pci_map(struct pci_dev *pdev, unsigned long paddr, size_t size, int type)
59{
60 return 0;
61}
62
63static void
64sn_default_pci_unmap(struct pci_dev *pdev, dma_addr_t addr, int direction)
65{
66 return;
67}
68
69static void *
70sn_default_pci_bus_fixup(struct pcibus_bussoft *soft, struct pci_controller *controller)
71{
72 return NULL;
73}
74
75static struct sn_pcibus_provider sn_pci_default_provider = {
76 .dma_map = sn_default_pci_map,
77 .dma_map_consistent = sn_default_pci_map,
78 .dma_unmap = sn_default_pci_unmap,
79 .bus_fixup = sn_default_pci_bus_fixup,
80};
81
82/*
83 * Retrieve the DMA Flush List given nasid, widget, and device.
84 * This list is needed to implement the WAR - Flush DMA data on PIO Reads.
85 */
86static inline u64
87sal_get_device_dmaflush_list(u64 nasid, u64 widget_num, u64 device_num,
88 u64 address)
89{
90 struct ia64_sal_retval ret_stuff;
91 ret_stuff.status = 0;
92 ret_stuff.v0 = 0;
93
94 SAL_CALL_NOLOCK(ret_stuff,
95 (u64) SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST,
96 (u64) nasid, (u64) widget_num,
97 (u64) device_num, (u64) address, 0, 0, 0);
98 return ret_stuff.status;
99}
100
101/*
102 * Retrieve the pci device information given the bus and device|function number.
103 */
104static inline u64
105sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
106 u64 sn_irq_info)
107{
108 struct ia64_sal_retval ret_stuff;
109 ret_stuff.status = 0;
110 ret_stuff.v0 = 0;
111
112 SAL_CALL_NOLOCK(ret_stuff,
113 (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
114 (u64) segment, (u64) bus_number, (u64) devfn,
115 (u64) pci_dev,
116 sn_irq_info, 0, 0);
117 return ret_stuff.v0;
118}
119
120/*
121 * sn_pcidev_info_get() - Retrieve the pcidev_info struct for the specified
122 * device.
123 */
124inline struct pcidev_info *
125sn_pcidev_info_get(struct pci_dev *dev)
126{
127 struct pcidev_info *pcidev;
128
129 list_for_each_entry(pcidev,
130 &(SN_PLATFORM_DATA(dev)->pcidev_info), pdi_list) {
131 if (pcidev->pdi_linux_pcidev == dev)
132 return pcidev;
133 }
134 return NULL;
135}
136
137/* Older PROM flush WAR
138 *
139 * 01/16/06 -- This war will be in place until a new official PROM is released.
140 * Additionally note that the struct sn_flush_device_war also has to be
141 * removed from arch/ia64/sn/include/xtalk/hubdev.h
142 */
143static u8 war_implemented = 0;
144
145static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device,
146 struct sn_flush_device_common *common)
147{
148 struct sn_flush_device_war *war_list;
149 struct sn_flush_device_war *dev_entry;
150 struct ia64_sal_retval isrv = {0,0,0,0};
151
152 if (!war_implemented) {
153 printk(KERN_WARNING "PROM version < 4.50 -- implementing old "
154 "PROM flush WAR\n");
155 war_implemented = 1;
156 }
157
158 war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL);
159 if (!war_list)
160 BUG();
161
162 SAL_CALL_NOLOCK(isrv, SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST,
163 nasid, widget, __pa(war_list), 0, 0, 0 ,0);
164 if (isrv.status)
165 panic("sn_device_fixup_war failed: %s\n",
166 ia64_sal_strerror(isrv.status));
167
168 dev_entry = war_list + device;
169 memcpy(common,dev_entry, sizeof(*common));
170 kfree(war_list);
171
172 return isrv.status;
173}
174
175/*
176 * sn_common_hubdev_init() - This routine is called to initialize the HUB data
177 * structure for each node in the system.
178 */
179void __init
180sn_common_hubdev_init(struct hubdev_info *hubdev)
181{
182
183 struct sn_flush_device_kernel *sn_flush_device_kernel;
184 struct sn_flush_device_kernel *dev_entry;
185 s64 status;
186 int widget, device, size;
187
188 /* Attach the error interrupt handlers */
189 if (hubdev->hdi_nasid & 1) /* If TIO */
190 ice_error_init(hubdev);
191 else
192 hub_error_init(hubdev);
193
194 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++)
195 hubdev->hdi_xwidget_info[widget].xwi_hubinfo = hubdev;
196
197 if (!hubdev->hdi_flush_nasid_list.widget_p)
198 return;
199
200 size = (HUB_WIDGET_ID_MAX + 1) *
201 sizeof(struct sn_flush_device_kernel *);
202 hubdev->hdi_flush_nasid_list.widget_p =
203 kzalloc(size, GFP_KERNEL);
204 if (!hubdev->hdi_flush_nasid_list.widget_p)
205 BUG();
206
207 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) {
208 size = DEV_PER_WIDGET *
209 sizeof(struct sn_flush_device_kernel);
210 sn_flush_device_kernel = kzalloc(size, GFP_KERNEL);
211 if (!sn_flush_device_kernel)
212 BUG();
213
214 dev_entry = sn_flush_device_kernel;
215 for (device = 0; device < DEV_PER_WIDGET;
216 device++, dev_entry++) {
217 size = sizeof(struct sn_flush_device_common);
218 dev_entry->common = kzalloc(size, GFP_KERNEL);
219 if (!dev_entry->common)
220 BUG();
221 if (sn_prom_feature_available(PRF_DEVICE_FLUSH_LIST))
222 status = sal_get_device_dmaflush_list(
223 hubdev->hdi_nasid, widget, device,
224 (u64)(dev_entry->common));
225 else
226 status = sn_device_fixup_war(hubdev->hdi_nasid,
227 widget, device,
228 dev_entry->common);
229 if (status != SALRET_OK)
230 panic("SAL call failed: %s\n",
231 ia64_sal_strerror(status));
232
233 spin_lock_init(&dev_entry->sfdl_flush_lock);
234 }
235
236 if (sn_flush_device_kernel)
237 hubdev->hdi_flush_nasid_list.widget_p[widget] =
238 sn_flush_device_kernel;
239 }
240}
241
242void sn_pci_unfixup_slot(struct pci_dev *dev)
243{
244 struct pci_dev *host_pci_dev = SN_PCIDEV_INFO(dev)->host_pci_dev;
245
246 sn_irq_unfixup(dev);
247 pci_dev_put(host_pci_dev);
248 pci_dev_put(dev);
249}
250
251/*
252 * sn_pci_fixup_slot() - This routine sets up a slot's resources consistent
253 * with the Linux PCI abstraction layer. Resources
254 * acquired from our PCI provider include PIO maps
255 * to BAR space and interrupt objects.
256 */
257void sn_pci_fixup_slot(struct pci_dev *dev)
258{
259 int segment = pci_domain_nr(dev->bus);
260 int status = 0;
261 struct pcibus_bussoft *bs;
262 struct pci_bus *host_pci_bus;
263 struct pci_dev *host_pci_dev;
264 struct pcidev_info *pcidev_info;
265 struct sn_irq_info *sn_irq_info;
266 unsigned int bus_no, devfn;
267
268 pci_dev_get(dev); /* for the sysdata pointer */
269 pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
270 if (!pcidev_info)
271 BUG(); /* Cannot afford to run out of memory */
272
273 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
274 if (!sn_irq_info)
275 BUG(); /* Cannot afford to run out of memory */
276
277 /* Call to retrieve pci device information needed by kernel. */
278 status = sal_get_pcidev_info((u64) segment, (u64) dev->bus->number,
279 dev->devfn,
280 (u64) __pa(pcidev_info),
281 (u64) __pa(sn_irq_info));
282 if (status)
283 BUG(); /* Cannot get platform pci device information */
284
285 /* Add pcidev_info to list in pci_controller.platform_data */
286 list_add_tail(&pcidev_info->pdi_list,
287 &(SN_PLATFORM_DATA(dev->bus)->pcidev_info));
288
289 if (SN_ACPI_BASE_SUPPORT())
290 sn_acpi_slot_fixup(dev, pcidev_info);
291 else
292 sn_more_slot_fixup(dev, pcidev_info);
293 /*
294 * Using the PROMs values for the PCI host bus, get the Linux
295 * PCI host_pci_dev struct and set up host bus linkages
296 */
297
298 bus_no = (pcidev_info->pdi_slot_host_handle >> 32) & 0xff;
299 devfn = pcidev_info->pdi_slot_host_handle & 0xffffffff;
300 host_pci_bus = pci_find_bus(segment, bus_no);
301 host_pci_dev = pci_get_slot(host_pci_bus, devfn);
302
303 pcidev_info->host_pci_dev = host_pci_dev;
304 pcidev_info->pdi_linux_pcidev = dev;
305 pcidev_info->pdi_host_pcidev_info = SN_PCIDEV_INFO(host_pci_dev);
306 bs = SN_PCIBUS_BUSSOFT(dev->bus);
307 pcidev_info->pdi_pcibus_info = bs;
308
309 if (bs && bs->bs_asic_type < PCIIO_ASIC_MAX_TYPES) {
310 SN_PCIDEV_BUSPROVIDER(dev) = sn_pci_provider[bs->bs_asic_type];
311 } else {
312 SN_PCIDEV_BUSPROVIDER(dev) = &sn_pci_default_provider;
313 }
314
315 /* Only set up IRQ stuff if this device has a host bus context */
316 if (bs && sn_irq_info->irq_irq) {
317 pcidev_info->pdi_sn_irq_info = sn_irq_info;
318 dev->irq = pcidev_info->pdi_sn_irq_info->irq_irq;
319 sn_irq_fixup(dev, sn_irq_info);
320 } else {
321 pcidev_info->pdi_sn_irq_info = NULL;
322 kfree(sn_irq_info);
323 }
324}
325
326/*
327 * sn_common_bus_fixup - Perform platform specific bus fixup.
328 * Execute the ASIC specific fixup routine
329 * for this bus.
330 */
331void
332sn_common_bus_fixup(struct pci_bus *bus,
333 struct pcibus_bussoft *prom_bussoft_ptr)
334{
335 int cnode;
336 struct pci_controller *controller;
337 struct hubdev_info *hubdev_info;
338 int nasid;
339 void *provider_soft;
340 struct sn_pcibus_provider *provider;
341 struct sn_platform_data *sn_platform_data;
342
343 controller = PCI_CONTROLLER(bus);
344 /*
345 * Per-provider fixup. Copies the bus soft structure from prom
346 * to local area and links SN_PCIBUS_BUSSOFT().
347 */
348
349 if (prom_bussoft_ptr->bs_asic_type >= PCIIO_ASIC_MAX_TYPES) {
350 printk(KERN_WARNING "sn_common_bus_fixup: Unsupported asic type, %d",
351 prom_bussoft_ptr->bs_asic_type);
352 return;
353 }
354
355 if (prom_bussoft_ptr->bs_asic_type == PCIIO_ASIC_TYPE_PPB)
356 return; /* no further fixup necessary */
357
358 provider = sn_pci_provider[prom_bussoft_ptr->bs_asic_type];
359 if (provider == NULL)
360 panic("sn_common_bus_fixup: No provider registered for this asic type, %d",
361 prom_bussoft_ptr->bs_asic_type);
362
363 if (provider->bus_fixup)
364 provider_soft = (*provider->bus_fixup) (prom_bussoft_ptr,
365 controller);
366 else
367 provider_soft = NULL;
368
369 /*
370 * Generic bus fixup goes here. Don't reference prom_bussoft_ptr
371 * after this point.
372 */
373 controller->platform_data = kzalloc(sizeof(struct sn_platform_data),
374 GFP_KERNEL);
375 if (controller->platform_data == NULL)
376 BUG();
377 sn_platform_data =
378 (struct sn_platform_data *) controller->platform_data;
379 sn_platform_data->provider_soft = provider_soft;
380 INIT_LIST_HEAD(&((struct sn_platform_data *)
381 controller->platform_data)->pcidev_info);
382 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(bus)->bs_base);
383 cnode = nasid_to_cnodeid(nasid);
384 hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
385 SN_PCIBUS_BUSSOFT(bus)->bs_xwidget_info =
386 &(hubdev_info->hdi_xwidget_info[SN_PCIBUS_BUSSOFT(bus)->bs_xid]);
387
388 /*
389 * If the node information we obtained during the fixup phase is
390 * invalid then set controller->node to -1 (undetermined)
391 */
392 if (controller->node >= num_online_nodes()) {
393 struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus);
394
395 printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u"
396 "L_IO=%lx L_MEM=%lx BASE=%lx\n",
397 b->bs_asic_type, b->bs_xid, b->bs_persist_busnum,
398 b->bs_legacy_io, b->bs_legacy_mem, b->bs_base);
399 printk(KERN_WARNING "on node %d but only %d nodes online."
400 "Association set to undetermined.\n",
401 controller->node, num_online_nodes());
402 controller->node = -1;
403 }
404}
405
406void sn_bus_store_sysdata(struct pci_dev *dev)
407{
408 struct sysdata_el *element;
409
410 element = kzalloc(sizeof(struct sysdata_el), GFP_KERNEL);
411 if (!element) {
412 dev_dbg(dev, "%s: out of memory!\n", __FUNCTION__);
413 return;
414 }
415 element->sysdata = SN_PCIDEV_INFO(dev);
416 list_add(&element->entry, &sn_sysdata_list);
417}
418
419void sn_bus_free_sysdata(void)
420{
421 struct sysdata_el *element;
422 struct list_head *list, *safe;
423
424 list_for_each_safe(list, safe, &sn_sysdata_list) {
425 element = list_entry(list, struct sysdata_el, entry);
426 list_del(&element->entry);
427 list_del(&(((struct pcidev_info *)
428 (element->sysdata))->pdi_list));
429 kfree(element->sysdata);
430 kfree(element);
431 }
432 return;
433}
434
435/*
436 * hubdev_init_node() - Creates the HUB data structure and link them to it's
437 * own NODE specific data area.
438 */
439void hubdev_init_node(nodepda_t * npda, cnodeid_t node)
440{
441 struct hubdev_info *hubdev_info;
442 int size;
443 pg_data_t *pg;
444
445 size = sizeof(struct hubdev_info);
446
447 if (node >= num_online_nodes()) /* Headless/memless IO nodes */
448 pg = NODE_DATA(0);
449 else
450 pg = NODE_DATA(node);
451
452 hubdev_info = (struct hubdev_info *)alloc_bootmem_node(pg, size);
453
454 npda->pdinfo = (void *)hubdev_info;
455}
456
457geoid_t
458cnodeid_get_geoid(cnodeid_t cnode)
459{
460 struct hubdev_info *hubdev;
461
462 hubdev = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
463 return hubdev->hdi_geoid;
464}
465
466void sn_generate_path(struct pci_bus *pci_bus, char *address)
467{
468 nasid_t nasid;
469 cnodeid_t cnode;
470 geoid_t geoid;
471 moduleid_t moduleid;
472 u16 bricktype;
473
474 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base);
475 cnode = nasid_to_cnodeid(nasid);
476 geoid = cnodeid_get_geoid(cnode);
477 moduleid = geo_module(geoid);
478
479 sprintf(address, "module_%c%c%c%c%.2d",
480 '0'+RACK_GET_CLASS(MODULE_GET_RACK(moduleid)),
481 '0'+RACK_GET_GROUP(MODULE_GET_RACK(moduleid)),
482 '0'+RACK_GET_NUM(MODULE_GET_RACK(moduleid)),
483 MODULE_GET_BTCHAR(moduleid), MODULE_GET_BPOS(moduleid));
484
485 /* Tollhouse requires slot id to be displayed */
486 bricktype = MODULE_GET_BTYPE(moduleid);
487 if ((bricktype == L1_BRICKTYPE_191010) ||
488 (bricktype == L1_BRICKTYPE_1932))
489 sprintf(address, "%s^%d", address, geo_slot(geoid));
490}
491
492/*
493 * sn_pci_fixup_bus() - Perform SN specific setup of software structs
494 * (pcibus_bussoft, pcidev_info) and hardware
495 * registers, for the specified bus and devices under it.
496 */
497void __devinit
498sn_pci_fixup_bus(struct pci_bus *bus)
499{
500
501 if (SN_ACPI_BASE_SUPPORT())
502 sn_acpi_bus_fixup(bus);
503 else
504 sn_bus_fixup(bus);
505}
506
507/*
508 * sn_io_early_init - Perform early IO (and some non-IO) initialization.
509 * In particular, setup the sn_pci_provider[] array.
510 * This needs to be done prior to any bus scanning
511 * (acpi_scan_init()) in the ACPI case, as the SN
512 * bus fixup code will reference the array.
513 */
514static int __init
515sn_io_early_init(void)
516{
517 int i;
518
519 if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM())
520 return 0;
521
522 /*
523 * prime sn_pci_provider[]. Individial provider init routines will
524 * override their respective default entries.
525 */
526
527 for (i = 0; i < PCIIO_ASIC_MAX_TYPES; i++)
528 sn_pci_provider[i] = &sn_pci_default_provider;
529
530 pcibr_init_provider();
531 tioca_init_provider();
532 tioce_init_provider();
533
534 /*
535 * This is needed to avoid bounce limit checks in the blk layer
536 */
537 ia64_max_iommu_merge_mask = ~PAGE_MASK;
538
539 sn_irq_lh_init();
540 INIT_LIST_HEAD(&sn_sysdata_list);
541 sn_init_cpei_timer();
542
543#ifdef CONFIG_PROC_FS
544 register_sn_procfs();
545#endif
546
547 printk(KERN_INFO "ACPI DSDT OEM Rev 0x%x\n",
548 acpi_gbl_DSDT->oem_revision);
549 if (SN_ACPI_BASE_SUPPORT())
550 sn_io_acpi_init();
551 else
552 sn_io_init();
553 return 0;
554}
555
556arch_initcall(sn_io_early_init);
557
558/*
559 * sn_io_late_init() - Perform any final platform specific IO initialization.
560 */
561
562int __init
563sn_io_late_init(void)
564{
565 struct pci_bus *bus;
566 struct pcibus_bussoft *bussoft;
567 cnodeid_t cnode;
568 nasid_t nasid;
569 cnodeid_t near_cnode;
570
571 if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM())
572 return 0;
573
574 /*
575 * Setup closest node in pci_controller->node for
576 * PIC, TIOCP, TIOCE (TIOCA does it during bus fixup using
577 * info from the PROM).
578 */
579 bus = NULL;
580 while ((bus = pci_find_next_bus(bus)) != NULL) {
581 bussoft = SN_PCIBUS_BUSSOFT(bus);
582 nasid = NASID_GET(bussoft->bs_base);
583 cnode = nasid_to_cnodeid(nasid);
584 if ((bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) ||
585 (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCE)) {
586 /* TIO PCI Bridge: find nearest node with CPUs */
587 int e = sn_hwperf_get_nearest_node(cnode, NULL,
588 &near_cnode);
589 if (e < 0) {
590 near_cnode = (cnodeid_t)-1; /* use any node */
591 printk(KERN_WARNING "pcibr_bus_fixup: failed "
592 "to find near node with CPUs to TIO "
593 "node %d, err=%d\n", cnode, e);
594 }
595 PCI_CONTROLLER(bus)->node = near_cnode;
596 } else if (bussoft->bs_asic_type == PCIIO_ASIC_TYPE_PIC) {
597 PCI_CONTROLLER(bus)->node = cnode;
598 }
599 }
600
601 sn_ioif_inited = 1; /* SN I/O infrastructure now initialized */
602
603 return 0;
604}
605
606fs_initcall(sn_io_late_init);
607
608EXPORT_SYMBOL(sn_pci_fixup_slot);
609EXPORT_SYMBOL(sn_pci_unfixup_slot);
610EXPORT_SYMBOL(sn_bus_store_sysdata);
611EXPORT_SYMBOL(sn_bus_free_sysdata);
612EXPORT_SYMBOL(sn_generate_path);
613
diff --git a/arch/ia64/sn/kernel/io_init.c b/arch/ia64/sn/kernel/io_init.c
index dc09a6a28a37..9ad843e0383b 100644
--- a/arch/ia64/sn/kernel/io_init.c
+++ b/arch/ia64/sn/kernel/io_init.c
@@ -3,103 +3,28 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/bootmem.h>
10#include <linux/nodemask.h>
11#include <asm/sn/types.h> 9#include <asm/sn/types.h>
12#include <asm/sn/addrs.h> 10#include <asm/sn/addrs.h>
13#include <asm/sn/sn_feature_sets.h>
14#include <asm/sn/geo.h>
15#include <asm/sn/io.h> 11#include <asm/sn/io.h>
16#include <asm/sn/l1.h>
17#include <asm/sn/module.h> 12#include <asm/sn/module.h>
18#include <asm/sn/pcibr_provider.h> 13#include <asm/sn/intr.h>
19#include <asm/sn/pcibus_provider_defs.h> 14#include <asm/sn/pcibus_provider_defs.h>
20#include <asm/sn/pcidev.h> 15#include <asm/sn/pcidev.h>
21#include <asm/sn/simulator.h>
22#include <asm/sn/sn_sal.h> 16#include <asm/sn/sn_sal.h>
23#include <asm/sn/tioca_provider.h>
24#include <asm/sn/tioce_provider.h>
25#include "xtalk/hubdev.h" 17#include "xtalk/hubdev.h"
26#include "xtalk/xwidgetdev.h"
27
28
29extern void sn_init_cpei_timer(void);
30extern void register_sn_procfs(void);
31
32static struct list_head sn_sysdata_list;
33
34/* sysdata list struct */
35struct sysdata_el {
36 struct list_head entry;
37 void *sysdata;
38};
39
40struct slab_info {
41 struct hubdev_info hubdev;
42};
43
44struct brick {
45 moduleid_t id; /* Module ID of this module */
46 struct slab_info slab_info[MAX_SLABS + 1];
47};
48
49int sn_ioif_inited; /* SN I/O infrastructure initialized? */
50
51struct sn_pcibus_provider *sn_pci_provider[PCIIO_ASIC_MAX_TYPES]; /* indexed by asic type */
52
53static int max_segment_number; /* Default highest segment number */
54static int max_pcibus_number = 255; /* Default highest pci bus number */
55 18
56/* 19/*
57 * Hooks and struct for unsupported pci providers 20 * The code in this file will only be executed when running with
21 * a PROM that does _not_ have base ACPI IO support.
22 * (i.e., SN_ACPI_BASE_SUPPORT() == 0)
58 */ 23 */
59 24
60static dma_addr_t 25static int max_segment_number; /* Default highest segment number */
61sn_default_pci_map(struct pci_dev *pdev, unsigned long paddr, size_t size, int type) 26static int max_pcibus_number = 255; /* Default highest pci bus number */
62{
63 return 0;
64}
65
66static void
67sn_default_pci_unmap(struct pci_dev *pdev, dma_addr_t addr, int direction)
68{
69 return;
70}
71
72static void *
73sn_default_pci_bus_fixup(struct pcibus_bussoft *soft, struct pci_controller *controller)
74{
75 return NULL;
76}
77
78static struct sn_pcibus_provider sn_pci_default_provider = {
79 .dma_map = sn_default_pci_map,
80 .dma_map_consistent = sn_default_pci_map,
81 .dma_unmap = sn_default_pci_unmap,
82 .bus_fixup = sn_default_pci_bus_fixup,
83};
84
85/*
86 * Retrieve the DMA Flush List given nasid, widget, and device.
87 * This list is needed to implement the WAR - Flush DMA data on PIO Reads.
88 */
89static inline u64
90sal_get_device_dmaflush_list(u64 nasid, u64 widget_num, u64 device_num,
91 u64 address)
92{
93 struct ia64_sal_retval ret_stuff;
94 ret_stuff.status = 0;
95 ret_stuff.v0 = 0;
96 27
97 SAL_CALL_NOLOCK(ret_stuff,
98 (u64) SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST,
99 (u64) nasid, (u64) widget_num,
100 (u64) device_num, (u64) address, 0, 0, 0);
101 return ret_stuff.status;
102}
103 28
104/* 29/*
105 * Retrieve the hub device info structure for the given nasid. 30 * Retrieve the hub device info structure for the given nasid.
@@ -131,93 +56,20 @@ static inline u64 sal_get_pcibus_info(u64 segment, u64 busnum, u64 address)
131 return ret_stuff.v0; 56 return ret_stuff.v0;
132} 57}
133 58
134/*
135 * Retrieve the pci device information given the bus and device|function number.
136 */
137static inline u64
138sal_get_pcidev_info(u64 segment, u64 bus_number, u64 devfn, u64 pci_dev,
139 u64 sn_irq_info)
140{
141 struct ia64_sal_retval ret_stuff;
142 ret_stuff.status = 0;
143 ret_stuff.v0 = 0;
144
145 SAL_CALL_NOLOCK(ret_stuff,
146 (u64) SN_SAL_IOIF_GET_PCIDEV_INFO,
147 (u64) segment, (u64) bus_number, (u64) devfn,
148 (u64) pci_dev,
149 sn_irq_info, 0, 0);
150 return ret_stuff.v0;
151}
152
153/*
154 * sn_pcidev_info_get() - Retrieve the pcidev_info struct for the specified
155 * device.
156 */
157inline struct pcidev_info *
158sn_pcidev_info_get(struct pci_dev *dev)
159{
160 struct pcidev_info *pcidev;
161
162 list_for_each_entry(pcidev,
163 &(SN_PCI_CONTROLLER(dev)->pcidev_info), pdi_list) {
164 if (pcidev->pdi_linux_pcidev == dev) {
165 return pcidev;
166 }
167 }
168 return NULL;
169}
170
171/* Older PROM flush WAR
172 *
173 * 01/16/06 -- This war will be in place until a new official PROM is released.
174 * Additionally note that the struct sn_flush_device_war also has to be
175 * removed from arch/ia64/sn/include/xtalk/hubdev.h
176 */
177static u8 war_implemented = 0;
178
179static s64 sn_device_fixup_war(u64 nasid, u64 widget, int device,
180 struct sn_flush_device_common *common)
181{
182 struct sn_flush_device_war *war_list;
183 struct sn_flush_device_war *dev_entry;
184 struct ia64_sal_retval isrv = {0,0,0,0};
185
186 if (!war_implemented) {
187 printk(KERN_WARNING "PROM version < 4.50 -- implementing old "
188 "PROM flush WAR\n");
189 war_implemented = 1;
190 }
191
192 war_list = kzalloc(DEV_PER_WIDGET * sizeof(*war_list), GFP_KERNEL);
193 if (!war_list)
194 BUG();
195
196 SAL_CALL_NOLOCK(isrv, SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST,
197 nasid, widget, __pa(war_list), 0, 0, 0 ,0);
198 if (isrv.status)
199 panic("sn_device_fixup_war failed: %s\n",
200 ia64_sal_strerror(isrv.status));
201
202 dev_entry = war_list + device;
203 memcpy(common,dev_entry, sizeof(*common));
204 kfree(war_list);
205
206 return isrv.status;
207}
208 59
209/* 60/*
210 * sn_fixup_ionodes() - This routine initializes the HUB data strcuture for 61 * sn_fixup_ionodes() - This routine initializes the HUB data structure for
211 * each node in the system. 62 * each node in the system. This function is only
63 * executed when running with a non-ACPI capable PROM.
212 */ 64 */
213static void __init sn_fixup_ionodes(void) 65static void __init sn_fixup_ionodes(void)
214{ 66{
215 struct sn_flush_device_kernel *sn_flush_device_kernel; 67
216 struct sn_flush_device_kernel *dev_entry;
217 struct hubdev_info *hubdev; 68 struct hubdev_info *hubdev;
218 u64 status; 69 u64 status;
219 u64 nasid; 70 u64 nasid;
220 int i, widget, device, size; 71 int i;
72 extern void sn_common_hubdev_init(struct hubdev_info *);
221 73
222 /* 74 /*
223 * Get SGI Specific HUB chipset information. 75 * Get SGI Specific HUB chipset information.
@@ -240,70 +92,47 @@ static void __init sn_fixup_ionodes(void)
240 max_segment_number = hubdev->max_segment_number; 92 max_segment_number = hubdev->max_segment_number;
241 max_pcibus_number = hubdev->max_pcibus_number; 93 max_pcibus_number = hubdev->max_pcibus_number;
242 } 94 }
95 sn_common_hubdev_init(hubdev);
96 }
97}
243 98
244 /* Attach the error interrupt handlers */ 99/*
245 if (nasid & 1) 100 * sn_pci_legacy_window_fixup - Create PCI controller windows for
246 ice_error_init(hubdev); 101 * legacy IO and MEM space. This needs to
247 else 102 * be done here, as the PROM does not have
248 hub_error_init(hubdev); 103 * ACPI support defining the root buses
249 104 * and their resources (_CRS),
250 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) 105 */
251 hubdev->hdi_xwidget_info[widget].xwi_hubinfo = hubdev; 106static void
252 107sn_legacy_pci_window_fixup(struct pci_controller *controller,
253 if (!hubdev->hdi_flush_nasid_list.widget_p) 108 u64 legacy_io, u64 legacy_mem)
254 continue; 109{
255 110 controller->window = kcalloc(2, sizeof(struct pci_window),
256 size = (HUB_WIDGET_ID_MAX + 1) * 111 GFP_KERNEL);
257 sizeof(struct sn_flush_device_kernel *); 112 if (controller->window == NULL)
258 hubdev->hdi_flush_nasid_list.widget_p =
259 kzalloc(size, GFP_KERNEL);
260 if (!hubdev->hdi_flush_nasid_list.widget_p)
261 BUG(); 113 BUG();
262 114 controller->window[0].offset = legacy_io;
263 for (widget = 0; widget <= HUB_WIDGET_ID_MAX; widget++) { 115 controller->window[0].resource.name = "legacy_io";
264 size = DEV_PER_WIDGET * 116 controller->window[0].resource.flags = IORESOURCE_IO;
265 sizeof(struct sn_flush_device_kernel); 117 controller->window[0].resource.start = legacy_io;
266 sn_flush_device_kernel = kzalloc(size, GFP_KERNEL); 118 controller->window[0].resource.end =
267 if (!sn_flush_device_kernel) 119 controller->window[0].resource.start + 0xffff;
268 BUG(); 120 controller->window[0].resource.parent = &ioport_resource;
269 121 controller->window[1].offset = legacy_mem;
270 dev_entry = sn_flush_device_kernel; 122 controller->window[1].resource.name = "legacy_mem";
271 for (device = 0; device < DEV_PER_WIDGET; 123 controller->window[1].resource.flags = IORESOURCE_MEM;
272 device++,dev_entry++) { 124 controller->window[1].resource.start = legacy_mem;
273 size = sizeof(struct sn_flush_device_common); 125 controller->window[1].resource.end =
274 dev_entry->common = kzalloc(size, GFP_KERNEL); 126 controller->window[1].resource.start + (1024 * 1024) - 1;
275 if (!dev_entry->common) 127 controller->window[1].resource.parent = &iomem_resource;
276 BUG(); 128 controller->windows = 2;
277
278 if (sn_prom_feature_available(
279 PRF_DEVICE_FLUSH_LIST))
280 status = sal_get_device_dmaflush_list(
281 nasid, widget, device,
282 (u64)(dev_entry->common));
283 else
284 status = sn_device_fixup_war(nasid,
285 widget, device,
286 dev_entry->common);
287 if (status != SALRET_OK)
288 panic("SAL call failed: %s\n",
289 ia64_sal_strerror(status));
290
291 spin_lock_init(&dev_entry->sfdl_flush_lock);
292 }
293
294 if (sn_flush_device_kernel)
295 hubdev->hdi_flush_nasid_list.widget_p[widget] =
296 sn_flush_device_kernel;
297 }
298 }
299} 129}
300 130
301/* 131/*
302 * sn_pci_window_fixup() - Create a pci_window for each device resource. 132 * sn_pci_window_fixup() - Create a pci_window for each device resource.
303 * Until ACPI support is added, we need this code 133 * It will setup pci_windows for use by
304 * to setup pci_windows for use by 134 * pcibios_bus_to_resource(), pcibios_resource_to_bus(),
305 * pcibios_bus_to_resource(), 135 * etc.
306 * pcibios_resource_to_bus(), etc.
307 */ 136 */
308static void 137static void
309sn_pci_window_fixup(struct pci_dev *dev, unsigned int count, 138sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
@@ -342,60 +171,22 @@ sn_pci_window_fixup(struct pci_dev *dev, unsigned int count,
342 controller->window = new_window; 171 controller->window = new_window;
343} 172}
344 173
345void sn_pci_unfixup_slot(struct pci_dev *dev)
346{
347 struct pci_dev *host_pci_dev = SN_PCIDEV_INFO(dev)->host_pci_dev;
348
349 sn_irq_unfixup(dev);
350 pci_dev_put(host_pci_dev);
351 pci_dev_put(dev);
352}
353
354/* 174/*
355 * sn_pci_fixup_slot() - This routine sets up a slot's resources 175 * sn_more_slot_fixup() - We are not running with an ACPI capable PROM,
356 * consistent with the Linux PCI abstraction layer. Resources acquired 176 * and need to convert the pci_dev->resource
357 * from our PCI provider include PIO maps to BAR space and interrupt 177 * 'start' and 'end' addresses to mapped addresses,
358 * objects. 178 * and setup the pci_controller->window array entries.
359 */ 179 */
360void sn_pci_fixup_slot(struct pci_dev *dev) 180void
181sn_more_slot_fixup(struct pci_dev *dev, struct pcidev_info *pcidev_info)
361{ 182{
362 unsigned int count = 0; 183 unsigned int count = 0;
363 int idx; 184 int idx;
364 int segment = pci_domain_nr(dev->bus);
365 int status = 0;
366 struct pcibus_bussoft *bs;
367 struct pci_bus *host_pci_bus;
368 struct pci_dev *host_pci_dev;
369 struct pcidev_info *pcidev_info;
370 s64 pci_addrs[PCI_ROM_RESOURCE + 1]; 185 s64 pci_addrs[PCI_ROM_RESOURCE + 1];
371 struct sn_irq_info *sn_irq_info; 186 unsigned long addr, end, size, start;
372 unsigned long size;
373 unsigned int bus_no, devfn;
374
375 pci_dev_get(dev); /* for the sysdata pointer */
376 pcidev_info = kzalloc(sizeof(struct pcidev_info), GFP_KERNEL);
377 if (!pcidev_info)
378 BUG(); /* Cannot afford to run out of memory */
379
380 sn_irq_info = kzalloc(sizeof(struct sn_irq_info), GFP_KERNEL);
381 if (!sn_irq_info)
382 BUG(); /* Cannot afford to run out of memory */
383
384 /* Call to retrieve pci device information needed by kernel. */
385 status = sal_get_pcidev_info((u64) segment, (u64) dev->bus->number,
386 dev->devfn,
387 (u64) __pa(pcidev_info),
388 (u64) __pa(sn_irq_info));
389 if (status)
390 BUG(); /* Cannot get platform pci device information */
391
392 /* Add pcidev_info to list in sn_pci_controller struct */
393 list_add_tail(&pcidev_info->pdi_list,
394 &(SN_PCI_CONTROLLER(dev->bus)->pcidev_info));
395 187
396 /* Copy over PIO Mapped Addresses */ 188 /* Copy over PIO Mapped Addresses */
397 for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) { 189 for (idx = 0; idx <= PCI_ROM_RESOURCE; idx++) {
398 unsigned long start, end, addr;
399 190
400 if (!pcidev_info->pdi_pio_mapped_addr[idx]) { 191 if (!pcidev_info->pdi_pio_mapped_addr[idx]) {
401 pci_addrs[idx] = -1; 192 pci_addrs[idx] = -1;
@@ -419,60 +210,28 @@ void sn_pci_fixup_slot(struct pci_dev *dev)
419 dev->resource[idx].parent = &ioport_resource; 210 dev->resource[idx].parent = &ioport_resource;
420 else 211 else
421 dev->resource[idx].parent = &iomem_resource; 212 dev->resource[idx].parent = &iomem_resource;
213 /* If ROM, mark as shadowed in PROM */
214 if (idx == PCI_ROM_RESOURCE)
215 dev->resource[idx].flags |= IORESOURCE_ROM_BIOS_COPY;
422 } 216 }
423 /* Create a pci_window in the pci_controller struct for 217 /* Create a pci_window in the pci_controller struct for
424 * each device resource. 218 * each device resource.
425 */ 219 */
426 if (count > 0) 220 if (count > 0)
427 sn_pci_window_fixup(dev, count, pci_addrs); 221 sn_pci_window_fixup(dev, count, pci_addrs);
428
429 /*
430 * Using the PROMs values for the PCI host bus, get the Linux
431 * PCI host_pci_dev struct and set up host bus linkages
432 */
433
434 bus_no = (pcidev_info->pdi_slot_host_handle >> 32) & 0xff;
435 devfn = pcidev_info->pdi_slot_host_handle & 0xffffffff;
436 host_pci_bus = pci_find_bus(segment, bus_no);
437 host_pci_dev = pci_get_slot(host_pci_bus, devfn);
438
439 pcidev_info->host_pci_dev = host_pci_dev;
440 pcidev_info->pdi_linux_pcidev = dev;
441 pcidev_info->pdi_host_pcidev_info = SN_PCIDEV_INFO(host_pci_dev);
442 bs = SN_PCIBUS_BUSSOFT(dev->bus);
443 pcidev_info->pdi_pcibus_info = bs;
444
445 if (bs && bs->bs_asic_type < PCIIO_ASIC_MAX_TYPES) {
446 SN_PCIDEV_BUSPROVIDER(dev) = sn_pci_provider[bs->bs_asic_type];
447 } else {
448 SN_PCIDEV_BUSPROVIDER(dev) = &sn_pci_default_provider;
449 }
450
451 /* Only set up IRQ stuff if this device has a host bus context */
452 if (bs && sn_irq_info->irq_irq) {
453 pcidev_info->pdi_sn_irq_info = sn_irq_info;
454 dev->irq = pcidev_info->pdi_sn_irq_info->irq_irq;
455 sn_irq_fixup(dev, sn_irq_info);
456 } else {
457 pcidev_info->pdi_sn_irq_info = NULL;
458 kfree(sn_irq_info);
459 }
460} 222}
461 223
462/* 224/*
463 * sn_pci_controller_fixup() - This routine sets up a bus's resources 225 * sn_pci_controller_fixup() - This routine sets up a bus's resources
464 * consistent with the Linux PCI abstraction layer. 226 * consistent with the Linux PCI abstraction layer.
465 */ 227 */
466void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus) 228static void
229sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
467{ 230{
468 int status; 231 s64 status = 0;
469 int nasid, cnode;
470 struct pci_controller *controller; 232 struct pci_controller *controller;
471 struct sn_pci_controller *sn_controller;
472 struct pcibus_bussoft *prom_bussoft_ptr; 233 struct pcibus_bussoft *prom_bussoft_ptr;
473 struct hubdev_info *hubdev_info; 234
474 void *provider_soft;
475 struct sn_pcibus_provider *provider;
476 235
477 status = sal_get_pcibus_info((u64) segment, (u64) busnum, 236 status = sal_get_pcibus_info((u64) segment, (u64) busnum,
478 (u64) ia64_tpa(&prom_bussoft_ptr)); 237 (u64) ia64_tpa(&prom_bussoft_ptr));
@@ -480,261 +239,77 @@ void sn_pci_controller_fixup(int segment, int busnum, struct pci_bus *bus)
480 return; /*bus # does not exist */ 239 return; /*bus # does not exist */
481 prom_bussoft_ptr = __va(prom_bussoft_ptr); 240 prom_bussoft_ptr = __va(prom_bussoft_ptr);
482 241
483 /* Allocate a sn_pci_controller, which has a pci_controller struct 242 controller = kzalloc(sizeof(*controller), GFP_KERNEL);
484 * as the first member. 243 if (!controller)
485 */
486 sn_controller = kzalloc(sizeof(struct sn_pci_controller), GFP_KERNEL);
487 if (!sn_controller)
488 BUG(); 244 BUG();
489 INIT_LIST_HEAD(&sn_controller->pcidev_info);
490 controller = &sn_controller->pci_controller;
491 controller->segment = segment; 245 controller->segment = segment;
492 246
493 if (bus == NULL) {
494 bus = pci_scan_bus(busnum, &pci_root_ops, controller);
495 if (bus == NULL)
496 goto error_return; /* error, or bus already scanned */
497 bus->sysdata = NULL;
498 }
499
500 if (bus->sysdata)
501 goto error_return; /* sysdata already alloc'd */
502
503 /* 247 /*
504 * Per-provider fixup. Copies the contents from prom to local 248 * Temporarily save the prom_bussoft_ptr for use by sn_bus_fixup().
505 * area and links SN_PCIBUS_BUSSOFT(). 249 * (platform_data will be overwritten later in sn_common_bus_fixup())
506 */ 250 */
251 controller->platform_data = prom_bussoft_ptr;
507 252
508 if (prom_bussoft_ptr->bs_asic_type >= PCIIO_ASIC_MAX_TYPES) 253 bus = pci_scan_bus(busnum, &pci_root_ops, controller);
509 goto error_return; /* unsupported asic type */ 254 if (bus == NULL)
510 255 goto error_return; /* error, or bus already scanned */
511 if (prom_bussoft_ptr->bs_asic_type == PCIIO_ASIC_TYPE_PPB)
512 goto error_return; /* no further fixup necessary */
513
514 provider = sn_pci_provider[prom_bussoft_ptr->bs_asic_type];
515 if (provider == NULL)
516 goto error_return; /* no provider registerd for this asic */
517 256
518 bus->sysdata = controller; 257 bus->sysdata = controller;
519 if (provider->bus_fixup)
520 provider_soft = (*provider->bus_fixup) (prom_bussoft_ptr, controller);
521 else
522 provider_soft = NULL;
523
524 if (provider_soft == NULL) {
525 /* fixup failed or not applicable */
526 bus->sysdata = NULL;
527 goto error_return;
528 }
529
530 /*
531 * Setup pci_windows for legacy IO and MEM space.
532 * (Temporary until ACPI support is in place.)
533 */
534 controller->window = kcalloc(2, sizeof(struct pci_window), GFP_KERNEL);
535 if (controller->window == NULL)
536 BUG();
537 controller->window[0].offset = prom_bussoft_ptr->bs_legacy_io;
538 controller->window[0].resource.name = "legacy_io";
539 controller->window[0].resource.flags = IORESOURCE_IO;
540 controller->window[0].resource.start = prom_bussoft_ptr->bs_legacy_io;
541 controller->window[0].resource.end =
542 controller->window[0].resource.start + 0xffff;
543 controller->window[0].resource.parent = &ioport_resource;
544 controller->window[1].offset = prom_bussoft_ptr->bs_legacy_mem;
545 controller->window[1].resource.name = "legacy_mem";
546 controller->window[1].resource.flags = IORESOURCE_MEM;
547 controller->window[1].resource.start = prom_bussoft_ptr->bs_legacy_mem;
548 controller->window[1].resource.end =
549 controller->window[1].resource.start + (1024 * 1024) - 1;
550 controller->window[1].resource.parent = &iomem_resource;
551 controller->windows = 2;
552
553 /*
554 * Generic bus fixup goes here. Don't reference prom_bussoft_ptr
555 * after this point.
556 */
557
558 PCI_CONTROLLER(bus)->platform_data = provider_soft;
559 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(bus)->bs_base);
560 cnode = nasid_to_cnodeid(nasid);
561 hubdev_info = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
562 SN_PCIBUS_BUSSOFT(bus)->bs_xwidget_info =
563 &(hubdev_info->hdi_xwidget_info[SN_PCIBUS_BUSSOFT(bus)->bs_xid]);
564 258
565 /*
566 * If the node information we obtained during the fixup phase is invalid
567 * then set controller->node to -1 (undetermined)
568 */
569 if (controller->node >= num_online_nodes()) {
570 struct pcibus_bussoft *b = SN_PCIBUS_BUSSOFT(bus);
571
572 printk(KERN_WARNING "Device ASIC=%u XID=%u PBUSNUM=%u"
573 "L_IO=%lx L_MEM=%lx BASE=%lx\n",
574 b->bs_asic_type, b->bs_xid, b->bs_persist_busnum,
575 b->bs_legacy_io, b->bs_legacy_mem, b->bs_base);
576 printk(KERN_WARNING "on node %d but only %d nodes online."
577 "Association set to undetermined.\n",
578 controller->node, num_online_nodes());
579 controller->node = -1;
580 }
581 return; 259 return;
582 260
583error_return: 261error_return:
584 262
585 kfree(sn_controller); 263 kfree(controller);
586 return; 264 return;
587} 265}
588 266
589void sn_bus_store_sysdata(struct pci_dev *dev) 267/*
268 * sn_bus_fixup
269 */
270void
271sn_bus_fixup(struct pci_bus *bus)
590{ 272{
591 struct sysdata_el *element; 273 struct pci_dev *pci_dev = NULL;
592 274 struct pcibus_bussoft *prom_bussoft_ptr;
593 element = kzalloc(sizeof(struct sysdata_el), GFP_KERNEL); 275 extern void sn_common_bus_fixup(struct pci_bus *,
594 if (!element) { 276 struct pcibus_bussoft *);
595 dev_dbg(dev, "%s: out of memory!\n", __FUNCTION__); 277
596 return; 278
597 } 279 if (!bus->parent) { /* If root bus */
598 element->sysdata = SN_PCIDEV_INFO(dev); 280 prom_bussoft_ptr = PCI_CONTROLLER(bus)->platform_data;
599 list_add(&element->entry, &sn_sysdata_list); 281 if (prom_bussoft_ptr == NULL) {
600} 282 printk(KERN_ERR
283 "sn_bus_fixup: 0x%04x:0x%02x Unable to "
284 "obtain prom_bussoft_ptr\n",
285 pci_domain_nr(bus), bus->number);
286 return;
287 }
288 sn_common_bus_fixup(bus, prom_bussoft_ptr);
289 sn_legacy_pci_window_fixup(PCI_CONTROLLER(bus),
290 prom_bussoft_ptr->bs_legacy_io,
291 prom_bussoft_ptr->bs_legacy_mem);
292 }
293 list_for_each_entry(pci_dev, &bus->devices, bus_list) {
294 sn_pci_fixup_slot(pci_dev);
295 }
601 296
602void sn_bus_free_sysdata(void)
603{
604 struct sysdata_el *element;
605 struct list_head *list, *safe;
606
607 list_for_each_safe(list, safe, &sn_sysdata_list) {
608 element = list_entry(list, struct sysdata_el, entry);
609 list_del(&element->entry);
610 list_del(&(((struct pcidev_info *)
611 (element->sysdata))->pdi_list));
612 kfree(element->sysdata);
613 kfree(element);
614 }
615 return;
616} 297}
617 298
618/* 299/*
619 * Ugly hack to get PCI setup until we have a proper ACPI namespace. 300 * sn_io_init - PROM does not have ACPI support to define nodes or root buses,
301 * so we need to do things the hard way, including initiating the
302 * bus scanning ourselves.
620 */ 303 */
621 304
622#define PCI_BUSES_TO_SCAN 256 305void __init sn_io_init(void)
623
624static int __init sn_pci_init(void)
625{ 306{
626 int i, j; 307 int i, j;
627 struct pci_dev *pci_dev = NULL;
628
629 if (!ia64_platform_is("sn2") || IS_RUNNING_ON_FAKE_PROM())
630 return 0;
631
632 /*
633 * prime sn_pci_provider[]. Individial provider init routines will
634 * override their respective default entries.
635 */
636
637 for (i = 0; i < PCIIO_ASIC_MAX_TYPES; i++)
638 sn_pci_provider[i] = &sn_pci_default_provider;
639 308
640 pcibr_init_provider();
641 tioca_init_provider();
642 tioce_init_provider();
643
644 /*
645 * This is needed to avoid bounce limit checks in the blk layer
646 */
647 ia64_max_iommu_merge_mask = ~PAGE_MASK;
648 sn_fixup_ionodes(); 309 sn_fixup_ionodes();
649 sn_irq_lh_init();
650 INIT_LIST_HEAD(&sn_sysdata_list);
651 sn_init_cpei_timer();
652
653#ifdef CONFIG_PROC_FS
654 register_sn_procfs();
655#endif
656 310
657 /* busses are not known yet ... */ 311 /* busses are not known yet ... */
658 for (i = 0; i <= max_segment_number; i++) 312 for (i = 0; i <= max_segment_number; i++)
659 for (j = 0; j <= max_pcibus_number; j++) 313 for (j = 0; j <= max_pcibus_number; j++)
660 sn_pci_controller_fixup(i, j, NULL); 314 sn_pci_controller_fixup(i, j, NULL);
661
662 /*
663 * Generic Linux PCI Layer has created the pci_bus and pci_dev
664 * structures - time for us to add our SN PLatform specific
665 * information.
666 */
667
668 while ((pci_dev =
669 pci_get_device(PCI_ANY_ID, PCI_ANY_ID, pci_dev)) != NULL)
670 sn_pci_fixup_slot(pci_dev);
671
672 sn_ioif_inited = 1; /* sn I/O infrastructure now initialized */
673
674 return 0;
675}
676
677/*
678 * hubdev_init_node() - Creates the HUB data structure and link them to it's
679 * own NODE specific data area.
680 */
681void hubdev_init_node(nodepda_t * npda, cnodeid_t node)
682{
683 struct hubdev_info *hubdev_info;
684 int size;
685 pg_data_t *pg;
686
687 size = sizeof(struct hubdev_info);
688
689 if (node >= num_online_nodes()) /* Headless/memless IO nodes */
690 pg = NODE_DATA(0);
691 else
692 pg = NODE_DATA(node);
693
694 hubdev_info = (struct hubdev_info *)alloc_bootmem_node(pg, size);
695
696 npda->pdinfo = (void *)hubdev_info;
697} 315}
698
699geoid_t
700cnodeid_get_geoid(cnodeid_t cnode)
701{
702 struct hubdev_info *hubdev;
703
704 hubdev = (struct hubdev_info *)(NODEPDA(cnode)->pdinfo);
705 return hubdev->hdi_geoid;
706}
707
708void sn_generate_path(struct pci_bus *pci_bus, char *address)
709{
710 nasid_t nasid;
711 cnodeid_t cnode;
712 geoid_t geoid;
713 moduleid_t moduleid;
714 u16 bricktype;
715
716 nasid = NASID_GET(SN_PCIBUS_BUSSOFT(pci_bus)->bs_base);
717 cnode = nasid_to_cnodeid(nasid);
718 geoid = cnodeid_get_geoid(cnode);
719 moduleid = geo_module(geoid);
720
721 sprintf(address, "module_%c%c%c%c%.2d",
722 '0'+RACK_GET_CLASS(MODULE_GET_RACK(moduleid)),
723 '0'+RACK_GET_GROUP(MODULE_GET_RACK(moduleid)),
724 '0'+RACK_GET_NUM(MODULE_GET_RACK(moduleid)),
725 MODULE_GET_BTCHAR(moduleid), MODULE_GET_BPOS(moduleid));
726
727 /* Tollhouse requires slot id to be displayed */
728 bricktype = MODULE_GET_BTYPE(moduleid);
729 if ((bricktype == L1_BRICKTYPE_191010) ||
730 (bricktype == L1_BRICKTYPE_1932))
731 sprintf(address, "%s^%d", address, geo_slot(geoid));
732}
733
734subsys_initcall(sn_pci_init);
735EXPORT_SYMBOL(sn_pci_fixup_slot);
736EXPORT_SYMBOL(sn_pci_unfixup_slot);
737EXPORT_SYMBOL(sn_pci_controller_fixup);
738EXPORT_SYMBOL(sn_bus_store_sysdata);
739EXPORT_SYMBOL(sn_bus_free_sysdata);
740EXPORT_SYMBOL(sn_generate_path);
diff --git a/arch/ia64/sn/kernel/iomv.c b/arch/ia64/sn/kernel/iomv.c
index 7ce3cdad627b..4aa4f301d56d 100644
--- a/arch/ia64/sn/kernel/iomv.c
+++ b/arch/ia64/sn/kernel/iomv.c
@@ -3,10 +3,11 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2000-2003 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2000-2003, 2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/module.h> 9#include <linux/module.h>
10#include <linux/acpi.h>
10#include <asm/io.h> 11#include <asm/io.h>
11#include <asm/delay.h> 12#include <asm/delay.h>
12#include <asm/vga.h> 13#include <asm/vga.h>
@@ -15,6 +16,7 @@
15#include <asm/sn/pda.h> 16#include <asm/sn/pda.h>
16#include <asm/sn/sn_cpuid.h> 17#include <asm/sn/sn_cpuid.h>
17#include <asm/sn/shub_mmr.h> 18#include <asm/sn/shub_mmr.h>
19#include <asm/sn/acpi.h>
18 20
19#define IS_LEGACY_VGA_IOPORT(p) \ 21#define IS_LEGACY_VGA_IOPORT(p) \
20 (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df)) 22 (((p) >= 0x3b0 && (p) <= 0x3bb) || ((p) >= 0x3c0 && (p) <= 0x3df))
@@ -31,11 +33,14 @@ void *sn_io_addr(unsigned long port)
31{ 33{
32 if (!IS_RUNNING_ON_SIMULATOR()) { 34 if (!IS_RUNNING_ON_SIMULATOR()) {
33 if (IS_LEGACY_VGA_IOPORT(port)) 35 if (IS_LEGACY_VGA_IOPORT(port))
34 port += vga_console_iobase; 36 return (__ia64_mk_io_addr(port));
35 /* On sn2, legacy I/O ports don't point at anything */ 37 /* On sn2, legacy I/O ports don't point at anything */
36 if (port < (64 * 1024)) 38 if (port < (64 * 1024))
37 return NULL; 39 return NULL;
38 return ((void *)(port | __IA64_UNCACHED_OFFSET)); 40 if (SN_ACPI_BASE_SUPPORT())
41 return (__ia64_mk_io_addr(port));
42 else
43 return ((void *)(port | __IA64_UNCACHED_OFFSET));
39 } else { 44 } else {
40 /* but the simulator uses them... */ 45 /* but the simulator uses them... */
41 unsigned long addr; 46 unsigned long addr;
diff --git a/arch/ia64/sn/kernel/setup.c b/arch/ia64/sn/kernel/setup.c
index 7a2d824c5ce3..1d009f93244d 100644
--- a/arch/ia64/sn/kernel/setup.c
+++ b/arch/ia64/sn/kernel/setup.c
@@ -388,6 +388,14 @@ void __init sn_setup(char **cmdline_p)
388 ia64_sn_plat_set_error_handling_features(); // obsolete 388 ia64_sn_plat_set_error_handling_features(); // obsolete
389 ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV); 389 ia64_sn_set_os_feature(OSF_MCA_SLV_TO_OS_INIT_SLV);
390 ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES); 390 ia64_sn_set_os_feature(OSF_FEAT_LOG_SBES);
391 /*
392 * Note: The calls to notify the PROM of ACPI and PCI Segment
393 * support must be done prior to acpi_load_tables(), as
394 * an ACPI capable PROM will rebuild the DSDT as result
395 * of the call.
396 */
397 ia64_sn_set_os_feature(OSF_PCISEGMENT_ENABLE);
398 ia64_sn_set_os_feature(OSF_ACPI_ENABLE);
391 399
392 400
393#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE) 401#if defined(CONFIG_VT) && defined(CONFIG_VGA_CONSOLE)
@@ -413,6 +421,16 @@ void __init sn_setup(char **cmdline_p)
413 if (! vga_console_membase) 421 if (! vga_console_membase)
414 sn_scan_pcdp(); 422 sn_scan_pcdp();
415 423
424 /*
425 * Setup legacy IO space.
426 * vga_console_iobase maps to PCI IO Space address 0 on the
427 * bus containing the VGA console.
428 */
429 if (vga_console_iobase) {
430 io_space[0].mmio_base = vga_console_iobase;
431 io_space[0].sparse = 0;
432 }
433
416 if (vga_console_membase) { 434 if (vga_console_membase) {
417 /* usable vga ... make tty0 the preferred default console */ 435 /* usable vga ... make tty0 the preferred default console */
418 if (!strstr(*cmdline_p, "console=")) 436 if (!strstr(*cmdline_p, "console="))
diff --git a/arch/ia64/sn/kernel/tiocx.c b/arch/ia64/sn/kernel/tiocx.c
index feaf1a6e8101..493380b2c05f 100644
--- a/arch/ia64/sn/kernel/tiocx.c
+++ b/arch/ia64/sn/kernel/tiocx.c
@@ -552,7 +552,7 @@ static void __exit tiocx_exit(void)
552 bus_unregister(&tiocx_bus_type); 552 bus_unregister(&tiocx_bus_type);
553} 553}
554 554
555subsys_initcall(tiocx_init); 555fs_initcall(tiocx_init);
556module_exit(tiocx_exit); 556module_exit(tiocx_exit);
557 557
558/************************************************************************ 558/************************************************************************
diff --git a/arch/ia64/sn/pci/pcibr/pcibr_provider.c b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
index 27dd7df0f446..6846dc9b432d 100644
--- a/arch/ia64/sn/pci/pcibr/pcibr_provider.c
+++ b/arch/ia64/sn/pci/pcibr/pcibr_provider.c
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2001-2004 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 2001-2004, 2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8 8
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
@@ -109,7 +109,6 @@ void *
109pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) 109pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
110{ 110{
111 int nasid, cnode, j; 111 int nasid, cnode, j;
112 cnodeid_t near_cnode;
113 struct hubdev_info *hubdev_info; 112 struct hubdev_info *hubdev_info;
114 struct pcibus_info *soft; 113 struct pcibus_info *soft;
115 struct sn_flush_device_kernel *sn_flush_device_kernel; 114 struct sn_flush_device_kernel *sn_flush_device_kernel;
@@ -186,20 +185,6 @@ pcibr_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
186 return NULL; 185 return NULL;
187 } 186 }
188 187
189 if (prom_bussoft->bs_asic_type == PCIIO_ASIC_TYPE_TIOCP) {
190 /* TIO PCI Bridge: find nearest node with CPUs */
191 int e = sn_hwperf_get_nearest_node(cnode, NULL, &near_cnode);
192
193 if (e < 0) {
194 near_cnode = (cnodeid_t)-1; /* use any node */
195 printk(KERN_WARNING "pcibr_bus_fixup: failed to find "
196 "near node with CPUs to TIO node %d, err=%d\n",
197 cnode, e);
198 }
199 controller->node = near_cnode;
200 }
201 else
202 controller->node = cnode;
203 return soft; 188 return soft;
204} 189}
205 190
diff --git a/arch/ia64/sn/pci/tioce_provider.c b/arch/ia64/sn/pci/tioce_provider.c
index 46e16dcf5971..35f854fb6120 100644
--- a/arch/ia64/sn/pci/tioce_provider.c
+++ b/arch/ia64/sn/pci/tioce_provider.c
@@ -15,7 +15,6 @@
15#include <asm/sn/pcidev.h> 15#include <asm/sn/pcidev.h>
16#include <asm/sn/pcibus_provider_defs.h> 16#include <asm/sn/pcibus_provider_defs.h>
17#include <asm/sn/tioce_provider.h> 17#include <asm/sn/tioce_provider.h>
18#include <asm/sn/sn2/sn_hwperf.h>
19 18
20/* 19/*
21 * 1/26/2006 20 * 1/26/2006
@@ -990,8 +989,6 @@ tioce_target_interrupt(struct sn_irq_info *sn_irq_info)
990static void * 989static void *
991tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller) 990tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *controller)
992{ 991{
993 int my_nasid;
994 cnodeid_t my_cnode, mem_cnode;
995 struct tioce_common *tioce_common; 992 struct tioce_common *tioce_common;
996 struct tioce_kernel *tioce_kern; 993 struct tioce_kernel *tioce_kern;
997 struct tioce __iomem *tioce_mmr; 994 struct tioce __iomem *tioce_mmr;
@@ -1035,21 +1032,6 @@ tioce_bus_fixup(struct pcibus_bussoft *prom_bussoft, struct pci_controller *cont
1035 tioce_common->ce_pcibus.bs_persist_segment, 1032 tioce_common->ce_pcibus.bs_persist_segment,
1036 tioce_common->ce_pcibus.bs_persist_busnum); 1033 tioce_common->ce_pcibus.bs_persist_busnum);
1037 1034
1038 /*
1039 * identify closest nasid for memory allocations
1040 */
1041
1042 my_nasid = NASID_GET(tioce_common->ce_pcibus.bs_base);
1043 my_cnode = nasid_to_cnodeid(my_nasid);
1044
1045 if (sn_hwperf_get_nearest_node(my_cnode, &mem_cnode, NULL) < 0) {
1046 printk(KERN_WARNING "tioce_bus_fixup: failed to find "
1047 "closest node with MEM to TIO node %d\n", my_cnode);
1048 mem_cnode = (cnodeid_t)-1; /* use any node */
1049 }
1050
1051 controller->node = mem_cnode;
1052
1053 return tioce_common; 1035 return tioce_common;
1054} 1036}
1055 1037
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 9923adc5248e..257dc9068468 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -48,7 +48,6 @@ static struct pci_controller *u3_ht;
48static int has_second_ohare; 48static int has_second_ohare;
49#endif /* CONFIG_PPC64 */ 49#endif /* CONFIG_PPC64 */
50 50
51extern u8 pci_cache_line_size;
52extern int pcibios_assign_bus_offset; 51extern int pcibios_assign_bus_offset;
53 52
54struct device_node *k2_skiplist[2]; 53struct device_node *k2_skiplist[2];
diff --git a/arch/sparc64/kernel/pci.c b/arch/sparc64/kernel/pci.c
index e02f01b644af..dfc41cd4bb5d 100644
--- a/arch/sparc64/kernel/pci.c
+++ b/arch/sparc64/kernel/pci.c
@@ -646,13 +646,4 @@ int pci_domain_nr(struct pci_bus *pbus)
646} 646}
647EXPORT_SYMBOL(pci_domain_nr); 647EXPORT_SYMBOL(pci_domain_nr);
648 648
649int pcibios_prep_mwi(struct pci_dev *dev)
650{
651 /* We set correct PCI_CACHE_LINE_SIZE register values for every
652 * device probed on this platform. So there is nothing to check
653 * and this always succeeds.
654 */
655 return 0;
656}
657
658#endif /* !(CONFIG_PCI) */ 649#endif /* !(CONFIG_PCI) */
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index 510816c16da3..04bee524e31a 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -125,6 +125,7 @@ config I2C_I801
125 ICH7 125 ICH7
126 ESB2 126 ESB2
127 ICH8 127 ICH8
128 ICH9
128 129
129 This driver can also be built as a module. If so, the module 130 This driver can also be built as a module. If so, the module
130 will be called i2c-i801. 131 will be called i2c-i801.
diff --git a/drivers/i2c/busses/i2c-i801.c b/drivers/i2c/busses/i2c-i801.c
index bbb2fbee836f..c7be2fdbd86b 100644
--- a/drivers/i2c/busses/i2c-i801.c
+++ b/drivers/i2c/busses/i2c-i801.c
@@ -33,6 +33,7 @@
33 ICH7 27DA 33 ICH7 27DA
34 ESB2 269B 34 ESB2 269B
35 ICH8 283E 35 ICH8 283E
36 ICH9 2930
36 This driver supports several versions of Intel's I/O Controller Hubs (ICH). 37 This driver supports several versions of Intel's I/O Controller Hubs (ICH).
37 For SMBus support, they are similar to the PIIX4 and are part 38 For SMBus support, they are similar to the PIIX4 and are part
38 of Intel's '810' and other chipsets. 39 of Intel's '810' and other chipsets.
@@ -457,6 +458,7 @@ static struct pci_device_id i801_ids[] = {
457 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) }, 458 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH7_17) },
458 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) }, 459 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ESB2_17) },
459 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) }, 460 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH8_5) },
461 { PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_ICH9_6) },
460 { 0, } 462 { 0, }
461}; 463};
462 464
diff --git a/drivers/message/i2o/pci.c b/drivers/message/i2o/pci.c
index 62f1ac08332c..8287f95c8c42 100644
--- a/drivers/message/i2o/pci.c
+++ b/drivers/message/i2o/pci.c
@@ -320,7 +320,6 @@ static int __devinit i2o_pci_probe(struct pci_dev *pdev,
320 struct i2o_controller *c; 320 struct i2o_controller *c;
321 int rc; 321 int rc;
322 struct pci_dev *i960 = NULL; 322 struct pci_dev *i960 = NULL;
323 int enabled = pdev->is_enabled;
324 323
325 printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n"); 324 printk(KERN_INFO "i2o: Checking for PCI I2O controllers...\n");
326 325
@@ -330,12 +329,11 @@ static int __devinit i2o_pci_probe(struct pci_dev *pdev,
330 return -ENODEV; 329 return -ENODEV;
331 } 330 }
332 331
333 if (!enabled) 332 if ((rc = pci_enable_device(pdev))) {
334 if ((rc = pci_enable_device(pdev))) { 333 printk(KERN_WARNING "i2o: couldn't enable device %s\n",
335 printk(KERN_WARNING "i2o: couldn't enable device %s\n", 334 pci_name(pdev));
336 pci_name(pdev)); 335 return rc;
337 return rc; 336 }
338 }
339 337
340 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) { 338 if (pci_set_dma_mask(pdev, DMA_32BIT_MASK)) {
341 printk(KERN_WARNING "i2o: no suitable DMA found for %s\n", 339 printk(KERN_WARNING "i2o: no suitable DMA found for %s\n",
@@ -442,8 +440,7 @@ static int __devinit i2o_pci_probe(struct pci_dev *pdev,
442 i2o_iop_free(c); 440 i2o_iop_free(c);
443 441
444 disable: 442 disable:
445 if (!enabled) 443 pci_disable_device(pdev);
446 pci_disable_device(pdev);
447 444
448 return rc; 445 return rc;
449} 446}
diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig
index 3cfb0a3575e6..f1dd81a1d592 100644
--- a/drivers/pci/Kconfig
+++ b/drivers/pci/Kconfig
@@ -19,7 +19,7 @@ config PCI_MSI
19 19
20config PCI_MULTITHREAD_PROBE 20config PCI_MULTITHREAD_PROBE
21 bool "PCI Multi-threaded probe (EXPERIMENTAL)" 21 bool "PCI Multi-threaded probe (EXPERIMENTAL)"
22 depends on PCI && EXPERIMENTAL && BROKEN 22 depends on PCI && EXPERIMENTAL
23 help 23 help
24 Say Y here if you want the PCI core to spawn a new thread for 24 Say Y here if you want the PCI core to spawn a new thread for
25 every PCI device that is probed. This can cause a huge 25 every PCI device that is probed. This can cause a huge
diff --git a/drivers/pci/access.c b/drivers/pci/access.c
index ea16805a153c..73a58c73d526 100644
--- a/drivers/pci/access.c
+++ b/drivers/pci/access.c
@@ -1,6 +1,7 @@
1#include <linux/pci.h> 1#include <linux/pci.h>
2#include <linux/module.h> 2#include <linux/module.h>
3#include <linux/ioport.h> 3#include <linux/ioport.h>
4#include <linux/wait.h>
4 5
5#include "pci.h" 6#include "pci.h"
6 7
@@ -63,30 +64,42 @@ EXPORT_SYMBOL(pci_bus_write_config_byte);
63EXPORT_SYMBOL(pci_bus_write_config_word); 64EXPORT_SYMBOL(pci_bus_write_config_word);
64EXPORT_SYMBOL(pci_bus_write_config_dword); 65EXPORT_SYMBOL(pci_bus_write_config_dword);
65 66
66static u32 pci_user_cached_config(struct pci_dev *dev, int pos) 67/*
67{ 68 * The following routines are to prevent the user from accessing PCI config
68 u32 data; 69 * space when it's unsafe to do so. Some devices require this during BIST and
70 * we're required to prevent it during D-state transitions.
71 *
72 * We have a bit per device to indicate it's blocked and a global wait queue
73 * for callers to sleep on until devices are unblocked.
74 */
75static DECLARE_WAIT_QUEUE_HEAD(pci_ucfg_wait);
69 76
70 data = dev->saved_config_space[pos/sizeof(dev->saved_config_space[0])]; 77static noinline void pci_wait_ucfg(struct pci_dev *dev)
71 data >>= (pos % sizeof(dev->saved_config_space[0])) * 8; 78{
72 return data; 79 DECLARE_WAITQUEUE(wait, current);
80
81 __add_wait_queue(&pci_ucfg_wait, &wait);
82 do {
83 set_current_state(TASK_UNINTERRUPTIBLE);
84 spin_unlock_irq(&pci_lock);
85 schedule();
86 spin_lock_irq(&pci_lock);
87 } while (dev->block_ucfg_access);
88 __remove_wait_queue(&pci_ucfg_wait, &wait);
73} 89}
74 90
75#define PCI_USER_READ_CONFIG(size,type) \ 91#define PCI_USER_READ_CONFIG(size,type) \
76int pci_user_read_config_##size \ 92int pci_user_read_config_##size \
77 (struct pci_dev *dev, int pos, type *val) \ 93 (struct pci_dev *dev, int pos, type *val) \
78{ \ 94{ \
79 unsigned long flags; \
80 int ret = 0; \ 95 int ret = 0; \
81 u32 data = -1; \ 96 u32 data = -1; \
82 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ 97 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
83 spin_lock_irqsave(&pci_lock, flags); \ 98 spin_lock_irq(&pci_lock); \
84 if (likely(!dev->block_ucfg_access)) \ 99 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
85 ret = dev->bus->ops->read(dev->bus, dev->devfn, \ 100 ret = dev->bus->ops->read(dev->bus, dev->devfn, \
86 pos, sizeof(type), &data); \ 101 pos, sizeof(type), &data); \
87 else if (pos < sizeof(dev->saved_config_space)) \ 102 spin_unlock_irq(&pci_lock); \
88 data = pci_user_cached_config(dev, pos); \
89 spin_unlock_irqrestore(&pci_lock, flags); \
90 *val = (type)data; \ 103 *val = (type)data; \
91 return ret; \ 104 return ret; \
92} 105}
@@ -95,14 +108,13 @@ int pci_user_read_config_##size \
95int pci_user_write_config_##size \ 108int pci_user_write_config_##size \
96 (struct pci_dev *dev, int pos, type val) \ 109 (struct pci_dev *dev, int pos, type val) \
97{ \ 110{ \
98 unsigned long flags; \
99 int ret = -EIO; \ 111 int ret = -EIO; \
100 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \ 112 if (PCI_##size##_BAD) return PCIBIOS_BAD_REGISTER_NUMBER; \
101 spin_lock_irqsave(&pci_lock, flags); \ 113 spin_lock_irq(&pci_lock); \
102 if (likely(!dev->block_ucfg_access)) \ 114 if (unlikely(dev->block_ucfg_access)) pci_wait_ucfg(dev); \
103 ret = dev->bus->ops->write(dev->bus, dev->devfn, \ 115 ret = dev->bus->ops->write(dev->bus, dev->devfn, \
104 pos, sizeof(type), val); \ 116 pos, sizeof(type), val); \
105 spin_unlock_irqrestore(&pci_lock, flags); \ 117 spin_unlock_irq(&pci_lock); \
106 return ret; \ 118 return ret; \
107} 119}
108 120
@@ -117,21 +129,23 @@ PCI_USER_WRITE_CONFIG(dword, u32)
117 * pci_block_user_cfg_access - Block userspace PCI config reads/writes 129 * pci_block_user_cfg_access - Block userspace PCI config reads/writes
118 * @dev: pci device struct 130 * @dev: pci device struct
119 * 131 *
120 * This function blocks any userspace PCI config accesses from occurring. 132 * When user access is blocked, any reads or writes to config space will
121 * When blocked, any writes will be bit bucketed and reads will return the 133 * sleep until access is unblocked again. We don't allow nesting of
122 * data saved using pci_save_state for the first 64 bytes of config 134 * block/unblock calls.
123 * space and return 0xff for all other config reads. 135 */
124 **/
125void pci_block_user_cfg_access(struct pci_dev *dev) 136void pci_block_user_cfg_access(struct pci_dev *dev)
126{ 137{
127 unsigned long flags; 138 unsigned long flags;
139 int was_blocked;
128 140
129 pci_save_state(dev);
130
131 /* spinlock to synchronize with anyone reading config space now */
132 spin_lock_irqsave(&pci_lock, flags); 141 spin_lock_irqsave(&pci_lock, flags);
142 was_blocked = dev->block_ucfg_access;
133 dev->block_ucfg_access = 1; 143 dev->block_ucfg_access = 1;
134 spin_unlock_irqrestore(&pci_lock, flags); 144 spin_unlock_irqrestore(&pci_lock, flags);
145
146 /* If we BUG() inside the pci_lock, we're guaranteed to hose
147 * the machine */
148 BUG_ON(was_blocked);
135} 149}
136EXPORT_SYMBOL_GPL(pci_block_user_cfg_access); 150EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
137 151
@@ -140,14 +154,19 @@ EXPORT_SYMBOL_GPL(pci_block_user_cfg_access);
140 * @dev: pci device struct 154 * @dev: pci device struct
141 * 155 *
142 * This function allows userspace PCI config accesses to resume. 156 * This function allows userspace PCI config accesses to resume.
143 **/ 157 */
144void pci_unblock_user_cfg_access(struct pci_dev *dev) 158void pci_unblock_user_cfg_access(struct pci_dev *dev)
145{ 159{
146 unsigned long flags; 160 unsigned long flags;
147 161
148 /* spinlock to synchronize with anyone reading saved config space */
149 spin_lock_irqsave(&pci_lock, flags); 162 spin_lock_irqsave(&pci_lock, flags);
163
164 /* This indicates a problem in the caller, but we don't need
165 * to kill them, unlike a double-block above. */
166 WARN_ON(!dev->block_ucfg_access);
167
150 dev->block_ucfg_access = 0; 168 dev->block_ucfg_access = 0;
169 wake_up_all(&pci_ucfg_wait);
151 spin_unlock_irqrestore(&pci_lock, flags); 170 spin_unlock_irqrestore(&pci_lock, flags);
152} 171}
153EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access); 172EXPORT_SYMBOL_GPL(pci_unblock_user_cfg_access);
diff --git a/drivers/pci/hotplug/acpiphp.h b/drivers/pci/hotplug/acpiphp.h
index 59c5b242d86d..ddbadd95387e 100644
--- a/drivers/pci/hotplug/acpiphp.h
+++ b/drivers/pci/hotplug/acpiphp.h
@@ -62,10 +62,10 @@ struct acpiphp_slot;
62struct slot { 62struct slot {
63 struct hotplug_slot *hotplug_slot; 63 struct hotplug_slot *hotplug_slot;
64 struct acpiphp_slot *acpi_slot; 64 struct acpiphp_slot *acpi_slot;
65 struct hotplug_slot_info info;
66 char name[SLOT_NAME_SIZE];
65}; 67};
66 68
67
68
69/** 69/**
70 * struct acpiphp_bridge - PCI bridge information 70 * struct acpiphp_bridge - PCI bridge information
71 * 71 *
diff --git a/drivers/pci/hotplug/acpiphp_core.c b/drivers/pci/hotplug/acpiphp_core.c
index c57d9d5ce84e..40c79b03c7ef 100644
--- a/drivers/pci/hotplug/acpiphp_core.c
+++ b/drivers/pci/hotplug/acpiphp_core.c
@@ -303,25 +303,15 @@ static int __init init_acpi(void)
303 /* read initial number of slots */ 303 /* read initial number of slots */
304 if (!retval) { 304 if (!retval) {
305 num_slots = acpiphp_get_num_slots(); 305 num_slots = acpiphp_get_num_slots();
306 if (num_slots == 0) 306 if (num_slots == 0) {
307 acpiphp_glue_exit();
307 retval = -ENODEV; 308 retval = -ENODEV;
309 }
308 } 310 }
309 311
310 return retval; 312 return retval;
311} 313}
312 314
313
314/**
315 * make_slot_name - make a slot name that appears in pcihpfs
316 * @slot: slot to name
317 *
318 */
319static void make_slot_name(struct slot *slot)
320{
321 snprintf(slot->hotplug_slot->name, SLOT_NAME_SIZE, "%u",
322 slot->acpi_slot->sun);
323}
324
325/** 315/**
326 * release_slot - free up the memory used by a slot 316 * release_slot - free up the memory used by a slot
327 * @hotplug_slot: slot to free 317 * @hotplug_slot: slot to free
@@ -332,8 +322,6 @@ static void release_slot(struct hotplug_slot *hotplug_slot)
332 322
333 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name); 323 dbg("%s - physical_slot = %s\n", __FUNCTION__, hotplug_slot->name);
334 324
335 kfree(slot->hotplug_slot->info);
336 kfree(slot->hotplug_slot->name);
337 kfree(slot->hotplug_slot); 325 kfree(slot->hotplug_slot);
338 kfree(slot); 326 kfree(slot);
339} 327}
@@ -342,26 +330,19 @@ static void release_slot(struct hotplug_slot *hotplug_slot)
342int acpiphp_register_hotplug_slot(struct acpiphp_slot *acpiphp_slot) 330int acpiphp_register_hotplug_slot(struct acpiphp_slot *acpiphp_slot)
343{ 331{
344 struct slot *slot; 332 struct slot *slot;
345 struct hotplug_slot *hotplug_slot;
346 struct hotplug_slot_info *hotplug_slot_info;
347 int retval = -ENOMEM; 333 int retval = -ENOMEM;
348 334
349 slot = kzalloc(sizeof(*slot), GFP_KERNEL); 335 slot = kzalloc(sizeof(*slot), GFP_KERNEL);
350 if (!slot) 336 if (!slot)
351 goto error; 337 goto error;
352 338
353 slot->hotplug_slot = kzalloc(sizeof(*hotplug_slot), GFP_KERNEL); 339 slot->hotplug_slot = kzalloc(sizeof(*slot->hotplug_slot), GFP_KERNEL);
354 if (!slot->hotplug_slot) 340 if (!slot->hotplug_slot)
355 goto error_slot; 341 goto error_slot;
356 342
357 slot->hotplug_slot->info = kzalloc(sizeof(*hotplug_slot_info), 343 slot->hotplug_slot->info = &slot->info;
358 GFP_KERNEL);
359 if (!slot->hotplug_slot->info)
360 goto error_hpslot;
361 344
362 slot->hotplug_slot->name = kzalloc(SLOT_NAME_SIZE, GFP_KERNEL); 345 slot->hotplug_slot->name = slot->name;
363 if (!slot->hotplug_slot->name)
364 goto error_info;
365 346
366 slot->hotplug_slot->private = slot; 347 slot->hotplug_slot->private = slot;
367 slot->hotplug_slot->release = &release_slot; 348 slot->hotplug_slot->release = &release_slot;
@@ -376,21 +357,17 @@ int acpiphp_register_hotplug_slot(struct acpiphp_slot *acpiphp_slot)
376 slot->hotplug_slot->info->cur_bus_speed = PCI_SPEED_UNKNOWN; 357 slot->hotplug_slot->info->cur_bus_speed = PCI_SPEED_UNKNOWN;
377 358
378 acpiphp_slot->slot = slot; 359 acpiphp_slot->slot = slot;
379 make_slot_name(slot); 360 snprintf(slot->name, sizeof(slot->name), "%u", slot->acpi_slot->sun);
380 361
381 retval = pci_hp_register(slot->hotplug_slot); 362 retval = pci_hp_register(slot->hotplug_slot);
382 if (retval) { 363 if (retval) {
383 err("pci_hp_register failed with error %d\n", retval); 364 err("pci_hp_register failed with error %d\n", retval);
384 goto error_name; 365 goto error_hpslot;
385 } 366 }
386 367
387 info("Slot [%s] registered\n", slot->hotplug_slot->name); 368 info("Slot [%s] registered\n", slot->hotplug_slot->name);
388 369
389 return 0; 370 return 0;
390error_name:
391 kfree(slot->hotplug_slot->name);
392error_info:
393 kfree(slot->hotplug_slot->info);
394error_hpslot: 371error_hpslot:
395 kfree(slot->hotplug_slot); 372 kfree(slot->hotplug_slot);
396error_slot: 373error_slot:
diff --git a/drivers/pci/hotplug/acpiphp_glue.c b/drivers/pci/hotplug/acpiphp_glue.c
index 16167b016266..0b9d0db1590a 100644
--- a/drivers/pci/hotplug/acpiphp_glue.c
+++ b/drivers/pci/hotplug/acpiphp_glue.c
@@ -1693,14 +1693,10 @@ void __exit acpiphp_glue_exit(void)
1693 */ 1693 */
1694int __init acpiphp_get_num_slots(void) 1694int __init acpiphp_get_num_slots(void)
1695{ 1695{
1696 struct list_head *node;
1697 struct acpiphp_bridge *bridge; 1696 struct acpiphp_bridge *bridge;
1698 int num_slots; 1697 int num_slots = 0;
1699
1700 num_slots = 0;
1701 1698
1702 list_for_each (node, &bridge_list) { 1699 list_for_each_entry (bridge, &bridge_list, list) {
1703 bridge = (struct acpiphp_bridge *)node;
1704 dbg("Bus %04x:%02x has %d slot%s\n", 1700 dbg("Bus %04x:%02x has %d slot%s\n",
1705 pci_domain_nr(bridge->pci_bus), 1701 pci_domain_nr(bridge->pci_bus),
1706 bridge->pci_bus->number, bridge->nr_slots, 1702 bridge->pci_bus->number, bridge->nr_slots,
diff --git a/drivers/pci/hotplug/ibmphp_pci.c b/drivers/pci/hotplug/ibmphp_pci.c
index d87a9e3eaeeb..d8f05d7a3c72 100644
--- a/drivers/pci/hotplug/ibmphp_pci.c
+++ b/drivers/pci/hotplug/ibmphp_pci.c
@@ -1371,12 +1371,12 @@ static int unconfigure_boot_bridge (u8 busno, u8 device, u8 function)
1371 } 1371 }
1372 1372
1373 bus = ibmphp_find_res_bus (sec_number); 1373 bus = ibmphp_find_res_bus (sec_number);
1374 debug ("bus->busno is %x\n", bus->busno);
1375 debug ("sec_number is %x\n", sec_number);
1376 if (!bus) { 1374 if (!bus) {
1377 err ("cannot find Bus structure for the bridged device\n"); 1375 err ("cannot find Bus structure for the bridged device\n");
1378 return -EINVAL; 1376 return -EINVAL;
1379 } 1377 }
1378 debug("bus->busno is %x\n", bus->busno);
1379 debug("sec_number is %x\n", sec_number);
1380 1380
1381 ibmphp_remove_bus (bus, busno); 1381 ibmphp_remove_bus (bus, busno);
1382 1382
diff --git a/drivers/pci/hotplug/pciehp_core.c b/drivers/pci/hotplug/pciehp_core.c
index f93e81e2d2c7..f13f31323e85 100644
--- a/drivers/pci/hotplug/pciehp_core.c
+++ b/drivers/pci/hotplug/pciehp_core.c
@@ -521,14 +521,9 @@ static void __exit unload_pciehpd(void)
521 521
522} 522}
523 523
524static int hpdriver_context = 0;
525
526static void pciehp_remove (struct pcie_device *device) 524static void pciehp_remove (struct pcie_device *device)
527{ 525{
528 printk("%s ENTRY\n", __FUNCTION__); 526 /* XXX - Needs to be adapted to device driver model */
529 printk("%s -> Call free_irq for irq = %d\n",
530 __FUNCTION__, device->irq);
531 free_irq(device->irq, &hpdriver_context);
532} 527}
533 528
534#ifdef CONFIG_PM 529#ifdef CONFIG_PM
diff --git a/drivers/pci/hotplug/pciehp_hpc.c b/drivers/pci/hotplug/pciehp_hpc.c
index 1c551c697c35..6d3f580f2666 100644
--- a/drivers/pci/hotplug/pciehp_hpc.c
+++ b/drivers/pci/hotplug/pciehp_hpc.c
@@ -718,8 +718,6 @@ static void hpc_release_ctlr(struct controller *ctrl)
718 if (php_ctlr->irq) { 718 if (php_ctlr->irq) {
719 free_irq(php_ctlr->irq, ctrl); 719 free_irq(php_ctlr->irq, ctrl);
720 php_ctlr->irq = 0; 720 php_ctlr->irq = 0;
721 if (!pcie_mch_quirk)
722 pci_disable_msi(php_ctlr->pci_dev);
723 } 721 }
724 } 722 }
725 if (php_ctlr->pci_dev) 723 if (php_ctlr->pci_dev)
diff --git a/drivers/pci/hotplug/rpadlpar_core.c b/drivers/pci/hotplug/rpadlpar_core.c
index 46825fee3ae4..72383467a0d5 100644
--- a/drivers/pci/hotplug/rpadlpar_core.c
+++ b/drivers/pci/hotplug/rpadlpar_core.c
@@ -63,7 +63,7 @@ static struct device_node *find_php_slot_pci_node(char *drc_name,
63 char *type; 63 char *type;
64 int rc; 64 int rc;
65 65
66 while ((np = of_find_node_by_type(np, "pci"))) { 66 while ((np = of_find_node_by_name(np, "pci"))) {
67 rc = rpaphp_get_drc_props(np, NULL, &name, &type, NULL); 67 rc = rpaphp_get_drc_props(np, NULL, &name, &type, NULL);
68 if (rc == 0) 68 if (rc == 0)
69 if (!strcmp(drc_name, name) && !strcmp(drc_type, type)) 69 if (!strcmp(drc_name, name) && !strcmp(drc_type, type))
diff --git a/drivers/pci/hotplug/rpaphp_core.c b/drivers/pci/hotplug/rpaphp_core.c
index 141486df235b..71a2cb8baa4a 100644
--- a/drivers/pci/hotplug/rpaphp_core.c
+++ b/drivers/pci/hotplug/rpaphp_core.c
@@ -356,7 +356,7 @@ static int __init rpaphp_init(void)
356 info(DRIVER_DESC " version: " DRIVER_VERSION "\n"); 356 info(DRIVER_DESC " version: " DRIVER_VERSION "\n");
357 init_MUTEX(&rpaphp_sem); 357 init_MUTEX(&rpaphp_sem);
358 358
359 while ((dn = of_find_node_by_type(dn, "pci"))) 359 while ((dn = of_find_node_by_name(dn, "pci")))
360 rpaphp_add_slot(dn); 360 rpaphp_add_slot(dn);
361 361
362 return 0; 362 return 0;
diff --git a/drivers/pci/hotplug/sgi_hotplug.c b/drivers/pci/hotplug/sgi_hotplug.c
index b62ad31a9739..5d188c558386 100644
--- a/drivers/pci/hotplug/sgi_hotplug.c
+++ b/drivers/pci/hotplug/sgi_hotplug.c
@@ -205,21 +205,6 @@ static struct hotplug_slot * sn_hp_destroy(void)
205 return bss_hotplug_slot; 205 return bss_hotplug_slot;
206} 206}
207 207
208static void sn_bus_alloc_data(struct pci_dev *dev)
209{
210 struct pci_bus *subordinate_bus;
211 struct pci_dev *child;
212
213 sn_pci_fixup_slot(dev);
214
215 /* Recursively sets up the sn_irq_info structs */
216 if (dev->subordinate) {
217 subordinate_bus = dev->subordinate;
218 list_for_each_entry(child, &subordinate_bus->devices, bus_list)
219 sn_bus_alloc_data(child);
220 }
221}
222
223static void sn_bus_free_data(struct pci_dev *dev) 208static void sn_bus_free_data(struct pci_dev *dev)
224{ 209{
225 struct pci_bus *subordinate_bus; 210 struct pci_bus *subordinate_bus;
@@ -337,6 +322,11 @@ static int sn_slot_disable(struct hotplug_slot *bss_hotplug_slot,
337 return rc; 322 return rc;
338} 323}
339 324
325/*
326 * Power up and configure the slot via a SAL call to PROM.
327 * Scan slot (and any children), do any platform specific fixup,
328 * and find device driver.
329 */
340static int enable_slot(struct hotplug_slot *bss_hotplug_slot) 330static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
341{ 331{
342 struct slot *slot = bss_hotplug_slot->private; 332 struct slot *slot = bss_hotplug_slot->private;
@@ -345,6 +335,7 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
345 int func, num_funcs; 335 int func, num_funcs;
346 int new_ppb = 0; 336 int new_ppb = 0;
347 int rc; 337 int rc;
338 void pcibios_fixup_device_resources(struct pci_dev *);
348 339
349 /* Serialize the Linux PCI infrastructure */ 340 /* Serialize the Linux PCI infrastructure */
350 mutex_lock(&sn_hotplug_mutex); 341 mutex_lock(&sn_hotplug_mutex);
@@ -367,9 +358,6 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
367 return -ENODEV; 358 return -ENODEV;
368 } 359 }
369 360
370 sn_pci_controller_fixup(pci_domain_nr(slot->pci_bus),
371 slot->pci_bus->number,
372 slot->pci_bus);
373 /* 361 /*
374 * Map SN resources for all functions on the card 362 * Map SN resources for all functions on the card
375 * to the Linux PCI interface and tell the drivers 363 * to the Linux PCI interface and tell the drivers
@@ -380,6 +368,13 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
380 PCI_DEVFN(slot->device_num + 1, 368 PCI_DEVFN(slot->device_num + 1,
381 PCI_FUNC(func))); 369 PCI_FUNC(func)));
382 if (dev) { 370 if (dev) {
371 /* Need to do slot fixup on PPB before fixup of children
372 * (PPB's pcidev_info needs to be in pcidev_info list
373 * before child's SN_PCIDEV_INFO() call to setup
374 * pdi_host_pcidev_info).
375 */
376 pcibios_fixup_device_resources(dev);
377 sn_pci_fixup_slot(dev);
383 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) { 378 if (dev->hdr_type == PCI_HEADER_TYPE_BRIDGE) {
384 unsigned char sec_bus; 379 unsigned char sec_bus;
385 pci_read_config_byte(dev, PCI_SECONDARY_BUS, 380 pci_read_config_byte(dev, PCI_SECONDARY_BUS,
@@ -387,12 +382,8 @@ static int enable_slot(struct hotplug_slot *bss_hotplug_slot)
387 new_bus = pci_add_new_bus(dev->bus, dev, 382 new_bus = pci_add_new_bus(dev->bus, dev,
388 sec_bus); 383 sec_bus);
389 pci_scan_child_bus(new_bus); 384 pci_scan_child_bus(new_bus);
390 sn_pci_controller_fixup(pci_domain_nr(new_bus),
391 new_bus->number,
392 new_bus);
393 new_ppb = 1; 385 new_ppb = 1;
394 } 386 }
395 sn_bus_alloc_data(dev);
396 pci_dev_put(dev); 387 pci_dev_put(dev);
397 } 388 }
398 } 389 }
diff --git a/drivers/pci/msi.h b/drivers/pci/msi.h
index f0cca1772f9c..3898f5237144 100644
--- a/drivers/pci/msi.h
+++ b/drivers/pci/msi.h
@@ -6,14 +6,6 @@
6#ifndef MSI_H 6#ifndef MSI_H
7#define MSI_H 7#define MSI_H
8 8
9/*
10 * MSI-X Address Register
11 */
12#define PCI_MSIX_FLAGS_QSIZE 0x7FF
13#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
14#define PCI_MSIX_FLAGS_BIRMASK (7 << 0)
15#define PCI_MSIX_FLAGS_BITMASK (1 << 0)
16
17#define PCI_MSIX_ENTRY_SIZE 16 9#define PCI_MSIX_ENTRY_SIZE 16
18#define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0 10#define PCI_MSIX_ENTRY_LOWER_ADDR_OFFSET 0
19#define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4 11#define PCI_MSIX_ENTRY_UPPER_ADDR_OFFSET 4
diff --git a/drivers/pci/pci-acpi.c b/drivers/pci/pci-acpi.c
index bb7456c1dbac..a064f36a0805 100644
--- a/drivers/pci/pci-acpi.c
+++ b/drivers/pci/pci-acpi.c
@@ -36,6 +36,7 @@ acpi_query_osc (
36 struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL}; 36 struct acpi_buffer output = {ACPI_ALLOCATE_BUFFER, NULL};
37 union acpi_object *out_obj; 37 union acpi_object *out_obj;
38 u32 osc_dw0; 38 u32 osc_dw0;
39 acpi_status *ret_status = (acpi_status *)retval;
39 40
40 41
41 /* Setting up input parameters */ 42 /* Setting up input parameters */
@@ -56,6 +57,7 @@ acpi_query_osc (
56 if (ACPI_FAILURE (status)) { 57 if (ACPI_FAILURE (status)) {
57 printk(KERN_DEBUG 58 printk(KERN_DEBUG
58 "Evaluate _OSC Set fails. Status = 0x%04x\n", status); 59 "Evaluate _OSC Set fails. Status = 0x%04x\n", status);
60 *ret_status = status;
59 return status; 61 return status;
60 } 62 }
61 out_obj = output.pointer; 63 out_obj = output.pointer;
@@ -90,6 +92,7 @@ acpi_query_osc (
90 92
91query_osc_out: 93query_osc_out:
92 kfree(output.pointer); 94 kfree(output.pointer);
95 *ret_status = status;
93 return status; 96 return status;
94} 97}
95 98
@@ -166,6 +169,7 @@ run_osc_out:
166acpi_status pci_osc_support_set(u32 flags) 169acpi_status pci_osc_support_set(u32 flags)
167{ 170{
168 u32 temp; 171 u32 temp;
172 acpi_status retval;
169 173
170 if (!(flags & OSC_SUPPORT_MASKS)) { 174 if (!(flags & OSC_SUPPORT_MASKS)) {
171 return AE_TYPE; 175 return AE_TYPE;
@@ -179,9 +183,13 @@ acpi_status pci_osc_support_set(u32 flags)
179 acpi_get_devices ( PCI_ROOT_HID_STRING, 183 acpi_get_devices ( PCI_ROOT_HID_STRING,
180 acpi_query_osc, 184 acpi_query_osc,
181 ctrlset_buf, 185 ctrlset_buf,
182 NULL ); 186 (void **) &retval );
183 ctrlset_buf[OSC_QUERY_TYPE] = !OSC_QUERY_ENABLE; 187 ctrlset_buf[OSC_QUERY_TYPE] = !OSC_QUERY_ENABLE;
184 ctrlset_buf[OSC_CONTROL_TYPE] = temp; 188 ctrlset_buf[OSC_CONTROL_TYPE] = temp;
189 if (ACPI_FAILURE(retval)) {
190 /* no osc support at all */
191 ctrlset_buf[OSC_SUPPORT_TYPE] = 0;
192 }
185 return AE_OK; 193 return AE_OK;
186} 194}
187EXPORT_SYMBOL(pci_osc_support_set); 195EXPORT_SYMBOL(pci_osc_support_set);
diff --git a/drivers/pci/pci-driver.c b/drivers/pci/pci-driver.c
index 194f1d21d3d7..e5ae3a0c13bb 100644
--- a/drivers/pci/pci-driver.c
+++ b/drivers/pci/pci-driver.c
@@ -329,8 +329,8 @@ static int pci_default_resume(struct pci_dev *pci_dev)
329 /* restore the PCI config space */ 329 /* restore the PCI config space */
330 pci_restore_state(pci_dev); 330 pci_restore_state(pci_dev);
331 /* if the device was enabled before suspend, reenable */ 331 /* if the device was enabled before suspend, reenable */
332 if (pci_dev->is_enabled) 332 if (atomic_read(&pci_dev->enable_cnt))
333 retval = pci_enable_device(pci_dev); 333 retval = __pci_enable_device(pci_dev);
334 /* if the device was busmaster before the suspend, make it busmaster again */ 334 /* if the device was busmaster before the suspend, make it busmaster again */
335 if (pci_dev->is_busmaster) 335 if (pci_dev->is_busmaster)
336 pci_set_master(pci_dev); 336 pci_set_master(pci_dev);
@@ -445,9 +445,12 @@ int __pci_register_driver(struct pci_driver *drv, struct module *owner)
445 445
446 /* register with core */ 446 /* register with core */
447 error = driver_register(&drv->driver); 447 error = driver_register(&drv->driver);
448 if (error)
449 return error;
448 450
449 if (!error) 451 error = pci_create_newid_file(drv);
450 error = pci_create_newid_file(drv); 452 if (error)
453 driver_unregister(&drv->driver);
451 454
452 return error; 455 return error;
453} 456}
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index f952bfea48a6..7a94076752d0 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -42,7 +42,6 @@ pci_config_attr(subsystem_vendor, "0x%04x\n");
42pci_config_attr(subsystem_device, "0x%04x\n"); 42pci_config_attr(subsystem_device, "0x%04x\n");
43pci_config_attr(class, "0x%06x\n"); 43pci_config_attr(class, "0x%06x\n");
44pci_config_attr(irq, "%u\n"); 44pci_config_attr(irq, "%u\n");
45pci_config_attr(is_enabled, "%u\n");
46 45
47static ssize_t broken_parity_status_show(struct device *dev, 46static ssize_t broken_parity_status_show(struct device *dev,
48 struct device_attribute *attr, 47 struct device_attribute *attr,
@@ -112,26 +111,36 @@ static ssize_t modalias_show(struct device *dev, struct device_attribute *attr,
112 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8), 111 (u8)(pci_dev->class >> 16), (u8)(pci_dev->class >> 8),
113 (u8)(pci_dev->class)); 112 (u8)(pci_dev->class));
114} 113}
115static ssize_t 114
116is_enabled_store(struct device *dev, struct device_attribute *attr, 115static ssize_t is_enabled_store(struct device *dev,
117 const char *buf, size_t count) 116 struct device_attribute *attr, const char *buf,
117 size_t count)
118{ 118{
119 ssize_t result = -EINVAL;
119 struct pci_dev *pdev = to_pci_dev(dev); 120 struct pci_dev *pdev = to_pci_dev(dev);
120 int retval = 0;
121 121
122 /* this can crash the machine when done on the "wrong" device */ 122 /* this can crash the machine when done on the "wrong" device */
123 if (!capable(CAP_SYS_ADMIN)) 123 if (!capable(CAP_SYS_ADMIN))
124 return count; 124 return count;
125 125
126 if (*buf == '0') 126 if (*buf == '0') {
127 pci_disable_device(pdev); 127 if (atomic_read(&pdev->enable_cnt) != 0)
128 pci_disable_device(pdev);
129 else
130 result = -EIO;
131 } else if (*buf == '1')
132 result = pci_enable_device(pdev);
133
134 return result < 0 ? result : count;
135}
128 136
129 if (*buf == '1') 137static ssize_t is_enabled_show(struct device *dev,
130 retval = pci_enable_device(pdev); 138 struct device_attribute *attr, char *buf)
139{
140 struct pci_dev *pdev;
131 141
132 if (retval) 142 pdev = to_pci_dev (dev);
133 return retval; 143 return sprintf (buf, "%u\n", atomic_read(&pdev->enable_cnt));
134 return count;
135} 144}
136 145
137static ssize_t 146static ssize_t
diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c
index a544997399b3..5a14b73cf3a1 100644
--- a/drivers/pci/pci.c
+++ b/drivers/pci/pci.c
@@ -490,6 +490,47 @@ static void pci_restore_pcie_state(struct pci_dev *dev)
490 kfree(save_state); 490 kfree(save_state);
491} 491}
492 492
493
494static int pci_save_pcix_state(struct pci_dev *dev)
495{
496 int pos, i = 0;
497 struct pci_cap_saved_state *save_state;
498 u16 *cap;
499
500 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
501 if (pos <= 0)
502 return 0;
503
504 save_state = kzalloc(sizeof(*save_state) + sizeof(u16), GFP_KERNEL);
505 if (!save_state) {
506 dev_err(&dev->dev, "Out of memory in pci_save_pcie_state\n");
507 return -ENOMEM;
508 }
509 cap = (u16 *)&save_state->data[0];
510
511 pci_read_config_word(dev, pos + PCI_X_CMD, &cap[i++]);
512 pci_add_saved_cap(dev, save_state);
513 return 0;
514}
515
516static void pci_restore_pcix_state(struct pci_dev *dev)
517{
518 int i = 0, pos;
519 struct pci_cap_saved_state *save_state;
520 u16 *cap;
521
522 save_state = pci_find_saved_cap(dev, PCI_CAP_ID_PCIX);
523 pos = pci_find_capability(dev, PCI_CAP_ID_PCIX);
524 if (!save_state || pos <= 0)
525 return;
526 cap = (u16 *)&save_state->data[0];
527
528 pci_write_config_word(dev, pos + PCI_X_CMD, cap[i++]);
529 pci_remove_saved_cap(save_state);
530 kfree(save_state);
531}
532
533
493/** 534/**
494 * pci_save_state - save the PCI configuration space of a device before suspending 535 * pci_save_state - save the PCI configuration space of a device before suspending
495 * @dev: - PCI device that we're dealing with 536 * @dev: - PCI device that we're dealing with
@@ -507,6 +548,8 @@ pci_save_state(struct pci_dev *dev)
507 return i; 548 return i;
508 if ((i = pci_save_pcie_state(dev)) != 0) 549 if ((i = pci_save_pcie_state(dev)) != 0)
509 return i; 550 return i;
551 if ((i = pci_save_pcix_state(dev)) != 0)
552 return i;
510 return 0; 553 return 0;
511} 554}
512 555
@@ -538,6 +581,7 @@ pci_restore_state(struct pci_dev *dev)
538 dev->saved_config_space[i]); 581 dev->saved_config_space[i]);
539 } 582 }
540 } 583 }
584 pci_restore_pcix_state(dev);
541 pci_restore_msi_state(dev); 585 pci_restore_msi_state(dev);
542 pci_restore_msix_state(dev); 586 pci_restore_msix_state(dev);
543 return 0; 587 return 0;
@@ -568,30 +612,51 @@ pci_enable_device_bars(struct pci_dev *dev, int bars)
568} 612}
569 613
570/** 614/**
571 * pci_enable_device - Initialize device before it's used by a driver. 615 * __pci_enable_device - Initialize device before it's used by a driver.
572 * @dev: PCI device to be initialized 616 * @dev: PCI device to be initialized
573 * 617 *
574 * Initialize device before it's used by a driver. Ask low-level code 618 * Initialize device before it's used by a driver. Ask low-level code
575 * to enable I/O and memory. Wake up the device if it was suspended. 619 * to enable I/O and memory. Wake up the device if it was suspended.
576 * Beware, this function can fail. 620 * Beware, this function can fail.
621 *
622 * Note this function is a backend and is not supposed to be called by
623 * normal code, use pci_enable_device() instead.
577 */ 624 */
578int 625int
579pci_enable_device(struct pci_dev *dev) 626__pci_enable_device(struct pci_dev *dev)
580{ 627{
581 int err; 628 int err;
582 629
583 if (dev->is_enabled)
584 return 0;
585
586 err = pci_enable_device_bars(dev, (1 << PCI_NUM_RESOURCES) - 1); 630 err = pci_enable_device_bars(dev, (1 << PCI_NUM_RESOURCES) - 1);
587 if (err) 631 if (err)
588 return err; 632 return err;
589 pci_fixup_device(pci_fixup_enable, dev); 633 pci_fixup_device(pci_fixup_enable, dev);
590 dev->is_enabled = 1;
591 return 0; 634 return 0;
592} 635}
593 636
594/** 637/**
638 * pci_enable_device - Initialize device before it's used by a driver.
639 * @dev: PCI device to be initialized
640 *
641 * Initialize device before it's used by a driver. Ask low-level code
642 * to enable I/O and memory. Wake up the device if it was suspended.
643 * Beware, this function can fail.
644 *
645 * Note we don't actually enable the device many times if we call
646 * this function repeatedly (we just increment the count).
647 */
648int pci_enable_device(struct pci_dev *dev)
649{
650 int result;
651 if (atomic_add_return(1, &dev->enable_cnt) > 1)
652 return 0; /* already enabled */
653 result = __pci_enable_device(dev);
654 if (result < 0)
655 atomic_dec(&dev->enable_cnt);
656 return result;
657}
658
659/**
595 * pcibios_disable_device - disable arch specific PCI resources for device dev 660 * pcibios_disable_device - disable arch specific PCI resources for device dev
596 * @dev: the PCI device to disable 661 * @dev: the PCI device to disable
597 * 662 *
@@ -607,12 +672,18 @@ void __attribute__ ((weak)) pcibios_disable_device (struct pci_dev *dev) {}
607 * 672 *
608 * Signal to the system that the PCI device is not in use by the system 673 * Signal to the system that the PCI device is not in use by the system
609 * anymore. This only involves disabling PCI bus-mastering, if active. 674 * anymore. This only involves disabling PCI bus-mastering, if active.
675 *
676 * Note we don't actually disable the device until all callers of
677 * pci_device_enable() have called pci_device_disable().
610 */ 678 */
611void 679void
612pci_disable_device(struct pci_dev *dev) 680pci_disable_device(struct pci_dev *dev)
613{ 681{
614 u16 pci_command; 682 u16 pci_command;
615 683
684 if (atomic_sub_return(1, &dev->enable_cnt) != 0)
685 return;
686
616 if (dev->msi_enabled) 687 if (dev->msi_enabled)
617 disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI), 688 disable_msi_mode(dev, pci_find_capability(dev, PCI_CAP_ID_MSI),
618 PCI_CAP_ID_MSI); 689 PCI_CAP_ID_MSI);
@@ -628,7 +699,6 @@ pci_disable_device(struct pci_dev *dev)
628 dev->is_busmaster = 0; 699 dev->is_busmaster = 0;
629 700
630 pcibios_disable_device(dev); 701 pcibios_disable_device(dev);
631 dev->is_enabled = 0;
632} 702}
633 703
634/** 704/**
@@ -831,22 +901,38 @@ pci_set_master(struct pci_dev *dev)
831 pcibios_set_master(dev); 901 pcibios_set_master(dev);
832} 902}
833 903
834#ifndef HAVE_ARCH_PCI_MWI 904#ifdef PCI_DISABLE_MWI
905int pci_set_mwi(struct pci_dev *dev)
906{
907 return 0;
908}
909
910void pci_clear_mwi(struct pci_dev *dev)
911{
912}
913
914#else
915
916#ifndef PCI_CACHE_LINE_BYTES
917#define PCI_CACHE_LINE_BYTES L1_CACHE_BYTES
918#endif
919
835/* This can be overridden by arch code. */ 920/* This can be overridden by arch code. */
836u8 pci_cache_line_size = L1_CACHE_BYTES >> 2; 921/* Don't forget this is measured in 32-bit words, not bytes */
922u8 pci_cache_line_size = PCI_CACHE_LINE_BYTES / 4;
837 923
838/** 924/**
839 * pci_generic_prep_mwi - helper function for pci_set_mwi 925 * pci_set_cacheline_size - ensure the CACHE_LINE_SIZE register is programmed
840 * @dev: the PCI device for which MWI is enabled 926 * @dev: the PCI device for which MWI is to be enabled
841 * 927 *
842 * Helper function for generic implementation of pcibios_prep_mwi 928 * Helper function for pci_set_mwi.
843 * function. Originally copied from drivers/net/acenic.c. 929 * Originally copied from drivers/net/acenic.c.
844 * Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>. 930 * Copyright 1998-2001 by Jes Sorensen, <jes@trained-monkey.org>.
845 * 931 *
846 * RETURNS: An appropriate -ERRNO error value on error, or zero for success. 932 * RETURNS: An appropriate -ERRNO error value on error, or zero for success.
847 */ 933 */
848static int 934static int
849pci_generic_prep_mwi(struct pci_dev *dev) 935pci_set_cacheline_size(struct pci_dev *dev)
850{ 936{
851 u8 cacheline_size; 937 u8 cacheline_size;
852 938
@@ -872,7 +958,6 @@ pci_generic_prep_mwi(struct pci_dev *dev)
872 958
873 return -EINVAL; 959 return -EINVAL;
874} 960}
875#endif /* !HAVE_ARCH_PCI_MWI */
876 961
877/** 962/**
878 * pci_set_mwi - enables memory-write-invalidate PCI transaction 963 * pci_set_mwi - enables memory-write-invalidate PCI transaction
@@ -890,12 +975,7 @@ pci_set_mwi(struct pci_dev *dev)
890 int rc; 975 int rc;
891 u16 cmd; 976 u16 cmd;
892 977
893#ifdef HAVE_ARCH_PCI_MWI 978 rc = pci_set_cacheline_size(dev);
894 rc = pcibios_prep_mwi(dev);
895#else
896 rc = pci_generic_prep_mwi(dev);
897#endif
898
899 if (rc) 979 if (rc)
900 return rc; 980 return rc;
901 981
@@ -926,6 +1006,7 @@ pci_clear_mwi(struct pci_dev *dev)
926 pci_write_config_word(dev, PCI_COMMAND, cmd); 1006 pci_write_config_word(dev, PCI_COMMAND, cmd);
927 } 1007 }
928} 1008}
1009#endif /* ! PCI_DISABLE_MWI */
929 1010
930/** 1011/**
931 * pci_intx - enables/disables PCI INTx for device dev 1012 * pci_intx - enables/disables PCI INTx for device dev
diff --git a/drivers/pci/pci.h b/drivers/pci/pci.h
index 6bf327db5c5e..398852f526a6 100644
--- a/drivers/pci/pci.h
+++ b/drivers/pci/pci.h
@@ -1,5 +1,6 @@
1/* Functions internal to the PCI core code */ 1/* Functions internal to the PCI core code */
2 2
3extern int __must_check __pci_enable_device(struct pci_dev *);
3extern int pci_uevent(struct device *dev, char **envp, int num_envp, 4extern int pci_uevent(struct device *dev, char **envp, int num_envp,
4 char *buffer, int buffer_size); 5 char *buffer, int buffer_size);
5extern int pci_create_sysfs_dev_files(struct pci_dev *pdev); 6extern int pci_create_sysfs_dev_files(struct pci_dev *pdev);
diff --git a/drivers/pci/probe.c b/drivers/pci/probe.c
index e159d6604494..0eeac60042b3 100644
--- a/drivers/pci/probe.c
+++ b/drivers/pci/probe.c
@@ -679,6 +679,33 @@ static int pci_setup_device(struct pci_dev * dev)
679 pci_read_bases(dev, 6, PCI_ROM_ADDRESS); 679 pci_read_bases(dev, 6, PCI_ROM_ADDRESS);
680 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor); 680 pci_read_config_word(dev, PCI_SUBSYSTEM_VENDOR_ID, &dev->subsystem_vendor);
681 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device); 681 pci_read_config_word(dev, PCI_SUBSYSTEM_ID, &dev->subsystem_device);
682
683 /*
684 * Do the ugly legacy mode stuff here rather than broken chip
685 * quirk code. Legacy mode ATA controllers have fixed
686 * addresses. These are not always echoed in BAR0-3, and
687 * BAR0-3 in a few cases contain junk!
688 */
689 if (class == PCI_CLASS_STORAGE_IDE) {
690 u8 progif;
691 pci_read_config_byte(dev, PCI_CLASS_PROG, &progif);
692 if ((progif & 1) == 0) {
693 dev->resource[0].start = 0x1F0;
694 dev->resource[0].end = 0x1F7;
695 dev->resource[0].flags = IORESOURCE_IO;
696 dev->resource[1].start = 0x3F6;
697 dev->resource[1].end = 0x3F6;
698 dev->resource[1].flags = IORESOURCE_IO;
699 }
700 if ((progif & 4) == 0) {
701 dev->resource[2].start = 0x170;
702 dev->resource[2].end = 0x177;
703 dev->resource[2].flags = IORESOURCE_IO;
704 dev->resource[3].start = 0x376;
705 dev->resource[3].end = 0x376;
706 dev->resource[3].flags = IORESOURCE_IO;
707 }
708 }
682 break; 709 break;
683 710
684 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */ 711 case PCI_HEADER_TYPE_BRIDGE: /* bridge header */
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 5b4483811691..9ca9b9bf6160 100644
--- a/drivers/pci/quirks.c
+++ b/drivers/pci/quirks.c
@@ -797,56 +797,6 @@ static void __init quirk_mediagx_master(struct pci_dev *dev)
797DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master ); 797DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_CYRIX, PCI_DEVICE_ID_CYRIX_PCI_MASTER, quirk_mediagx_master );
798 798
799/* 799/*
800 * As per PCI spec, ignore base address registers 0-3 of the IDE controllers
801 * running in Compatible mode (bits 0 and 2 in the ProgIf for primary and
802 * secondary channels respectively). If the device reports Compatible mode
803 * but does use BAR0-3 for address decoding, we assume that firmware has
804 * programmed these BARs with standard values (0x1f0,0x3f4 and 0x170,0x374).
805 * Exceptions (if they exist) must be handled in chip/architecture specific
806 * fixups.
807 *
808 * Note: for non x86 people. You may need an arch specific quirk to handle
809 * moving IDE devices to native mode as well. Some plug in card devices power
810 * up in compatible mode and assume the BIOS will adjust them.
811 *
812 * Q: should we load the 0x1f0,0x3f4 into the registers or zap them as
813 * we do now ? We don't want is pci_enable_device to come along
814 * and assign new resources. Both approaches work for that.
815 */
816static void __devinit quirk_ide_bases(struct pci_dev *dev)
817{
818 struct resource *res;
819 int first_bar = 2, last_bar = 0;
820
821 if ((dev->class >> 8) != PCI_CLASS_STORAGE_IDE)
822 return;
823
824 res = &dev->resource[0];
825
826 /* primary channel: ProgIf bit 0, BAR0, BAR1 */
827 if (!(dev->class & 1) && (res[0].flags || res[1].flags)) {
828 res[0].start = res[0].end = res[0].flags = 0;
829 res[1].start = res[1].end = res[1].flags = 0;
830 first_bar = 0;
831 last_bar = 1;
832 }
833
834 /* secondary channel: ProgIf bit 2, BAR2, BAR3 */
835 if (!(dev->class & 4) && (res[2].flags || res[3].flags)) {
836 res[2].start = res[2].end = res[2].flags = 0;
837 res[3].start = res[3].end = res[3].flags = 0;
838 last_bar = 3;
839 }
840
841 if (!last_bar)
842 return;
843
844 printk(KERN_INFO "PCI: Ignoring BAR%d-%d of IDE controller %s\n",
845 first_bar, last_bar, pci_name(dev));
846}
847DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, quirk_ide_bases);
848
849/*
850 * Ensure C0 rev restreaming is off. This is normally done by 800 * Ensure C0 rev restreaming is off. This is normally done by
851 * the BIOS but in the odd case it is not the results are corruption 801 * the BIOS but in the odd case it is not the results are corruption
852 * hence the presence of a Linux check 802 * hence the presence of a Linux check
@@ -880,11 +830,10 @@ static void __devinit quirk_svwks_csb5ide(struct pci_dev *pdev)
880 prog &= ~5; 830 prog &= ~5;
881 pdev->class &= ~5; 831 pdev->class &= ~5;
882 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); 832 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
883 /* need to re-assign BARs for compat mode */ 833 /* PCI layer will sort out resources */
884 quirk_ide_bases(pdev);
885 } 834 }
886} 835}
887DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide ); 836DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_CSB5IDE, quirk_svwks_csb5ide );
888 837
889/* 838/*
890 * Intel 82801CAM ICH3-M datasheet says IDE modes must be the same 839 * Intel 82801CAM ICH3-M datasheet says IDE modes must be the same
@@ -900,11 +849,9 @@ static void __init quirk_ide_samemode(struct pci_dev *pdev)
900 prog &= ~5; 849 prog &= ~5;
901 pdev->class &= ~5; 850 pdev->class &= ~5;
902 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog); 851 pci_write_config_byte(pdev, PCI_CLASS_PROG, prog);
903 /* need to re-assign BARs for compat mode */
904 quirk_ide_bases(pdev);
905 } 852 }
906} 853}
907DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode); 854DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_INTEL, PCI_DEVICE_ID_INTEL_82801CA_10, quirk_ide_samemode);
908 855
909/* This was originally an Alpha specific thing, but it really fits here. 856/* This was originally an Alpha specific thing, but it really fits here.
910 * The i82375 PCI/EISA bridge appears as non-classified. Fix that. 857 * The i82375 PCI/EISA bridge appears as non-classified. Fix that.
diff --git a/drivers/pci/rom.c b/drivers/pci/rom.c
index e1dcefc69bb4..d087e0817715 100644
--- a/drivers/pci/rom.c
+++ b/drivers/pci/rom.c
@@ -81,7 +81,8 @@ void __iomem *pci_map_rom(struct pci_dev *pdev, size_t *size)
81 start = (loff_t)0xC0000; 81 start = (loff_t)0xC0000;
82 *size = 0x20000; /* cover C000:0 through E000:0 */ 82 *size = 0x20000; /* cover C000:0 through E000:0 */
83 } else { 83 } else {
84 if (res->flags & IORESOURCE_ROM_COPY) { 84 if (res->flags &
85 (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY)) {
85 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE); 86 *size = pci_resource_len(pdev, PCI_ROM_RESOURCE);
86 return (void __iomem *)(unsigned long) 87 return (void __iomem *)(unsigned long)
87 pci_resource_start(pdev, PCI_ROM_RESOURCE); 88 pci_resource_start(pdev, PCI_ROM_RESOURCE);
@@ -165,7 +166,8 @@ void __iomem *pci_map_rom_copy(struct pci_dev *pdev, size_t *size)
165 if (!rom) 166 if (!rom)
166 return NULL; 167 return NULL;
167 168
168 if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW)) 169 if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_SHADOW |
170 IORESOURCE_ROM_BIOS_COPY))
169 return rom; 171 return rom;
170 172
171 res->start = (unsigned long)kmalloc(*size, GFP_KERNEL); 173 res->start = (unsigned long)kmalloc(*size, GFP_KERNEL);
@@ -191,7 +193,7 @@ void pci_unmap_rom(struct pci_dev *pdev, void __iomem *rom)
191{ 193{
192 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE]; 194 struct resource *res = &pdev->resource[PCI_ROM_RESOURCE];
193 195
194 if (res->flags & IORESOURCE_ROM_COPY) 196 if (res->flags & (IORESOURCE_ROM_COPY | IORESOURCE_ROM_BIOS_COPY))
195 return; 197 return;
196 198
197 iounmap(rom); 199 iounmap(rom);
@@ -215,6 +217,7 @@ void pci_remove_rom(struct pci_dev *pdev)
215 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr); 217 sysfs_remove_bin_file(&pdev->dev.kobj, pdev->rom_attr);
216 if (!(res->flags & (IORESOURCE_ROM_ENABLE | 218 if (!(res->flags & (IORESOURCE_ROM_ENABLE |
217 IORESOURCE_ROM_SHADOW | 219 IORESOURCE_ROM_SHADOW |
220 IORESOURCE_ROM_BIOS_COPY |
218 IORESOURCE_ROM_COPY))) 221 IORESOURCE_ROM_COPY)))
219 pci_disable_rom(pdev); 222 pci_disable_rom(pdev);
220} 223}
diff --git a/include/asm-ia64/io.h b/include/asm-ia64/io.h
index 855c30af72a9..6311e168cd34 100644
--- a/include/asm-ia64/io.h
+++ b/include/asm-ia64/io.h
@@ -32,7 +32,7 @@
32 */ 32 */
33#define IO_SPACE_LIMIT 0xffffffffffffffffUL 33#define IO_SPACE_LIMIT 0xffffffffffffffffUL
34 34
35#define MAX_IO_SPACES_BITS 4 35#define MAX_IO_SPACES_BITS 8
36#define MAX_IO_SPACES (1UL << MAX_IO_SPACES_BITS) 36#define MAX_IO_SPACES (1UL << MAX_IO_SPACES_BITS)
37#define IO_SPACE_BITS 24 37#define IO_SPACE_BITS 24
38#define IO_SPACE_SIZE (1UL << IO_SPACE_BITS) 38#define IO_SPACE_SIZE (1UL << IO_SPACE_BITS)
diff --git a/include/asm-ia64/machvec.h b/include/asm-ia64/machvec.h
index 7ffbddf5306f..8f784f8e45b0 100644
--- a/include/asm-ia64/machvec.h
+++ b/include/asm-ia64/machvec.h
@@ -36,6 +36,7 @@ typedef int ia64_mv_pci_legacy_read_t (struct pci_bus *, u16 port, u32 *val,
36typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val, 36typedef int ia64_mv_pci_legacy_write_t (struct pci_bus *, u16 port, u32 val,
37 u8 size); 37 u8 size);
38typedef void ia64_mv_migrate_t(struct task_struct * task); 38typedef void ia64_mv_migrate_t(struct task_struct * task);
39typedef void ia64_mv_pci_fixup_bus_t (struct pci_bus *);
39 40
40/* DMA-mapping interface: */ 41/* DMA-mapping interface: */
41typedef void ia64_mv_dma_init (void); 42typedef void ia64_mv_dma_init (void);
@@ -95,6 +96,11 @@ machvec_noop_task (struct task_struct *task)
95{ 96{
96} 97}
97 98
99static inline void
100machvec_noop_bus (struct pci_bus *bus)
101{
102}
103
98extern void machvec_setup (char **); 104extern void machvec_setup (char **);
99extern void machvec_timer_interrupt (int, void *); 105extern void machvec_timer_interrupt (int, void *);
100extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int); 106extern void machvec_dma_sync_single (struct device *, dma_addr_t, size_t, int);
@@ -159,6 +165,7 @@ extern void machvec_tlb_migrate_finish (struct mm_struct *);
159# define platform_migrate ia64_mv.migrate 165# define platform_migrate ia64_mv.migrate
160# define platform_setup_msi_irq ia64_mv.setup_msi_irq 166# define platform_setup_msi_irq ia64_mv.setup_msi_irq
161# define platform_teardown_msi_irq ia64_mv.teardown_msi_irq 167# define platform_teardown_msi_irq ia64_mv.teardown_msi_irq
168# define platform_pci_fixup_bus ia64_mv.pci_fixup_bus
162# endif 169# endif
163 170
164/* __attribute__((__aligned__(16))) is required to make size of the 171/* __attribute__((__aligned__(16))) is required to make size of the
@@ -210,6 +217,7 @@ struct ia64_machine_vector {
210 ia64_mv_migrate_t *migrate; 217 ia64_mv_migrate_t *migrate;
211 ia64_mv_setup_msi_irq_t *setup_msi_irq; 218 ia64_mv_setup_msi_irq_t *setup_msi_irq;
212 ia64_mv_teardown_msi_irq_t *teardown_msi_irq; 219 ia64_mv_teardown_msi_irq_t *teardown_msi_irq;
220 ia64_mv_pci_fixup_bus_t *pci_fixup_bus;
213} __attribute__((__aligned__(16))); /* align attrib? see above comment */ 221} __attribute__((__aligned__(16))); /* align attrib? see above comment */
214 222
215#define MACHVEC_INIT(name) \ 223#define MACHVEC_INIT(name) \
@@ -257,6 +265,7 @@ struct ia64_machine_vector {
257 platform_migrate, \ 265 platform_migrate, \
258 platform_setup_msi_irq, \ 266 platform_setup_msi_irq, \
259 platform_teardown_msi_irq, \ 267 platform_teardown_msi_irq, \
268 platform_pci_fixup_bus, \
260} 269}
261 270
262extern struct ia64_machine_vector ia64_mv; 271extern struct ia64_machine_vector ia64_mv;
@@ -416,5 +425,8 @@ extern int ia64_pci_legacy_write(struct pci_bus *bus, u16 port, u32 val, u8 size
416#ifndef platform_teardown_msi_irq 425#ifndef platform_teardown_msi_irq
417# define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL) 426# define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL)
418#endif 427#endif
428#ifndef platform_pci_fixup_bus
429# define platform_pci_fixup_bus machvec_noop_bus
430#endif
419 431
420#endif /* _ASM_IA64_MACHVEC_H */ 432#endif /* _ASM_IA64_MACHVEC_H */
diff --git a/include/asm-ia64/machvec_sn2.h b/include/asm-ia64/machvec_sn2.h
index c54b165b1c17..83325f6db03e 100644
--- a/include/asm-ia64/machvec_sn2.h
+++ b/include/asm-ia64/machvec_sn2.h
@@ -69,6 +69,7 @@ extern ia64_mv_dma_supported sn_dma_supported;
69extern ia64_mv_migrate_t sn_migrate; 69extern ia64_mv_migrate_t sn_migrate;
70extern ia64_mv_setup_msi_irq_t sn_setup_msi_irq; 70extern ia64_mv_setup_msi_irq_t sn_setup_msi_irq;
71extern ia64_mv_teardown_msi_irq_t sn_teardown_msi_irq; 71extern ia64_mv_teardown_msi_irq_t sn_teardown_msi_irq;
72extern ia64_mv_pci_fixup_bus_t sn_pci_fixup_bus;
72 73
73 74
74/* 75/*
@@ -127,6 +128,7 @@ extern ia64_mv_teardown_msi_irq_t sn_teardown_msi_irq;
127#define platform_setup_msi_irq ((ia64_mv_setup_msi_irq_t*)NULL) 128#define platform_setup_msi_irq ((ia64_mv_setup_msi_irq_t*)NULL)
128#define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL) 129#define platform_teardown_msi_irq ((ia64_mv_teardown_msi_irq_t*)NULL)
129#endif 130#endif
131#define platform_pci_fixup_bus sn_pci_fixup_bus
130 132
131#include <asm/sn/io.h> 133#include <asm/sn/io.h>
132 134
diff --git a/include/asm-ia64/pci.h b/include/asm-ia64/pci.h
index ef616fd4cb1b..825eb7d882e6 100644
--- a/include/asm-ia64/pci.h
+++ b/include/asm-ia64/pci.h
@@ -26,16 +26,18 @@ void pcibios_config_init(void);
26struct pci_dev; 26struct pci_dev;
27 27
28/* 28/*
29 * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct correspondence 29 * PCI_DMA_BUS_IS_PHYS should be set to 1 if there is _necessarily_ a direct
30 * between device bus addresses and CPU physical addresses. Platforms with a hardware I/O 30 * correspondence between device bus addresses and CPU physical addresses.
31 * MMU _must_ turn this off to suppress the bounce buffer handling code in the block and 31 * Platforms with a hardware I/O MMU _must_ turn this off to suppress the
32 * network device layers. Platforms with separate bus address spaces _must_ turn this off 32 * bounce buffer handling code in the block and network device layers.
33 * and provide a device DMA mapping implementation that takes care of the necessary 33 * Platforms with separate bus address spaces _must_ turn this off and provide
34 * a device DMA mapping implementation that takes care of the necessary
34 * address translation. 35 * address translation.
35 * 36 *
36 * For now, the ia64 platforms which may have separate/multiple bus address spaces all 37 * For now, the ia64 platforms which may have separate/multiple bus address
37 * have I/O MMUs which support the merging of physically discontiguous buffers, so we can 38 * spaces all have I/O MMUs which support the merging of physically
38 * use that as the sole factor to determine the setting of PCI_DMA_BUS_IS_PHYS. 39 * discontiguous buffers, so we can use that as the sole factor to determine
40 * the setting of PCI_DMA_BUS_IS_PHYS.
39 */ 41 */
40extern unsigned long ia64_max_iommu_merge_mask; 42extern unsigned long ia64_max_iommu_merge_mask;
41#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL) 43#define PCI_DMA_BUS_IS_PHYS (ia64_max_iommu_merge_mask == ~0UL)
@@ -52,9 +54,6 @@ pcibios_penalize_isa_irq (int irq, int active)
52 /* We don't do dynamic PCI IRQ allocation */ 54 /* We don't do dynamic PCI IRQ allocation */
53} 55}
54 56
55#define HAVE_ARCH_PCI_MWI 1
56extern int pcibios_prep_mwi (struct pci_dev *);
57
58#include <asm-generic/pci-dma-compat.h> 57#include <asm-generic/pci-dma-compat.h>
59 58
60/* pci_unmap_{single,page} is not a nop, thus... */ 59/* pci_unmap_{single,page} is not a nop, thus... */
diff --git a/include/asm-ia64/sn/acpi.h b/include/asm-ia64/sn/acpi.h
new file mode 100644
index 000000000000..2850a7ef5e71
--- /dev/null
+++ b/include/asm-ia64/sn/acpi.h
@@ -0,0 +1,16 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 2006 Silicon Graphics, Inc. All rights reserved.
7 */
8
9#ifndef _ASM_IA64_SN_ACPI_H
10#define _ASM_IA64_SN_ACPI_H
11
12#include "acpi/acglobal.h"
13
14#define SN_ACPI_BASE_SUPPORT() (acpi_gbl_DSDT->oem_revision >= 0x20101)
15
16#endif /* _ASM_IA64_SN_ACPI_H */
diff --git a/include/asm-ia64/sn/pcidev.h b/include/asm-ia64/sn/pcidev.h
index eac3561574be..9fe89a93d880 100644
--- a/include/asm-ia64/sn/pcidev.h
+++ b/include/asm-ia64/sn/pcidev.h
@@ -3,7 +3,7 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 1992 - 1997, 2000-2005 Silicon Graphics, Inc. All rights reserved. 6 * Copyright (C) 1992 - 1997, 2000-2006 Silicon Graphics, Inc. All rights reserved.
7 */ 7 */
8#ifndef _ASM_IA64_SN_PCI_PCIDEV_H 8#ifndef _ASM_IA64_SN_PCI_PCIDEV_H
9#define _ASM_IA64_SN_PCI_PCIDEV_H 9#define _ASM_IA64_SN_PCI_PCIDEV_H
@@ -12,31 +12,29 @@
12 12
13/* 13/*
14 * In ia64, pci_dev->sysdata must be a *pci_controller. To provide access to 14 * In ia64, pci_dev->sysdata must be a *pci_controller. To provide access to
15 * the pcidev_info structs for all devices under a controller, we extend the 15 * the pcidev_info structs for all devices under a controller, we keep a
16 * definition of pci_controller, via sn_pci_controller, to include a list 16 * list of pcidev_info under pci_controller->platform_data.
17 * of pcidev_info.
18 */ 17 */
19struct sn_pci_controller { 18struct sn_platform_data {
20 struct pci_controller pci_controller; 19 void *provider_soft;
21 struct list_head pcidev_info; 20 struct list_head pcidev_info;
22}; 21};
23 22
24#define SN_PCI_CONTROLLER(dev) ((struct sn_pci_controller *) dev->sysdata) 23#define SN_PLATFORM_DATA(busdev) \
24 ((struct sn_platform_data *)(PCI_CONTROLLER(busdev)->platform_data))
25 25
26#define SN_PCIDEV_INFO(dev) sn_pcidev_info_get(dev) 26#define SN_PCIDEV_INFO(dev) sn_pcidev_info_get(dev)
27 27
28#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \
29 (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data))
30/* 28/*
31 * Given a pci_bus, return the sn pcibus_bussoft struct. Note that 29 * Given a pci_bus, return the sn pcibus_bussoft struct. Note that
32 * this only works for root busses, not for busses represented by PPB's. 30 * this only works for root busses, not for busses represented by PPB's.
33 */ 31 */
34 32
35#define SN_PCIBUS_BUSSOFT(pci_bus) \ 33#define SN_PCIBUS_BUSSOFT(pci_bus) \
36 ((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data)) 34 ((struct pcibus_bussoft *)(SN_PLATFORM_DATA(pci_bus)->provider_soft))
37 35
38#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \ 36#define SN_PCIBUS_BUSSOFT_INFO(pci_bus) \
39 (struct pcibus_info *)((struct pcibus_bussoft *)(PCI_CONTROLLER((pci_bus))->platform_data)) 37 ((struct pcibus_info *)(SN_PLATFORM_DATA(pci_bus)->provider_soft))
40/* 38/*
41 * Given a struct pci_dev, return the sn pcibus_bussoft struct. Note 39 * Given a struct pci_dev, return the sn pcibus_bussoft struct. Note
42 * that this is not equivalent to SN_PCIBUS_BUSSOFT(pci_dev->bus) due 40 * that this is not equivalent to SN_PCIBUS_BUSSOFT(pci_dev->bus) due
@@ -72,8 +70,6 @@ extern void sn_irq_fixup(struct pci_dev *pci_dev,
72 struct sn_irq_info *sn_irq_info); 70 struct sn_irq_info *sn_irq_info);
73extern void sn_irq_unfixup(struct pci_dev *pci_dev); 71extern void sn_irq_unfixup(struct pci_dev *pci_dev);
74extern struct pcidev_info * sn_pcidev_info_get(struct pci_dev *); 72extern struct pcidev_info * sn_pcidev_info_get(struct pci_dev *);
75extern void sn_pci_controller_fixup(int segment, int busnum,
76 struct pci_bus *bus);
77extern void sn_bus_store_sysdata(struct pci_dev *dev); 73extern void sn_bus_store_sysdata(struct pci_dev *dev);
78extern void sn_bus_free_sysdata(void); 74extern void sn_bus_free_sysdata(void);
79extern void sn_generate_path(struct pci_bus *pci_bus, char *address); 75extern void sn_generate_path(struct pci_bus *pci_bus, char *address);
diff --git a/include/asm-ia64/sn/sn_feature_sets.h b/include/asm-ia64/sn/sn_feature_sets.h
index 30dcfa442e53..bfdc36273ed4 100644
--- a/include/asm-ia64/sn/sn_feature_sets.h
+++ b/include/asm-ia64/sn/sn_feature_sets.h
@@ -44,8 +44,14 @@ extern int sn_prom_feature_available(int id);
44 * Once enabled, a feature cannot be disabled. 44 * Once enabled, a feature cannot be disabled.
45 * 45 *
46 * By default, features are disabled unless explicitly enabled. 46 * By default, features are disabled unless explicitly enabled.
47 *
48 * These defines must be kept in sync with the corresponding
49 * PROM definitions in feature_sets.h.
47 */ 50 */
48#define OSF_MCA_SLV_TO_OS_INIT_SLV 0 51#define OSF_MCA_SLV_TO_OS_INIT_SLV 0
49#define OSF_FEAT_LOG_SBES 1 52#define OSF_FEAT_LOG_SBES 1
53#define OSF_ACPI_ENABLE 2
54#define OSF_PCISEGMENT_ENABLE 3
55
50 56
51#endif /* _ASM_IA64_SN_FEATURE_SETS_H */ 57#endif /* _ASM_IA64_SN_FEATURE_SETS_H */
diff --git a/include/asm-ia64/sn/sn_sal.h b/include/asm-ia64/sn/sn_sal.h
index ba826b3f75bb..be5d83ad7cb1 100644
--- a/include/asm-ia64/sn/sn_sal.h
+++ b/include/asm-ia64/sn/sn_sal.h
@@ -77,6 +77,7 @@
77#define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated 77#define SN_SAL_IOIF_GET_WIDGET_DMAFLUSH_LIST 0x02000058 // deprecated
78#define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a 78#define SN_SAL_IOIF_GET_DEVICE_DMAFLUSH_LIST 0x0200005a
79 79
80#define SN_SAL_IOIF_INIT 0x0200005f
80#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060 81#define SN_SAL_HUB_ERROR_INTERRUPT 0x02000060
81#define SN_SAL_BTE_RECOVER 0x02000061 82#define SN_SAL_BTE_RECOVER 0x02000061
82#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062 83#define SN_SAL_RESERVED_DO_NOT_USE 0x02000062
diff --git a/include/asm-powerpc/pci.h b/include/asm-powerpc/pci.h
index 46afd29b904e..721c97f09b20 100644
--- a/include/asm-powerpc/pci.h
+++ b/include/asm-powerpc/pci.h
@@ -62,19 +62,13 @@ static inline int pci_get_legacy_ide_irq(struct pci_dev *dev, int channel)
62} 62}
63 63
64#ifdef CONFIG_PPC64 64#ifdef CONFIG_PPC64
65#define HAVE_ARCH_PCI_MWI 1 65
66static inline int pcibios_prep_mwi(struct pci_dev *dev) 66/*
67{ 67 * We want to avoid touching the cacheline size or MWI bit.
68 /* 68 * pSeries firmware sets the cacheline size (which is not the cpu cacheline
69 * We would like to avoid touching the cacheline size or MWI bit 69 * size in all cases) and hardware treats MWI the same as memory write.
70 * but we cant do that with the current pcibios_prep_mwi 70 */
71 * interface. pSeries firmware sets the cacheline size (which is not 71#define PCI_DISABLE_MWI
72 * the cpu cacheline size in all cases) and hardware treats MWI
73 * the same as memory write. So we dont touch the cacheline size
74 * here and allow the generic code to set the MWI bit.
75 */
76 return 0;
77}
78 72
79extern struct dma_mapping_ops pci_dma_ops; 73extern struct dma_mapping_ops pci_dma_ops;
80 74
diff --git a/include/asm-sparc64/pci.h b/include/asm-sparc64/pci.h
index e1ea67bc32f2..ca6560288ae8 100644
--- a/include/asm-sparc64/pci.h
+++ b/include/asm-sparc64/pci.h
@@ -18,6 +18,8 @@
18 18
19#define PCI_IRQ_NONE 0xffffffff 19#define PCI_IRQ_NONE 0xffffffff
20 20
21#define PCI_CACHE_LINE_BYTES 64
22
21static inline void pcibios_set_master(struct pci_dev *dev) 23static inline void pcibios_set_master(struct pci_dev *dev)
22{ 24{
23 /* No special bus mastering setup handling */ 25 /* No special bus mastering setup handling */
@@ -291,10 +293,6 @@ extern int pci_mmap_page_range(struct pci_dev *dev, struct vm_area_struct *vma,
291 enum pci_mmap_state mmap_state, 293 enum pci_mmap_state mmap_state,
292 int write_combine); 294 int write_combine);
293 295
294/* Platform specific MWI support. */
295#define HAVE_ARCH_PCI_MWI
296extern int pcibios_prep_mwi(struct pci_dev *dev);
297
298extern void 296extern void
299pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region, 297pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region,
300 struct resource *res); 298 struct resource *res);
diff --git a/include/linux/ioport.h b/include/linux/ioport.h
index d42c83399071..cf8696d4a138 100644
--- a/include/linux/ioport.h
+++ b/include/linux/ioport.h
@@ -89,6 +89,7 @@ struct resource_list {
89#define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */ 89#define IORESOURCE_ROM_ENABLE (1<<0) /* ROM is enabled, same as PCI_ROM_ADDRESS_ENABLE */
90#define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */ 90#define IORESOURCE_ROM_SHADOW (1<<1) /* ROM is copy at C000:0 */
91#define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */ 91#define IORESOURCE_ROM_COPY (1<<2) /* ROM is alloc'd copy, resource field overlaid */
92#define IORESOURCE_ROM_BIOS_COPY (1<<3) /* ROM is BIOS copy, resource field overlaid */
92 93
93/* PC/ISA/whatever - the normal PC address spaces: IO and memory */ 94/* PC/ISA/whatever - the normal PC address spaces: IO and memory */
94extern struct resource ioport_resource; 95extern struct resource ioport_resource;
diff --git a/include/linux/pci.h b/include/linux/pci.h
index 09be0f81b27b..01c707261f9c 100644
--- a/include/linux/pci.h
+++ b/include/linux/pci.h
@@ -51,6 +51,7 @@
51#include <linux/list.h> 51#include <linux/list.h>
52#include <linux/compiler.h> 52#include <linux/compiler.h>
53#include <linux/errno.h> 53#include <linux/errno.h>
54#include <asm/atomic.h>
54#include <linux/device.h> 55#include <linux/device.h>
55 56
56/* File state for mmap()s on /proc/bus/pci/X/Y */ 57/* File state for mmap()s on /proc/bus/pci/X/Y */
@@ -159,7 +160,6 @@ struct pci_dev {
159 unsigned int transparent:1; /* Transparent PCI bridge */ 160 unsigned int transparent:1; /* Transparent PCI bridge */
160 unsigned int multifunction:1;/* Part of multi-function device */ 161 unsigned int multifunction:1;/* Part of multi-function device */
161 /* keep track of device state */ 162 /* keep track of device state */
162 unsigned int is_enabled:1; /* pci_enable_device has been called */
163 unsigned int is_busmaster:1; /* device is busmaster */ 163 unsigned int is_busmaster:1; /* device is busmaster */
164 unsigned int no_msi:1; /* device may not use msi */ 164 unsigned int no_msi:1; /* device may not use msi */
165 unsigned int no_d1d2:1; /* only allow d0 or d3 */ 165 unsigned int no_d1d2:1; /* only allow d0 or d3 */
@@ -167,6 +167,7 @@ struct pci_dev {
167 unsigned int broken_parity_status:1; /* Device generates false positive parity */ 167 unsigned int broken_parity_status:1; /* Device generates false positive parity */
168 unsigned int msi_enabled:1; 168 unsigned int msi_enabled:1;
169 unsigned int msix_enabled:1; 169 unsigned int msix_enabled:1;
170 atomic_t enable_cnt; /* pci_enable_device has been called */
170 171
171 u32 saved_config_space[16]; /* config space saved at suspend time */ 172 u32 saved_config_space[16]; /* config space saved at suspend time */
172 struct hlist_head saved_cap_space; 173 struct hlist_head saved_cap_space;
diff --git a/include/linux/pci_ids.h b/include/linux/pci_ids.h
index fa4e1d799782..e060a7637947 100644
--- a/include/linux/pci_ids.h
+++ b/include/linux/pci_ids.h
@@ -2211,6 +2211,13 @@
2211#define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815 2211#define PCI_DEVICE_ID_INTEL_ICH8_4 0x2815
2212#define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e 2212#define PCI_DEVICE_ID_INTEL_ICH8_5 0x283e
2213#define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850 2213#define PCI_DEVICE_ID_INTEL_ICH8_6 0x2850
2214#define PCI_DEVICE_ID_INTEL_ICH9_0 0x2910
2215#define PCI_DEVICE_ID_INTEL_ICH9_1 0x2911
2216#define PCI_DEVICE_ID_INTEL_ICH9_2 0x2912
2217#define PCI_DEVICE_ID_INTEL_ICH9_3 0x2913
2218#define PCI_DEVICE_ID_INTEL_ICH9_4 0x2914
2219#define PCI_DEVICE_ID_INTEL_ICH9_5 0x2915
2220#define PCI_DEVICE_ID_INTEL_ICH9_6 0x2930
2214#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340 2221#define PCI_DEVICE_ID_INTEL_82855PM_HB 0x3340
2215#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575 2222#define PCI_DEVICE_ID_INTEL_82830_HB 0x3575
2216#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577 2223#define PCI_DEVICE_ID_INTEL_82830_CGC 0x3577
diff --git a/include/linux/pci_regs.h b/include/linux/pci_regs.h
index c321316f1bc7..064b1dc71c22 100644
--- a/include/linux/pci_regs.h
+++ b/include/linux/pci_regs.h
@@ -292,6 +292,12 @@
292#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */ 292#define PCI_MSI_DATA_64 12 /* 16 bits of data for 64-bit devices */
293#define PCI_MSI_MASK_BIT 16 /* Mask bits register */ 293#define PCI_MSI_MASK_BIT 16 /* Mask bits register */
294 294
295/* MSI-X registers (these are at offset PCI_MSI_FLAGS) */
296#define PCI_MSIX_FLAGS_QSIZE 0x7FF
297#define PCI_MSIX_FLAGS_ENABLE (1 << 15)
298#define PCI_MSIX_FLAGS_BIRMASK (7 << 0)
299#define PCI_MSIX_FLAGS_BITMASK (1 << 0)
300
295/* CompactPCI Hotswap Register */ 301/* CompactPCI Hotswap Register */
296 302
297#define PCI_CHSWP_CSR 2 /* Control and Status Register */ 303#define PCI_CHSWP_CSR 2 /* Control and Status Register */
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-24 04:43:02 -0500