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-rw-r--r--arch/x86/kernel/tce_64.c4
-rw-r--r--arch/x86/mm/pageattr_32.c4
-rw-r--r--arch/x86/mm/pageattr_64.c2
-rw-r--r--drivers/char/agp/efficeon-agp.c11
-rw-r--r--include/asm-x86/system_32.h4
-rw-r--r--include/asm-x86/system_64.h5
6 files changed, 20 insertions, 10 deletions
diff --git a/arch/x86/kernel/tce_64.c b/arch/x86/kernel/tce_64.c
index e3f2569b2c44..9e540fee7009 100644
--- a/arch/x86/kernel/tce_64.c
+++ b/arch/x86/kernel/tce_64.c
@@ -40,9 +40,9 @@ static inline void flush_tce(void* tceaddr)
40{ 40{
41 /* a single tce can't cross a cache line */ 41 /* a single tce can't cross a cache line */
42 if (cpu_has_clflush) 42 if (cpu_has_clflush)
43 asm volatile("clflush (%0)" :: "r" (tceaddr)); 43 clflush(tceaddr);
44 else 44 else
45 asm volatile("wbinvd":::"memory"); 45 wbinvd();
46} 46}
47 47
48void tce_build(struct iommu_table *tbl, unsigned long index, 48void tce_build(struct iommu_table *tbl, unsigned long index,
diff --git a/arch/x86/mm/pageattr_32.c b/arch/x86/mm/pageattr_32.c
index 4241a74d16c8..260073c07600 100644
--- a/arch/x86/mm/pageattr_32.c
+++ b/arch/x86/mm/pageattr_32.c
@@ -70,10 +70,10 @@ static struct page *split_large_page(unsigned long address, pgprot_t prot,
70 70
71static void cache_flush_page(struct page *p) 71static void cache_flush_page(struct page *p)
72{ 72{
73 unsigned long adr = (unsigned long)page_address(p); 73 void *adr = page_address(p);
74 int i; 74 int i;
75 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) 75 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
76 asm volatile("clflush (%0)" :: "r" (adr + i)); 76 clflush(adr+i);
77} 77}
78 78
79static void flush_kernel_map(void *arg) 79static void flush_kernel_map(void *arg)
diff --git a/arch/x86/mm/pageattr_64.c b/arch/x86/mm/pageattr_64.c
index 93d795d7c2ae..8a4f65bf956e 100644
--- a/arch/x86/mm/pageattr_64.c
+++ b/arch/x86/mm/pageattr_64.c
@@ -65,7 +65,7 @@ static void cache_flush_page(void *adr)
65{ 65{
66 int i; 66 int i;
67 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size) 67 for (i = 0; i < PAGE_SIZE; i += boot_cpu_data.x86_clflush_size)
68 asm volatile("clflush (%0)" :: "r" (adr + i)); 68 clflush(adr+i);
69} 69}
70 70
71static void flush_kernel_map(void *arg) 71static void flush_kernel_map(void *arg)
diff --git a/drivers/char/agp/efficeon-agp.c b/drivers/char/agp/efficeon-agp.c
index d78cd09186aa..cac0009cebc1 100644
--- a/drivers/char/agp/efficeon-agp.c
+++ b/drivers/char/agp/efficeon-agp.c
@@ -221,7 +221,7 @@ static int efficeon_create_gatt_table(struct agp_bridge_data *bridge)
221 SetPageReserved(virt_to_page((char *)page)); 221 SetPageReserved(virt_to_page((char *)page));
222 222
223 for (offset = 0; offset < PAGE_SIZE; offset += clflush_chunk) 223 for (offset = 0; offset < PAGE_SIZE; offset += clflush_chunk)
224 asm volatile("clflush %0" : : "m" (*(char *)(page+offset))); 224 clflush((char *)page+offset);
225 225
226 efficeon_private.l1_table[index] = page; 226 efficeon_private.l1_table[index] = page;
227 227
@@ -268,15 +268,16 @@ static int efficeon_insert_memory(struct agp_memory * mem, off_t pg_start, int t
268 *page = insert; 268 *page = insert;
269 269
270 /* clflush is slow, so don't clflush until we have to */ 270 /* clflush is slow, so don't clflush until we have to */
271 if ( last_page && 271 if (last_page &&
272 ((unsigned long)page^(unsigned long)last_page) & clflush_mask ) 272 (((unsigned long)page^(unsigned long)last_page) &
273 asm volatile("clflush %0" : : "m" (*last_page)); 273 clflush_mask))
274 clflush(last_page);
274 275
275 last_page = page; 276 last_page = page;
276 } 277 }
277 278
278 if ( last_page ) 279 if ( last_page )
279 asm volatile("clflush %0" : : "m" (*last_page)); 280 clflush(last_page);
280 281
281 agp_bridge->driver->tlb_flush(mem); 282 agp_bridge->driver->tlb_flush(mem);
282 return 0; 283 return 0;
diff --git a/include/asm-x86/system_32.h b/include/asm-x86/system_32.h
index 1d6fb3afa533..db6283eb5e46 100644
--- a/include/asm-x86/system_32.h
+++ b/include/asm-x86/system_32.h
@@ -161,6 +161,10 @@ static inline void native_wbinvd(void)
161 asm volatile("wbinvd": : :"memory"); 161 asm volatile("wbinvd": : :"memory");
162} 162}
163 163
164static inline void clflush(volatile void *__p)
165{
166 asm volatile("clflush %0" : "+m" (*(char __force *)__p));
167}
164 168
165#ifdef CONFIG_PARAVIRT 169#ifdef CONFIG_PARAVIRT
166#include <asm/paravirt.h> 170#include <asm/paravirt.h>
diff --git a/include/asm-x86/system_64.h b/include/asm-x86/system_64.h
index fb4bcf99e665..ec4c29bcfcb0 100644
--- a/include/asm-x86/system_64.h
+++ b/include/asm-x86/system_64.h
@@ -137,6 +137,11 @@ static inline void write_cr8(unsigned long val)
137 137
138#endif /* __KERNEL__ */ 138#endif /* __KERNEL__ */
139 139
140static inline void clflush(volatile void *__p)
141{
142 asm volatile("clflush %0" : "+m" (*(char __force *)__p));
143}
144
140#define nop() __asm__ __volatile__ ("nop") 145#define nop() __asm__ __volatile__ ("nop")
141 146
142#ifdef CONFIG_SMP 147#ifdef CONFIG_SMP