diff options
-rw-r--r-- | arch/arm/plat-iop/Makefile | 2 | ||||
-rw-r--r-- | arch/arm/plat-iop/time.c | 94 | ||||
-rw-r--r-- | include/asm-arm/arch-iop32x/iop321.h | 6 | ||||
-rw-r--r-- | include/asm-arm/arch-iop33x/iop331.h | 6 | ||||
-rw-r--r-- | include/asm-arm/hardware/iop3xx.h | 20 |
5 files changed, 127 insertions, 1 deletions
diff --git a/arch/arm/plat-iop/Makefile b/arch/arm/plat-iop/Makefile index efde7a513fb7..d20cdec3a944 100644 --- a/arch/arm/plat-iop/Makefile +++ b/arch/arm/plat-iop/Makefile | |||
@@ -2,7 +2,7 @@ | |||
2 | # Makefile for the linux kernel. | 2 | # Makefile for the linux kernel. |
3 | # | 3 | # |
4 | 4 | ||
5 | obj-y := i2c.o pci.o setup.o | 5 | obj-y := i2c.o pci.o setup.o time.o |
6 | obj-m := | 6 | obj-m := |
7 | obj-n := | 7 | obj-n := |
8 | obj- := | 8 | obj- := |
diff --git a/arch/arm/plat-iop/time.c b/arch/arm/plat-iop/time.c new file mode 100644 index 000000000000..5730a0d7ed67 --- /dev/null +++ b/arch/arm/plat-iop/time.c | |||
@@ -0,0 +1,94 @@ | |||
1 | /* | ||
2 | * arch/arm/plat-iop/time.c | ||
3 | * | ||
4 | * Timer code for IOP32x and IOP33x based systems | ||
5 | * | ||
6 | * Author: Deepak Saxena <dsaxena@mvista.com> | ||
7 | * | ||
8 | * Copyright 2002-2003 MontaVista Software Inc. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/interrupt.h> | ||
18 | #include <linux/time.h> | ||
19 | #include <linux/init.h> | ||
20 | #include <linux/timex.h> | ||
21 | #include <asm/hardware.h> | ||
22 | #include <asm/io.h> | ||
23 | #include <asm/irq.h> | ||
24 | #include <asm/uaccess.h> | ||
25 | #include <asm/mach/irq.h> | ||
26 | #include <asm/mach/time.h> | ||
27 | |||
28 | #ifdef CONFIG_ARCH_IOP32X | ||
29 | #define IRQ_IOP3XX_TIMER0 IRQ_IOP321_TIMER0 | ||
30 | #else | ||
31 | #ifdef CONFIG_ARCH_IOP33X | ||
32 | #define IRQ_IOP3XX_TIMER0 IRQ_IOP331_TIMER0 | ||
33 | #endif | ||
34 | #endif | ||
35 | |||
36 | static unsigned long ticks_per_jiffy; | ||
37 | static unsigned long ticks_per_usec; | ||
38 | static unsigned long next_jiffy_time; | ||
39 | |||
40 | unsigned long iop3xx_gettimeoffset(void) | ||
41 | { | ||
42 | unsigned long offset; | ||
43 | |||
44 | offset = next_jiffy_time - *IOP3XX_TU_TCR1; | ||
45 | |||
46 | return offset / ticks_per_usec; | ||
47 | } | ||
48 | |||
49 | static irqreturn_t | ||
50 | iop3xx_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs) | ||
51 | { | ||
52 | write_seqlock(&xtime_lock); | ||
53 | |||
54 | asm volatile("mcr p6, 0, %0, c6, c1, 0" : : "r" (1)); | ||
55 | |||
56 | while ((signed long)(next_jiffy_time - *IOP3XX_TU_TCR1) | ||
57 | >= ticks_per_jiffy) { | ||
58 | timer_tick(regs); | ||
59 | next_jiffy_time -= ticks_per_jiffy; | ||
60 | } | ||
61 | |||
62 | write_sequnlock(&xtime_lock); | ||
63 | |||
64 | return IRQ_HANDLED; | ||
65 | } | ||
66 | |||
67 | static struct irqaction iop3xx_timer_irq = { | ||
68 | .name = "IOP3XX Timer Tick", | ||
69 | .handler = iop3xx_timer_interrupt, | ||
70 | .flags = IRQF_DISABLED | IRQF_TIMER, | ||
71 | }; | ||
72 | |||
73 | void __init iop3xx_init_time(unsigned long tick_rate) | ||
74 | { | ||
75 | u32 timer_ctl; | ||
76 | |||
77 | ticks_per_jiffy = (tick_rate + HZ/2) / HZ; | ||
78 | ticks_per_usec = tick_rate / 1000000; | ||
79 | next_jiffy_time = 0xffffffff; | ||
80 | |||
81 | timer_ctl = IOP3XX_TMR_EN | IOP3XX_TMR_PRIVILEGED | | ||
82 | IOP3XX_TMR_RELOAD | IOP3XX_TMR_RATIO_1_1; | ||
83 | |||
84 | /* | ||
85 | * We use timer 0 for our timer interrupt, and timer 1 as | ||
86 | * monotonic counter for tracking missed jiffies. | ||
87 | */ | ||
88 | asm volatile("mcr p6, 0, %0, c4, c1, 0" : : "r" (ticks_per_jiffy - 1)); | ||
89 | asm volatile("mcr p6, 0, %0, c0, c1, 0" : : "r" (timer_ctl)); | ||
90 | asm volatile("mcr p6, 0, %0, c5, c1, 0" : : "r" (0xffffffff)); | ||
91 | asm volatile("mcr p6, 0, %0, c1, c1, 0" : : "r" (timer_ctl)); | ||
92 | |||
93 | setup_irq(IRQ_IOP3XX_TIMER0, &iop3xx_timer_irq); | ||
94 | } | ||
diff --git a/include/asm-arm/arch-iop32x/iop321.h b/include/asm-arm/arch-iop32x/iop321.h index e3c85a05e73a..bd96b8d55a76 100644 --- a/include/asm-arm/arch-iop32x/iop321.h +++ b/include/asm-arm/arch-iop32x/iop321.h | |||
@@ -233,6 +233,12 @@ | |||
233 | 233 | ||
234 | /* for I2C bit defs see drivers/i2c/i2c-iop3xx.h */ | 234 | /* for I2C bit defs see drivers/i2c/i2c-iop3xx.h */ |
235 | 235 | ||
236 | /* | ||
237 | * Peripherals that are shared between the iop32x and iop33x but | ||
238 | * located at different addresses. | ||
239 | */ | ||
240 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07e0 + (reg)) | ||
241 | |||
236 | #include <asm/hardware/iop3xx.h> | 242 | #include <asm/hardware/iop3xx.h> |
237 | 243 | ||
238 | 244 | ||
diff --git a/include/asm-arm/arch-iop33x/iop331.h b/include/asm-arm/arch-iop33x/iop331.h index e85e1a2e1a86..b301ef8f7f32 100644 --- a/include/asm-arm/arch-iop33x/iop331.h +++ b/include/asm-arm/arch-iop33x/iop331.h | |||
@@ -238,6 +238,12 @@ | |||
238 | 238 | ||
239 | /* Reserved 0x0000178c through 0x000019ff */ | 239 | /* Reserved 0x0000178c through 0x000019ff */ |
240 | 240 | ||
241 | /* | ||
242 | * Peripherals that are shared between the iop32x and iop33x but | ||
243 | * located at different addresses. | ||
244 | */ | ||
245 | #define IOP3XX_TIMER_REG(reg) (IOP3XX_PERIPHERAL_VIRT_BASE + 0x07d0 + (reg)) | ||
246 | |||
241 | #include <asm/hardware/iop3xx.h> | 247 | #include <asm/hardware/iop3xx.h> |
242 | 248 | ||
243 | 249 | ||
diff --git a/include/asm-arm/hardware/iop3xx.h b/include/asm-arm/hardware/iop3xx.h index d488ced2e12d..b21ea41b149e 100644 --- a/include/asm-arm/hardware/iop3xx.h +++ b/include/asm-arm/hardware/iop3xx.h | |||
@@ -81,6 +81,24 @@ | |||
81 | #define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4) | 81 | #define IOP3XX_PCIXSR (volatile u32 *)IOP3XX_REG_ADDR(0x01e4) |
82 | #define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec) | 82 | #define IOP3XX_PCIIRSR (volatile u32 *)IOP3XX_REG_ADDR(0x01ec) |
83 | 83 | ||
84 | /* Timers */ | ||
85 | #define IOP3XX_TU_TMR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0000) | ||
86 | #define IOP3XX_TU_TMR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0004) | ||
87 | #define IOP3XX_TU_TCR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0008) | ||
88 | #define IOP3XX_TU_TCR1 (volatile u32 *)IOP3XX_TIMER_REG(0x000c) | ||
89 | #define IOP3XX_TU_TRR0 (volatile u32 *)IOP3XX_TIMER_REG(0x0010) | ||
90 | #define IOP3XX_TU_TRR1 (volatile u32 *)IOP3XX_TIMER_REG(0x0014) | ||
91 | #define IOP3XX_TU_TISR (volatile u32 *)IOP3XX_TIMER_REG(0x0018) | ||
92 | #define IOP3XX_TU_WDTCR (volatile u32 *)IOP3XX_TIMER_REG(0x001c) | ||
93 | #define IOP3XX_TMR_TC 0x01 | ||
94 | #define IOP3XX_TMR_EN 0x02 | ||
95 | #define IOP3XX_TMR_RELOAD 0x04 | ||
96 | #define IOP3XX_TMR_PRIVILEGED 0x09 | ||
97 | #define IOP3XX_TMR_RATIO_1_1 0x00 | ||
98 | #define IOP3XX_TMR_RATIO_4_1 0x10 | ||
99 | #define IOP3XX_TMR_RATIO_8_1 0x20 | ||
100 | #define IOP3XX_TMR_RATIO_16_1 0x30 | ||
101 | |||
84 | /* I2C bus interface unit */ | 102 | /* I2C bus interface unit */ |
85 | #define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680) | 103 | #define IOP3XX_ICR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1680) |
86 | #define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684) | 104 | #define IOP3XX_ISR0 (volatile u32 *)IOP3XX_REG_ADDR(0x1684) |
@@ -109,6 +127,8 @@ | |||
109 | 127 | ||
110 | #ifndef __ASSEMBLY__ | 128 | #ifndef __ASSEMBLY__ |
111 | void iop3xx_map_io(void); | 129 | void iop3xx_map_io(void); |
130 | void iop3xx_init_time(unsigned long); | ||
131 | unsigned long iop3xx_gettimeoffset(void); | ||
112 | 132 | ||
113 | extern struct platform_device iop3xx_i2c0_device; | 133 | extern struct platform_device iop3xx_i2c0_device; |
114 | extern struct platform_device iop3xx_i2c1_device; | 134 | extern struct platform_device iop3xx_i2c1_device; |