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-rw-r--r--drivers/ide/ide-timing.h23
-rw-r--r--include/linux/ide.h28
2 files changed, 28 insertions, 23 deletions
diff --git a/drivers/ide/ide-timing.h b/drivers/ide/ide-timing.h
index ebe884d76881..724879910ac8 100644
--- a/drivers/ide/ide-timing.h
+++ b/drivers/ide/ide-timing.h
@@ -28,18 +28,6 @@
28#include <linux/kernel.h> 28#include <linux/kernel.h>
29#include <linux/hdreg.h> 29#include <linux/hdreg.h>
30 30
31struct ide_timing {
32 u8 mode;
33 short setup; /* t1 */
34 short act8b; /* t2 for 8-bit io */
35 short rec8b; /* t2i for 8-bit io */
36 short cyc8b; /* t0 for 8-bit io */
37 short active; /* t2 or tD */
38 short recover; /* t2i or tK */
39 short cycle; /* t0 */
40 short udma; /* t2CYCTYP/2 */
41};
42
43/* 31/*
44 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds). 32 * PIO 0-5, MWDMA 0-2 and UDMA 0-6 timings (in nanoseconds).
45 * These were taken from ATA/ATAPI-6 standard, rev 0a, except 33 * These were taken from ATA/ATAPI-6 standard, rev 0a, except
@@ -79,17 +67,6 @@ static struct ide_timing ide_timing[] = {
79 { 0xff } 67 { 0xff }
80}; 68};
81 69
82#define IDE_TIMING_SETUP 0x01
83#define IDE_TIMING_ACT8B 0x02
84#define IDE_TIMING_REC8B 0x04
85#define IDE_TIMING_CYC8B 0x08
86#define IDE_TIMING_8BIT 0x0e
87#define IDE_TIMING_ACTIVE 0x10
88#define IDE_TIMING_RECOVER 0x20
89#define IDE_TIMING_CYCLE 0x40
90#define IDE_TIMING_UDMA 0x80
91#define IDE_TIMING_ALL 0xff
92
93#define ENOUGH(v,unit) (((v)-1)/(unit)+1) 70#define ENOUGH(v,unit) (((v)-1)/(unit)+1)
94#define EZ(v,unit) ((v)?ENOUGH(v,unit):0) 71#define EZ(v,unit) ((v)?ENOUGH(v,unit):0)
95 72
diff --git a/include/linux/ide.h b/include/linux/ide.h
index ac4eeb2932ef..81c6ea436beb 100644
--- a/include/linux/ide.h
+++ b/include/linux/ide.h
@@ -1271,6 +1271,34 @@ static inline int ide_dev_is_sata(struct hd_driveid *id)
1271u64 ide_get_lba_addr(struct ide_taskfile *, int); 1271u64 ide_get_lba_addr(struct ide_taskfile *, int);
1272u8 ide_dump_status(ide_drive_t *, const char *, u8); 1272u8 ide_dump_status(ide_drive_t *, const char *, u8);
1273 1273
1274struct ide_timing {
1275 u8 mode;
1276 u8 setup; /* t1 */
1277 u16 act8b; /* t2 for 8-bit io */
1278 u16 rec8b; /* t2i for 8-bit io */
1279 u16 cyc8b; /* t0 for 8-bit io */
1280 u16 active; /* t2 or tD */
1281 u16 recover; /* t2i or tK */
1282 u16 cycle; /* t0 */
1283 u16 udma; /* t2CYCTYP/2 */
1284};
1285
1286enum {
1287 IDE_TIMING_SETUP = (1 << 0),
1288 IDE_TIMING_ACT8B = (1 << 1),
1289 IDE_TIMING_REC8B = (1 << 2),
1290 IDE_TIMING_CYC8B = (1 << 3),
1291 IDE_TIMING_8BIT = IDE_TIMING_ACT8B | IDE_TIMING_REC8B |
1292 IDE_TIMING_CYC8B,
1293 IDE_TIMING_ACTIVE = (1 << 4),
1294 IDE_TIMING_RECOVER = (1 << 5),
1295 IDE_TIMING_CYCLE = (1 << 6),
1296 IDE_TIMING_UDMA = (1 << 7),
1297 IDE_TIMING_ALL = IDE_TIMING_SETUP | IDE_TIMING_8BIT |
1298 IDE_TIMING_ACTIVE | IDE_TIMING_RECOVER |
1299 IDE_TIMING_CYCLE | IDE_TIMING_UDMA,
1300};
1301
1274typedef struct ide_pio_timings_s { 1302typedef struct ide_pio_timings_s {
1275 int setup_time; /* Address setup (ns) minimum */ 1303 int setup_time; /* Address setup (ns) minimum */
1276 int active_time; /* Active pulse (ns) minimum */ 1304 int active_time; /* Active pulse (ns) minimum */