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-rw-r--r--arch/mips/Kconfig218
-rw-r--r--arch/mips/sibyte/Kconfig143
2 files changed, 145 insertions, 216 deletions
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index bfd5014a8afe..87f860feb845 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -749,222 +749,6 @@ config MIPS_MTX1
749 749
750endchoice 750endchoice
751 751
752config SIBYTE_SB1xxx_SOC
753 bool "Support for Broadcom BCM1xxx SOCs (EXPERIMENTAL)"
754 depends on EXPERIMENTAL
755 select BOOT_ELF32
756 select DMA_COHERENT
757 select SWAP_IO_SPACE
758 select SYS_SUPPORTS_32BIT_KERNEL
759 select SYS_SUPPORTS_64BIT_KERNEL
760
761choice
762 prompt "BCM1xxx SOC-based board"
763 depends on SIBYTE_SB1xxx_SOC
764 default SIBYTE_SWARM
765 help
766 Enable support for boards based on the SiByte line of SOCs
767 from Broadcom. There are configurations for the known
768 evaluation boards, or you can choose "Other" and add your
769 own board support code.
770
771config SIBYTE_SWARM
772 bool "BCM91250A-SWARM"
773 select SIBYTE_SB1250
774
775config SIBYTE_SENTOSA
776 bool "BCM91250E-Sentosa"
777 select SIBYTE_SB1250
778
779config SIBYTE_RHONE
780 bool "BCM91125E-Rhone"
781 select SIBYTE_BCM1125H
782
783config SIBYTE_CARMEL
784 bool "BCM91120x-Carmel"
785 select SIBYTE_BCM1120
786
787config SIBYTE_PTSWARM
788 bool "BCM91250PT-PTSWARM"
789 select SIBYTE_SB1250
790
791config SIBYTE_LITTLESUR
792 bool "BCM91250C2-LittleSur"
793 select SIBYTE_SB1250
794
795config SIBYTE_CRHINE
796 bool "BCM91120C-CRhine"
797 select SIBYTE_BCM1120
798
799config SIBYTE_CRHONE
800 bool "BCM91125C-CRhone"
801 select SIBYTE_BCM1125
802
803config SIBYTE_UNKNOWN
804 bool "Other"
805
806endchoice
807
808config SIBYTE_BOARD
809 bool
810 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_UNKNOWN
811 default y
812
813choice
814 prompt "BCM1xxx SOC Type"
815 depends on SIBYTE_UNKNOWN
816 default SIBYTE_UNK_BCM1250
817 help
818 Since you haven't chosen a known evaluation board from
819 Broadcom, you must explicitly pick the SOC this kernel is
820 targetted for.
821
822config SIBYTE_UNK_BCM1250
823 bool "BCM1250"
824 select SIBYTE_SB1250
825
826config SIBYTE_UNK_BCM1120
827 bool "BCM1120"
828 select SIBYTE_BCM1120
829
830config SIBYTE_UNK_BCM1125
831 bool "BCM1125"
832 select SIBYTE_BCM1125
833
834config SIBYTE_UNK_BCM1125H
835 bool "BCM1125H"
836 select SIBYTE_BCM1125H
837
838endchoice
839
840config SIBYTE_SB1250
841 bool
842 select HW_HAS_PCI
843
844config SIBYTE_BCM1120
845 bool
846 select SIBYTE_BCM112X
847
848config SIBYTE_BCM1125
849 bool
850 select HW_HAS_PCI
851 select SIBYTE_BCM112X
852
853config SIBYTE_BCM1125H
854 bool
855 select HW_HAS_PCI
856 select SIBYTE_BCM112X
857
858config SIBYTE_BCM112X
859 bool
860
861choice
862 prompt "SiByte SOC Stepping"
863 depends on SIBYTE_SB1xxx_SOC
864
865config CPU_SB1_PASS_1
866 bool "1250 Pass1"
867 depends on SIBYTE_SB1250
868 select CPU_HAS_PREFETCH
869
870config CPU_SB1_PASS_2_1250
871 bool "1250 An"
872 depends on SIBYTE_SB1250
873 select CPU_SB1_PASS_2
874 help
875 Also called BCM1250 Pass 2
876
877config CPU_SB1_PASS_2_2
878 bool "1250 Bn"
879 depends on SIBYTE_SB1250
880 select CPU_HAS_PREFETCH
881 help
882 Also called BCM1250 Pass 2.2
883
884config CPU_SB1_PASS_4
885 bool "1250 Cn"
886 depends on SIBYTE_SB1250
887 select CPU_HAS_PREFETCH
888 help
889 Also called BCM1250 Pass 3
890
891config CPU_SB1_PASS_2_112x
892 bool "112x Hybrid"
893 depends on SIBYTE_BCM112X
894 select CPU_SB1_PASS_2
895
896config CPU_SB1_PASS_3
897 bool "112x An"
898 depends on SIBYTE_BCM112X
899 select CPU_HAS_PREFETCH
900
901endchoice
902
903config CPU_SB1_PASS_2
904 bool
905
906config SIBYTE_HAS_LDT
907 bool
908 depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
909 default y
910
911config SIMULATION
912 bool "Running under simulation"
913 depends on SIBYTE_SB1xxx_SOC
914 help
915 Build a kernel suitable for running under the GDB simulator.
916 Primarily adjusts the kernel's notion of time.
917
918config SIBYTE_CFE
919 bool "Booting from CFE"
920 depends on SIBYTE_SB1xxx_SOC
921 help
922 Make use of the CFE API for enumerating available memory,
923 controlling secondary CPUs, and possibly console output.
924
925config SIBYTE_CFE_CONSOLE
926 bool "Use firmware console"
927 depends on SIBYTE_CFE
928 help
929 Use the CFE API's console write routines during boot. Other console
930 options (VT console, sb1250 duart console, etc.) should not be
931 configured.
932
933config SIBYTE_STANDALONE
934 bool
935 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
936 default y
937
938config SIBYTE_STANDALONE_RAM_SIZE
939 int "Memory size (in megabytes)"
940 depends on SIBYTE_STANDALONE
941 default "32"
942
943config SIBYTE_BUS_WATCHER
944 bool "Support for Bus Watcher statistics"
945 depends on SIBYTE_SB1xxx_SOC
946 help
947 Handle and keep statistics on the bus error interrupts (COR_ECC,
948 BAD_ECC, IO_BUS).
949
950config SIBYTE_BW_TRACE
951 bool "Capture bus trace before bus error"
952 depends on SIBYTE_BUS_WATCHER
953 help
954 Run a continuous bus trace, dumping the raw data as soon as
955 a ZBbus error is detected. Cannot work if ZBbus profiling
956 is turned on, and also will interfere with JTAG-based trace
957 buffer activity. Raw buffer data is dumped to console, and
958 must be processed off-line.
959
960config SIBYTE_SB1250_PROF
961 bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
962 depends on SIBYTE_SB1xxx_SOC
963
964config SIBYTE_TBPROF
965 bool "Support for ZBbus profiling"
966 depends on SIBYTE_SB1xxx_SOC
967
968config SNI_RM200_PCI 752config SNI_RM200_PCI
969 bool "Support for SNI RM200 PCI" 753 bool "Support for SNI RM200 PCI"
970 select ARC 754 select ARC
@@ -1002,6 +786,8 @@ config TOSHIBA_FPCIB0
1002 bool "FPCIB0 Backplane Support" 786 bool "FPCIB0 Backplane Support"
1003 depends on TOSHIBA_RBTX4927 787 depends on TOSHIBA_RBTX4927
1004 788
789source "arch/mips/sibyte/Kconfig"
790
1005config RWSEM_GENERIC_SPINLOCK 791config RWSEM_GENERIC_SPINLOCK
1006 bool 792 bool
1007 default y 793 default y
diff --git a/arch/mips/sibyte/Kconfig b/arch/mips/sibyte/Kconfig
new file mode 100644
index 000000000000..3618d61f004a
--- /dev/null
+++ b/arch/mips/sibyte/Kconfig
@@ -0,0 +1,143 @@
1config SIBYTE_SB1250
2 bool
3 select HW_HAS_PCI
4 select SIBYTE_HAS_LDT
5 select SIBYTE_SB1xxx_SOC
6
7config SIBYTE_BCM1120
8 bool
9 select SIBYTE_BCM112X
10 select SIBYTE_SB1xxx_SOC
11
12config SIBYTE_BCM1125
13 bool
14 select HW_HAS_PCI
15 select SIBYTE_BCM112X
16 select SIBYTE_SB1xxx_SOC
17
18config SIBYTE_BCM1125H
19 bool
20 select HW_HAS_PCI
21 select SIBYTE_BCM112X
22 select SIBYTE_HAS_LDT
23 select SIBYTE_SB1xxx_SOC
24
25config SIBYTE_BCM112X
26 bool
27 select SIBYTE_SB1xxx_SOC
28
29config SIBYTE_SB1xxx_SOC
30 bool
31 depends on EXPERIMENTAL
32 select DMA_COHERENT
33 select SIBYTE_CFE
34 select SWAP_IO_SPACE
35 select SYS_SUPPORTS_32BIT_KERNEL
36 select SYS_SUPPORTS_64BIT_KERNEL
37
38choice
39 prompt "SiByte SOC Stepping"
40 depends on SIBYTE_SB1xxx_SOC
41
42config CPU_SB1_PASS_1
43 bool "1250 Pass1"
44 depends on SIBYTE_SB1250
45 select CPU_HAS_PREFETCH
46
47config CPU_SB1_PASS_2_1250
48 bool "1250 An"
49 depends on SIBYTE_SB1250
50 select CPU_SB1_PASS_2
51 help
52 Also called BCM1250 Pass 2
53
54config CPU_SB1_PASS_2_2
55 bool "1250 Bn"
56 depends on SIBYTE_SB1250
57 select CPU_HAS_PREFETCH
58 help
59 Also called BCM1250 Pass 2.2
60
61config CPU_SB1_PASS_4
62 bool "1250 Cn"
63 depends on SIBYTE_SB1250
64 select CPU_HAS_PREFETCH
65 help
66 Also called BCM1250 Pass 3
67
68config CPU_SB1_PASS_2_112x
69 bool "112x Hybrid"
70 depends on SIBYTE_BCM112X
71 select CPU_SB1_PASS_2
72
73config CPU_SB1_PASS_3
74 bool "112x An"
75 depends on SIBYTE_BCM112X
76 select CPU_HAS_PREFETCH
77
78endchoice
79
80config CPU_SB1_PASS_2
81 bool
82
83config SIBYTE_HAS_LDT
84 bool
85 depends on PCI && (SIBYTE_SB1250 || SIBYTE_BCM1125H)
86 default y
87
88config SIMULATION
89 bool "Running under simulation"
90 depends on SIBYTE_SB1xxx_SOC
91 help
92 Build a kernel suitable for running under the GDB simulator.
93 Primarily adjusts the kernel's notion of time.
94
95config SIBYTE_CFE
96 bool "Booting from CFE"
97 depends on SIBYTE_SB1xxx_SOC
98 help
99 Make use of the CFE API for enumerating available memory,
100 controlling secondary CPUs, and possibly console output.
101
102config SIBYTE_CFE_CONSOLE
103 bool "Use firmware console"
104 depends on SIBYTE_CFE
105 help
106 Use the CFE API's console write routines during boot. Other console
107 options (VT console, sb1250 duart console, etc.) should not be
108 configured.
109
110config SIBYTE_STANDALONE
111 bool
112 depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
113 default y
114
115config SIBYTE_STANDALONE_RAM_SIZE
116 int "Memory size (in megabytes)"
117 depends on SIBYTE_STANDALONE
118 default "32"
119
120config SIBYTE_BUS_WATCHER
121 bool "Support for Bus Watcher statistics"
122 depends on SIBYTE_SB1xxx_SOC
123 help
124 Handle and keep statistics on the bus error interrupts (COR_ECC,
125 BAD_ECC, IO_BUS).
126
127config SIBYTE_BW_TRACE
128 bool "Capture bus trace before bus error"
129 depends on SIBYTE_BUS_WATCHER
130 help
131 Run a continuous bus trace, dumping the raw data as soon as
132 a ZBbus error is detected. Cannot work if ZBbus profiling
133 is turned on, and also will interfere with JTAG-based trace
134 buffer activity. Raw buffer data is dumped to console, and
135 must be processed off-line.
136
137config SIBYTE_SB1250_PROF
138 bool "Support for SB1/SOC profiling - SB1/SCD perf counters"
139 depends on SIBYTE_SB1xxx_SOC
140
141config SIBYTE_TBPROF
142 bool "Support for ZBbus profiling"
143 depends on SIBYTE_SB1xxx_SOC
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-17 22:50:09 -0500