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-rw-r--r--arch/i386/mach-voyager/voyager_basic.c1
-rw-r--r--arch/i386/mach-voyager/voyager_smp.c6
2 files changed, 7 insertions, 0 deletions
diff --git a/arch/i386/mach-voyager/voyager_basic.c b/arch/i386/mach-voyager/voyager_basic.c
index 3e439ce5e1b2..8680080a6a89 100644
--- a/arch/i386/mach-voyager/voyager_basic.c
+++ b/arch/i386/mach-voyager/voyager_basic.c
@@ -36,6 +36,7 @@
36 * Power off function, if any 36 * Power off function, if any
37 */ 37 */
38void (*pm_power_off)(void); 38void (*pm_power_off)(void);
39EXPORT_SYMBOL(pm_power_off);
39 40
40int voyager_level = 0; 41int voyager_level = 0;
41 42
diff --git a/arch/i386/mach-voyager/voyager_smp.c b/arch/i386/mach-voyager/voyager_smp.c
index 8c8527593da0..0e1f4208b07c 100644
--- a/arch/i386/mach-voyager/voyager_smp.c
+++ b/arch/i386/mach-voyager/voyager_smp.c
@@ -10,6 +10,7 @@
10 * the voyager hal to provide the functionality 10 * the voyager hal to provide the functionality
11 */ 11 */
12#include <linux/config.h> 12#include <linux/config.h>
13#include <linux/module.h>
13#include <linux/mm.h> 14#include <linux/mm.h>
14#include <linux/kernel_stat.h> 15#include <linux/kernel_stat.h>
15#include <linux/delay.h> 16#include <linux/delay.h>
@@ -40,6 +41,7 @@ static unsigned long cpu_irq_affinity[NR_CPUS] __cacheline_aligned = { [0 ... NR
40/* per CPU data structure (for /proc/cpuinfo et al), visible externally 41/* per CPU data structure (for /proc/cpuinfo et al), visible externally
41 * indexed physically */ 42 * indexed physically */
42struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned; 43struct cpuinfo_x86 cpu_data[NR_CPUS] __cacheline_aligned;
44EXPORT_SYMBOL(cpu_data);
43 45
44/* physical ID of the CPU used to boot the system */ 46/* physical ID of the CPU used to boot the system */
45unsigned char boot_cpu_id; 47unsigned char boot_cpu_id;
@@ -72,6 +74,7 @@ static volatile unsigned long smp_invalidate_needed;
72/* Bitmask of currently online CPUs - used by setup.c for 74/* Bitmask of currently online CPUs - used by setup.c for
73 /proc/cpuinfo, visible externally but still physical */ 75 /proc/cpuinfo, visible externally but still physical */
74cpumask_t cpu_online_map = CPU_MASK_NONE; 76cpumask_t cpu_online_map = CPU_MASK_NONE;
77EXPORT_SYMBOL(cpu_online_map);
75 78
76/* Bitmask of CPUs present in the system - exported by i386_syms.c, used 79/* Bitmask of CPUs present in the system - exported by i386_syms.c, used
77 * by scheduler but indexed physically */ 80 * by scheduler but indexed physically */
@@ -238,6 +241,7 @@ static cpumask_t smp_commenced_mask = CPU_MASK_NONE;
238/* This is for the new dynamic CPU boot code */ 241/* This is for the new dynamic CPU boot code */
239cpumask_t cpu_callin_map = CPU_MASK_NONE; 242cpumask_t cpu_callin_map = CPU_MASK_NONE;
240cpumask_t cpu_callout_map = CPU_MASK_NONE; 243cpumask_t cpu_callout_map = CPU_MASK_NONE;
244EXPORT_SYMBOL(cpu_callout_map);
241 245
242/* The per processor IRQ masks (these are usually kept in sync) */ 246/* The per processor IRQ masks (these are usually kept in sync) */
243static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned; 247static __u16 vic_irq_mask[NR_CPUS] __cacheline_aligned;
@@ -978,6 +982,7 @@ void flush_tlb_page(struct vm_area_struct * vma, unsigned long va)
978 982
979 preempt_enable(); 983 preempt_enable();
980} 984}
985EXPORT_SYMBOL(flush_tlb_page);
981 986
982/* enable the requested IRQs */ 987/* enable the requested IRQs */
983static void 988static void
@@ -1109,6 +1114,7 @@ smp_call_function (void (*func) (void *info), void *info, int retry,
1109 1114
1110 return 0; 1115 return 0;
1111} 1116}
1117EXPORT_SYMBOL(smp_call_function);
1112 1118
1113/* Sorry about the name. In an APIC based system, the APICs 1119/* Sorry about the name. In an APIC based system, the APICs
1114 * themselves are programmed to send a timer interrupt. This is used 1120 * themselves are programmed to send a timer interrupt. This is used