4 files changed, 18 insertions, 11 deletions

diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 579cd40258b9..12b84ca51327 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -73,7 +73,7 @@ cpm_mask_irq(unsigned int irq)
 {
         int cpm_vec = irq - CPM_IRQ_OFFSET;
 
-        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) & ~(1 << cpm_vec));
+        clrbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
 }
 
 static void
@@ -81,7 +81,7 @@ cpm_unmask_irq(unsigned int irq)
 {
         int cpm_vec = irq - CPM_IRQ_OFFSET;
 
-        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) | (1 << cpm_vec));
+        setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, (1 << cpm_vec));
 }
 
 static void
@@ -198,7 +198,7 @@ cpm_interrupt_init(void)
         if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction))
                 panic("Could not allocate CPM error IRQ!");
 
-        out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr) | CICR_IEN);
+        setbits32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, CICR_IEN);
 }
 
 /*
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index 688616de3cde..ff0282479a78 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -140,9 +140,11 @@ void __init __attribute__ ((weak))
 init_internal_rtc(void)
 {
         /* Disable the RTC one second and alarm interrupts. */
-        out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE));
+        clrbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_SIE | RTCSC_ALE));
+
         /* Enable the RTC */
-        out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE));
+        setbits16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, (RTCSC_RTF | RTCSC_RTE));
+
 }
 
 /* The decrementer counts at the system (internal) clock frequency divided by
@@ -159,8 +161,7 @@ void __init m8xx_calibrate_decr(void)
         out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY);
 
         /* Force all 8xx processors to use divide by 16 processor clock. */
-        out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr,
-                in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr)|0x02000000);
+        setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr, 0x02000000);
         /* Processor frequency is MHz.
          * The value 'fp' is the number of decrementer ticks per second.
          */
@@ -239,8 +240,8 @@ m8xx_restart(char *cmd)
         __volatile__ unsigned char dummy;
 
         local_irq_disable();
-        out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr) | 0x00000080);
 
+        setbits32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, 0x00000080);
         /* Clear the ME bit in MSR to cause checkstop on machine check
         */
         mtmsr(mfmsr() & ~0x1000);
@@ -310,8 +311,8 @@ m8xx_init_IRQ(void)
         i8259_init(0);
 
         /* The i8259 cascade interrupt must be level sensitive. */
-        out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel & ~(0x80000000 >> ISA_BRIDGE_INT)));
 
+        clrbits32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, (0x80000000 >> ISA_BRIDGE_INT));
         if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction))
                 enable_irq(ISA_BRIDGE_INT);
 #endif  /* CONFIG_PCI */
diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c
index df6c9557b86a..ac11d7bab443 100644
--- a/arch/ppc/syslib/m8xx_wdt.c
+++ b/arch/ppc/syslib/m8xx_wdt.c
@@ -41,8 +41,7 @@ static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs)
 
         m8xx_wdt_reset();
 
-        out_be16(&imap->im_sit.sit_piscr, in_be16(&imap->im_sit.sit_piscr) | PISCR_PS); /* clear irq */
-
+        setbits16(&imap->im_sit.sit_piscr, PISCR_PS);
         return IRQ_HANDLED;
 }
 
diff --git a/include/asm-ppc/io.h b/include/asm-ppc/io.h
index df9cf6ed189d..b919d8fb7d98 100644
--- a/include/asm-ppc/io.h
+++ b/include/asm-ppc/io.h
@@ -575,4 +575,11 @@ extern void pci_iounmap(struct pci_dev *dev, void __iomem *);
  */
 #define xlate_dev_kmem_ptr(p)   p
 
+/* access ports */
+#define setbits32(_addr, _v) out_be32((_addr), in_be32(_addr) |  (_v))
+#define clrbits32(_addr, _v) out_be32((_addr), in_be32(_addr) & ~(_v))
+
+#define setbits16(_addr, _v) out_be16((_addr), in_be16(_addr) |  (_v))
+#define clrbits16(_addr, _v) out_be16((_addr), in_be16(_addr) & ~(_v))
+
 #endif /* __KERNEL__ */