diff options
| -rw-r--r-- | drivers/scsi/ata_piix.c | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/drivers/scsi/ata_piix.c b/drivers/scsi/ata_piix.c index 887b2b9ee4aa..908ff1f9671a 100644 --- a/drivers/scsi/ata_piix.c +++ b/drivers/scsi/ata_piix.c | |||
| @@ -37,6 +37,49 @@ | |||
| 37 | * | 37 | * |
| 38 | * Hardware documentation available at http://developer.intel.com/ | 38 | * Hardware documentation available at http://developer.intel.com/ |
| 39 | * | 39 | * |
| 40 | * Documentation | ||
| 41 | * Publically available from Intel web site. Errata documentation | ||
| 42 | * is also publically available. As an aide to anyone hacking on this | ||
| 43 | * driver the list of errata that are relevant is below.going back to | ||
| 44 | * PIIX4. Older device documentation is now a bit tricky to find. | ||
| 45 | * | ||
| 46 | * The chipsets all follow very much the same design. The orginal Triton | ||
| 47 | * series chipsets do _not_ support independant device timings, but this | ||
| 48 | * is fixed in Triton II. With the odd mobile exception the chips then | ||
| 49 | * change little except in gaining more modes until SATA arrives. This | ||
| 50 | * driver supports only the chips with independant timing (that is those | ||
| 51 | * with SITRE and the 0x44 timing register). See pata_oldpiix and pata_mpiix | ||
| 52 | * for the early chip drivers. | ||
| 53 | * | ||
| 54 | * Errata of note: | ||
| 55 | * | ||
| 56 | * Unfixable | ||
| 57 | * PIIX4 errata #9 - Only on ultra obscure hw | ||
| 58 | * ICH3 errata #13 - Not observed to affect real hw | ||
| 59 | * by Intel | ||
| 60 | * | ||
| 61 | * Things we must deal with | ||
| 62 | * PIIX4 errata #10 - BM IDE hang with non UDMA | ||
| 63 | * (must stop/start dma to recover) | ||
| 64 | * 440MX errata #15 - As PIIX4 errata #10 | ||
| 65 | * PIIX4 errata #15 - Must not read control registers | ||
| 66 | * during a PIO transfer | ||
| 67 | * 440MX errata #13 - As PIIX4 errata #15 | ||
| 68 | * ICH2 errata #21 - DMA mode 0 doesn't work right | ||
| 69 | * ICH0/1 errata #55 - As ICH2 errata #21 | ||
| 70 | * ICH2 spec c #9 - Extra operations needed to handle | ||
| 71 | * drive hotswap [NOT YET SUPPORTED] | ||
| 72 | * ICH2 spec c #20 - IDE PRD must not cross a 64K boundary | ||
| 73 | * and must be dword aligned | ||
| 74 | * ICH2 spec c #24 - UDMA mode 4,5 t85/86 should be 6ns not 3.3 | ||
| 75 | * | ||
| 76 | * Should have been BIOS fixed: | ||
| 77 | * 450NX: errata #19 - DMA hangs on old 450NX | ||
| 78 | * 450NX: errata #20 - DMA hangs on old 450NX | ||
| 79 | * 450NX: errata #25 - Corruption with DMA on old 450NX | ||
| 80 | * ICH3 errata #15 - IDE deadlock under high load | ||
| 81 | * (BIOS must set dev 31 fn 0 bit 23) | ||
| 82 | * ICH3 errata #18 - Don't use native mode | ||
| 40 | */ | 83 | */ |
| 41 | 84 | ||
| 42 | #include <linux/kernel.h> | 85 | #include <linux/kernel.h> |