diff options
-rw-r--r-- | arch/arm/mach-pxa/clock-pxa2xx.c | 8 | ||||
-rw-r--r-- | arch/arm/mach-pxa/clock-pxa3xx.c | 38 | ||||
-rw-r--r-- | arch/arm/mach-pxa/clock.h | 2 | ||||
-rw-r--r-- | arch/arm/mach-pxa/pxa3xx.c | 31 |
4 files changed, 51 insertions, 28 deletions
diff --git a/arch/arm/mach-pxa/clock-pxa2xx.c b/arch/arm/mach-pxa/clock-pxa2xx.c index 66eb531ae29b..1ce090448493 100644 --- a/arch/arm/mach-pxa/clock-pxa2xx.c +++ b/arch/arm/mach-pxa/clock-pxa2xx.c | |||
@@ -54,3 +54,11 @@ struct sysdev_class pxa2xx_clock_sysclass = { | |||
54 | .suspend = pxa2xx_clock_suspend, | 54 | .suspend = pxa2xx_clock_suspend, |
55 | .resume = pxa2xx_clock_resume, | 55 | .resume = pxa2xx_clock_resume, |
56 | }; | 56 | }; |
57 | |||
58 | static int __init pxa2xx_clock_init(void) | ||
59 | { | ||
60 | if (cpu_is_pxa2xx()) | ||
61 | return sysdev_class_register(&pxa2xx_clock_sysclass); | ||
62 | return 0; | ||
63 | } | ||
64 | postcore_initcall(pxa2xx_clock_init); | ||
diff --git a/arch/arm/mach-pxa/clock-pxa3xx.c b/arch/arm/mach-pxa/clock-pxa3xx.c index 34a36c4af19b..dd122d981752 100644 --- a/arch/arm/mach-pxa/clock-pxa3xx.c +++ b/arch/arm/mach-pxa/clock-pxa3xx.c | |||
@@ -159,3 +159,41 @@ const struct clkops clk_pxa3xx_pout_ops = { | |||
159 | .enable = clk_pout_enable, | 159 | .enable = clk_pout_enable, |
160 | .disable = clk_pout_disable, | 160 | .disable = clk_pout_disable, |
161 | }; | 161 | }; |
162 | |||
163 | #ifdef CONFIG_PM | ||
164 | static uint32_t cken[2]; | ||
165 | static uint32_t accr; | ||
166 | |||
167 | static int pxa3xx_clock_suspend(struct sys_device *d, pm_message_t state) | ||
168 | { | ||
169 | cken[0] = CKENA; | ||
170 | cken[1] = CKENB; | ||
171 | accr = ACCR; | ||
172 | return 0; | ||
173 | } | ||
174 | |||
175 | static int pxa3xx_clock_resume(struct sys_device *d) | ||
176 | { | ||
177 | ACCR = accr; | ||
178 | CKENA = cken[0]; | ||
179 | CKENB = cken[1]; | ||
180 | return 0; | ||
181 | } | ||
182 | #else | ||
183 | #define pxa3xx_clock_suspend NULL | ||
184 | #define pxa3xx_clock_resume NULL | ||
185 | #endif | ||
186 | |||
187 | struct sysdev_class pxa3xx_clock_sysclass = { | ||
188 | .name = "pxa3xx-clock", | ||
189 | .suspend = pxa3xx_clock_suspend, | ||
190 | .resume = pxa3xx_clock_resume, | ||
191 | }; | ||
192 | |||
193 | static int __init pxa3xx_clock_init(void) | ||
194 | { | ||
195 | if (cpu_is_pxa3xx()) | ||
196 | return sysdev_class_register(&pxa3xx_clock_sysclass); | ||
197 | return 0; | ||
198 | } | ||
199 | postcore_initcall(pxa3xx_clock_init); | ||
diff --git a/arch/arm/mach-pxa/clock.h b/arch/arm/mach-pxa/clock.h index 8ffc1d0b78e0..cf2cbd0b4ea4 100644 --- a/arch/arm/mach-pxa/clock.h +++ b/arch/arm/mach-pxa/clock.h | |||
@@ -72,4 +72,6 @@ extern const struct clkops clk_pxa3xx_pout_ops; | |||
72 | 72 | ||
73 | extern void clk_pxa3xx_cken_enable(struct clk *); | 73 | extern void clk_pxa3xx_cken_enable(struct clk *); |
74 | extern void clk_pxa3xx_cken_disable(struct clk *); | 74 | extern void clk_pxa3xx_cken_disable(struct clk *); |
75 | |||
76 | extern struct sysdev_class pxa3xx_clock_sysclass; | ||
75 | #endif | 77 | #endif |
diff --git a/arch/arm/mach-pxa/pxa3xx.c b/arch/arm/mach-pxa/pxa3xx.c index b239c1ab3ed9..a1c3ab26ce63 100644 --- a/arch/arm/mach-pxa/pxa3xx.c +++ b/arch/arm/mach-pxa/pxa3xx.c | |||
@@ -103,30 +103,6 @@ static struct clk_lookup pxa3xx_clkregs[] = { | |||
103 | static void __iomem *sram; | 103 | static void __iomem *sram; |
104 | static unsigned long wakeup_src; | 104 | static unsigned long wakeup_src; |
105 | 105 | ||
106 | #define SAVE(x) sleep_save[SLEEP_SAVE_##x] = x | ||
107 | #define RESTORE(x) x = sleep_save[SLEEP_SAVE_##x] | ||
108 | |||
109 | enum { SLEEP_SAVE_CKENA, | ||
110 | SLEEP_SAVE_CKENB, | ||
111 | SLEEP_SAVE_ACCR, | ||
112 | |||
113 | SLEEP_SAVE_COUNT, | ||
114 | }; | ||
115 | |||
116 | static void pxa3xx_cpu_pm_save(unsigned long *sleep_save) | ||
117 | { | ||
118 | SAVE(CKENA); | ||
119 | SAVE(CKENB); | ||
120 | SAVE(ACCR); | ||
121 | } | ||
122 | |||
123 | static void pxa3xx_cpu_pm_restore(unsigned long *sleep_save) | ||
124 | { | ||
125 | RESTORE(ACCR); | ||
126 | RESTORE(CKENA); | ||
127 | RESTORE(CKENB); | ||
128 | } | ||
129 | |||
130 | /* | 106 | /* |
131 | * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic | 107 | * Enter a standby mode (S0D1C2 or S0D2C2). Upon wakeup, the dynamic |
132 | * memory controller has to be reinitialised, so we place some code | 108 | * memory controller has to be reinitialised, so we place some code |
@@ -225,9 +201,6 @@ static int pxa3xx_cpu_pm_valid(suspend_state_t state) | |||
225 | } | 201 | } |
226 | 202 | ||
227 | static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { | 203 | static struct pxa_cpu_pm_fns pxa3xx_cpu_pm_fns = { |
228 | .save_count = SLEEP_SAVE_COUNT, | ||
229 | .save = pxa3xx_cpu_pm_save, | ||
230 | .restore = pxa3xx_cpu_pm_restore, | ||
231 | .valid = pxa3xx_cpu_pm_valid, | 204 | .valid = pxa3xx_cpu_pm_valid, |
232 | .enter = pxa3xx_cpu_pm_enter, | 205 | .enter = pxa3xx_cpu_pm_enter, |
233 | }; | 206 | }; |
@@ -466,7 +439,9 @@ static struct sys_device pxa3xx_sysdev[] = { | |||
466 | .cls = &pxa3xx_mfp_sysclass, | 439 | .cls = &pxa3xx_mfp_sysclass, |
467 | }, { | 440 | }, { |
468 | .cls = &pxa_gpio_sysclass, | 441 | .cls = &pxa_gpio_sysclass, |
469 | }, | 442 | }, { |
443 | .cls = &pxa3xx_clock_sysclass, | ||
444 | } | ||
470 | }; | 445 | }; |
471 | 446 | ||
472 | static int __init pxa3xx_init(void) | 447 | static int __init pxa3xx_init(void) |