diff options
| -rw-r--r-- | arch/x86/kernel/e820.c | 12 | ||||
| -rw-r--r-- | arch/x86/pci/i386.c | 80 |
2 files changed, 11 insertions, 81 deletions
diff --git a/arch/x86/kernel/e820.c b/arch/x86/kernel/e820.c index 523d6c5605d1..a7a71339bfb0 100644 --- a/arch/x86/kernel/e820.c +++ b/arch/x86/kernel/e820.c | |||
| @@ -1271,12 +1271,12 @@ static inline const char *e820_type_to_string(int e820_type) | |||
| 1271 | /* | 1271 | /* |
| 1272 | * Mark e820 reserved areas as busy for the resource manager. | 1272 | * Mark e820 reserved areas as busy for the resource manager. |
| 1273 | */ | 1273 | */ |
| 1274 | struct resource __initdata *e820_res; | 1274 | static struct resource __initdata *e820_res; |
| 1275 | void __init e820_reserve_resources(void) | 1275 | void __init e820_reserve_resources(void) |
| 1276 | { | 1276 | { |
| 1277 | int i; | 1277 | int i; |
| 1278 | u64 end; | ||
| 1279 | struct resource *res; | 1278 | struct resource *res; |
| 1279 | u64 end; | ||
| 1280 | 1280 | ||
| 1281 | res = alloc_bootmem_low(sizeof(struct resource) * e820.nr_map); | 1281 | res = alloc_bootmem_low(sizeof(struct resource) * e820.nr_map); |
| 1282 | e820_res = res; | 1282 | e820_res = res; |
| @@ -1293,6 +1293,12 @@ void __init e820_reserve_resources(void) | |||
| 1293 | res->end = end; | 1293 | res->end = end; |
| 1294 | 1294 | ||
| 1295 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; | 1295 | res->flags = IORESOURCE_MEM | IORESOURCE_BUSY; |
| 1296 | |||
| 1297 | /* | ||
| 1298 | * don't register the region that could be conflicted with | ||
| 1299 | * pci device BAR resource and insert them later in | ||
| 1300 | * pcibios_resource_survey() | ||
| 1301 | */ | ||
| 1296 | if (e820.map[i].type != E820_RESERVED || res->start < (1ULL<<20)) | 1302 | if (e820.map[i].type != E820_RESERVED || res->start < (1ULL<<20)) |
| 1297 | insert_resource(&iomem_resource, res); | 1303 | insert_resource(&iomem_resource, res); |
| 1298 | res++; | 1304 | res++; |
| @@ -1313,7 +1319,7 @@ void __init e820_reserve_resources_late(void) | |||
| 1313 | 1319 | ||
| 1314 | res = e820_res; | 1320 | res = e820_res; |
| 1315 | for (i = 0; i < e820.nr_map; i++) { | 1321 | for (i = 0; i < e820.nr_map; i++) { |
| 1316 | if (e820.map[i].type == E820_RESERVED && res->start >= (1ULL<<20)) | 1322 | if (!res->parent && res->end) |
| 1317 | insert_resource(&iomem_resource, res); | 1323 | insert_resource(&iomem_resource, res); |
| 1318 | res++; | 1324 | res++; |
| 1319 | } | 1325 | } |
diff --git a/arch/x86/pci/i386.c b/arch/x86/pci/i386.c index 40811efaa25a..844df0cbbd3e 100644 --- a/arch/x86/pci/i386.c +++ b/arch/x86/pci/i386.c | |||
| @@ -31,11 +31,8 @@ | |||
| 31 | #include <linux/ioport.h> | 31 | #include <linux/ioport.h> |
| 32 | #include <linux/errno.h> | 32 | #include <linux/errno.h> |
| 33 | #include <linux/bootmem.h> | 33 | #include <linux/bootmem.h> |
| 34 | #include <linux/acpi.h> | ||
| 35 | 34 | ||
| 36 | #include <asm/pat.h> | 35 | #include <asm/pat.h> |
| 37 | #include <asm/hpet.h> | ||
| 38 | #include <asm/io_apic.h> | ||
| 39 | #include <asm/e820.h> | 36 | #include <asm/e820.h> |
| 40 | 37 | ||
| 41 | #include "pci.h" | 38 | #include "pci.h" |
| @@ -81,77 +78,6 @@ pcibios_align_resource(void *data, struct resource *res, | |||
| 81 | } | 78 | } |
| 82 | EXPORT_SYMBOL(pcibios_align_resource); | 79 | EXPORT_SYMBOL(pcibios_align_resource); |
| 83 | 80 | ||
| 84 | static int check_res_with_valid(struct pci_dev *dev, struct resource *res) | ||
| 85 | { | ||
| 86 | unsigned long base; | ||
| 87 | unsigned long size; | ||
| 88 | int i; | ||
| 89 | |||
| 90 | base = res->start; | ||
| 91 | size = (res->start == 0 && res->end == res->start) ? 0 : | ||
| 92 | (res->end - res->start + 1); | ||
| 93 | |||
| 94 | if (!base || !size) | ||
| 95 | return 0; | ||
| 96 | |||
| 97 | #ifdef CONFIG_HPET_TIMER | ||
| 98 | /* for hpet */ | ||
| 99 | if (base == hpet_address && (res->flags & IORESOURCE_MEM)) { | ||
| 100 | dev_info(&dev->dev, "BAR has HPET at %08lx-%08lx\n", | ||
| 101 | base, base + size - 1); | ||
| 102 | return 1; | ||
| 103 | } | ||
| 104 | #endif | ||
| 105 | |||
| 106 | #ifdef CONFIG_X86_IO_APIC | ||
| 107 | for (i = 0; i < nr_ioapics; i++) { | ||
| 108 | unsigned long ioapic_phys = mp_ioapics[i].mp_apicaddr; | ||
| 109 | |||
| 110 | if (base == ioapic_phys && (res->flags & IORESOURCE_MEM)) { | ||
| 111 | dev_info(&dev->dev, "BAR has ioapic at %08lx-%08lx\n", | ||
| 112 | base, base + size - 1); | ||
| 113 | return 1; | ||
| 114 | } | ||
| 115 | } | ||
| 116 | #endif | ||
| 117 | |||
| 118 | #ifdef CONFIG_PCI_MMCONFIG | ||
| 119 | for (i = 0; i < pci_mmcfg_config_num; i++) { | ||
| 120 | unsigned long addr; | ||
| 121 | |||
| 122 | addr = pci_mmcfg_config[i].address; | ||
| 123 | if (base == addr && (res->flags & IORESOURCE_MEM)) { | ||
| 124 | dev_info(&dev->dev, "BAR has MMCONFIG at %08lx-%08lx\n", | ||
| 125 | base, base + size - 1); | ||
| 126 | return 1; | ||
| 127 | } | ||
| 128 | } | ||
| 129 | #endif | ||
| 130 | |||
| 131 | return 0; | ||
| 132 | } | ||
| 133 | |||
| 134 | static int check_platform(struct pci_dev *dev, struct resource *res) | ||
| 135 | { | ||
| 136 | struct resource *root = NULL; | ||
| 137 | |||
| 138 | /* | ||
| 139 | * forcibly insert it into the | ||
| 140 | * resource tree | ||
| 141 | */ | ||
| 142 | if (res->flags & IORESOURCE_MEM) | ||
| 143 | root = &iomem_resource; | ||
| 144 | else if (res->flags & IORESOURCE_IO) | ||
| 145 | root = &ioport_resource; | ||
| 146 | |||
| 147 | if (root && check_res_with_valid(dev, res)) { | ||
| 148 | insert_resource(root, res); | ||
| 149 | |||
| 150 | return 1; | ||
| 151 | } | ||
| 152 | |||
| 153 | return 0; | ||
| 154 | } | ||
| 155 | /* | 81 | /* |
| 156 | * Handle resources of PCI devices. If the world were perfect, we could | 82 | * Handle resources of PCI devices. If the world were perfect, we could |
| 157 | * just allocate all the resource regions and do nothing more. It isn't. | 83 | * just allocate all the resource regions and do nothing more. It isn't. |
| @@ -203,8 +129,6 @@ static void __init pcibios_allocate_bus_resources(struct list_head *bus_list) | |||
| 203 | pr = pci_find_parent_resource(dev, r); | 129 | pr = pci_find_parent_resource(dev, r); |
| 204 | if (!r->start || !pr || | 130 | if (!r->start || !pr || |
| 205 | request_resource(pr, r) < 0) { | 131 | request_resource(pr, r) < 0) { |
| 206 | if (check_platform(dev, r)) | ||
| 207 | continue; | ||
| 208 | dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx); | 132 | dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx); |
| 209 | /* | 133 | /* |
| 210 | * Something is wrong with the region. | 134 | * Something is wrong with the region. |
| @@ -246,8 +170,6 @@ static void __init pcibios_allocate_resources(int pass) | |||
| 246 | r->flags, disabled, pass); | 170 | r->flags, disabled, pass); |
| 247 | pr = pci_find_parent_resource(dev, r); | 171 | pr = pci_find_parent_resource(dev, r); |
| 248 | if (!pr || request_resource(pr, r) < 0) { | 172 | if (!pr || request_resource(pr, r) < 0) { |
| 249 | if (check_platform(dev, r)) | ||
| 250 | continue; | ||
| 251 | dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx); | 173 | dev_err(&dev->dev, "BAR %d: can't allocate resource\n", idx); |
| 252 | /* We'll assign a new address later */ | 174 | /* We'll assign a new address later */ |
| 253 | r->end -= r->start; | 175 | r->end -= r->start; |
| @@ -306,6 +228,8 @@ void __init pcibios_resource_survey(void) | |||
| 306 | pcibios_allocate_bus_resources(&pci_root_buses); | 228 | pcibios_allocate_bus_resources(&pci_root_buses); |
| 307 | pcibios_allocate_resources(0); | 229 | pcibios_allocate_resources(0); |
| 308 | pcibios_allocate_resources(1); | 230 | pcibios_allocate_resources(1); |
| 231 | |||
| 232 | e820_reserve_resources_late(); | ||
| 309 | } | 233 | } |
| 310 | 234 | ||
| 311 | /** | 235 | /** |
