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-rw-r--r--arch/arm/Kconfig2
-rw-r--r--arch/arm/configs/orion5x_defconfig3
-rw-r--r--arch/arm/mach-kirkwood/addr-map.c8
-rw-r--r--arch/arm/mach-kirkwood/common.c84
-rw-r--r--arch/arm/mach-kirkwood/common.h7
-rw-r--r--arch/arm/mach-kirkwood/db88f6281-bp-setup.c1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/irqs.h1
-rw-r--r--arch/arm/mach-kirkwood/include/mach/kirkwood.h14
-rw-r--r--arch/arm/mach-kirkwood/include/mach/timex.h1
-rw-r--r--arch/arm/mach-kirkwood/pcie.c6
-rw-r--r--arch/arm/mach-kirkwood/rd88f6281-setup.c1
-rw-r--r--arch/arm/mach-mv78xx0/common.c7
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/entry-macro.S18
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/irqs.h7
-rw-r--r--arch/arm/mach-mv78xx0/include/mach/mv78xx0.h2
-rw-r--r--arch/arm/mach-mv78xx0/irq.c1
-rw-r--r--arch/arm/mach-orion5x/Kconfig26
-rw-r--r--arch/arm/mach-orion5x/Makefile4
-rw-r--r--arch/arm/mach-orion5x/common.c74
-rw-r--r--arch/arm/mach-orion5x/common.h2
-rw-r--r--arch/arm/mach-orion5x/edmini_v2-setup.c262
-rw-r--r--arch/arm/mach-orion5x/include/mach/orion5x.h6
-rw-r--r--arch/arm/mach-orion5x/include/mach/timex.h2
-rw-r--r--arch/arm/mach-orion5x/kurobox_pro-setup.c2
-rw-r--r--arch/arm/mach-orion5x/lsmini-setup.c279
-rw-r--r--arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c117
-rw-r--r--arch/arm/mach-orion5x/terastation_pro2-setup.c369
-rw-r--r--arch/arm/mach-orion5x/tsx09-common.c3
-rw-r--r--arch/arm/mm/Kconfig8
-rw-r--r--arch/arm/mm/cache-feroceon-l2.c42
-rw-r--r--arch/arm/mm/proc-feroceon.S12
31 files changed, 1305 insertions, 66 deletions
diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 5f6e34925a32..efeed65b4a66 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -441,7 +441,7 @@ config ARCH_ORION5X
441 help 441 help
442 Support for the following Marvell Orion 5x series SoCs: 442 Support for the following Marvell Orion 5x series SoCs:
443 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182), 443 Orion-1 (5181), Orion-VoIP (5181L), Orion-NAS (5182),
444 Orion-2 (5281). 444 Orion-2 (5281), Orion-1-90 (6183).
445 445
446config ARCH_PNX4008 446config ARCH_PNX4008
447 bool "Philips Nexperia PNX4008 Mobile" 447 bool "Philips Nexperia PNX4008 Mobile"
diff --git a/arch/arm/configs/orion5x_defconfig b/arch/arm/configs/orion5x_defconfig
index 4017d83c9d2d..b2456ca544c9 100644
--- a/arch/arm/configs/orion5x_defconfig
+++ b/arch/arm/configs/orion5x_defconfig
@@ -176,14 +176,17 @@ CONFIG_MACH_KUROBOX_PRO=y
176CONFIG_MACH_DNS323=y 176CONFIG_MACH_DNS323=y
177CONFIG_MACH_TS209=y 177CONFIG_MACH_TS209=y
178CONFIG_MACH_LINKSTATION_PRO=y 178CONFIG_MACH_LINKSTATION_PRO=y
179CONFIG_MACH_LINKSTATION_MINI=y
179CONFIG_MACH_TS409=y 180CONFIG_MACH_TS409=y
180CONFIG_MACH_WRT350N_V2=y 181CONFIG_MACH_WRT350N_V2=y
181CONFIG_MACH_TS78XX=y 182CONFIG_MACH_TS78XX=y
182CONFIG_MACH_MV2120=y 183CONFIG_MACH_MV2120=y
184CONFIG_MACH_EDMINI_V2=y
183CONFIG_MACH_MSS2=y 185CONFIG_MACH_MSS2=y
184CONFIG_MACH_WNR854T=y 186CONFIG_MACH_WNR854T=y
185CONFIG_MACH_RD88F5181L_GE=y 187CONFIG_MACH_RD88F5181L_GE=y
186CONFIG_MACH_RD88F5181L_FXO=y 188CONFIG_MACH_RD88F5181L_FXO=y
189CONFIG_MACH_RD88F6183AP_GE=y
187 190
188# 191#
189# Boot options 192# Boot options
diff --git a/arch/arm/mach-kirkwood/addr-map.c b/arch/arm/mach-kirkwood/addr-map.c
index c79f492072f9..5db4f0bbe5ee 100644
--- a/arch/arm/mach-kirkwood/addr-map.c
+++ b/arch/arm/mach-kirkwood/addr-map.c
@@ -48,6 +48,7 @@
48 48
49 49
50struct mbus_dram_target_info kirkwood_mbus_dram_info; 50struct mbus_dram_target_info kirkwood_mbus_dram_info;
51static int __initdata win_alloc_count;
51 52
52static int __init cpu_win_can_remap(int win) 53static int __init cpu_win_can_remap(int win)
53{ 54{
@@ -111,6 +112,8 @@ void __init kirkwood_setup_cpu_mbus(void)
111 setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE, 112 setup_cpu_win(2, KIRKWOOD_NAND_MEM_PHYS_BASE, KIRKWOOD_NAND_MEM_SIZE,
112 TARGET_DEV_BUS, ATTR_DEV_NAND, -1); 113 TARGET_DEV_BUS, ATTR_DEV_NAND, -1);
113 114
115 win_alloc_count = 3;
116
114 /* 117 /*
115 * Setup MBUS dram target info. 118 * Setup MBUS dram target info.
116 */ 119 */
@@ -137,3 +140,8 @@ void __init kirkwood_setup_cpu_mbus(void)
137 } 140 }
138 kirkwood_mbus_dram_info.num_cs = cs; 141 kirkwood_mbus_dram_info.num_cs = cs;
139} 142}
143
144void __init kirkwood_setup_sram_win(u32 base, u32 size)
145{
146 setup_cpu_win(win_alloc_count++, base, size, 0x03, 0x00, -1);
147}
diff --git a/arch/arm/mach-kirkwood/common.c b/arch/arm/mach-kirkwood/common.c
index 189f16f3619d..85cad05d8c5b 100644
--- a/arch/arm/mach-kirkwood/common.c
+++ b/arch/arm/mach-kirkwood/common.c
@@ -98,7 +98,6 @@ void __init kirkwood_ehci_init(void)
98 * GE00 98 * GE00
99 ****************************************************************************/ 99 ****************************************************************************/
100struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = { 100struct mv643xx_eth_shared_platform_data kirkwood_ge00_shared_data = {
101 .t_clk = KIRKWOOD_TCLK,
102 .dram = &kirkwood_mbus_dram_info, 101 .dram = &kirkwood_mbus_dram_info,
103}; 102};
104 103
@@ -108,6 +107,11 @@ static struct resource kirkwood_ge00_shared_resources[] = {
108 .start = GE00_PHYS_BASE + 0x2000, 107 .start = GE00_PHYS_BASE + 0x2000,
109 .end = GE00_PHYS_BASE + 0x3fff, 108 .end = GE00_PHYS_BASE + 0x3fff,
110 .flags = IORESOURCE_MEM, 109 .flags = IORESOURCE_MEM,
110 }, {
111 .name = "ge00 err irq",
112 .start = IRQ_KIRKWOOD_GE00_ERR,
113 .end = IRQ_KIRKWOOD_GE00_ERR,
114 .flags = IORESOURCE_IRQ,
111 }, 115 },
112}; 116};
113 117
@@ -117,7 +121,7 @@ static struct platform_device kirkwood_ge00_shared = {
117 .dev = { 121 .dev = {
118 .platform_data = &kirkwood_ge00_shared_data, 122 .platform_data = &kirkwood_ge00_shared_data,
119 }, 123 },
120 .num_resources = 1, 124 .num_resources = ARRAY_SIZE(kirkwood_ge00_shared_resources),
121 .resource = kirkwood_ge00_shared_resources, 125 .resource = kirkwood_ge00_shared_resources,
122}; 126};
123 127
@@ -201,7 +205,6 @@ void __init kirkwood_sata_init(struct mv_sata_platform_data *sata_data)
201 * SPI 205 * SPI
202 ****************************************************************************/ 206 ****************************************************************************/
203static struct orion_spi_info kirkwood_spi_plat_data = { 207static struct orion_spi_info kirkwood_spi_plat_data = {
204 .tclk = KIRKWOOD_TCLK,
205}; 208};
206 209
207static struct resource kirkwood_spi_resources[] = { 210static struct resource kirkwood_spi_resources[] = {
@@ -239,7 +242,7 @@ static struct plat_serial8250_port kirkwood_uart0_data[] = {
239 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 242 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
240 .iotype = UPIO_MEM, 243 .iotype = UPIO_MEM,
241 .regshift = 2, 244 .regshift = 2,
242 .uartclk = KIRKWOOD_TCLK, 245 .uartclk = 0,
243 }, { 246 }, {
244 }, 247 },
245}; 248};
@@ -283,7 +286,7 @@ static struct plat_serial8250_port kirkwood_uart1_data[] = {
283 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 286 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
284 .iotype = UPIO_MEM, 287 .iotype = UPIO_MEM,
285 .regshift = 2, 288 .regshift = 2,
286 .uartclk = KIRKWOOD_TCLK, 289 .uartclk = 0,
287 }, { 290 }, {
288 }, 291 },
289}; 292};
@@ -525,9 +528,23 @@ void __init kirkwood_xor1_init(void)
525/***************************************************************************** 528/*****************************************************************************
526 * Time handling 529 * Time handling
527 ****************************************************************************/ 530 ****************************************************************************/
531int kirkwood_tclk;
532
533int __init kirkwood_find_tclk(void)
534{
535 u32 dev, rev;
536
537 kirkwood_pcie_id(&dev, &rev);
538 if (dev == MV88F6281_DEV_ID && rev == MV88F6281_REV_A0)
539 return 200000000;
540
541 return 166666667;
542}
543
528static void kirkwood_timer_init(void) 544static void kirkwood_timer_init(void)
529{ 545{
530 orion_time_init(IRQ_KIRKWOOD_BRIDGE, KIRKWOOD_TCLK); 546 kirkwood_tclk = kirkwood_find_tclk();
547 orion_time_init(IRQ_KIRKWOOD_BRIDGE, kirkwood_tclk);
531} 548}
532 549
533struct sys_timer kirkwood_timer = { 550struct sys_timer kirkwood_timer = {
@@ -538,33 +555,62 @@ struct sys_timer kirkwood_timer = {
538/***************************************************************************** 555/*****************************************************************************
539 * General 556 * General
540 ****************************************************************************/ 557 ****************************************************************************/
558/*
559 * Identify device ID and revision.
560 */
541static char * __init kirkwood_id(void) 561static char * __init kirkwood_id(void)
542{ 562{
543 switch (readl(DEVICE_ID) & 0x3) { 563 u32 dev, rev;
544 case 0: 564
545 return "88F6180"; 565 kirkwood_pcie_id(&dev, &rev);
546 case 1: 566
547 return "88F6192"; 567 if (dev == MV88F6281_DEV_ID) {
548 case 2: 568 if (rev == MV88F6281_REV_Z0)
549 return "88F6281"; 569 return "MV88F6281-Z0";
570 else if (rev == MV88F6281_REV_A0)
571 return "MV88F6281-A0";
572 else
573 return "MV88F6281-Rev-Unsupported";
574 } else if (dev == MV88F6192_DEV_ID) {
575 if (rev == MV88F6192_REV_Z0)
576 return "MV88F6192-Z0";
577 else if (rev == MV88F6192_REV_A0)
578 return "MV88F6192-A0";
579 else
580 return "MV88F6192-Rev-Unsupported";
581 } else if (dev == MV88F6180_DEV_ID) {
582 if (rev == MV88F6180_REV_A0)
583 return "MV88F6180-Rev-A0";
584 else
585 return "MV88F6180-Rev-Unsupported";
586 } else {
587 return "Device-Unknown";
550 } 588 }
551
552 return "unknown 88F6000 variant";
553} 589}
554 590
555static int __init is_l2_writethrough(void) 591static void __init kirkwood_l2_init(void)
556{ 592{
557 return !!(readl(L2_CONFIG_REG) & L2_WRITETHROUGH); 593#ifdef CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH
594 writel(readl(L2_CONFIG_REG) | L2_WRITETHROUGH, L2_CONFIG_REG);
595 feroceon_l2_init(1);
596#else
597 writel(readl(L2_CONFIG_REG) & ~L2_WRITETHROUGH, L2_CONFIG_REG);
598 feroceon_l2_init(0);
599#endif
558} 600}
559 601
560void __init kirkwood_init(void) 602void __init kirkwood_init(void)
561{ 603{
562 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n", 604 printk(KERN_INFO "Kirkwood: %s, TCLK=%d.\n",
563 kirkwood_id(), KIRKWOOD_TCLK); 605 kirkwood_id(), kirkwood_tclk);
606 kirkwood_ge00_shared_data.t_clk = kirkwood_tclk;
607 kirkwood_spi_plat_data.tclk = kirkwood_tclk;
608 kirkwood_uart0_data[0].uartclk = kirkwood_tclk;
609 kirkwood_uart1_data[0].uartclk = kirkwood_tclk;
564 610
565 kirkwood_setup_cpu_mbus(); 611 kirkwood_setup_cpu_mbus();
566 612
567#ifdef CONFIG_CACHE_FEROCEON_L2 613#ifdef CONFIG_CACHE_FEROCEON_L2
568 feroceon_l2_init(is_l2_writethrough()); 614 kirkwood_l2_init();
569#endif 615#endif
570} 616}
diff --git a/arch/arm/mach-kirkwood/common.h b/arch/arm/mach-kirkwood/common.h
index 69cd113af03a..8fa0f6a27635 100644
--- a/arch/arm/mach-kirkwood/common.h
+++ b/arch/arm/mach-kirkwood/common.h
@@ -23,10 +23,9 @@ void kirkwood_init_irq(void);
23 23
24extern struct mbus_dram_target_info kirkwood_mbus_dram_info; 24extern struct mbus_dram_target_info kirkwood_mbus_dram_info;
25void kirkwood_setup_cpu_mbus(void); 25void kirkwood_setup_cpu_mbus(void);
26void kirkwood_setup_pcie_io_win(int window, u32 base, u32 size, 26void kirkwood_setup_sram_win(u32 base, u32 size);
27 int maj, int min); 27
28void kirkwood_setup_pcie_mem_win(int window, u32 base, u32 size, 28void kirkwood_pcie_id(u32 *dev, u32 *rev);
29 int maj, int min);
30 29
31void kirkwood_ehci_init(void); 30void kirkwood_ehci_init(void);
32void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data); 31void kirkwood_ge00_init(struct mv643xx_eth_platform_data *eth_data);
diff --git a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
index 610fb24d8ae2..89d746d13fda 100644
--- a/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
+++ b/arch/arm/mach-kirkwood/db88f6281-bp-setup.c
@@ -44,7 +44,6 @@ static void __init db88f6281_init(void)
44 kirkwood_rtc_init(); 44 kirkwood_rtc_init();
45 kirkwood_sata_init(&db88f6281_sata_data); 45 kirkwood_sata_init(&db88f6281_sata_data);
46 kirkwood_uart0_init(); 46 kirkwood_uart0_init();
47 kirkwood_uart1_init();
48} 47}
49 48
50static int __init db88f6281_pci_init(void) 49static int __init db88f6281_pci_init(void)
diff --git a/arch/arm/mach-kirkwood/include/mach/irqs.h b/arch/arm/mach-kirkwood/include/mach/irqs.h
index 6fd05838c72d..ffab89f21c11 100644
--- a/arch/arm/mach-kirkwood/include/mach/irqs.h
+++ b/arch/arm/mach-kirkwood/include/mach/irqs.h
@@ -50,6 +50,7 @@
50#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39 50#define IRQ_KIRKWOOD_GPIO_HIGH_0_7 39
51#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40 51#define IRQ_KIRKWOOD_GPIO_HIGH_8_15 40
52#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41 52#define IRQ_KIRKWOOD_GPIO_HIGH_16_23 41
53#define IRQ_KIRKWOOD_GE00_ERR 46
53 54
54/* 55/*
55 * KIRKWOOD General Purpose Pins 56 * KIRKWOOD General Purpose Pins
diff --git a/arch/arm/mach-kirkwood/include/mach/kirkwood.h b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
index 5c69992295e8..eae42406fd86 100644
--- a/arch/arm/mach-kirkwood/include/mach/kirkwood.h
+++ b/arch/arm/mach-kirkwood/include/mach/kirkwood.h
@@ -68,6 +68,20 @@
68#define L2_WRITETHROUGH 0x00000010 68#define L2_WRITETHROUGH 0x00000010
69 69
70/* 70/*
71 * Supported devices and revisions.
72 */
73#define MV88F6281_DEV_ID 0x6281
74#define MV88F6281_REV_Z0 0
75#define MV88F6281_REV_A0 2
76
77#define MV88F6192_DEV_ID 0x6192
78#define MV88F6192_REV_Z0 0
79#define MV88F6192_REV_A0 2
80
81#define MV88F6180_DEV_ID 0x6180
82#define MV88F6180_REV_A0 2
83
84/*
71 * Register Map 85 * Register Map
72 */ 86 */
73#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000) 87#define DDR_VIRT_BASE (KIRKWOOD_REGS_VIRT_BASE | 0x00000)
diff --git a/arch/arm/mach-kirkwood/include/mach/timex.h b/arch/arm/mach-kirkwood/include/mach/timex.h
index f77ef4a32c5f..c923cd169b9c 100644
--- a/arch/arm/mach-kirkwood/include/mach/timex.h
+++ b/arch/arm/mach-kirkwood/include/mach/timex.h
@@ -8,4 +8,3 @@
8 8
9#define CLOCK_TICK_RATE (100 * HZ) 9#define CLOCK_TICK_RATE (100 * HZ)
10 10
11#define KIRKWOOD_TCLK 166666667
diff --git a/arch/arm/mach-kirkwood/pcie.c b/arch/arm/mach-kirkwood/pcie.c
index 2195fa31f6b7..f6b08f207c89 100644
--- a/arch/arm/mach-kirkwood/pcie.c
+++ b/arch/arm/mach-kirkwood/pcie.c
@@ -18,6 +18,12 @@
18 18
19#define PCIE_BASE ((void __iomem *)PCIE_VIRT_BASE) 19#define PCIE_BASE ((void __iomem *)PCIE_VIRT_BASE)
20 20
21void __init kirkwood_pcie_id(u32 *dev, u32 *rev)
22{
23 *dev = orion_pcie_dev_id(PCIE_BASE);
24 *rev = orion_pcie_rev(PCIE_BASE);
25}
26
21static int pcie_valid_config(int bus, int dev) 27static int pcie_valid_config(int bus, int dev)
22{ 28{
23 /* 29 /*
diff --git a/arch/arm/mach-kirkwood/rd88f6281-setup.c b/arch/arm/mach-kirkwood/rd88f6281-setup.c
index d96487a0f18b..fb8990f9770d 100644
--- a/arch/arm/mach-kirkwood/rd88f6281-setup.c
+++ b/arch/arm/mach-kirkwood/rd88f6281-setup.c
@@ -90,7 +90,6 @@ static void __init rd88f6281_init(void)
90 kirkwood_rtc_init(); 90 kirkwood_rtc_init();
91 kirkwood_sata_init(&rd88f6281_sata_data); 91 kirkwood_sata_init(&rd88f6281_sata_data);
92 kirkwood_uart0_init(); 92 kirkwood_uart0_init();
93 kirkwood_uart1_init();
94 93
95 platform_device_register(&rd88f6281_nand_flash); 94 platform_device_register(&rd88f6281_nand_flash);
96} 95}
diff --git a/arch/arm/mach-mv78xx0/common.c b/arch/arm/mach-mv78xx0/common.c
index 953a26c469cb..d56a05e8356b 100644
--- a/arch/arm/mach-mv78xx0/common.c
+++ b/arch/arm/mach-mv78xx0/common.c
@@ -285,6 +285,11 @@ static struct resource mv78xx0_ge00_shared_resources[] = {
285 .start = GE00_PHYS_BASE + 0x2000, 285 .start = GE00_PHYS_BASE + 0x2000,
286 .end = GE00_PHYS_BASE + 0x3fff, 286 .end = GE00_PHYS_BASE + 0x3fff,
287 .flags = IORESOURCE_MEM, 287 .flags = IORESOURCE_MEM,
288 }, {
289 .name = "ge err irq",
290 .start = IRQ_MV78XX0_GE_ERR,
291 .end = IRQ_MV78XX0_GE_ERR,
292 .flags = IORESOURCE_IRQ,
288 }, 293 },
289}; 294};
290 295
@@ -294,7 +299,7 @@ static struct platform_device mv78xx0_ge00_shared = {
294 .dev = { 299 .dev = {
295 .platform_data = &mv78xx0_ge00_shared_data, 300 .platform_data = &mv78xx0_ge00_shared_data,
296 }, 301 },
297 .num_resources = 1, 302 .num_resources = ARRAY_SIZE(mv78xx0_ge00_shared_resources),
298 .resource = mv78xx0_ge00_shared_resources, 303 .resource = mv78xx0_ge00_shared_resources,
299}; 304};
300 305
diff --git a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
index ed4a46bcd3b0..fbfb2693ce6c 100644
--- a/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
+++ b/arch/arm/mach-mv78xx0/include/mach/entry-macro.S
@@ -26,14 +26,22 @@
26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF] 26 ldr \tmp, [\base, #IRQ_MASK_LOW_OFF]
27 mov \irqnr, #31 27 mov \irqnr, #31
28 ands \irqstat, \irqstat, \tmp 28 ands \irqstat, \irqstat, \tmp
29 bne 1001f
29 30
30 @ if no low interrupts set, check high interrupts 31 @ if no low interrupts set, check high interrupts
31 ldreq \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF] 32 ldr \irqstat, [\base, #IRQ_CAUSE_HIGH_OFF]
32 ldreq \tmp, [\base, #IRQ_MASK_HIGH_OFF] 33 ldr \tmp, [\base, #IRQ_MASK_HIGH_OFF]
33 moveq \irqnr, #63 34 mov \irqnr, #63
34 andeqs \irqstat, \irqstat, \tmp 35 ands \irqstat, \irqstat, \tmp
36 bne 1001f
37
38 @ if no high interrupts set, check error interrupts
39 ldr \irqstat, [\base, #IRQ_CAUSE_ERR_OFF]
40 ldr \tmp, [\base, #IRQ_MASK_ERR_OFF]
41 mov \irqnr, #95
42 ands \irqstat, \irqstat, \tmp
35 43
36 @ find first active interrupt source 44 @ find first active interrupt source
37 clzne \irqstat, \irqstat 451001: clzne \irqstat, \irqstat
38 subne \irqnr, \irqnr, \irqstat 46 subne \irqnr, \irqnr, \irqstat
39 .endm 47 .endm
diff --git a/arch/arm/mach-mv78xx0/include/mach/irqs.h b/arch/arm/mach-mv78xx0/include/mach/irqs.h
index 995d7fb8d06f..bebc330281ec 100644
--- a/arch/arm/mach-mv78xx0/include/mach/irqs.h
+++ b/arch/arm/mach-mv78xx0/include/mach/irqs.h
@@ -80,9 +80,14 @@
80#define IRQ_MV78XX0_DB_OUT 61 80#define IRQ_MV78XX0_DB_OUT 61
81 81
82/* 82/*
83 * MV78xx0 Error Interrupt Controller
84 */
85#define IRQ_MV78XX0_GE_ERR 70
86
87/*
83 * MV78XX0 General Purpose Pins 88 * MV78XX0 General Purpose Pins
84 */ 89 */
85#define IRQ_MV78XX0_GPIO_START 64 90#define IRQ_MV78XX0_GPIO_START 96
86#define NR_GPIO_IRQS GPIO_MAX 91#define NR_GPIO_IRQS GPIO_MAX
87 92
88#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS) 93#define NR_IRQS (IRQ_MV78XX0_GPIO_START + NR_GPIO_IRQS)
diff --git a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
index ad664178d6e1..ee9c5593ee92 100644
--- a/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
+++ b/arch/arm/mach-mv78xx0/include/mach/mv78xx0.h
@@ -71,8 +71,10 @@
71#define BRIDGE_INT_TIMER1 0x0004 71#define BRIDGE_INT_TIMER1 0x0004
72#define BRIDGE_INT_TIMER1_CLR (~0x0004) 72#define BRIDGE_INT_TIMER1_CLR (~0x0004)
73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200) 73#define IRQ_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0200)
74#define IRQ_CAUSE_ERR_OFF 0x0000
74#define IRQ_CAUSE_LOW_OFF 0x0004 75#define IRQ_CAUSE_LOW_OFF 0x0004
75#define IRQ_CAUSE_HIGH_OFF 0x0008 76#define IRQ_CAUSE_HIGH_OFF 0x0008
77#define IRQ_MASK_ERR_OFF 0x000c
76#define IRQ_MASK_LOW_OFF 0x0010 78#define IRQ_MASK_LOW_OFF 0x0010
77#define IRQ_MASK_HIGH_OFF 0x0014 79#define IRQ_MASK_HIGH_OFF 0x0014
78#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300) 80#define TIMER_VIRT_BASE (BRIDGE_VIRT_BASE | 0x0300)
diff --git a/arch/arm/mach-mv78xx0/irq.c b/arch/arm/mach-mv78xx0/irq.c
index 28248d37b999..503e5d195ae5 100644
--- a/arch/arm/mach-mv78xx0/irq.c
+++ b/arch/arm/mach-mv78xx0/irq.c
@@ -19,4 +19,5 @@ void __init mv78xx0_init_irq(void)
19{ 19{
20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF)); 20 orion_irq_init(0, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_LOW_OFF));
21 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF)); 21 orion_irq_init(32, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_HIGH_OFF));
22 orion_irq_init(64, (void __iomem *)(IRQ_VIRT_BASE + IRQ_MASK_ERR_OFF));
22} 23}
diff --git a/arch/arm/mach-orion5x/Kconfig b/arch/arm/mach-orion5x/Kconfig
index ddcd41b15d17..f59a8d0e0824 100644
--- a/arch/arm/mach-orion5x/Kconfig
+++ b/arch/arm/mach-orion5x/Kconfig
@@ -36,6 +36,12 @@ config MACH_TS209
36 Say 'Y' here if you want your kernel to support the 36 Say 'Y' here if you want your kernel to support the
37 QNAP TS-109/TS-209 platform. 37 QNAP TS-109/TS-209 platform.
38 38
39config MACH_TERASTATION_PRO2
40 bool "Buffalo Terastation Pro II/Live"
41 help
42 Say 'Y' here if you want your kernel to support the
43 Buffalo Terastation Pro II/Live platform.
44
39config MACH_LINKSTATION_PRO 45config MACH_LINKSTATION_PRO
40 bool "Buffalo Linkstation Pro/Live" 46 bool "Buffalo Linkstation Pro/Live"
41 select I2C_BOARDINFO 47 select I2C_BOARDINFO
@@ -44,6 +50,13 @@ config MACH_LINKSTATION_PRO
44 Buffalo Linkstation Pro/Live platform. Both v1 and 50 Buffalo Linkstation Pro/Live platform. Both v1 and
45 v2 devices are supported. 51 v2 devices are supported.
46 52
53config MACH_LINKSTATION_MINI
54 bool "Buffalo Linkstation Mini"
55 select I2C_BOARDINFO
56 help
57 Say 'Y' here if you want your kernel to support the
58 Buffalo Linkstation Mini platform.
59
47config MACH_TS409 60config MACH_TS409
48 bool "QNAP TS-409" 61 bool "QNAP TS-409"
49 help 62 help
@@ -68,6 +81,13 @@ config MACH_MV2120
68 Say 'Y' here if you want your kernel to support the 81 Say 'Y' here if you want your kernel to support the
69 HP Media Vault mv2120 or mv5100. 82 HP Media Vault mv2120 or mv5100.
70 83
84config MACH_EDMINI_V2
85 bool "LaCie Ethernet Disk mini V2"
86 select I2C_BOARDINFO
87 help
88 Say 'Y' here if you want your kernel to support the
89 LaCie Ethernet Disk mini V2.
90
71config MACH_MSS2 91config MACH_MSS2
72 bool "Maxtor Shared Storage II" 92 bool "Maxtor Shared Storage II"
73 help 93 help
@@ -92,6 +112,12 @@ config MACH_RD88F5181L_FXO
92 Say 'Y' here if you want your kernel to support the 112 Say 'Y' here if you want your kernel to support the
93 Marvell Orion-VoIP FXO (88F5181L) RD. 113 Marvell Orion-VoIP FXO (88F5181L) RD.
94 114
115config MACH_RD88F6183AP_GE
116 bool "Marvell Orion-1-90 AP GE Reference Design"
117 help
118 Say 'Y' here if you want your kernel to support the
119 Marvell Orion-1-90 (88F6183) AP GE RD.
120
95endmenu 121endmenu
96 122
97endif 123endif
diff --git a/arch/arm/mach-orion5x/Makefile b/arch/arm/mach-orion5x/Makefile
index fcc48a8864f3..3d4a1bc12355 100644
--- a/arch/arm/mach-orion5x/Makefile
+++ b/arch/arm/mach-orion5x/Makefile
@@ -2,14 +2,18 @@ obj-y += common.o addr-map.o pci.o gpio.o irq.o mpp.o
2obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o 2obj-$(CONFIG_MACH_DB88F5281) += db88f5281-setup.o
3obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o 3obj-$(CONFIG_MACH_RD88F5182) += rd88f5182-setup.o
4obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o 4obj-$(CONFIG_MACH_KUROBOX_PRO) += kurobox_pro-setup.o
5obj-$(CONFIG_MACH_TERASTATION_PRO2) += terastation_pro2-setup.o
5obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o 6obj-$(CONFIG_MACH_LINKSTATION_PRO) += kurobox_pro-setup.o
7obj-$(CONFIG_MACH_LINKSTATION_MINI) += lsmini-setup.o
6obj-$(CONFIG_MACH_DNS323) += dns323-setup.o 8obj-$(CONFIG_MACH_DNS323) += dns323-setup.o
7obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o 9obj-$(CONFIG_MACH_TS209) += ts209-setup.o tsx09-common.o
8obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o 10obj-$(CONFIG_MACH_TS409) += ts409-setup.o tsx09-common.o
9obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o 11obj-$(CONFIG_MACH_WRT350N_V2) += wrt350n-v2-setup.o
10obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o 12obj-$(CONFIG_MACH_TS78XX) += ts78xx-setup.o
11obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o 13obj-$(CONFIG_MACH_MV2120) += mv2120-setup.o
14obj-$(CONFIG_MACH_EDMINI_V2) += edmini_v2-setup.o
12obj-$(CONFIG_MACH_MSS2) += mss2-setup.o 15obj-$(CONFIG_MACH_MSS2) += mss2-setup.o
13obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o 16obj-$(CONFIG_MACH_WNR854T) += wnr854t-setup.o
14obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o 17obj-$(CONFIG_MACH_RD88F5181L_GE) += rd88f5181l-ge-setup.o
15obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o 18obj-$(CONFIG_MACH_RD88F5181L_FXO) += rd88f5181l-fxo-setup.o
19obj-$(CONFIG_MACH_RD88F6183AP_GE) += rd88f6183ap-ge-setup.o
diff --git a/arch/arm/mach-orion5x/common.c b/arch/arm/mach-orion5x/common.c
index 7b11e552bc5a..9625ef5975d0 100644
--- a/arch/arm/mach-orion5x/common.c
+++ b/arch/arm/mach-orion5x/common.c
@@ -18,6 +18,7 @@
18#include <linux/mv643xx_eth.h> 18#include <linux/mv643xx_eth.h>
19#include <linux/mv643xx_i2c.h> 19#include <linux/mv643xx_i2c.h>
20#include <linux/ata_platform.h> 20#include <linux/ata_platform.h>
21#include <linux/spi/orion_spi.h>
21#include <asm/page.h> 22#include <asm/page.h>
22#include <asm/setup.h> 23#include <asm/setup.h>
23#include <asm/timex.h> 24#include <asm/timex.h>
@@ -146,7 +147,6 @@ void __init orion5x_ehci1_init(void)
146 ****************************************************************************/ 147 ****************************************************************************/
147struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = { 148struct mv643xx_eth_shared_platform_data orion5x_eth_shared_data = {
148 .dram = &orion5x_mbus_dram_info, 149 .dram = &orion5x_mbus_dram_info,
149 .t_clk = ORION5X_TCLK,
150}; 150};
151 151
152static struct resource orion5x_eth_shared_resources[] = { 152static struct resource orion5x_eth_shared_resources[] = {
@@ -154,6 +154,10 @@ static struct resource orion5x_eth_shared_resources[] = {
154 .start = ORION5X_ETH_PHYS_BASE + 0x2000, 154 .start = ORION5X_ETH_PHYS_BASE + 0x2000,
155 .end = ORION5X_ETH_PHYS_BASE + 0x3fff, 155 .end = ORION5X_ETH_PHYS_BASE + 0x3fff,
156 .flags = IORESOURCE_MEM, 156 .flags = IORESOURCE_MEM,
157 }, {
158 .start = IRQ_ORION5X_ETH_ERR,
159 .end = IRQ_ORION5X_ETH_ERR,
160 .flags = IORESOURCE_IRQ,
157 }, 161 },
158}; 162};
159 163
@@ -163,7 +167,7 @@ static struct platform_device orion5x_eth_shared = {
163 .dev = { 167 .dev = {
164 .platform_data = &orion5x_eth_shared_data, 168 .platform_data = &orion5x_eth_shared_data,
165 }, 169 },
166 .num_resources = 1, 170 .num_resources = ARRAY_SIZE(orion5x_eth_shared_resources),
167 .resource = orion5x_eth_shared_resources, 171 .resource = orion5x_eth_shared_resources,
168}; 172};
169 173
@@ -268,6 +272,38 @@ void __init orion5x_sata_init(struct mv_sata_platform_data *sata_data)
268 272
269 273
270/***************************************************************************** 274/*****************************************************************************
275 * SPI
276 ****************************************************************************/
277static struct orion_spi_info orion5x_spi_plat_data = {
278 .tclk = 0,
279};
280
281static struct resource orion5x_spi_resources[] = {
282 {
283 .name = "spi base",
284 .start = SPI_PHYS_BASE,
285 .end = SPI_PHYS_BASE + 0x1f,
286 .flags = IORESOURCE_MEM,
287 },
288};
289
290static struct platform_device orion5x_spi = {
291 .name = "orion_spi",
292 .id = 0,
293 .dev = {
294 .platform_data = &orion5x_spi_plat_data,
295 },
296 .num_resources = ARRAY_SIZE(orion5x_spi_resources),
297 .resource = orion5x_spi_resources,
298};
299
300void __init orion5x_spi_init()
301{
302 platform_device_register(&orion5x_spi);
303}
304
305
306/*****************************************************************************
271 * UART0 307 * UART0
272 ****************************************************************************/ 308 ****************************************************************************/
273static struct plat_serial8250_port orion5x_uart0_data[] = { 309static struct plat_serial8250_port orion5x_uart0_data[] = {
@@ -278,7 +314,7 @@ static struct plat_serial8250_port orion5x_uart0_data[] = {
278 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 314 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
279 .iotype = UPIO_MEM, 315 .iotype = UPIO_MEM,
280 .regshift = 2, 316 .regshift = 2,
281 .uartclk = ORION5X_TCLK, 317 .uartclk = 0,
282 }, { 318 }, {
283 }, 319 },
284}; 320};
@@ -322,7 +358,7 @@ static struct plat_serial8250_port orion5x_uart1_data[] = {
322 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, 358 .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF,
323 .iotype = UPIO_MEM, 359 .iotype = UPIO_MEM,
324 .regshift = 2, 360 .regshift = 2,
325 .uartclk = ORION5X_TCLK, 361 .uartclk = 0,
326 }, { 362 }, {
327 }, 363 },
328}; 364};
@@ -455,9 +491,24 @@ void __init orion5x_xor_init(void)
455/***************************************************************************** 491/*****************************************************************************
456 * Time handling 492 * Time handling
457 ****************************************************************************/ 493 ****************************************************************************/
494int orion5x_tclk;
495
496int __init orion5x_find_tclk(void)
497{
498 u32 dev, rev;
499
500 orion5x_pcie_id(&dev, &rev);
501 if (dev == MV88F6183_DEV_ID &&
502 (readl(MPP_RESET_SAMPLE) & 0x00000200) == 0)
503 return 133333333;
504
505 return 166666667;
506}
507
458static void orion5x_timer_init(void) 508static void orion5x_timer_init(void)
459{ 509{
460 orion_time_init(IRQ_ORION5X_BRIDGE, ORION5X_TCLK); 510 orion5x_tclk = orion5x_find_tclk();
511 orion_time_init(IRQ_ORION5X_BRIDGE, orion5x_tclk);
461} 512}
462 513
463struct sys_timer orion5x_timer = { 514struct sys_timer orion5x_timer = {
@@ -499,6 +550,12 @@ static void __init orion5x_id(u32 *dev, u32 *rev, char **dev_name)
499 } else { 550 } else {
500 *dev_name = "MV88F5181(L)-Rev-Unsupported"; 551 *dev_name = "MV88F5181(L)-Rev-Unsupported";
501 } 552 }
553 } else if (*dev == MV88F6183_DEV_ID) {
554 if (*rev == MV88F6183_REV_B0) {
555 *dev_name = "MV88F6183-Rev-B0";
556 } else {
557 *dev_name = "MV88F6183-Rev-Unsupported";
558 }
502 } else { 559 } else {
503 *dev_name = "Device-Unknown"; 560 *dev_name = "Device-Unknown";
504 } 561 }
@@ -510,7 +567,12 @@ void __init orion5x_init(void)
510 u32 dev, rev; 567 u32 dev, rev;
511 568
512 orion5x_id(&dev, &rev, &dev_name); 569 orion5x_id(&dev, &rev, &dev_name);
513 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, ORION5X_TCLK); 570 printk(KERN_INFO "Orion ID: %s. TCLK=%d.\n", dev_name, orion5x_tclk);
571
572 orion5x_eth_shared_data.t_clk = orion5x_tclk;
573 orion5x_spi_plat_data.tclk = orion5x_tclk;
574 orion5x_uart0_data[0].uartclk = orion5x_tclk;
575 orion5x_uart1_data[0].uartclk = orion5x_tclk;
514 576
515 /* 577 /*
516 * Setup Orion address map 578 * Setup Orion address map
diff --git a/arch/arm/mach-orion5x/common.h b/arch/arm/mach-orion5x/common.h
index 0bd195551a27..1f8b2da676a5 100644
--- a/arch/arm/mach-orion5x/common.h
+++ b/arch/arm/mach-orion5x/common.h
@@ -10,6 +10,7 @@ struct mv_sata_platform_data;
10void orion5x_map_io(void); 10void orion5x_map_io(void);
11void orion5x_init_irq(void); 11void orion5x_init_irq(void);
12void orion5x_init(void); 12void orion5x_init(void);
13extern int orion5x_tclk;
13extern struct sys_timer orion5x_timer; 14extern struct sys_timer orion5x_timer;
14 15
15/* 16/*
@@ -30,6 +31,7 @@ void orion5x_ehci1_init(void);
30void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data); 31void orion5x_eth_init(struct mv643xx_eth_platform_data *eth_data);
31void orion5x_i2c_init(void); 32void orion5x_i2c_init(void);
32void orion5x_sata_init(struct mv_sata_platform_data *sata_data); 33void orion5x_sata_init(struct mv_sata_platform_data *sata_data);
34void orion5x_spi_init(void);
33void orion5x_uart0_init(void); 35void orion5x_uart0_init(void);
34void orion5x_uart1_init(void); 36void orion5x_uart1_init(void);
35void orion5x_xor_init(void); 37void orion5x_xor_init(void);
diff --git a/arch/arm/mach-orion5x/edmini_v2-setup.c b/arch/arm/mach-orion5x/edmini_v2-setup.c
new file mode 100644
index 000000000000..b24ee0c2cd61
--- /dev/null
+++ b/arch/arm/mach-orion5x/edmini_v2-setup.c
@@ -0,0 +1,262 @@
1/*
2 * arch/arm/mach-orion5x/edmini_v2-setup.c
3 *
4 * LaCie Ethernet Disk mini V2 Setup
5 *
6 * Copyright (C) 2008 Christopher Moore <moore@free.fr>
7 * Copyright (C) 2008 Albert Aribaud <albert.aribaud@free.fr>
8 *
9 * This file is licensed under the terms of the GNU General Public
10 * License version 2. This program is licensed "as is" without any
11 * warranty of any kind, whether express or implied.
12 */
13
14/*
15 * TODO: add Orion USB device port init when kernel.org support is added.
16 * TODO: add flash write support: see below.
17 * TODO: add power-off support.
18 * TODO: add I2C EEPROM support.
19 */
20
21#include <linux/kernel.h>
22#include <linux/init.h>
23#include <linux/platform_device.h>
24#include <linux/pci.h>
25#include <linux/irq.h>
26#include <linux/mtd/physmap.h>
27#include <linux/mv643xx_eth.h>
28#include <linux/leds.h>
29#include <linux/gpio_keys.h>
30#include <linux/input.h>
31#include <linux/i2c.h>
32#include <linux/ata_platform.h>
33#include <linux/gpio.h>
34#include <asm/mach-types.h>
35#include <asm/mach/arch.h>
36#include <asm/mach/pci.h>
37#include <mach/orion5x.h>
38#include "common.h"
39#include "mpp.h"
40
41/*****************************************************************************
42 * EDMINI_V2 Info
43 ****************************************************************************/
44
45/*
46 * 512KB NOR flash Device bus boot chip select
47 */
48
49#define EDMINI_V2_NOR_BOOT_BASE 0xfff80000
50#define EDMINI_V2_NOR_BOOT_SIZE SZ_512K
51
52/*****************************************************************************
53 * 512KB NOR Flash on BOOT Device
54 ****************************************************************************/
55
56/*
57 * Currently the MTD code does not recognize the MX29LV400CBCT as a bottom
58 * -type device. This could cause risks of accidentally erasing critical
59 * flash sectors. We thus define a single, write-protected partition covering
60 * the whole flash.
61 * TODO: once the flash part TOP/BOTTOM detection issue is sorted out in the MTD
62 * code, break this into at least three partitions: 'u-boot code', 'u-boot
63 * environment' and 'whatever is left'.
64 */
65
66static struct mtd_partition edmini_v2_partitions[] = {
67 {
68 .name = "Full512kb",
69 .size = 0x00080000,
70 .offset = 0x00000000,
71 .mask_flags = MTD_WRITEABLE,
72 },
73};
74
75static struct physmap_flash_data edmini_v2_nor_flash_data = {
76 .width = 1,
77 .parts = edmini_v2_partitions,
78 .nr_parts = ARRAY_SIZE(edmini_v2_partitions),
79};
80
81static struct resource edmini_v2_nor_flash_resource = {
82 .flags = IORESOURCE_MEM,
83 .start = EDMINI_V2_NOR_BOOT_BASE,
84 .end = EDMINI_V2_NOR_BOOT_BASE
85 + EDMINI_V2_NOR_BOOT_SIZE - 1,
86};
87
88static struct platform_device edmini_v2_nor_flash = {
89 .name = "physmap-flash",
90 .id = 0,
91 .dev = {
92 .platform_data = &edmini_v2_nor_flash_data,
93 },
94 .num_resources = 1,
95 .resource = &edmini_v2_nor_flash_resource,
96};
97
98/*****************************************************************************
99 * Ethernet
100 ****************************************************************************/
101
102static struct mv643xx_eth_platform_data edmini_v2_eth_data = {
103 .phy_addr = 8,
104};
105
106/*****************************************************************************
107 * RTC 5C372a on I2C bus
108 ****************************************************************************/
109
110#define EDMINIV2_RTC_GPIO 3
111
112static struct i2c_board_info __initdata edmini_v2_i2c_rtc = {
113 I2C_BOARD_INFO("rs5c372a", 0x32),
114 .irq = 0,
115};
116
117/*****************************************************************************
118 * Sata
119 ****************************************************************************/
120
121static struct mv_sata_platform_data edmini_v2_sata_data = {
122 .n_ports = 2,
123};
124
125/*****************************************************************************
126 * GPIO LED (simple - doesn't use hardware blinking support)
127 ****************************************************************************/
128
129#define EDMINI_V2_GPIO_LED_POWER 16
130
131static struct gpio_led edmini_v2_leds[] = {
132 {
133 .name = "power:blue",
134 .gpio = EDMINI_V2_GPIO_LED_POWER,
135 .active_low = 1,
136 },
137};
138
139static struct gpio_led_platform_data edmini_v2_led_data = {
140 .num_leds = ARRAY_SIZE(edmini_v2_leds),
141 .leds = edmini_v2_leds,
142};
143
144static struct platform_device edmini_v2_gpio_leds = {
145 .name = "leds-gpio",
146 .id = -1,
147 .dev = {
148 .platform_data = &edmini_v2_led_data,
149 },
150};
151
152/****************************************************************************
153 * GPIO key
154 ****************************************************************************/
155
156#define EDMINI_V2_GPIO_KEY_POWER 18
157
158static struct gpio_keys_button edmini_v2_buttons[] = {
159 {
160 .code = KEY_POWER,
161 .gpio = EDMINI_V2_GPIO_KEY_POWER,
162 .desc = "Power Button",
163 .active_low = 0,
164 },
165};
166
167static struct gpio_keys_platform_data edmini_v2_button_data = {
168 .buttons = edmini_v2_buttons,
169 .nbuttons = ARRAY_SIZE(edmini_v2_buttons),
170};
171
172static struct platform_device edmini_v2_gpio_buttons = {
173 .name = "gpio-keys",
174 .id = -1,
175 .dev = {
176 .platform_data = &edmini_v2_button_data,
177 },
178};
179
180/*****************************************************************************
181 * General Setup
182 ****************************************************************************/
183static struct orion5x_mpp_mode edminiv2_mpp_modes[] __initdata = {
184 { 0, MPP_UNUSED },
185 { 1, MPP_UNUSED },
186 { 2, MPP_UNUSED },
187 { 3, MPP_GPIO }, /* RTC interrupt */
188 { 4, MPP_UNUSED },
189 { 5, MPP_UNUSED },
190 { 6, MPP_UNUSED },
191 { 7, MPP_UNUSED },
192 { 8, MPP_UNUSED },
193 { 9, MPP_UNUSED },
194 { 10, MPP_UNUSED },
195 { 11, MPP_UNUSED },
196 { 12, MPP_SATA_LED }, /* SATA 0 presence */
197 { 13, MPP_SATA_LED }, /* SATA 1 presence */
198 { 14, MPP_SATA_LED }, /* SATA 0 active */
199 { 15, MPP_SATA_LED }, /* SATA 1 active */
200 /* 16: Power LED control (0 = On, 1 = Off) */
201 { 16, MPP_GPIO },
202 /* 17: Power LED control select (0 = CPLD, 1 = GPIO16) */
203 { 17, MPP_GPIO },
204 /* 18: Power button status (0 = Released, 1 = Pressed) */
205 { 18, MPP_GPIO },
206 { 19, MPP_UNUSED },
207 { -1 }
208};
209
210static void __init edmini_v2_init(void)
211{
212 /*
213 * Setup basic Orion functions. Need to be called early.
214 */
215 orion5x_init();
216
217 orion5x_mpp_conf(edminiv2_mpp_modes);
218
219 /*
220 * Configure peripherals.
221 */
222 orion5x_ehci0_init();
223 orion5x_eth_init(&edmini_v2_eth_data);
224 orion5x_i2c_init();
225 orion5x_sata_init(&edmini_v2_sata_data);
226 orion5x_uart0_init();
227
228 orion5x_setup_dev_boot_win(EDMINI_V2_NOR_BOOT_BASE,
229 EDMINI_V2_NOR_BOOT_SIZE);
230 platform_device_register(&edmini_v2_nor_flash);
231 platform_device_register(&edmini_v2_gpio_leds);
232 platform_device_register(&edmini_v2_gpio_buttons);
233
234 pr_notice("edmini_v2: USB device port, flash write and power-off "
235 "are not yet supported.\n");
236
237 /* Get RTC IRQ and register the chip */
238 if (gpio_request(EDMINIV2_RTC_GPIO, "rtc") == 0) {
239 if (gpio_direction_input(EDMINIV2_RTC_GPIO) == 0)
240 edmini_v2_i2c_rtc.irq = gpio_to_irq(EDMINIV2_RTC_GPIO);
241 else
242 gpio_free(EDMINIV2_RTC_GPIO);
243 }
244
245 if (edmini_v2_i2c_rtc.irq == 0)
246 pr_warning("edmini_v2: failed to get RTC IRQ\n");
247
248 i2c_register_board_info(0, &edmini_v2_i2c_rtc, 1);
249}
250
251/* Warning: LaCie use a wrong mach-type (0x20e=526) in their bootloader. */
252MACHINE_START(EDMINI_V2, "LaCie Ethernet Disk mini V2")
253 /* Maintainer: Christopher Moore <moore@free.fr> */
254 .phys_io = ORION5X_REGS_PHYS_BASE,
255 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
256 .boot_params = 0x00000100,
257 .init_machine = edmini_v2_init,
258 .map_io = orion5x_map_io,
259 .init_irq = orion5x_init_irq,
260 .timer = &orion5x_timer,
261 .fixup = tag_fixup_mem32,
262MACHINE_END
diff --git a/arch/arm/mach-orion5x/include/mach/orion5x.h b/arch/arm/mach-orion5x/include/mach/orion5x.h
index 61eb74a88862..e67c843baa02 100644
--- a/arch/arm/mach-orion5x/include/mach/orion5x.h
+++ b/arch/arm/mach-orion5x/include/mach/orion5x.h
@@ -2,7 +2,7 @@
2 * arch/arm/mach-orion5x/include/mach/orion5x.h 2 * arch/arm/mach-orion5x/include/mach/orion5x.h
3 * 3 *
4 * Generic definitions of Orion SoC flavors: 4 * Generic definitions of Orion SoC flavors:
5 * Orion-1, Orion-VoIP, Orion-NAS, and Orion-2. 5 * Orion-1, Orion-VoIP, Orion-NAS, Orion-2, and Orion-1-90.
6 * 6 *
7 * Maintainer: Tzachi Perelstein <tzachi@marvell.com> 7 * Maintainer: Tzachi Perelstein <tzachi@marvell.com>
8 * 8 *
@@ -76,6 +76,9 @@
76#define MV88F5281_REV_D0 4 76#define MV88F5281_REV_D0 4
77#define MV88F5281_REV_D1 5 77#define MV88F5281_REV_D1 5
78#define MV88F5281_REV_D2 6 78#define MV88F5281_REV_D2 6
79/* Orion-1-90 (88F6183) */
80#define MV88F6183_DEV_ID 0x6183
81#define MV88F6183_REV_B0 3
79 82
80/******************************************************************************* 83/*******************************************************************************
81 * Orion Registers Map 84 * Orion Registers Map
@@ -86,6 +89,7 @@
86#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000) 89#define ORION5X_DEV_BUS_PHYS_BASE (ORION5X_REGS_PHYS_BASE | 0x10000)
87#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000) 90#define ORION5X_DEV_BUS_VIRT_BASE (ORION5X_REGS_VIRT_BASE | 0x10000)
88#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x)) 91#define ORION5X_DEV_BUS_REG(x) (ORION5X_DEV_BUS_VIRT_BASE | (x))
92#define SPI_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x0600)
89#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000) 93#define I2C_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x1000)
90#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000) 94#define UART0_PHYS_BASE (ORION5X_DEV_BUS_PHYS_BASE | 0x2000)
91#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000) 95#define UART0_VIRT_BASE (ORION5X_DEV_BUS_VIRT_BASE | 0x2000)
diff --git a/arch/arm/mach-orion5x/include/mach/timex.h b/arch/arm/mach-orion5x/include/mach/timex.h
index e82e44db7629..4c69820e0810 100644
--- a/arch/arm/mach-orion5x/include/mach/timex.h
+++ b/arch/arm/mach-orion5x/include/mach/timex.h
@@ -9,5 +9,3 @@
9 */ 9 */
10 10
11#define CLOCK_TICK_RATE (100 * HZ) 11#define CLOCK_TICK_RATE (100 * HZ)
12
13#define ORION5X_TCLK 166666667
diff --git a/arch/arm/mach-orion5x/kurobox_pro-setup.c b/arch/arm/mach-orion5x/kurobox_pro-setup.c
index e321ec331839..c5bd54d8aa0c 100644
--- a/arch/arm/mach-orion5x/kurobox_pro-setup.c
+++ b/arch/arm/mach-orion5x/kurobox_pro-setup.c
@@ -293,7 +293,7 @@ static void kurobox_pro_power_off(void)
293 const unsigned char shutdownwait[] = {0x00, 0x0c}; 293 const unsigned char shutdownwait[] = {0x00, 0x0c};
294 const unsigned char poweroff[] = {0x00, 0x06}; 294 const unsigned char poweroff[] = {0x00, 0x06};
295 /* 38400 baud divisor */ 295 /* 38400 baud divisor */
296 const unsigned divisor = ((ORION5X_TCLK + (8 * 38400)) / (16 * 38400)); 296 const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400));
297 297
298 pr_info("%s: triggering power-off...\n", __func__); 298 pr_info("%s: triggering power-off...\n", __func__);
299 299
diff --git a/arch/arm/mach-orion5x/lsmini-setup.c b/arch/arm/mach-orion5x/lsmini-setup.c
new file mode 100644
index 000000000000..e0c43b8beb72
--- /dev/null
+++ b/arch/arm/mach-orion5x/lsmini-setup.c
@@ -0,0 +1,279 @@
1/*
2 * arch/arm/mach-orion5x/lsmini-setup.c
3 *
4 * Maintainer: Alexey Kopytko <alexey@kopytko.ru>
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/mtd/physmap.h>
16#include <linux/mv643xx_eth.h>
17#include <linux/leds.h>
18#include <linux/gpio_keys.h>
19#include <linux/input.h>
20#include <linux/i2c.h>
21#include <linux/ata_platform.h>
22#include <asm/mach-types.h>
23#include <linux/gpio.h>
24#include <asm/mach/arch.h>
25#include "common.h"
26#include "mpp.h"
27#include "include/mach/system.h"
28
29/*****************************************************************************
30 * Linkstation Mini Info
31 ****************************************************************************/
32
33/*
34 * 256K NOR flash Device bus boot chip select
35 */
36
37#define LSMINI_NOR_BOOT_BASE 0xf4000000
38#define LSMINI_NOR_BOOT_SIZE SZ_256K
39
40/*****************************************************************************
41 * 256KB NOR Flash on BOOT Device
42 ****************************************************************************/
43
44static struct physmap_flash_data lsmini_nor_flash_data = {
45 .width = 1,
46};
47
48static struct resource lsmini_nor_flash_resource = {
49 .flags = IORESOURCE_MEM,
50 .start = LSMINI_NOR_BOOT_BASE,
51 .end = LSMINI_NOR_BOOT_BASE + LSMINI_NOR_BOOT_SIZE - 1,
52};
53
54static struct platform_device lsmini_nor_flash = {
55 .name = "physmap-flash",
56 .id = 0,
57 .dev = {
58 .platform_data = &lsmini_nor_flash_data,
59 },
60 .num_resources = 1,
61 .resource = &lsmini_nor_flash_resource,
62};
63
64/*****************************************************************************
65 * Ethernet
66 ****************************************************************************/
67
68static struct mv643xx_eth_platform_data lsmini_eth_data = {
69 .phy_addr = 8,
70};
71
72/*****************************************************************************
73 * RTC 5C372a on I2C bus
74 ****************************************************************************/
75
76static struct i2c_board_info __initdata lsmini_i2c_rtc = {
77 I2C_BOARD_INFO("rs5c372a", 0x32),
78};
79
80/*****************************************************************************
81 * LEDs attached to GPIO
82 ****************************************************************************/
83
84#define LSMINI_GPIO_LED_ALARM 2
85#define LSMINI_GPIO_LED_INFO 3
86#define LSMINI_GPIO_LED_FUNC 9
87#define LSMINI_GPIO_LED_PWR 14
88
89static struct gpio_led lsmini_led_pins[] = {
90 {
91 .name = "alarm:red",
92 .gpio = LSMINI_GPIO_LED_ALARM,
93 .active_low = 1,
94 }, {
95 .name = "info:amber",
96 .gpio = LSMINI_GPIO_LED_INFO,
97 .active_low = 1,
98 }, {
99 .name = "func:blue:top",
100 .gpio = LSMINI_GPIO_LED_FUNC,
101 .active_low = 1,
102 }, {
103 .name = "power:blue:bottom",
104 .gpio = LSMINI_GPIO_LED_PWR,
105 },
106};
107
108static struct gpio_led_platform_data lsmini_led_data = {
109 .leds = lsmini_led_pins,
110 .num_leds = ARRAY_SIZE(lsmini_led_pins),
111};
112
113static struct platform_device lsmini_leds = {
114 .name = "leds-gpio",
115 .id = -1,
116 .dev = {
117 .platform_data = &lsmini_led_data,
118 },
119};
120
121/****************************************************************************
122 * GPIO Attached Keys
123 ****************************************************************************/
124
125#define LSMINI_GPIO_KEY_FUNC 15
126#define LSMINI_GPIO_KEY_POWER 18
127#define LSMINI_GPIO_KEY_AUTOPOWER 17
128
129#define LSMINI_SW_POWER 0x00
130#define LSMINI_SW_AUTOPOWER 0x01
131
132static struct gpio_keys_button lsmini_buttons[] = {
133 {
134 .code = KEY_OPTION,
135 .gpio = LSMINI_GPIO_KEY_FUNC,
136 .desc = "Function Button",
137 .active_low = 1,
138 }, {
139 .type = EV_SW,
140 .code = LSMINI_SW_POWER,
141 .gpio = LSMINI_GPIO_KEY_POWER,
142 .desc = "Power-on Switch",
143 .active_low = 1,
144 }, {
145 .type = EV_SW,
146 .code = LSMINI_SW_AUTOPOWER,
147 .gpio = LSMINI_GPIO_KEY_AUTOPOWER,
148 .desc = "Power-auto Switch",
149 .active_low = 1,
150 },
151};
152
153static struct gpio_keys_platform_data lsmini_button_data = {
154 .buttons = lsmini_buttons,
155 .nbuttons = ARRAY_SIZE(lsmini_buttons),
156};
157
158static struct platform_device lsmini_button_device = {
159 .name = "gpio-keys",
160 .id = -1,
161 .num_resources = 0,
162 .dev = {
163 .platform_data = &lsmini_button_data,
164 },
165};
166
167
168/*****************************************************************************
169 * SATA
170 ****************************************************************************/
171static struct mv_sata_platform_data lsmini_sata_data = {
172 .n_ports = 2,
173};
174
175
176/*****************************************************************************
177 * Linkstation Mini specific power off method: reboot
178 ****************************************************************************/
179/*
180 * On the Linkstation Mini, the shutdown process is following:
181 * - Userland monitors key events until the power switch goes to off position
182 * - The board reboots
183 * - U-boot starts and goes into an idle mode waiting for the user
184 * to move the switch to ON position
185 */
186
187static void lsmini_power_off(void)
188{
189 arch_reset(0);
190}
191
192
193/*****************************************************************************
194 * General Setup
195 ****************************************************************************/
196
197#define LSMINI_GPIO_USB_POWER 16
198#define LSMINI_GPIO_AUTO_POWER 17
199#define LSMINI_GPIO_POWER 18
200
201#define LSMINI_GPIO_HDD_POWER0 1
202#define LSMINI_GPIO_HDD_POWER1 19
203
204static struct orion5x_mpp_mode lsmini_mpp_modes[] __initdata = {
205 { 0, MPP_UNUSED }, /* LED_RESERVE1 (unused) */
206 { 1, MPP_GPIO }, /* HDD_PWR */
207 { 2, MPP_GPIO }, /* LED_ALARM */
208 { 3, MPP_GPIO }, /* LED_INFO */
209 { 4, MPP_UNUSED },
210 { 5, MPP_UNUSED },
211 { 6, MPP_UNUSED },
212 { 7, MPP_UNUSED },
213 { 8, MPP_UNUSED },
214 { 9, MPP_GPIO }, /* LED_FUNC */
215 { 10, MPP_UNUSED },
216 { 11, MPP_UNUSED }, /* LED_ETH (dummy) */
217 { 12, MPP_UNUSED },
218 { 13, MPP_UNUSED },
219 { 14, MPP_GPIO }, /* LED_PWR */
220 { 15, MPP_GPIO }, /* FUNC */
221 { 16, MPP_GPIO }, /* USB_PWR */
222 { 17, MPP_GPIO }, /* AUTO_POWER */
223 { 18, MPP_GPIO }, /* POWER */
224 { 19, MPP_GPIO }, /* HDD_PWR1 */
225 { -1 },
226};
227
228static void __init lsmini_init(void)
229{
230 /*
231 * Setup basic Orion functions. Need to be called early.
232 */
233 orion5x_init();
234
235 orion5x_mpp_conf(lsmini_mpp_modes);
236
237 /*
238 * Configure peripherals.
239 */
240 orion5x_ehci0_init();
241 orion5x_ehci1_init();
242 orion5x_eth_init(&lsmini_eth_data);
243 orion5x_i2c_init();
244 orion5x_sata_init(&lsmini_sata_data);
245 orion5x_uart0_init();
246 orion5x_xor_init();
247
248 orion5x_setup_dev_boot_win(LSMINI_NOR_BOOT_BASE,
249 LSMINI_NOR_BOOT_SIZE);
250 platform_device_register(&lsmini_nor_flash);
251
252 platform_device_register(&lsmini_button_device);
253
254 platform_device_register(&lsmini_leds);
255
256 i2c_register_board_info(0, &lsmini_i2c_rtc, 1);
257
258 /* enable USB power */
259 gpio_set_value(LSMINI_GPIO_USB_POWER, 1);
260
261 /* register power-off method */
262 pm_power_off = lsmini_power_off;
263
264 pr_info("%s: finished\n", __func__);
265}
266
267#ifdef CONFIG_MACH_LINKSTATION_MINI
268MACHINE_START(LINKSTATION_MINI, "Buffalo Linkstation Mini")
269 /* Maintainer: Alexey Kopytko <alexey@kopytko.ru> */
270 .phys_io = ORION5X_REGS_PHYS_BASE,
271 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
272 .boot_params = 0x00000100,
273 .init_machine = lsmini_init,
274 .map_io = orion5x_map_io,
275 .init_irq = orion5x_init_irq,
276 .timer = &orion5x_timer,
277 .fixup = tag_fixup_mem32,
278MACHINE_END
279#endif
diff --git a/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
new file mode 100644
index 000000000000..40e049539091
--- /dev/null
+++ b/arch/arm/mach-orion5x/rd88f6183ap-ge-setup.c
@@ -0,0 +1,117 @@
1/*
2 * arch/arm/mach-orion5x/rd88f6183-ap-ge-setup.c
3 *
4 * Marvell Orion-1-90 AP GE Reference Design Setup
5 *
6 * This file is licensed under the terms of the GNU General Public
7 * License version 2. This program is licensed "as is" without any
8 * warranty of any kind, whether express or implied.
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/platform_device.h>
14#include <linux/pci.h>
15#include <linux/irq.h>
16#include <linux/mtd/physmap.h>
17#include <linux/mv643xx_eth.h>
18#include <linux/spi/spi.h>
19#include <linux/spi/orion_spi.h>
20#include <linux/spi/flash.h>
21#include <linux/ethtool.h>
22#include <asm/mach-types.h>
23#include <asm/gpio.h>
24#include <asm/leds.h>
25#include <asm/mach/arch.h>
26#include <asm/mach/pci.h>
27#include <mach/orion5x.h>
28#include "common.h"
29#include "mpp.h"
30
31static struct mv643xx_eth_platform_data rd88f6183ap_ge_eth_data = {
32 .phy_addr = -1,
33 .speed = SPEED_1000,
34 .duplex = DUPLEX_FULL,
35};
36
37static struct mtd_partition rd88f6183ap_ge_partitions[] = {
38 {
39 .name = "kernel",
40 .offset = 0x00000000,
41 .size = 0x00200000,
42 }, {
43 .name = "rootfs",
44 .offset = 0x00200000,
45 .size = 0x00500000,
46 }, {
47 .name = "nvram",
48 .offset = 0x00700000,
49 .size = 0x00080000,
50 },
51};
52
53static struct flash_platform_data rd88f6183ap_ge_spi_slave_data = {
54 .type = "m25p64",
55 .nr_parts = ARRAY_SIZE(rd88f6183ap_ge_partitions),
56 .parts = rd88f6183ap_ge_partitions,
57};
58
59static struct spi_board_info __initdata rd88f6183ap_ge_spi_slave_info[] = {
60 {
61 .modalias = "m25p80",
62 .platform_data = &rd88f6183ap_ge_spi_slave_data,
63 .irq = NO_IRQ,
64 .max_speed_hz = 20000000,
65 .bus_num = 0,
66 .chip_select = 0,
67 },
68};
69
70static void __init rd88f6183ap_ge_init(void)
71{
72 /*
73 * Setup basic Orion functions. Need to be called early.
74 */
75 orion5x_init();
76
77 /*
78 * Configure peripherals.
79 */
80 orion5x_ehci0_init();
81 orion5x_eth_init(&rd88f6183ap_ge_eth_data);
82 spi_register_board_info(rd88f6183ap_ge_spi_slave_info,
83 ARRAY_SIZE(rd88f6183ap_ge_spi_slave_info));
84 orion5x_spi_init();
85 orion5x_uart0_init();
86}
87
88static struct hw_pci rd88f6183ap_ge_pci __initdata = {
89 .nr_controllers = 2,
90 .swizzle = pci_std_swizzle,
91 .setup = orion5x_pci_sys_setup,
92 .scan = orion5x_pci_sys_scan_bus,
93 .map_irq = orion5x_pci_map_irq,
94};
95
96static int __init rd88f6183ap_ge_pci_init(void)
97{
98 if (machine_is_rd88f6183ap_ge()) {
99 orion5x_pci_disable();
100 pci_common_init(&rd88f6183ap_ge_pci);
101 }
102
103 return 0;
104}
105subsys_initcall(rd88f6183ap_ge_pci_init);
106
107MACHINE_START(RD88F6183AP_GE, "Marvell Orion-1-90 AP GE Reference Design")
108 /* Maintainer: Lennert Buytenhek <buytenh@marvell.com> */
109 .phys_io = ORION5X_REGS_PHYS_BASE,
110 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
111 .boot_params = 0x00000100,
112 .init_machine = rd88f6183ap_ge_init,
113 .map_io = orion5x_map_io,
114 .init_irq = orion5x_init_irq,
115 .timer = &orion5x_timer,
116 .fixup = tag_fixup_mem32,
117MACHINE_END
diff --git a/arch/arm/mach-orion5x/terastation_pro2-setup.c b/arch/arm/mach-orion5x/terastation_pro2-setup.c
new file mode 100644
index 000000000000..0b101d7d41c2
--- /dev/null
+++ b/arch/arm/mach-orion5x/terastation_pro2-setup.c
@@ -0,0 +1,369 @@
1/*
2 * Buffalo Terastation Pro II/Live Board Setup
3 *
4 * Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <linux/pci.h>
16#include <linux/irq.h>
17#include <linux/delay.h>
18#include <linux/mtd/physmap.h>
19#include <linux/mv643xx_eth.h>
20#include <linux/i2c.h>
21#include <linux/serial_reg.h>
22#include <asm/mach-types.h>
23#include <asm/gpio.h>
24#include <asm/mach/arch.h>
25#include <asm/mach/pci.h>
26#include <mach/orion5x.h>
27#include "common.h"
28#include "mpp.h"
29
30/*****************************************************************************
31 * Terastation Pro 2/Live Info
32 ****************************************************************************/
33
34/*
35 * Terastation Pro 2 hardware :
36 * - Marvell 88F5281-D0
37 * - Marvell 88SX6042 SATA controller (PCI)
38 * - Marvell 88E1118 Gigabit Ethernet PHY
39 * - 256KB NOR flash
40 * - 128MB of DDR RAM
41 * - PCIe port (not equipped)
42 */
43
44/*
45 * 256K NOR flash Device bus boot chip select
46 */
47
48#define TSP2_NOR_BOOT_BASE 0xf4000000
49#define TSP2_NOR_BOOT_SIZE SZ_256K
50
51/*****************************************************************************
52 * 256KB NOR Flash on BOOT Device
53 ****************************************************************************/
54
55static struct physmap_flash_data tsp2_nor_flash_data = {
56 .width = 1,
57};
58
59static struct resource tsp2_nor_flash_resource = {
60 .flags = IORESOURCE_MEM,
61 .start = TSP2_NOR_BOOT_BASE,
62 .end = TSP2_NOR_BOOT_BASE + TSP2_NOR_BOOT_SIZE - 1,
63};
64
65static struct platform_device tsp2_nor_flash = {
66 .name = "physmap-flash",
67 .id = 0,
68 .dev = {
69 .platform_data = &tsp2_nor_flash_data,
70 },
71 .num_resources = 1,
72 .resource = &tsp2_nor_flash_resource,
73};
74
75/*****************************************************************************
76 * PCI
77 ****************************************************************************/
78#define TSP2_PCI_SLOT0_OFFS 7
79#define TSP2_PCI_SLOT0_IRQ_PIN 11
80
81void __init tsp2_pci_preinit(void)
82{
83 int pin;
84
85 /*
86 * Configure PCI GPIO IRQ pins
87 */
88 pin = TSP2_PCI_SLOT0_IRQ_PIN;
89 if (gpio_request(pin, "PCI Int1") == 0) {
90 if (gpio_direction_input(pin) == 0) {
91 set_irq_type(gpio_to_irq(pin), IRQ_TYPE_LEVEL_LOW);
92 } else {
93 printk(KERN_ERR "tsp2_pci_preinit failed "
94 "to set_irq_type pin %d\n", pin);
95 gpio_free(pin);
96 }
97 } else {
98 printk(KERN_ERR "tsp2_pci_preinit failed to "
99 "gpio_request %d\n", pin);
100 }
101}
102
103static int __init tsp2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
104{
105 int irq;
106
107 /*
108 * Check for devices with hard-wired IRQs.
109 */
110 irq = orion5x_pci_map_irq(dev, slot, pin);
111 if (irq != -1)
112 return irq;
113
114 /*
115 * PCI IRQs are connected via GPIOs.
116 */
117 if (slot == TSP2_PCI_SLOT0_OFFS)
118 return gpio_to_irq(TSP2_PCI_SLOT0_IRQ_PIN);
119
120 return -1;
121}
122
123static struct hw_pci tsp2_pci __initdata = {
124 .nr_controllers = 2,
125 .preinit = tsp2_pci_preinit,
126 .swizzle = pci_std_swizzle,
127 .setup = orion5x_pci_sys_setup,
128 .scan = orion5x_pci_sys_scan_bus,
129 .map_irq = tsp2_pci_map_irq,
130};
131
132static int __init tsp2_pci_init(void)
133{
134 if (machine_is_terastation_pro2())
135 pci_common_init(&tsp2_pci);
136
137 return 0;
138}
139
140subsys_initcall(tsp2_pci_init);
141
142/*****************************************************************************
143 * Ethernet
144 ****************************************************************************/
145
146static struct mv643xx_eth_platform_data tsp2_eth_data = {
147 .phy_addr = 0,
148};
149
150/*****************************************************************************
151 * RTC 5C372a on I2C bus
152 ****************************************************************************/
153
154#define TSP2_RTC_GPIO 9
155
156static struct i2c_board_info __initdata tsp2_i2c_rtc = {
157 I2C_BOARD_INFO("rs5c372a", 0x32),
158};
159
160/*****************************************************************************
161 * Terastation Pro II specific power off method via UART1-attached
162 * microcontroller
163 ****************************************************************************/
164
165#define UART1_REG(x) (UART1_VIRT_BASE + ((UART_##x) << 2))
166
167static int tsp2_miconread(unsigned char *buf, int count)
168{
169 int i;
170 int timeout;
171
172 for (i = 0; i < count; i++) {
173 timeout = 10;
174
175 while (!(readl(UART1_REG(LSR)) & UART_LSR_DR)) {
176 if (--timeout == 0)
177 break;
178 udelay(1000);
179 }
180
181 if (timeout == 0)
182 break;
183 buf[i] = readl(UART1_REG(RX));
184 }
185
186 /* return read bytes */
187 return i;
188}
189
190static int tsp2_miconwrite(const unsigned char *buf, int count)
191{
192 int i = 0;
193
194 while (count--) {
195 while (!(readl(UART1_REG(LSR)) & UART_LSR_THRE))
196 barrier();
197 writel(buf[i++], UART1_REG(TX));
198 }
199
200 return 0;
201}
202
203static int tsp2_miconsend(const unsigned char *data, int count)
204{
205 int i;
206 unsigned char checksum = 0;
207 unsigned char recv_buf[40];
208 unsigned char send_buf[40];
209 unsigned char correct_ack[3];
210 int retry = 2;
211
212 /* Generate checksum */
213 for (i = 0; i < count; i++)
214 checksum -= data[i];
215
216 do {
217 /* Send data */
218 tsp2_miconwrite(data, count);
219
220 /* send checksum */
221 tsp2_miconwrite(&checksum, 1);
222
223 if (tsp2_miconread(recv_buf, sizeof(recv_buf)) <= 3) {
224 printk(KERN_ERR ">%s: receive failed.\n", __func__);
225
226 /* send preamble to clear the receive buffer */
227 memset(&send_buf, 0xff, sizeof(send_buf));
228 tsp2_miconwrite(send_buf, sizeof(send_buf));
229
230 /* make dummy reads */
231 mdelay(100);
232 tsp2_miconread(recv_buf, sizeof(recv_buf));
233 } else {
234 /* Generate expected ack */
235 correct_ack[0] = 0x01;
236 correct_ack[1] = data[1];
237 correct_ack[2] = 0x00;
238
239 /* checksum Check */
240 if ((recv_buf[0] + recv_buf[1] + recv_buf[2] +
241 recv_buf[3]) & 0xFF) {
242 printk(KERN_ERR ">%s: Checksum Error : "
243 "Received data[%02x, %02x, %02x, %02x]"
244 "\n", __func__, recv_buf[0],
245 recv_buf[1], recv_buf[2], recv_buf[3]);
246 } else {
247 /* Check Received Data */
248 if (correct_ack[0] == recv_buf[0] &&
249 correct_ack[1] == recv_buf[1] &&
250 correct_ack[2] == recv_buf[2]) {
251 /* Interval for next command */
252 mdelay(10);
253
254 /* Receive ACK */
255 return 0;
256 }
257 }
258 /* Received NAK or illegal Data */
259 printk(KERN_ERR ">%s: Error : NAK or Illegal Data "
260 "Received\n", __func__);
261 }
262 } while (retry--);
263
264 /* Interval for next command */
265 mdelay(10);
266
267 return -1;
268}
269
270static void tsp2_power_off(void)
271{
272 const unsigned char watchdogkill[] = {0x01, 0x35, 0x00};
273 const unsigned char shutdownwait[] = {0x00, 0x0c};
274 const unsigned char poweroff[] = {0x00, 0x06};
275 /* 38400 baud divisor */
276 const unsigned divisor = ((orion5x_tclk + (8 * 38400)) / (16 * 38400));
277
278 pr_info("%s: triggering power-off...\n", __func__);
279
280 /* hijack uart1 and reset into sane state (38400,8n1,even parity) */
281 writel(0x83, UART1_REG(LCR));
282 writel(divisor & 0xff, UART1_REG(DLL));
283 writel((divisor >> 8) & 0xff, UART1_REG(DLM));
284 writel(0x1b, UART1_REG(LCR));
285 writel(0x00, UART1_REG(IER));
286 writel(0x07, UART1_REG(FCR));
287 writel(0x00, UART1_REG(MCR));
288
289 /* Send the commands to shutdown the Terastation Pro II */
290 tsp2_miconsend(watchdogkill, sizeof(watchdogkill)) ;
291 tsp2_miconsend(shutdownwait, sizeof(shutdownwait)) ;
292 tsp2_miconsend(poweroff, sizeof(poweroff));
293}
294
295/*****************************************************************************
296 * General Setup
297 ****************************************************************************/
298static struct orion5x_mpp_mode tsp2_mpp_modes[] __initdata = {
299 { 0, MPP_PCIE_RST_OUTn },
300 { 1, MPP_UNUSED },
301 { 2, MPP_UNUSED },
302 { 3, MPP_UNUSED },
303 { 4, MPP_NAND }, /* BOOT NAND Flash REn */
304 { 5, MPP_NAND }, /* BOOT NAND Flash WEn */
305 { 6, MPP_NAND }, /* BOOT NAND Flash HREn[0] */
306 { 7, MPP_NAND }, /* BOOT NAND Flash WEn[0] */
307 { 8, MPP_GPIO }, /* MICON int */
308 { 9, MPP_GPIO }, /* RTC int */
309 { 10, MPP_UNUSED },
310 { 11, MPP_GPIO }, /* PCI Int A */
311 { 12, MPP_UNUSED },
312 { 13, MPP_GPIO }, /* UPS on UART0 enable */
313 { 14, MPP_GPIO }, /* UPS low battery detection */
314 { 15, MPP_UNUSED },
315 { 16, MPP_UART }, /* UART1 RXD */
316 { 17, MPP_UART }, /* UART1 TXD */
317 { 18, MPP_UART }, /* UART1 CTSn */
318 { 19, MPP_UART }, /* UART1 RTSn */
319 { -1 },
320};
321
322static void __init tsp2_init(void)
323{
324 /*
325 * Setup basic Orion functions. Need to be called early.
326 */
327 orion5x_init();
328
329 orion5x_mpp_conf(tsp2_mpp_modes);
330
331 /*
332 * Configure peripherals.
333 */
334 orion5x_setup_dev_boot_win(TSP2_NOR_BOOT_BASE,
335 TSP2_NOR_BOOT_SIZE);
336 platform_device_register(&tsp2_nor_flash);
337
338 orion5x_ehci0_init();
339 orion5x_eth_init(&tsp2_eth_data);
340 orion5x_i2c_init();
341 orion5x_uart0_init();
342 orion5x_uart1_init();
343
344 /* Get RTC IRQ and register the chip */
345 if (gpio_request(TSP2_RTC_GPIO, "rtc") == 0) {
346 if (gpio_direction_input(TSP2_RTC_GPIO) == 0)
347 tsp2_i2c_rtc.irq = gpio_to_irq(TSP2_RTC_GPIO);
348 else
349 gpio_free(TSP2_RTC_GPIO);
350 }
351 if (tsp2_i2c_rtc.irq == 0)
352 pr_warning("tsp2_init: failed to get RTC IRQ\n");
353 i2c_register_board_info(0, &tsp2_i2c_rtc, 1);
354
355 /* register Terastation Pro II specific power-off method */
356 pm_power_off = tsp2_power_off;
357}
358
359MACHINE_START(TERASTATION_PRO2, "Buffalo Terastation Pro II/Live")
360 /* Maintainer: Sylver Bruneau <sylver.bruneau@googlemail.com> */
361 .phys_io = ORION5X_REGS_PHYS_BASE,
362 .io_pg_offst = ((ORION5X_REGS_VIRT_BASE) >> 18) & 0xFFFC,
363 .boot_params = 0x00000100,
364 .init_machine = tsp2_init,
365 .map_io = orion5x_map_io,
366 .init_irq = orion5x_init_irq,
367 .timer = &orion5x_timer,
368 .fixup = tag_fixup_mem32,
369MACHINE_END
diff --git a/arch/arm/mach-orion5x/tsx09-common.c b/arch/arm/mach-orion5x/tsx09-common.c
index 83feac3147a6..5128da1101bf 100644
--- a/arch/arm/mach-orion5x/tsx09-common.c
+++ b/arch/arm/mach-orion5x/tsx09-common.c
@@ -16,6 +16,7 @@
16#include <linux/timex.h> 16#include <linux/timex.h>
17#include <linux/serial_reg.h> 17#include <linux/serial_reg.h>
18#include "tsx09-common.h" 18#include "tsx09-common.h"
19#include "common.h"
19 20
20/***************************************************************************** 21/*****************************************************************************
21 * QNAP TS-x09 specific power off method via UART1-attached PIC 22 * QNAP TS-x09 specific power off method via UART1-attached PIC
@@ -26,7 +27,7 @@
26void qnap_tsx09_power_off(void) 27void qnap_tsx09_power_off(void)
27{ 28{
28 /* 19200 baud divisor */ 29 /* 19200 baud divisor */
29 const unsigned divisor = ((ORION5X_TCLK + (8 * 19200)) / (16 * 19200)); 30 const unsigned divisor = ((orion5x_tclk + (8 * 19200)) / (16 * 19200));
30 31
31 pr_info("%s: triggering power-off...\n", __func__); 32 pr_info("%s: triggering power-off...\n", __func__);
32 33
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index ed15f876c725..330814d1ee25 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -735,6 +735,14 @@ config CACHE_FEROCEON_L2
735 help 735 help
736 This option enables the Feroceon L2 cache controller. 736 This option enables the Feroceon L2 cache controller.
737 737
738config CACHE_FEROCEON_L2_WRITETHROUGH
739 bool "Force Feroceon L2 cache write through"
740 depends on CACHE_FEROCEON_L2
741 default n
742 help
743 Say Y here to use the Feroceon L2 cache in writethrough mode.
744 Unless you specifically require this, say N for writeback mode.
745
738config CACHE_L2X0 746config CACHE_L2X0
739 bool "Enable the L2x0 outer cache controller" 747 bool "Enable the L2x0 outer cache controller"
740 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176 748 depends on REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || MACH_REALVIEW_PB1176
diff --git a/arch/arm/mm/cache-feroceon-l2.c b/arch/arm/mm/cache-feroceon-l2.c
index 7b5a25d81576..13cdae8b0d44 100644
--- a/arch/arm/mm/cache-feroceon-l2.c
+++ b/arch/arm/mm/cache-feroceon-l2.c
@@ -48,11 +48,12 @@ static inline void l2_clean_mva_range(unsigned long start, unsigned long end)
48 * L2 is PIPT and range operations only do a TLB lookup on 48 * L2 is PIPT and range operations only do a TLB lookup on
49 * the start address. 49 * the start address.
50 */ 50 */
51 BUG_ON((start ^ end) & ~(PAGE_SIZE - 1)); 51 BUG_ON((start ^ end) >> PAGE_SHIFT);
52 52
53 raw_local_irq_save(flags); 53 raw_local_irq_save(flags);
54 __asm__("mcr p15, 1, %0, c15, c9, 4" : : "r" (start)); 54 __asm__("mcr p15, 1, %0, c15, c9, 4\n\t"
55 __asm__("mcr p15, 1, %0, c15, c9, 5" : : "r" (end)); 55 "mcr p15, 1, %1, c15, c9, 5"
56 : : "r" (start), "r" (end));
56 raw_local_irq_restore(flags); 57 raw_local_irq_restore(flags);
57} 58}
58 59
@@ -80,11 +81,12 @@ static inline void l2_inv_mva_range(unsigned long start, unsigned long end)
80 * L2 is PIPT and range operations only do a TLB lookup on 81 * L2 is PIPT and range operations only do a TLB lookup on
81 * the start address. 82 * the start address.
82 */ 83 */
83 BUG_ON((start ^ end) & ~(PAGE_SIZE - 1)); 84 BUG_ON((start ^ end) >> PAGE_SHIFT);
84 85
85 raw_local_irq_save(flags); 86 raw_local_irq_save(flags);
86 __asm__("mcr p15, 1, %0, c15, c11, 4" : : "r" (start)); 87 __asm__("mcr p15, 1, %0, c15, c11, 4\n\t"
87 __asm__("mcr p15, 1, %0, c15, c11, 5" : : "r" (end)); 88 "mcr p15, 1, %1, c15, c11, 5"
89 : : "r" (start), "r" (end));
88 raw_local_irq_restore(flags); 90 raw_local_irq_restore(flags);
89} 91}
90 92
@@ -205,7 +207,7 @@ static void feroceon_l2_flush_range(unsigned long start, unsigned long end)
205 * time. These are necessary because the L2 cache can only be enabled 207 * time. These are necessary because the L2 cache can only be enabled
206 * or disabled while the L1 Dcache and Icache are both disabled. 208 * or disabled while the L1 Dcache and Icache are both disabled.
207 */ 209 */
208static void __init invalidate_and_disable_dcache(void) 210static int __init flush_and_disable_dcache(void)
209{ 211{
210 u32 cr; 212 u32 cr;
211 213
@@ -217,7 +219,9 @@ static void __init invalidate_and_disable_dcache(void)
217 flush_cache_all(); 219 flush_cache_all();
218 set_cr(cr & ~CR_C); 220 set_cr(cr & ~CR_C);
219 raw_local_irq_restore(flags); 221 raw_local_irq_restore(flags);
222 return 1;
220 } 223 }
224 return 0;
221} 225}
222 226
223static void __init enable_dcache(void) 227static void __init enable_dcache(void)
@@ -225,18 +229,17 @@ static void __init enable_dcache(void)
225 u32 cr; 229 u32 cr;
226 230
227 cr = get_cr(); 231 cr = get_cr();
228 if (!(cr & CR_C)) 232 set_cr(cr | CR_C);
229 set_cr(cr | CR_C);
230} 233}
231 234
232static void __init __invalidate_icache(void) 235static void __init __invalidate_icache(void)
233{ 236{
234 int dummy; 237 int dummy;
235 238
236 __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0\n" : "=r" (dummy)); 239 __asm__ __volatile__("mcr p15, 0, %0, c7, c5, 0" : "=r" (dummy));
237} 240}
238 241
239static void __init invalidate_and_disable_icache(void) 242static int __init invalidate_and_disable_icache(void)
240{ 243{
241 u32 cr; 244 u32 cr;
242 245
@@ -244,7 +247,9 @@ static void __init invalidate_and_disable_icache(void)
244 if (cr & CR_I) { 247 if (cr & CR_I) {
245 set_cr(cr & ~CR_I); 248 set_cr(cr & ~CR_I);
246 __invalidate_icache(); 249 __invalidate_icache();
250 return 1;
247 } 251 }
252 return 0;
248} 253}
249 254
250static void __init enable_icache(void) 255static void __init enable_icache(void)
@@ -252,8 +257,7 @@ static void __init enable_icache(void)
252 u32 cr; 257 u32 cr;
253 258
254 cr = get_cr(); 259 cr = get_cr();
255 if (!(cr & CR_I)) 260 set_cr(cr | CR_I);
256 set_cr(cr | CR_I);
257} 261}
258 262
259static inline u32 read_extra_features(void) 263static inline u32 read_extra_features(void)
@@ -291,13 +295,17 @@ static void __init enable_l2(void)
291 295
292 u = read_extra_features(); 296 u = read_extra_features();
293 if (!(u & 0x00400000)) { 297 if (!(u & 0x00400000)) {
298 int i, d;
299
294 printk(KERN_INFO "Feroceon L2: Enabling L2\n"); 300 printk(KERN_INFO "Feroceon L2: Enabling L2\n");
295 301
296 invalidate_and_disable_dcache(); 302 d = flush_and_disable_dcache();
297 invalidate_and_disable_icache(); 303 i = invalidate_and_disable_icache();
298 write_extra_features(u | 0x00400000); 304 write_extra_features(u | 0x00400000);
299 enable_icache(); 305 if (i)
300 enable_dcache(); 306 enable_icache();
307 if (d)
308 enable_dcache();
301 } 309 }
302} 310}
303 311
diff --git a/arch/arm/mm/proc-feroceon.S b/arch/arm/mm/proc-feroceon.S
index 2b8bb383755e..0fe1f8fc3488 100644
--- a/arch/arm/mm/proc-feroceon.S
+++ b/arch/arm/mm/proc-feroceon.S
@@ -80,7 +80,8 @@ ENTRY(cpu_feroceon_proc_fin)
80 msr cpsr_c, ip 80 msr cpsr_c, ip
81 bl feroceon_flush_kern_cache_all 81 bl feroceon_flush_kern_cache_all
82 82
83#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 83#if defined(CONFIG_CACHE_FEROCEON_L2) && \
84 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
84 mov r0, #0 85 mov r0, #0
85 mcr p15, 1, r0, c15, c9, 0 @ clean L2 86 mcr p15, 1, r0, c15, c9, 0 @ clean L2
86 mcr p15, 0, r0, c7, c10, 4 @ drain WB 87 mcr p15, 0, r0, c7, c10, 4 @ drain WB
@@ -389,7 +390,8 @@ ENTRY(feroceon_range_cache_fns)
389 390
390 .align 5 391 .align 5
391ENTRY(cpu_feroceon_dcache_clean_area) 392ENTRY(cpu_feroceon_dcache_clean_area)
392#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 393#if defined(CONFIG_CACHE_FEROCEON_L2) && \
394 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
393 mov r2, r0 395 mov r2, r0
394 mov r3, r1 396 mov r3, r1
395#endif 397#endif
@@ -397,7 +399,8 @@ ENTRY(cpu_feroceon_dcache_clean_area)
397 add r0, r0, #CACHE_DLINESIZE 399 add r0, r0, #CACHE_DLINESIZE
398 subs r1, r1, #CACHE_DLINESIZE 400 subs r1, r1, #CACHE_DLINESIZE
399 bhi 1b 401 bhi 1b
400#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 402#if defined(CONFIG_CACHE_FEROCEON_L2) && \
403 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
4011: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry 4041: mcr p15, 1, r2, c15, c9, 1 @ clean L2 entry
402 add r2, r2, #CACHE_DLINESIZE 405 add r2, r2, #CACHE_DLINESIZE
403 subs r3, r3, #CACHE_DLINESIZE 406 subs r3, r3, #CACHE_DLINESIZE
@@ -449,7 +452,8 @@ ENTRY(cpu_feroceon_set_pte_ext)
449 armv3_set_pte_ext wc_disable=0 452 armv3_set_pte_ext wc_disable=0
450 mov r0, r0 453 mov r0, r0
451 mcr p15, 0, r0, c7, c10, 1 @ clean D entry 454 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
452#if defined(CONFIG_CACHE_FEROCEON_L2) && !defined(CONFIG_L2_CACHE_WRITETHROUGH) 455#if defined(CONFIG_CACHE_FEROCEON_L2) && \
456 !defined(CONFIG_CACHE_FEROCEON_L2_WRITETHROUGH)
453 mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry 457 mcr p15, 1, r0, c15, c9, 1 @ clean L2 entry
454#endif 458#endif
455 mcr p15, 0, r0, c7, c10, 4 @ drain WB 459 mcr p15, 0, r0, c7, c10, 4 @ drain WB
generated by cgit v1.2.2 (git 2.25.0) at 2026-01-03 00:23:04 -0500