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-rw-r--r--arch/arm/mach-davinci/devices-da8xx.c121
1 files changed, 114 insertions, 7 deletions
diff --git a/arch/arm/mach-davinci/devices-da8xx.c b/arch/arm/mach-davinci/devices-da8xx.c
index ab12a8f0d75d..0a96791d3b0f 100644
--- a/arch/arm/mach-davinci/devices-da8xx.c
+++ b/arch/arm/mach-davinci/devices-da8xx.c
@@ -24,8 +24,10 @@
24#include "clock.h" 24#include "clock.h"
25 25
26#define DA8XX_TPCC_BASE 0x01c00000 26#define DA8XX_TPCC_BASE 0x01c00000
27#define DA850_TPCC1_BASE 0x01e30000
27#define DA8XX_TPTC0_BASE 0x01c08000 28#define DA8XX_TPTC0_BASE 0x01c08000
28#define DA8XX_TPTC1_BASE 0x01c08400 29#define DA8XX_TPTC1_BASE 0x01c08400
30#define DA850_TPTC2_BASE 0x01e38000
29#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */ 31#define DA8XX_WDOG_BASE 0x01c21000 /* DA8XX_TIMER64P1_BASE */
30#define DA8XX_I2C0_BASE 0x01c22000 32#define DA8XX_I2C0_BASE 0x01c22000
31#define DA8XX_RTC_BASE 0x01C23000 33#define DA8XX_RTC_BASE 0x01C23000
@@ -97,7 +99,31 @@ static const s8 da8xx_queue_priority_mapping[][2] = {
97 {-1, -1} 99 {-1, -1}
98}; 100};
99 101
100static struct edma_soc_info da8xx_edma_info[] = { 102static const s8 da850_queue_tc_mapping[][2] = {
103 /* {event queue no, TC no} */
104 {0, 0},
105 {-1, -1}
106};
107
108static const s8 da850_queue_priority_mapping[][2] = {
109 /* {event queue no, Priority} */
110 {0, 3},
111 {-1, -1}
112};
113
114static struct edma_soc_info da830_edma_info[] = {
115 {
116 .n_channel = 32,
117 .n_region = 4,
118 .n_slot = 128,
119 .n_tc = 2,
120 .n_cc = 1,
121 .queue_tc_mapping = da8xx_queue_tc_mapping,
122 .queue_priority_mapping = da8xx_queue_priority_mapping,
123 },
124};
125
126static struct edma_soc_info da850_edma_info[] = {
101 { 127 {
102 .n_channel = 32, 128 .n_channel = 32,
103 .n_region = 4, 129 .n_region = 4,
@@ -107,9 +133,49 @@ static struct edma_soc_info da8xx_edma_info[] = {
107 .queue_tc_mapping = da8xx_queue_tc_mapping, 133 .queue_tc_mapping = da8xx_queue_tc_mapping,
108 .queue_priority_mapping = da8xx_queue_priority_mapping, 134 .queue_priority_mapping = da8xx_queue_priority_mapping,
109 }, 135 },
136 {
137 .n_channel = 32,
138 .n_region = 4,
139 .n_slot = 128,
140 .n_tc = 1,
141 .n_cc = 1,
142 .queue_tc_mapping = da850_queue_tc_mapping,
143 .queue_priority_mapping = da850_queue_priority_mapping,
144 },
145};
146
147static struct resource da830_edma_resources[] = {
148 {
149 .name = "edma_cc0",
150 .start = DA8XX_TPCC_BASE,
151 .end = DA8XX_TPCC_BASE + SZ_32K - 1,
152 .flags = IORESOURCE_MEM,
153 },
154 {
155 .name = "edma_tc0",
156 .start = DA8XX_TPTC0_BASE,
157 .end = DA8XX_TPTC0_BASE + SZ_1K - 1,
158 .flags = IORESOURCE_MEM,
159 },
160 {
161 .name = "edma_tc1",
162 .start = DA8XX_TPTC1_BASE,
163 .end = DA8XX_TPTC1_BASE + SZ_1K - 1,
164 .flags = IORESOURCE_MEM,
165 },
166 {
167 .name = "edma0",
168 .start = IRQ_DA8XX_CCINT0,
169 .flags = IORESOURCE_IRQ,
170 },
171 {
172 .name = "edma0_err",
173 .start = IRQ_DA8XX_CCERRINT,
174 .flags = IORESOURCE_IRQ,
175 },
110}; 176};
111 177
112static struct resource da8xx_edma_resources[] = { 178static struct resource da850_edma_resources[] = {
113 { 179 {
114 .name = "edma_cc0", 180 .name = "edma_cc0",
115 .start = DA8XX_TPCC_BASE, 181 .start = DA8XX_TPCC_BASE,
@@ -129,6 +195,18 @@ static struct resource da8xx_edma_resources[] = {
129 .flags = IORESOURCE_MEM, 195 .flags = IORESOURCE_MEM,
130 }, 196 },
131 { 197 {
198 .name = "edma_cc1",
199 .start = DA850_TPCC1_BASE,
200 .end = DA850_TPCC1_BASE + SZ_32K - 1,
201 .flags = IORESOURCE_MEM,
202 },
203 {
204 .name = "edma_tc2",
205 .start = DA850_TPTC2_BASE,
206 .end = DA850_TPTC2_BASE + SZ_1K - 1,
207 .flags = IORESOURCE_MEM,
208 },
209 {
132 .name = "edma0", 210 .name = "edma0",
133 .start = IRQ_DA8XX_CCINT0, 211 .start = IRQ_DA8XX_CCINT0,
134 .flags = IORESOURCE_IRQ, 212 .flags = IORESOURCE_IRQ,
@@ -138,21 +216,50 @@ static struct resource da8xx_edma_resources[] = {
138 .start = IRQ_DA8XX_CCERRINT, 216 .start = IRQ_DA8XX_CCERRINT,
139 .flags = IORESOURCE_IRQ, 217 .flags = IORESOURCE_IRQ,
140 }, 218 },
219 {
220 .name = "edma1",
221 .start = IRQ_DA850_CCINT1,
222 .flags = IORESOURCE_IRQ,
223 },
224 {
225 .name = "edma1_err",
226 .start = IRQ_DA850_CCERRINT1,
227 .flags = IORESOURCE_IRQ,
228 },
229};
230
231static struct platform_device da830_edma_device = {
232 .name = "edma",
233 .id = -1,
234 .dev = {
235 .platform_data = da830_edma_info,
236 },
237 .num_resources = ARRAY_SIZE(da830_edma_resources),
238 .resource = da830_edma_resources,
141}; 239};
142 240
143static struct platform_device da8xx_edma_device = { 241static struct platform_device da850_edma_device = {
144 .name = "edma", 242 .name = "edma",
145 .id = -1, 243 .id = -1,
146 .dev = { 244 .dev = {
147 .platform_data = da8xx_edma_info, 245 .platform_data = da850_edma_info,
148 }, 246 },
149 .num_resources = ARRAY_SIZE(da8xx_edma_resources), 247 .num_resources = ARRAY_SIZE(da850_edma_resources),
150 .resource = da8xx_edma_resources, 248 .resource = da850_edma_resources,
151}; 249};
152 250
153int __init da8xx_register_edma(void) 251int __init da8xx_register_edma(void)
154{ 252{
155 return platform_device_register(&da8xx_edma_device); 253 struct platform_device *pdev;
254
255 if (cpu_is_davinci_da830())
256 pdev = &da830_edma_device;
257 else if (cpu_is_davinci_da850())
258 pdev = &da850_edma_device;
259 else
260 return -ENODEV;
261
262 return platform_device_register(pdev);
156} 263}
157 264
158static struct resource da8xx_i2c_resources0[] = { 265static struct resource da8xx_i2c_resources0[] = {