30 files changed, 139 insertions, 323 deletions

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 4d64960be035..d8af858fe3f5 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -242,6 +242,7 @@ config LASAT
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_64BIT_KERNEL if EXPERIMENTAL
         select SYS_SUPPORTS_LITTLE_ENDIAN
+        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config MIPS_ATLAS
         bool "MIPS Atlas board"
@@ -265,6 +266,7 @@ config MIPS_ATLAS
         select SYS_SUPPORTS_BIG_ENDIAN
         select SYS_SUPPORTS_LITTLE_ENDIAN
         select SYS_SUPPORTS_MULTITHREADING if EXPERIMENTAL
+        select GENERIC_HARDIRQS_NO__DO_IRQ
         help
           This enables support for the MIPS Technologies Atlas evaluation
           board.
@@ -419,6 +421,7 @@ config MOMENCO_OCELOT_C
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_64BIT_KERNEL
         select SYS_SUPPORTS_BIG_ENDIAN
+        select GENERIC_HARDIRQS_NO__DO_IRQ
         help
           The Ocelot is a MIPS-based Single Board Computer (SBC) made by
           Momentum Computer <http://www.momenco.com/>.
@@ -569,6 +572,7 @@ config SGI_IP27
         select SYS_SUPPORTS_BIG_ENDIAN
         select SYS_SUPPORTS_NUMA
         select SYS_SUPPORTS_SMP
+        select GENERIC_HARDIRQS_NO__DO_IRQ
         help
           This are the SGI Origin 200, Origin 2000 and Onyx 2 Graphics
           workstations.  To compile a Linux kernel that runs on these, say Y
@@ -835,6 +839,10 @@ config SCHED_NO_NO_OMIT_FRAME_POINTER
         bool
         default y
 
+config GENERIC_HARDIRQS_NO__DO_IRQ
+        bool
+        default n
+
 #
 # Select some configuration options automatically based on user selections.
 #
@@ -996,6 +1004,7 @@ config SOC_PNX8550
         select HW_HAS_PCI
         select SYS_HAS_CPU_MIPS32_R1
         select SYS_SUPPORTS_32BIT_KERNEL
+        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config SWAP_IO_SPACE
         bool
diff --git a/arch/mips/dec/ecc-berr.c b/arch/mips/dec/ecc-berr.c
index c8430c07355e..6d55e8aab668 100644
--- a/arch/mips/dec/ecc-berr.c
+++ b/arch/mips/dec/ecc-berr.c
@@ -25,6 +25,7 @@
 #include <asm/cpu.h>
 #include <asm/irq_regs.h>
 #include <asm/processor.h>
+#include <asm/ptrace.h>
 #include <asm/system.h>
 #include <asm/traps.h>
 
diff --git a/arch/mips/dec/ioasic-irq.c b/arch/mips/dec/ioasic-irq.c
index 269b22b34313..4c7cb4048d35 100644
--- a/arch/mips/dec/ioasic-irq.c
+++ b/arch/mips/dec/ioasic-irq.c
@@ -67,7 +67,6 @@ static struct irq_chip ioasic_irq_type = {
         .mask = mask_ioasic_irq,
         .mask_ack = ack_ioasic_irq,
         .unmask = unmask_ioasic_irq,
-        .end = end_ioasic_irq,
 };
 
 
@@ -106,8 +105,7 @@ void __init init_ioasic_irqs(int base)
                 set_irq_chip_and_handler(i, &ioasic_irq_type,
                                          handle_level_irq);
         for (; i < base + IO_IRQ_LINES; i++)
-                set_irq_chip_and_handler(i, &ioasic_dma_irq_type,
-                                         handle_level_irq);
+                set_irq_chip(i, &ioasic_dma_irq_type);
 
         ioasic_irq_base = base;
 }
diff --git a/arch/mips/dec/kn01-berr.c b/arch/mips/dec/kn01-berr.c
index f19b4617a0a6..d3b8002bf1e7 100644
--- a/arch/mips/dec/kn01-berr.c
+++ b/arch/mips/dec/kn01-berr.c
@@ -20,8 +20,10 @@
 #include <linux/types.h>
 
 #include <asm/inst.h>
+#include <asm/irq_regs.h>
 #include <asm/mipsregs.h>
 #include <asm/page.h>
+#include <asm/ptrace.h>
 #include <asm/system.h>
 #include <asm/traps.h>
 #include <asm/uaccess.h>
diff --git a/arch/mips/dec/kn02-irq.c b/arch/mips/dec/kn02-irq.c
index 5a9be4c93584..916e46b8ccd8 100644
--- a/arch/mips/dec/kn02-irq.c
+++ b/arch/mips/dec/kn02-irq.c
@@ -57,19 +57,12 @@ static void ack_kn02_irq(unsigned int irq)
         iob();
 }
 
-static void end_kn02_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                unmask_kn02_irq(irq);
-}
-
 static struct irq_chip kn02_irq_type = {
         .typename = "KN02-CSR",
         .ack = ack_kn02_irq,
         .mask = mask_kn02_irq,
         .mask_ack = ack_kn02_irq,
         .unmask = unmask_kn02_irq,
-        .end = end_kn02_irq,
 };
 
 
diff --git a/arch/mips/emma2rh/common/irq_emma2rh.c b/arch/mips/emma2rh/common/irq_emma2rh.c
index 59b98299c896..8d880f0b06ec 100644
--- a/arch/mips/emma2rh/common/irq_emma2rh.c
+++ b/arch/mips/emma2rh/common/irq_emma2rh.c
@@ -56,19 +56,12 @@ static void emma2rh_irq_disable(unsigned int irq)
         ll_emma2rh_irq_disable(irq - emma2rh_irq_base);
 }
 
-static void emma2rh_irq_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                ll_emma2rh_irq_enable(irq - emma2rh_irq_base);
-}
-
 struct irq_chip emma2rh_irq_controller = {
         .typename = "emma2rh_irq",
         .ack = emma2rh_irq_disable,
         .mask = emma2rh_irq_disable,
         .mask_ack = emma2rh_irq_disable,
         .unmask = emma2rh_irq_enable,
-        .end = emma2rh_irq_end,
 };
 
 void emma2rh_irq_init(u32 irq_base)
diff --git a/arch/mips/emma2rh/markeins/irq_markeins.c b/arch/mips/emma2rh/markeins/irq_markeins.c
index 3ac4e405ecdc..2116d9be5fa9 100644
--- a/arch/mips/emma2rh/markeins/irq_markeins.c
+++ b/arch/mips/emma2rh/markeins/irq_markeins.c
@@ -48,19 +48,12 @@ static void emma2rh_sw_irq_disable(unsigned int irq)
         ll_emma2rh_sw_irq_disable(irq - emma2rh_sw_irq_base);
 }
 
-static void emma2rh_sw_irq_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                ll_emma2rh_sw_irq_enable(irq - emma2rh_sw_irq_base);
-}
-
 struct irq_chip emma2rh_sw_irq_controller = {
         .typename = "emma2rh_sw_irq",
         .ack = emma2rh_sw_irq_disable,
         .mask = emma2rh_sw_irq_disable,
         .mask_ack = emma2rh_sw_irq_disable,
         .unmask = emma2rh_sw_irq_enable,
-        .end = emma2rh_sw_irq_end,
 };
 
 void emma2rh_sw_irq_init(u32 irq_base)
diff --git a/arch/mips/jazz/irq.c b/arch/mips/jazz/irq.c
index 5c4f50cdf157..f8d417b5c2bb 100644
--- a/arch/mips/jazz/irq.c
+++ b/arch/mips/jazz/irq.c
@@ -39,19 +39,12 @@ void disable_r4030_irq(unsigned int irq)
         spin_unlock_irqrestore(&r4030_lock, flags);
 }
 
-static void end_r4030_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_r4030_irq(irq);
-}
-
 static struct irq_chip r4030_irq_type = {
         .typename = "R4030",
         .ack = disable_r4030_irq,
         .mask = disable_r4030_irq,
         .mask_ack = disable_r4030_irq,
         .unmask = enable_r4030_irq,
-        .end = end_r4030_irq,
 };
 
 void __init init_r4030_ints(void)
diff --git a/arch/mips/kernel/i8259.c b/arch/mips/kernel/i8259.c
index 2526c0ca4d81..b59a676c6d0e 100644
--- a/arch/mips/kernel/i8259.c
+++ b/arch/mips/kernel/i8259.c
@@ -19,9 +19,6 @@
 #include <asm/i8259.h>
 #include <asm/io.h>
 
-void enable_8259A_irq(unsigned int irq);
-void disable_8259A_irq(unsigned int irq);
-
 /*
  * This is the 'legacy' 8259A Programmable Interrupt Controller,
  * present in the majority of PC/AT boxes.
@@ -31,23 +28,16 @@ void disable_8259A_irq(unsigned int irq);
  * moves to arch independent land
  */
 
+static int i8259A_auto_eoi;
 DEFINE_SPINLOCK(i8259A_lock);
-
-static void end_8259A_irq (unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
-            irq_desc[irq].action)
-                enable_8259A_irq(irq);
-}
-
+/* some platforms call this... */
 void mask_and_ack_8259A(unsigned int);
 
-static struct irq_chip i8259A_irq_type = {
-        .typename = "XT-PIC",
-        .enable = enable_8259A_irq,
-        .disable = disable_8259A_irq,
-        .ack = mask_and_ack_8259A,
-        .end = end_8259A_irq,
+static struct irq_chip i8259A_chip = {
+        .name           = "XT-PIC",
+        .mask           = disable_8259A_irq,
+        .unmask         = enable_8259A_irq,
+        .mask_ack       = mask_and_ack_8259A,
 };
 
 /*
@@ -59,8 +49,8 @@ static struct irq_chip i8259A_irq_type = {
  */
 static unsigned int cached_irq_mask = 0xffff;
 
-#define cached_21       (cached_irq_mask)
-#define cached_A1       (cached_irq_mask >> 8)
+#define cached_master_mask      (cached_irq_mask)
+#define cached_slave_mask       (cached_irq_mask >> 8)
 
 void disable_8259A_irq(unsigned int irq)
 {
@@ -70,9 +60,9 @@ void disable_8259A_irq(unsigned int irq)
         spin_lock_irqsave(&i8259A_lock, flags);
         cached_irq_mask |= mask;
         if (irq & 8)
-                outb(cached_A1,0xA1);
+                outb(cached_slave_mask, PIC_SLAVE_IMR);
         else
-                outb(cached_21,0x21);
+                outb(cached_master_mask, PIC_MASTER_IMR);
         spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 
@@ -84,9 +74,9 @@ void enable_8259A_irq(unsigned int irq)
         spin_lock_irqsave(&i8259A_lock, flags);
         cached_irq_mask &= mask;
         if (irq & 8)
-                outb(cached_A1,0xA1);
+                outb(cached_slave_mask, PIC_SLAVE_IMR);
         else
-                outb(cached_21,0x21);
+                outb(cached_master_mask, PIC_MASTER_IMR);
         spin_unlock_irqrestore(&i8259A_lock, flags);
 }
 
@@ -98,9 +88,9 @@ int i8259A_irq_pending(unsigned int irq)
 
         spin_lock_irqsave(&i8259A_lock, flags);
         if (irq < 8)
-                ret = inb(0x20) & mask;
+                ret = inb(PIC_MASTER_CMD) & mask;
         else
-                ret = inb(0xA0) & (mask >> 8);
+                ret = inb(PIC_SLAVE_CMD) & (mask >> 8);
         spin_unlock_irqrestore(&i8259A_lock, flags);
 
         return ret;
@@ -109,7 +99,7 @@ int i8259A_irq_pending(unsigned int irq)
 void make_8259A_irq(unsigned int irq)
 {
         disable_irq_nosync(irq);
-        set_irq_chip(irq, &i8259A_irq_type);
+        set_irq_chip_and_handler(irq, &i8259A_chip, handle_level_irq);
         enable_irq(irq);
 }
 
@@ -125,14 +115,14 @@ static inline int i8259A_irq_real(unsigned int irq)
         int irqmask = 1 << irq;
 
         if (irq < 8) {
-                outb(0x0B,0x20);                /* ISR register */
-                value = inb(0x20) & irqmask;
-                outb(0x0A,0x20);                /* back to the IRR register */
+                outb(0x0B,PIC_MASTER_CMD);      /* ISR register */
+                value = inb(PIC_MASTER_CMD) & irqmask;
+                outb(0x0A,PIC_MASTER_CMD);      /* back to the IRR register */
                 return value;
         }
-        outb(0x0B,0xA0);                /* ISR register */
-        value = inb(0xA0) & (irqmask >> 8);
-        outb(0x0A,0xA0);                /* back to the IRR register */
+        outb(0x0B,PIC_SLAVE_CMD);       /* ISR register */
+        value = inb(PIC_SLAVE_CMD) & (irqmask >> 8);
+        outb(0x0A,PIC_SLAVE_CMD);       /* back to the IRR register */
         return value;
 }
 
@@ -149,17 +139,19 @@ void mask_and_ack_8259A(unsigned int irq)
 
         spin_lock_irqsave(&i8259A_lock, flags);
         /*
-         * Lightweight spurious IRQ detection. We do not want to overdo
-         * spurious IRQ handling - it's usually a sign of hardware problems, so
-         * we only do the checks we can do without slowing down good hardware
-         * nnecesserily.
+         * Lightweight spurious IRQ detection. We do not want
+         * to overdo spurious IRQ handling - it's usually a sign
+         * of hardware problems, so we only do the checks we can
+         * do without slowing down good hardware unnecessarily.
          *
-         * Note that IRQ7 and IRQ15 (the two spurious IRQs usually resulting
-         * rom the 8259A-1|2 PICs) occur even if the IRQ is masked in the 8259A.
-         * Thus we can check spurious 8259A IRQs without doing the quite slow
-         * i8259A_irq_real() call for every IRQ.  This does not cover 100% of
-         * spurious interrupts, but should be enough to warn the user that
-         * there is something bad going on ...
+         * Note that IRQ7 and IRQ15 (the two spurious IRQs
+         * usually resulting from the 8259A-1|2 PICs) occur
+         * even if the IRQ is masked in the 8259A. Thus we
+         * can check spurious 8259A IRQs without doing the
+         * quite slow i8259A_irq_real() call for every IRQ.
+         * This does not cover 100% of spurious interrupts,
+         * but should be enough to warn the user that there
+         * is something bad going on ...
          */
         if (cached_irq_mask & irqmask)
                 goto spurious_8259A_irq;
@@ -167,14 +159,14 @@ void mask_and_ack_8259A(unsigned int irq)
 
 handle_real_irq:
         if (irq & 8) {
-                inb(0xA1);              /* DUMMY - (do we need this?) */
-                outb(cached_A1,0xA1);
-                outb(0x60+(irq&7),0xA0);/* 'Specific EOI' to slave */
-                outb(0x62,0x20);        /* 'Specific EOI' to master-IRQ2 */
+                inb(PIC_SLAVE_IMR);     /* DUMMY - (do we need this?) */
+                outb(cached_slave_mask, PIC_SLAVE_IMR);
+                outb(0x60+(irq&7),PIC_SLAVE_CMD);/* 'Specific EOI' to slave */
+                outb(0x60+PIC_CASCADE_IR,PIC_MASTER_CMD); /* 'Specific EOI' to master-IRQ2 */
         } else {
-                inb(0x21);              /* DUMMY - (do we need this?) */
-                outb(cached_21,0x21);
-                outb(0x60+irq,0x20);    /* 'Specific EOI' to master */
+                inb(PIC_MASTER_IMR);    /* DUMMY - (do we need this?) */
+                outb(cached_master_mask, PIC_MASTER_IMR);
+                outb(0x60+irq,PIC_MASTER_CMD);  /* 'Specific EOI to master */
         }
 #ifdef CONFIG_MIPS_MT_SMTC
         if (irq_hwmask[irq] & ST0_IM)
@@ -195,7 +187,7 @@ spurious_8259A_irq:
                 goto handle_real_irq;
 
         {
-                static int spurious_irq_mask = 0;
+                static int spurious_irq_mask;
                 /*
                  * At this point we can be sure the IRQ is spurious,
                  * lets ACK and report it. [once per IRQ]
@@ -216,13 +208,25 @@ spurious_8259A_irq:
 
 static int i8259A_resume(struct sys_device *dev)
 {
-        init_8259A(0);
+        init_8259A(i8259A_auto_eoi);
+        return 0;
+}
+
+static int i8259A_shutdown(struct sys_device *dev)
+{
+        /* Put the i8259A into a quiescent state that
+         * the kernel initialization code can get it
+         * out of.
+         */
+        outb(0xff, PIC_MASTER_IMR);     /* mask all of 8259A-1 */
+        outb(0xff, PIC_SLAVE_IMR);      /* mask all of 8259A-1 */
         return 0;
 }
 
 static struct sysdev_class i8259_sysdev_class = {
         set_kset_name("i8259"),
         .resume = i8259A_resume,
+        .shutdown = i8259A_shutdown,
 };
 
 static struct sys_device device_i8259A = {
@@ -244,41 +248,41 @@ void __init init_8259A(int auto_eoi)
 {
         unsigned long flags;
 
+        i8259A_auto_eoi = auto_eoi;
+
         spin_lock_irqsave(&i8259A_lock, flags);
 
-        outb(0xff, 0x21);       /* mask all of 8259A-1 */
-        outb(0xff, 0xA1);       /* mask all of 8259A-2 */
+        outb(0xff, PIC_MASTER_IMR);     /* mask all of 8259A-1 */
+        outb(0xff, PIC_SLAVE_IMR);      /* mask all of 8259A-2 */
 
         /*
          * outb_p - this has to work on a wide range of PC hardware.
          */
-        outb_p(0x11, 0x20);     /* ICW1: select 8259A-1 init */
-        outb_p(0x00, 0x21);     /* ICW2: 8259A-1 IR0-7 mapped to 0x00-0x07 */
-        outb_p(0x04, 0x21);     /* 8259A-1 (the master) has a slave on IR2 */
-        if (auto_eoi)
-                outb_p(0x03, 0x21);     /* master does Auto EOI */
-        else
-                outb_p(0x01, 0x21);     /* master expects normal EOI */
-
-        outb_p(0x11, 0xA0);     /* ICW1: select 8259A-2 init */
-        outb_p(0x08, 0xA1);     /* ICW2: 8259A-2 IR0-7 mapped to 0x08-0x0f */
-        outb_p(0x02, 0xA1);     /* 8259A-2 is a slave on master's IR2 */
-        outb_p(0x01, 0xA1);     /* (slave's support for AEOI in flat mode
-                                    is to be investigated) */
-
+        outb_p(0x11, PIC_MASTER_CMD);   /* ICW1: select 8259A-1 init */
+        outb_p(I8259A_IRQ_BASE + 0, PIC_MASTER_IMR);    /* ICW2: 8259A-1 IR0 mapped to I8259A_IRQ_BASE + 0x00 */
+        outb_p(1U << PIC_CASCADE_IR, PIC_MASTER_IMR);   /* 8259A-1 (the master) has a slave on IR2 */
+        if (auto_eoi)   /* master does Auto EOI */
+                outb_p(MASTER_ICW4_DEFAULT | PIC_ICW4_AEOI, PIC_MASTER_IMR);
+        else            /* master expects normal EOI */
+                outb_p(MASTER_ICW4_DEFAULT, PIC_MASTER_IMR);
+
+        outb_p(0x11, PIC_SLAVE_CMD);    /* ICW1: select 8259A-2 init */
+        outb_p(I8259A_IRQ_BASE + 8, PIC_SLAVE_IMR);     /* ICW2: 8259A-2 IR0 mapped to I8259A_IRQ_BASE + 0x08 */
+        outb_p(PIC_CASCADE_IR, PIC_SLAVE_IMR);  /* 8259A-2 is a slave on master's IR2 */
+        outb_p(SLAVE_ICW4_DEFAULT, PIC_SLAVE_IMR); /* (slave's support for AEOI in flat mode is to be investigated) */
         if (auto_eoi)
                 /*
-                 * in AEOI mode we just have to mask the interrupt
+                 * In AEOI mode we just have to mask the interrupt
                  * when acking.
                  */
-                i8259A_irq_type.ack = disable_8259A_irq;
+                i8259A_chip.mask_ack = disable_8259A_irq;
         else
-                i8259A_irq_type.ack = mask_and_ack_8259A;
+                i8259A_chip.mask_ack = mask_and_ack_8259A;
 
         udelay(100);            /* wait for 8259A to initialize */
 
-        outb(cached_21, 0x21);  /* restore master IRQ mask */
-        outb(cached_A1, 0xA1);  /* restore slave IRQ mask */
+        outb(cached_master_mask, PIC_MASTER_IMR); /* restore master IRQ mask */
+        outb(cached_slave_mask, PIC_SLAVE_IMR);   /* restore slave IRQ mask */
 
         spin_unlock_irqrestore(&i8259A_lock, flags);
 }
@@ -291,11 +295,17 @@ static struct irqaction irq2 = {
 };
 
 static struct resource pic1_io_resource = {
-        .name = "pic1", .start = 0x20, .end = 0x21, .flags = IORESOURCE_BUSY
+        .name = "pic1",
+        .start = PIC_MASTER_CMD,
+        .end = PIC_MASTER_IMR,
+        .flags = IORESOURCE_BUSY
 };
 
 static struct resource pic2_io_resource = {
-        .name = "pic2", .start = 0xa0, .end = 0xa1, .flags = IORESOURCE_BUSY
+        .name = "pic2",
+        .start = PIC_SLAVE_CMD,
+        .end = PIC_SLAVE_IMR,
+        .flags = IORESOURCE_BUSY
 };
 
 /*
@@ -313,7 +323,7 @@ void __init init_i8259_irqs (void)
         init_8259A(0);
 
         for (i = 0; i < 16; i++)
-                set_irq_chip(i, &i8259A_irq_type);
+                set_irq_chip_and_handler(i, &i8259A_chip, handle_level_irq);
 
-        setup_irq(2, &irq2);
+        setup_irq(PIC_CASCADE_IR, &irq2);
 }
diff --git a/arch/mips/kernel/irq-mv6434x.c b/arch/mips/kernel/irq-mv6434x.c
index 6cfb31cafde2..efbd219845b5 100644
--- a/arch/mips/kernel/irq-mv6434x.c
+++ b/arch/mips/kernel/irq-mv6434x.c
@@ -67,15 +67,6 @@ static inline void unmask_mv64340_irq(unsigned int irq)
 }
 
 /*
- * End IRQ processing
- */
-static void end_mv64340_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                unmask_mv64340_irq(irq);
-}
-
-/*
  * Interrupt handler for interrupts coming from the Marvell chip.
  * It could be built in ethernet ports etc...
  */
@@ -106,7 +97,6 @@ struct irq_chip mv64340_irq_type = {
         .mask = mask_mv64340_irq,
         .mask_ack = mask_mv64340_irq,
         .unmask = unmask_mv64340_irq,
-        .end = end_mv64340_irq,
 };
 
 void __init mv64340_irq_init(unsigned int base)
diff --git a/arch/mips/kernel/irq-rm7000.c b/arch/mips/kernel/irq-rm7000.c
index ddcc2a5f8a06..123324ba8c14 100644
--- a/arch/mips/kernel/irq-rm7000.c
+++ b/arch/mips/kernel/irq-rm7000.c
@@ -29,19 +29,12 @@ static inline void mask_rm7k_irq(unsigned int irq)
         clear_c0_intcontrol(0x100 << (irq - irq_base));
 }
 
-static void rm7k_cpu_irq_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                unmask_rm7k_irq(irq);
-}
-
 static struct irq_chip rm7k_irq_controller = {
         .typename = "RM7000",
         .ack = mask_rm7k_irq,
         .mask = mask_rm7k_irq,
         .mask_ack = mask_rm7k_irq,
         .unmask = unmask_rm7k_irq,
-        .end = rm7k_cpu_irq_end,
 };
 
 void __init rm7k_cpu_irq_init(int base)
diff --git a/arch/mips/kernel/irq-rm9000.c b/arch/mips/kernel/irq-rm9000.c
index ba6440c88abd..0e6f4c5349d2 100644
--- a/arch/mips/kernel/irq-rm9000.c
+++ b/arch/mips/kernel/irq-rm9000.c
@@ -80,19 +80,12 @@ static void rm9k_perfcounter_irq_shutdown(unsigned int irq)
         on_each_cpu(local_rm9k_perfcounter_irq_shutdown, (void *) irq, 0, 1);
 }
 
-static void rm9k_cpu_irq_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                unmask_rm9k_irq(irq);
-}
-
 static struct irq_chip rm9k_irq_controller = {
         .typename = "RM9000",
         .ack = mask_rm9k_irq,
         .mask = mask_rm9k_irq,
         .mask_ack = mask_rm9k_irq,
         .unmask = unmask_rm9k_irq,
-        .end = rm9k_cpu_irq_end,
 };
 
 static struct irq_chip rm9k_perfcounter_irq = {
@@ -103,7 +96,6 @@ static struct irq_chip rm9k_perfcounter_irq = {
         .mask = mask_rm9k_irq,
         .mask_ack = mask_rm9k_irq,
         .unmask = unmask_rm9k_irq,
-        .end = rm9k_cpu_irq_end,
 };
 
 unsigned int rm9000_perfcount_irq;
diff --git a/arch/mips/kernel/irq.c b/arch/mips/kernel/irq.c
index b339798b3172..2fe4c868a801 100644
--- a/arch/mips/kernel/irq.c
+++ b/arch/mips/kernel/irq.c
@@ -117,7 +117,7 @@ int show_interrupts(struct seq_file *p, void *v)
                 for_each_online_cpu(j)
                         seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
 #endif
-                seq_printf(p, " %14s", irq_desc[i].chip->typename);
+                seq_printf(p, " %14s", irq_desc[i].chip->name);
                 seq_printf(p, "  %s", action->name);
 
                 for (action=action->next; action; action = action->next)
diff --git a/arch/mips/kernel/irq_cpu.c b/arch/mips/kernel/irq_cpu.c
index be5ac23d3812..fcc86b96ccf6 100644
--- a/arch/mips/kernel/irq_cpu.c
+++ b/arch/mips/kernel/irq_cpu.c
@@ -50,12 +50,6 @@ static inline void mask_mips_irq(unsigned int irq)
         irq_disable_hazard();
 }
 
-static void mips_cpu_irq_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                unmask_mips_irq(irq);
-}
-
 static struct irq_chip mips_cpu_irq_controller = {
         .typename       = "MIPS",
         .ack            = mask_mips_irq,
@@ -63,7 +57,6 @@ static struct irq_chip mips_cpu_irq_controller = {
         .mask_ack       = mask_mips_irq,
         .unmask         = unmask_mips_irq,
         .eoi            = unmask_mips_irq,
-        .end            = mips_cpu_irq_end,
 };
 
 /*
@@ -96,8 +89,6 @@ static void mips_mt_cpu_irq_ack(unsigned int irq)
         mask_mips_mt_irq(irq);
 }
 
-#define mips_mt_cpu_irq_end mips_cpu_irq_end
-
 static struct irq_chip mips_mt_cpu_irq_controller = {
         .typename       = "MIPS",
         .startup        = mips_mt_cpu_irq_startup,
@@ -106,7 +97,6 @@ static struct irq_chip mips_mt_cpu_irq_controller = {
         .mask_ack       = mips_mt_cpu_irq_ack,
         .unmask         = unmask_mips_mt_irq,
         .eoi            = unmask_mips_mt_irq,
-        .end            = mips_mt_cpu_irq_end,
 };
 
 void __init mips_cpu_irq_init(int irq_base)
diff --git a/arch/mips/lasat/interrupt.c b/arch/mips/lasat/interrupt.c
index 4a84a7beac53..2affa5ff171c 100644
--- a/arch/mips/lasat/interrupt.c
+++ b/arch/mips/lasat/interrupt.c
@@ -44,19 +44,12 @@ void enable_lasat_irq(unsigned int irq_nr)
         *lasat_int_mask |= (1 << irq_nr) << lasat_int_mask_shift;
 }
 
-static void end_lasat_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_lasat_irq(irq);
-}
-
 static struct irq_chip lasat_irq_type = {
         .typename = "Lasat",
         .ack = disable_lasat_irq,
         .mask = disable_lasat_irq,
         .mask_ack = disable_lasat_irq,
         .unmask = enable_lasat_irq,
-        .end = end_lasat_irq,
 };
 
 static inline int ls1bit32(unsigned int x)
diff --git a/arch/mips/momentum/ocelot_c/cpci-irq.c b/arch/mips/momentum/ocelot_c/cpci-irq.c
index e5a4a0a8a7f0..bb11fef08472 100644
--- a/arch/mips/momentum/ocelot_c/cpci-irq.c
+++ b/arch/mips/momentum/ocelot_c/cpci-irq.c
@@ -66,15 +66,6 @@ static inline void unmask_cpci_irq(unsigned int irq)
 }
 
 /*
- * End IRQ processing
- */
-static void end_cpci_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                unmask_cpci_irq(irq);
-}
-
-/*
  * Interrupt handler for interrupts coming from the FPGA chip.
  * It could be built in ethernet ports etc...
  */
@@ -98,7 +89,6 @@ struct irq_chip cpci_irq_type = {
         .mask = mask_cpci_irq,
         .mask_ack = mask_cpci_irq,
         .unmask = unmask_cpci_irq,
-        .end = end_cpci_irq,
 };
 
 void cpci_irq_init(void)
diff --git a/arch/mips/momentum/ocelot_c/uart-irq.c b/arch/mips/momentum/ocelot_c/uart-irq.c
index 0029f0008dea..a7a80c0da569 100644
--- a/arch/mips/momentum/ocelot_c/uart-irq.c
+++ b/arch/mips/momentum/ocelot_c/uart-irq.c
@@ -60,15 +60,6 @@ static inline void unmask_uart_irq(unsigned int irq)
 }
 
 /*
- * End IRQ processing
- */
-static void end_uart_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                unmask_uart_irq(irq);
-}
-
-/*
  * Interrupt handler for interrupts coming from the FPGA chip.
  */
 void ll_uart_irq(void)
@@ -91,7 +82,6 @@ struct irq_chip uart_irq_type = {
         .mask = mask_uart_irq,
         .mask_ack = mask_uart_irq,
         .unmask = unmask_uart_irq,
-        .end = end_uart_irq,
 };
 
 void uart_irq_init(void)
diff --git a/arch/mips/philips/pnx8550/common/int.c b/arch/mips/philips/pnx8550/common/int.c
index 0dc23930edbd..2c36c108c4d6 100644
--- a/arch/mips/philips/pnx8550/common/int.c
+++ b/arch/mips/philips/pnx8550/common/int.c
@@ -158,20 +158,12 @@ int pnx8550_set_gic_priority(int irq, int priority)
         return prev_priority;
 }
 
-static void end_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
-                unmask_irq(irq);
-        }
-}
-
 static struct irq_chip level_irq_type = {
         .typename =     "PNX Level IRQ",
         .ack =          mask_irq,
         .mask =         mask_irq,
         .mask_ack =     mask_irq,
         .unmask =       unmask_irq,
-        .end =          end_irq,
 };
 
 static struct irqaction gic_action = {
diff --git a/arch/mips/sgi-ip22/ip22-int.c b/arch/mips/sgi-ip22/ip22-int.c
index c7b138053159..c44f8be0644f 100644
--- a/arch/mips/sgi-ip22/ip22-int.c
+++ b/arch/mips/sgi-ip22/ip22-int.c
@@ -51,19 +51,12 @@ static void disable_local0_irq(unsigned int irq)
         sgint->imask0 &= ~(1 << (irq - SGINT_LOCAL0));
 }
 
-static void end_local0_irq (unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_local0_irq(irq);
-}
-
 static struct irq_chip ip22_local0_irq_type = {
         .typename       = "IP22 local 0",
         .ack            = disable_local0_irq,
         .mask           = disable_local0_irq,
         .mask_ack       = disable_local0_irq,
         .unmask         = enable_local0_irq,
-        .end            = end_local0_irq,
 };
 
 static void enable_local1_irq(unsigned int irq)
@@ -79,19 +72,12 @@ void disable_local1_irq(unsigned int irq)
         sgint->imask1 &= ~(1 << (irq - SGINT_LOCAL1));
 }
 
-static void end_local1_irq (unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_local1_irq(irq);
-}
-
 static struct irq_chip ip22_local1_irq_type = {
         .typename       = "IP22 local 1",
         .ack            = disable_local1_irq,
         .mask           = disable_local1_irq,
         .mask_ack       = disable_local1_irq,
         .unmask         = enable_local1_irq,
-        .end            = end_local1_irq,
 };
 
 static void enable_local2_irq(unsigned int irq)
@@ -107,19 +93,12 @@ void disable_local2_irq(unsigned int irq)
                 sgint->imask0 &= ~(1 << (SGI_MAP_0_IRQ - SGINT_LOCAL0));
 }
 
-static void end_local2_irq (unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_local2_irq(irq);
-}
-
 static struct irq_chip ip22_local2_irq_type = {
         .typename       = "IP22 local 2",
         .ack            = disable_local2_irq,
         .mask           = disable_local2_irq,
         .mask_ack       = disable_local2_irq,
         .unmask         = enable_local2_irq,
-        .end            = end_local2_irq,
 };
 
 static void enable_local3_irq(unsigned int irq)
@@ -135,19 +114,12 @@ void disable_local3_irq(unsigned int irq)
                 sgint->imask1 &= ~(1 << (SGI_MAP_1_IRQ - SGINT_LOCAL1));
 }
 
-static void end_local3_irq (unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
-                enable_local3_irq(irq);
-}
-
 static struct irq_chip ip22_local3_irq_type = {
         .typename       = "IP22 local 3",
         .ack            = disable_local3_irq,
         .mask           = disable_local3_irq,
         .mask_ack       = disable_local3_irq,
         .unmask         = enable_local3_irq,
-        .end            = end_local3_irq,
 };
 
 static void indy_local0_irqdispatch(void)
diff --git a/arch/mips/sgi-ip27/ip27-irq.c b/arch/mips/sgi-ip27/ip27-irq.c
index 5f8835b4e84a..319f8803ef6f 100644
--- a/arch/mips/sgi-ip27/ip27-irq.c
+++ b/arch/mips/sgi-ip27/ip27-irq.c
@@ -332,13 +332,6 @@ static inline void disable_bridge_irq(unsigned int irq)
         intr_disconnect_level(cpu, swlevel);
 }
 
-static void end_bridge_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)) &&
-            irq_desc[irq].action)
-                enable_bridge_irq(irq);
-}
-
 static struct irq_chip bridge_irq_type = {
         .typename       = "bridge",
         .startup        = startup_bridge_irq,
@@ -347,7 +340,6 @@ static struct irq_chip bridge_irq_type = {
         .mask           = disable_bridge_irq,
         .mask_ack       = disable_bridge_irq,
         .unmask         = enable_bridge_irq,
-        .end            = end_bridge_irq,
 };
 
 void __devinit register_bridge_irq(unsigned int irq)
diff --git a/arch/mips/sgi-ip27/ip27-timer.c b/arch/mips/sgi-ip27/ip27-timer.c
index 7d361726bbfb..c20e9899b34b 100644
--- a/arch/mips/sgi-ip27/ip27-timer.c
+++ b/arch/mips/sgi-ip27/ip27-timer.c
@@ -180,10 +180,6 @@ static void disable_rt_irq(unsigned int irq)
 {
 }
 
-static void end_rt_irq(unsigned int irq)
-{
-}
-
 static struct irq_chip rt_irq_type = {
         .typename       = "SN HUB RT timer",
         .ack            = disable_rt_irq,
@@ -191,7 +187,6 @@ static struct irq_chip rt_irq_type = {
         .mask_ack       = disable_rt_irq,
         .unmask         = enable_rt_irq,
         .eoi            = enable_rt_irq,
-        .end            = end_rt_irq,
 };
 
 static struct irqaction rt_irqaction = {
diff --git a/arch/mips/tx4927/common/tx4927_irq.c b/arch/mips/tx4927/common/tx4927_irq.c
index 21873de49aa8..ed4a19adf361 100644
--- a/arch/mips/tx4927/common/tx4927_irq.c
+++ b/arch/mips/tx4927/common/tx4927_irq.c
@@ -66,12 +66,10 @@
 #define TX4927_IRQ_CP0_INIT     ( 1 << 10 )
 #define TX4927_IRQ_CP0_ENABLE   ( 1 << 13 )
 #define TX4927_IRQ_CP0_DISABLE  ( 1 << 14 )
-#define TX4927_IRQ_CP0_ENDIRQ   ( 1 << 16 )
 
 #define TX4927_IRQ_PIC_INIT     ( 1 << 20 )
 #define TX4927_IRQ_PIC_ENABLE   ( 1 << 23 )
 #define TX4927_IRQ_PIC_DISABLE  ( 1 << 24 )
-#define TX4927_IRQ_PIC_ENDIRQ   ( 1 << 26 )
 
 #define TX4927_IRQ_ALL         0xffffffff
 #endif
@@ -82,12 +80,10 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
                                           | TX4927_IRQ_WARN | TX4927_IRQ_EROR
 //                                       | TX4927_IRQ_CP0_INIT
 //                                       | TX4927_IRQ_CP0_ENABLE
-//                                       | TX4927_IRQ_CP0_DISABLE
 //                                       | TX4927_IRQ_CP0_ENDIRQ
 //                                       | TX4927_IRQ_PIC_INIT
 //                                       | TX4927_IRQ_PIC_ENABLE
 //                                       | TX4927_IRQ_PIC_DISABLE
-//                                       | TX4927_IRQ_PIC_ENDIRQ
 //                                       | TX4927_IRQ_INIT
 //                                       | TX4927_IRQ_NEST1
 //                                       | TX4927_IRQ_NEST2
@@ -114,11 +110,9 @@ static const u32 tx4927_irq_debug_flag = (TX4927_IRQ_NONE
 
 static void tx4927_irq_cp0_enable(unsigned int irq);
 static void tx4927_irq_cp0_disable(unsigned int irq);
-static void tx4927_irq_cp0_end(unsigned int irq);
 
 static void tx4927_irq_pic_enable(unsigned int irq);
 static void tx4927_irq_pic_disable(unsigned int irq);
-static void tx4927_irq_pic_end(unsigned int irq);
 
 /*
  * Kernel structs for all pic's
@@ -131,7 +125,6 @@ static struct irq_chip tx4927_irq_cp0_type = {
         .mask           = tx4927_irq_cp0_disable,
         .mask_ack       = tx4927_irq_cp0_disable,
         .unmask         = tx4927_irq_cp0_enable,
-        .end            = tx4927_irq_cp0_end,
 };
 
 #define TX4927_PIC_NAME "TX4927-PIC"
@@ -141,7 +134,6 @@ static struct irq_chip tx4927_irq_pic_type = {
         .mask           = tx4927_irq_pic_disable,
         .mask_ack       = tx4927_irq_pic_disable,
         .unmask         = tx4927_irq_pic_enable,
-        .end            = tx4927_irq_pic_end,
 };
 
 #define TX4927_PIC_ACTION(s) { no_action, 0, CPU_MASK_NONE, s, NULL, NULL }
@@ -214,15 +206,6 @@ static void tx4927_irq_cp0_disable(unsigned int irq)
         tx4927_irq_cp0_modify(CCP0_STATUS, tx4927_irq_cp0_mask(irq), 0);
 }
 
-static void tx4927_irq_cp0_end(unsigned int irq)
-{
-        TX4927_IRQ_DPRINTK(TX4927_IRQ_CP0_ENDIRQ, "irq=%d \n", irq);
-
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                tx4927_irq_cp0_enable(irq);
-        }
-}
-
 /*
  * Functions for pic
  */
@@ -376,15 +359,6 @@ static void tx4927_irq_pic_disable(unsigned int irq)
                               tx4927_irq_pic_mask(irq), 0);
 }
 
-static void tx4927_irq_pic_end(unsigned int irq)
-{
-        TX4927_IRQ_DPRINTK(TX4927_IRQ_PIC_ENDIRQ, "irq=%d\n", irq);
-
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                tx4927_irq_pic_enable(irq);
-        }
-}
-
 /*
  * Main init functions
  */
diff --git a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
index 34cdb2a240e9..5a5ea6c0b9f6 100644
--- a/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
+++ b/arch/mips/tx4927/toshiba_rbtx4927/toshiba_rbtx4927_irq.c
@@ -153,7 +153,6 @@ JP7 is not bus master -- do NOT use -- only 4 pci bus master's allowed -- SouthB
 #define TOSHIBA_RBTX4927_IRQ_IOC_INIT      ( 1 << 10 )
 #define TOSHIBA_RBTX4927_IRQ_IOC_ENABLE    ( 1 << 13 )
 #define TOSHIBA_RBTX4927_IRQ_IOC_DISABLE   ( 1 << 14 )
-#define TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ    ( 1 << 16 )
 
 #define TOSHIBA_RBTX4927_IRQ_ISA_INIT      ( 1 << 20 )
 #define TOSHIBA_RBTX4927_IRQ_ISA_ENABLE    ( 1 << 23 )
@@ -172,7 +171,6 @@ static const u32 toshiba_rbtx4927_irq_debug_flag =
 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_INIT
 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_ENABLE
 //                                                 | TOSHIBA_RBTX4927_IRQ_IOC_DISABLE
-//                                                 | TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ
 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_INIT
 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_ENABLE
 //                                                 | TOSHIBA_RBTX4927_IRQ_ISA_DISABLE
@@ -223,7 +221,6 @@ extern void mask_and_ack_8259A(unsigned int irq);
 
 static void toshiba_rbtx4927_irq_ioc_enable(unsigned int irq);
 static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq);
-static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq);
 
 #ifdef CONFIG_TOSHIBA_FPCIB0
 static void toshiba_rbtx4927_irq_isa_enable(unsigned int irq);
@@ -239,7 +236,6 @@ static struct irq_chip toshiba_rbtx4927_irq_ioc_type = {
         .mask = toshiba_rbtx4927_irq_ioc_disable,
         .mask_ack = toshiba_rbtx4927_irq_ioc_disable,
         .unmask = toshiba_rbtx4927_irq_ioc_enable,
-        .end = toshiba_rbtx4927_irq_ioc_end,
 };
 #define TOSHIBA_RBTX4927_IOC_INTR_ENAB 0xbc002000
 #define TOSHIBA_RBTX4927_IOC_INTR_STAT 0xbc002006
@@ -388,23 +384,6 @@ static void toshiba_rbtx4927_irq_ioc_disable(unsigned int irq)
         TOSHIBA_RBTX4927_WR08(TOSHIBA_RBTX4927_IOC_INTR_ENAB, v);
 }
 
-static void toshiba_rbtx4927_irq_ioc_end(unsigned int irq)
-{
-        TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_IOC_ENDIRQ,
-                                     "irq=%d\n", irq);
-
-        if (irq < TOSHIBA_RBTX4927_IRQ_IOC_BEG
-            || irq > TOSHIBA_RBTX4927_IRQ_IOC_END) {
-                TOSHIBA_RBTX4927_IRQ_DPRINTK(TOSHIBA_RBTX4927_IRQ_EROR,
-                                             "bad irq=%d\n", irq);
-                panic("\n");
-        }
-
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                toshiba_rbtx4927_irq_ioc_enable(irq);
-        }
-}
-
 
 /**********************************************************************************/
 /* Functions for isa                                                              */
diff --git a/arch/mips/tx4938/common/irq.c b/arch/mips/tx4938/common/irq.c
index 42e127683ae9..a347b424d91c 100644
--- a/arch/mips/tx4938/common/irq.c
+++ b/arch/mips/tx4938/common/irq.c
@@ -39,11 +39,9 @@
 
 static void tx4938_irq_cp0_enable(unsigned int irq);
 static void tx4938_irq_cp0_disable(unsigned int irq);
-static void tx4938_irq_cp0_end(unsigned int irq);
 
 static void tx4938_irq_pic_enable(unsigned int irq);
 static void tx4938_irq_pic_disable(unsigned int irq);
-static void tx4938_irq_pic_end(unsigned int irq);
 
 /**********************************************************************************/
 /* Kernel structs for all pic's                                                   */
@@ -56,7 +54,6 @@ static struct irq_chip tx4938_irq_cp0_type = {
         .mask = tx4938_irq_cp0_disable,
         .mask_ack = tx4938_irq_cp0_disable,
         .unmask = tx4938_irq_cp0_enable,
-        .end = tx4938_irq_cp0_end,
 };
 
 #define TX4938_PIC_NAME "TX4938-PIC"
@@ -66,7 +63,6 @@ static struct irq_chip tx4938_irq_pic_type = {
         .mask = tx4938_irq_pic_disable,
         .mask_ack = tx4938_irq_pic_disable,
         .unmask = tx4938_irq_pic_enable,
-        .end = tx4938_irq_pic_end,
 };
 
 static struct irqaction tx4938_irq_pic_action = {
@@ -104,14 +100,6 @@ tx4938_irq_cp0_disable(unsigned int irq)
         clear_c0_status(tx4938_irq_cp0_mask(irq));
 }
 
-static void
-tx4938_irq_cp0_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                tx4938_irq_cp0_enable(irq);
-        }
-}
-
 /**********************************************************************************/
 /* Functions for pic                                                              */
 /**********************************************************************************/
@@ -269,14 +257,6 @@ tx4938_irq_pic_disable(unsigned int irq)
                               tx4938_irq_pic_mask(irq), 0);
 }
 
-static void
-tx4938_irq_pic_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                tx4938_irq_pic_enable(irq);
-        }
-}
-
 /**********************************************************************************/
 /* Main init functions                                                            */
 /**********************************************************************************/
diff --git a/arch/mips/tx4938/toshiba_rbtx4938/irq.c b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
index 8c87a35f3068..b6f363d08011 100644
--- a/arch/mips/tx4938/toshiba_rbtx4938/irq.c
+++ b/arch/mips/tx4938/toshiba_rbtx4938/irq.c
@@ -89,7 +89,6 @@ IRQ  Device
 
 static void toshiba_rbtx4938_irq_ioc_enable(unsigned int irq);
 static void toshiba_rbtx4938_irq_ioc_disable(unsigned int irq);
-static void toshiba_rbtx4938_irq_ioc_end(unsigned int irq);
 
 #define TOSHIBA_RBTX4938_IOC_NAME "RBTX4938-IOC"
 static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
@@ -98,7 +97,6 @@ static struct irq_chip toshiba_rbtx4938_irq_ioc_type = {
         .mask = toshiba_rbtx4938_irq_ioc_disable,
         .mask_ack = toshiba_rbtx4938_irq_ioc_disable,
         .unmask = toshiba_rbtx4938_irq_ioc_enable,
-        .end = toshiba_rbtx4938_irq_ioc_end,
 };
 
 #define TOSHIBA_RBTX4938_IOC_INTR_ENAB 0xb7f02000
@@ -167,14 +165,6 @@ toshiba_rbtx4938_irq_ioc_disable(unsigned int irq)
         TX4938_RD08(TOSHIBA_RBTX4938_IOC_INTR_ENAB);
 }
 
-static void
-toshiba_rbtx4938_irq_ioc_end(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS))) {
-                toshiba_rbtx4938_irq_ioc_enable(irq);
-        }
-}
-
 extern void __init txx9_spi_irqinit(int irc_irq);
 
 void __init arch_init_irq(void)
diff --git a/arch/mips/vr41xx/Kconfig b/arch/mips/vr41xx/Kconfig
index 92f41f6f934a..c8dfd8092cab 100644
--- a/arch/mips/vr41xx/Kconfig
+++ b/arch/mips/vr41xx/Kconfig
@@ -6,6 +6,7 @@ config CASIO_E55
         select ISA
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
+        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config IBM_WORKPAD
         bool "Support for IBM WorkPad z50"
@@ -15,6 +16,7 @@ config IBM_WORKPAD
         select ISA
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
+        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config NEC_CMBVR4133
         bool "Support for NEC CMB-VR4133"
@@ -39,6 +41,7 @@ config TANBAC_TB022X
         select IRQ_CPU
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
+        select GENERIC_HARDIRQS_NO__DO_IRQ
         help
           The TANBAC VR4131 multichip module(TB0225) and
           the TANBAC VR4131DIMM(TB0229) are MIPS-based platforms
@@ -71,6 +74,7 @@ config VICTOR_MPC30X
         select IRQ_CPU
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
+        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config ZAO_CAPCELLA
         bool "Support for ZAO Networks Capcella"
@@ -80,6 +84,7 @@ config ZAO_CAPCELLA
         select IRQ_CPU
         select SYS_SUPPORTS_32BIT_KERNEL
         select SYS_SUPPORTS_LITTLE_ENDIAN
+        select GENERIC_HARDIRQS_NO__DO_IRQ
 
 config PCI_VR41XX
         bool "Add PCI control unit support of NEC VR4100 series"
diff --git a/arch/mips/vr41xx/common/icu.c b/arch/mips/vr41xx/common/icu.c
index 54b92a74c7ac..c075261976c5 100644
--- a/arch/mips/vr41xx/common/icu.c
+++ b/arch/mips/vr41xx/common/icu.c
@@ -427,19 +427,12 @@ static void enable_sysint1_irq(unsigned int irq)
         icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
 }
 
-static void end_sysint1_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                icu1_set(MSYSINT1REG, 1 << SYSINT1_IRQ_TO_PIN(irq));
-}
-
 static struct irq_chip sysint1_irq_type = {
         .typename       = "SYSINT1",
         .ack            = disable_sysint1_irq,
         .mask           = disable_sysint1_irq,
         .mask_ack       = disable_sysint1_irq,
         .unmask         = enable_sysint1_irq,
-        .end            = end_sysint1_irq,
 };
 
 static void disable_sysint2_irq(unsigned int irq)
@@ -452,19 +445,12 @@ static void enable_sysint2_irq(unsigned int irq)
         icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
 }
 
-static void end_sysint2_irq(unsigned int irq)
-{
-        if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
-                icu2_set(MSYSINT2REG, 1 << SYSINT2_IRQ_TO_PIN(irq));
-}
-
 static struct irq_chip sysint2_irq_type = {
         .typename       = "SYSINT2",
         .ack            = disable_sysint2_irq,
         .mask           = disable_sysint2_irq,
         .mask_ack       = disable_sysint2_irq,
         .unmask         = enable_sysint2_irq,
-        .end            = end_sysint2_irq,
 };
 
 static inline int set_sysint1_assign(unsigned int irq, unsigned char assign)
diff --git a/include/asm-mips/i8259.h b/include/asm-mips/i8259.h
index 0214abe3f0af..4df8d8b118c0 100644
--- a/include/asm-mips/i8259.h
+++ b/include/asm-mips/i8259.h
@@ -19,10 +19,31 @@
 
 #include <asm/io.h>
 
+/* i8259A PIC registers */
+#define PIC_MASTER_CMD          0x20
+#define PIC_MASTER_IMR          0x21
+#define PIC_MASTER_ISR          PIC_MASTER_CMD
+#define PIC_MASTER_POLL         PIC_MASTER_ISR
+#define PIC_MASTER_OCW3         PIC_MASTER_ISR
+#define PIC_SLAVE_CMD           0xa0
+#define PIC_SLAVE_IMR           0xa1
+
+/* i8259A PIC related value */
+#define PIC_CASCADE_IR          2
+#define MASTER_ICW4_DEFAULT     0x01
+#define SLAVE_ICW4_DEFAULT      0x01
+#define PIC_ICW4_AEOI           2
+
 extern spinlock_t i8259A_lock;
 
+extern void init_8259A(int auto_eoi);
+extern void enable_8259A_irq(unsigned int irq);
+extern void disable_8259A_irq(unsigned int irq);
+
 extern void init_i8259_irqs(void);
 
+#define I8259A_IRQ_BASE 0
+
 /*
  * Do the traditional i8259 interrupt polling thing.  This is for the few
  * cases where no better interrupt acknowledge method is available and we
@@ -35,15 +56,15 @@ static inline int i8259_irq(void)
         spin_lock(&i8259A_lock);
 
         /* Perform an interrupt acknowledge cycle on controller 1. */
-        outb(0x0C, 0x20);               /* prepare for poll */
-        irq = inb(0x20) & 7;
-        if (irq == 2) {
+        outb(0x0C, PIC_MASTER_CMD);             /* prepare for poll */
+        irq = inb(PIC_MASTER_CMD) & 7;
+        if (irq == PIC_CASCADE_IR) {
                 /*
                  * Interrupt is cascaded so perform interrupt
                  * acknowledge on controller 2.
                  */
-                outb(0x0C, 0xA0);               /* prepare for poll */
-                irq = (inb(0xA0) & 7) + 8;
+                outb(0x0C, PIC_SLAVE_CMD);              /* prepare for poll */
+                irq = (inb(PIC_SLAVE_CMD) & 7) + 8;
         }
 
         if (unlikely(irq == 7)) {
@@ -54,14 +75,14 @@ static inline int i8259_irq(void)
                  * significant bit is not set then there is no valid
                  * interrupt.
                  */
-                outb(0x0B, 0x20);               /* ISR register */
-                if(~inb(0x20) & 0x80)
+                outb(0x0B, PIC_MASTER_ISR);             /* ISR register */
+                if(~inb(PIC_MASTER_ISR) & 0x80)
                         irq = -1;
         }
 
         spin_unlock(&i8259A_lock);
 
-        return irq;
+        return likely(irq >= 0) ? irq + I8259A_IRQ_BASE : irq;
 }
 
 #endif /* _ASM_I8259_H */
diff --git a/include/asm-mips/pgtable-32.h b/include/asm-mips/pgtable-32.h
index d20f2e9b28be..2fbd47eba32d 100644
--- a/include/asm-mips/pgtable-32.h
+++ b/include/asm-mips/pgtable-32.h
@@ -156,9 +156,9 @@ pfn_pte(unsigned long pfn, pgprot_t prot)
 #define __pte_offset(address)                                           \
         (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 #define pte_offset(dir, address)                                        \
-        ((pte_t *) (pmd_page_vaddr(*dir)) + __pte_offset(address))
-#define pte_offset_kernel(dir, address) \
-        ((pte_t *) pmd_page_vaddr(*(dir)) +  __pte_offset(address))
+        ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
+#define pte_offset_kernel(dir, address)                                 \
+        ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
 
 #define pte_offset_map(dir, address)                                    \
         ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
diff --git a/include/asm-mips/pgtable-64.h b/include/asm-mips/pgtable-64.h
index b9b1e86493ee..a5b18710b6a4 100644
--- a/include/asm-mips/pgtable-64.h
+++ b/include/asm-mips/pgtable-64.h
@@ -212,9 +212,9 @@ static inline pmd_t *pmd_offset(pud_t * pud, unsigned long address)
 #define __pte_offset(address)                                           \
         (((address) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1))
 #define pte_offset(dir, address)                                        \
-        ((pte_t *) (pmd_page_vaddr(*dir)) + __pte_offset(address))
+        ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
 #define pte_offset_kernel(dir, address)                                 \
-        ((pte_t *) pmd_page_vaddr(*(dir)) +  __pte_offset(address))
+        ((pte_t *) pmd_page_vaddr(*(dir)) + __pte_offset(address))
 #define pte_offset_map(dir, address)                                    \
         ((pte_t *)page_address(pmd_page(*(dir))) + __pte_offset(address))
 #define pte_offset_map_nested(dir, address)                             \