diff options
-rw-r--r-- | drivers/char/agp/amd64-agp.c | 28 |
1 files changed, 18 insertions, 10 deletions
diff --git a/drivers/char/agp/amd64-agp.c b/drivers/char/agp/amd64-agp.c index 67ea3a60de74..70312da4c968 100644 --- a/drivers/char/agp/amd64-agp.c +++ b/drivers/char/agp/amd64-agp.c | |||
@@ -384,7 +384,7 @@ static int __devinit uli_agp_init(struct pci_dev *pdev) | |||
384 | { | 384 | { |
385 | u32 httfea,baseaddr,enuscr; | 385 | u32 httfea,baseaddr,enuscr; |
386 | struct pci_dev *dev1; | 386 | struct pci_dev *dev1; |
387 | int i; | 387 | int i, ret; |
388 | unsigned size = amd64_fetch_size(); | 388 | unsigned size = amd64_fetch_size(); |
389 | 389 | ||
390 | dev_info(&pdev->dev, "setting up ULi AGP\n"); | 390 | dev_info(&pdev->dev, "setting up ULi AGP\n"); |
@@ -400,15 +400,18 @@ static int __devinit uli_agp_init(struct pci_dev *pdev) | |||
400 | 400 | ||
401 | if (i == ARRAY_SIZE(uli_sizes)) { | 401 | if (i == ARRAY_SIZE(uli_sizes)) { |
402 | dev_info(&pdev->dev, "no ULi size found for %d\n", size); | 402 | dev_info(&pdev->dev, "no ULi size found for %d\n", size); |
403 | return -ENODEV; | 403 | ret = -ENODEV; |
404 | goto put; | ||
404 | } | 405 | } |
405 | 406 | ||
406 | /* shadow x86-64 registers into ULi registers */ | 407 | /* shadow x86-64 registers into ULi registers */ |
407 | pci_read_config_dword (k8_northbridges[0], AMD64_GARTAPERTUREBASE, &httfea); | 408 | pci_read_config_dword (k8_northbridges[0], AMD64_GARTAPERTUREBASE, &httfea); |
408 | 409 | ||
409 | /* if x86-64 aperture base is beyond 4G, exit here */ | 410 | /* if x86-64 aperture base is beyond 4G, exit here */ |
410 | if ((httfea & 0x7fff) >> (32 - 25)) | 411 | if ((httfea & 0x7fff) >> (32 - 25)) { |
411 | return -ENODEV; | 412 | ret = -ENODEV; |
413 | goto put; | ||
414 | } | ||
412 | 415 | ||
413 | httfea = (httfea& 0x7fff) << 25; | 416 | httfea = (httfea& 0x7fff) << 25; |
414 | 417 | ||
@@ -420,9 +423,10 @@ static int __devinit uli_agp_init(struct pci_dev *pdev) | |||
420 | enuscr= httfea+ (size * 1024 * 1024) - 1; | 423 | enuscr= httfea+ (size * 1024 * 1024) - 1; |
421 | pci_write_config_dword(dev1, ULI_X86_64_HTT_FEA_REG, httfea); | 424 | pci_write_config_dword(dev1, ULI_X86_64_HTT_FEA_REG, httfea); |
422 | pci_write_config_dword(dev1, ULI_X86_64_ENU_SCR_REG, enuscr); | 425 | pci_write_config_dword(dev1, ULI_X86_64_ENU_SCR_REG, enuscr); |
423 | 426 | ret = 0; | |
427 | put: | ||
424 | pci_dev_put(dev1); | 428 | pci_dev_put(dev1); |
425 | return 0; | 429 | return ret; |
426 | } | 430 | } |
427 | 431 | ||
428 | 432 | ||
@@ -441,7 +445,7 @@ static int nforce3_agp_init(struct pci_dev *pdev) | |||
441 | { | 445 | { |
442 | u32 tmp, apbase, apbar, aplimit; | 446 | u32 tmp, apbase, apbar, aplimit; |
443 | struct pci_dev *dev1; | 447 | struct pci_dev *dev1; |
444 | int i; | 448 | int i, ret; |
445 | unsigned size = amd64_fetch_size(); | 449 | unsigned size = amd64_fetch_size(); |
446 | 450 | ||
447 | dev_info(&pdev->dev, "setting up Nforce3 AGP\n"); | 451 | dev_info(&pdev->dev, "setting up Nforce3 AGP\n"); |
@@ -458,7 +462,8 @@ static int nforce3_agp_init(struct pci_dev *pdev) | |||
458 | 462 | ||
459 | if (i == ARRAY_SIZE(nforce3_sizes)) { | 463 | if (i == ARRAY_SIZE(nforce3_sizes)) { |
460 | dev_info(&pdev->dev, "no NForce3 size found for %d\n", size); | 464 | dev_info(&pdev->dev, "no NForce3 size found for %d\n", size); |
461 | return -ENODEV; | 465 | ret = -ENODEV; |
466 | goto put; | ||
462 | } | 467 | } |
463 | 468 | ||
464 | pci_read_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, &tmp); | 469 | pci_read_config_dword(dev1, NVIDIA_X86_64_1_APSIZE, &tmp); |
@@ -472,7 +477,8 @@ static int nforce3_agp_init(struct pci_dev *pdev) | |||
472 | /* if x86-64 aperture base is beyond 4G, exit here */ | 477 | /* if x86-64 aperture base is beyond 4G, exit here */ |
473 | if ( (apbase & 0x7fff) >> (32 - 25) ) { | 478 | if ( (apbase & 0x7fff) >> (32 - 25) ) { |
474 | dev_info(&pdev->dev, "aperture base > 4G\n"); | 479 | dev_info(&pdev->dev, "aperture base > 4G\n"); |
475 | return -ENODEV; | 480 | ret = -ENODEV; |
481 | goto put; | ||
476 | } | 482 | } |
477 | 483 | ||
478 | apbase = (apbase & 0x7fff) << 25; | 484 | apbase = (apbase & 0x7fff) << 25; |
@@ -488,9 +494,11 @@ static int nforce3_agp_init(struct pci_dev *pdev) | |||
488 | pci_write_config_dword(dev1, NVIDIA_X86_64_1_APBASE2, apbase); | 494 | pci_write_config_dword(dev1, NVIDIA_X86_64_1_APBASE2, apbase); |
489 | pci_write_config_dword(dev1, NVIDIA_X86_64_1_APLIMIT2, aplimit); | 495 | pci_write_config_dword(dev1, NVIDIA_X86_64_1_APLIMIT2, aplimit); |
490 | 496 | ||
497 | ret = 0; | ||
498 | put: | ||
491 | pci_dev_put(dev1); | 499 | pci_dev_put(dev1); |
492 | 500 | ||
493 | return 0; | 501 | return ret; |
494 | } | 502 | } |
495 | 503 | ||
496 | static int __devinit agp_amd64_probe(struct pci_dev *pdev, | 504 | static int __devinit agp_amd64_probe(struct pci_dev *pdev, |