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-rw-r--r--Documentation/powerpc/mpc52xx-device-tree-bindings.txt183
-rw-r--r--arch/powerpc/boot/dts/lite5200.dts135
-rw-r--r--arch/powerpc/boot/dts/lite5200b.dts135
3 files changed, 279 insertions, 174 deletions
diff --git a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
index 69f016f02bb0..e59fcbbe338c 100644
--- a/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
+++ b/Documentation/powerpc/mpc52xx-device-tree-bindings.txt
@@ -1,7 +1,7 @@
1MPC52xx Device Tree Bindings 1MPC5200 Device Tree Bindings
2---------------------------- 2----------------------------
3 3
4(c) 2006 Secret Lab Technologies Ltd 4(c) 2006-2007 Secret Lab Technologies Ltd
5Grant Likely <grant.likely at secretlab.ca> 5Grant Likely <grant.likely at secretlab.ca>
6 6
7********** DRAFT *********** 7********** DRAFT ***********
@@ -20,11 +20,11 @@ described in Documentation/powerpc/booting-without-of.txt), or passed
20by Open Firmare (IEEE 1275) compatible firmware using an OF compatible 20by Open Firmare (IEEE 1275) compatible firmware using an OF compatible
21client interface API. 21client interface API.
22 22
23This document specifies the requirements on the device-tree for mpc52xx 23This document specifies the requirements on the device-tree for mpc5200
24based boards. These requirements are above and beyond the details 24based boards. These requirements are above and beyond the details
25specified in either the OpenFirmware spec or booting-without-of.txt 25specified in either the OpenFirmware spec or booting-without-of.txt
26 26
27All new mpc52xx-based boards are expected to match this document. In 27All new mpc5200-based boards are expected to match this document. In
28cases where this document is not sufficient to support a new board port, 28cases where this document is not sufficient to support a new board port,
29this document should be updated as part of adding the new board support. 29this document should be updated as part of adding the new board support.
30 30
@@ -32,26 +32,26 @@ II - Philosophy
32=============== 32===============
33The core of this document is naming convention. The whole point of 33The core of this document is naming convention. The whole point of
34defining this convention is to reduce or eliminate the number of 34defining this convention is to reduce or eliminate the number of
35special cases required to support a 52xx board. If all 52xx boards 35special cases required to support a 5200 board. If all 5200 boards
36follow the same convention, then generic 52xx support code will work 36follow the same convention, then generic 5200 support code will work
37rather than coding special cases for each new board. 37rather than coding special cases for each new board.
38 38
39This section tries to capture the thought process behind why the naming 39This section tries to capture the thought process behind why the naming
40convention is what it is. 40convention is what it is.
41 41
421. Node names 421. names
43------------- 43---------
44There is strong convention/requirements already established for children 44There is strong convention/requirements already established for children
45of the root node. 'cpus' describes the processor cores, 'memory' 45of the root node. 'cpus' describes the processor cores, 'memory'
46describes memory, and 'chosen' provides boot configuration. Other nodes 46describes memory, and 'chosen' provides boot configuration. Other nodes
47are added to describe devices attached to the processor local bus. 47are added to describe devices attached to the processor local bus.
48
48Following convention already established with other system-on-chip 49Following convention already established with other system-on-chip
49processors, MPC52xx boards must have an 'soc5200' node as a child of the 50processors, 5200 device trees should use the name 'soc5200' for the
50root node. 51parent node of on chip devices, and the root node should be its parent.
51 52
52The soc5200 node holds child nodes for all on chip devices. Child nodes 53Child nodes are typically named after the configured function. ie.
53are typically named after the configured function. ie. the FEC node is 54the FEC node is named 'ethernet', and a PSC in uart mode is named 'serial'.
54named 'ethernet', and a PSC in uart mode is named 'serial'.
55 55
562. device_type property 562. device_type property
57----------------------- 57-----------------------
@@ -66,28 +66,47 @@ exactly.
66Since device_type isn't enough to match devices to drivers, there also 66Since device_type isn't enough to match devices to drivers, there also
67needs to be a naming convention for the compatible property. Compatible 67needs to be a naming convention for the compatible property. Compatible
68is an list of device descriptions sorted from specific to generic. For 68is an list of device descriptions sorted from specific to generic. For
69the mpc52xx, the required format for each compatible value is 69the mpc5200, the required format for each compatible value is
70<chip>-<device>[-<mode>]. At the minimum, the list shall contain two 70<chip>-<device>[-<mode>]. The OS should be able to match a device driver
71items; the first specifying the exact chip, and the second specifying 71to the device based solely on the compatible value. If two drivers
72mpc52xx for the chip. 72match on the compatible list; the 'most compatible' driver should be
73 73selected.
74ie. ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc52xx-ethernet" 74
75 75The split between the MPC5200 and the MPC5200B leaves a bit of a
76The idea here is that most drivers will match to the most generic field 76connundrum. How should the compatible property be set up to provide
77in the compatible list (mpc52xx-*), but can also test the more specific 77maximum compatability information; but still acurately describe the
78field for enabling bug fixes or extra features. 78chip? For the MPC5200; the answer is easy. Most of the SoC devices
79originally appeared on the MPC5200. Since they didn't exist anywhere
80else; the 5200 compatible properties will contain only one item;
81"mpc5200-<device>".
82
83The 5200B is almost the same as the 5200, but not quite. It fixes
84silicon bugs and it adds a small number of enhancements. Most of the
85devices either provide exactly the same interface as on the 5200. A few
86devices have extra functions but still have a backwards compatible mode.
87To express this infomation as completely as possible, 5200B device trees
88should have two items in the compatible list;
89"mpc5200b-<device>\0mpc5200-<device>". It is *strongly* recommended
90that 5200B device trees follow this convention (instead of only listing
91the base mpc5200 item).
92
93If another chip appear on the market with one of the mpc5200 SoC
94devices, then the compatible list should include mpc5200-<device>.
95
96ie. ethernet on mpc5200: compatible = "mpc5200-ethernet"
97 ethernet on mpc5200b: compatible = "mpc5200b-ethernet\0mpc5200-ethernet"
79 98
80Modal devices, like PSCs, also append the configured function to the 99Modal devices, like PSCs, also append the configured function to the
81end of the compatible field. ie. A PSC in i2s mode would specify 100end of the compatible field. ie. A PSC in i2s mode would specify
82"mpc52xx-psc-i2s", not "mpc52xx-i2s". This convention is chosen to 101"mpc5200-psc-i2s", not "mpc5200-i2s". This convention is chosen to
83avoid naming conflicts with non-psc devices providing the same 102avoid naming conflicts with non-psc devices providing the same
84function. For example, "mpc52xx-spi" and "mpc52xx-psc-spi" describe 103function. For example, "mpc5200-spi" and "mpc5200-psc-spi" describe
85the mpc5200 simple spi device and a PSC spi mode respectively. 104the mpc5200 simple spi device and a PSC spi mode respectively.
86 105
87If the soc device is more generic and present on other SOCs, the 106If the soc device is more generic and present on other SOCs, the
88compatible property can specify the more generic device type also. 107compatible property can specify the more generic device type also.
89 108
90ie. mscan: compatible = "mpc5200-mscan\0mpc52xx-mscan\0fsl,mscan"; 109ie. mscan: compatible = "mpc5200-mscan\0fsl,mscan";
91 110
92At the time of writing, exact chip may be either 'mpc5200' or 111At the time of writing, exact chip may be either 'mpc5200' or
93'mpc5200b'. 112'mpc5200b'.
@@ -96,7 +115,7 @@ Device drivers should always try to match as generically as possible.
96 115
97III - Structure 116III - Structure
98=============== 117===============
99The device tree for an mpc52xx board follows the structure defined in 118The device tree for an mpc5200 board follows the structure defined in
100booting-without-of.txt with the following additional notes: 119booting-without-of.txt with the following additional notes:
101 120
1020) the root node 1210) the root node
@@ -115,7 +134,7 @@ Typical memory description node; see booting-without-of.
115 134
1163) The soc5200 node 1353) The soc5200 node
117------------------- 136-------------------
118This node describes the on chip SOC peripherals. Every mpc52xx based 137This node describes the on chip SOC peripherals. Every mpc5200 based
119board will have this node, and as such there is a common naming 138board will have this node, and as such there is a common naming
120convention for SOC devices. 139convention for SOC devices.
121 140
@@ -125,71 +144,111 @@ name type description
125device_type string must be "soc" 144device_type string must be "soc"
126ranges int should be <0 baseaddr baseaddr+10000> 145ranges int should be <0 baseaddr baseaddr+10000>
127reg int must be <baseaddr 10000> 146reg int must be <baseaddr 10000>
147compatible string mpc5200: "mpc5200-soc"
148 mpc5200b: "mpc5200b-soc\0mpc5200-soc"
149system-frequency int Fsystem frequency; source of all
150 other clocks.
151bus-frequency int IPB bus frequency in HZ. Clock rate
152 used by most of the soc devices.
153#interrupt-cells int must be <3>.
128 154
129Recommended properties: 155Recommended properties:
130name type description 156name type description
131---- ---- ----------- 157---- ---- -----------
132compatible string should be "<chip>-soc\0mpc52xx-soc" 158model string Exact model of the chip;
133 ie. "mpc5200b-soc\0mpc52xx-soc" 159 ie: model="fsl,mpc5200"
134#interrupt-cells int must be <3>. If it is not defined 160revision string Silicon revision of chip
135 here then it must be defined in every 161 ie: revision="M08A"
136 soc device node. 162
137bus-frequency int IPB bus frequency in HZ. Clock rate 163The 'model' and 'revision' properties are *strongly* recommended. Having
138 used by most of the soc devices. 164them presence acts as a bit of a safety net for working around as yet
139 Defining it here avoids needing it 165undiscovered bugs on one version of silicon. For example, device drivers
140 added to every device node. 166can use the model and revision properties to decide if a bug fix should
167be turned on.
141 168
1424) soc5200 child nodes 1694) soc5200 child nodes
143---------------------- 170----------------------
144Any on chip SOC devices available to Linux must appear as soc5200 child nodes. 171Any on chip SOC devices available to Linux must appear as soc5200 child nodes.
145 172
146Note: in the tables below, '*' matches all <chip> values. ie. 173Note: The tables below show the value for the mpc5200. A mpc5200b device
147*-pic would translate to "mpc5200-pic\0mpc52xx-pic" 174tree should use the "mpc5200b-<device>\0mpc5200-<device> form.
148 175
149Required soc5200 child nodes: 176Required soc5200 child nodes:
150name device_type compatible Description 177name device_type compatible Description
151---- ----------- ---------- ----------- 178---- ----------- ---------- -----------
152cdm@<addr> cdm *-cmd Clock Distribution 179cdm@<addr> cdm mpc5200-cmd Clock Distribution
153pic@<addr> interrupt-controller *-pic need an interrupt 180pic@<addr> interrupt-controller mpc5200-pic need an interrupt
154 controller to boot 181 controller to boot
155bestcomm@<addr> dma-controller *-bestcomm 52xx pic also requires 182bestcomm@<addr> dma-controller mpc5200-bestcomm 5200 pic also requires
156 the bestcomm device 183 the bestcomm device
157 184
158Recommended soc5200 child nodes; populate as needed for your board 185Recommended soc5200 child nodes; populate as needed for your board
159name device_type compatible Description 186name device_type compatible Description
160---- ----------- ---------- ----------- 187---- ----------- ---------- -----------
161gpt@<addr> gpt *-gpt General purpose timers 188gpt@<addr> gpt mpc5200-gpt General purpose timers
162rtc@<addr> rtc *-rtc Real time clock 189rtc@<addr> rtc mpc5200-rtc Real time clock
163mscan@<addr> mscan *-mscan CAN bus controller 190mscan@<addr> mscan mpc5200-mscan CAN bus controller
164pci@<addr> pci *-pci PCI bridge 191pci@<addr> pci mpc5200-pci PCI bridge
165serial@<addr> serial *-psc-uart PSC in serial mode 192serial@<addr> serial mpc5200-psc-uart PSC in serial mode
166i2s@<addr> sound *-psc-i2s PSC in i2s mode 193i2s@<addr> sound mpc5200-psc-i2s PSC in i2s mode
167ac97@<addr> sound *-psc-ac97 PSC in ac97 mode 194ac97@<addr> sound mpc5200-psc-ac97 PSC in ac97 mode
168spi@<addr> spi *-psc-spi PSC in spi mode 195spi@<addr> spi mpc5200-psc-spi PSC in spi mode
169irda@<addr> irda *-psc-irda PSC in IrDA mode 196irda@<addr> irda mpc5200-psc-irda PSC in IrDA mode
170spi@<addr> spi *-spi MPC52xx spi device 197spi@<addr> spi mpc5200-spi MPC5200 spi device
171ethernet@<addr> network *-fec MPC52xx ethernet device 198ethernet@<addr> network mpc5200-fec MPC5200 ethernet device
172ata@<addr> ata *-ata IDE ATA interface 199ata@<addr> ata mpc5200-ata IDE ATA interface
173i2c@<addr> i2c *-i2c I2C controller 200i2c@<addr> i2c mpc5200-i2c I2C controller
174usb@<addr> usb-ohci-be *-ohci,ohci-be USB controller 201usb@<addr> usb-ohci-be mpc5200-ohci,ohci-be USB controller
175xlb@<addr> xlb *-xlb XLB arbritrator 202xlb@<addr> xlb mpc5200-xlb XLB arbritrator
203
204Important child node properties
205name type description
206---- ---- -----------
207cell-index int When multiple devices are present, is the
208 index of the device in the hardware (ie. There
209 are 6 PSC on the 5200 numbered PSC1 to PSC6)
210 PSC1 has 'cell-index = <0>'
211 PSC4 has 'cell-index = <3>'
212
2135) General Purpose Timer nodes (child of soc5200 node)
214On the mpc5200 and 5200b, GPT0 has a watchdog timer function. If the board
215design supports the internal wdt, then the device node for GPT0 should
216include the empty property 'has-wdt'.
217
2186) PSC nodes (child of soc5200 node)
219PSC nodes can define the optional 'port-number' property to force assignment
220order of serial ports. For example, PSC5 might be physically connected to
221the port labeled 'COM1' and PSC1 wired to 'COM1'. In this case, PSC5 would
222have a "port-number = <0>" property, and PSC1 would have "port-number = <1>".
223
224PSC in i2s mode: The mpc5200 and mpc5200b PSCs are not compatible when in
225i2s mode. An 'mpc5200b-psc-i2s' node cannot include 'mpc5200-psc-i2s' in the
226compatible field.
176 227
177IV - Extra Notes 228IV - Extra Notes
178================ 229================
179 230
1801. Interrupt mapping 2311. Interrupt mapping
181-------------------- 232--------------------
182The mpc52xx pic driver splits hardware IRQ numbers into two levels. The 233The mpc5200 pic driver splits hardware IRQ numbers into two levels. The
183split reflects the layout of the PIC hardware itself, which groups 234split reflects the layout of the PIC hardware itself, which groups
184interrupts into one of three groups; CRIT, MAIN or PERP. Also, the 235interrupts into one of three groups; CRIT, MAIN or PERP. Also, the
185Bestcomm dma engine has it's own set of interrupt sources which are 236Bestcomm dma engine has it's own set of interrupt sources which are
186cascaded off of peripheral interrupt 0, which the driver interprets as a 237cascaded off of peripheral interrupt 0, which the driver interprets as a
187fourth group, SDMA. 238fourth group, SDMA.
188 239
189The interrupts property for device nodes using the mpc52xx pic consists 240The interrupts property for device nodes using the mpc5200 pic consists
190of three cells; <L1 L2 level> 241of three cells; <L1 L2 level>
191 242
192 L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3] 243 L1 := [CRIT=0, MAIN=1, PERP=2, SDMA=3]
193 L2 := interrupt number; directly mapped from the value in the 244 L2 := interrupt number; directly mapped from the value in the
194 "ICTL PerStat, MainStat, CritStat Encoded Register" 245 "ICTL PerStat, MainStat, CritStat Encoded Register"
195 level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3] 246 level := [LEVEL_HIGH=0, EDGE_RISING=1, EDGE_FALLING=2, LEVEL_LOW=3]
247
2482. Shared registers
249-------------------
250Some SoC devices share registers between them. ie. the i2c devices use
251a single clock control register, and almost all device are affected by
252the port_config register. Devices which need to manipulate shared regs
253should look to the parent SoC node. The soc node is responsible
254for arbitrating all shared register access.
diff --git a/arch/powerpc/boot/dts/lite5200.dts b/arch/powerpc/boot/dts/lite5200.dts
index 186870704ad9..c03103c63285 100644
--- a/arch/powerpc/boot/dts/lite5200.dts
+++ b/arch/powerpc/boot/dts/lite5200.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Lite5200 board Device Tree Source 2 * Lite5200 board Device Tree Source
3 * 3 *
4 * Copyright 2006 Secret Lab Technologies Ltd. 4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca> 5 * Grant Likely <grant.likely@secretlab.ca>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -17,8 +17,9 @@
17 */ 17 */
18 18
19/ { 19/ {
20 model = "Lite5200"; 20 model = "fsl,lite5200";
21 compatible = "lite5200\0lite52xx\0mpc5200\0mpc52xx"; 21 // revision = "1.0";
22 compatible = "fsl,lite5200\0generic-mpc5200";
22 #address-cells = <1>; 23 #address-cells = <1>;
23 #size-cells = <1>; 24 #size-cells = <1>;
24 25
@@ -47,14 +48,17 @@
47 }; 48 };
48 49
49 soc5200@f0000000 { 50 soc5200@f0000000 {
51 model = "fsl,mpc5200";
52 revision = "" // from bootloader
50 #interrupt-cells = <3>; 53 #interrupt-cells = <3>;
51 device_type = "soc"; 54 device_type = "soc";
52 ranges = <0 f0000000 f0010000>; 55 ranges = <0 f0000000 f0010000>;
53 reg = <f0000000 00010000>; 56 reg = <f0000000 00010000>;
54 bus-frequency = <0>; // from bootloader 57 bus-frequency = <0>; // from bootloader
58 system-frequency = <0>; // from bootloader
55 59
56 cdm@200 { 60 cdm@200 {
57 compatible = "mpc5200-cdm\0mpc52xx-cdm"; 61 compatible = "mpc5200-cdm";
58 reg = <200 38>; 62 reg = <200 38>;
59 }; 63 };
60 64
@@ -64,77 +68,86 @@
64 interrupt-controller; 68 interrupt-controller;
65 #interrupt-cells = <3>; 69 #interrupt-cells = <3>;
66 device_type = "interrupt-controller"; 70 device_type = "interrupt-controller";
67 compatible = "mpc5200-pic\0mpc52xx-pic"; 71 compatible = "mpc5200-pic";
68 reg = <500 80>; 72 reg = <500 80>;
69 built-in; 73 built-in;
70 }; 74 };
71 75
72 gpt@600 { // General Purpose Timer 76 gpt@600 { // General Purpose Timer
73 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 77 compatible = "mpc5200-gpt";
74 device_type = "gpt"; 78 device_type = "gpt";
79 cell-index = <0>;
75 reg = <600 10>; 80 reg = <600 10>;
76 interrupts = <1 9 0>; 81 interrupts = <1 9 0>;
77 interrupt-parent = <500>; 82 interrupt-parent = <500>;
83 has-wdt;
78 }; 84 };
79 85
80 gpt@610 { // General Purpose Timer 86 gpt@610 { // General Purpose Timer
81 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 87 compatible = "mpc5200-gpt";
82 device_type = "gpt"; 88 device_type = "gpt";
89 cell-index = <1>;
83 reg = <610 10>; 90 reg = <610 10>;
84 interrupts = <1 a 0>; 91 interrupts = <1 a 0>;
85 interrupt-parent = <500>; 92 interrupt-parent = <500>;
86 }; 93 };
87 94
88 gpt@620 { // General Purpose Timer 95 gpt@620 { // General Purpose Timer
89 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 96 compatible = "mpc5200-gpt";
90 device_type = "gpt"; 97 device_type = "gpt";
98 cell-index = <2>;
91 reg = <620 10>; 99 reg = <620 10>;
92 interrupts = <1 b 0>; 100 interrupts = <1 b 0>;
93 interrupt-parent = <500>; 101 interrupt-parent = <500>;
94 }; 102 };
95 103
96 gpt@630 { // General Purpose Timer 104 gpt@630 { // General Purpose Timer
97 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 105 compatible = "mpc5200-gpt";
98 device_type = "gpt"; 106 device_type = "gpt";
107 cell-index = <3>;
99 reg = <630 10>; 108 reg = <630 10>;
100 interrupts = <1 c 0>; 109 interrupts = <1 c 0>;
101 interrupt-parent = <500>; 110 interrupt-parent = <500>;
102 }; 111 };
103 112
104 gpt@640 { // General Purpose Timer 113 gpt@640 { // General Purpose Timer
105 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 114 compatible = "mpc5200-gpt";
106 device_type = "gpt"; 115 device_type = "gpt";
116 cell-index = <4>;
107 reg = <640 10>; 117 reg = <640 10>;
108 interrupts = <1 d 0>; 118 interrupts = <1 d 0>;
109 interrupt-parent = <500>; 119 interrupt-parent = <500>;
110 }; 120 };
111 121
112 gpt@650 { // General Purpose Timer 122 gpt@650 { // General Purpose Timer
113 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 123 compatible = "mpc5200-gpt";
114 device_type = "gpt"; 124 device_type = "gpt";
125 cell-index = <5>;
115 reg = <650 10>; 126 reg = <650 10>;
116 interrupts = <1 e 0>; 127 interrupts = <1 e 0>;
117 interrupt-parent = <500>; 128 interrupt-parent = <500>;
118 }; 129 };
119 130
120 gpt@660 { // General Purpose Timer 131 gpt@660 { // General Purpose Timer
121 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 132 compatible = "mpc5200-gpt";
122 device_type = "gpt"; 133 device_type = "gpt";
134 cell-index = <6>;
123 reg = <660 10>; 135 reg = <660 10>;
124 interrupts = <1 f 0>; 136 interrupts = <1 f 0>;
125 interrupt-parent = <500>; 137 interrupt-parent = <500>;
126 }; 138 };
127 139
128 gpt@670 { // General Purpose Timer 140 gpt@670 { // General Purpose Timer
129 compatible = "mpc5200-gpt\0mpc52xx-gpt"; 141 compatible = "mpc5200-gpt";
130 device_type = "gpt"; 142 device_type = "gpt";
143 cell-index = <7>;
131 reg = <670 10>; 144 reg = <670 10>;
132 interrupts = <1 10 0>; 145 interrupts = <1 10 0>;
133 interrupt-parent = <500>; 146 interrupt-parent = <500>;
134 }; 147 };
135 148
136 rtc@800 { // Real time clock 149 rtc@800 { // Real time clock
137 compatible = "mpc5200-rtc\0mpc52xx-rtc"; 150 compatible = "mpc5200-rtc";
138 device_type = "rtc"; 151 device_type = "rtc";
139 reg = <800 100>; 152 reg = <800 100>;
140 interrupts = <1 5 0 1 6 0>; 153 interrupts = <1 5 0 1 6 0>;
@@ -143,7 +156,8 @@
143 156
144 mscan@900 { 157 mscan@900 {
145 device_type = "mscan"; 158 device_type = "mscan";
146 compatible = "mpc5200-mscan\0mpc52xx-mscan"; 159 compatible = "mpc5200-mscan";
160 cell-index = <0>;
147 interrupts = <2 11 0>; 161 interrupts = <2 11 0>;
148 interrupt-parent = <500>; 162 interrupt-parent = <500>;
149 reg = <900 80>; 163 reg = <900 80>;
@@ -151,21 +165,22 @@
151 165
152 mscan@980 { 166 mscan@980 {
153 device_type = "mscan"; 167 device_type = "mscan";
154 compatible = "mpc5200-mscan\0mpc52xx-mscan"; 168 compatible = "mpc5200-mscan";
169 cell-index = <1>;
155 interrupts = <1 12 0>; 170 interrupts = <1 12 0>;
156 interrupt-parent = <500>; 171 interrupt-parent = <500>;
157 reg = <980 80>; 172 reg = <980 80>;
158 }; 173 };
159 174
160 gpio@b00 { 175 gpio@b00 {
161 compatible = "mpc5200-gpio\0mpc52xx-gpio"; 176 compatible = "mpc5200-gpio";
162 reg = <b00 40>; 177 reg = <b00 40>;
163 interrupts = <1 7 0>; 178 interrupts = <1 7 0>;
164 interrupt-parent = <500>; 179 interrupt-parent = <500>;
165 }; 180 };
166 181
167 gpio-wkup@b00 { 182 gpio-wkup@b00 {
168 compatible = "mpc5200-gpio-wkup\0mpc52xx-gpio-wkup"; 183 compatible = "mpc5200-gpio-wkup";
169 reg = <c00 40>; 184 reg = <c00 40>;
170 interrupts = <1 8 0 0 3 0>; 185 interrupts = <1 8 0 0 3 0>;
171 interrupt-parent = <500>; 186 interrupt-parent = <500>;
@@ -176,7 +191,7 @@
176 #size-cells = <2>; 191 #size-cells = <2>;
177 #address-cells = <3>; 192 #address-cells = <3>;
178 device_type = "pci"; 193 device_type = "pci";
179 compatible = "mpc5200-pci\0mpc52xx-pci"; 194 compatible = "mpc5200-pci";
180 reg = <d00 100>; 195 reg = <d00 100>;
181 interrupt-map-mask = <f800 0 0 7>; 196 interrupt-map-mask = <f800 0 0 7>;
182 interrupt-map = <c000 0 0 1 500 0 0 3 197 interrupt-map = <c000 0 0 1 500 0 0 3
@@ -194,7 +209,7 @@
194 209
195 spi@f00 { 210 spi@f00 {
196 device_type = "spi"; 211 device_type = "spi";
197 compatible = "mpc5200-spi\0mpc52xx-spi"; 212 compatible = "mpc5200-spi";
198 reg = <f00 20>; 213 reg = <f00 20>;
199 interrupts = <2 d 0 2 e 0>; 214 interrupts = <2 d 0 2 e 0>;
200 interrupt-parent = <500>; 215 interrupt-parent = <500>;
@@ -202,7 +217,7 @@
202 217
203 usb@1000 { 218 usb@1000 {
204 device_type = "usb-ohci-be"; 219 device_type = "usb-ohci-be";
205 compatible = "mpc5200-ohci\0mpc52xx-ohci\0ohci-be"; 220 compatible = "mpc5200-ohci\0ohci-be";
206 reg = <1000 ff>; 221 reg = <1000 ff>;
207 interrupts = <2 6 0>; 222 interrupts = <2 6 0>;
208 interrupt-parent = <500>; 223 interrupt-parent = <500>;
@@ -210,7 +225,7 @@
210 225
211 bestcomm@1200 { 226 bestcomm@1200 {
212 device_type = "dma-controller"; 227 device_type = "dma-controller";
213 compatible = "mpc5200-bestcomm\0mpc52xx-bestcomm"; 228 compatible = "mpc5200-bestcomm";
214 reg = <1200 80>; 229 reg = <1200 80>;
215 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 230 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
216 3 4 0 3 5 0 3 6 0 3 7 0 231 3 4 0 3 5 0 3 6 0 3 7 0
@@ -220,67 +235,73 @@
220 }; 235 };
221 236
222 xlb@1f00 { 237 xlb@1f00 {
223 compatible = "mpc5200-xlb\0mpc52xx-xlb"; 238 compatible = "mpc5200-xlb";
224 reg = <1f00 100>; 239 reg = <1f00 100>;
225 }; 240 };
226 241
227 serial@2000 { // PSC1 242 serial@2000 { // PSC1
228 device_type = "serial"; 243 device_type = "serial";
229 compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; 244 compatible = "mpc5200-psc-uart";
230 port-number = <0>; // Logical port assignment 245 port-number = <0>; // Logical port assignment
246 cell-index = <0>;
231 reg = <2000 100>; 247 reg = <2000 100>;
232 interrupts = <2 1 0>; 248 interrupts = <2 1 0>;
233 interrupt-parent = <500>; 249 interrupt-parent = <500>;
234 }; 250 };
235 251
236 // PSC2 in spi mode example 252 // PSC2 in ac97 mode example
237 spi@2200 { // PSC2 253 //ac97@2200 { // PSC2
238 device_type = "spi"; 254 // device_type = "sound";
239 compatible = "mpc5200-psc-spi\0mpc52xx-psc-spi"; 255 // compatible = "mpc5200-psc-ac97";
240 reg = <2200 100>; 256 // cell-index = <1>;
241 interrupts = <2 2 0>; 257 // reg = <2200 100>;
242 interrupt-parent = <500>; 258 // interrupts = <2 2 0>;
243 }; 259 // interrupt-parent = <500>;
260 //};
244 261
245 // PSC3 in CODEC mode example 262 // PSC3 in CODEC mode example
246 i2s@2400 { // PSC3 263 //i2s@2400 { // PSC3
247 device_type = "sound"; 264 // device_type = "sound";
248 compatible = "mpc5200-psc-i2s\0mpc52xx-psc-i2s"; 265 // compatible = "mpc5200-psc-i2s";
249 reg = <2400 100>; 266 // cell-index = <2>;
250 interrupts = <2 3 0>; 267 // reg = <2400 100>;
251 interrupt-parent = <500>; 268 // interrupts = <2 3 0>;
252 }; 269 // interrupt-parent = <500>;
270 //};
253 271
254 // PSC4 unconfigured 272 // PSC4 in uart mode example
255 //serial@2600 { // PSC4 273 //serial@2600 { // PSC4
256 // device_type = "serial"; 274 // device_type = "serial";
257 // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; 275 // compatible = "mpc5200-psc-uart";
276 // cell-index = <3>;
258 // reg = <2600 100>; 277 // reg = <2600 100>;
259 // interrupts = <2 b 0>; 278 // interrupts = <2 b 0>;
260 // interrupt-parent = <500>; 279 // interrupt-parent = <500>;
261 //}; 280 //};
262 281
263 // PSC5 unconfigured 282 // PSC5 in uart mode example
264 //serial@2800 { // PSC5 283 //serial@2800 { // PSC5
265 // device_type = "serial"; 284 // device_type = "serial";
266 // compatible = "mpc5200-psc-uart\0mpc52xx-psc-uart"; 285 // compatible = "mpc5200-psc-uart";
286 // cell-index = <4>;
267 // reg = <2800 100>; 287 // reg = <2800 100>;
268 // interrupts = <2 c 0>; 288 // interrupts = <2 c 0>;
269 // interrupt-parent = <500>; 289 // interrupt-parent = <500>;
270 //}; 290 //};
271 291
272 // PSC6 in AC97 mode example 292 // PSC6 in spi mode example
273 ac97@2c00 { // PSC6 293 //spi@2c00 { // PSC6
274 device_type = "sound"; 294 // device_type = "spi";
275 compatible = "mpc5200-psc-ac97\0mpc52xx-psc-ac97"; 295 // compatible = "mpc5200-psc-spi";
276 reg = <2c00 100>; 296 // cell-index = <5>;
277 interrupts = <2 4 0>; 297 // reg = <2c00 100>;
278 interrupt-parent = <500>; 298 // interrupts = <2 4 0>;
279 }; 299 // interrupt-parent = <500>;
300 //};
280 301
281 ethernet@3000 { 302 ethernet@3000 {
282 device_type = "network"; 303 device_type = "network";
283 compatible = "mpc5200-fec\0mpc52xx-fec"; 304 compatible = "mpc5200-fec";
284 reg = <3000 800>; 305 reg = <3000 800>;
285 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 306 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
286 interrupts = <2 5 0>; 307 interrupts = <2 5 0>;
@@ -289,7 +310,7 @@
289 310
290 ata@3a00 { 311 ata@3a00 {
291 device_type = "ata"; 312 device_type = "ata";
292 compatible = "mpc5200-ata\0mpc52xx-ata"; 313 compatible = "mpc5200-ata";
293 reg = <3a00 100>; 314 reg = <3a00 100>;
294 interrupts = <2 7 0>; 315 interrupts = <2 7 0>;
295 interrupt-parent = <500>; 316 interrupt-parent = <500>;
@@ -297,7 +318,8 @@
297 318
298 i2c@3d00 { 319 i2c@3d00 {
299 device_type = "i2c"; 320 device_type = "i2c";
300 compatible = "mpc5200-i2c\0mpc52xx-i2c"; 321 compatible = "mpc5200-i2c";
322 cell-index = <0>;
301 reg = <3d00 40>; 323 reg = <3d00 40>;
302 interrupts = <2 f 0>; 324 interrupts = <2 f 0>;
303 interrupt-parent = <500>; 325 interrupt-parent = <500>;
@@ -305,14 +327,15 @@
305 327
306 i2c@3d40 { 328 i2c@3d40 {
307 device_type = "i2c"; 329 device_type = "i2c";
308 compatible = "mpc5200-i2c\0mpc52xx-i2c"; 330 compatible = "mpc5200-i2c";
331 cell-index = <1>;
309 reg = <3d40 40>; 332 reg = <3d40 40>;
310 interrupts = <2 10 0>; 333 interrupts = <2 10 0>;
311 interrupt-parent = <500>; 334 interrupt-parent = <500>;
312 }; 335 };
313 sram@8000 { 336 sram@8000 {
314 device_type = "sram"; 337 device_type = "sram";
315 compatible = "mpc5200-sram\0mpc52xx-sram\0sram"; 338 compatible = "mpc5200-sram\0sram";
316 reg = <8000 4000>; 339 reg = <8000 4000>;
317 }; 340 };
318 }; 341 };
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 5bb2760d7c30..3875ca9a9a62 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * Lite5200B board Device Tree Source 2 * Lite5200B board Device Tree Source
3 * 3 *
4 * Copyright 2006 Secret Lab Technologies Ltd. 4 * Copyright 2006-2007 Secret Lab Technologies Ltd.
5 * Grant Likely <grant.likely@secretlab.ca> 5 * Grant Likely <grant.likely@secretlab.ca>
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
@@ -17,8 +17,9 @@
17 */ 17 */
18 18
19/ { 19/ {
20 model = "Lite5200b"; 20 model = "fsl,lite5200b";
21 compatible = "lite5200b\0lite52xx\0mpc5200b\0mpc52xx"; 21 // revision = "1.0";
22 compatible = "fsl,lite5200b\0generic-mpc5200";
22 #address-cells = <1>; 23 #address-cells = <1>;
23 #size-cells = <1>; 24 #size-cells = <1>;
24 25
@@ -47,14 +48,17 @@
47 }; 48 };
48 49
49 soc5200@f0000000 { 50 soc5200@f0000000 {
51 model = "fsl,mpc5200b";
52 revision = ""; // from bootloader
50 #interrupt-cells = <3>; 53 #interrupt-cells = <3>;
51 device_type = "soc"; 54 device_type = "soc";
52 ranges = <0 f0000000 f0010000>; 55 ranges = <0 f0000000 f0010000>;
53 reg = <f0000000 00010000>; 56 reg = <f0000000 00010000>;
54 bus-frequency = <0>; // from bootloader 57 bus-frequency = <0>; // from bootloader
58 system-frequency = <0>; // from bootloader
55 59
56 cdm@200 { 60 cdm@200 {
57 compatible = "mpc5200b-cdm\0mpc52xx-cdm"; 61 compatible = "mpc5200b-cdm\0mpc5200-cdm";
58 reg = <200 38>; 62 reg = <200 38>;
59 }; 63 };
60 64
@@ -64,77 +68,86 @@
64 interrupt-controller; 68 interrupt-controller;
65 #interrupt-cells = <3>; 69 #interrupt-cells = <3>;
66 device_type = "interrupt-controller"; 70 device_type = "interrupt-controller";
67 compatible = "mpc5200b-pic\0mpc52xx-pic"; 71 compatible = "mpc5200b-pic\0mpc5200-pic";
68 reg = <500 80>; 72 reg = <500 80>;
69 built-in; 73 built-in;
70 }; 74 };
71 75
72 gpt@600 { // General Purpose Timer 76 gpt@600 { // General Purpose Timer
73 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 77 compatible = "mpc5200b-gpt\0mpc5200-gpt";
74 device_type = "gpt"; 78 device_type = "gpt";
79 cell-index = <0>;
75 reg = <600 10>; 80 reg = <600 10>;
76 interrupts = <1 9 0>; 81 interrupts = <1 9 0>;
77 interrupt-parent = <500>; 82 interrupt-parent = <500>;
83 has-wdt;
78 }; 84 };
79 85
80 gpt@610 { // General Purpose Timer 86 gpt@610 { // General Purpose Timer
81 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 87 compatible = "mpc5200b-gpt\0mpc5200-gpt";
82 device_type = "gpt"; 88 device_type = "gpt";
89 cell-index = <1>;
83 reg = <610 10>; 90 reg = <610 10>;
84 interrupts = <1 a 0>; 91 interrupts = <1 a 0>;
85 interrupt-parent = <500>; 92 interrupt-parent = <500>;
86 }; 93 };
87 94
88 gpt@620 { // General Purpose Timer 95 gpt@620 { // General Purpose Timer
89 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 96 compatible = "mpc5200b-gpt\0mpc5200-gpt";
90 device_type = "gpt"; 97 device_type = "gpt";
98 cell-index = <2>;
91 reg = <620 10>; 99 reg = <620 10>;
92 interrupts = <1 b 0>; 100 interrupts = <1 b 0>;
93 interrupt-parent = <500>; 101 interrupt-parent = <500>;
94 }; 102 };
95 103
96 gpt@630 { // General Purpose Timer 104 gpt@630 { // General Purpose Timer
97 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 105 compatible = "mpc5200b-gpt\0mpc5200-gpt";
98 device_type = "gpt"; 106 device_type = "gpt";
107 cell-index = <3>;
99 reg = <630 10>; 108 reg = <630 10>;
100 interrupts = <1 c 0>; 109 interrupts = <1 c 0>;
101 interrupt-parent = <500>; 110 interrupt-parent = <500>;
102 }; 111 };
103 112
104 gpt@640 { // General Purpose Timer 113 gpt@640 { // General Purpose Timer
105 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 114 compatible = "mpc5200b-gpt\0mpc5200-gpt";
106 device_type = "gpt"; 115 device_type = "gpt";
116 cell-index = <4>;
107 reg = <640 10>; 117 reg = <640 10>;
108 interrupts = <1 d 0>; 118 interrupts = <1 d 0>;
109 interrupt-parent = <500>; 119 interrupt-parent = <500>;
110 }; 120 };
111 121
112 gpt@650 { // General Purpose Timer 122 gpt@650 { // General Purpose Timer
113 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 123 compatible = "mpc5200b-gpt\0mpc5200-gpt";
114 device_type = "gpt"; 124 device_type = "gpt";
125 cell-index = <5>;
115 reg = <650 10>; 126 reg = <650 10>;
116 interrupts = <1 e 0>; 127 interrupts = <1 e 0>;
117 interrupt-parent = <500>; 128 interrupt-parent = <500>;
118 }; 129 };
119 130
120 gpt@660 { // General Purpose Timer 131 gpt@660 { // General Purpose Timer
121 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 132 compatible = "mpc5200b-gpt\0mpc5200-gpt";
122 device_type = "gpt"; 133 device_type = "gpt";
134 cell-index = <6>;
123 reg = <660 10>; 135 reg = <660 10>;
124 interrupts = <1 f 0>; 136 interrupts = <1 f 0>;
125 interrupt-parent = <500>; 137 interrupt-parent = <500>;
126 }; 138 };
127 139
128 gpt@670 { // General Purpose Timer 140 gpt@670 { // General Purpose Timer
129 compatible = "mpc5200b-gpt\0mpc52xx-gpt"; 141 compatible = "mpc5200b-gpt\0mpc5200-gpt";
130 device_type = "gpt"; 142 device_type = "gpt";
143 cell-index = <7>;
131 reg = <670 10>; 144 reg = <670 10>;
132 interrupts = <1 10 0>; 145 interrupts = <1 10 0>;
133 interrupt-parent = <500>; 146 interrupt-parent = <500>;
134 }; 147 };
135 148
136 rtc@800 { // Real time clock 149 rtc@800 { // Real time clock
137 compatible = "mpc5200b-rtc\0mpc52xx-rtc"; 150 compatible = "mpc5200b-rtc\0mpc5200-rtc";
138 device_type = "rtc"; 151 device_type = "rtc";
139 reg = <800 100>; 152 reg = <800 100>;
140 interrupts = <1 5 0 1 6 0>; 153 interrupts = <1 5 0 1 6 0>;
@@ -143,7 +156,8 @@
143 156
144 mscan@900 { 157 mscan@900 {
145 device_type = "mscan"; 158 device_type = "mscan";
146 compatible = "mpc5200b-mscan\0mpc52xx-mscan"; 159 compatible = "mpc5200b-mscan\0mpc5200-mscan";
160 cell-index = <0>;
147 interrupts = <2 11 0>; 161 interrupts = <2 11 0>;
148 interrupt-parent = <500>; 162 interrupt-parent = <500>;
149 reg = <900 80>; 163 reg = <900 80>;
@@ -151,21 +165,22 @@
151 165
152 mscan@980 { 166 mscan@980 {
153 device_type = "mscan"; 167 device_type = "mscan";
154 compatible = "mpc5200b-mscan\0mpc52xx-mscan"; 168 compatible = "mpc5200b-mscan\0mpc5200-mscan";
169 cell-index = <1>;
155 interrupts = <1 12 0>; 170 interrupts = <1 12 0>;
156 interrupt-parent = <500>; 171 interrupt-parent = <500>;
157 reg = <980 80>; 172 reg = <980 80>;
158 }; 173 };
159 174
160 gpio@b00 { 175 gpio@b00 {
161 compatible = "mpc5200b-gpio\0mpc52xx-gpio"; 176 compatible = "mpc5200b-gpio\0mpc5200-gpio";
162 reg = <b00 40>; 177 reg = <b00 40>;
163 interrupts = <1 7 0>; 178 interrupts = <1 7 0>;
164 interrupt-parent = <500>; 179 interrupt-parent = <500>;
165 }; 180 };
166 181
167 gpio-wkup@b00 { 182 gpio-wkup@b00 {
168 compatible = "mpc5200b-gpio-wkup\0mpc52xx-gpio-wkup"; 183 compatible = "mpc5200b-gpio-wkup\0mpc5200-gpio-wkup";
169 reg = <c00 40>; 184 reg = <c00 40>;
170 interrupts = <1 8 0 0 3 0>; 185 interrupts = <1 8 0 0 3 0>;
171 interrupt-parent = <500>; 186 interrupt-parent = <500>;
@@ -176,7 +191,7 @@
176 #size-cells = <2>; 191 #size-cells = <2>;
177 #address-cells = <3>; 192 #address-cells = <3>;
178 device_type = "pci"; 193 device_type = "pci";
179 compatible = "mpc5200b-pci\0mpc52xx-pci"; 194 compatible = "mpc5200b-pci\0mpc5200-pci";
180 reg = <d00 100>; 195 reg = <d00 100>;
181 interrupt-map-mask = <f800 0 0 7>; 196 interrupt-map-mask = <f800 0 0 7>;
182 interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot 197 interrupt-map = <c000 0 0 1 500 0 0 3 // 1st slot
@@ -199,7 +214,7 @@
199 214
200 spi@f00 { 215 spi@f00 {
201 device_type = "spi"; 216 device_type = "spi";
202 compatible = "mpc5200b-spi\0mpc52xx-spi"; 217 compatible = "mpc5200b-spi\0mpc5200-spi";
203 reg = <f00 20>; 218 reg = <f00 20>;
204 interrupts = <2 d 0 2 e 0>; 219 interrupts = <2 d 0 2 e 0>;
205 interrupt-parent = <500>; 220 interrupt-parent = <500>;
@@ -207,7 +222,7 @@
207 222
208 usb@1000 { 223 usb@1000 {
209 device_type = "usb-ohci-be"; 224 device_type = "usb-ohci-be";
210 compatible = "mpc5200b-ohci\0mpc52xx-ohci\0ohci-be"; 225 compatible = "mpc5200b-ohci\0mpc5200-ohci\0ohci-be";
211 reg = <1000 ff>; 226 reg = <1000 ff>;
212 interrupts = <2 6 0>; 227 interrupts = <2 6 0>;
213 interrupt-parent = <500>; 228 interrupt-parent = <500>;
@@ -215,7 +230,7 @@
215 230
216 bestcomm@1200 { 231 bestcomm@1200 {
217 device_type = "dma-controller"; 232 device_type = "dma-controller";
218 compatible = "mpc5200b-bestcomm\0mpc52xx-bestcomm"; 233 compatible = "mpc5200b-bestcomm\0mpc5200-bestcomm";
219 reg = <1200 80>; 234 reg = <1200 80>;
220 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0 235 interrupts = <3 0 0 3 1 0 3 2 0 3 3 0
221 3 4 0 3 5 0 3 6 0 3 7 0 236 3 4 0 3 5 0 3 6 0 3 7 0
@@ -225,67 +240,73 @@
225 }; 240 };
226 241
227 xlb@1f00 { 242 xlb@1f00 {
228 compatible = "mpc5200b-xlb\0mpc52xx-xlb"; 243 compatible = "mpc5200b-xlb\0mpc5200-xlb";
229 reg = <1f00 100>; 244 reg = <1f00 100>;
230 }; 245 };
231 246
232 serial@2000 { // PSC1 247 serial@2000 { // PSC1
233 device_type = "serial"; 248 device_type = "serial";
234 compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; 249 compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
235 port-number = <0>; // Logical port assignment 250 port-number = <0>; // Logical port assignment
251 cell-index = <0>;
236 reg = <2000 100>; 252 reg = <2000 100>;
237 interrupts = <2 1 0>; 253 interrupts = <2 1 0>;
238 interrupt-parent = <500>; 254 interrupt-parent = <500>;
239 }; 255 };
240 256
241 // PSC2 in spi mode example 257 // PSC2 in ac97 mode example
242 spi@2200 { // PSC2 258 //ac97@2200 { // PSC2
243 device_type = "spi"; 259 // device_type = "sound";
244 compatible = "mpc5200b-psc-spi\0mpc52xx-psc-spi"; 260 // compatible = "mpc5200b-psc-ac97\0mpc5200-psc-ac97";
245 reg = <2200 100>; 261 // cell-index = <1>;
246 interrupts = <2 2 0>; 262 // reg = <2200 100>;
247 interrupt-parent = <500>; 263 // interrupts = <2 2 0>;
248 }; 264 // interrupt-parent = <500>;
265 //};
249 266
250 // PSC3 in CODEC mode example 267 // PSC3 in CODEC mode example
251 i2s@2400 { // PSC3 268 //i2s@2400 { // PSC3
252 device_type = "sound"; 269 // device_type = "sound";
253 compatible = "mpc5200b-psc-i2s\0mpc52xx-psc-i2s"; 270 // compatible = "mpc5200b-psc-i2s"; //not 5200 compatible
254 reg = <2400 100>; 271 // cell-index = <2>;
255 interrupts = <2 3 0>; 272 // reg = <2400 100>;
256 interrupt-parent = <500>; 273 // interrupts = <2 3 0>;
257 }; 274 // interrupt-parent = <500>;
275 //};
258 276
259 // PSC4 unconfigured 277 // PSC4 in uart mode example
260 //serial@2600 { // PSC4 278 //serial@2600 { // PSC4
261 // device_type = "serial"; 279 // device_type = "serial";
262 // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; 280 // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
281 // cell-index = <3>;
263 // reg = <2600 100>; 282 // reg = <2600 100>;
264 // interrupts = <2 b 0>; 283 // interrupts = <2 b 0>;
265 // interrupt-parent = <500>; 284 // interrupt-parent = <500>;
266 //}; 285 //};
267 286
268 // PSC5 unconfigured 287 // PSC5 in uart mode example
269 //serial@2800 { // PSC5 288 //serial@2800 { // PSC5
270 // device_type = "serial"; 289 // device_type = "serial";
271 // compatible = "mpc5200b-psc-uart\0mpc52xx-psc-uart"; 290 // compatible = "mpc5200b-psc-uart\0mpc5200-psc-uart";
291 // cell-index = <4>;
272 // reg = <2800 100>; 292 // reg = <2800 100>;
273 // interrupts = <2 c 0>; 293 // interrupts = <2 c 0>;
274 // interrupt-parent = <500>; 294 // interrupt-parent = <500>;
275 //}; 295 //};
276 296
277 // PSC6 in AC97 mode example 297 // PSC6 in spi mode example
278 ac97@2c00 { // PSC6 298 //spi@2c00 { // PSC6
279 device_type = "sound"; 299 // device_type = "spi";
280 compatible = "mpc5200b-psc-ac97\0mpc52xx-psc-ac97"; 300 // compatible = "mpc5200b-psc-spi\0mpc5200-psc-spi";
281 reg = <2c00 100>; 301 // cell-index = <5>;
282 interrupts = <2 4 0>; 302 // reg = <2c00 100>;
283 interrupt-parent = <500>; 303 // interrupts = <2 4 0>;
284 }; 304 // interrupt-parent = <500>;
305 //};
285 306
286 ethernet@3000 { 307 ethernet@3000 {
287 device_type = "network"; 308 device_type = "network";
288 compatible = "mpc5200b-fec\0mpc52xx-fec"; 309 compatible = "mpc5200b-fec\0mpc5200-fec";
289 reg = <3000 800>; 310 reg = <3000 800>;
290 mac-address = [ 02 03 04 05 06 07 ]; // Bad! 311 mac-address = [ 02 03 04 05 06 07 ]; // Bad!
291 interrupts = <2 5 0>; 312 interrupts = <2 5 0>;
@@ -294,7 +315,7 @@
294 315
295 ata@3a00 { 316 ata@3a00 {
296 device_type = "ata"; 317 device_type = "ata";
297 compatible = "mpc5200b-ata\0mpc52xx-ata"; 318 compatible = "mpc5200b-ata\0mpc5200-ata";
298 reg = <3a00 100>; 319 reg = <3a00 100>;
299 interrupts = <2 7 0>; 320 interrupts = <2 7 0>;
300 interrupt-parent = <500>; 321 interrupt-parent = <500>;
@@ -302,7 +323,8 @@
302 323
303 i2c@3d00 { 324 i2c@3d00 {
304 device_type = "i2c"; 325 device_type = "i2c";
305 compatible = "mpc5200b-i2c\0mpc52xx-i2c"; 326 compatible = "mpc5200b-i2c\0mpc5200-i2c";
327 cell-index = <0>;
306 reg = <3d00 40>; 328 reg = <3d00 40>;
307 interrupts = <2 f 0>; 329 interrupts = <2 f 0>;
308 interrupt-parent = <500>; 330 interrupt-parent = <500>;
@@ -310,14 +332,15 @@
310 332
311 i2c@3d40 { 333 i2c@3d40 {
312 device_type = "i2c"; 334 device_type = "i2c";
313 compatible = "mpc5200b-i2c\0mpc52xx-i2c"; 335 compatible = "mpc5200b-i2c\0mpc5200-i2c";
336 cell-index = <1>;
314 reg = <3d40 40>; 337 reg = <3d40 40>;
315 interrupts = <2 10 0>; 338 interrupts = <2 10 0>;
316 interrupt-parent = <500>; 339 interrupt-parent = <500>;
317 }; 340 };
318 sram@8000 { 341 sram@8000 {
319 device_type = "sram"; 342 device_type = "sram";
320 compatible = "mpc5200b-sram\0mpc52xx-sram\0sram"; 343 compatible = "mpc5200b-sram\0mpc5200-sram\0sram";
321 reg = <8000 4000>; 344 reg = <8000 4000>;
322 }; 345 };
323 }; 346 };
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-04 11:23:38 -0500