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-rw-r--r--Documentation/devicetree/bindings/arm/fsl.txt22
-rw-r--r--arch/arm/boot/dts/imx27-phytec-phycore.dts76
-rw-r--r--arch/arm/boot/dts/imx27.dtsi217
-rw-r--r--arch/arm/mach-imx/Kconfig8
-rw-r--r--arch/arm/mach-imx/Makefile1
-rw-r--r--arch/arm/mach-imx/clock-imx27.c18
-rw-r--r--arch/arm/mach-imx/imx27-dt.c89
-rw-r--r--arch/arm/plat-mxc/include/mach/common.h1
8 files changed, 432 insertions, 0 deletions
diff --git a/Documentation/devicetree/bindings/arm/fsl.txt b/Documentation/devicetree/bindings/arm/fsl.txt
index 54bdddadf1cf..bfbc771a65f8 100644
--- a/Documentation/devicetree/bindings/arm/fsl.txt
+++ b/Documentation/devicetree/bindings/arm/fsl.txt
@@ -28,3 +28,25 @@ Required root node properties:
28i.MX6 Quad SABRE Lite Board 28i.MX6 Quad SABRE Lite Board
29Required root node properties: 29Required root node properties:
30 - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q"; 30 - compatible = "fsl,imx6q-sabrelite", "fsl,imx6q";
31
32Generic i.MX boards
33-------------------
34
35No iomux setup is done for these boards, so this must have been configured
36by the bootloader for boards to work with the generic bindings.
37
38i.MX27 generic board
39Required root node properties:
40 - compatible = "fsl,imx27";
41
42i.MX51 generic board
43Required root node properties:
44 - compatible = "fsl,imx51";
45
46i.MX53 generic board
47Required root node properties:
48 - compatible = "fsl,imx53";
49
50i.MX6q generic board
51Required root node properties:
52 - compatible = "fsl,imx6q";
diff --git a/arch/arm/boot/dts/imx27-phytec-phycore.dts b/arch/arm/boot/dts/imx27-phytec-phycore.dts
new file mode 100644
index 000000000000..a51a08fc2af9
--- /dev/null
+++ b/arch/arm/boot/dts/imx27-phytec-phycore.dts
@@ -0,0 +1,76 @@
1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/dts-v1/;
13/include/ "imx27.dtsi"
14
15/ {
16 model = "Phytec pcm038";
17 compatible = "phytec,imx27-pcm038", "fsl,imx27";
18
19 memory {
20 reg = <0x0 0x0>;
21 };
22
23 soc {
24 aipi@10000000 { /* aipi */
25
26 wdog@10002000 {
27 status = "okay";
28 };
29
30 uart@1000a000 {
31 fsl,uart-has-rtscts;
32 status = "okay";
33 };
34
35 uart@1000b000 {
36 fsl,uart-has-rtscts;
37 status = "okay";
38 };
39
40 uart@1000c000 {
41 fsl,uart-has-rtscts;
42 status = "okay";
43 };
44
45 fec@1002b000 {
46 status = "okay";
47 };
48
49 i2c@1001d000 {
50 clock-frequency = <400000>;
51 status = "okay";
52 at24@4c {
53 compatible = "at,24c32";
54 pagesize = <32>;
55 reg = <0x52>;
56 };
57 pcf8563@51 {
58 compatible = "nxp,pcf8563";
59 reg = <0x51>;
60 };
61 lm75@4a {
62 compatible = "national,lm75";
63 reg = <0x4a>;
64 };
65 };
66 };
67 };
68
69 nor_flash@c0000000 {
70 compatible = "cfi-flash";
71 bank-width = <2>;
72 reg = <0xc0000000 0x02000000>;
73 #address-cells = <1>;
74 #size-cells = <1>;
75 };
76};
diff --git a/arch/arm/boot/dts/imx27.dtsi b/arch/arm/boot/dts/imx27.dtsi
new file mode 100644
index 000000000000..bc5e7d5ddd54
--- /dev/null
+++ b/arch/arm/boot/dts/imx27.dtsi
@@ -0,0 +1,217 @@
1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12/include/ "skeleton.dtsi"
13
14/ {
15 aliases {
16 serial0 = &uart1;
17 serial1 = &uart2;
18 serial2 = &uart3;
19 serial3 = &uart4;
20 serial4 = &uart5;
21 serial5 = &uart6;
22 };
23
24 avic: avic-interrupt-controller@e0000000 {
25 compatible = "fsl,imx27-avic", "fsl,avic";
26 interrupt-controller;
27 #interrupt-cells = <1>;
28 reg = <0x10040000 0x1000>;
29 };
30
31 clocks {
32 #address-cells = <1>;
33 #size-cells = <0>;
34
35 osc26m {
36 compatible = "fsl,imx-osc26m", "fixed-clock";
37 clock-frequency = <26000000>;
38 };
39 };
40
41 soc {
42 #address-cells = <1>;
43 #size-cells = <1>;
44 compatible = "simple-bus";
45 interrupt-parent = <&avic>;
46 ranges;
47
48 aipi@10000000 { /* AIPI1 */
49 compatible = "fsl,aipi-bus", "simple-bus";
50 #address-cells = <1>;
51 #size-cells = <1>;
52 reg = <0x10000000 0x10000000>;
53 ranges;
54
55 wdog@10002000 {
56 compatible = "fsl,imx27-wdt", "fsl,imx21-wdt";
57 reg = <0x10002000 0x4000>;
58 interrupts = <27>;
59 status = "disabled";
60 };
61
62 uart1: uart@1000a000 {
63 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
64 reg = <0x1000a000 0x1000>;
65 interrupts = <20>;
66 status = "disabled";
67 };
68
69 uart2: uart@1000b000 {
70 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
71 reg = <0x1000b000 0x1000>;
72 interrupts = <19>;
73 status = "disabled";
74 };
75
76 uart3: uart@1000c000 {
77 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
78 reg = <0x1000c000 0x1000>;
79 interrupts = <18>;
80 status = "disabled";
81 };
82
83 uart4: uart@1000d000 {
84 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
85 reg = <0x1000d000 0x1000>;
86 interrupts = <17>;
87 status = "disabled";
88 };
89
90 cspi1: cspi@1000e000 {
91 #address-cells = <1>;
92 #size-cells = <0>;
93 compatible = "fsl,imx27-cspi";
94 reg = <0x1000e000 0x1000>;
95 interrupts = <16>;
96 status = "disabled";
97 };
98
99 cspi2: cspi@1000f000 {
100 #address-cells = <1>;
101 #size-cells = <0>;
102 compatible = "fsl,imx27-cspi";
103 reg = <0x1000f000 0x1000>;
104 interrupts = <15>;
105 status = "disabled";
106 };
107
108 i2c1: i2c@10012000 {
109 #address-cells = <1>;
110 #size-cells = <0>;
111 compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
112 reg = <0x10012000 0x1000>;
113 interrupts = <12>;
114 status = "disabled";
115 };
116
117 gpio1: gpio@10015000 {
118 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
119 reg = <0x10015000 0x100>;
120 interrupts = <8>;
121 gpio-controller;
122 #gpio-cells = <2>;
123 interrupt-controller;
124 #interrupt-cells = <1>;
125 };
126
127 gpio2: gpio@10015100 {
128 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
129 reg = <0x10015100 0x100>;
130 interrupts = <8>;
131 gpio-controller;
132 #gpio-cells = <2>;
133 interrupt-controller;
134 #interrupt-cells = <1>;
135 };
136
137 gpio3: gpio@10015200 {
138 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
139 reg = <0x10015200 0x100>;
140 interrupts = <8>;
141 gpio-controller;
142 #gpio-cells = <2>;
143 interrupt-controller;
144 #interrupt-cells = <1>;
145 };
146
147 gpio4: gpio@10015300 {
148 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
149 reg = <0x10015300 0x100>;
150 interrupts = <8>;
151 gpio-controller;
152 #gpio-cells = <2>;
153 interrupt-controller;
154 #interrupt-cells = <1>;
155 };
156
157 gpio5: gpio@10015400 {
158 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
159 reg = <0x10015400 0x100>;
160 interrupts = <8>;
161 gpio-controller;
162 #gpio-cells = <2>;
163 interrupt-controller;
164 #interrupt-cells = <1>;
165 };
166
167 gpio6: gpio@10015500 {
168 compatible = "fsl,imx27-gpio", "fsl,imx21-gpio";
169 reg = <0x10015500 0x100>;
170 interrupts = <8>;
171 gpio-controller;
172 #gpio-cells = <2>;
173 interrupt-controller;
174 #interrupt-cells = <1>;
175 };
176
177 cspi3: cspi@10017000 {
178 #address-cells = <1>;
179 #size-cells = <0>;
180 compatible = "fsl,imx27-cspi";
181 reg = <0x10017000 0x1000>;
182 interrupts = <6>;
183 status = "disabled";
184 };
185
186 uart5: uart@1001b000 {
187 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
188 reg = <0x1001b000 0x1000>;
189 interrupts = <49>;
190 status = "disabled";
191 };
192
193 uart6: uart@1001c000 {
194 compatible = "fsl,imx27-uart", "fsl,imx21-uart";
195 reg = <0x1001c000 0x1000>;
196 interrupts = <48>;
197 status = "disabled";
198 };
199
200 i2c2: i2c@1001d000 {
201 #address-cells = <1>;
202 #size-cells = <0>;
203 compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
204 reg = <0x1001d000 0x1000>;
205 interrupts = <1>;
206 status = "disabled";
207 };
208
209 fec: fec@1002b000 {
210 compatible = "fsl,imx27-fec";
211 reg = <0x1002b000 0x4000>;
212 interrupts = <50>;
213 status = "disabled";
214 };
215 };
216 };
217};
diff --git a/arch/arm/mach-imx/Kconfig b/arch/arm/mach-imx/Kconfig
index 4defb97bbfc8..85433b930045 100644
--- a/arch/arm/mach-imx/Kconfig
+++ b/arch/arm/mach-imx/Kconfig
@@ -376,6 +376,14 @@ config MACH_IMX27IPCAM
376 Include support for IMX27 IPCAM platform. This includes specific 376 Include support for IMX27 IPCAM platform. This includes specific
377 configurations for the board and its peripherals. 377 configurations for the board and its peripherals.
378 378
379config MACH_IMX27_DT
380 bool "Support i.MX27 platforms from device tree"
381 select SOC_IMX27
382 select USE_OF
383 help
384 Include support for Freescale i.MX27 based platforms
385 using the device tree for discovery
386
379endif 387endif
380 388
381if ARCH_IMX_V6_V7 389if ARCH_IMX_V6_V7
diff --git a/arch/arm/mach-imx/Makefile b/arch/arm/mach-imx/Makefile
index 55db9c488f2b..4ffeca7ee25e 100644
--- a/arch/arm/mach-imx/Makefile
+++ b/arch/arm/mach-imx/Makefile
@@ -41,6 +41,7 @@ obj-$(CONFIG_MACH_EUKREA_MBIMX27_BASEBOARD) += eukrea_mbimx27-baseboard.o
41obj-$(CONFIG_MACH_PCA100) += mach-pca100.o 41obj-$(CONFIG_MACH_PCA100) += mach-pca100.o
42obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o 42obj-$(CONFIG_MACH_MXT_TD60) += mach-mxt_td60.o
43obj-$(CONFIG_MACH_IMX27IPCAM) += mach-imx27ipcam.o 43obj-$(CONFIG_MACH_IMX27IPCAM) += mach-imx27ipcam.o
44obj-$(CONFIG_MACH_IMX27_DT) += imx27-dt.o
44 45
45# i.MX31 based machines 46# i.MX31 based machines
46obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o 47obj-$(CONFIG_MACH_MX31ADS) += mach-mx31ads.o
diff --git a/arch/arm/mach-imx/clock-imx27.c b/arch/arm/mach-imx/clock-imx27.c
index 88fe00a146e3..01ae3a45bd73 100644
--- a/arch/arm/mach-imx/clock-imx27.c
+++ b/arch/arm/mach-imx/clock-imx27.c
@@ -22,6 +22,7 @@
22#include <linux/io.h> 22#include <linux/io.h>
23#include <linux/module.h> 23#include <linux/module.h>
24#include <linux/clkdev.h> 24#include <linux/clkdev.h>
25#include <linux/of.h>
25 26
26#include <asm/div64.h> 27#include <asm/div64.h>
27 28
@@ -764,3 +765,20 @@ int __init mx27_clocks_init(unsigned long fref)
764 return 0; 765 return 0;
765} 766}
766 767
768#ifdef CONFIG_OF
769int __init mx27_clocks_init_dt(void)
770{
771 struct device_node *np;
772 u32 fref = 26000000; /* default */
773
774 for_each_compatible_node(np, NULL, "fixed-clock") {
775 if (!of_device_is_compatible(np, "fsl,imx-osc26m"))
776 continue;
777
778 if (!of_property_read_u32(np, "clock-frequency", &fref))
779 break;
780 }
781
782 return mx27_clocks_init(fref);
783}
784#endif
diff --git a/arch/arm/mach-imx/imx27-dt.c b/arch/arm/mach-imx/imx27-dt.c
new file mode 100644
index 000000000000..861ceb8232d6
--- /dev/null
+++ b/arch/arm/mach-imx/imx27-dt.c
@@ -0,0 +1,89 @@
1/*
2 * Copyright 2012 Sascha Hauer, Pengutronix
3 *
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
7 *
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
10 */
11
12#include <linux/irq.h>
13#include <linux/irqdomain.h>
14#include <linux/of_irq.h>
15#include <linux/of_platform.h>
16#include <asm/mach/arch.h>
17#include <asm/mach/time.h>
18#include <mach/common.h>
19#include <mach/mx27.h>
20
21static const struct of_dev_auxdata imx27_auxdata_lookup[] __initconst = {
22 OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART1_BASE_ADDR, "imx21-uart.0", NULL),
23 OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART2_BASE_ADDR, "imx21-uart.1", NULL),
24 OF_DEV_AUXDATA("fsl,imx27-uart", MX27_UART3_BASE_ADDR, "imx21-uart.2", NULL),
25 OF_DEV_AUXDATA("fsl,imx27-fec", MX27_FEC_BASE_ADDR, "imx27-fec.0", NULL),
26 OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C1_BASE_ADDR, "imx-i2c.0", NULL),
27 OF_DEV_AUXDATA("fsl,imx27-i2c", MX27_I2C2_BASE_ADDR, "imx-i2c.1", NULL),
28 OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI1_BASE_ADDR, "imx27-cspi.0", NULL),
29 OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI2_BASE_ADDR, "imx27-cspi.1", NULL),
30 OF_DEV_AUXDATA("fsl,imx27-cspi", MX27_CSPI3_BASE_ADDR, "imx27-cspi.2", NULL),
31 OF_DEV_AUXDATA("fsl,imx27-wdt", MX27_WDOG_BASE_ADDR, "imx2-wdt.0", NULL),
32 { /* sentinel */ }
33};
34
35static int __init imx27_avic_add_irq_domain(struct device_node *np,
36 struct device_node *interrupt_parent)
37{
38 irq_domain_add_simple(np, 0);
39 return 0;
40}
41
42static int __init imx27_gpio_add_irq_domain(struct device_node *np,
43 struct device_node *interrupt_parent)
44{
45 static int gpio_irq_base = MXC_GPIO_IRQ_START + ARCH_NR_GPIOS;
46
47 irq_domain_add_simple(np, gpio_irq_base);
48
49 return 0;
50}
51
52static const struct of_device_id imx27_irq_match[] __initconst = {
53 { .compatible = "fsl,imx27-avic", .data = imx27_avic_add_irq_domain, },
54 { .compatible = "fsl,imx27-gpio", .data = imx27_gpio_add_irq_domain, },
55 { /* sentinel */ }
56};
57
58static void __init imx27_dt_init(void)
59{
60 of_irq_init(imx27_irq_match);
61
62 of_platform_populate(NULL, of_default_bus_match_table,
63 imx27_auxdata_lookup, NULL);
64}
65
66static void __init imx27_timer_init(void)
67{
68 mx27_clocks_init_dt();
69}
70
71static struct sys_timer imx27_timer = {
72 .init = imx27_timer_init,
73};
74
75static const char *imx27_dt_board_compat[] __initdata = {
76 "fsl,imx27",
77 NULL
78};
79
80DT_MACHINE_START(IMX27_DT, "Freescale i.MX27 (Device Tree Support)")
81 .map_io = mx27_map_io,
82 .init_early = imx27_init_early,
83 .init_irq = mx27_init_irq,
84 .handle_irq = imx27_handle_irq,
85 .timer = &imx27_timer,
86 .init_machine = imx27_dt_init,
87 .dt_compat = imx27_dt_board_compat,
88 .restart = mxc_restart,
89MACHINE_END
diff --git a/arch/arm/plat-mxc/include/mach/common.h b/arch/arm/plat-mxc/include/mach/common.h
index 1bf0df81bdc6..16d10a807a63 100644
--- a/arch/arm/plat-mxc/include/mach/common.h
+++ b/arch/arm/plat-mxc/include/mach/common.h
@@ -65,6 +65,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
65 unsigned long ckih1, unsigned long ckih2); 65 unsigned long ckih1, unsigned long ckih2);
66extern int mx53_clocks_init(unsigned long ckil, unsigned long osc, 66extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
67 unsigned long ckih1, unsigned long ckih2); 67 unsigned long ckih1, unsigned long ckih2);
68extern int mx27_clocks_init_dt(void);
68extern int mx51_clocks_init_dt(void); 69extern int mx51_clocks_init_dt(void);
69extern int mx53_clocks_init_dt(void); 70extern int mx53_clocks_init_dt(void);
70extern int mx6q_clocks_init(void); 71extern int mx6q_clocks_init(void);
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-03 23:45:19 -0500