diff options
-rw-r--r-- | arch/arm/mach-s5p64x0/dma.c (renamed from arch/arm/mach-s5p6440/dma.c) | 86 | ||||
-rw-r--r-- | arch/arm/mach-s5p64x0/include/mach/dma.h (renamed from arch/arm/mach-s5p6440/include/mach/dma.h) | 0 | ||||
-rw-r--r-- | arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | 20 |
3 files changed, 85 insertions, 21 deletions
diff --git a/arch/arm/mach-s5p6440/dma.c b/arch/arm/mach-s5p64x0/dma.c index 07606ad57519..29a8c2410049 100644 --- a/arch/arm/mach-s5p6440/dma.c +++ b/arch/arm/mach-s5p64x0/dma.c | |||
@@ -1,4 +1,8 @@ | |||
1 | /* | 1 | /* linux/arch/arm/mach-s5p64x0/dma.c |
2 | * | ||
3 | * Copyright (c) 2010 Samsung Electronics Co., Ltd. | ||
4 | * http://www.samsung.com | ||
5 | * | ||
2 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. | 6 | * Copyright (C) 2010 Samsung Electronics Co. Ltd. |
3 | * Jaswinder Singh <jassi.brar@samsung.com> | 7 | * Jaswinder Singh <jassi.brar@samsung.com> |
4 | * | 8 | * |
@@ -15,26 +19,25 @@ | |||
15 | * You should have received a copy of the GNU General Public License | 19 | * You should have received a copy of the GNU General Public License |
16 | * along with this program; if not, write to the Free Software | 20 | * along with this program; if not, write to the Free Software |
17 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | 21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. |
18 | */ | 22 | */ |
19 | 23 | ||
20 | #include <linux/platform_device.h> | 24 | #include <linux/platform_device.h> |
21 | #include <linux/dma-mapping.h> | 25 | #include <linux/dma-mapping.h> |
22 | 26 | ||
23 | #include <plat/devs.h> | ||
24 | #include <plat/irqs.h> | ||
25 | |||
26 | #include <mach/map.h> | 27 | #include <mach/map.h> |
27 | #include <mach/irqs.h> | 28 | #include <mach/irqs.h> |
29 | #include <mach/regs-clock.h> | ||
28 | 30 | ||
31 | #include <plat/devs.h> | ||
29 | #include <plat/s3c-pl330-pdata.h> | 32 | #include <plat/s3c-pl330-pdata.h> |
30 | 33 | ||
31 | static u64 dma_dmamask = DMA_BIT_MASK(32); | 34 | static u64 dma_dmamask = DMA_BIT_MASK(32); |
32 | 35 | ||
33 | static struct resource s5p6440_pdma_resource[] = { | 36 | static struct resource s5p64x0_pdma_resource[] = { |
34 | [0] = { | 37 | [0] = { |
35 | .start = S5P6440_PA_PDMA, | 38 | .start = S5P64X0_PA_PDMA, |
36 | .end = S5P6440_PA_PDMA + SZ_4K, | 39 | .end = S5P64X0_PA_PDMA + SZ_4K, |
37 | .flags = IORESOURCE_MEM, | 40 | .flags = IORESOURCE_MEM, |
38 | }, | 41 | }, |
39 | [1] = { | 42 | [1] = { |
40 | .start = IRQ_DMA0, | 43 | .start = IRQ_DMA0, |
@@ -80,26 +83,67 @@ static struct s3c_pl330_platdata s5p6440_pdma_pdata = { | |||
80 | }, | 83 | }, |
81 | }; | 84 | }; |
82 | 85 | ||
83 | static struct platform_device s5p6440_device_pdma = { | 86 | static struct s3c_pl330_platdata s5p6450_pdma_pdata = { |
87 | .peri = { | ||
88 | [0] = DMACH_UART0_RX, | ||
89 | [1] = DMACH_UART0_TX, | ||
90 | [2] = DMACH_UART1_RX, | ||
91 | [3] = DMACH_UART1_TX, | ||
92 | [4] = DMACH_UART2_RX, | ||
93 | [5] = DMACH_UART2_TX, | ||
94 | [6] = DMACH_UART3_RX, | ||
95 | [7] = DMACH_UART3_TX, | ||
96 | [8] = DMACH_UART4_RX, | ||
97 | [9] = DMACH_UART4_TX, | ||
98 | [10] = DMACH_PCM0_TX, | ||
99 | [11] = DMACH_PCM0_RX, | ||
100 | [12] = DMACH_I2S0_TX, | ||
101 | [13] = DMACH_I2S0_RX, | ||
102 | [14] = DMACH_SPI0_TX, | ||
103 | [15] = DMACH_SPI0_RX, | ||
104 | [16] = DMACH_PCM1_TX, | ||
105 | [17] = DMACH_PCM1_RX, | ||
106 | [18] = DMACH_PCM2_TX, | ||
107 | [19] = DMACH_PCM2_RX, | ||
108 | [20] = DMACH_SPI1_TX, | ||
109 | [21] = DMACH_SPI1_RX, | ||
110 | [22] = DMACH_USI_TX, | ||
111 | [23] = DMACH_USI_RX, | ||
112 | [24] = DMACH_MAX, | ||
113 | [25] = DMACH_I2S1_TX, | ||
114 | [26] = DMACH_I2S1_RX, | ||
115 | [27] = DMACH_I2S2_TX, | ||
116 | [28] = DMACH_I2S2_RX, | ||
117 | [29] = DMACH_PWM, | ||
118 | [30] = DMACH_UART5_RX, | ||
119 | [31] = DMACH_UART5_TX, | ||
120 | }, | ||
121 | }; | ||
122 | |||
123 | static struct platform_device s5p64x0_device_pdma = { | ||
84 | .name = "s3c-pl330", | 124 | .name = "s3c-pl330", |
85 | .id = 1, | 125 | .id = 0, |
86 | .num_resources = ARRAY_SIZE(s5p6440_pdma_resource), | 126 | .num_resources = ARRAY_SIZE(s5p64x0_pdma_resource), |
87 | .resource = s5p6440_pdma_resource, | 127 | .resource = s5p64x0_pdma_resource, |
88 | .dev = { | 128 | .dev = { |
89 | .dma_mask = &dma_dmamask, | 129 | .dma_mask = &dma_dmamask, |
90 | .coherent_dma_mask = DMA_BIT_MASK(32), | 130 | .coherent_dma_mask = DMA_BIT_MASK(32), |
91 | .platform_data = &s5p6440_pdma_pdata, | ||
92 | }, | 131 | }, |
93 | }; | 132 | }; |
94 | 133 | ||
95 | static struct platform_device *s5p6440_dmacs[] __initdata = { | 134 | static int __init s5p64x0_dma_init(void) |
96 | &s5p6440_device_pdma, | ||
97 | }; | ||
98 | |||
99 | static int __init s5p6440_dma_init(void) | ||
100 | { | 135 | { |
101 | platform_add_devices(s5p6440_dmacs, ARRAY_SIZE(s5p6440_dmacs)); | 136 | unsigned int id; |
137 | |||
138 | id = __raw_readl(S5P64X0_SYS_ID) & 0xFF000; | ||
139 | |||
140 | if (id == 0x50000) | ||
141 | s5p64x0_device_pdma.dev.platform_data = &s5p6450_pdma_pdata; | ||
142 | else | ||
143 | s5p64x0_device_pdma.dev.platform_data = &s5p6440_pdma_pdata; | ||
144 | |||
145 | platform_device_register(&s5p64x0_device_pdma); | ||
102 | 146 | ||
103 | return 0; | 147 | return 0; |
104 | } | 148 | } |
105 | arch_initcall(s5p6440_dma_init); | 149 | arch_initcall(s5p64x0_dma_init); |
diff --git a/arch/arm/mach-s5p6440/include/mach/dma.h b/arch/arm/mach-s5p64x0/include/mach/dma.h index 81209eb1409b..81209eb1409b 100644 --- a/arch/arm/mach-s5p6440/include/mach/dma.h +++ b/arch/arm/mach-s5p64x0/include/mach/dma.h | |||
diff --git a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h index 5fe6721b57f7..810744213120 100644 --- a/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h +++ b/arch/arm/plat-samsung/include/plat/s3c-dma-pl330.h | |||
@@ -32,6 +32,12 @@ enum dma_ch { | |||
32 | DMACH_UART2_TX, | 32 | DMACH_UART2_TX, |
33 | DMACH_UART3_RX, | 33 | DMACH_UART3_RX, |
34 | DMACH_UART3_TX, | 34 | DMACH_UART3_TX, |
35 | DMACH_UART4_RX, | ||
36 | DMACH_UART4_TX, | ||
37 | DMACH_UART5_RX, | ||
38 | DMACH_UART5_TX, | ||
39 | DMACH_USI_RX, | ||
40 | DMACH_USI_TX, | ||
35 | DMACH_IRDA, | 41 | DMACH_IRDA, |
36 | DMACH_I2S0_RX, | 42 | DMACH_I2S0_RX, |
37 | DMACH_I2S0_TX, | 43 | DMACH_I2S0_TX, |
@@ -64,6 +70,20 @@ enum dma_ch { | |||
64 | DMACH_MSM_REQ2, | 70 | DMACH_MSM_REQ2, |
65 | DMACH_MSM_REQ1, | 71 | DMACH_MSM_REQ1, |
66 | DMACH_MSM_REQ0, | 72 | DMACH_MSM_REQ0, |
73 | DMACH_SLIMBUS0_RX, | ||
74 | DMACH_SLIMBUS0_TX, | ||
75 | DMACH_SLIMBUS0AUX_RX, | ||
76 | DMACH_SLIMBUS0AUX_TX, | ||
77 | DMACH_SLIMBUS1_RX, | ||
78 | DMACH_SLIMBUS1_TX, | ||
79 | DMACH_SLIMBUS2_RX, | ||
80 | DMACH_SLIMBUS2_TX, | ||
81 | DMACH_SLIMBUS3_RX, | ||
82 | DMACH_SLIMBUS3_TX, | ||
83 | DMACH_SLIMBUS4_RX, | ||
84 | DMACH_SLIMBUS4_TX, | ||
85 | DMACH_SLIMBUS5_RX, | ||
86 | DMACH_SLIMBUS5_TX, | ||
67 | /* END Marker, also used to denote a reserved channel */ | 87 | /* END Marker, also used to denote a reserved channel */ |
68 | DMACH_MAX, | 88 | DMACH_MAX, |
69 | }; | 89 | }; |